coreboot-4.7-fd470f7163709c1022ee6185134a2387812774ec Mon Oct 31 14:29:57 UTC 2022 romstage starting... FSP TempRamInit was successful... Board ID: 0x52. GPIO table: 0xffc06e60, entry num: 0x98! Changing GpioPad PID: c2 Offset: 0x410 PadModeP1: 1 P2: 2 R: 0x05000602 Fx05000a02 ! Changing GpioPad PID: c2 Offset: 0x418 PadModeP1: 1 P2: 2 R: 0x05000602 Fx05000a02 ! Changing GpioPad PID: c2 Offset: 0x430 PadModeP1: 3 P2: 2 R: 0x05000e02 Fx05000a02 ! Changing GpioPad PID: c2 Offset: 0x438 PadModeP1: 3 P2: 2 R: 0x05000e02 Fx05000a02 ! Changing GpioPad PID: c2 Offset: 0x4d8 PadModeP1: 0 P2: 3 R: 0x45000200 Fx45000e00 ! Changing GpioPad PID: c2 Offset: 0x500 PadModeP1: 1 P2: 0 R: 0x45000602 Fx45000202 ! Changing GpioPad PID: c5 Offset: 0x498 PadModeP1: 2 P2: 3 R: 0x05000a02 Fx05000e02 ! Changing GpioPad PID: c5 Offset: 0x4a0 PadModeP1: 3 P2: 0 R: 0x45000e00 Fx45040100 ! Changing GpioPad PID: c5 Offset: 0x4a8 PadModeP1: 1 P2: 0 R: 0x45000602 Fx45020102 ! Changing GpioPad PID: c5 Offset: 0x4b0 PadModeP1: 1 P2: 3 R: 0x45000600 Fx45000e00 ! GPIO WARNING: Accessing pad not owned by host (Group=2, Pad=21)!The owner is CSME ** Please make sure the GPIO usage in sync between CSME/ISH and Host IA FW configuration. ** All the GPIO occupied by CSME/ISH should not do any configuration by Host IA FW. GPIO WARNING: Accessing pad not owned by host (Group=2, Pad=22)!The owner is CSME ** Please make sure the GPIO usage in sync between CSME/ISH and Host IA FW configuration. ** All the GPIO occupied by CSME/ISH should not do any configuration by Host IA FW. Changing GpioPad PID: c5 Offset: 0x560 PadModeP1: 0 P2: 1 R: 0x45000200 Fx45000600 ! Changing GpioPad PID: c5 Offset: 0x568 PadModeP1: 0 P2: 3 R: 0x45000200 Fx45000e00 ! Changing GpioPad PID: c5 Offset: 0x570 PadModeP1: 0 P2: 1 R: 0x45000300 Fx45000700 ! Changing GpioPad PID: c5 Offset: 0x578 PadModeP1: 0 P2: 1 R: 0x45000300 Fx45000700 ! Changing GpioPad PID: c5 Offset: 0x580 PadModeP1: 0 P2: 1 R: 0x45000300 Fx45000700 ! GPIO WARNING: Accessing pad not owned by host (Group=2, Pad=39)!The owner is CSME ** Please make sure the GPIO usage in sync between CSME/ISH and Host IA FW configuration. ** All the GPIO occupied by CSME/ISH should not do any configuration by Host IA FW. GPIO WARNING: Accessing pad not owned by host (Group=2, Pad=40)!The owner is CSME ** Please make sure the GPIO usage in sync between CSME/ISH and Host IA FW configuration. ** All the GPIO occupied by CSME/ISH should not do any configuration by Host IA FW. GPIO WARNING: Accessing pad not owned by host (Group=2, Pad=48)!The owner is CSME ** Please make sure the GPIO usage in sync between CSME/ISH and Host IA FW configuration. ** All the GPIO occupied by CSME/ISH should not do any configuration by Host IA FW. Changing GpioPad PID: c5 Offset: 0x618 PadModeP1: 1 P2: 0 R: 0x45000600 Fx45000100 ! Changing GpioPad PID: c5 Offset: 0x620 PadModeP1: 0 P2: 0 R: 0x44000300 Fx44000000 ! Changing GpioPad PID: c5 Offset: 0x628 PadModeP1: 0 P2: 0 R: 0x44000300 Fx44000100 ! Changing GpioPad PID: c5 Offset: 0x630 PadModeP1: 0 P2: 0 R: 0x44000300 Fx44000100 ! Changing GpioPad PID: c5 Offset: 0x648 PadModeP1: 0 P2: 1 R: 0x45000200 Fx45000600 ! Changing GpioPad PID: c5 Offset: 0x688 PadModeP1: 1 P2: 0 R: 0x44000600 Fx44000100 ! Changing GpioPad PID: c5 Offset: 0x710 PadModeP1: 1 P2: 0 R: 0x45000700 Fx45000100 ! Changing GpioPad PID: c5 Offset: 0x718 PadModeP1: 1 P2: 2 R: 0x45000702 Fx45000b02 ! Changing GpioPad PID: c5 Offset: 0x728 PadModeP1: 0 P2: 1 R: 0x45000300 Fx45000700 ! Changing GpioPad PID: c5 Offset: 0x730 PadModeP1: 0 P2: 1 R: 0x45000300 Fx45000700 ! Changing GpioPad PID: c5 Offset: 0x738 PadModeP1: 0 P2: 1 R: 0x45000300 Fx45000700 ! Changing GpioPad PID: c5 Offset: 0x740 PadModeP1: 0 P2: 1 R: 0x45000300 Fx45000700 ! Changing GpioPad PID: c5 Offset: 0x748 PadModeP1: 0 P2: 1 R: 0x45000300 Fx45000700 ! Changing GpioPad PID: c5 Offset: 0x750 PadModeP1: 0 P2: 1 R: 0x45000300 Fx45000700 ! Changing GpioPad PID: c5 Offset: 0x758 PadModeP1: 0 P2: 1 R: 0x45000300 Fx45000700 ! Changing GpioPad PID: c5 Offset: 0x760 PadModeP1: 0 P2: 1 R: 0x45000300 Fx45000700 ! Changing GpioPad PID: c5 Offset: 0x768 PadModeP1: 0 P2: 1 R: 0x45000300 Fx45000700 ! Changing GpioPad PID: c5 Offset: 0x770 PadModeP1: 0 P2: 1 R: 0x45000300 Fx45000700 ! Changing GpioPad PID: c5 Offset: 0x778 PadModeP1: 0 P2: 1 R: 0x45000300 Fx45000700 ! Changing GpioPad PID: c5 Offset: 0x780 PadModeP1: 0 P2: 0 R: 0x45000200 Fx45000200 ! TCO base address set to 0x400! CBFS: 'Master Header Locator' located CBFS at [400100:7fffc0) CBFS: Locating 'blobs/fspm.bin' CBFS: Found @ offset 331ec0 size 90000 FMAP: Found "FLASH" version 1.1 at 400000. FMAP: base = ff800000 size = 800000 #areas = 3 MRC: no data in 'RW_MRC_CACHE' bootmode is set to :0 Architectural UPD values for MemoryInit at: 0xfef0fcd0 0x01: Revision 0x00000000: NvsBufferPtr 0xfefb0000 --> 0xfef60100: StackBase 0x0004ff00: StackSize 0x00000000 --> 0x00002000: BootLoaderTolumSize 0x00000000: BootMode UPD values for MemoryInit: 0x02: PcdSmmTsegSize 0x00: PcdFspDebugPrintErrorLevel 0xa0: PcdSpdSmbusAddress_0_0 0xa2: PcdSpdSmbusAddress_0_1 0xa4: PcdSpdSmbusAddress_1_0 0xa6: PcdSpdSmbusAddress_1_1 0x00: PcdMrcRmtSupport 0x0c: PcdMrcRmtCpgcExpLoopCntValue 0x06: PcdMrcRmtCpgcNumBursts 0x00: PcdMemoryPreservation 0x01: PcdFastBoot 0x01: PcdEccSupport 0x00: PcdHsuartDevice 0x00: PcdMemoryDown 0x00: PcdEnableSATA0 0x00: PcdEnableSATA1 0x01: PcdEnableIQAT 0x00: PcdSmbusSpdWriteDisable 0x00: PcdEnableMeShutdown 0x01: PcdEnableXhci 0x0f: PcdDdrFreq 0x00: PcdMmioSize 0x01: PcdMeHeciCommunication 0x14: PcdHsioLanesNumber 0x00000000: PcdFiaMuxConfigPtr 0x00: PcdHalfWidthEnable 0x01: PcdTclIdle 0x03: PcdInterleaveMode 0x00: PcdMemoryThermalThrottling 0x00: PcdSkipMemoryTest 0x08: PcdUsb2Port1Pin 0x08: PcdUsb2Port2Pin 0x08: PcdUsb2Port3Pin 0x08: PcdUsb2Port4Pin 0x08: PcdUsb3Port1Pin 0x08: PcdUsb3Port2Pin 0x08: PcdUsb3Port3Pin 0x08: PcdUsb3Port4Pin 0x00: PcdIOxAPIC0_199 0x00: PcdDmapX16 fef0fcb0: 44 4e 56 55 50 44 5f 4d 01 00 00 00 00 00 00 00 DNVUPD_M........ fef0fcc0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ fef0fcd0: 01 00 00 00 00 00 00 00 00 01 f6 fe 00 ff 04 00 ................ fef0fce0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 . .............. fef0fcf0: 02 00 a0 a2 a4 a6 00 0c 06 00 01 01 00 00 00 00 ................ fef0fd00: 00 00 00 00 01 00 00 01 0f 00 01 14 00 00 00 00 ................ fef0fd10: 76 65 72 73 69 6f 6e 20 78 78 78 00 00 00 00 00 version xxx..... fef0fd20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ fef0fd30: 00 01 03 00 00 00 00 00 00 08 08 08 08 08 08 08 ................ fef0fd40: 08 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 ................ fef0fd50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... fef0fea0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 aa 55 ...............U CBMEM: IMD: root @ 7fbff000 254 entries. IMD: root @ 7fbfec00 62 entries. MTRR Range: Start=7ec00000 End=7f000000 (Size 400000) MTRR Range: Start=7f000000 End=7f800000 (Size 800000) MTRR Range: Start=7f800000 End=7fc00000 (Size 400000) MTRR Range: Start=ff800000 End=0 (Size 800000) MTRR Range: Start=7fe00000 End=80000000 (Size 200000) CBFS: 'Master Header Locator' located CBFS at [400100:7fffc0) CBFS: Locating 'fallback/postcar' CBFS: Found @ offset 16780 size 3cb4 Decompressing stage fallback/postcar @ 0x7f7cbfc0 (32176 bytes) Loading module at 7f7cc000 with entry 7f7cc000. filesize: 0x3ad0 memsize: 0x7d70 Processing 98 relocs. Offset value of 0x7d7cc000 CBFS: 'Master Header Locator' located CBFS at [400100:7fffc0) CBFS: Locating 'blobs/fspm.bin' CBFS: Found @ offset 331ec0 size 90000 Calling TempRamExit: 0xfff3245a coreboot-4.7-fd470f7163709c1022ee6185134a2387812774ec Mon Oct 31 14:29:57 UTC 2022 postcar starting... CBFS: 'Master Header Locator' located CBFS at [400100:7fffc0) CBFS: Locating 'fallback/ramstage' CBFS: Found @ offset 7c40 size e453 Decompressing stage fallback/ramstage @ 0x7f789fc0 (231440 bytes) Loading module at 7f78a000 with entry 7f78a000. filesize: 0x1d220 memsize: 0x387d0 Processing 2002 relocs. Offset value of 0x7f68a000 coreboot-4.7-fd470f7163709c1022ee6185134a2387812774ec Mon Oct 31 14:29:57 UTC 2022 ramstage starting... BS: BS_PRE_DEVICE times (us): entry 2 run 3 exit 0 CBFS: 'Master Header Locator' located CBFS at [400100:7fffc0) CBFS: Locating 'blobs/fsps.bin' CBFS: Found @ offset 3c2ec0 size 19000 CBFS: 'Master Header Locator' located CBFS at [400100:7fffc0) CBFS: Locating 'cpu_microcode_blob.bin' CBFS: 'cpu_microcode_blob.bin' not found. FIA MUX Configuration in FSP HOB is: FiaMuxConfig.SkuNumLanesAllowed = 0x14 FiaMuxConfig.FiaMuxConfig = 0xaf99555555 FiaMuxConfig.FiaMuxConfig.SataLaneConfiguration = 0x5115555 FiaMuxConfig.FiaMuxConfig.PcieRootPortsConfiguration = 0xff FiaMuxConfig.FiaMuxConfigRequest = 0xaf99555555 FiaMuxConfig.FiaMuxConfigRequest.SataLaneConfiguration = 0x5115555 FiaMuxConfig.FiaMuxConfigRequest.PcieRootPortsConfiguration = 0xff FiaMuxConfigStatus.FiaMuxConfigGetStatus = 0x0 FiaMuxConfigStatus.FiaMuxConfigSetStatus = 0x0 FiaMuxConfigStatus.FiaMuxConfigSetRequired = 0x0 Board ID: 0x52. UPD values for SiliconInit: 0x04: PcdBifurcationPcie0 0x03: PcdBifurcationPcie1 0x00: PcdActiveCoreCount 0x00000000: PcdCpuMicrocodePatchBase 0x00000000: PcdCpuMicrocodePatchSize 0x00: PcdEnablePcie0 0x00: PcdEnablePcie1 0x00: PcdEnableEmmc 0x01: PcdEnableGbE 0x00000000 --> 0x7f7a0444: PcdFiaMuxConfigRequestPtr 0x00: PcdPcieRootPort0DeEmphasis 0x00: PcdPcieRootPort1DeEmphasis 0x00: PcdPcieRootPort2DeEmphasis 0x00: PcdPcieRootPort3DeEmphasis 0x00: PcdPcieRootPort4DeEmphasis 0x00: PcdPcieRootPort5DeEmphasis 0x00: PcdPcieRootPort6DeEmphasis 0x00: PcdPcieRootPort7DeEmphasis 0x00000000 --> 0x7f7a6aa6: PcdEMMCDLLConfigPtr 0x01: PcdPcieRootPort0LinkSpeed 0x01: PcdPcieRootPort1LinkSpeed 0x01: PcdPcieRootPort2LinkSpeed 0x01: PcdPcieRootPort3LinkSpeed 0x01: PcdPcieRootPort4LinkSpeed 0x01: PcdPcieRootPort5LinkSpeed 0x01: PcdPcieRootPort6LinkSpeed 0x01: PcdPcieRootPort7LinkSpeed 0x00: PcdPcieRootPort0Aspm 0x00: PcdPcieRootPort1Aspm 0x00: PcdPcieRootPort2Aspm 0x00: PcdPcieRootPort3Aspm 0x00: PcdPcieRootPort4Aspm 0x00: PcdPcieRootPort5Aspm 0x00: PcdPcieRootPort6Aspm 0x00: PcdPcieRootPort7Aspm 7f7b7e60: 44 4e 56 55 50 44 5f 53 01 00 00 00 00 00 00 00 DNVUPD_S........ 7f7b7e70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 7f7b7e80: 04 03 00 00 00 00 00 00 00 00 00 00 00 00 01 44 ...............D 7f7b7e90: 04 7a 7f 00 00 00 00 00 00 00 00 00 00 00 00 00 .z.............. 7f7b7ea0: a6 6a 7a 7f 01 01 01 01 01 01 01 01 00 00 00 00 .jz............. 7f7b7eb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... 7f7b7f50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 aa 55 ...............U BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 359318 exit 0 Enumerating buses... Show all devs... Before device enumeration. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:04.0: enabled 1 PCI: 00:05.0: enabled 1 PCI: 00:06.0: enabled 1 PCI: 00:09.0: enabled 1 PCI: 00:0e.0: enabled 1 PCI: 00:10.0: enabled 1 PCI: 00:12.0: enabled 1 PCI: 00:14.0: enabled 1 PCI: 00:15.0: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:17.0: enabled 1 PCI: 00:18.0: enabled 1 PCI: 00:1a.0: enabled 1 PCI: 00:1a.1: enabled 1 PCI: 00:1a.2: enabled 1 PCI: 00:1c.0: enabled 1 PCI: 00:1f.0: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.4: enabled 1 PCI: 00:1f.5: enabled 1 Compare with tree... Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:04.0: enabled 1 PCI: 00:05.0: enabled 1 PCI: 00:06.0: enabled 1 PCI: 00:09.0: enabled 1 PCI: 00:0e.0: enabled 1 PCI: 00:10.0: enabled 1 PCI: 00:12.0: enabled 1 PCI: 00:14.0: enabled 1 PCI: 00:15.0: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:17.0: enabled 1 PCI: 00:18.0: enabled 1 PCI: 00:1a.0: enabled 1 PCI: 00:1a.1: enabled 1 PCI: 00:1a.2: enabled 1 PCI: 00:1c.0: enabled 1 PCI: 00:1f.0: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.4: enabled 1 PCI: 00:1f.5: enabled 1 Root Device scanning... root_dev_scan_bus for Root Device CPU_CLUSTER: 0 enabled DOMAIN: 0000 enabled DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [8086/0000] ops PCI: 00:00.0 [8086/1980] enabled PCI: 00:04.0 [8086/19a1] enabled PCI: 00:05.0 [8086/19a2] enabled Capability: type 0x10 @ 0x40 Capability: type 0x01 @ 0x80 Capability: type 0x0d @ 0x88 Capability: type 0x05 @ 0x90 Capability: type 0x10 @ 0x40 PCI: 00:06.0 subordinate bus PCI Express PCI: 00:06.0 [8086/19a3] enabled PCI: Static device PCI: 00:09.0 not found, disabling it. PCI: Static device PCI: 00:0e.0 not found, disabling it. PCI: Static device PCI: 00:10.0 not found, disabling it. PCI: 00:12.0 [8086/19ac] enabled PCI: Static device PCI: 00:14.0 not found, disabling it. PCI: 00:15.0 [8086/19d0] ops PCI: 00:15.0 subsystem <- 8086/19d0 PCI: 00:15.0 cmd <- 00 PCI: 00:15.0 [8086/19d0] enabled Capability: type 0x10 @ 0x40 Capability: type 0x01 @ 0x80 Capability: type 0x0d @ 0x88 Capability: type 0x05 @ 0x90 Capability: type 0x10 @ 0x40 PCI: 00:16.0 subordinate bus PCI Express PCI: 00:16.0 [8086/19d1] enabled Capability: type 0x10 @ 0x40 Capability: type 0x01 @ 0x80 Capability: type 0x0d @ 0x88 Capability: type 0x05 @ 0x90 Capability: type 0x10 @ 0x40 PCI: 00:17.0 subordinate bus PCI Express PCI: 00:17.0 [8086/19d2] enabled PCI: 00:18.0 [8086/19d3] enabled PCI: 00:1a.0 [8086/0000] ops PCI: 00:1a.0 [8086/19d8] enabled PCI: 00:1a.1 [8086/0000] ops PCI: 00:1a.1 [8086/19d8] enabled PCI: 00:1a.2 [8086/0000] ops PCI: 00:1a.2 [8086/19d8] enabled PCI: Static device PCI: 00:1c.0 not found, disabling it. PCI: 00:1f.0 [8086/19dc] bus ops PCI: 00:1f.0 [8086/19dc] enabled PCI: 00:1f.2 [8086/19de] ops PCI: 00:1f.2 [8086/19de] enabled PCI: 00:1f.4 [8086/19df] enabled PCI: 00:1f.5 [8086/19e0] enabled PCI: 00:06.0 scanning... do_pci_scan_bridge for PCI: 00:06.0 PCI: pci_scan_bus for bus 01 PCI: 01:00.0 [8086/19e2] enabled Capability: type 0x05 @ 0xb0 Capability: type 0x11 @ 0x60 Capability: type 0x01 @ 0x6c Capability: type 0x10 @ 0x74 Capability: type 0x10 @ 0x40 Capability: type 0x05 @ 0xb0 Capability: type 0x11 @ 0x60 Capability: type 0x01 @ 0x6c Capability: type 0x10 @ 0x74 Failed to enable LTR for dev = PCI: 01:00.0 scan_bus: scanning of bus PCI: 00:06.0 took 40450 usecs PCI: 00:16.0 scanning... do_pci_scan_bridge for PCI: 00:16.0 PCI: pci_scan_bus for bus 02 PCI: 02:00.0 [8086/15e4] enabled PCI: 02:00.1 [8086/15e4] enabled Capability: type 0x01 @ 0x40 Capability: type 0x05 @ 0x50 Capability: type 0x11 @ 0x70 Capability: type 0x10 @ 0xa0 Capability: type 0x10 @ 0x40 Capability: type 0x01 @ 0x40 Capability: type 0x05 @ 0x50 Capability: type 0x11 @ 0x70 Capability: type 0x10 @ 0xa0 Capability: type 0x10 @ 0x40 Capability: type 0x01 @ 0x40 Capability: type 0x05 @ 0x50 Capability: type 0x11 @ 0x70 Capability: type 0x10 @ 0xa0 Failed to enable LTR for dev = PCI: 02:00.0 Capability: type 0x01 @ 0x40 Capability: type 0x05 @ 0x50 Capability: type 0x11 @ 0x70 Capability: type 0x10 @ 0xa0 Failed to enable LTR for dev = PCI: 02:00.1 scan_bus: scanning of bus PCI: 00:16.0 took 72365 usecs PCI: 00:17.0 scanning... do_pci_scan_bridge for PCI: 00:17.0 PCI: pci_scan_bus for bus 03 PCI: 03:00.0 [8086/15e4] enabled PCI: 03:00.1 [8086/15e4] enabled Capability: type 0x01 @ 0x40 Capability: type 0x05 @ 0x50 Capability: type 0x11 @ 0x70 Capability: type 0x10 @ 0xa0 Capability: type 0x10 @ 0x40 Capability: type 0x01 @ 0x40 Capability: type 0x05 @ 0x50 Capability: type 0x11 @ 0x70 Capability: type 0x10 @ 0xa0 Capability: type 0x10 @ 0x40 Capability: type 0x01 @ 0x40 Capability: type 0x05 @ 0x50 Capability: type 0x11 @ 0x70 Capability: type 0x10 @ 0xa0 Failed to enable LTR for dev = PCI: 03:00.0 Capability: type 0x01 @ 0x40 Capability: type 0x05 @ 0x50 Capability: type 0x11 @ 0x70 Capability: type 0x10 @ 0xa0 Failed to enable LTR for dev = PCI: 03:00.1 scan_bus: scanning of bus PCI: 00:17.0 took 72364 usecs PCI: 00:1f.0 scanning... scan_lpc_bus for PCI: 00:1f.0 scan_lpc_bus for PCI: 00:1f.0 done scan_bus: scanning of bus PCI: 00:1f.0 took 8515 usecs scan_bus: scanning of bus DOMAIN: 0000 took 372543 usecs root_dev_scan_bus for Root Device done scan_bus: scanning of bus Root Device took 391123 usecs done FMAP: Found "FLASH" version 1.1 at 400000. FMAP: base = ff800000 size = 800000 #areas = 3 MRC: Checking cached data update for 'RW_MRC_CACHE'. SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x1000000 MRC: no data in 'RW_MRC_CACHE' MRC: cache data 'RW_MRC_CACHE' needs update. BS: BS_DEV_ENUMERATE times (us): entry 0 run 524325 exit 69352 Allocating resources... Reading resources... Root Device read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done DOMAIN: 0000 read_resources bus 0 link: 0 mc_add_fixed_mmio_resources: Adding PCIEXBAR @ 60 0xe0000000-0xefffffff. mc_add_fixed_mmio_resources: Adding MCHBAR @ 48 0xfed10000-0xfed17fff. MC MAP: TOUUD: 0x280000000 MC MAP: TOLUD: 0x80000000 MC MAP: TSEGMB: 0x7fe00000 SMM memory location: 0x7fe00000 SMM memory size: 0x200000 PCI: 00:06.0 read_resources bus 1 link: 0 PCI: 00:06.0 read_resources bus 1 link: 0 done PCI: 00:16.0 read_resources bus 2 link: 0 PCI: 00:16.0 read_resources bus 2 link: 0 done PCI: 00:17.0 read_resources bus 3 link: 0 PCI: 00:17.0 read_resources bus 3 link: 0 done Adding P2SB PCR config space BAR 0xfd000000-0xfe000000. Adding PMC PWRM config space BAR 0xfe000000-0xfe010000. DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done Done reading resources. Show resources in subtree (Root Device)...After reading. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 DOMAIN: 0000 child on link 0 PCI: 00:00.0 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 PCI: 00:00.0 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 60 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 48 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0 PCI: 00:00.0 resource base 100000 size 7fb00000 align 0 gran 0 limit 0 flags e0004200 index 1 PCI: 00:00.0 resource base 7fc00000 size 200000 align 0 gran 0 limit 0 flags f0000200 index 2 PCI: 00:00.0 resource base 7fe00000 size 200000 align 0 gran 0 limit 0 flags f0004200 index 3 PCI: 00:00.0 resource base 100000000 size 180000000 align 0 gran 0 limit 0 flags e0004200 index 4 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 5 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 6 PCI: 00:04.0 PCI: 00:05.0 PCI: 00:06.0 child on link 0 PCI: 01:00.0 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 01:00.0 PCI: 01:00.0 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 18 PCI: 01:00.0 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 20 PCI: 00:09.0 PCI: 00:0e.0 PCI: 00:10.0 PCI: 00:12.0 PCI: 00:12.0 resource base 0 size 400 align 12 gran 10 limit ffffffffffffffff flags 201 index 10 PCI: 00:14.0 PCI: 00:15.0 PCI: 00:15.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 PCI: 00:16.0 child on link 0 PCI: 02:00.0 PCI: 00:16.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:16.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:16.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 02:00.0 PCI: 02:00.0 resource base 0 size 200000 align 21 gran 21 limit ffffffffffffffff flags 1201 index 10 PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20 PCI: 02:00.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 2200 index 30 PCI: 02:00.1 PCI: 02:00.1 resource base 0 size 200000 align 21 gran 21 limit ffffffffffffffff flags 1201 index 10 PCI: 02:00.1 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20 PCI: 02:00.1 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 2200 index 30 PCI: 00:17.0 child on link 0 PCI: 03:00.0 PCI: 00:17.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:17.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:17.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 03:00.0 PCI: 03:00.0 resource base 0 size 200000 align 21 gran 21 limit ffffffffffffffff flags 1201 index 10 PCI: 03:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20 PCI: 03:00.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 2200 index 30 PCI: 03:00.1 PCI: 03:00.1 resource base 0 size 200000 align 21 gran 21 limit ffffffffffffffff flags 1201 index 10 PCI: 03:00.1 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20 PCI: 03:00.1 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 2200 index 30 PCI: 00:18.0 PCI: 00:18.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 PCI: 00:1a.0 PCI: 00:1a.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 00:1a.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14 PCI: 00:1a.1 PCI: 00:1a.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 00:1a.1 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14 PCI: 00:1a.2 PCI: 00:1a.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 00:1a.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14 PCI: 00:1c.0 PCI: 00:1f.0 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 PCI: 00:1f.0 resource base fd000000 size 1000000 align 0 gran 0 limit 0 flags e0000200 index da PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index db PCI: 00:1f.2 PCI: 00:1f.2 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags c0000200 index aa PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0040100 index ab PCI: 00:1f.4 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10 PCI: 00:1f.4 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 PCI: 00:1f.5 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff PCI: 00:06.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:06.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done PCI: 00:16.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:16.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done PCI: 00:17.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:17.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done PCI: 00:1f.4 20 * [0x0 - 0x1f] io PCI: 00:1a.0 10 * [0x20 - 0x27] io PCI: 00:1a.1 10 * [0x28 - 0x2f] io PCI: 00:1a.2 10 * [0x30 - 0x37] io DOMAIN: 0000 io: base: 38 size: 38 align: 5 gran: 0 limit: ffff done DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff PCI: 00:06.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:06.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:06.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 01:00.0 18 * [0x0 - 0x3ffff] mem PCI: 01:00.0 20 * [0x40000 - 0x7ffff] mem PCI: 00:06.0 mem: base: 80000 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:16.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 02:00.0 10 * [0x0 - 0x1fffff] prefmem PCI: 02:00.1 10 * [0x200000 - 0x3fffff] prefmem PCI: 02:00.0 20 * [0x400000 - 0x403fff] prefmem PCI: 02:00.1 20 * [0x404000 - 0x407fff] prefmem PCI: 00:16.0 prefmem: base: 408000 size: 500000 align: 21 gran: 20 limit: ffffffffffffffff done PCI: 00:16.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 02:00.0 30 * [0x0 - 0x7ffff] mem PCI: 02:00.1 30 * [0x80000 - 0xfffff] mem PCI: 00:16.0 mem: base: 100000 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:17.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 03:00.0 10 * [0x0 - 0x1fffff] prefmem PCI: 03:00.1 10 * [0x200000 - 0x3fffff] prefmem PCI: 03:00.0 20 * [0x400000 - 0x403fff] prefmem PCI: 03:00.1 20 * [0x404000 - 0x407fff] prefmem PCI: 00:17.0 prefmem: base: 408000 size: 500000 align: 21 gran: 20 limit: ffffffffffffffff done PCI: 00:17.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 03:00.0 30 * [0x0 - 0x7ffff] mem PCI: 03:00.1 30 * [0x80000 - 0xfffff] mem PCI: 00:17.0 mem: base: 100000 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:16.0 24 * [0x0 - 0x4fffff] prefmem PCI: 00:17.0 24 * [0x600000 - 0xafffff] prefmem PCI: 00:06.0 20 * [0xb00000 - 0xbfffff] mem PCI: 00:16.0 20 * [0xc00000 - 0xcfffff] mem PCI: 00:17.0 20 * [0xd00000 - 0xdfffff] mem PCI: 00:15.0 10 * [0xe00000 - 0xe0ffff] mem PCI: 00:1f.2 10 * [0xe10000 - 0xe13fff] mem PCI: 00:18.0 10 * [0xe14000 - 0xe14fff] mem PCI: 00:1f.5 10 * [0xe15000 - 0xe15fff] mem PCI: 00:12.0 10 * [0xe16000 - 0xe163ff] mem PCI: 00:1a.0 14 * [0xe17000 - 0xe170ff] mem PCI: 00:1a.1 14 * [0xe18000 - 0xe180ff] mem PCI: 00:1a.2 14 * [0xe19000 - 0xe190ff] mem PCI: 00:1f.4 10 * [0xe1a000 - 0xe1a0ff] mem DOMAIN: 0000 mem: base: e1a100 size: e1a100 align: 21 gran: 0 limit: ffffffff done avoid_fixed_resources: DOMAIN: 0000 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff constrain_resources: PCI: 00:00.0 60 base e0000000 limit efffffff mem (fixed) constrain_resources: PCI: 00:00.0 00 base 00000000 limit 0009ffff mem (fixed) constrain_resources: PCI: 00:00.0 01 base 00100000 limit 7fbfffff mem (fixed) constrain_resources: PCI: 00:00.0 02 base 7fc00000 limit 7fdfffff mem (fixed) constrain_resources: PCI: 00:00.0 03 base 7fe00000 limit 7fffffff mem (fixed) constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) constrain_resources: PCI: 00:1f.2 ab base 00001800 limit 000018ff io (fixed) avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ffff avoid_fixed_resources:@DOMAIN: 0000 10000100 base df000000 limit dfffffff Setting resources... DOMAIN: 0000 io: base:1900 size:38 align:5 gran:0 limit:ffff PCI: 00:1f.4 20 * [0x1c00 - 0x1c1f] io PCI: 00:1a.0 10 * [0x1c20 - 0x1c27] io PCI: 00:1a.1 10 * [0x1c28 - 0x1c2f] io PCI: 00:1a.2 10 * [0x1c30 - 0x1c37] io DOMAIN: 0000 io: next_base: 1c38 size: 38 align: 5 gran: 0 done PCI: 00:06.0 io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:06.0 io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:16.0 io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:16.0 io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:17.0 io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:17.0 io: next_base: ffff size: 0 align: 12 gran: 12 done DOMAIN: 0000 mem: base:df000000 size:e1a100 align:21 gran:0 limit:dfffffff PCI: 00:16.0 24 * [0xdf000000 - 0xdf4fffff] prefmem PCI: 00:17.0 24 * [0xdf600000 - 0xdfafffff] prefmem PCI: 00:06.0 20 * [0xdfb00000 - 0xdfbfffff] mem PCI: 00:16.0 20 * [0xdfc00000 - 0xdfcfffff] mem PCI: 00:17.0 20 * [0xdfd00000 - 0xdfdfffff] mem PCI: 00:15.0 10 * [0xdfe00000 - 0xdfe0ffff] mem PCI: 00:1f.2 10 * [0xdfe10000 - 0xdfe13fff] mem PCI: 00:18.0 10 * [0xdfe14000 - 0xdfe14fff] mem PCI: 00:1f.5 10 * [0xdfe15000 - 0xdfe15fff] mem PCI: 00:12.0 10 * [0xdfe16000 - 0xdfe163ff] mem PCI: 00:1a.0 14 * [0xdfe17000 - 0xdfe170ff] mem PCI: 00:1a.1 14 * [0xdfe18000 - 0xdfe180ff] mem PCI: 00:1a.2 14 * [0xdfe19000 - 0xdfe190ff] mem PCI: 00:1f.4 10 * [0xdfe1a000 - 0xdfe1a0ff] mem DOMAIN: 0000 mem: next_base: dfe1a100 size: e1a100 align: 21 gran: 0 done PCI: 00:06.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 00:06.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done PCI: 00:06.0 mem: base:dfb00000 size:100000 align:20 gran:20 limit:dfbfffff PCI: 01:00.0 18 * [0xdfb00000 - 0xdfb3ffff] mem PCI: 01:00.0 20 * [0xdfb40000 - 0xdfb7ffff] mem PCI: 00:06.0 mem: next_base: dfb80000 size: 100000 align: 20 gran: 20 done PCI: 00:16.0 prefmem: base:df000000 size:500000 align:21 gran:20 limit:df4fffff PCI: 02:00.0 10 * [0xdf000000 - 0xdf1fffff] prefmem PCI: 02:00.1 10 * [0xdf200000 - 0xdf3fffff] prefmem PCI: 02:00.0 20 * [0xdf400000 - 0xdf403fff] prefmem PCI: 02:00.1 20 * [0xdf404000 - 0xdf407fff] prefmem PCI: 00:16.0 prefmem: next_base: df408000 size: 500000 align: 21 gran: 20 done PCI: 00:16.0 mem: base:dfc00000 size:100000 align:20 gran:20 limit:dfcfffff PCI: 02:00.0 30 * [0xdfc00000 - 0xdfc7ffff] mem PCI: 02:00.1 30 * [0xdfc80000 - 0xdfcfffff] mem PCI: 00:16.0 mem: next_base: dfd00000 size: 100000 align: 20 gran: 20 done PCI: 00:17.0 prefmem: base:df600000 size:500000 align:21 gran:20 limit:dfafffff PCI: 03:00.0 10 * [0xdf600000 - 0xdf7fffff] prefmem PCI: 03:00.1 10 * [0xdf800000 - 0xdf9fffff] prefmem PCI: 03:00.0 20 * [0xdfa00000 - 0xdfa03fff] prefmem PCI: 03:00.1 20 * [0xdfa04000 - 0xdfa07fff] prefmem PCI: 00:17.0 prefmem: next_base: dfa08000 size: 500000 align: 21 gran: 20 done PCI: 00:17.0 mem: base:dfd00000 size:100000 align:20 gran:20 limit:dfdfffff PCI: 03:00.0 30 * [0xdfd00000 - 0xdfd7ffff] mem PCI: 03:00.1 30 * [0xdfd80000 - 0xdfdfffff] mem PCI: 00:17.0 mem: next_base: dfe00000 size: 100000 align: 20 gran: 20 done Root Device assign_resources, bus 0 link: 0 DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io PCI: 00:06.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem PCI: 00:06.0 20 <- [0x00dfb00000 - 0x00dfbfffff] size 0x00100000 gran 0x14 bus 01 mem PCI: 00:06.0 assign_resources, bus 1 link: 0 PCI: 01:00.0 18 <- [0x00dfb00000 - 0x00dfb3ffff] size 0x00040000 gran 0x12 mem64 PCI: 01:00.0 20 <- [0x00dfb40000 - 0x00dfb7ffff] size 0x00040000 gran 0x12 mem64 PCI: 00:06.0 assign_resources, bus 1 link: 0 PCI: 00:12.0 10 <- [0x00dfe16000 - 0x00dfe163ff] size 0x00000400 gran 0x0a mem64 PCI: 00:15.0 10 <- [0x00dfe00000 - 0x00dfe0ffff] size 0x00010000 gran 0x10 mem64 PCI: 00:16.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io PCI: 00:16.0 24 <- [0x00df000000 - 0x00df4fffff] size 0x00500000 gran 0x14 bus 02 prefmem PCI: 00:16.0 20 <- [0x00dfc00000 - 0x00dfcfffff] size 0x00100000 gran 0x14 bus 02 mem PCI: 00:16.0 assign_resources, bus 2 link: 0 PCI: 02:00.0 10 <- [0x00df000000 - 0x00df1fffff] size 0x00200000 gran 0x15 prefmem64 PCI: 02:00.0 20 <- [0x00df400000 - 0x00df403fff] size 0x00004000 gran 0x0e prefmem64 PCI: 02:00.0 30 <- [0x00dfc00000 - 0x00dfc7ffff] size 0x00080000 gran 0x13 romem PCI: 02:00.1 10 <- [0x00df200000 - 0x00df3fffff] size 0x00200000 gran 0x15 prefmem64 PCI: 02:00.1 20 <- [0x00df404000 - 0x00df407fff] size 0x00004000 gran 0x0e prefmem64 PCI: 02:00.1 30 <- [0x00dfc80000 - 0x00dfcfffff] size 0x00080000 gran 0x13 romem PCI: 00:16.0 assign_resources, bus 2 link: 0 PCI: 00:17.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io PCI: 00:17.0 24 <- [0x00df600000 - 0x00dfafffff] size 0x00500000 gran 0x14 bus 03 prefmem PCI: 00:17.0 20 <- [0x00dfd00000 - 0x00dfdfffff] size 0x00100000 gran 0x14 bus 03 mem PCI: 00:17.0 assign_resources, bus 3 link: 0 PCI: 03:00.0 10 <- [0x00df600000 - 0x00df7fffff] size 0x00200000 gran 0x15 prefmem64 PCI: 03:00.0 20 <- [0x00dfa00000 - 0x00dfa03fff] size 0x00004000 gran 0x0e prefmem64 PCI: 03:00.0 30 <- [0x00dfd00000 - 0x00dfd7ffff] size 0x00080000 gran 0x13 romem PCI: 03:00.1 10 <- [0x00df800000 - 0x00df9fffff] size 0x00200000 gran 0x15 prefmem64 PCI: 03:00.1 20 <- [0x00dfa04000 - 0x00dfa07fff] size 0x00004000 gran 0x0e prefmem64 PCI: 03:00.1 30 <- [0x00dfd80000 - 0x00dfdfffff] size 0x00080000 gran 0x13 romem PCI: 00:17.0 assign_resources, bus 3 link: 0 PCI: 00:18.0 10 <- [0x00dfe14000 - 0x00dfe14fff] size 0x00001000 gran 0x0c mem64 PCI: 00:1a.0 10 <- [0x0000001c20 - 0x0000001c27] size 0x00000008 gran 0x03 io PCI: 00:1a.0 14 <- [0x00dfe17000 - 0x00dfe170ff] size 0x00000100 gran 0x08 mem PCI: 00:1a.1 10 <- [0x0000001c28 - 0x0000001c2f] size 0x00000008 gran 0x03 io PCI: 00:1a.1 14 <- [0x00dfe18000 - 0x00dfe180ff] size 0x00000100 gran 0x08 mem PCI: 00:1a.2 10 <- [0x0000001c30 - 0x0000001c37] size 0x00000008 gran 0x03 io PCI: 00:1a.2 14 <- [0x00dfe19000 - 0x00dfe190ff] size 0x00000100 gran 0x08 mem PCI: 00:1f.2 10 <- [0x00dfe10000 - 0x00dfe13fff] size 0x00004000 gran 0x0e mem PCI: 00:1f.4 10 <- [0x00dfe1a000 - 0x00dfe1a0ff] size 0x00000100 gran 0x08 mem64 PCI: 00:1f.4 20 <- [0x0000001c00 - 0x0000001c1f] size 0x00000020 gran 0x05 io PCI: 00:1f.5 10 <- [0x00dfe15000 - 0x00dfe15fff] size 0x00001000 gran 0x0c mem DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Show resources in subtree (Root Device)...After assigning values. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 DOMAIN: 0000 child on link 0 PCI: 00:00.0 DOMAIN: 0000 resource base 1900 size 38 align 5 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base df000000 size e1a100 align 21 gran 0 limit dfffffff flags 40040200 index 100 PCI: 00:00.0 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 60 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 48 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0 PCI: 00:00.0 resource base 100000 size 7fb00000 align 0 gran 0 limit 0 flags e0004200 index 1 PCI: 00:00.0 resource base 7fc00000 size 200000 align 0 gran 0 limit 0 flags f0000200 index 2 PCI: 00:00.0 resource base 7fe00000 size 200000 align 0 gran 0 limit 0 flags f0004200 index 3 PCI: 00:00.0 resource base 100000000 size 180000000 align 0 gran 0 limit 0 flags e0004200 index 4 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 5 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 6 PCI: 00:04.0 PCI: 00:05.0 PCI: 00:06.0 child on link 0 PCI: 01:00.0 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:06.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24 PCI: 00:06.0 resource base dfb00000 size 100000 align 20 gran 20 limit dfbfffff flags 60080202 index 0 PCI: 01:00.0 PCI: 01:00.0 resource base dfb00000 size 40000 align 18 gran 18 limit dfb3ffff flags 60000201 index 8 PCI: 01:00.0 resource base dfb40000 size 40000 align 18 gran 18 limit dfb7ffff flags 60000201 index 0 PCI: 00:09.0 PCI: 00:0e.0 PCI: 00:10.0 PCI: 00:12.0 PCI: 00:12.0 resource base dfe16000 size 400 align 12 gran 10 limit dfe163ff flags 60000201 index 10 PCI: 00:14.0 PCI: 00:15.0 PCI: 00:15.0 resource base dfe00000 size 10000 align 16 gran 16 limit dfe0ffff flags 60000201 index 10 PCI: 00:16.0 child on link 0 PCI: 02:00.0 PCI: 00:16.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:16.0 resource base df000000 size 500000 align 21 gran 20 limit df4fffff flags 60081202 index 4 PCI: 00:16.0 resource base dfc00000 size 100000 align 20 gran 20 limit dfcfffff flags 60080202 index 0 PCI: 02:00.0 PCI: 02:00.0 resource base df000000 size 200000 align 21 gran 21 limit df1fffff flags 60001201 index0 PCI: 02:00.0 resource base df400000 size 4000 align 14 gran 14 limit df403fff flags 60001201 index 20 PCI: 02:00.0 resource base dfc00000 size 80000 align 19 gran 19 limit dfc7ffff flags 60002200 index 0 PCI: 02:00.1 PCI: 02:00.1 resource base df200000 size 200000 align 21 gran 21 limit df3fffff flags 60001201 index0 PCI: 02:00.1 resource base df404000 size 4000 align 14 gran 14 limit df407fff flags 60001201 index 20 PCI: 02:00.1 resource base dfc80000 size 80000 align 19 gran 19 limit dfcfffff flags 60002200 index 0 PCI: 00:17.0 child on link 0 PCI: 03:00.0 PCI: 00:17.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:17.0 resource base df600000 size 500000 align 21 gran 20 limit dfafffff flags 60081202 index 4 PCI: 00:17.0 resource base dfd00000 size 100000 align 20 gran 20 limit dfdfffff flags 60080202 index 0 PCI: 03:00.0 PCI: 03:00.0 resource base df600000 size 200000 align 21 gran 21 limit df7fffff flags 60001201 index0 PCI: 03:00.0 resource base dfa00000 size 4000 align 14 gran 14 limit dfa03fff flags 60001201 index 20 PCI: 03:00.0 resource base dfd00000 size 80000 align 19 gran 19 limit dfd7ffff flags 60002200 index 0 PCI: 03:00.1 PCI: 03:00.1 resource base df800000 size 200000 align 21 gran 21 limit df9fffff flags 60001201 index0 PCI: 03:00.1 resource base dfa04000 size 4000 align 14 gran 14 limit dfa07fff flags 60001201 index 20 PCI: 03:00.1 resource base dfd80000 size 80000 align 19 gran 19 limit dfdfffff flags 60002200 index 0 PCI: 00:18.0 PCI: 00:18.0 resource base dfe14000 size 1000 align 12 gran 12 limit dfe14fff flags 60000201 index 10 PCI: 00:1a.0 PCI: 00:1a.0 resource base 1c20 size 8 align 3 gran 3 limit 1c27 flags 60000100 index 10 PCI: 00:1a.0 resource base dfe17000 size 100 align 12 gran 8 limit dfe170ff flags 60000200 index 14 PCI: 00:1a.1 PCI: 00:1a.1 resource base 1c28 size 8 align 3 gran 3 limit 1c2f flags 60000100 index 10 PCI: 00:1a.1 resource base dfe18000 size 100 align 12 gran 8 limit dfe180ff flags 60000200 index 14 PCI: 00:1a.2 PCI: 00:1a.2 resource base 1c30 size 8 align 3 gran 3 limit 1c37 flags 60000100 index 10 PCI: 00:1a.2 resource base dfe19000 size 100 align 12 gran 8 limit dfe190ff flags 60000200 index 14 PCI: 00:1c.0 PCI: 00:1f.0 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 PCI: 00:1f.0 resource base fd000000 size 1000000 align 0 gran 0 limit 0 flags e0000200 index da PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index db PCI: 00:1f.2 PCI: 00:1f.2 resource base dfe10000 size 4000 align 14 gran 14 limit dfe13fff flags 60000200 index 10 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags c0000200 index aa PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0040100 index ab PCI: 00:1f.4 PCI: 00:1f.4 resource base dfe1a000 size 100 align 12 gran 8 limit dfe1a0ff flags 60000201 index 10 PCI: 00:1f.4 resource base 1c00 size 20 align 5 gran 5 limit 1c1f flags 60000100 index 20 PCI: 00:1f.5 PCI: 00:1f.5 resource base dfe15000 size 1000 align 12 gran 12 limit dfe15fff flags 60000200 index 10 Done allocating resources. BS: BS_DEV_RESOURCES times (us): entry 0 run 2131992 exit 0 Enabling resources... PCI: 00:00.0 subsystem <- 8086/1980 PCI: 00:00.0 cmd <- 07 PCI: 00:04.0 subsystem <- 8086/19a1 PCI: 00:04.0 cmd <- 00 PCI: 00:05.0 subsystem <- 8086/19a2 PCI: 00:05.0 cmd <- 04 PCI: 00:06.0 bridge ctrl <- 0003 PCI: 00:06.0 cmd <- 06 PCI: 00:12.0 subsystem <- 8086/19ac PCI: 00:12.0 cmd <- 06 PCI: 00:15.0 subsystem <- 8086/19d0 PCI: 00:15.0 cmd <- 02 PCI: 00:16.0 bridge ctrl <- 0003 PCI: 00:16.0 cmd <- 06 PCI: 00:17.0 bridge ctrl <- 0003 PCI: 00:17.0 cmd <- 06 PCI: 00:18.0 subsystem <- 8086/19d3 PCI: 00:18.0 cmd <- 06 PCI: 00:1a.0 cmd <- 07 PCI: 00:1a.1 cmd <- 07 PCI: 00:1a.2 cmd <- 07 PCI: 00:1f.0 subsystem <- 8086/19dc PCI: 00:1f.0 cmd <- 107 PCI: 00:1f.2 subsystem <- 8086/19de PCI: 00:1f.2 cmd <- 06 PCI: 00:1f.4 subsystem <- 8086/19df PCI: 00:1f.4 cmd <- 03 PCI: 00:1f.5 subsystem <- 8086/19e0 PCI: 00:1f.5 cmd <- 402 PCI: 01:00.0 cmd <- 02 PCI: 02:00.0 cmd <- 02 PCI: 02:00.1 cmd <- 02 PCI: 03:00.0 cmd <- 02 PCI: 03:00.1 cmd <- 02 done. BS: BS_DEV_ENABLE times (us): entry 152 run 92810 exit 0 Initializing devices... Root Device init ... Root Device init finished in 2056 usecs CPU_CLUSTER: 0 init ... MTRR: Physical address space: 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 0x00000000000c0000 - 0x000000007fc00000 size 0x7fb40000 type 6 0x000000007fc00000 - 0x000000007fe00000 size 0x00200000 type 0 0x000000007fe00000 - 0x0000000080000000 size 0x00200000 type 6 0x0000000080000000 - 0x0000000100000000 size 0x80000000 type 0 0x0000000100000000 - 0x0000000280000000 size 0x180000000 type 6 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() CPU physical address size: 39 bits MTRR: default type WB/UC MTRR counts: 2/12. MTRR: WB selected as default type. MTRR: 0 base 0x000000007fc00000 mask 0x0000007fffe00000 type 0 MTRR: 1 base 0x0000000080000000 mask 0x0000007f80000000 type 0 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Number of Active Cores: 8 of 8 total. Will perform SMM setup. CPU: Intel(R) Atom(TM) CPU C3758 @ 2.20GHz. Loading module at 00030000 with entry 00030000. filesize: 0x130 memsize: 0x130 Processing 16 relocs. Offset value of 0x00030000 Attempting to start 7 APs Waiting for 10ms after sending INIT. Waiting for 1st SIPI to complete...AP: slot 2 apic_id 18. AP: slot 1 apic_id c. AP: slot 4 apic_id 10. AP: slot 6 apic_id 8. done. AP: slot 7 apic_id 14. AP: slot 5 apic_id 4. AP: slot 3 apic_id 1c. Waiting for 2nd SIPI to complete...done. Loading module at 00038000 with entry 00038000. filesize: 0x1b0 memsize: 0x1b0 Processing 12 relocs. Offset value of 0x00038000 SMM Module: stub loaded at 00038000. Will call 7f7993a4(00000000) Installing SMM handler to 0x7fe00000 Loading module at 7fe10000 with entry 7fe10046. filesize: 0x4c8 memsize: 0x44e0 Processing 22 relocs. Offset value of 0x7fe10000 Loading module at 7fe08000 with entry 7fe08000. filesize: 0x1b0 memsize: 0x1b0 Processing 12 relocs. Offset value of 0x7fe08000 SMM Module: placing jmp sequence at 7fe07c00 rel16 0x03fd SMM Module: placing jmp sequence at 7fe07800 rel16 0x07fd SMM Module: placing jmp sequence at 7fe07400 rel16 0x0bfd SMM Module: placing jmp sequence at 7fe07000 rel16 0x0ffd SMM Module: placing jmp sequence at 7fe06c00 rel16 0x13fd SMM Module: placing jmp sequence at 7fe06800 rel16 0x17fd SMM Module: placing jmp sequence at 7fe06400 rel16 0x1bfd SMM Module: stub loaded at 7fe08000. Will call 7fe10046(00000000) Initializing Southbridge SMI... pmbase = 0x1800 SMI_STS: PM1 PM1_STS: WAK TMROF New SMBASE 0x7fe00000 Relocation complete. New SMBASE 0x7fdffc00 Relocation complete. New SMBASE 0x7fdfe800 Relocation complete. New SMBASE 0x7fdff800 Relocation complete. New SMBASE 0x7fdff400 Relocation complete. New SMBASE 0x7fdff000 Relocation complete. New SMBASE 0x7fdfec00 Relocation complete. New SMBASE 0x7fdfe400 Relocation complete. Initializing CPU #0 CPU: vendor Intel device 506f1 CPU: family 06, model 5f, stepping 01 Init Denverton-NS SoC cores. Turbo is unavailable CPU #0 initialized Initializing CPU #6 Initializing CPU #5 Initializing CPU #4 Initializing CPU #3 Initializing CPU #1 Initializing CPU #2 Initializing CPU #7 CPU: vendor Intel device 506f1 CPU: vendor Intel device 506f1 CPU: vendor Intel device 506f1 CPU: family 06, model 5f, stepping 01 CPU: family 06, model 5f, stepping 01 CPU: family 06, model 5f, stepping 01 Init Denverton-NS SoC cores. CPU: vendor Intel device 506f1 CPU: family 06, model 5f, stepping 01 CPU #1 initialized Init Denverton-NS SoC cores. Init Denverton-NS SoC cores. Init Denverton-NS SoC cores. CPU #2 initialized CPU #3 initialized CPU #6 initialized CPU: vendor Intel device 506f1 CPU: family 06, model 5f, stepping 01 CPU: vendor Intel device 506f1 CPU: family 06, model 5f, stepping 01 CPU: vendor Intel device 506f1 CPU: family 06, model 5f, stepping 01 Init Denverton-NS SoC cores. Init Denverton-NS SoC cores. CPU #5 initialized Init Denverton-NS SoC cores. CPU #4 initialized CPU #7 initialized cpu: frequency set to 2200 Enabling SMIs. CPU_CLUSTER: 0 init finished in 423077 usecs PCI: 00:00.0 init ... Set BIOS_RESET_CPL PCI: 00:00.0 init finished in 4225 usecs PCI: 00:04.0 init ... PCI: 00:04.0 init finished in 2141 usecs PCI: 00:05.0 init ... PCI: 00:05.0 init finished in 2141 usecs PCI: 00:12.0 init ... PCI: 00:12.0 init finished in 2143 usecs PCI: 00:15.0 init ... pch: usb_xhci_init PCI: 00:15.0 init finished in 4023 usecs PCI: 00:18.0 init ... PCI: 00:18.0 init finished in 2143 usecs PCI: 00:1a.0 init ... PCI: 00:1a.0 init finished in 2141 usecs PCI: 00:1a.1 init ... PCI: 00:1a.1 init finished in 2141 usecs PCI: 00:1a.2 init ... PCI: 00:1a.2 init finished in 2141 usecs PCI: 00:1f.0 init ... pch: lpc_init IOAPIC: Initializing IOAPIC at 0xfec00000 IOAPIC: Bootstrap Processor Local APIC = 0x00 IOAPIC: ID = 0x01 IOAPIC: Dumping registers reg 0x0000: 0x01000000 reg 0x0001: 0x00170020 reg 0x0002: 0x00000000 PCI: 00:1f.0 init finished in 23230 usecs PCI: 00:1f.2 init ... pch: pmc_init Disabling ACPI via APMC: done. PCI: 00:1f.2 init finished in 6767 usecs PCI: 00:1f.4 init ... PCI: 00:1f.4 init finished in 2141 usecs PCI: 00:1f.5 init ... PCI: 00:1f.5 init finished in 2141 usecs PCI: 01:00.0 init ... PCI: 01:00.0 init finished in 2141 usecs PCI: 02:00.0 init ... PCI: 02:00.0 init finished in 2141 usecs PCI: 02:00.1 init ... PCI: 02:00.1 init finished in 2141 usecs PCI: 03:00.0 init ... PCI: 03:00.0 init finished in 2140 usecs PCI: 03:00.1 init ... PCI: 03:00.1 init finished in 2141 usecs Devices initialized Show all devs... After init. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:04.0: enabled 1 PCI: 00:05.0: enabled 1 PCI: 00:06.0: enabled 1 PCI: 00:09.0: enabled 0 PCI: 00:0e.0: enabled 0 PCI: 00:10.0: enabled 0 PCI: 00:12.0: enabled 1 PCI: 00:14.0: enabled 0 PCI: 00:15.0: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:17.0: enabled 1 PCI: 00:18.0: enabled 1 PCI: 00:1a.0: enabled 1 PCI: 00:1a.1: enabled 1 PCI: 00:1a.2: enabled 1 PCI: 00:1c.0: enabled 0 PCI: 00:1f.0: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.4: enabled 1 PCI: 00:1f.5: enabled 1 PCI: 01:00.0: enabled 1 PCI: 02:00.0: enabled 1 PCI: 02:00.1: enabled 1 PCI: 03:00.0: enabled 1 PCI: 03:00.1: enabled 1 APIC: 0c: enabled 1 APIC: 18: enabled 1 APIC: 1c: enabled 1 APIC: 10: enabled 1 APIC: 04: enabled 1 APIC: 08: enabled 1 APIC: 14: enabled 1 BS: BS_DEV_INIT times (us): entry 0 run 659680 exit 0 Finalize devices... Devices finalized BS: BS_POST_DEVICE times (us): entry 0 run 3767 exit 0 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3 exit 0 CBFS: 'Master Header Locator' located CBFS at [400100:7fffc0) CBFS: Locating 'fallback/dsdt.aml' CBFS: Found @ offset 1a480 size 1f9f CBFS: 'Master Header Locator' located CBFS at [400100:7fffc0) CBFS: Locating 'fallback/slic' CBFS: 'fallback/slic' not found. ACPI: Writing ACPI tables at 7f6f2000. ACPI: * FACS ACPI: * DSDT ACPI: * FADT SCI is IRQ9 ACPI: added table 1/32, length now 40 ACPI: * SSDT Number of Active Cores: 8 of 8 total. ACPI: added table 2/32, length now 44 ACPI: * MCFG ACPI: added table 3/32, length now 48 ACPI: * TCPA TCPA log created at 7f6e2000 ACPI: added table 4/32, length now 52 ACPI: * MADT SCI is IRQ9 ACPI: added table 5/32, length now 56 current = 7f6f4550 ACPI: * HPET ACPI: added table 6/32, length now 60 ACPI: * SSDT2 not generated. current = 7f6f4590 ACPI: done. ACPI tables: 9616 bytes. smbios_write_tables: 7f6e1000 Root Device (Intel Harcuvar CRB) CPU_CLUSTER: 0 (Intel Denverton-NS SOC) APIC: 00 (Intel Denverton-NS SOC) DOMAIN: 0000 (Intel Denverton-NS SOC) PCI: 00:00.0 (Intel Denverton-NS SOC) PCI: 00:04.0 (Intel Denverton-NS SOC) PCI: 00:05.0 (Intel Denverton-NS SOC) PCI: 00:06.0 (Intel Denverton-NS SOC) PCI: 00:09.0 (Intel Denverton-NS SOC) PCI: 00:0e.0 (Intel Denverton-NS SOC) PCI: 00:10.0 (Intel Denverton-NS SOC) PCI: 00:12.0 (Intel Denverton-NS SOC) PCI: 00:14.0 (Intel Denverton-NS SOC) PCI: 00:15.0 (Intel Denverton-NS SOC) PCI: 00:16.0 (Intel Denverton-NS SOC) PCI: 00:17.0 (Intel Denverton-NS SOC) PCI: 00:18.0 (Intel Denverton-NS SOC) PCI: 00:1a.0 (Intel Denverton-NS SOC) PCI: 00:1a.1 (Intel Denverton-NS SOC) PCI: 00:1a.2 (Intel Denverton-NS SOC) PCI: 00:1c.0 (Intel Denverton-NS SOC) PCI: 00:1f.0 (Intel Denverton-NS SOC) PCI: 00:1f.2 (Intel Denverton-NS SOC) PCI: 00:1f.4 (Intel Denverton-NS SOC) PCI: 00:1f.5 (Intel Denverton-NS SOC) PCI: 01:00.0 (unknown) PCI: 02:00.0 (unknown) PCI: 02:00.1 (unknown) PCI: 03:00.0 (unknown) PCI: 03:00.1 (unknown) APIC: 0c (unknown) APIC: 18 (unknown) APIC: 1c (unknown) APIC: 10 (unknown) APIC: 04 (unknown) APIC: 08 (unknown) APIC: 14 (unknown) SMBIOS tables: 359 bytes. Writing table forward entry at 0x00000500 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 206d Writing coreboot table at 0x7f716000 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000a0000-00000000000fffff: RESERVED 3. 0000000000100000-000000007f6e0fff: RAM 4. 000000007f6e1000-000000007fbfffff: CONFIGURATION TABLES 5. 000000007fc00000-000000007fffffff: RESERVED 6. 00000000e0000000-00000000efffffff: RESERVED 7. 00000000fed10000-00000000fed17fff: RESERVED 8. 0000000100000000-000000027fffffff: RAM Board ID: 0x52. Board ID: 82 CBFS: 'Master Header Locator' located CBFS at [400100:7fffc0) Wrote coreboot table at: 7f716000, 0x448 bytes, checksum 763b coreboot table: 1120 bytes. IMD ROOT 0. 7fbff000 00001000 IMD SMALL 1. 7fbfe000 00001000 FSP MEMORY 2. 7f7fe000 00400000 CONSOLE 3. 7f7de000 00020000 TIME STAMP 4. 7f7dd000 00000400 MRC DATA 5. 7f7d5000 000079d0 ROMSTG STCK 6. 7f7d4000 00000400 AFTER CAR 7. 7f7cb000 00009000 57a9e102 8. 7f7c3000 00007d70 RAMSTAGE 9. 7f789000 0003a000 57a9e100 10. 7f750000 000387d0 REFCODE 11. 7f737000 00019000 57a9e101 12. 7f71e000 00019000 COREBOOT 13. 7f716000 00008000 ACPI 14. 7f6f2000 00024000 TCPA LOG 15. 7f6e2000 00010000 SMBIOS 16. 7f6e1000 00000800 IMD small region: IMD ROOT 0. 7fbfec00 00000400 FSP RUNTIME 1. 7fbfebe0 00000004 ROMSTAGE 2. 7fbfebc0 00000004 57a9e002 3. 7fbfeba0 00000018 57a9e000 4. 7fbfeb80 00000018 57a9e001 5. 7fbfeb60 00000018 ACPI GNVS 6. 7fbfea60 00000100 GNVS PTR 7. 7fbfea40 00000004 COREBOOTFWD 8. 7fbfea00 00000028 BS: BS_WRITE_TABLES times (us): entry 0 run 367783 exit 0 CBFS: 'Master Header Locator' located CBFS at [400100:7fffc0) CBFS: Locating 'fallback/payload' CBFS: Found @ offset 1c480 size 11f27 Loading segment from ROM address 0xffc1c5b8 code (compression=1) New segment dstaddr 0xdce80 memsize 0x23180 srcaddr 0xffc1c5f0 filesize 0x11eef Loading segment from ROM address 0xffc1c5d4 Entry Point 0x000fc9f1 Payload being loaded at below 1MiB without region being marked as RAM usable. Loading Segment: addr: 0x00000000000dce80 memsz: 0x0000000000023180 filesz: 0x0000000000011eef lb: [0x000000007f78a000, 0x000000007f7c27d0) Post relocation: addr: 0x00000000000dce80 memsz: 0x0000000000023180 filesz: 0x0000000000011eef using LZMA [ 0x000dce80, 00100000, 0x00100000) <- ffc1c5f0 dest 000dce80, end 00100000, bouncebuffer ffffffff Loaded segments Finalizing SMM. BS: BS_PAYLOAD_LOAD times (us): entry 0 run 119753 exit 23160 Jumping to boot code at 000fc9f1(7f716000) CPU0: stack: 7f7b7000 - 7f7b8000, lowest used address 7f7b7adc, stack used: 1316 bytes