Error: Can't assign node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to any location

Error: Can't assign node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to location PLL_5

Error: Can't assign node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to location counter C4 of PLL_5

Error: Can't assign node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to location CLKCTRL_R26

Error: Can't assign fan-out of node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to the Regional Clock region from (39, 27) to (78, 52)

Error: Can't place node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_postamble:poa|postamble_en_pos_2x[0]" in location or region  "CUSTOM_REGION_X39_Y27_X78_Y52" -- location is not compatible with current location of LAB_X23_Y1 for the node -- location added due to User Location Constraints

Error: Can't assign node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to location CLKCTRL_R24

Error: Can't assign fan-out of node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to the Regional Clock region from (39, 27) to (78, 52)

Error: Can't place node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_postamble:poa|postamble_en_pos_2x[0]" in location or region  "CUSTOM_REGION_X39_Y27_X78_Y52" -- location is not compatible with current location of LAB_X23_Y1 for the node -- location added due to User Location Constraints

Error: Can't assign node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to location CLKCTRL_R30

Error: Can't assign fan-out of node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to the Regional Clock region from (0, 27) to (38, 52)

Error: Can't place node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_postamble:poa|postamble_en_pos_2x[0]" in location or region  "CUSTOM_REGION_X0_Y27_X38_Y52" -- location is not compatible with current location of LAB_X23_Y1 for the node -- location added due to User Location Constraints

Error: Can't assign node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to location CLKCTRL_R28

Error: Can't assign fan-out of node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to the Regional Clock region from (0, 27) to (38, 52)

Error: Can't place node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_postamble:poa|postamble_en_pos_2x[0]" in location or region  "CUSTOM_REGION_X0_Y27_X38_Y52" -- location is not compatible with current location of LAB_X23_Y1 for the node -- location added due to User Location Constraints

Error: Can't use clock type External Clock Output at location CLKCTRL_X41_Y52_N12 for clock control block or source node ...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4 with clock type Auto -- clock types do not match

Error: Can't use clock type External Clock Output at location CLKCTRL_X41_Y52_N11 for clock control block or source node ...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4 with clock type Auto -- clock types do not match

Error: Can't use clock type External Clock Output at location CLKCTRL_X41_Y52_N10 for clock control block or source node ...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4 with clock type Auto -- clock types do not match

Error: Can't use clock type External Clock Output at location CLKCTRL_X41_Y52_N9 for clock control block or source node ...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4 with clock type Auto -- clock types do not match

Error: Can't use clock type External Clock Output at location CLKCTRL_X41_Y52_N8 for clock control block or source node ...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4 with clock type Auto -- clock types do not match

Error: Can't use clock type External Clock Output at location CLKCTRL_X41_Y52_N7 for clock control block or source node ...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4 with clock type Auto -- clock types do not match

Error: Can't assign node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to location CLKCTRL_R26 and CLKCTRL_R30

Error: Can't assign fan-out of node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to the Dual-Regional Clock region from (0, 27) to (78, 52)

Error: Can't place node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_postamble:poa|postamble_en_pos_2x[0]" in location or region  "CUSTOM_REGION_X0_Y27_X78_Y52" -- location is not compatible with current location of LAB_X23_Y1 for the node -- location added due to User Location Constraints

Error: Can't assign node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to location CLKCTRL_R30 and CLKCTRL_R26

Error: Can't assign fan-out of node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to the Dual-Regional Clock region from (0, 27) to (78, 52)

Error: Can't place node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_postamble:poa|postamble_en_pos_2x[0]" in location or region  "CUSTOM_REGION_X0_Y27_X78_Y52" -- location is not compatible with current location of LAB_X23_Y1 for the node -- location added due to User Location Constraints

Error: Can't assign node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to location CLKCTRL_R26 and CLKCTRL_R28

Error: Can't assign fan-out of node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to the Dual-Regional Clock region from (0, 27) to (78, 52)

Error: Can't place node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_postamble:poa|postamble_en_pos_2x[0]" in location or region  "CUSTOM_REGION_X0_Y27_X78_Y52" -- location is not compatible with current location of LAB_X23_Y1 for the node -- location added due to User Location Constraints

Error: Can't assign node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to location CLKCTRL_R28 and CLKCTRL_R26

Error: Can't assign fan-out of node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to the Dual-Regional Clock region from (0, 27) to (78, 52)

Error: Can't place node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_postamble:poa|postamble_en_pos_2x[0]" in location or region  "CUSTOM_REGION_X0_Y27_X78_Y52" -- location is not compatible with current location of LAB_X23_Y1 for the node -- location added due to User Location Constraints

Error: Can't assign node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to location CLKCTRL_R24 and CLKCTRL_R30

Error: Can't assign fan-out of node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to the Dual-Regional Clock region from (0, 27) to (78, 52)

Error: Can't place node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_postamble:poa|postamble_en_pos_2x[0]" in location or region  "CUSTOM_REGION_X0_Y27_X78_Y52" -- location is not compatible with current location of LAB_X23_Y1 for the node -- location added due to User Location Constraints

Error: Can't assign node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to location CLKCTRL_R30 and CLKCTRL_R24

Error: Can't assign fan-out of node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to the Dual-Regional Clock region from (0, 27) to (78, 52)

Error: Can't place node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_postamble:poa|postamble_en_pos_2x[0]" in location or region  "CUSTOM_REGION_X0_Y27_X78_Y52" -- location is not compatible with current location of LAB_X23_Y1 for the node -- location added due to User Location Constraints

Error: Can't assign node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to location CLKCTRL_R24 and CLKCTRL_R28

Error: Can't assign fan-out of node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to the Dual-Regional Clock region from (0, 27) to (78, 52)

Error: Can't place node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_postamble:poa|postamble_en_pos_2x[0]" in location or region  "CUSTOM_REGION_X0_Y27_X78_Y52" -- location is not compatible with current location of LAB_X23_Y1 for the node -- location added due to User Location Constraints

Error: Can't assign node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to location CLKCTRL_R28 and CLKCTRL_R24

Error: Can't assign fan-out of node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_clk_reset:clk|ddr2_phy_alt_mem_phy_pll:pll|altpll:altpll_component|_clk4" to the Dual-Regional Clock region from (0, 27) to (78, 52)

Error: Can't place node "...|ddr2_controller_phy:ddr2_controller_phy_inst|ddr2_phy:ddr2_phy_inst|ddr2_phy_alt_mem_phy:ddr2_phy_alt_mem_phy_inst|ddr2_phy_alt_mem_phy_postamble:poa|postamble_en_pos_2x[0]" in location or region  "CUSTOM_REGION_X0_Y27_X78_Y52" -- location is not compatible with current location of LAB_X23_Y1 for the node -- location added due to User Location Constraints

Warning: Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.

Error: Can't fit design in device