set_global_assignment -name TOP_LEVEL_ENTITY top
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 19.2.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "13:41:06  APRIL 30, 2020"
set_global_assignment -name LAST_QUARTUS_VERSION "19.4.0 Pro Edition"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 100
set_global_assignment -name SEARCH_PATH /home/cpc/boardtestapril30
set_global_assignment -name IP_SEARCH_PATHS /home/cpc/boardtestapril30/**/*
set_global_assignment -name ENABLE_UNUSED_RX_CLOCK_WORKAROUND ON

set_global_assignment -name FAMILY "Stratix 10"
set_global_assignment -name DEVICE 1SG280LN2F43E2VG
set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 2
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF
set_global_assignment -name ENABLE_OCT_DONE OFF
set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
set_global_assignment -name STRATIXV_CONFIGURATION_SCHEME "AVST X16"
set_global_assignment -name CONFIGURATION_VCCIO_LEVEL 1.8V
set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
set_global_assignment -name ENABLE_ED_CRC_CHECK ON
set_global_assignment -name USE_CONF_DONE SDM_IO16
set_global_assignment -name USE_INIT_DONE SDM_IO0
set_global_assignment -name ACTIVE_SERIAL_CLOCK AS_FREQ_100MHZ
set_global_assignment -name DEVICE_INITIALIZATION_CLOCK OSC_CLK_1_125MHZ
set_global_assignment -name MINIMUM_SEU_INTERVAL 0
set_global_assignment -name USE_PWRMGT_SCL SDM_IO14
set_global_assignment -name USE_PWRMGT_SDA SDM_IO11
set_global_assignment -name USE_PWRMGT_ALERT SDM_IO12
set_global_assignment -name VID_OPERATION_MODE "PMBUS SLAVE"
set_global_assignment -name PWRMGT_DEVICE_ADDRESS_IN_PMBUS_SLAVE_MODE 01
set_global_assignment -name GENERATE_PR_RBF_FILE ON
set_global_assignment -name NUM_PARALLEL_PROCESSORS 6
set_global_assignment -name SEED 1

set_instance_assignment -name GLOBAL_SIGNAL GLOBAL_CLOCK -to clk -entity top
set_location_assignment PIN_BB20 -to clk -tag "Interface Planner IO Location Assignment"
set_global_assignment -name SDC_FILE boardtestapril30.sdc
set_global_assignment -name IP_FILE input_rom.ip
set_global_assignment -name IP_FILE output_ram.ip
set_global_assignment -name VHDL_FILE addr_gen.vhd
set_global_assignment -name VHDL_FILE top.vhd
set_global_assignment -name IP_FILE rst_release.ip
set_global_assignment -name MIF_FILE boardtestapril30.mif
set_global_assignment -name IP_FILE ROM_INPUT.ip
set_global_assignment -name IP_FILE INPUT_RAM2.ip