# Reading C:/intelFPGA/17.0/modelsim_ase/tcl/vsim/pref.tcl
# do simFlash_run_msim_rtl_verilog.do
# if {[file exists rtl_work]} {
# 	vdel -lib rtl_work -all
# }
# vlib rtl_work
# vmap work rtl_work
# Model Technology ModelSim - Intel FPGA Edition vmap 10.5b Lib Mapping Utility 2016.10 Oct  5 2016
# vmap work rtl_work 
# Copying C:/intelFPGA/17.0/modelsim_ase/win32aloem/../modelsim.ini to modelsim.ini
# Modifying modelsim.ini
# 
# vlib simFlash
# vmap simFlash simFlash
# Model Technology ModelSim - Intel FPGA Edition vmap 10.5b Lib Mapping Utility 2016.10 Oct  5 2016
# vmap simFlash simFlash 
# Modifying modelsim.ini
# vlog -vlog01compat -work simFlash +incdir+C:/Users/anandr1x/Desktop/testsim/simFlash/synthesis {C:/Users/anandr1x/Desktop/testsim/simFlash/synthesis/simFlash.v}
# Model Technology ModelSim - Intel FPGA Edition vlog 10.5b Compiler 2016.10 Oct  5 2016
# Start time: 16:13:38 on Jan 07,2020
# vlog -reportprogress 300 -vlog01compat -work simFlash "+incdir+C:/Users/anandr1x/Desktop/testsim/simFlash/synthesis" C:/Users/anandr1x/Desktop/testsim/simFlash/synthesis/simFlash.v 
# -- Compiling module simFlash
# 
# Top level modules:
# 	simFlash
# End time: 16:13:39 on Jan 07,2020, Elapsed time: 0:00:01
# Errors: 0, Warnings: 0
# vlog -vlog01compat -work simFlash +incdir+C:/Users/anandr1x/Desktop/testsim/simFlash/synthesis/submodules {C:/Users/anandr1x/Desktop/testsim/simFlash/synthesis/submodules/altera_onchip_flash_util.v}
# Model Technology ModelSim - Intel FPGA Edition vlog 10.5b Compiler 2016.10 Oct  5 2016
# Start time: 16:13:40 on Jan 07,2020
# vlog -reportprogress 300 -vlog01compat -work simFlash "+incdir+C:/Users/anandr1x/Desktop/testsim/simFlash/synthesis/submodules" C:/Users/anandr1x/Desktop/testsim/simFlash/synthesis/submodules/altera_onchip_flash_util.v 
# -- Compiling module altera_onchip_flash_address_range_check
# -- Compiling module altera_onchip_flash_address_write_protection_check
# -- Compiling module altera_onchip_flash_s_address_write_protection_check
# -- Compiling module altera_onchip_flash_a_address_write_protection_check
# -- Compiling module altera_onchip_flash_convert_address
# -- Compiling module altera_onchip_flash_convert_sector
# -- Compiling module altera_onchip_flash_counter
# 
# Top level modules:
# 	altera_onchip_flash_address_range_check
# 	altera_onchip_flash_address_write_protection_check
# 	altera_onchip_flash_s_address_write_protection_check
# 	altera_onchip_flash_a_address_write_protection_check
# 	altera_onchip_flash_convert_address
# 	altera_onchip_flash_convert_sector
# 	altera_onchip_flash_counter
# End time: 16:13:40 on Jan 07,2020, Elapsed time: 0:00:00
# Errors: 0, Warnings: 0
# vlog -vlog01compat -work simFlash +incdir+C:/Users/anandr1x/Desktop/testsim/simFlash/synthesis/submodules {C:/Users/anandr1x/Desktop/testsim/simFlash/synthesis/submodules/altera_onchip_flash.v}
# Model Technology ModelSim - Intel FPGA Edition vlog 10.5b Compiler 2016.10 Oct  5 2016
# Start time: 16:13:40 on Jan 07,2020
# vlog -reportprogress 300 -vlog01compat -work simFlash "+incdir+C:/Users/anandr1x/Desktop/testsim/simFlash/synthesis/submodules" C:/Users/anandr1x/Desktop/testsim/simFlash/synthesis/submodules/altera_onchip_flash.v 
# -- Compiling module altera_onchip_flash
# 
# Top level modules:
# 	altera_onchip_flash
# End time: 16:13:40 on Jan 07,2020, Elapsed time: 0:00:00
# Errors: 0, Warnings: 0
# vlog -vlog01compat -work simFlash +incdir+C:/Users/anandr1x/Desktop/testsim/simFlash/synthesis/submodules {C:/Users/anandr1x/Desktop/testsim/simFlash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v}
# Model Technology ModelSim - Intel FPGA Edition vlog 10.5b Compiler 2016.10 Oct  5 2016
# Start time: 16:13:41 on Jan 07,2020
# vlog -reportprogress 300 -vlog01compat -work simFlash "+incdir+C:/Users/anandr1x/Desktop/testsim/simFlash/synthesis/submodules" C:/Users/anandr1x/Desktop/testsim/simFlash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v 
# -- Compiling module altera_onchip_flash_avmm_data_controller
# 
# Top level modules:
# 	altera_onchip_flash_avmm_data_controller
# End time: 16:13:41 on Jan 07,2020, Elapsed time: 0:00:00
# Errors: 0, Warnings: 0
# vlog -vlog01compat -work simFlash +incdir+C:/Users/anandr1x/Desktop/testsim/simFlash/synthesis/submodules {C:/Users/anandr1x/Desktop/testsim/simFlash/synthesis/submodules/altera_onchip_flash_avmm_csr_controller.v}
# Model Technology ModelSim - Intel FPGA Edition vlog 10.5b Compiler 2016.10 Oct  5 2016
# Start time: 16:13:42 on Jan 07,2020
# vlog -reportprogress 300 -vlog01compat -work simFlash "+incdir+C:/Users/anandr1x/Desktop/testsim/simFlash/synthesis/submodules" C:/Users/anandr1x/Desktop/testsim/simFlash/synthesis/submodules/altera_onchip_flash_avmm_csr_controller.v 
# -- Compiling module altera_onchip_flash_avmm_csr_controller
# 
# Top level modules:
# 	altera_onchip_flash_avmm_csr_controller
# End time: 16:13:42 on Jan 07,2020, Elapsed time: 0:00:00
# Errors: 0, Warnings: 0
#