#include // pci_get_device(), pci_enable_device(), ... #include // spin_lock_xxx(), spin_unlock_xxx() #include // request_irq(), free_irq(), ... #include // udelay() #include // copy_from_user(), copy_to_user() #include // ioreadxx(), iowritexx() #include #include #include // mseep() #include #include #include #define VENDOR_ID 0x1792 //!< RUA Vendor ID #define DEVICE_ID 0x0001 //!< RUA Device ID char modname[] = "msidemo"; struct pci_dev *devp; unsigned int mmio_base; unsigned int mmio_size; void *io; u32 msi_cap[ 4 ]; static irqreturn_t irq_handler(int irq, void *dev_id) { printk(KERN_INFO "(irq_handler): Called\n"); return IRQ_HANDLED; } static int __init msidemo_init(void) { u32 byte; u16 pci_cmd; u32 msi_ctrl, msi_addr, msi_data; int err; printk( "<1>\nInstalling \'%s\' module\n", modname ); // detect the presence of the Pro1000 network controller devp = pci_get_device( VENDOR_ID, DEVICE_ID, NULL ); if ( !devp ) { return -ENODEV; } printk(KERN_DEBUG "ENable DEvice %d \n", pci_enable_device(devp)); // map controller's i/o-memory into kernel's address-space mmio_base = pci_resource_start( devp, 0 ); mmio_size = pci_resource_len( devp, 0 ); io = ioremap_nocache( mmio_base, mmio_size ); if ( !io ) { return -ENOSPC; } pci_read_config_dword(devp,0x08, &byte); printk(KERN_DEBUG " PCI_REVISION_ID(0x08) =%x \n", byte); pci_read_config_dword(devp,0x3c, &byte); printk(KERN_DEBUG " PCI_INTERRUPT_LINE(0x3c) =%x \n", byte); pci_read_config_dword(devp, 0x2c, &byte); printk(KERN_DEBUG " sub_vend_ID(0x2c)=%x \n", byte); pci_read_config_dword(devp, 0x34, &byte); printk(KERN_DEBUG " cap pointer(0x34) =%x \n", byte); printk(KERN_DEBUG "Irq register %x \n", devp->irq); printk(KERN_DEBUG " 0x10640050 %x \n",ioread32(io+0x10640050)); printk(KERN_DEBUG " 0x10640054 %x \n",ioread32(io+0x10640054)); printk(KERN_DEBUG " 0x10640058 %x \n",ioread32(io+0x10640058)); printk(KERN_DEBUG " 0x1064005c %x \n",ioread32(io+0x1064005c)); pci_read_config_dword(devp, 0x50, &msi_cap[0]); printk(KERN_DEBUG " dcap 0x50 = %x \n", msi_cap[0]); pci_read_config_dword(devp, 0x54, &msi_cap[0]); printk(KERN_DEBUG " dcap 0x54 = %x \n", msi_cap[0]); pci_read_config_dword(devp, 0x58, &msi_cap[0]); printk(KERN_DEBUG " dcap 0x58 = %x \n", msi_cap[0]); pci_read_config_dword(devp, 0x5c, &msi_cap[0]); printk(KERN_DEBUG " dcap 0x5c = %x \n", msi_cap[0]); pci_read_config_dword(devp, 0x60, &msi_cap[0]); printk(KERN_DEBUG " dcap 0x60 = %x \n", msi_cap[0]); pci_read_config_dword(devp, 0x64, &msi_cap[0]); printk(KERN_DEBUG " dcap %x \n", msi_cap[0]); pci_read_config_dword(devp, 0x04, &msi_cap[0]); printk(KERN_DEBUG " status 0x04 = %x \n", msi_cap[0]); #if 0 pci_write_config_dword(devp, 0x60, 0xFFFFFFFF); pci_read_config_dword(devp, 0x60, &msi_cap[0]); printk(KERN_DEBUG " dcap 0x60 = %x \n", msi_cap[0]); #endif iowrite32(0x0, io + 0x100000b4); pci_set_master(devp); // pci_write_config_dword(devp, 0x50, 0x000000); // pci_read_config_dword(devp, 0x50, &msi_cap[0]); // printk(KERN_DEBUG " capabile make 0 -> 0x50 %x \n", msi_cap[0]); printk(KERN_DEBUG " pci_find_capability = %x \n", pci_find_capability(devp, PCI_CAP_ID_MSI)); printk(KERN_DEBUG " MSI ENABLE = %d \n", pci_enable_msi_range(devp,1,1)); pci_read_config_dword(devp, 0x50, &msi_cap[0]); printk(KERN_DEBUG "after msi enable(0x50) = %x \n", msi_cap[0]); pci_read_config_dword(devp, 0x04, &msi_cap[0]); printk(KERN_DEBUG "after msi enabled %x \n", msi_cap[0]); iowrite32(0x1, io + 0x100000b4); pci_read_config_dword(devp, 0x54, &msi_cap[0]); printk(KERN_DEBUG " dcap 0x54 = %x \n", msi_cap[0]); pci_read_config_dword(devp, 0x58, &msi_cap[0]); printk(KERN_DEBUG " dcap 0x58 = %x \n", msi_cap[0]); pci_read_config_dword(devp, 0x5c, &msi_cap[0]); printk(KERN_DEBUG " dcap 0x5c = %x \n", msi_cap[0]); iowrite32(0x0, io + 0x100000b4); pci_read_config_dword(devp, 0x54, &msi_cap[0]); printk(KERN_DEBUG " dcap 0x54 = %x \n", msi_cap[0]); pci_read_config_dword(devp, 0x58, &msi_cap[0]); printk(KERN_DEBUG " dcap 0x58 = %x \n", msi_cap[0]); pci_read_config_dword(devp, 0x5c, &msi_cap[0]); printk(KERN_DEBUG " dcap 0x5c = %x \n", msi_cap[0]); printk(KERN_DEBUG "After MSI enabled 0x10640050 %x \n",ioread32(io+0x10640050)); printk(KERN_DEBUG "After MSI enabled 0x10640054 %x \n",ioread32(io+0x10640054)); printk(KERN_DEBUG "After MSI enabled 0x10640058 %x \n",ioread32(io+0x10640058)); printk(KERN_DEBUG "After MSI enabled 0x1064005c %x \n",ioread32(io+0x1064005c)); #if 0 // pci_write_config_dword(devp, 0x100000b4, 0x1); pci_read_config_dword(devp, 0x4, &msi_cap[0]); printk(KERN_DEBUG " command %x \n", msi_cap[0]); msi_cap[0] != (0x1 << 10); printk(KERN_DEBUG " command after set bit 10 %x \n", msi_cap[0]); // pci_write_config_dword(devp, 0x4, msi_cap[0]); printk(KERN_DEBUG " cap id %x \n", pci_find_capability(devp, PCI_CAP_ID_MSI)); #endif err = request_irq(devp->irq, irq_handler,IRQF_SHARED, modname, modname); printk(KERN_DEBUG "Irq register %x %x\n", err, devp->irq); iowrite32(0xF, io + 0x100000b4); iowrite32(0x0, io + 0x100000b4); #if 0 // pci_write_config_dword(devp, 0x100000b4, 0x0); // pci_write_config_dword(devp, 0x100000b4, 0xF); // pci_write_config_dword(devp, 0x100000b4, 0x0); // pci_write_config_dword(devp, 0x100000b4, 0xF); // pci_write_config_dword(devp, 0x100000b4, 0x0); // pci_read_config_dword(devp, 0x100000b4, &msi_cap[0]); // printk(KERN_DEBUG " b4 = %x \n", msi_cap[0]); // pci_read_config_dword(devp, 0x10640050, &msi_cap[0]); // printk(KERN_DEBUG " 1064 %x \n", msi_cap[0]); // pci_write_config_dword(devp, 0x10640050, 0x1); // pci_write_config_dword(devp, 0x100000b4, 0x1); pci_read_config_dword(devp, 0x50, &msi_cap[0]); printk(KERN_DEBUG " dcap-> end %x \n", msi_cap[0]); #endif return 0; //SUCCESS } static void __exit msidemo_exit(void ) { iowrite32(0x0, io + 0x100000b4); free_irq(devp->irq, modname); pci_disable_msi(devp); iounmap( io ); pci_dev_put(devp); printk( "<1>Removing \'%s\' module\n", modname ); } module_init( msidemo_init ); module_exit( msidemo_exit ); //MODULE_LICENSE("GPL");