// Copyright (C) 2018  Intel Corporation. All rights reserved.
// Your use of Intel Corporation's design tools, logic functions 
// and other software and tools, and its AMPP partner logic 
// functions, and any output files from any of the foregoing 
// (including device programming or simulation files), and any 
// associated documentation or information are expressly subject 
// to the terms and conditions of the Intel Program License 
// Subscription Agreement, the Intel Quartus Prime License Agreement,
// the Intel FPGA IP License Agreement, or other applicable license
// agreement, including, without limitation, that your use is for
// the sole purpose of programming logic devices manufactured by
// Intel and sold by Intel or its authorized distributors.  Please
// refer to the applicable agreement for further details.

// VENDOR "Altera"
// PROGRAM "Quartus Prime"
// VERSION "Version 18.1.0 Build 222 09/21/2018 SJ Pro Edition"

// DATE "02/01/2021 18:43:46"

// 
// Device: Altera 1SX280LU2F50E1VG Package FBGA2397
// 

// 
// This greybox netlist file is for third party Synthesis Tools
// for timing and resource estimation only.
// 


module atx1 (
	tx_serial_clk,
	pll_locked,
	reconfig_writedata0,
	reconfig_readdata0,
	reconfig_waitrequest0,
	pll_cal_busy,
	altera_reserved_tdo,
	reconfig_address0,
	reconfig_read0,
	altera_reserved_tck,
	altera_reserved_tdi,
	altera_reserved_tms,
	reconfig_clk0,
	reconfig_reset0,
	reconfig_write0,
	pll_refclk0)/* synthesis synthesis_greybox=1 */;
output 	tx_serial_clk;
output 	pll_locked;
input 	[31:0] reconfig_writedata0;
output 	[31:0] reconfig_readdata0;
output 	reconfig_waitrequest0;
output 	pll_cal_busy;
output 	altera_reserved_tdo;
input 	[10:0] reconfig_address0;
input 	reconfig_read0;
input 	altera_reserved_tck;
input 	altera_reserved_tdi;
input 	altera_reserved_tms;
input 	reconfig_clk0;
input 	reconfig_reset0;
input 	reconfig_write0;
input 	pll_refclk0;

wire gnd;
wire vcc;
wire unknown;

assign gnd = 1'b0;
assign vcc = 1'b1;
// unknown value (1'bx) is not needed for this tool. Default to 1'b0
assign unknown = 1'b0;

wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_BLOCKSELECT ;
wire \xcvr_atx_pll_s10_htile_0|tx_serial_clk ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_CLKLOW_BUF ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~fref_buf ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_LOCK ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL0 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL1 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL2 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL3 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL4 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL5 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL6 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL7 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL8 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL9 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL10 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL11 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL12 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL13 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL14 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL15 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL16 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL17 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL18 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL19 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL20 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL21 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL22 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL23 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL24 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL25 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL26 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL27 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL28 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL29 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL30 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA0 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA1 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA2 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA3 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA4 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA5 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA6 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA7 ;
wire \xcvr_atx_pll_s10_htile_0|clklow ;
wire \xcvr_atx_pll_s10_htile_0|lc_pll_pld_adapt_inst~O_INT_RST_N ;
wire \xcvr_atx_pll_s10_htile_0|lc_pll_pld_adapt_inst~O_LOCK ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMM_CMDFIFO_WR_PFULL ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMM_READDATAVALID ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMBUSY ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_clk[0] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pld_hssi_osc_transfer_en[0] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pld_cal_done[0] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_read[0] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_write[0] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~avmmreaddata ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMREADDATA1 ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMREADDATA2 ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMREADDATA3 ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMREADDATA4 ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMREADDATA5 ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMREADDATA6 ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMREADDATA7 ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[0] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[1] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[2] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[3] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[4] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[5] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[6] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[7] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[8] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[9] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[0] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[1] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[2] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[3] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[4] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[5] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[6] ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[7] ;
wire \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_BLOCKSELECT ;
wire \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~refclk ;
wire \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA0 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA1 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA2 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA3 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA4 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA5 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA6 ;
wire \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA7 ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|core_tdi ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|ext_tdo ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~1_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~2 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~6_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~7 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~11_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~12 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~16_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~17 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~21_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~26_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~27 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~31_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~32 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~36_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~37 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~41_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~42 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~46_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~47 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~51_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~52 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~56_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~57 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~61_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~62 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~66_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~67 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~71_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~72 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~76_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~77 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~81_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~82 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~86_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~87 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~91_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~92 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~96_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~97 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~101_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~102 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~106_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~107 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~111_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~112 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~116_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~117 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~121_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~122 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~126_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~127 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~131_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~132 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~136_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~137 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~141_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~142 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[13]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~1_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~2 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~6_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~11_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~12 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~16_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~17 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~21_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~22 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~26_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~27 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~31_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~32 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~36_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~37 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~41_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~42 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~1_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~1_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~2 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~6_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~7 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~11_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~12 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~16_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~17 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~21_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~22 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~26_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~27 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~31_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~32 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~36_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~37 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~41_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~42 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~46_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~47 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~51_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~52 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~56_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~57 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~61_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~62 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~66_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~71_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~72 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~76_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~77 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~81_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~82 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~86_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~87 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~91_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~92 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[8] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[3] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~1_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~2 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~1_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~2 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~6_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~7 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~6_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~7 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~11_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~12 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~11_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~12 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~16_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~17 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~16_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~17 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~21_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~22 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~21_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~22 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~26_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~26_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~31_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~32 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~31_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~32 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~36_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~37 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~36_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~37 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~41_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~42 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~41_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~42 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~46_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~47 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~46_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~47 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~51_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~52 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~51_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~52 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~56_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~57 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~56_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~57 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~61_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~62 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~61_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~62 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~66_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~67 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~66_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~67 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~71_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~72 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~71_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~72 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~76_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~77 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~76_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~77 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[4] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[5] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[6] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[7] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~146_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~147 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[0] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[1] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[2] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~7_cout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[9] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~1_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~2 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~6_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~11_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~12 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~16_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~17 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~21_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~22 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~26_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~27 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~31_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~32 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~36_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~37 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~12_cout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[0] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[7] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[1] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[2] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[3] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[4] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[5] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[6] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~17_cout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~22_cout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[0] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[1] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[2] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[3] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[4] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[5] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[6] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[7] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~27_cout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[8] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[9] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[1] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[2] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[3] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[4] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[5] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[6] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[7] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~32_cout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[0] ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~37_cout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~42_cout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[14]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[10]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[18]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[17]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[16]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[15]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[13]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[12]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[11]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~1_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~2 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~1_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~2 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~6_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~7 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~6_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~7 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~11_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~12 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~16_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~17 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~21_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~22 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~26_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~27 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~31_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~32 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~36_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~37 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~41_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~42 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~11_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~46_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~16_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~17 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~51_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~52 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~56_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~57 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~21_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~22 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~61_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~62 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~26_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~27 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~66_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~67 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~31_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~32 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~71_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~72 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~36_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~37 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~76_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~77 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~81_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~82 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~41_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~42 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~86_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~87 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~46_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~47 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~91_sumout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~92 ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_82~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~14_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[69]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent|i212~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[71]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent|m0_read~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[38]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[39]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[40]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[41]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[42]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[43]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[44]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[45]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[46]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[47]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[48]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[49]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[10]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[11]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[12]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[13]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[14]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[15]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[16]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[17]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[18]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[19]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[20]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[21]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[22]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[23]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[24]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[25]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[26]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[27]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[28]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[29]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[30]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[31]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[69]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[69]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|read_latency_shift_reg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[1]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[114]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i716~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[71]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[71]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[38]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[38]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[39]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[39]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[40]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[40]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[41]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[41]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[42]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[42]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[43]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[43]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~7_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[44]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[44]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~8_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[45]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[45]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~9_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[46]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[46]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~10_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[47]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[47]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~11_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[48]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[48]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~12_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[49]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[49]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~13_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~14_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~15_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~16_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~17_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~18_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~19_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~20_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~21_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~22_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~23_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[10]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[10]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~24_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[11]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[11]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~25_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[12]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[12]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~26_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[13]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[13]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~27_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[14]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[14]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~28_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[15]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[15]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~29_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[16]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[16]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~30_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[17]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[17]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~31_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[18]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[18]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~32_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[19]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[19]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~33_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[20]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[20]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~34_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[21]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[21]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~35_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[22]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[22]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~36_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[23]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[23]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~37_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[24]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[24]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~38_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[25]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[25]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~39_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[26]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[26]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~40_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[27]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[27]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~41_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[28]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[28]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~42_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[29]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[29]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~43_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[30]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[30]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~44_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[31]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[31]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~45_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i93~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|prev_irsr_sel_reg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_reg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_loopback~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|Mux_0~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[70]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|write~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|waitrequest_reset_override~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|i252~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[0]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[113]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[27]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[28]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[29]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[30]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[31]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[15]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[16]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[17]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[18]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[19]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[20]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[21]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[22]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[23]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[24]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[25]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[26]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_agent|hold_waitrequest~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|last_dest_id[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|has_pending_responses~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|suppress_change_dest_id~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i716~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[71]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[38]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[39]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[40]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[41]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[42]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~7_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[43]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~8_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[44]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~9_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[45]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~10_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[46]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[10]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~11_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[47]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[11]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~12_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[48]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[12]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~13_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[49]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[13]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~14_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~15_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~16_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~17_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~18_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~19_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~20_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~21_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~22_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~23_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~24_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[10]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[10]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~25_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[11]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[11]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~26_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[12]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[12]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~27_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[13]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[13]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~28_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[14]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[14]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~29_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[15]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[15]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~30_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[16]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[16]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~31_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[17]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[17]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~32_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[18]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[18]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~33_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[19]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[19]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~34_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[20]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[20]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~35_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[21]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[21]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~36_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[22]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[22]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~37_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[23]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[23]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~38_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[24]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[24]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~39_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[25]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[25]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~40_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[26]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[26]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~41_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[27]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[27]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~42_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[28]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[28]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~43_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[29]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[29]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~44_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[30]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[30]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~45_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[31]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[31]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~46_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_1~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[12]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[14]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i80~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i26~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i28~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i336~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i347~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i345~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i347~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Decoder_0~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_1~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_18~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_2~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|Select_41~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|i15~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|received_esc~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_all_valid~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_17~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_valid~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[12]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[13]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[14]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[15]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[16]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[17]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[18]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[10]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[11]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|Select_41~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_loopback~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_loopback~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i927~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i202~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i212~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i193~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.WRITE_WAIT~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|in_ready_0~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_valid~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_81~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|waitrequest_reset_override~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_44~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[11]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[12]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[13]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[14]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[15]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[10]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[26]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_43~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_42~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_41~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_40~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR3~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_56~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR2~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_55~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[16]~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_54~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_53~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_52~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_51~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_50~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_49~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_48~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_47~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_46~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_45~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_ASSERT~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_CMD_WAIT~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|full1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_83~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|last_dest_id[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|nonposted_cmd_accepted~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[111]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|response_accepted~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|i408~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|i408~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|i408~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_reset_0|agent_reset~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_69~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[2]~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_68~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_67~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_66~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_65~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_64~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_63~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_62~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_61~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_60~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_59~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_58~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[8]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[16]~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[24]~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i14~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[10]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i47~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i51~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i24~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i36~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i96~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i141~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i32~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_toggle_flopped~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_to_out_synchronizer|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter_source_ready~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i74~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_PADDED~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~7_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_sdr~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_cdr~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i849~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i849~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i849~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_7~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i495~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_6~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~7_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~8_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~9_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~10_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~11_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~12_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~13_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~14_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~15_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|received_esc~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~7_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|decode_header_1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_2~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[5]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[6]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[7]~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[1]~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[2]~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[3]~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[4]~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[12]~7_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[13]~8_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[14]~9_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[15]~10_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[16]~11_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[17]~12_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[18]~13_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[0]~14_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[8]~15_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[9]~16_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[10]~17_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[11]~18_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2_synchronizer|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i927~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[3]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i193~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i781~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i781~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|last_trans~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_1~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_3~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i246~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_EXTRA~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_SIZE1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_SIZE2~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_7~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_65~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i656~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|internal_out_ready~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READY~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i794~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i794~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i794~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|empty~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i716~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i716~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|read_latency_shift_reg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[71]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|i222~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[2]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i774~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i785~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_32~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_26~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[3].u|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[4].u|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_valid~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i33~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[2].u|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i117~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[1].u|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i116~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[0].u|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i115~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i120~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i120~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_25~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_24~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_23~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_22~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_37~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_37~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_36~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_36~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_35~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_34~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_33~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_31~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_30~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_29~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_28~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_27~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i776~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i775~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_DATA_WAIT~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|full1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|i716~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|add_0~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|add_0~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|add_0~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[111]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[111]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|outpipe1|out_valid~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|outpipe1|out_payload[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_reset_0|agent_reset~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i777~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i43~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i9~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i41~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i48~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i19~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i33~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_toggle_flopped~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_to_out_synchronizer|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i429~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i429~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[14]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[10]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[11]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[12]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[13]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor_synchronizer|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i927~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2_synchronizer|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i193~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_39~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i772~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i773~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_valid~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|full~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i33~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i770~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i770~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[3].u|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[4].u|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[2].u|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i108~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|add_3~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[1].u|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i107~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[0].u|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i106~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|reduce_nor_0~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|reduce_nor_0~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|read_latency_shift_reg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[1]~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[71]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[3].u|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[4].u|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[2].u|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[1].u|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[0].u|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[14]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i784~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i784~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[0][112]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem[0][112]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|inpipe|out_valid~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|inpipe|out_payload[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|rhs1_valid~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|inpipe|out_payload[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|outpipe1|out_payload[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i5~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i6~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_to_out_synchronizer|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~7_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_toggle~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_valid~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|take_in_data~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~7_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~8_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~7_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~9_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~10_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~11_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_1~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~7_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor_synchronizer|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2_synchronizer|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~7_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_valid~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[10]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i12~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[3].u|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[4].u|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[2].u|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i117~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[1].u|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i116~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[0].u|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i115~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i120~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i120~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i13~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[3].u|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[4].u|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[2].u|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[1].u|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[0].u|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[3].u|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[4].u|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[2].u|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[1].u|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[0].u|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_57~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[1][112]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[0][112]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem[1][112]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|i288~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem[0][112]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_valid~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_channel_adap|out_valid~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_channel_adap|out_valid~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_data~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i919~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_ready~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_toggle~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_valid~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor_synchronizer|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_varchannel~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_valid~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_valid~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_esc~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|reduce_nor_0~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i94~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_valid~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h_channel_adap|out_valid~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_sop~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i395~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|need_esc~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i398~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_valid~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|full~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_channel[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[10]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_channel[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_esc~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i392~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|in_ready~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i12~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i13~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[3].u|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[4].u|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[2].u|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[1].u|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[0].u|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_endofpacket~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[3].u|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[4].u|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[2].u|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[1].u|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[0].u|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|data_out[5]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[2][112]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|i634~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[1][112]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_prev~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[7]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1275~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~8_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~9_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i45~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_1~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|empty~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i81~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i81~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i140~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_startofpacket~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i50~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[5]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i72~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i39~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_valid~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_ready~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|reduce_nor_3~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_esc~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i12~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_valid~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|packet_in_progress~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_valid~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|i36~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i12~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i392~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_sop~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i13~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i47~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|LessThan_0~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i247~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_esc~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~7_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~8_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[3].u|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[4].u|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[2].u|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[1].u|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[0].u|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i75~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i75~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i152~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i151~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i150~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|add_3~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~7_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i247~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i110~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~7_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~8_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i74~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i74~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|empty~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i81~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|reduce_nor_0~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|reduce_nor_0~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i140~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_valid~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|full~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|write~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|empty~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|internal_out_ready~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i13~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i250~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|LessThan_0~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[4]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[3]~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[2]~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[0]~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i129~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i128~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i127~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|add_2~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[10]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~7_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~8_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~9_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[7]~10_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[7]~11_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~9_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[13]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[7]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~7_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i110~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|edge_detector_register~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|i9~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i101~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_full~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_full~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_full~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[3].u|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[4].u|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[2].u|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[1].u|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[0].u|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_endofpacket~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_startofpacket~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i152~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i151~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i150~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|add_3~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~10_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[0]~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_udr~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~8_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_valid~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|received_esc~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|reduce_nor_0~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_valid~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_data[5]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[3].u|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[4].u|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[2].u|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[1].u|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[0].u|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|first_trans~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_72~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_72~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[17]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_74~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[18]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[10]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[19]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[11]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~7_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~8_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[20]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[12]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~9_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~10_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~11_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[21]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[13]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~12_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~13_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~14_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[22]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[14]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~15_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~16_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~17_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[15]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[23]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Mux_52~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~18_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~19_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~20_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~21_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[9]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_valid~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|received_esc~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[3].u|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[4].u|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[2].u|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[1].u|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[0].u|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_38~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[25]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[17]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[10]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[26]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[18]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[11]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[27]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[19]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i194~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[12]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[28]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[20]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[13]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[29]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[21]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[14]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[30]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[22]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[9]~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[15]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[23]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[31]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[16]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~22_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~23_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~24_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i483~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i483~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i483~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i199~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[25]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i215~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[17]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i207~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[10]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i200~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[26]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i216~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[18]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i208~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[3]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[11]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i201~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[27]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i217~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[19]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i209~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[4]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[12]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i202~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[28]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i218~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[20]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i210~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[5]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[13]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i203~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[29]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i219~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[21]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i211~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[6]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[14]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i204~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[30]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i220~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[22]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i212~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[7]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[15]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i205~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[23]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i213~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[31]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i221~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[24]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[16]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|decode_header_2~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[18]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~7_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~8_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~9_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~10_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~11_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~12_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~13_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~14_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~15_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~16_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~17_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~18_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~19_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i129~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i128~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i127~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|add_2~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_read_1t~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[2]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[9]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[25]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[17]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[10]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[26]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[18]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[11]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[27]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[19]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[12]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[28]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[20]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[13]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[29]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[21]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[14]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[30]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[22]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[15]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[23]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[31]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i198~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[24]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i214~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[16]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i206~combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[1]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i453~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i453~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent|m0_read~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[40]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[38]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[39]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[8]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[24]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[16]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[0]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[40]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[38]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[39]~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1214~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|din_s1~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_valid_buffer~q ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~12_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~13_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~8_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~7_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~5_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~6_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~8_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~2_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~3_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~4_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~1_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|din_s1~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_channel[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~0_combout ;
wire \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[0]~q ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[0]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i48~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[21]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i54~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[1]~q ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[1]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[2]~q ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[2]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~2_combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[3]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~3_combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[4]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~4_combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[5]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~5_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[6]~q ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[6]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~6_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[7]~q ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[7]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~7_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_valid~q ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_read_r~q ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdatavalid_wait~q ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_waitrequest_cmdfifo_pfull~q ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_waitrequest_busy~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_12~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reconfig_read~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i14~combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|strm_waitrequest[0]~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|strm_waitrequest[0]~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_ctrl_reg.r_pll_reset~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_ctrl_reg.r_pll_reset_override~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|csr_pll_powerdown~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|user_read_write[0]~combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reconfig_write~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|jtag_read_write[0]~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[0].sync_r[2]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_9~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.debug_read[0]~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_8~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[24]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_10~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_7~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[20]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_6~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[17]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_3~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[19]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_5~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[16]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_2~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[18]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_4~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|busy~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~2_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~3_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[0]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i109~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~4_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~5_combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~2_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~2_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~3_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[2]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[1]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~6_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.r_avmm_busy~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~7_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_bcast_en~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~8_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_load~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~9_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i14~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_waitrequest~combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdatavalid_r~q ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i10~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i20~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[2]~q ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[0]~q ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[1]~q ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i39~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|uc_decode~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i9~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_0~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~2_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[8]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[0]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[0]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~3_combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i54~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_READ~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~2_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[14]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[15]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.ROM_READ~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|rom_read~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|rom_read_r~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[9]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[10]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[11]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[12]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[13]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_3~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_3~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|g_avmm2_block_sig.soft_read_block_int~q ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i78~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~2_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[1]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[1]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~3_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~4_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[2]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[2]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_15~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_15~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[3]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[3]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_16~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_16~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[4]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[4]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_17~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_17~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[5]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[5]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_18~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_18~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[6]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[7]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[7]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_20~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_20~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i81~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i81~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_WRITE~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~3_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~2_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~3_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~4_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~2_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[0].sync_r[1]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~3_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~4_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~5_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~6_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~7_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~8_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~9_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~10_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~11_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~12_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~13_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~14_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~15_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~16_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~17_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~18_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~19_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_load~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.IDLE~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i195~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[0]~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[1]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_1~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|add_0~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|add_0~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~2_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|i7~combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~3_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~4_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[1]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[1]~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~2_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_bcast_en~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.rcfg_emb_strm_cfg_load_lock~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i120~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i120~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[2]~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[0]~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[1]~2_combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i55~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~20_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~21_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~22_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~23_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~24_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~25_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~26_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~27_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~28_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i200~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.IDLE~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~7_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~29_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~30_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~31_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~32_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~33_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~34_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~35_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~36_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~37_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~38_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~39_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_0~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~8_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_0~2_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~40_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~41_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~42_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~43_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~44_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~45_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~46_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~47_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~48_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~49_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~50_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~51_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~52_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~53_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~54_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~55_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~56_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~57_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~58_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~59_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~60_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~61_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~62_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~63_combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i80~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~64_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~65_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~66_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~67_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~68_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~69_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~70_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~71_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~72_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~73_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~74_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~75_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~76_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~77_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~78_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~79_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~80_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~81_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~82_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~83_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~84_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~85_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~86_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~87_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~88_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~89_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i200~1_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~9_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[0].sync_r[0]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~10_combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[0]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[0]~q ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.rcfg_emb_strm_cfg_load_lock~0_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~10_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~90_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~91_combout ;
wire \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[0]~0_combout ;
wire \~GND~combout ;
wire \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pld_cal_done[0]~_wirecell_combout ;

wire [7:0] \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_AVMMREADDATA_bus ;
wire [30:0] \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus ;
wire [7:0] \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_WRITEDATACHNL_bus ;
wire [9:0] \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_REGADDRCHNL_bus ;
wire [7:0] \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_AVMMREADDATA_bus ;
wire [7:0] \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst_AVMMREADDATA_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7_PORTBDATAOUT_bus ;
wire [143:0] \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0_PORTBDATAOUT_bus ;

assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA0  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_AVMMREADDATA_bus [0];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA1  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_AVMMREADDATA_bus [1];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA2  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_AVMMREADDATA_bus [2];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA3  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_AVMMREADDATA_bus [3];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA4  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_AVMMREADDATA_bus [4];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA5  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_AVMMREADDATA_bus [5];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA6  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_AVMMREADDATA_bus [6];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA7  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_AVMMREADDATA_bus [7];

assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL0  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [0];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL1  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [1];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL2  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [2];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL3  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [3];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL4  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [4];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL5  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [5];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL6  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [6];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL7  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [7];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL8  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [8];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL9  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [9];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL10  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [10];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL11  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [11];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL12  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [12];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL13  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [13];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL14  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [14];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL15  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [15];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL16  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [16];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL17  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [17];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL18  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [18];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL19  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [19];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL20  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [20];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL21  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [21];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL22  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [22];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL23  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [23];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL24  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [24];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL25  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [25];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL26  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [26];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL27  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [27];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL28  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [28];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL29  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [29];
assign \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_ATBSEL30  = \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus [30];

assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[0]  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_WRITEDATACHNL_bus [0];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[1]  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_WRITEDATACHNL_bus [1];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[2]  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_WRITEDATACHNL_bus [2];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[3]  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_WRITEDATACHNL_bus [3];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[4]  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_WRITEDATACHNL_bus [4];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[5]  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_WRITEDATACHNL_bus [5];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[6]  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_WRITEDATACHNL_bus [6];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[7]  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_WRITEDATACHNL_bus [7];

assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[0]  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_REGADDRCHNL_bus [0];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[1]  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_REGADDRCHNL_bus [1];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[2]  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_REGADDRCHNL_bus [2];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[3]  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_REGADDRCHNL_bus [3];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[4]  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_REGADDRCHNL_bus [4];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[5]  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_REGADDRCHNL_bus [5];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[6]  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_REGADDRCHNL_bus [6];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[7]  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_REGADDRCHNL_bus [7];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[8]  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_REGADDRCHNL_bus [8];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[9]  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_REGADDRCHNL_bus [9];

assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~avmmreaddata  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_AVMMREADDATA_bus [0];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMREADDATA1  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_AVMMREADDATA_bus [1];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMREADDATA2  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_AVMMREADDATA_bus [2];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMREADDATA3  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_AVMMREADDATA_bus [3];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMREADDATA4  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_AVMMREADDATA_bus [4];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMREADDATA5  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_AVMMREADDATA_bus [5];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMREADDATA6  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_AVMMREADDATA_bus [6];
assign \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMREADDATA7  = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_AVMMREADDATA_bus [7];

assign \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA0  = \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst_AVMMREADDATA_bus [0];
assign \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA1  = \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst_AVMMREADDATA_bus [1];
assign \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA2  = \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst_AVMMREADDATA_bus [2];
assign \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA3  = \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst_AVMMREADDATA_bus [3];
assign \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA4  = \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst_AVMMREADDATA_bus [4];
assign \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA5  = \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst_AVMMREADDATA_bus [5];
assign \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA6  = \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst_AVMMREADDATA_bus [6];
assign \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA7  = \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst_AVMMREADDATA_bus [7];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[8]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[3]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[4]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[5]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[6]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[7]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[0]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[1]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[2]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[9]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[0]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[7]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[1]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[2]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[3]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[4]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[5]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[6]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[0]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[1]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[2]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[3]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[4]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[5]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[6]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[7]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[8]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[9]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[1]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[2]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[3]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[4]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[5]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[6]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[7]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7_PORTBDATAOUT_bus [0];

assign \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[0]  = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0_PORTBDATAOUT_bus [0];

ct1_hssi_cr2_pma_lc_pll \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst (
	.avmmclk(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_clk[0] ),
	.avmmread(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_read[0] ),
	.avmmwrite(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_write[0] ),
	.core_clk(),
	.lc_input_clk0_left(gnd),
	.lc_input_clk0_right(gnd),
	.lc_input_clk180_left(gnd),
	.lc_input_clk180_right(gnd),
	.lf_rst_n(vcc),
	.ppm_lckdtct(gnd),
	.refclk(\xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~refclk ),
	.rst_n(\xcvr_atx_pll_s10_htile_0|lc_pll_pld_adapt_inst~O_INT_RST_N ),
	.avmmaddress({\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[9] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[8] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[7] ,
\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[6] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[5] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[4] ,
\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[3] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[2] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[1] ,
\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[0] }),
	.avmmwritedata({\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[7] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[6] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[5] ,
\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[4] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[3] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[2] ,
\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[1] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[0] }),
	.iqtxrxclk({gnd,gnd,gnd,gnd,gnd,gnd}),
	.blockselect(\xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_BLOCKSELECT ),
	.clk0_16g(),
	.clk0_16g_left(),
	.clk0_16g_right(),
	.clk0_8g(\xcvr_atx_pll_s10_htile_0|tx_serial_clk ),
	.clk180_16g(),
	.clk180_16g_left(),
	.clk180_16g_right(),
	.clk180_8g(),
	.clklow_buf(\xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_CLKLOW_BUF ),
	.fbclkid_fpll(),
	.fref_buf(\xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~fref_buf ),
	.hclk_out(),
	.iqtxrxclk_out(),
	.lc_to_fpll_refclk(),
	.lock(\xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_LOCK ),
	.overrange(),
	.refclkid_fpll(),
	.underrange(),
	.atbsel(\xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_ATBSEL_bus ),
	.avmmreaddata(\xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst_AVMMREADDATA_bus ),
	.m_cnt_int());
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .analog_mode = "user_custom";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .bandwidth_range_high = 36'b000000000000000000000000000000000001;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .bandwidth_range_low = 36'b000000000000000000000000000000000001;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .bcm_silicon_rev = "rev_off";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .bonding = "cpri_bonding";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .bw_mode = "high_bw";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .cal_status = "cal_done";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .calibration_mode = "cal_off";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .cascadeclk_test = "cascadetest_off";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .cgb_div = 4'b0001;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .chgpmp_compensation = "cp_mode_enable";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .chgpmp_current_setting = "cp_current_setting34";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .chgpmp_testmode = "cp_normal";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .clk_high_perf_voltage = 12'b000000000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .clk_low_power_voltage = 12'b000000000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .clk_mid_power_voltage = 12'b000000000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .clk_vreg_boost_expected_voltage = 12'b000000000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .clk_vreg_boost_scratch = 3'b000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .clk_vreg_boost_step_size = 5'b00000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .cp_current_boost = "normal_setting";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .datarate_bps = 36'b001001100110101011000100001100100000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .device_variant = "device_off";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .direct_fb = "direct_fb";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .dsm_fractional_division = 32'b00000000000000000000000000000001;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .dsm_mode = "dsm_mode_integer";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .enable_hclk = "false";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .expected_lc_boost_voltage = 12'b000000000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .f_max_lcnt_fpll_cascading = 36'b000001000111100001101000110000000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .f_max_pfd = 36'b000000101111101011110000100000000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .f_max_pfd_fractional = 36'b000000000000000000000000000000000001;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .f_max_ref = 36'b000000101111101011110000100000000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .f_max_tank_0 = 36'b001000001100100001010101100000000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .f_max_tank_1 = 36'b001010100111011111100011001000000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .f_max_tank_2 = 36'b001101011010010011101001000000000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .f_max_vco = 36'b001101011010010011101001000000000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .f_max_vco_fractional = 36'b000000000000000000000000000000000001;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .f_max_x1 = 36'b001000000110100011110111011100000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .f_min_pfd = 36'b000000000011101010011000000000000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .f_min_ref = 36'b000000000011101010011000000000000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .f_min_tank_0 = 36'b000110000011011011100010000100000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .f_min_tank_1 = 36'b001000001100100001010101100000000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .f_min_tank_2 = 36'b001010100111011111100011001000000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .f_min_vco = 36'b000110101101001001110100100000000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .fpll_refclk_selection = "select_vco_output";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .hclk_en = "hclk_disabled";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .initial_settings = "true";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .iqclk_sel = "iqtxrxclk0";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .is_cascaded_pll = "false";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .is_otn = "false";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .is_sdi = "false";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .l_counter = 5'b00010;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lc_cal_reserved = "lc_cal_reserved_off";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lc_cal_status = "lc_status_notdone";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lc_calibration = "lc_cal_off";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lc_dyn_reconfig = "lc_dyn_reconfig_off";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lc_reg_calibration = "lc_uccal_reg_off";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lc_reg_status = "lc_reg_status_notdone";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lc_sel_tank = "lctank1";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lc_tank_band = "lc_band4";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lc_tank_voltage_coarse = "vreg_setting_coarse0";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lc_tank_voltage_fine = "vreg_setting5";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lc_to_fpll_l_counter = "lcounter_setting0";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lc_to_fpll_l_counter_scratch = 5'b00000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lc_vreg1_boost = "lc_vreg1_no_voltage_boost";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lc_vreg1_boost_expected_voltage = 12'b000000000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lc_vreg1_boost_scratch = 3'b000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lc_vreg_boost = "lc_vreg_no_voltage_boost";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lc_vreg_boost_expected_voltage = 12'b000000000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lc_vreg_boost_scratch = 3'b000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lccmu_mode = "lccmu_normal";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lcnt_bypass = "lcnt_no_bypass";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lcnt_divide = 2;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lcnt_off = "lcnt_on";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lcpll_gt_in_sel = "lc_gt_in_sel0";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lcpll_gt_out_left_enb = "lcpll_gt_out_left_dis";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lcpll_gt_out_mid_enb = "lcpll_gt_out_mid_dis";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lcpll_gt_out_right_enb = "lcpll_gt_out_right_dis";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lcpll_lckdet_sel = "lc_lckdet_sel0";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lf_3rd_pole_freq = "lf_3rd_pole_setting0";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lf_cbig_size = "lf_cbig_setting4";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lf_order = "lf_2nd_order";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lf_resistance = "lf_setting2";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .lf_ripplecap = "lf_no_ripple";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .max_fractional_percentage = 7'b1100100;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .mcgb_vreg_boost_expected_voltage = 12'b000000000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .mcgb_vreg_boost_scratch = 3'b000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .mcgb_vreg_boost_step_size = 5'b00000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .mcnt_divide = 8'b00100001;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .min_fractional_percentage = 7'b0000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .n_counter = 4'b0001;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .out_freq = 36'b000100110011010101100010000110010000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .output_regulator_supply = "vreg1v_setting0";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .overrange_voltage = "over_setting0";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .pfd_delay_compensation = "normal_delay";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .pfd_pulse_width = "pulse_width_setting0";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .pll_dsm_out_sel = "pll_dsm_disable";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .pll_ecn_bypass = "pll_ecn_bypass_disable";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .pll_ecn_test_en = "pll_ecn_test_disable";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .pll_fractional_value_ready = "pll_k_ready";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .pm_dprio_lc_dprio_status_select = "dprio_normal_status";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .pma_width = 7'b1000000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .power_mode = "high_perf";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .power_rail_et = 12'b010001100000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .powerdown_mode = "powerup_off";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .powermode_ac_lc = "lc_ac_off";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .powermode_ac_lc_gtpath = "lc_gt_ac_off";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .powermode_dc_lc = "powerdown_lc";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .powermode_dc_lc_gtpath = "powerdown_lc_gt";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .primary_use = "hssi_x1";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .prot_mode = "basic_tx";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .ref_clk_div = 1;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .reference_clock_frequency = 36'b000000001001010100000010111110010000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .regulator_bypass = "reg_enable";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .side = "side_unknown";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .silicon_rev = "14nm5bcr2b";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .speed_grade = "speed_off";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .sup_mode = "user_mode";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .top_or_bottom = "tb_unknown";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .underrange_voltage = "under_setting4";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .vccdreg_clk = "vreg_clk5";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .vccdreg_fb = "vreg_fb31";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .vccdreg_fw = "vreg_fw5";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .vco_freq = 36'b001001100110101011000100001100100000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .vreg1_boost_step_size = 5'b00000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .vreg_boost_step_size = 5'b00000;
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .xatb_lccmu_atb = "atb_selectdisable";
defparam \xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst .xd2a_lc_d2a_voltage = "d2a_setting_4";

ct1_atx_pll_pld_adapt \xcvr_atx_pll_s10_htile_0|lc_pll_pld_adapt_inst (
	.avmmclk(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_clk[0] ),
	.int_clklow_buf(\xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_CLKLOW_BUF ),
	.int_fref_buf(\xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~fref_buf ),
	.int_lock(\xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_LOCK ),
	.lf_rst_n(vcc),
	.rst_n(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|csr_pll_powerdown~0_combout ),
	.clklow_buf(\xcvr_atx_pll_s10_htile_0|clklow ),
	.fref_buf(),
	.int_lf_rst_n(),
	.int_rst_n(\xcvr_atx_pll_s10_htile_0|lc_pll_pld_adapt_inst~O_INT_RST_N ),
	.lock(\xcvr_atx_pll_s10_htile_0|lc_pll_pld_adapt_inst~O_LOCK ));
defparam \xcvr_atx_pll_s10_htile_0|lc_pll_pld_adapt_inst .silicon_rev = "14nm5";

ct1_hssi_avmm2_if \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst (
	.avmmclk(reconfig_clk0),
	.avmmread(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i78~0_combout ),
	.avmmrequest(vcc),
	.avmmwrite(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~1_combout ),
	.ehip_usr_rdatavld(),
	.ehip_usr_wrdone(),
	.hip_avmm_read(gnd),
	.hip_avmm_write(gnd),
	.avmmaddress({\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_10~0_combout ,\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_9~0_combout ,
\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_8~0_combout ,\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_7~0_combout ,
\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_6~0_combout ,\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_5~0_combout ,
\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_4~0_combout ,\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_3~0_combout ,
\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_2~0_combout }),
	.avmmreservedin(),
	.avmmwritedata({\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_20~1_combout ,\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~1_combout ,
\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_18~1_combout ,\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_17~1_combout ,
\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_16~1_combout ,\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_15~1_combout ,
\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~4_combout ,\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~2_combout }),
	.blockselect({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
\xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_BLOCKSELECT ,\xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_BLOCKSELECT }),
	.ehip_usr_rdata(),
	.hip_aib_avmm_out({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd}),
	.hip_avmm_reg_addr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd}),
	.hip_avmm_writedata({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd}),
	.readdatachnl({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA7 ,
\xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA6 ,\xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA5 ,\xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA4 ,
\xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA3 ,\xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA2 ,\xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA1 ,
\xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_AVMMREADDATA0 ,\xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA7 ,\xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA6 ,
\xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA5 ,\xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA4 ,\xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA3 ,\xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA2 ,
\xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA1 ,\xcvr_atx_pll_s10_htile_0|ct1_atx_pll_inst~O_AVMMREADDATA0 }),
	.avmm_cmdfifo_wr_full(),
	.avmm_cmdfifo_wr_pfull(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMM_CMDFIFO_WR_PFULL ),
	.avmm_readdatavalid(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMM_READDATAVALID ),
	.avmmbusy(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMBUSY ),
	.clkchnl(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_clk[0] ),
	.ehip_usr_clk(),
	.ehip_usr_read(),
	.ehip_usr_write(),
	.hip_aib_avmm_clk(),
	.hip_avmm_readdatavalid(),
	.hip_avmm_writedone(),
	.hipcaldone(),
	.pld_hssi_osc_transfer_en(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pld_hssi_osc_transfer_en[0] ),
	.pldcaldone(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pld_cal_done[0] ),
	.readchnl(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_read[0] ),
	.writechnl(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_write[0] ),
	.avmmreaddata(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_AVMMREADDATA_bus ),
	.avmmreservedout(),
	.ct3_regaddrchnl(),
	.ehip_usr_addr(),
	.ehip_usr_wdata(),
	.hip_aib_avmm_in(),
	.hip_avmm_readdata(),
	.hip_avmm_reserved_out(),
	.regaddrchnl(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_REGADDRCHNL_bus ),
	.writedatachnl(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst_WRITEDATACHNL_bus ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst .calibration_type = "one_time";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst .func_mode = "c3adpt_pmadir";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst .hssiadapt_avmm_clk_dcg_en = "disable";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst .hssiadapt_avmm_clk_scg_en = "disable";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst .hssiadapt_avmm_osc_clock_setting = "osc_clk_div_by1";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst .hssiadapt_avmm_testbus_sel = "avmm1_transfer_testbus";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst .hssiadapt_hip_mode = "disable_hip";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst .hssiadapt_osc_clk_scg_en = "disable";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst .pcs_arbiter_ctrl = "avmm2_arbiter_uc_sel";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst .pcs_cal_done = "avmm2_cal_done_deassert";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst .pcs_cal_reserved = 5'b00000;
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst .pcs_calibration_feature_en = "avmm2_pcs_calibration_en";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst .pcs_hip_cal_en = "disable";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst .pldadapt_avmm_clk_scg_en = "disable";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst .pldadapt_avmm_osc_clock_setting = "osc_clk_div_by1";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst .pldadapt_avmm_testbus_sel = "avmm1_transfer_testbus";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst .pldadapt_gate_dis = "disable";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst .pldadapt_hip_mode = "disable_hip";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst .pldadapt_osc_clk_scg_en = "disable";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst .silicon_rev = "14nm5bcr2b";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst .topology = "disabled_block";

ct1_hssi_cr2_pma_lc_refclk_select_mux \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst (
	.avmmclk(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_clk[0] ),
	.avmmread(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_read[0] ),
	.avmmwrite(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_write[0] ),
	.core_refclk(gnd),
	.lvpecl_in(gnd),
	.avmmaddress({\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[9] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[8] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[7] ,
\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[6] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[5] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[4] ,
\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[3] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[2] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[1] ,
\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_address[0] }),
	.avmmwritedata({\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[7] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[6] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[5] ,
\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[4] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[3] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[2] ,
\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[1] ,\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pll_avmm_writedata[0] }),
	.iqtxrxclk({gnd,gnd,gnd,gnd,gnd,gnd}),
	.ref_iqclk({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,pll_refclk0}),
	.blockselect(\xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~O_BLOCKSELECT ),
	.refclk(\xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst~refclk ),
	.avmmreaddata(\xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst_AVMMREADDATA_bus ));
defparam \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst .inclk0_logical_to_physical_mapping = "ref_iqclk0";
defparam \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst .inclk1_logical_to_physical_mapping = "power_down";
defparam \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst .inclk2_logical_to_physical_mapping = "power_down";
defparam \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst .inclk3_logical_to_physical_mapping = "power_down";
defparam \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst .inclk4_logical_to_physical_mapping = "power_down";
defparam \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst .lc_iq_scratch0_src = "scratch0_power_down";
defparam \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst .lc_iq_scratch1_src = "scratch1_power_down";
defparam \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst .lc_iq_scratch2_src = "scratch2_power_down";
defparam \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst .lc_iq_scratch3_src = "scratch3_power_down";
defparam \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst .lc_iq_scratch4_src = "scratch4_power_down";
defparam \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst .lc_scratch0_src = "scratch0_src_lvpecl";
defparam \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst .lc_scratch1_src = "scratch1_src_lvpecl";
defparam \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst .lc_scratch2_src = "scratch2_src_lvpecl";
defparam \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst .lc_scratch3_src = "scratch3_src_lvpecl";
defparam \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst .lc_scratch4_src = "scratch4_src_lvpecl";
defparam \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst .powerdown_mode = "powerup";
defparam \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst .refclk_select = "ref_iqclk0";
defparam \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst .silicon_rev = "14nm5bcr2b";
defparam \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst .xmux_refclk_src = "src_iqclk";
defparam \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst .xpll_lccmu_mode = "lccmu_normal";
defparam \xcvr_atx_pll_s10_htile_0|ct1_hssi_pma_lc_refclk_select_mux_inst .xpm_iqref_mux_iqclk_sel = "ref_iqclk0";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[6] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~90_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[6]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[6] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[6] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1] .power_up = "low";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[0] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~5_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[0]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[0] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[0] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[0] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~avmmreaddata ),
	.asdata(vcc),
	.clrn(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[0]~q ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[0] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[0] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2] .power_up = "low";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i48~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[48]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i48~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i48~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i48~0 .lut_mask = 64'h7777777777777777;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i48~0 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[21] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[21]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[21] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[21] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0] .power_up = "low";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i54~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[21]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i54~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i54~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i54~0 .lut_mask = 64'h7777777777777777;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i54~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~0 (
	.dataa(!reconfig_address0[10]),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[0]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i48~0_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i54~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~0 .lut_mask = 64'h6FFF9FFF9FFF6FFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~0 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[1] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~6_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[1]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[1] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[1] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[1] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMREADDATA1 ),
	.asdata(vcc),
	.clrn(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[1]~q ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[1] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[1] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~1 (
	.dataa(!reconfig_address0[10]),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[1]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i48~0_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i54~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~1 .lut_mask = 64'h6FFF9FFF9FFF6FFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~1 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[2] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~7_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[2]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[2] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[2] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[2] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMREADDATA2 ),
	.asdata(vcc),
	.clrn(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[2]~q ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[2] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[2] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~2 (
	.dataa(!reconfig_address0[10]),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[2]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[2]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i48~0_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i54~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~2 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~2 .lut_mask = 64'h6FFF9FFF9FFF6FFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~2 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[3] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMREADDATA3 ),
	.asdata(vcc),
	.clrn(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[3]~q ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[3] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[3] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[48]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!reconfig_address0[10]),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[3]~q ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i54~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~3 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~3 .lut_mask = 64'hFFFFFFFFFFFEFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~3 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[4] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMREADDATA4 ),
	.asdata(vcc),
	.clrn(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[4]~q ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[4] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[4] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[48]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!reconfig_address0[10]),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[4]~q ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i54~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~4 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~4 .lut_mask = 64'hFFFFFFFFFFFEFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~4 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[5] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMREADDATA5 ),
	.asdata(vcc),
	.clrn(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[5]~q ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[5] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[5] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[48]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!reconfig_address0[10]),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[5]~q ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i54~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~5 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~5 .lut_mask = 64'hFFFFFFFFFFFEFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~5 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[6] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~8_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[6]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[6] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[6] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[6] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMREADDATA6 ),
	.asdata(vcc),
	.clrn(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[6]~q ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[6] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[6] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~6 (
	.dataa(!reconfig_address0[10]),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[6]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[6]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i48~0_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i54~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~6 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~6 .lut_mask = 64'h6FFF9FFF9FFF6FFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~6 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[7] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~9_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[7]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[7] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[7] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[7] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMREADDATA7 ),
	.asdata(vcc),
	.clrn(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[7]~q ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[7] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[7] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~7 (
	.dataa(!reconfig_address0[10]),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_readdata[7]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdata[7]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i48~0_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i54~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~7 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~7 .lut_mask = 64'h6FFF9FFF9FFF6FFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~7 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_valid (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_waitrequest~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_valid~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_valid .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_valid .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_read_r (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i10~0_combout ),
	.asdata(vcc),
	.clrn(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_read_r~q ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_read_r .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_read_r .power_up = "low";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdatavalid_wait (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i20~0_combout ),
	.asdata(vcc),
	.clrn(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdatavalid_wait~q ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdatavalid_wait .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdatavalid_wait .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_waitrequest_cmdfifo_pfull (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i39~0_combout ),
	.asdata(vcc),
	.clrn(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_waitrequest_cmdfifo_pfull~q ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_waitrequest_cmdfifo_pfull .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_waitrequest_cmdfifo_pfull .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_waitrequest_busy (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i54~0_combout ),
	.asdata(vcc),
	.clrn(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_waitrequest_busy~q ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_waitrequest_busy .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_waitrequest_busy .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdatavalid_wait~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_waitrequest_cmdfifo_pfull~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_waitrequest_busy~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~0 .lut_mask = 64'hFBFBFBFBFBFBFBFB;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_12~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[48]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!reconfig_address0[10]),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[21]~q ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_12~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_12~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_12~0 .lut_mask = 64'hFFFFFFFFFFFFFFFE;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_12~0 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reconfig_read (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_3~1_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reconfig_read~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reconfig_read .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reconfig_read .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i14 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reconfig_read~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i14~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i14 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i14 .lut_mask = 64'h7777777777777777;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i14 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent|m0_read~0_combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[49]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datae(!reconfig_read0),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i14~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~0 .lut_mask = 64'hFFFFFFFFFFFFFFFB;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|strm_waitrequest[0]~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_valid~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_read_r~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_12~0_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|strm_waitrequest[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|strm_waitrequest[0]~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|strm_waitrequest[0]~0 .lut_mask = 64'hFFFFFFFFFFFAFFFC;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|strm_waitrequest[0]~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|strm_waitrequest[0]~1 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_valid~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_read_r~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_12~0_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|strm_waitrequest[0]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|strm_waitrequest[0]~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|strm_waitrequest[0]~1 .lut_mask = 64'hFFFFFFFFFFFAFFFC;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|strm_waitrequest[0]~1 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_ctrl_reg.r_pll_reset (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~2_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i81~1_combout ),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_ctrl_reg.r_pll_reset~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_ctrl_reg.r_pll_reset .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_ctrl_reg.r_pll_reset .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_ctrl_reg.r_pll_reset_override (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~4_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i81~1_combout ),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_ctrl_reg.r_pll_reset_override~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_ctrl_reg.r_pll_reset_override .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_ctrl_reg.r_pll_reset_override .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|csr_pll_powerdown~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_ctrl_reg.r_pll_reset~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_ctrl_reg.r_pll_reset_override~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|csr_pll_powerdown~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|csr_pll_powerdown~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|csr_pll_powerdown~0 .lut_mask = 64'hEEEEEEEEEEEEEEEE;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|csr_pll_powerdown~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|user_read_write[0] (
	.dataa(!reconfig_read0),
	.datab(!reconfig_write0),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|user_read_write[0]~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|user_read_write[0] .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|user_read_write[0] .lut_mask = 64'hEEEEEEEEEEEEEEEE;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|user_read_write[0] .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reconfig_write (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~2_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reconfig_write~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reconfig_write .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reconfig_write .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reconfig_read~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reconfig_write~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~0 .lut_mask = 64'hEEEEEEEEEEEEEEEE;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|jtag_read_write[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent|i212~combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent|m0_read~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[49]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|jtag_read_write[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|jtag_read_write[0]~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|jtag_read_write[0]~0 .lut_mask = 64'hF7F7F7F7F7F7F7F7;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|jtag_read_write[0]~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~1 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|user_read_write[0]~combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|jtag_read_write[0]~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~1 .lut_mask = 64'hFFFFFBFFFFFFFBFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~1 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[0].sync_r[2] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[0].sync_r[1]~q ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[0].sync_r[2]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[0].sync_r[2] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[0].sync_r[2] .power_up = "low";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_9~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[45]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[21]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.dataf(!reconfig_address0[7]),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_9~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_9~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_9~0 .lut_mask = 64'h7FFFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_9~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent|m0_read~0_combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[49]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reconfig_read~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~1 .lut_mask = 64'hDFFFFFFFDFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~1 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.debug_read[0]~0 (
	.dataa(!reconfig_address0[10]),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datac(!reconfig_read0),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i48~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i54~0_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.debug_read[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.debug_read[0]~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.debug_read[0]~0 .lut_mask = 64'hFFFFFFFFFFFFFFFE;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.debug_read[0]~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_8~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[44]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[21]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.dataf(!reconfig_address0[6]),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_8~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_8~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_8~0 .lut_mask = 64'h7FFFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_8~0 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[24] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[24]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[24] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[24] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_10~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[46]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datae(!reconfig_address0[8]),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[24]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_10~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_10~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_10~0 .lut_mask = 64'h7FFFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_10~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_7~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[43]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[21]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.dataf(!reconfig_address0[5]),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_7~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_7~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_7~0 .lut_mask = 64'h7FFFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_7~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_8~0_combout ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_10~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_7~0_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~0 .lut_mask = 64'hFEFEFEFEFEFEFEFE;
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~0 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[20] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~4_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[20]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[20] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[20] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_6~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[42]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datae(!reconfig_address0[4]),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[20]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_6~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_6~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_6~0 .lut_mask = 64'h7FFFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_6~0 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[17] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~91_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[17]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[17] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[17] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_3~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[39]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datae(!reconfig_address0[1]),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[17]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_3~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_3~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_3~0 .lut_mask = 64'h7FFFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_3~0 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[19] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~11_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[19]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[19] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[19] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_5~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[41]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datae(!reconfig_address0[3]),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[19]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_5~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_5~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_5~0 .lut_mask = 64'h7FFFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_5~0 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[16] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~14_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[16]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[16] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[16] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_2~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[38]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datae(!reconfig_address0[0]),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[16]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_2~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_2~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_2~0 .lut_mask = 64'h7FFFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_2~0 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[18] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~19_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[18]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[18] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[18] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_4~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[40]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datae(!reconfig_address0[2]),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[18]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_4~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_4~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_4~0 .lut_mask = 64'h7FFFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_4~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_6~0_combout ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_3~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_5~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_2~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_4~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~0 .lut_mask = 64'hFFFFFFFEFFFFFFFE;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_9~0_combout ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.debug_read[0]~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~0 .lut_mask = 64'hDFFFDFFFDFFFDFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~1 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_6~0_combout ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_3~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_5~0_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~1 .lut_mask = 64'hFEFEFEFEFEFEFEFE;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~1 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|busy (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i195~0_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|busy~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|busy .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|busy .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~2 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|busy~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_8~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_10~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_2~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_4~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~2 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~2 .lut_mask = 64'hD7FF7DFFD7FF7DFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~2 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~3 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_7~0_combout ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_9~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.debug_read[0]~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~1_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~2_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~3 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~3 .lut_mask = 64'hFEFFFFFFFEFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~3 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[0] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[0]~0_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[0]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[0] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[0] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i109~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_8~0_combout ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_10~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_7~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_9~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i109~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i109~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i109~0 .lut_mask = 64'hFFF7FFF7FFF7FFF7;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i109~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~1 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_8~0_combout ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_10~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_7~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_9~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~1 .lut_mask = 64'hDFFFDFFFDFFFDFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~1 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~4 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_ctrl_reg.r_pll_reset~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.debug_read[0]~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i109~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~0_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~4 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~4 .lut_mask = 64'hF7FFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~4 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~5 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[0].sync_r[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~3_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~4_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~5 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~5 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~5 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[1]~q ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2]~q ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2] .power_up = "low";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~2 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|user_read_write[0]~combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|jtag_read_write[0]~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~2 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~2 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~2 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~0_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~0_combout ),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~1_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~0_combout ),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~2_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~0_combout ),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~0 .lut_mask = 64'hBBBBBBBBBBBBBBBB;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~0 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[1]~q ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|i7~combout ),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1] .power_up = "low";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[0]~q ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|i7~combout ),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0] .power_up = "low";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~3_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~0_combout ),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~4_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~0_combout ),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~1 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~1 .lut_mask = 64'hEFFFEFFFEFFFEFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~1 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~2 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~1_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~2 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~2 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~2 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~3 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|user_read_write[0]~combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~0_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|jtag_read_write[0]~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~3 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~3 .lut_mask = 64'hFFFFFFFFFFFFEFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|i14~3 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[2] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[1]~q ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[2]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[2] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[2] .power_up = "low";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[1] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[1]~1_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[1]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[1] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[1] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~6 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.debug_read[0]~0_combout ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i109~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~10_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~6 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~6 .lut_mask = 64'hBFFFFFFFBFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~6 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.r_avmm_busy (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMBUSY ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.r_avmm_busy~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.r_avmm_busy .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.r_avmm_busy .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~7 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.r_avmm_busy~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_9~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.debug_read[0]~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~7 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~7 .lut_mask = 64'hF7FFFFFFF7FFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~7 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_bcast_en (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_bcast_en~0_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_bcast_en~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_bcast_en .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_bcast_en .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~8 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_bcast_en~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.debug_read[0]~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i109~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~8_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~8 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~8 .lut_mask = 64'hDFFFDFFFDFFFDFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~8 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_load (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i120~1_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_load~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_load .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_load .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~9 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_load~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.debug_read[0]~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i109~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~9_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~9 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~9 .lut_mask = 64'hDFFFDFFFDFFFDFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~9 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i14~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datab(!reconfig_read0),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i14~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i14~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i14~0 .lut_mask = 64'h7777777777777777;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i14~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_waitrequest (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_valid~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i14~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_12~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~1_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_waitrequest~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_waitrequest .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_waitrequest .lut_mask = 64'hFBFFFBFFFBFFFBFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_waitrequest .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdatavalid_r (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMM_READDATAVALID ),
	.asdata(vcc),
	.clrn(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdatavalid_r~q ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdatavalid_r .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdatavalid_r .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i10~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdatavalid_r~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i14~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_12~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~1_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i10~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i10~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i10~0 .lut_mask = 64'hBFFFBFFFBFFFBFFF;
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i10~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i20~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdatavalid_wait~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_read_r~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMM_READDATAVALID ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i14~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_12~0_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i20~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i20~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i20~0 .lut_mask = 64'hD8FFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i20~0 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[2] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[2]~0_combout ),
	.asdata(vcc),
	.clrn(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[2]~q ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[2] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[2] .power_up = "low";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[0] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[0]~1_combout ),
	.asdata(vcc),
	.clrn(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[0]~q ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[0] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[0] .power_up = "low";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[1] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[1]~2_combout ),
	.asdata(vcc),
	.clrn(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[1]~q ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[1] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[1] .power_up = "low";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i39~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMM_CMDFIFO_WR_PFULL ),
	.datab(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i39~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i39~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i39~0 .lut_mask = 64'hBFFFBFFFBFFFBFFF;
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i39~0 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|uc_decode (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i55~0_combout ),
	.asdata(vcc),
	.clrn(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|uc_decode~q ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|uc_decode .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|uc_decode .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~1 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_waitrequest_cmdfifo_pfull~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_waitrequest_busy~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~1 .lut_mask = 64'hDDDDDDDDDDDDDDDD;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~1 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i9~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent|i212~combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[49]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i9~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i9~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i9~0 .lut_mask = 64'hDFDFDFDFDFDFDFDF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i9~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_0~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datac(!reconfig_write0),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reconfig_write~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_0~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_0~0 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_0~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~1 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~1_combout ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i9~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_0~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_12~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~1 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~1 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datad(!reconfig_writedata0[0]),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~0 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[47]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datad(!reconfig_address0[9]),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~2 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~2 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~2 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[8] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~25_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[8]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[8] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[8] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[0] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~28_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[0]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[0] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[0] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[0] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~0_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i200~0_combout ),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[0]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[0] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[0] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~1 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[8]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[0]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~1 .lut_mask = 64'h47FF47FF47FF47FF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~1 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~3 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~0_combout ),
	.datab(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~2_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_9~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~1_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~3 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~3 .lut_mask = 64'hFDFFFDFFFDFFFDFF;
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~3 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i54~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMBUSY ),
	.datab(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|uc_decode~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~1_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~3_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i54~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i54~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i54~0 .lut_mask = 64'h7FFFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i54~0 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_READ (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~7_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_READ~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_READ .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_READ .power_up = "low";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~2 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datab(!reconfig_read0),
	.datac(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_read_r~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~2 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~2 .lut_mask = 64'hFFFFEFFFFFFFEFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~2 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[14] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~33_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[14]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[14] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[14] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[15] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~39_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[15]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[15] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[15] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[14]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[15]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~0 .lut_mask = 64'h7777777777777777;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~0 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.ROM_READ (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~8_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.ROM_READ~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.ROM_READ .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.ROM_READ .power_up = "low";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|rom_read (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_0~2_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|rom_read~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|rom_read .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|rom_read .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|rom_read_r (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|rom_read~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|rom_read_r~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|rom_read_r .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|rom_read_r .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.ROM_READ~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|rom_read~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|rom_read_r~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~0 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~0 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[9] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~46_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[9]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[9] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[9] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[10] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~49_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[10]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[10] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[10] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[11] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~54_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[11]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[11] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[11] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[12] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~59_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[12]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[12] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[12] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[13] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~63_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[13]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[13] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[13] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~1 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[8]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[9]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[10]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[11]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[12]~q ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[13]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~1 .lut_mask = 64'h7FFFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~1 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_3~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_READ~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_3~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_3~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_3~0 .lut_mask = 64'hFFDFFFFFFFDFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_3~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_3~1 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_valid~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_READ~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_12~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.debug_read[0]~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~2_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_3~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_3~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_3~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_3~1 .lut_mask = 64'hFFFFFFFFFFFFBFB3;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_3~1 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|g_avmm2_block_sig.soft_read_block_int (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i80~0_combout ),
	.asdata(vcc),
	.clrn(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[2]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|g_avmm2_block_sig.soft_read_block_int~q ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|g_avmm2_block_sig.soft_read_block_int .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|g_avmm2_block_sig.soft_read_block_int .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i78~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|g_avmm2_block_sig.soft_read_block_int~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i14~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~1_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_12~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i78~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i78~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i78~0 .lut_mask = 64'hBFFFFFFFBFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i78~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datad(!reconfig_writedata0[0]),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~2 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~2 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~2 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[1] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~69_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[1]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[1] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[1] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[1] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~1_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i200~0_combout ),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[1]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[1] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[1] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~3 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[9]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~3 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~3 .lut_mask = 64'h47FF47FF47FF47FF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~3 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datad(!reconfig_writedata0[1]),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~3_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~4 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~4 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~4 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[2] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~71_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[2]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[2] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[2] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[2] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~2_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i200~0_combout ),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[2]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[2] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[2] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_15~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[10]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[2]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[2]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_15~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_15~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_15~0 .lut_mask = 64'h47FF47FF47FF47FF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_15~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_15~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datad(!reconfig_writedata0[2]),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_15~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_15~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_15~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_15~1 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_15~1 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[3] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~76_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[3]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[3] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[3] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[3] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~3_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i200~0_combout ),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[3]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[3] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[3] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_16~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[11]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[3]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[3]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_16~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_16~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_16~0 .lut_mask = 64'h47FF47FF47FF47FF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_16~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_16~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datad(!reconfig_writedata0[3]),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_16~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_16~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_16~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_16~1 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_16~1 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[4] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~78_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[4]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[4] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[4] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[4] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~4_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i200~0_combout ),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[4]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[4] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[4] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_17~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[12]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[4]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[4]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_17~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_17~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_17~0 .lut_mask = 64'h47FF47FF47FF47FF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_17~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_17~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datad(!reconfig_writedata0[4]),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_17~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_17~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_17~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_17~1 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_17~1 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[5] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~84_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[5]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[5] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[5] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[5] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~5_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i200~0_combout ),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[5]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[5] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[5] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_18~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[13]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[5]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[5]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_18~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_18~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_18~0 .lut_mask = 64'h47FF47FF47FF47FF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_18~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_18~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[5]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datad(!reconfig_writedata0[5]),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_18~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_18~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_18~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_18~1 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_18~1 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[6] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~6_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i200~0_combout ),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[6]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[6] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[6] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[14]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[6]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[6]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~0 .lut_mask = 64'h47FF47FF47FF47FF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[6]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datad(!reconfig_writedata0[6]),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~1 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~1 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[7] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~89_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[7]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[7] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[7] .power_up = "dont_care";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[7] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~7_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i200~0_combout ),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[7]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[7] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[7] .power_up = "dont_care";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_20~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[15]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[7]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|saved_readdata[7]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_20~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_20~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_20~0 .lut_mask = 64'h47FF47FF47FF47FF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_20~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_20~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[7]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datad(!reconfig_writedata0[7]),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_20~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_20~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_20~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_20~1 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_20~1 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i81~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i9~0_combout ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_0~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_12~0_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i81~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i81~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i81~0 .lut_mask = 64'hF7F7F7F7F7F7F7F7;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i81~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i81~1 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i81~0_combout ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~1_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i81~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i81~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i81~1 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i81~1 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_WRITE (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~9_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_WRITE~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_WRITE .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_WRITE .power_up = "low";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~3 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_valid~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_read_r~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i14~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_12~0_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~3 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~3 .lut_mask = 64'hF7FFFFFFF7FF77FF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~3 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~2 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[21]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[24]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~2 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~2 .lut_mask = 64'h7777777777777777;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~2 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~3 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[2]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[3]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[4]~q ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[5]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~3 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~3 .lut_mask = 64'h7FFFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~3 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~4 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[16]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[18]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[17]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[19]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[20]~q ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[7]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~4 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~4 .lut_mask = 64'h7FFFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~4 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~1 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[6]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~2_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~1_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~3_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~4_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~1 .lut_mask = 64'hFFFFFFFFFFFFFBFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~1 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~2 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_READ~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_WRITE~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~3_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~2 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~2 .lut_mask = 64'h7FFFBFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~2 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[0].sync_r[1] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[0].sync_r[0]~q ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[0].sync_r[1]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[0].sync_r[1] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[0].sync_r[1] .power_up = "low";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~3 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~3 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~3 .lut_mask = 64'hFFFEFFFEFFFEFFFE;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~3 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~4 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~4 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~4 .lut_mask = 64'hFFFFFF6FFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~4 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~5 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~5 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~5 .lut_mask = 64'hFBFBFBFBFBFBFBFB;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~5 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~6 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~6 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~6 .lut_mask = 64'h7FBF7FBF7FBF7FBF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~6 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~7 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~7 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~7 .lut_mask = 64'h6996699669966996;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~7 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~8 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~8_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~8 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~8 .lut_mask = 64'h6996699669966996;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~8 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~9 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~9_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~9 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~9 .lut_mask = 64'h6FFF6FFF6FFF6FFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~9 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~10 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~7_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~8_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~9_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~10_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~10 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~10 .lut_mask = 64'hFFF6FFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~10 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~11 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~6_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~10_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~11_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~11 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~11 .lut_mask = 64'hEFFFEFFFEFFFEFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~11 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~12 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~12_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~12 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~12 .lut_mask = 64'hFFF7FFF7FFF7FFF7;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~12 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~13 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~13_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~13 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~13 .lut_mask = 64'h7DD7FFFFD77DFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~13 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~14 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~12_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~13_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~14_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~14 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~14 .lut_mask = 64'hF7B3F7B3F7B3F7B3;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~14 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~15 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~15_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~15 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~15 .lut_mask = 64'hFF7FFF7FFF7FFF7F;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~15 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~16 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~16_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~16 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~16 .lut_mask = 64'h47FF47FF47FF47FF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~16 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~17 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~17_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~17 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~17 .lut_mask = 64'hDFFFDFFFDFFFDFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~17 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~18 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~16_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~17_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~18_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~18 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~18 .lut_mask = 64'hFFFFF7D5FFFFF7D5;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~18 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~19 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~15_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~18_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~19_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~19 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~19 .lut_mask = 64'hFFBFFFFFFFBFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~19 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_load (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|i7~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_load~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_load .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_load .power_up = "low";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.IDLE (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~10_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.IDLE~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.IDLE .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.IDLE .power_up = "low";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|data[6]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~2_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~1_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~3_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~4_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3 .lut_mask = 64'h7FFFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i195~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|busy~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_load~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.IDLE~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i195~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i195~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i195~0 .lut_mask = 64'hFFFFFF7FFFFFFF7F;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i195~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[0]~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i81~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~2_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i109~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[0]~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[0]~0 .lut_mask = 64'hDF7F7FDFDF7F7FDF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[0]~0 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[1] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[0]~q ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[1]~q ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[1] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[1] .power_up = "low";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_WRITE~q ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~3_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~0 .lut_mask = 64'hD77DFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_1~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_load~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.IDLE~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_1~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_1~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_1~0 .lut_mask = 64'hEEEEEEEEEEEEEEEE;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_1~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_WRITE~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_1~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~3_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~0 .lut_mask = 64'h7FFFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|add_0~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|add_0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|add_0~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|add_0~0 .lut_mask = 64'h6996699669966996;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|add_0~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~1 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_WRITE~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|add_0~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~3_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~1 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~1 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|add_0~1 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|add_0~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|add_0~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|add_0~1 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|add_0~1 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~2 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_WRITE~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|add_0~1_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~3_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~2 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~2 .lut_mask = 64'h7FDFFFFF7FDFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~2 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|i7 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|busy~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_load~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|i7~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|i7 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|i7 .lut_mask = 64'hBBBBBBBBBBBBBBBB;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|i7 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~3 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_WRITE~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~3_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~3 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~3 .lut_mask = 64'hDFFFDFFFDFFFDFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~3 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~4 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_WRITE~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~3_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~4 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~4 .lut_mask = 64'h7DFFFFFF7DFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i178~4 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[1] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[0]~q ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[1]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[1] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[1] .power_up = "low";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[1]~1 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i81~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_13~4_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i109~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[1]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[1]~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[1]~1 .lut_mask = 64'hDF7F7FDFDF7F7FDF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_sel[1]~1 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[6]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[1]~q ),
	.datad(!reconfig_writedata0[6]),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~2 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~2 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~2 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_bcast_en~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_bcast_en~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~2_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_19~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i81~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i109~0_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_bcast_en~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_bcast_en~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_bcast_en~0 .lut_mask = 64'hFF7F7FFF7FFFFF7F;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_bcast_en~0 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.rcfg_emb_strm_cfg_load_lock (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.rcfg_emb_strm_cfg_load_lock~0_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.rcfg_emb_strm_cfg_load_lock~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.rcfg_emb_strm_cfg_load_lock .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.rcfg_emb_strm_cfg_load_lock .power_up = "low";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i120~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|busy~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.r_rcfg_emb_strm_cfg_load~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.rcfg_emb_strm_cfg_load_lock~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i120~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i120~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i120~0 .lut_mask = 64'hBFBFBFBFBFBFBFBF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i120~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i120~1 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i120~0_combout ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i81~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_20~1_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i109~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i120~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i120~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i120~1 .lut_mask = 64'hDF7F7FDFDF7F7FDF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i120~1 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[2]~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[2]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[2]~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[2]~0 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[2]~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[0]~1 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[0]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[0]~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[0]~1 .lut_mask = 64'hDFDFDFDFDFDFDFDF;
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[0]~1 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[1]~2 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[1]~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[1]~2 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[1]~2 .lut_mask = 64'h7D7D7D7D7D7D7D7D;
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|startup_cntr[1]~2 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i55~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].ct1_hssi_avmm2_if_inst~O_AVMMBUSY ),
	.datab(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|uc_decode~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~1_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~3_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i55~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i55~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i55~0 .lut_mask = 64'hBFFFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i55~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~20 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~20_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~20 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~20 .lut_mask = 64'h6996699669966996;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~20 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~21 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~21_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~21 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~21 .lut_mask = 64'hEEEEEEEEEEEEEEEE;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~21 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~22 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~22_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~22 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~22 .lut_mask = 64'hFDFEFDFEFDFEFDFE;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~22 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~23 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~23_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~23 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~23 .lut_mask = 64'hFFFFBFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~23 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~24 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~24_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~24 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~24 .lut_mask = 64'hFFDFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~24 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~25 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~20_combout ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~21_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~22_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~5_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~23_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~24_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~25_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~25 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~25 .lut_mask = 64'hFBFFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~25 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~26 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~26_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~26 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~26 .lut_mask = 64'h6996966996696996;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~26 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~27 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~27_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~27 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~27 .lut_mask = 64'hFFFFFFFFFFFF6996;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~27 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~28 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~26_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~27_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~28_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~28 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~28 .lut_mask = 64'h2727272727272727;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~28 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i200~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_READ~q ),
	.datac(gnd),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~3_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i200~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i200~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i200~0 .lut_mask = 64'h77FFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i200~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.IDLE~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_READ~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.ROM_READ~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_WRITE~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.IDLE~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.IDLE~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.IDLE~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.IDLE~0 .lut_mask = 64'h6996699669966996;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.IDLE~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~7 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_READ~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.IDLE~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~3_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_3~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~7 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~7 .lut_mask = 64'hFFF7FFF7FFF7FFF7;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~7 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~29 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~29_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~29 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~29 .lut_mask = 64'h6996699669966996;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~29 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~30 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~30_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~30 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~30 .lut_mask = 64'hDFEFDFEFDFEFDFEF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~30 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~31 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~31_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~31 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~31 .lut_mask = 64'hBFFBBFFBBFFBBFFB;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~31 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~32 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~31_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~32_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~32 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~32 .lut_mask = 64'h27FFFFFF27FFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~32 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~33 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~29_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~30_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~32_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~33_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~33 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~33 .lut_mask = 64'hFFFFF7B3FFFFF7B3;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~33 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~34 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~34_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~34 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~34 .lut_mask = 64'h6996699669966996;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~34 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~35 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~35_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~35 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~35 .lut_mask = 64'h9F6F9F6F9F6F9F6F;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~35 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~36 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~36_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~36 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~36 .lut_mask = 64'hF7FBF7FBF7FBF7FB;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~36 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~37 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~37_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~37 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~37 .lut_mask = 64'hDFEFDFEFDFEFDFEF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~37 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~38 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~36_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~37_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~38_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~38 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~38 .lut_mask = 64'hF737FFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~38 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~39 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~34_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~35_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~5_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~38_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~39_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~39 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~39 .lut_mask = 64'hFFFEFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~39 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_0~1 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.ROM_READ~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|rom_read~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|rom_read_r~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_load~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.IDLE~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_0~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_0~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_0~1 .lut_mask = 64'hFFBFFFFFFFBFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_0~1 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~8 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_WRITE~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_0~1_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.IDLE~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~3_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~8_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~8 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~8 .lut_mask = 64'hF7FFFFFFF7FFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~8 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_0~2 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_WRITE~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_0~1_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~3_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_0~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_0~2 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_0~2 .lut_mask = 64'hF7FFF7FFF7FFF7FF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_0~2 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~40 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~40_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~40 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~40 .lut_mask = 64'h6996699669966996;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~40 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~41 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~41_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~41 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~41 .lut_mask = 64'h6996699669966996;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~41 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~42 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~42_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~42 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~42 .lut_mask = 64'hF9F6F9F6F9F6F9F6;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~42 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~43 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~42_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~43_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~43 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~43 .lut_mask = 64'hFFFBFFFBFFFBFFFB;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~43 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~44 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~44_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~44 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~44 .lut_mask = 64'hFFBEFFBEFFBEFFBE;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~44 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~45 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~44_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~45_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~45 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~45 .lut_mask = 64'hF7FFF7FFF7FFF7FF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~45 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~46 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~40_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~41_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~43_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~45_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~46_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~46 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~46 .lut_mask = 64'hFFB8FFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~46 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~47 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~47_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~47 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~47 .lut_mask = 64'hEDDEEDDEEDDEEDDE;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~47 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~48 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~48_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~48 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~48 .lut_mask = 64'hF7F7FF77F7F7FF77;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~48 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~49 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~47_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~48_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~49_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~49 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~49 .lut_mask = 64'hFFFFF7D5FFFFF7D5;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~49 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~50 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~50_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~50 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~50 .lut_mask = 64'hEDDEEDDEEDDEEDDE;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~50 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~51 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~51_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~51 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~51 .lut_mask = 64'hFFFDFFFDFFFDFFFD;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~51 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~52 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~51_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~52_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~52 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~52 .lut_mask = 64'h27FF27FF27FF27FF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~52 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~53 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~53_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~53 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~53 .lut_mask = 64'hF6F9F9F6FFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~53 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~54 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~50_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~52_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~53_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~54_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~54 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~54 .lut_mask = 64'hFFFFFFF7FFFFFFF7;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~54 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~55 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~55_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~55 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~55 .lut_mask = 64'hFFBFFFBFFFBFFFBF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~55 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~56 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~56_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~56 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~56 .lut_mask = 64'hFF96FF96FF96FF96;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~56 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~57 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~57_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~57 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~57 .lut_mask = 64'h6996699669966996;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~57 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~58 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~57_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~58_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~58 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~58 .lut_mask = 64'hEFEFEFEFEFEFEFEF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~58 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~59 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~55_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~56_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~58_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~52_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~59_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~59 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~59 .lut_mask = 64'hFFFFFFFFFFFFDF8F;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~59 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~60 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~60_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~60 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~60 .lut_mask = 64'hFDFFFDFFFDFFFDFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~60 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~61 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~61_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~61 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~61 .lut_mask = 64'hFBFBFBFBFBFBFBFB;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~61 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~62 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~60_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~61_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~62_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~62 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~62 .lut_mask = 64'hF7FFFFFFB3FFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~62 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~63 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~57_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~62_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~63_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~63 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~63 .lut_mask = 64'hFBFFFBFFFBFFFBFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~63 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i80~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_readdatavalid_r~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|g_avmm2_block_sig.soft_read_block_int~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|i14~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~1_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_12~0_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i80~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i80~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i80~0 .lut_mask = 64'h8BFFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i80~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~64 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~64_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~64 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~64 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~64 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~65 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~65_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~65 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~65 .lut_mask = 64'hEFFFEFFFEFFFEFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~65 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~66 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~66_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~66 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~66 .lut_mask = 64'hEFFEEFFEEFFEEFFE;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~66 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~67 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~67_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~67 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~67 .lut_mask = 64'hFFFFFF7FFFFFFF7F;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~67 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~68 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~66_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~67_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~68_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~68 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~68 .lut_mask = 64'hFFFFFFFDFFFFFFFD;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~68 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~69 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~64_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~65_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~68_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~69_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~69 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~69 .lut_mask = 64'hFFFFFFFFBFB3FFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~69 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~70 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~70_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~70 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~70 .lut_mask = 64'hFFF6FFF9FFF9FFF6;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~70 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~71 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~15_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~70_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~71_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~71 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~71 .lut_mask = 64'hF7B3FFFFF7B3FFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~71 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~72 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~72_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~72 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~72 .lut_mask = 64'hFFEFFFEFFFEFFFEF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~72 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~73 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~73_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~73 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~73 .lut_mask = 64'hEDDEEDDEEDDEEDDE;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~73 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~74 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~74_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~74 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~74 .lut_mask = 64'hBFBFBFBFBFBFBFBF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~74 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~75 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~75_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~75 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~75 .lut_mask = 64'hFF69FFFFFF96FFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~75 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~76 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~72_combout ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~73_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~61_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~74_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~75_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~76_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~76 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~76 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~76 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~77 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~77_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~77 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~77 .lut_mask = 64'hFFFFFFFFBEEBEBBE;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~77 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~78 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~1_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~77_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~78_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~78 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~78 .lut_mask = 64'h27FF27FF27FF27FF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~78 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~79 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~79_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~79 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~79 .lut_mask = 64'hB77BB77BB77BB77B;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~79 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~80 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~80_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~80 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~80 .lut_mask = 64'h6996699669966996;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~80 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~81 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~81_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~81 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~81 .lut_mask = 64'hEDDEEDDEEDDEEDDE;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~81 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~82 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~81_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~82_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~82 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~82 .lut_mask = 64'hFBFFFBFFFBFFFBFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~82 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~83 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~51_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~83_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~83 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~83 .lut_mask = 64'hFDFFFDFFFDFFFDFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~83 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~84 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~79_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~80_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~82_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~83_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~84_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~84 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~84 .lut_mask = 64'h8DFFFFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~84 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~85 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~85_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~85 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~85 .lut_mask = 64'hEFFEEFFEEFFEEFFE;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~85 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~86 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~86_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~86 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~86 .lut_mask = 64'hDDDDDDDDDDDDDDDD;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~86 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~87 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~87_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~87 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~87 .lut_mask = 64'hFFEFFFEFFFEFFFEF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~87 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~88 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~86_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~87_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~88_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~88 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~88 .lut_mask = 64'hFFF6FFFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~88 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~89 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~1_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~85_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~88_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~89_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~89 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~89 .lut_mask = 64'h27FFFFFF27FFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~89 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i200~1 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|g_arb[0].arbiter_inst|grant[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|avmm_valid~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|avmm_read_r~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|chnl_waitrequest[0]~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_12~0_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_1~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i200~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i200~1 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i200~1 .lut_mask = 64'h5FFF3FFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i200~1 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~9 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_READ~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.XCVR_WRITE~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.IDLE~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|i200~1_combout ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~9_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~9 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~9 .lut_mask = 64'h5FFF3FFFFFFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~9 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[0].sync_r[0] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|lc_pll_pld_adapt_inst~O_LOCK ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[0].sync_r[0]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[0].sync_r[0] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[0].sync_r[0] .power_up = "low";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~10 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_1~0_combout ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|Select_2~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state.IDLE~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|reduce_nor_3~combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~10_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~10 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~10 .lut_mask = 64'hFFEFFFEFFFEFFFEF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|state~10 .shared_arith = "off";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[0] (
	.clk(reconfig_clk0),
	.d(vcc),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[0]~q ));
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[0] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|sync_r[0] .power_up = "low";

fourteennm_ff \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[0] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[0]~0_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[0]~q ));
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[0] .is_wysiwyg = "true";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[0] .power_up = "low";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.rcfg_emb_strm_cfg_load_lock~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|busy~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.rcfg_emb_strm_cfg_load_lock~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i81~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i109~0_combout ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.rcfg_emb_strm_cfg_load_lock~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.rcfg_emb_strm_cfg_load_lock~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.rcfg_emb_strm_cfg_load_lock~0 .lut_mask = 64'hF77F7FF7F77F7FF7;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_rcfg_reg.rcfg_emb_strm_cfg_load_lock~0 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~10 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[2]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|reduce_or_9~0_combout ),
	.datac(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|avmm_atom_insts[0].g_no_hip.ct1_xcvr_avmm_soft_logic_inst|i49~0_combout ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_ctrl_reg.r_pll_reset_override~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|Decoder_0~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~10_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~10 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~10 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|i16~10 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~90 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[2]~q ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~90_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~90 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~90 .lut_mask = 64'hFFF6FFF9FFF9FFF6;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~90 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~91 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[0]~q ),
	.datab(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[4]~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[3]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[1]~q ),
	.datae(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|ctrl_inst|cfg_address[0]~q ),
	.dataf(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|r_cfg_sel[1]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~91_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~91 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~91 .lut_mask = 64'hFFFFFFFFBEEBEBBE;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_rcfg_strm_enable.rcfg_strm_top_inst|rom_inst|rom~91 .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[0]~0 (
	.dataa(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pld_cal_done[0] ),
	.datab(gnd),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[0]~0 .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[0]~0 .lut_mask = 64'hAAAAAAAAAAAAAAAA;
defparam \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_optional_chnl_reconfig_logic[0].g_avmm_csr_enabled.embedded_debug_soft_csr|en_stat_reg.rx_is_locked_sync|resync_chains[1].sync_r[0]~0 .shared_arith = "off";

fourteennm_lcell_comb \~GND (
	.dataa(gnd),
	.datab(gnd),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\~GND~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \~GND .extended_lut = "off";
defparam \~GND .lut_mask = 64'h0000000000000000;
defparam \~GND .shared_arith = "off";

fourteennm_lcell_comb \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pld_cal_done[0]~_wirecell (
	.dataa(!\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pld_cal_done[0] ),
	.datab(gnd),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pld_cal_done[0]~_wirecell_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pld_cal_done[0]~_wirecell .extended_lut = "off";
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pld_cal_done[0]~_wirecell .lut_mask = 64'hAAAAAAAAAAAAAAAA;
defparam \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pld_cal_done[0]~_wirecell .shared_arith = "off";

fourteennm_sdm_jtag_ela \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom (
	.ret_tck(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.ret_tms(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.tck(altera_reserved_tck),
	.tdi(altera_reserved_tdi),
	.tdoutap(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo~1_combout ),
	.tms(altera_reserved_tms),
	.tckutap(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.tdiutap(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|core_tdi ),
	.tdo(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|ext_tdo ),
	.tmsutap(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ));

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i28~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~1 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[27]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~82 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~1_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~2 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~1 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~6 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[28]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~2 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~6_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~7 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~6 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~11 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[29]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~7 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~11_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~12 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~11 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~11 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~11 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~16 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[30]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~12 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~16_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~17 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~16 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~16 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~16 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~21 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[31]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~17 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~21_sumout ),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~21 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~21 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~21 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~26 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[15]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~147 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~26_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~27 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~26 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~26 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~26 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~31 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[16]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~27 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~31_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~32 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~31 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~31 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~31 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~36 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[17]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~32 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~36_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~37 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~36 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~36 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~36 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~41 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[18]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~37 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~41_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~42 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~41 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~41 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~41 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~46 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[19]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~42 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~46_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~47 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~46 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~46 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~46 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~51 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[20]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~47 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~51_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~52 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~51 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~51 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~51 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~56 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[21]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~52 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~56_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~57 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~56 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~56 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~56 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~61 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[22]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~57 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~61_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~62 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~61 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~61 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~61 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~66 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[23]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~62 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~66_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~67 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~66 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~66 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~66 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~71 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[24]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~67 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~71_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~72 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~71 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~71 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~71 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~76 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[25]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~72 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~76_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~77 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~76 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~76 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~76 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~81 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[26]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~77 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~81_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~82 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~81 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~81 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~81 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~86 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[2]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~86_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~87 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~86 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~86 .lut_mask = 64'h0000000000000FF0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~86 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~91 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[3]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~87 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~91_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~92 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~91 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~91 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~91 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~96 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[4]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~92 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~96_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~97 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~96 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~96 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~96 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~101 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[5]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~97 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~101_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~102 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~101 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~101 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~101 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~106 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[6]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~102 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~106_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~107 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~106 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~106 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~106 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~111 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[7]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~107 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~111_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~112 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~111 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~111 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~111 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~116 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~112 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~116_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~117 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~116 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~116 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~116 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~121 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[9]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~117 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~121_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~122 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~121 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~121 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~121 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~126 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[10]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~122 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~126_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~127 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~126 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~126 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~126 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~131 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[11]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~127 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~131_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~132 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~131 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~131 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~131 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~136 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[12]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~132 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~136_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~137 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~136 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~136 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~136 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~141 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[13]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~137 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~141_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~142 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~141 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~141 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~141 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i43~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i9~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[13] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i48~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[13]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[13] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[13] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i19~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[1] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[6] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i33~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[6] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~1 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~1_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~2 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~1 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~6 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[8]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~42 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~6_sumout ),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~6 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~11 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~2 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~11_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~12 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~11 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~11 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~11 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~16 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~12 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~16_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~17 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~16 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~16 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~16 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~21 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[3]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~17 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~21_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~22 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~21 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~21 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~21 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~26 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[4]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~22 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~26_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~27 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~26 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~26 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~26 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~31 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[5]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~27 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~31_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~32 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~31 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~31 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~31 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~36 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[6]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~32 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~36_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~37 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~36 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~36 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~36 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~41 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[7]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~37 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~41_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~42 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~41 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~41 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~41 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~1 (
	.dataa(gnd),
	.datab(gnd),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~7_cout ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~1_sumout ),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~1 .lut_mask = 64'h0000000000000000;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~1 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[5]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~32 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~1_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~2 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~1 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~6 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[6]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~2 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~6_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~7 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~6 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~11 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[7]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~7 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~11_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~12 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~11 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~11 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~11 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~16 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~72 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~16_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~17 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~16 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~16 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~16 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~21 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[2]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~17 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~21_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~22 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~21 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~21 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~21 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~26 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[3]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~22 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~26_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~27 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~26 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~26 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~26 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~31 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[4]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~27 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~31_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~32 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~31 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~31 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~31 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~36 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[12]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~92 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~36_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~37 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~36 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~36 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~36 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~41 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[13]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~37 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~41_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~42 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~41 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~41 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~41 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~46 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[14]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~42 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~46_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~47 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~46 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~46 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~46 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~51 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[15]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~47 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~51_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~52 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~51 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~51 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~51 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~56 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[16]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~52 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~56_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~57 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~56 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~56 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~56 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~61 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[17]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~57 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~61_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~62 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~61 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~61 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~61 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~66 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[18]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~62 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~66_sumout ),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~66 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~66 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~66 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~71 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[0]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~71_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~72 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~71 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~71 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~71 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~76 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[8]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~12 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~76_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~77 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~76 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~76 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~76 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~81 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[9]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~77 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~81_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~82 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~81 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~81 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~81 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~86 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[10]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~82 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~86_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~87 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~86 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~86 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~86 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~91 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[11]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~87 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~91_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~92 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~91 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~91 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~91 .shared_arith = "off";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i33~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[2]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[1]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[0]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .mixed_port_feed_through_mode = "dont_care";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_a_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_a_first_bit_number = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_a_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_a_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_a_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_b_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_b_first_bit_number = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_b_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_b_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_b_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i33~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[2]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[1]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[5]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .mixed_port_feed_through_mode = "dont_care";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_first_bit_number = 3;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_first_bit_number = 3;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .ram_block_type = "auto";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~1 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[5]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~52 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~1_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~2 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~1 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~1 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[5]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~52 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~1_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~2 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~1 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~6 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[11]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~77 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~6_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~7 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~6 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~6 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[11]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~77 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~6_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~7 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~6 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~11 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[12]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~7 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~11_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~12 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~11 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~11 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~11 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~11 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[12]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~7 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~11_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~12 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~11 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~11 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~11 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~16 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[13]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~12 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~16_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~17 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~16 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~16 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~16 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~16 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[13]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~12 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~16_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~17 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~16 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~16 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~16 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~21 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[14]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~17 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~21_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~22 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~21 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~21 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~21 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~21 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[14]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~17 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~21_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~22 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~21 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~21 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~21 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~26 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[15]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~22 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~26_sumout ),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~26 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~26 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~26 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~26 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[15]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~22 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~26_sumout ),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~26 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~26 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~26 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~31 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[0]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~31_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~32 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~31 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~31 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~31 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~31 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[0]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~31_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~32 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~31 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~31 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~31 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~36 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~32 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~36_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~37 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~36 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~36 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~36 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~36 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~32 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~36_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~37 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~36 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~36 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~36 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~41 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[2]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~37 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~41_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~42 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~41 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~41 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~41 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~41 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[2]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~37 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~41_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~42 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~41 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~41 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~41 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~46 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[3]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~42 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~46_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~47 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~46 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~46 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~46 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~46 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[3]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~42 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~46_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~47 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~46 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~46 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~46 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~51 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[4]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~47 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~51_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~52 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~51 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~51 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~51 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~51 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[4]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~47 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~51_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~52 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~51 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~51 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~51 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~56 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[6]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~2 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~56_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~57 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~56 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~56 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~56 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~56 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[6]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~2 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~56_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~57 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~56 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~56 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~56 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~61 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~57 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~61_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~62 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~61 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~61 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~61 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~61 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~57 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~61_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~62 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~61 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~61 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~61 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~66 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~62 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~66_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~67 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~66 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~66 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~66 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~66 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~62 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~66_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~67 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~66 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~66 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~66 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~71 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[9]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~67 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~71_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~72 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~71 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~71 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~71 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~71 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[9]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~67 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~71_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~72 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~71 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~71 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~71 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~76 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[10]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~72 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~76_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~77 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~76 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~76 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~76 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~76 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[10]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~72 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~76_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~77 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~76 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~76 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~76 .shared_arith = "off";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i33~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[2]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[1]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[6]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .mixed_port_feed_through_mode = "dont_care";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_first_bit_number = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_first_bit_number = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i33~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[2]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[1]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[7]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .mixed_port_feed_through_mode = "dont_care";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_first_bit_number = 5;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_first_bit_number = 5;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i33~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[2]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[1]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[8]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .mixed_port_feed_through_mode = "dont_care";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_first_bit_number = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_first_bit_number = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i33~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[2]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[1]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[9]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .mixed_port_feed_through_mode = "dont_care";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_first_bit_number = 7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_first_bit_number = 7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .ram_block_type = "auto";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~146 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[14]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~142 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~146_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~147 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~146 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~146 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~146 .shared_arith = "off";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i33~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[2]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[1]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[2]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .mixed_port_feed_through_mode = "dont_care";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_first_bit_number = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_first_bit_number = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i33~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[2]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[1]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[3]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .mixed_port_feed_through_mode = "dont_care";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_first_bit_number = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_first_bit_number = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i33~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[2]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[1]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[4]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .mixed_port_feed_through_mode = "dont_care";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_first_bit_number = 2;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_first_bit_number = 2;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .ram_block_type = "auto";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i6~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~7 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[14]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~12_cout ),
	.sharein(gnd),
	.combout(),
	.sumout(),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~7_cout ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~7 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~7 .lut_mask = 64'h0000000000006996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~7 .shared_arith = "off";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i33~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[2]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[1]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[1]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .mixed_port_feed_through_mode = "dont_care";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_a_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_a_first_bit_number = 9;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_a_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_a_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_a_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_b_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_b_first_bit_number = 9;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_b_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_b_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_b_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .ram_block_type = "auto";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~1 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[6]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~12 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~1_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~2 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~1 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~6 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[7]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~2 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~6_sumout ),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~6 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~11 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[5]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~37 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~11_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~12 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~11 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~11 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~11 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~16 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~16_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~17 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~16 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~16 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~16 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~21 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~17 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~21_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~22 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~21 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~21 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~21 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~26 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[2]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~22 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~26_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~27 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~26 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~26 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~26 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~31 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[3]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~27 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~31_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~32 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~31 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~31 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~31 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~36 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[4]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~32 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~36_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~37 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~36 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~36 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~36 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~12 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[13]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~17_cout ),
	.sharein(gnd),
	.combout(),
	.sumout(),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~12_cout ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~12 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~12 .lut_mask = 64'h0000000000006996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~12 .shared_arith = "off";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[5]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[4]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[2]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[1]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[0]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~5_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~4_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .mixed_port_feed_through_mode = "old";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_first_bit_number = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_first_bit_number = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[5]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[4]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[2]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[1]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[7]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~5_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~4_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .mixed_port_feed_through_mode = "old";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_first_bit_number = 7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_first_bit_number = 7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[5]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[4]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[2]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[1]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[1]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~5_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~4_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .mixed_port_feed_through_mode = "old";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_first_bit_number = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_first_bit_number = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[5]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[4]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[2]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[1]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[2]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~5_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~4_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .mixed_port_feed_through_mode = "old";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_first_bit_number = 2;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_first_bit_number = 2;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[5]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[4]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[2]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[1]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[3]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~5_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~4_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .mixed_port_feed_through_mode = "old";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_first_bit_number = 3;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_first_bit_number = 3;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[5]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[4]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[2]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[1]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[4]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~5_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~4_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .mixed_port_feed_through_mode = "old";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_first_bit_number = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_first_bit_number = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[5]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[4]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[2]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[1]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[5]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~5_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~4_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .mixed_port_feed_through_mode = "old";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_first_bit_number = 5;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_first_bit_number = 5;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[5]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[4]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[2]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[1]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[6]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~5_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~4_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .mixed_port_feed_through_mode = "old";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_first_bit_number = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_first_bit_number = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .ram_block_type = "auto";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~17 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[12]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~22_cout ),
	.sharein(gnd),
	.combout(),
	.sumout(),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~17_cout ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~17 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~17 .lut_mask = 64'h0000000000006996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~17 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[6]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i50~0_combout ),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[5]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i50~0_combout ),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[5]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[7] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|data_out[5]~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i50~0_combout ),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[5]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[4]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i50~0_combout ),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[5]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[3]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i50~0_combout ),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[5]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[2]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i50~0_combout ),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[5]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[1]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i50~0_combout ),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[5]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i50~0_combout ),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[5]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~22 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[11]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~27_cout ),
	.sharein(gnd),
	.combout(),
	.sumout(),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~22_cout ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~22 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~22 .lut_mask = 64'h0000000000006996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~22 .shared_arith = "off";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|write~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[5]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[4]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[2]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[1]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[0]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~5_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~4_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .mixed_port_feed_through_mode = "old";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_first_bit_number = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_first_bit_number = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|write~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[5]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[4]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[2]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[1]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[1]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~5_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~4_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .mixed_port_feed_through_mode = "old";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_first_bit_number = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_first_bit_number = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|write~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[5]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[4]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[2]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[1]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[2]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~5_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~4_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .mixed_port_feed_through_mode = "old";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_first_bit_number = 2;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_first_bit_number = 2;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|write~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[5]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[4]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[2]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[1]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[3]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~5_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~4_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .mixed_port_feed_through_mode = "old";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_first_bit_number = 3;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_first_bit_number = 3;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|write~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[5]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[4]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[2]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[1]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[4]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~5_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~4_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .mixed_port_feed_through_mode = "old";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_first_bit_number = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_first_bit_number = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|write~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[5]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[4]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[2]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[1]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[5]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~5_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~4_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .mixed_port_feed_through_mode = "old";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_first_bit_number = 5;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_first_bit_number = 5;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|write~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[5]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[4]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[2]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[1]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[6]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~5_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~4_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .mixed_port_feed_through_mode = "old";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_first_bit_number = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_first_bit_number = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|write~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[5]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[4]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[2]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[1]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[7]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~5_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~4_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~1_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~0_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .mixed_port_feed_through_mode = "old";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_first_bit_number = 7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_address_width = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_first_bit_number = 7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_last_address = 63;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_logical_ram_depth = 64;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_logical_ram_width = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .ram_block_type = "auto";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~27 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[10]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~32_cout ),
	.sharein(gnd),
	.combout(),
	.sumout(),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~27_cout ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~27 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~27 .lut_mask = 64'h0000000000006996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~27 .shared_arith = "off";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i33~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[2]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[1]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_endofpacket~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~0_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~4_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .mixed_port_feed_through_mode = "dont_care";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_a_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_a_first_bit_number = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_a_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_a_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_a_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_b_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_b_first_bit_number = 8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_b_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_b_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .port_b_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a8 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i33~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[2]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[1]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_startofpacket~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~0_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~4_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .mixed_port_feed_through_mode = "dont_care";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_a_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_a_first_bit_number = 9;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_a_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_a_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_a_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_b_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_b_first_bit_number = 9;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_b_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_b_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .port_b_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a9 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i33~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[2]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[1]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[1]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~0_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~4_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .mixed_port_feed_through_mode = "dont_care";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_first_bit_number = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_a_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_first_bit_number = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .port_b_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a1 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i33~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[2]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[1]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[2]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~0_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~4_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .mixed_port_feed_through_mode = "dont_care";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_first_bit_number = 2;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_a_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_first_bit_number = 2;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .port_b_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a2 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i33~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[2]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[1]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[3]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~0_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~4_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .mixed_port_feed_through_mode = "dont_care";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_first_bit_number = 3;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_a_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_first_bit_number = 3;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .port_b_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a3 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i33~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[2]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[1]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[4]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~0_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~4_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .mixed_port_feed_through_mode = "dont_care";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_first_bit_number = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_a_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_first_bit_number = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .port_b_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a4 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i33~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[2]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[1]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~0_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~4_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .mixed_port_feed_through_mode = "dont_care";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_first_bit_number = 5;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_a_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_first_bit_number = 5;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .port_b_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a5 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i33~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[2]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[1]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[6]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~0_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~4_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .mixed_port_feed_through_mode = "dont_care";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_first_bit_number = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_a_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_first_bit_number = 6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .port_b_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a6 .ram_block_type = "auto";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i33~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[2]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[1]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[7]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~0_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~4_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .mixed_port_feed_through_mode = "dont_care";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_first_bit_number = 7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_a_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_first_bit_number = 7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .port_b_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a7 .ram_block_type = "auto";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~32 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[9]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~37_cout ),
	.sharein(gnd),
	.combout(),
	.sumout(),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~32_cout ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~32 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~32 .lut_mask = 64'h0000000000006996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~32 .shared_arith = "off";

fourteennm_ram_block \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 (
	.clk0(reconfig_clk0),
	.clk1(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.ena0(vcc),
	.ena1(vcc),
	.portaaddrstall(gnd),
	.portaaddrstall2(gnd),
	.portare(vcc),
	.portawe(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i33~combout ),
	.eccencbypass(gnd),
	.portbaddrstall(gnd),
	.portbaddrstall2(gnd),
	.portbre(vcc),
	.portbwe(gnd),
	.portaaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[3]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[2]~q ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[1]~q ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[0]~q }),
	.portaaddr2(1'b0),
	.portabyteenamasks(1'b1),
	.portadatain({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,
gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[0]~q }),
	.eccencparity(1'b0),
	.portbaddr({gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,gnd,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~0_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~2_combout ,
\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~3_combout ,\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~4_combout }),
	.portbaddr2(1'b0),
	.portbbyteenamasks(1'b1),
	.portbdatain(1'b0),
	.portadataout(),
	.portbdataout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0_PORTBDATAOUT_bus ),
	.eccstatus(),
	.dftout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .clk0_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .clk0_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .clk1_input_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .clk1_output_clock_enable = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .data_interleave_offset_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .data_interleave_width_in_bits = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .enable_coherent_read = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .enable_ecc_encoder_bypass = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .enable_force_to_zero = "false";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .logical_ram_name = "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ALTERA_SYNCRAM";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .mixed_port_feed_through_mode = "dont_care";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .operation_mode = "dual_port";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_first_bit_number = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_a_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_address_clock = "clock0";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_address_width = 4;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_data_out_clear = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_data_out_clock = "none";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_data_width = 1;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_first_address = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_first_bit_number = 0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_last_address = 15;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_logical_ram_depth = 16;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .port_b_logical_ram_width = 10;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|ram_block2a0 .ram_block_type = "auto";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~37 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[8]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~42_cout ),
	.sharein(gnd),
	.combout(),
	.sumout(),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~37_cout ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~37 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~37 .lut_mask = 64'h0000000000006996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~37 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~42 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~1_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(),
	.sumout(),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~42_cout ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~42 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~42 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~42 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[14] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~2_combout ),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[14]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[14] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[14] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[10] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~2_combout ),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[10]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[10] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[10] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[18] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~10_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~2_combout ),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[18]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[18] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[18] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[9] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~11_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~2_combout ),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[9] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[7] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~12_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~2_combout ),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[7] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[17] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~13_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~2_combout ),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[17]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[17] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[17] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[16] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~14_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~2_combout ),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[16]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[16] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[16] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[15] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~15_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~2_combout ),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[15]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[15] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[15] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[13] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~16_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~2_combout ),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[13]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[13] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[13] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[8] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~17_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~2_combout ),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[8] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[12] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~18_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~2_combout ),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[12]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[12] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[12] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[11] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~19_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~2_combout ),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[11]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[11] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[11] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~1 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[5]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~37 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~1_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~2 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~1 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~1 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[6]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~37 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~1_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~2 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~1 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~6 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[14]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~77 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~6_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~7 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~6 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~6 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[2]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~17 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~6_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~7 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~6 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~11 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[10]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~52 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~11_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~12 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~11 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~11 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~11 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~16 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~16_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~17 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~16 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~16 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~16 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~21 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~17 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~21_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~22 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~21 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~21 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~21 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~26 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[2]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~22 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~26_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~27 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~26 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~26 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~26 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~31 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[3]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~27 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~31_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~32 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~31 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~31 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~31 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~36 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[4]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~32 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~36_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~37 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~36 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~36 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~36 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~41 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[6]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~2 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~41_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~42 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~41 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~41 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~41 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~11 (
	.dataa(gnd),
	.datab(gnd),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~22 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~11_sumout ),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~11 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~11 .lut_mask = 64'h0000000000000000;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~11 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~46 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[18]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~62 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~46_sumout ),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~46 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~46 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~46 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~16 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[0]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~16_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~17 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~16 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~16 .lut_mask = 64'h0000000000000FF0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~16 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~51 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[9]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~82 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~51_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~52 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~51 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~51 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~51 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~56 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[7]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~42 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~56_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~57 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~56 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~56 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~56 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~21 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[9]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~27 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~21_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~22 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~21 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~21 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~21 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~61 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[17]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~67 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~61_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~62 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~61 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~61 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~61 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~26 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[8]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~32 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~26_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~27 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~26 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~26 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~26 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~66 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[16]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~72 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~66_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~67 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~66 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~66 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~66 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~31 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[7]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~2 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~31_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~32 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~31 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~31 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~31 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~71 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[15]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~7 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~71_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~72 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~71 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~71 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~71 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~36 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[5]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~42 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~36_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~37 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~36 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~36 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~36 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~76 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[13]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~87 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~76_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~77 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~76 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~76 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~76 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~81 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[8]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~57 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~81_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~82 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~81 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~81 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~81 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~41 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[4]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~47 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~41_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~42 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~41 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~41 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~41 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~86 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[12]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~92 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~86_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~87 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~86 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~86 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~86 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~46 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[3]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~7 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~46_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~47 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~46 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~46 .lut_mask = 64'h0000000000000F0F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~46 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~91 (
	.dataa(gnd),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[11]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~12 ),
	.sharein(gnd),
	.combout(),
	.sumout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~91_sumout ),
	.cout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~92 ),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~91 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~91 .lut_mask = 64'h000000000000F0F0;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~91 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_82~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_endofpacket~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~combout ),
	.datag(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET~q ),
	.datah(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full~q ),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_82~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_82~0 .extended_lut = "on";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_82~0 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_82~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|full~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_valid~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_valid~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|in_ready~combout ),
	.datag(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h_channel_adap|out_valid~q ),
	.datah(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[10]~q ),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0 .extended_lut = "on";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~q ),
	.dataf(gnd),
	.datag(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~q ),
	.datah(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg~q ),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~1 .extended_lut = "on";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~1 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~1_combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~3_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i656~0_combout ),
	.datag(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_65~0_combout ),
	.datah(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~4 .extended_lut = "on";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~4 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~4 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~14 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_1~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.dataf(gnd),
	.datag(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_18~combout ),
	.datah(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~14_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~14 .extended_lut = "on";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~14 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~14 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~1_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|prev_irsr_sel_reg[0]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i93~combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo~0_combout ),
	.datag(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~3_combout ),
	.datah(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo~1 .extended_lut = "on";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo~1 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[69] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[69]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[69] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[69] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[1]~0_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i716~0_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full1 .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent|i212 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[69]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full1~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent|i212~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent|i212 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent|i212 .lut_mask = 64'hDFDFDFDFDFDFDFDF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent|i212 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[71] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[71]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[71] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[71] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent|m0_read~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[71]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent|m0_read~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent|m0_read~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent|m0_read~0 .lut_mask = 64'hBFBFBFBFBFBFBFBF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent|m0_read~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[38] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[38]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[38] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[38] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[39] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[39]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[39] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[39] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[40] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~4_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[40]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[40] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[40] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[41] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~5_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[41]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[41] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[41] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[42] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~6_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[42]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[42] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[42] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[43] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~7_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[43]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[43] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[43] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[44] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~8_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[44]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[44] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[44] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[45] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~9_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[45]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[45] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[45] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[46] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~10_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[46]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[46] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[46] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[47] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~11_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[47]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[47] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[47] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[48] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~12_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[48]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[48] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[48] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[49] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~13_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[49]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[49] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[49] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~14_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~15_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~16_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~17_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~18_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~19_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~20_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~21_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[7] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[69] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[69]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[69]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[69] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[69] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~0_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[69] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[69]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[69] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[69] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[69]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[69]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full1~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|strm_waitrequest[0]~1_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240 .lut_mask = 64'hFEFEFEFEFEFEFEFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|read_latency_shift_reg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|i252~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|read_latency_shift_reg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|read_latency_shift_reg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|read_latency_shift_reg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[0]~1_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[1]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[71]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|strm_waitrequest[0]~1_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|read_latency_shift_reg[0]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[0]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[1]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[1]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[1]~0 .lut_mask = 64'hFF7FFF7FFFFF7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[1]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[114] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[114]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[114] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[114] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i716~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full1 .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i716~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full1~q ),
	.datac(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|strm_waitrequest[0]~1_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[114]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full1~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i716~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i716~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i716~0 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i716~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[71] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[71]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[71]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[71] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[71] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[71] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[71]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[71] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[71] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[71]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[71]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~1 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[38] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[38]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[38]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[38] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[38] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[38] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[38]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[38] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[38] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[38]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[38]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~2 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[39] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[39]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[39]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[39] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[39] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[39] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~4_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[39]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[39] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[39] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[39]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[39]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~3 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~3 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[40] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[40]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[40]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[40] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[40] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[40] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~5_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[40]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[40] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[40] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[40]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[40]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~4 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~4 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[41] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[41]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[41]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[41] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[41] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[41] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~6_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[41]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[41] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[41] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[41]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[41]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~5 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~5 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[42] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[42]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[42]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[42] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[42] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[42] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~7_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[42]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[42] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[42] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[42]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[42]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~6 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~6 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[43] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[43]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[43]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[43] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[43] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[43] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~8_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[43]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[43] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[43] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~7 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[43]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[43]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~7 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~7 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~7 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[44] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[44]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[44]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[44] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[44] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[44] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~9_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[44]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[44] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[44] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~8 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[44]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[44]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~8_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~8 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~8 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~8 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[45] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[45]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[45]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[45] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[45] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[45] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~10_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[45]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[45] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[45] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~9 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[45]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[45]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~9_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~9 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~9 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~9 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[46] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[46]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[46]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[46] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[46] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[46] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~11_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[46]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[46] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[46] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~10 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[46]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[46]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~10_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~10 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~10 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~10 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[47] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[47]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[47]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[47] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[47] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[47] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~12_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[47]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[47] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[47] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~11 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[47]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[47]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~11_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~11 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~11 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~11 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[48] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[48]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[48]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[48] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[48] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[48] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~13_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[48]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[48] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[48] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~12 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[48]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[48]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~12_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~12 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~12 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~12 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[49] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[49]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[49]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[49] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[49] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[49] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~14_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[49]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[49] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[49] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~13 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[49]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[49]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~13_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~13 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~13 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~13 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[0]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~15_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~14 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[0]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~14_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~14 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~14 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~14 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[1]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~16_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~15 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~15_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~15 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~15 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~15 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[2]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~17_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[2] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~16 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[2]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~16_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~16 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~16 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~16 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[3]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~18_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[3] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~17 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[3]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~17_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~17 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~17 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~17 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[4]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~19_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[4] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~18 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[4]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~18_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~18 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~18 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~18 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[5]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~20_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[5] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~19 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[5]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[5]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~19_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~19 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~19 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~19 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[6]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~21_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[6] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~20 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[6]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~20_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~20 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~20 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~20 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[7]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[7] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~22_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[7] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~21 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[7]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[7]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~21_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~21 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~21 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~21 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[8] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[8]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[8] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[8] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~23_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[8] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~22 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[8]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[8]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~22_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~22 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~22 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~22 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[9] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[9]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[9] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[9] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~24_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[9] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~23 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[9]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[9]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~23_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~23 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~23 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~23 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[10] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[10]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[10]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[10] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[10] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[10] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~25_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[10]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[10] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[10] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~24 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[10]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[10]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~24_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~24 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~24 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~24 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[11] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[11]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[11]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[11] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[11] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[11] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~26_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[11]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[11] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[11] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~25 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[11]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[11]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~25_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~25 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~25 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~25 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[12] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[12]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[12]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[12] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[12] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[12] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~27_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[12]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[12] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[12] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~26 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[12]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[12]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~26_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~26 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~26 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~26 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[13] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[13]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[13]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[13] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[13] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[13] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~28_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[13]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[13] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[13] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~27 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[13]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[13]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~27_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~27 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~27 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~27 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[14] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[14]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[14]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[14] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[14] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[14] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~29_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[14]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[14] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[14] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~28 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[14]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[14]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~28_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~28 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~28 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~28 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[15] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[15]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[15]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[15] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[15] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[15] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~30_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[15]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[15] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[15] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~29 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[15]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[15]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~29_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~29 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~29 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~29 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[16] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[16]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[16]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[16] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[16] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[16] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~31_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[16]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[16] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[16] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~30 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[16]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[16]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~30_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~30 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~30 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~30 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[17] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[17]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[17]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[17] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[17] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[17] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~32_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[17]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[17] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[17] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~31 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[17]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[17]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~31_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~31 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~31 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~31 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[18] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[18]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[18]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[18] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[18] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[18] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~33_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[18]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[18] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[18] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~32 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[18]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[18]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~32_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~32 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~32 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~32 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[19] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[19]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[19]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[19] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[19] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[19] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~34_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[19]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[19] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[19] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~33 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[19]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[19]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~33_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~33 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~33 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~33 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[20] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[20]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[20]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[20] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[20] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[20] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~35_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[20]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[20] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[20] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~34 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[20]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[20]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~34_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~34 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~34 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~34 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[21] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[21]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[21]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[21] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[21] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[21] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~36_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[21]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[21] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[21] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~35 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[21]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[21]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~35_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~35 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~35 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~35 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[22] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[22]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[22]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[22] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[22] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[22] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~37_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[22]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[22] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[22] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~36 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[22]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[22]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~36_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~36 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~36 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~36 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[23] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[23]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[23]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[23] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[23] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[23] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~38_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[23]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[23] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[23] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~37 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[23]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[23]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~37_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~37 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~37 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~37 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[24] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[24]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[24]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[24] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[24] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[24] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~39_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[24]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[24] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[24] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~38 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[24]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[24]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~38_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~38 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~38 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~38 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[25] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[25]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[25]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[25] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[25] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[25] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~40_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[25]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[25] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[25] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~39 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[25]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[25]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~39_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~39 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~39 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~39 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[26] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[26]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[26]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[26] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[26] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[26] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~41_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[26]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[26] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[26] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~40 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[26]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[26]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~40_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~40 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~40 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~40 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[27] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[27]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[27]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[27] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[27] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[27] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~42_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[27]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[27] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[27] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~41 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[27]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[27]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~41_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~41 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~41 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~41 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[28] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[28]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[28]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[28] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[28] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[28] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~43_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[28]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[28] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[28] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~42 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[28]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[28]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~42_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~42 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~42 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~42 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[29] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[29]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[29]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[29] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[29] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[29] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~44_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[29]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[29] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[29] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~43 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[29]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[29]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~43_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~43 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~43 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~43 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[30] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[30]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[30]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[30] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[30] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[30] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~45_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[30]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[30] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[30] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~44 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[30]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[30]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~44_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~44 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~44 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~44 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[31] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[31]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[31]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[31] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[31] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[31] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~46_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[31]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[31] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[31] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~45 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data0[31]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[31]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~45_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~45 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~45 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~45 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_1~combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i80~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i26~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i93 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i93~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i93 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i93 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i93 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|prev_irsr_sel_reg[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|prev_irsr_sel_reg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|prev_irsr_sel_reg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|prev_irsr_sel_reg[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo~0 .lut_mask = 64'hFDFFFDFFFDFFFDFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~1_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_reg[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i347~1_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_reg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_reg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_reg[1] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Decoder_0~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~4_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~5_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_loopback (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_loopback~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_loopback~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_loopback .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_loopback .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i927~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Decoder_0~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Decoder_0~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|Mux_0~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_loopback~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[0]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|Mux_0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|Mux_0~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|Mux_0~0 .lut_mask = 64'h7FFFFFFFFFFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|Mux_0~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~0 .lut_mask = 64'hD1FFFFFFD1FFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_reg[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|Mux_0~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~1 .lut_mask = 64'hFF7FFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~1_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~2_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i193~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i93~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[0]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[0]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~2 .lut_mask = 64'h6FFFFFFF6FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~2_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~3 .lut_mask = 64'hDFFFDF5FFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i369~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|strm_waitrequest[0]~1_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[114]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full1~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~0 .lut_mask = 64'h47FFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[70] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|write~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[70]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[70] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[70] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|write (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_81~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|write~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|write .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|write .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[70]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|write~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0 .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[114]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full1~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0 .lut_mask = 64'hFFB8FFB8FFB8FFB8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|waitrequest_reset_override (
	.clk(reconfig_clk0),
	.d(vcc),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|waitrequest_reset_override~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|waitrequest_reset_override .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|waitrequest_reset_override .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|i252 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[71]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|strm_waitrequest[0]~1_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|waitrequest_reset_override~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|i252~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|i252 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|i252 .lut_mask = 64'hFFBFFFFFFFBFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|i252 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[0]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|full1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[71]~q ),
	.datad(!\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|strm_waitrequest[0]~1_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|read_latency_shift_reg[0]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[0]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[0]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[0]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[0]~1 .lut_mask = 64'hFF7FBF3FFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[0]~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[113] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[113]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[113] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[113] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[27] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_44~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[26]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[27]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[27] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[27] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[28] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_43~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[26]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[28]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[28] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[28] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[29] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_42~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[26]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[29]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[29] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[29] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[30] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_41~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[26]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[30]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[30] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[30] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[31] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_40~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[26]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[31]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[31] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[31] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[27]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[28]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[29]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[30]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[31]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~0 .lut_mask = 64'hFFFFFFFEFFFFFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[15] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_56~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[15]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[15] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[15] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[16] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_55~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[16]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[16]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[16] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[16] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[17] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_54~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[16]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[17]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[17] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[17] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[18] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_53~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[16]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[18]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[18] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[18] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[19] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_52~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[16]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[19]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[19] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[19] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[20] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_51~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[16]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[20]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[20] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[20] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[15]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[16]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[17]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[18]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[19]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[20]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~1 .lut_mask = 64'hFFFFFFFFFFFFFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[21] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_50~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[16]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[21]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[21] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[21] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[22] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_49~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[16]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[22]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[22] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[22] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[23] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_48~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[16]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[23]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[23] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[23] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[24] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_47~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[26]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[24]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[24] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[24] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[25] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_46~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[26]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[25]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[25] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[25] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[26] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_45~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[26]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[26]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[26] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[26] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[21]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[22]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[23]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[24]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[25]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[26]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~2 .lut_mask = 64'hFFFFFFFFFFFFFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~0_combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~1_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~2_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0 .lut_mask = 64'hFEFEFEFEFEFEFEFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[113]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~1 .lut_mask = 64'hD8D8D8D8D8D8D8D8;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_83~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|write~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~0 .lut_mask = 64'hEEEEEEEEEEEEEEEE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_agent|hold_waitrequest (
	.clk(reconfig_clk0),
	.d(vcc),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_agent|hold_waitrequest~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_agent|hold_waitrequest .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_agent|hold_waitrequest .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|last_dest_id[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|last_dest_id[0]~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|last_dest_id[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|last_dest_id[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|last_dest_id[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|has_pending_responses (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|i408~2_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|has_pending_responses~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|has_pending_responses .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|has_pending_responses .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|suppress_change_dest_id~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|write~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|has_pending_responses~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|suppress_change_dest_id~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|suppress_change_dest_id~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|suppress_change_dest_id~0 .lut_mask = 64'hBBBBBBBBBBBBBBBB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|suppress_change_dest_id~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_agent|hold_waitrequest~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|last_dest_id[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|suppress_change_dest_id~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~1_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~2_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1 .lut_mask = 64'hF7FDFDF7FDF7F7FD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i716~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~0_combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i716~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i716~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i716~0 .lut_mask = 64'hEFEFEFEFEFEFEFEF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i716~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_reset_0|agent_reset~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[71] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[71]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[71] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[71] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[71]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~2 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[38] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[2]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[38]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[38] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[38] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_69~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[2]~3_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[2] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[38]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[2]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~3 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~3 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[39] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[3]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[39]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[39] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[39] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_68~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[2]~3_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[3] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[39]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[3]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~4 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~4 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[40] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[4]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[40]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[40] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[40] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_67~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[2]~3_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[4] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[40]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[4]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~5 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~5 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[41] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[5]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[41]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[41] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[41] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_66~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[2]~3_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[5] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[41]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[5]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~6 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~6 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[42] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[6]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[42]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[42] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[42] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_65~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[2]~3_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[6] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~7 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[42]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[6]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~7 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~7 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~7 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[43] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[7]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[43]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[43] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[43] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_64~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[2]~3_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[7] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~8 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[43]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[7]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~8_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~8 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~8 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~8 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[44] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[44]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[44] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[44] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_63~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~9 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[44]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~9_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~9 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~9 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~9 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[45] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[9]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[45]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[45] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[45] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[9] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_62~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[9] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~10 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[45]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[9]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~10_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~10 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~10 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~10 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[46] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[10]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[46]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[46] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[46] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[10] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_61~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[10]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[10] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[10] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~11 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[46]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[10]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~11_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~11 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~11 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~11 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[47] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[11]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[47]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[47] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[47] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[11] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_60~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[11]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[11] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[11] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~12 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[47]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[11]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~12_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~12 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~12 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~12 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[48] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[12]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[48]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[48] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[48] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[12] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_59~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[12]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[12] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[12] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~13 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[48]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[12]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~13_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~13 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~13 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~13 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[49] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[13]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[49]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[49] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[49] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[13] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_58~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[13]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[13] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[13] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~14 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[49]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[13]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~14_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~14 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~14 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~14 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[0]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~15 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[0]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~15_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~15 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~15 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~15 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[1]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[1]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~16 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~16_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~16 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~16 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~16 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[2]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[2]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[2] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~17 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[2]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~17_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~17 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~17 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~17 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[3]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[3]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[3] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~18 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[3]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~18_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~18 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~18 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~18 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[4]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[4]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[4] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~19 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[4]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~19_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~19 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~19 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~19 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[5]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[5]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[5] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~20 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[5]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[5]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~20_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~20 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~20 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~20 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[6]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[6]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[6] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~21 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[6]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~21_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~21 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~21 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~21 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[7]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[7] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[7]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[7] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~22 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[7]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[7]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~22_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~22 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~22 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~22 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[8] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[8]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[8] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[8] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[8] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~23 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[8]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[8]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~23_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~23 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~23 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~23 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[9] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[9]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[9] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[9] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[1]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[9] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~24 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[9]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[9]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~24_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~24 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~24 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~24 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[10] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[10]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[10]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[10] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[10] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[10] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[2]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[10]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[10] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[10] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~25 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[10]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[10]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~25_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~25 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~25 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~25 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[11] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[11]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[11]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[11] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[11] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[11] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[3]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[11]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[11] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[11] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~26 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[11]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[11]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~26_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~26 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~26 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~26 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[12] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[12]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[12]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[12] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[12] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[12] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[4]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[12]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[12] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[12] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~27 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[12]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[12]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~27_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~27 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~27 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~27 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[13] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[13]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[13]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[13] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[13] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[13] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[5]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[13]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[13] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[13] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~28 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[13]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[13]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~28_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~28 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~28 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~28 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[14] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[14]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[14]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[14] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[14] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[14] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[6]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[14]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[14] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[14] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~29 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[14]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[14]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~29_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~29 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~29 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~29 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[15] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[15]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[15]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[15] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[15] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[15] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[7]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[15]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[15] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[15] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~30 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[15]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[15]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~30_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~30 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~30 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~30 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[16] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[16]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[16]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[16] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[16] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[16] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[16]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[16]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[16] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[16] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~31 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[16]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[16]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~31_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~31 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~31 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~31 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[17] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[17]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[17]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[17] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[17] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[17] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[1]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[16]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[17]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[17] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[17] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~32 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[17]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[17]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~32_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~32 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~32 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~32 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[18] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[18]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[18]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[18] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[18] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[18] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[2]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[16]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[18]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[18] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[18] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~33 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[18]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[18]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~33_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~33 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~33 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~33 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[19] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[19]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[19]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[19] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[19] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[19] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[3]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[16]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[19]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[19] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[19] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~34 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[19]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[19]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~34_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~34 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~34 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~34 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[20] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[20]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[20]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[20] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[20] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[20] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[4]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[16]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[20]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[20] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[20] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~35 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[20]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[20]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~35_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~35 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~35 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~35 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[21] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[21]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[21]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[21] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[21] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[21] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[5]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[16]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[21]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[21] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[21] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~36 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[21]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[21]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~36_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~36 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~36 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~36 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[22] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[22]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[22]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[22] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[22] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[22] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[6]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[16]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[22]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[22] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[22] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~37 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[22]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[22]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~37_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~37 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~37 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~37 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[23] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[23]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[23]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[23] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[23] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[23] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[7]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[16]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[23]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[23] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[23] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~38 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[23]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[23]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~38_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~38 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~38 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~38 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[24] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[24]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[24]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[24] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[24] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[24] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[24]~3_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[24]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[24] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[24] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~39 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[24]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[24]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~39_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~39 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~39 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~39 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[25] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[25]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[25]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[25] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[25] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[25] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[1]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[24]~3_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[25]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[25] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[25] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~40 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[25]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[25]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~40_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~40 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~40 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~40 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[26] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[26]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[26]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[26] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[26] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[26] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[2]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[24]~3_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[26]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[26] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[26] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~41 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[26]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[26]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~41_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~41 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~41 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~41 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[27] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[27]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[27]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[27] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[27] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[27] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[3]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[24]~3_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[27]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[27] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[27] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~42 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[27]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[27]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~42_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~42 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~42 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~42 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[28] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[28]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[28]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[28] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[28] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[28] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[4]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[24]~3_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[28]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[28] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[28] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~43 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[28]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[28]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~43_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~43 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~43 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~43 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[29] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[29]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[29]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[29] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[29] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[29] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[5]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[24]~3_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[29]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[29] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[29] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~44 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[29]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[29]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~44_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~44 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~44 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~44 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[30] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[30]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[30]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[30] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[30] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[30] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[6]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[24]~3_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[30]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[30] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[30] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~45 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[30]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[30]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~45_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~45 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~45 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~45 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[31] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[31]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[31]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[31] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[31] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[31] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[7]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[24]~3_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[31]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[31] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[31] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~46 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data0[31]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[31]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~46_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~46 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~46 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i355~46 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11]~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11]~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11]~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11]~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|core_tdi ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11]~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11]~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~1_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11]~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11]~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11]~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11]~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0~0 .lut_mask = 64'hFFFFFFEFFFFFFFEF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0~1 .lut_mask = 64'hFFFEFFFFFFFEFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0~1_combout ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_1~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_1 .lut_mask = 64'hBBBBBBBBBBBBBBBB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i14~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[12] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i47~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[12]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[12] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[12] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[14] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i51~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[14]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[14] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[14] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i80~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[12]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[14]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i80~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i80~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i80~0 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i80~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i24~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[2] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i26 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[2]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i26~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i26 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i26 .lut_mask = 64'hBBBBBBBBBBBBBBBB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i26 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[7] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i36~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[7] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i28 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[7]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i28~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i28 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i28 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i28 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~0 .lut_mask = 64'hBBBBBBBBBBBBBBBB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i96~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i141~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~2_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0]~0 .lut_mask = 64'h7FFFBFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[5] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i32~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[5] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[5]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[7]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~0 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[5]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[7]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~1 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|core_tdi ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|core_tdi ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~1 .lut_mask = 64'hDFFDFFFFDFFDFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i336 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[2]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i336~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i336 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i336 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i336 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i347~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|core_tdi ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i347~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i347~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i347~0 .lut_mask = 64'h7DFF7DFF7DFF7DFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i347~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0~combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i80~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i80~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i345~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i345~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i345~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i345~0 .lut_mask = 64'h6FFFFFFF6FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i345~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i347~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_reg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i336~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i347~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i345~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i347~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i347~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i347~1 .lut_mask = 64'hDDFFF5FFDDFFF5FF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i347~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Decoder_0~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[5]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[7]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Decoder_0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Decoder_0~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Decoder_0~0 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Decoder_0~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full1 (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i74~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full1 .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_reg[1]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15 .lut_mask = 64'hBBBBBBBBBBBBBBBB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~5_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~5_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i849~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i849~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[1] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i849~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[2] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[2]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_1~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_1 .lut_mask = 64'hBFBFBFBFBFBFBFBF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[1] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[2] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[3] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_18 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[3]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_18~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_18 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_18 .lut_mask = 64'hFFFDFFFDFFFDFFFD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_18 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[8] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[8] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~4_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[1] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~5_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_2~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_2~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_2~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_2~0 .lut_mask = 64'hEEEEEEEEEEEEEEEE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_2~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~7_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[3] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~9_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[4] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[5] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~11_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[5] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[6] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~13_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[6] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[7] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~15_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[7] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[5]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[6]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[7]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~0 .lut_mask = 64'hFFFFFFFEFFFFFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|Select_41~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~14_combout ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|Select_41~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|Select_41~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|Select_41~0 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|Select_41~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[7] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[7] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[2] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|i15~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[2]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|i15~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|i15~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|i15~0 .lut_mask = 64'h9696969696969696;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|i15~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|received_esc (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|received_esc~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|received_esc~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|received_esc .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|received_esc .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~4_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~5_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[5] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~6_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[6] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~7_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[6] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|received_esc~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[5]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[6]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~0 .lut_mask = 64'hFFFBFFFFFFFBFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[7]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|i15~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~0_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~1 .lut_mask = 64'hBFBFBFBFBFBFBFBF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_all_valid (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_all_valid~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_all_valid .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_all_valid .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_17 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[8]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_2~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_17~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_17 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_17 .lut_mask = 64'hEFFFEFFFEFFFEFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_17 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_18~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_2~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~13_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~2 .lut_mask = 64'h8BFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_valid (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_valid~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_valid .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_valid .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[5] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[5]~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[5] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[6] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[6]~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[6] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[7] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[7]~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[7] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[1]~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[1] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[2]~4_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[2] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[3]~5_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[3] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[4]~6_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[4] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[3]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[4]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~0 .lut_mask = 64'hFFFEFFFEFFFEFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[5]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[7]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~1 .lut_mask = 64'hFEFFFEFFFEFFFEFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[12] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[12]~7_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[12]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[12] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[12] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[13] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[13]~8_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[13]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[13] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[13] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[14] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[14]~9_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[14]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[14] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[14] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[15] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[15]~10_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[15]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[15] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[15] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[16] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[16]~11_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[16]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[16] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[16] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[17] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[17]~12_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[17]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[17] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[17] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[18] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[18]~13_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[18]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[18] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[18] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[15]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[16]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[17]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[18]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~0 .lut_mask = 64'hFFFEFFFEFFFEFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[0]~14_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[8] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[8]~15_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[8] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[9] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[9]~16_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[9] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[10] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[10]~17_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[10]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[10] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[10] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[11] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[11]~18_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[11]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[11] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[11] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[8]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[9]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[10]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[11]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~2 .lut_mask = 64'hFFFFFFFEFFFFFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[12]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[13]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[14]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~2_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~3 .lut_mask = 64'hFEFFFFFFFEFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_1~combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~2_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~6_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~12_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~3 .lut_mask = 64'hFFFFFFFEFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|Select_41~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~1_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~2_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~3_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|Select_41~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|Select_41~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|Select_41~1 .lut_mask = 64'h7FFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|Select_41~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full1~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|Select_41~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|Select_41~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~4 .lut_mask = 64'h9F6FFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~4 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0 .lut_mask = 64'hFEFEFEFEFEFEFEFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~5 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~5 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_loopback~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_loopback~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_loopback~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_loopback~0 .lut_mask = 64'hFBFBFBFBFBFBFBFB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_loopback~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_loopback~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|core_tdi ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_loopback~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_loopback~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_loopback~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_loopback~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_loopback~1 .lut_mask = 64'hFDFFDFFFDFFFFDFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_loopback~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i927~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[1] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|dreg[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|dreg[0]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|dreg[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i927~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|dreg[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i927~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i927~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i927~0 .lut_mask = 64'h7FBF7FBF7FBF7FBF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i927~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~1 .lut_mask = 64'hEFEFEFEFEFEFEFEF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~1_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[0]~0 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[0]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[1] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~0 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~2 .lut_mask = 64'hBFBFBFBFBFBFBFBF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~2_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[0]~0 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[0]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[1] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~0 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0]~0 .lut_mask = 64'hFFFF7FFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[1] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~0 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0]~0 .lut_mask = 64'hFFFFFF7FFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~1 .lut_mask = 64'hBBBBBBBBBBBBBBBB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~2 .lut_mask = 64'hBBBBBBBBBBBBBBBB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[3]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i202 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i202~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i202 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i202 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i202 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~4_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i202~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~0 .lut_mask = 64'hFFFFFFFEFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~0 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i202~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~1 .lut_mask = 64'h7FF7FFFF7FF7FFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~1 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i212 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i212~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i212 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i212 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i212 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i212~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~0 .lut_mask = 64'hF7F7F7F7F7F7F7F7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2]~0 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i193~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i93~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i193~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[1]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i193~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i193~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i193~0 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i193~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|i240~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~0 .lut_mask = 64'hFFFBFFFFFFFBFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.WRITE_WAIT (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i781~1_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.WRITE_WAIT~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.WRITE_WAIT .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.WRITE_WAIT .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~3_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~1_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~4_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[8] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[8] ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[8] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|in_ready_0 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i794~2_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|in_ready_0~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|in_ready_0 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|in_ready_0 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_valid (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|empty~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_valid~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_valid .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_valid .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[8]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|in_ready_0~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_valid~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~1 .lut_mask = 64'h7FFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_81~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|write~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.WRITE_WAIT~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~1_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_81~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_81~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_81~0 .lut_mask = 64'hF7FF37FFF7FF37FF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_81~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i716~1_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|waitrequest_reset_override (
	.clk(reconfig_clk0),
	.d(vcc),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|waitrequest_reset_override~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|waitrequest_reset_override .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|waitrequest_reset_override .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[2]~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[2] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[114]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full1~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|waitrequest_reset_override~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[2]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0~0 .lut_mask = 64'hBFFFBF3FFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[3] ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i774~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR1 .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_44~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~1_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_44~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_44~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_44~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_44~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i785~1_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_32~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[11] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_26~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[11]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[11] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[11] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i120~combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~0 .lut_mask = 64'hF7F7F7F7F7F7F7F7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[12] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_25~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[12]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[12] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[12] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[13] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_24~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[13]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[13] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[13] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[14] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_23~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[14]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[14] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[14] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[15] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_22~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[15]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[15] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[15] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[12]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[13]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[14]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[15]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~0 .lut_mask = 64'hFFFEFFFEFFFEFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_37~1_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_36~1_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_35~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_34~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_33~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[4] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[4]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~1 .lut_mask = 64'hFFFFFFFDFFFFFFFD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_31~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_30~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_29~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[9] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_28~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[9] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[10] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_27~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[10]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[10] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[10] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[6]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[9]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[10]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~2 .lut_mask = 64'hFFFFFFFEFFFFFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[5]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[11]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~1_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~2_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~0 .lut_mask = 64'hFFFFFFFFFFFFFF7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[26]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.WRITE_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR1~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[26]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[26]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[26]~0 .lut_mask = 64'hBEFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[26]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[4] ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[4] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_43~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~6_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_43~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_43~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_43~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_43~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[5] ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[5] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_42~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[5]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~11_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_42~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_42~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_42~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_42~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[6] ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[6] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_41~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[6]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~16_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_41~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_41~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_41~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_41~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[7] ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[7] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_40~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[7]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~21_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_40~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_40~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_40~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_40~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR3 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i776~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR3~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR3 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR3 .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_56~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[7]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR3~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~26_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_56~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_56~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_56~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_56~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.WRITE_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR3~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8]~1 .lut_mask = 64'hBFEFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8]~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[0] ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR2 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i775~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR2~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR2 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR2 .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_55~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR2~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~31_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_55~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_55~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_55~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_55~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[16]~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.WRITE_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR2~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[16]~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[16]~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[16]~2 .lut_mask = 64'hBEFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[16]~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[1] ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_54~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR2~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~36_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_54~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_54~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_54~0 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_54~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[2] ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[2] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_53~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR2~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~41_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_53~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_53~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_53~0 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_53~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_52~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR2~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~46_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_52~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_52~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_52~0 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_52~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_51~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR2~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~51_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_51~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_51~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_51~0 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_51~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_50~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR2~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[5]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~56_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_50~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_50~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_50~0 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_50~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_49~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR2~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~61_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_49~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_49~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_49~0 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_49~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_48~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[7]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR2~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~66_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_48~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_48~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_48~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_48~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_47~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~71_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_47~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_47~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_47~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_47~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_46~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~76_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_46~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_46~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_46~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_46~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_45~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~81_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_45~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_45~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_45~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_45~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_ASSERT (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~2_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_ASSERT~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_ASSERT .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_ASSERT .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_CMD_WAIT (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~4_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_CMD_WAIT~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_CMD_WAIT .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_CMD_WAIT .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|full1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|i716~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|full1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|full1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|full1 .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_83~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_ASSERT~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_CMD_WAIT~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|full1~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_83~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_83~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_83~0 .lut_mask = 64'hFFFF7FFFFF7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_83~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|last_dest_id[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|write~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|last_dest_id[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|router|reduce_or_0~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|last_dest_id[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|last_dest_id[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|last_dest_id[0]~0 .lut_mask = 64'h9FFF6FFF9FFF6FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|last_dest_id[0]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|nonposted_cmd_accepted~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|write~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|nonposted_cmd_accepted~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|nonposted_cmd_accepted~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|nonposted_cmd_accepted~0 .lut_mask = 64'hEEEEEEEEEEEEEEEE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|nonposted_cmd_accepted~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~1_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|add_0~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|add_0~1_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|add_0~2_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[111] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[111]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[111] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[111] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|response_accepted (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[111]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|response_accepted~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|response_accepted .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|response_accepted .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|response_accepted .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|i408~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|response_accepted~combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|i408~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|i408~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|i408~0 .lut_mask = 64'hFFFDFFFFFFFDFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|i408~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|i408~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|response_accepted~combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|i408~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|i408~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|i408~1 .lut_mask = 64'hFFFFFFFEFFFFFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|i408~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|i408~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|has_pending_responses~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|nonposted_cmd_accepted~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|i408~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|i408~1_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|i408~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|i408~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|i408~2 .lut_mask = 64'hFFDFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|i408~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[1]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_reset_0|agent_reset~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_reset_0|agent_reset (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_reset_0|agent_reset~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_reset_0|agent_reset~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_reset_0|agent_reset .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_reset_0|agent_reset .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i777~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4 .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_69~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~86_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_69~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_69~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_69~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_69~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[2]~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.WRITE_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[2]~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[2]~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[2]~3 .lut_mask = 64'hBEFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[2]~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_68~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~91_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_68~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_68~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_68~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_68~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_67~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~96_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_67~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_67~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_67~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_67~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_66~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[5]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~101_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_66~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_66~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_66~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_66~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_65~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[6]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~106_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_65~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_65~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_65~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_65~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_64~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[7]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~111_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_64~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_64~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_64~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_64~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_63~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR3~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~116_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_63~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_63~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_63~0 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_63~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_62~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR3~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~121_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_62~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_62~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_62~0 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_62~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_61~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR3~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~126_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_61~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_61~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_61~0 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_61~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_60~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR3~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~131_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_60~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_60~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_60~0 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_60~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_59~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR3~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~136_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_59~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_59~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_59~0 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_59~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_58~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR3~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[5]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~141_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_58~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_58~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_58~0 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_58~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[0]~0 .lut_mask = 64'hFDFDFDFDFDFDFDFD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[0]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[8]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[8]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[8]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[8]~1 .lut_mask = 64'hF7F7F7F7F7F7F7F7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[8]~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[16]~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[16]~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[16]~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[16]~2 .lut_mask = 64'hDFDFDFDFDFDFDFDF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[16]~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[24]~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[24]~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[24]~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[24]~3 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|writedata[24]~3 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[9] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i336~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[9] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i14~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[9]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[2]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i14~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i14~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i14~0 .lut_mask = 64'hFFFBFFFBFFFBFFFB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i14~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[10] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i41~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[10]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[10] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[10] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i47~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[10]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i47~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i47~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i47~0 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i47~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i51 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[13]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i51~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i51 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i51 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i51 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i24~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i24~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i24~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i24~0 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i24~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i36 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[6]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i36~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i36 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i36 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i36 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~1_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i96 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i96~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i96 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i96 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i96 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i141~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i141~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i141~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i141~0 .lut_mask = 64'hFFDFFFDFFFDFFFDF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i141~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~2 .lut_mask = 64'hFFFF6996FFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i32 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i32~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i32 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i32 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i32 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~0 .lut_mask = 64'hFFD7FFFFFF7DFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0~1_combout ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reduce_nor_0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_toggle_flopped (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_toggle_flopped~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_toggle_flopped~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_toggle_flopped .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_toggle_flopped .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_to_out_synchronizer|dreg[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_to_out_synchronizer|dreg[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_to_out_synchronizer|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_to_out_synchronizer|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_to_out_synchronizer|dreg[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter_source_ready (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~5_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter_source_ready~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter_source_ready .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter_source_ready .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i74~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_toggle_flopped~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_to_out_synchronizer|dreg[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter_source_ready~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i74~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i74~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i74~0 .lut_mask = 64'hFF7DFFFFFF7DFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i74~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0 (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~1_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_PADDED (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~6_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_PADDED~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_PADDED .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_PADDED .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_PADDED~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_2~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_18~combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_17~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~0 .lut_mask = 64'hFFFFFFFFEFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_1~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_18~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_17~combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~6 .lut_mask = 64'hF6FFFFFFF6FFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~7 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_all_valid~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~1_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~3_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~7 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~7 .lut_mask = 64'hFF7FBF3FFF7FBF3F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~7 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~5_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[2] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~6_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[2]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~8_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~1 .lut_mask = 64'hFF7FFFFF3F7FFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_PADDED~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~0 .lut_mask = 64'h9696969696969696;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_PADDED~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_18~combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_17~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~0 .lut_mask = 64'hDFFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_PADDED~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_18~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_2~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~5_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~1 .lut_mask = 64'hBFFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_PADDED~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~2 .lut_mask = 64'h7FFFFFFFDFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~3 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_17~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~2_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~3_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~3 .lut_mask = 64'h7FFFFFFFFFFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_sdr~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_reg[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_sdr~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_sdr~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_sdr~0 .lut_mask = 64'hDFDFDFDFDFDFDFDF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_sdr~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_cdr~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_reg[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_cdr~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_cdr~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_cdr~0 .lut_mask = 64'hDFDFDFDFDFDFDFDF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_cdr~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_cdr~0_combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~4 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~4 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_18~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~4 .lut_mask = 64'h7FFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~4 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_sdr~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~4_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~4_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_17~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~5 .lut_mask = 64'hFFEFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~5 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i849~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i849~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i849~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i849~0 .lut_mask = 64'hF7FFF7FFF7FFF7FF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i849~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[0]~0 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[0]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i849~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[1]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i849~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i849~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i849~1 .lut_mask = 64'h7FF7FFFF7FF7FFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i849~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i849~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[1]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[2]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i849~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i849~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i849~2 .lut_mask = 64'hF77F7FF7FFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i849~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~0 .lut_mask = 64'hFDFFFDFFFDFFFDFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[0]~0 .lut_mask = 64'hF7FFFFFFF7FFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[0]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[1]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~1 .lut_mask = 64'hDFFDFFFFDFFDFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[1]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[2]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~2 .lut_mask = 64'hFDDFDFFDFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_7~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[3]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_7~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_7~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_7~0 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_7~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_7~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~3 .lut_mask = 64'hFFDFFFDFFFDFFFDF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i832~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[8]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_2~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_18~combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2]~0 .lut_mask = 64'hFFFFFEFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~1_sumout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2]~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~0 .lut_mask = 64'hFFFFDFFFFFFFDFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2]~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~1 .lut_mask = 64'hFFFFFFFFF7FFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[7]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[1]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[1] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[2]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[2] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i495~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[2]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i495~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i495~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i495~0 .lut_mask = 64'hFEFEFEFEFEFEFEFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i495~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[3]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[3] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[4]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[4] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[5] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[5]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[5] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[6] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[6]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[6] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_6~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[5]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[6]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_6~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_6~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_6~0 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_6~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[8]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_cdr~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i495~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_6~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~1 .lut_mask = 64'hF737FFFFF737FFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_18~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_17~combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~2 .lut_mask = 64'hBF8FBF8FBF8FBF8F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~1_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~6_sumout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~2_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~3 .lut_mask = 64'h9FFF6FFF9FFF6FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~11_sumout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2]~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~4 .lut_mask = 64'hFFFFDFFFFFFFDFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~4 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~16_sumout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2]~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~5 .lut_mask = 64'hFFFFDFFFFFFFDFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~5 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i495~0_combout ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~6 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~7 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~6_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~21_sumout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2]~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~7 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~7 .lut_mask = 64'hFF69FFFFFF96FFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~7 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~8 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i495~0_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~8_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~8 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~8 .lut_mask = 64'h9696969696969696;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~8 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~9 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~8_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~26_sumout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2]~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~9_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~9 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~9 .lut_mask = 64'h69FFFFFF96FFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~9 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~10 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[5]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i495~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~10_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~10 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~10 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~10 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~11 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~10_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~31_sumout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2]~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~11_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~11 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~11 .lut_mask = 64'h69FFFFFF96FFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~11 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~12 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[5]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[6]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i495~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~12_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~12 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~12 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~12 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~13 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~12_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~36_sumout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2]~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~13_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~13 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~13 .lut_mask = 64'h69FFFFFF96FFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~13 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~14 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i495~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_6~0_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~14_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~14 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~14 .lut_mask = 64'h9696969696969696;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~14 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~15 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~14_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_9~41_sumout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[2]~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~15_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~15 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~15 .lut_mask = 64'h69FFFFFF96FFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i846~15 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[0]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[0]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~0 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[7]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter_source_ready~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|i15~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~0 .lut_mask = 64'hFFFFFFBFFFFFFFBF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[7] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[7]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[7] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[7] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[7]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[7] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[7]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[7]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~1 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[1]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[1]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~2 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[2]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[2]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[2] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[2]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~3 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|received_esc~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|received_esc~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter_source_ready~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~1_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|received_esc~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|received_esc~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|received_esc~0 .lut_mask = 64'h7BFF7BFF7BFF7BFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|received_esc~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[3]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[3]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[3] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[3]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~4 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~4 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[4]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[4]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[4] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[4]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~5 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~5 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[5] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[5]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[5] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[5]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[5] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[5]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[5]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~6 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~6 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[6] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[6]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[6] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[6]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[6] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~7 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data0[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_buffer[6]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~7 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~7 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|i34~7 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|decode_header_1 (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i429~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|decode_header_1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|decode_header_1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|decode_header_1 .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_2 (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~6_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_2~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_2 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_2 .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|decode_header_1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_2~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~0 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|core_tdi ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[1] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[14]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[0] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[0]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~1 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_all_valid~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~2 .lut_mask = 64'hAF3FFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_cdr~0_combout ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~1 .lut_mask = 64'hDDDDDDDDDDDDDDDD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_all_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_sdr~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~1_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~6_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|LessThan_0~1_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~2 .lut_mask = 64'h7FFFDFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_reg[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|decode_header_1~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_2~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3 .lut_mask = 64'hDFFFFFFFDFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_1~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~1_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~3_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0 .lut_mask = 64'hFFFFFFFFFFFFFF7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[5]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[5]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~1_sumout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[5]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[5]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[5]~0 .lut_mask = 64'h7FFFDFFF7FFFDFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[5]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[6]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[6]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~6_sumout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[6]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[6]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[6]~1 .lut_mask = 64'h7FFFDFFF7FFFDFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[6]~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[7]~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[7]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~11_sumout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[7]~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[7]~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[7]~2 .lut_mask = 64'h7FDFFFFF7FDFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[7]~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[1]~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~16_sumout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[1]~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[1]~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[1]~3 .lut_mask = 64'h7FFFDFFF7FFFDFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[1]~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[2]~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~21_sumout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[2]~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[2]~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[2]~4 .lut_mask = 64'h7FFFDFFF7FFFDFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[2]~4 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[3]~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~26_sumout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[3]~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[3]~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[3]~5 .lut_mask = 64'h7FFFDFFF7FFFDFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[3]~5 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[4]~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~31_sumout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[4]~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[4]~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[4]~6 .lut_mask = 64'h7FFFDFFF7FFFDFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[4]~6 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[8]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[4] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[12]~7 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[12]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~36_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[12]~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[12]~7 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[12]~7 .lut_mask = 64'hF77F7FF7FFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[12]~7 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[5] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[9]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[5] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[13]~8 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[13]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[5]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~41_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[13]~8_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[13]~8 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[13]~8 .lut_mask = 64'hF77F7FF7FFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[13]~8 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[6] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[10]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[6] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[14]~9 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[14]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~46_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[14]~9_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[14]~9 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[14]~9 .lut_mask = 64'hF77F7FF7FFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[14]~9 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[7] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[11]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[7] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[15]~10 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[15]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[7]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~51_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[15]~10_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[15]~10 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[15]~10 .lut_mask = 64'hF77F7FF7FFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[15]~10 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[8] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[12]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[8] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[16]~11 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[16]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[8]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~56_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[16]~11_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[16]~11 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[16]~11 .lut_mask = 64'hF77F7FF7FFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[16]~11 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[9] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[13]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[9] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[17]~12 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[17]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[9]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~61_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[17]~12_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[17]~12 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[17]~12 .lut_mask = 64'hF77F7FF7FFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[17]~12 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[18]~13 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[18]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~66_sumout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[18]~13_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[18]~13 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[18]~13 .lut_mask = 64'hF7FDFFFFF7FDFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[18]~13 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[0]~14 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~71_sumout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[0]~14_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[0]~14 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[0]~14 .lut_mask = 64'h7FFFF7FF7FFFF7FF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[0]~14 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[4]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[0] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[8]~15 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[8]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~76_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[8]~15_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[8]~15 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[8]~15 .lut_mask = 64'hF77F7FF7FFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[8]~15 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[5]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[1] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[9]~16 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[9]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~81_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[9]~16_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[9]~16 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[9]~16 .lut_mask = 64'hF77F7FF7FFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[9]~16 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[6]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[2] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[10]~17 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[10]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~86_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[10]~17_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[10]~17 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[10]~17 .lut_mask = 64'hF77F7FF7FFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[10]~17 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[7]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[3] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[11]~18 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[11]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i430~3_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i868~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_13~91_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[11]~18_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[11]~18 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[11]~18 .lut_mask = 64'hF77F7FF7FFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[11]~18 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i927~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[2] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2_synchronizer|dreg[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2_synchronizer|dreg[0]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2_synchronizer|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2_synchronizer|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2_synchronizer|dreg[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i927~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2_synchronizer|dreg[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i927~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i927~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i927~1 .lut_mask = 64'h7FBF7FBF7FBF7FBF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i927~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|dreg[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|din_s1~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[2] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~1 .lut_mask = 64'hFBFBFBFBFBFBFBFB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[2] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~1 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[2] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~1 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~5_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[3]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~2 .lut_mask = 64'hF7F7FF77F7F7FF77;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i202~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~2_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~3 .lut_mask = 64'h7FF7FFFF7FF7FFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~3 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~0 .lut_mask = 64'hEFEFEFEFEFEFEFEF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[3]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[3]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[3]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[3]~0 .lut_mask = 64'hDFFFFFFFDFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[3]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i212~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~0 .lut_mask = 64'hFFFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~0_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~0 .lut_mask = 64'hF6F6F6F6F6F6F6F6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~1 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~0_combout ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~1 .lut_mask = 64'hEEEEEEEEEEEEEEEE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i212~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~2 .lut_mask = 64'h96696996FFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~3 .lut_mask = 64'hFF96FF96FF96FF96;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~4 .lut_mask = 64'hFFFF6996FFFF6996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i230~4 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~4_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~1 .lut_mask = 64'h6FFF6FFF6FFF6FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i212~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~1_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~2 .lut_mask = 64'hB1FFB1FFB1FFB1FF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i193~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i93~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[2] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i193~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[2]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i193~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i193~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i193~1 .lut_mask = 64'hBBBBBBBBBBBBBBBB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i193~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~3_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[9] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[9] ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[9] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|in_ready_0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[9]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i781~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_ASSERT~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_CMD_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|full1~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769~combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i781~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i781~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i781~0 .lut_mask = 64'hFFFFFFFEFFFFFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i781~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i781~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.WRITE_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~1_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i781~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i781~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i781~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i781~1 .lut_mask = 64'hFFFF7FFFFFFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i781~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|last_trans (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_39~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|last_trans~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|last_trans .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|last_trans .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_1~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.WRITE_WAIT~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|last_trans~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_1~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_1~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_1~0 .lut_mask = 64'hDDDDDDDDDDDDDDDD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_1~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[4]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|in_ready_0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_valid~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[1]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[3]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[5]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[6]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[7]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[7] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_3~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[3]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[5]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[6]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[7]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_3~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_3~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_3~0 .lut_mask = 64'hFFFFFFFFFFFFFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_3~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_3~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~0 .lut_mask = 64'hDFFFDFFFDFFFDFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~2_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~1 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i246~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[8]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|in_ready_0~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_valid~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i246~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i246~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i246~0 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i246~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_EXTRA (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~3_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_EXTRA~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_EXTRA .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_EXTRA .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_SIZE1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i772~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_SIZE1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_SIZE1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_SIZE1 .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_SIZE2 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i773~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_SIZE2~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_SIZE2 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_SIZE2 .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_7~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR3~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR2~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR1~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_EXTRA~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_SIZE1~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_SIZE2~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_7~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_7~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_7~0 .lut_mask = 64'hFFFFFFFFFFFFFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_7~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~1_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i246~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_7~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~2 .lut_mask = 64'hFFFFFFDFFFFFFFDF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_1~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~2_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~3 .lut_mask = 64'hFBFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_65~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.WRITE_WAIT~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_65~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_65~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_65~0 .lut_mask = 64'hEEEEEEEEEEEEEEEE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_65~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i656~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i656~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i656~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i656~0 .lut_mask = 64'hEEEEEEEEEEEEEEEE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i656~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_65~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i656~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~0 .lut_mask = 64'h9669FFFF6996FFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_3~0_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~0 .lut_mask = 64'hDFDFDFDFDFDFDFDF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.WRITE_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|last_trans~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~1 .lut_mask = 64'hFFF7FFF7FFF7FFF7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~1 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~2 .lut_mask = 64'h9F6FFFFF9F6FFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~2_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_3~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~3 .lut_mask = 64'hF7FFFFFFF7FFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_71~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|internal_out_ready (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|in_ready_0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_valid~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|internal_out_ready~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|internal_out_ready .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|internal_out_ready .lut_mask = 64'hDDDDDDDDDDDDDDDD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|internal_out_ready .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READY (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i770~1_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READY~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READY .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READY .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i794~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READY~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i246~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_7~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i794~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i794~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i794~0 .lut_mask = 64'hFBFFFFFFFBFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i794~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i794~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_3~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i794~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i794~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i794~1 .lut_mask = 64'hFDFFFDFFFDFFFDFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i794~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i794~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_1~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i794~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i794~1_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i794~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i794~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i794~2 .lut_mask = 64'hFBFFFFFFFBFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i794~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|empty (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|reduce_nor_0~combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|empty~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|empty .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|empty .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i716~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|waitrequest_reset_override~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[2]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i716~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i716~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i716~0 .lut_mask = 64'hFBFBFBFBFBFBFBFB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i716~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i716~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[114]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i716~0_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i716~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i716~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i716~1 .lut_mask = 64'hFBFBFBFBFBFBFBFB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i716~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|read_latency_shift_reg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|read_latency_shift_reg[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|read_latency_shift_reg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|read_latency_shift_reg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|read_latency_shift_reg[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~1_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[1]~3_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[71] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i716~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[71]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[71] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[71] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|i222 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|waitrequest_reset_override~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[71]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|i222~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|i222 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|i222 .lut_mask = 64'hF7FFF7FFF7FFF7FF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|i222 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[2]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|read_latency_shift_reg[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[1]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|i222~combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[2]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[2]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[2]~0 .lut_mask = 64'hD7FF7DFFD7FF7DFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[2]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i774~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[9]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_SIZE2~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i774~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i774~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i774~0 .lut_mask = 64'hCF5FFFFFCF5FFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i774~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i785~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769~combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i785~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i785~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i785~1 .lut_mask = 64'hFF7FFF7FFF7FFF7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i785~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_32~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[5]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~1_sumout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~1_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_32~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_32~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_32~0 .lut_mask = 64'h6FFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_32~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_SIZE2~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7]~0 .lut_mask = 64'hF6FFFFFFF6FFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_26~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[3]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~6_sumout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~6_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_26~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_26~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_26~0 .lut_mask = 64'h6FFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_26~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_SIZE1~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8]~1 .lut_mask = 64'hF6FFFFFFF6FFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8]~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[3].u|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[3].u|dreg[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[3].u|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[3].u|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[3].u|dreg[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[4].u|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[4].u|dreg[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[4].u|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[4].u|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[4].u|dreg[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~3_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~4_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~1_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_valid (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~3_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_valid~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_valid .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_valid .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i33 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_valid~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i33~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i33 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i33 .lut_mask = 64'hBBBBBBBBBBBBBBBB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i33 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i33~combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~0 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[2].u|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[2].u|dreg[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[2].u|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[2].u|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[2].u|dreg[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[1]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[2]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~1 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i117 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[2].u|dreg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[3].u|dreg[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[4].u|dreg[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~1_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i117~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i117 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i117 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i117 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~2_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[4] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[4]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i33~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~2 .lut_mask = 64'h6996966996696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[0]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~3 .lut_mask = 64'h9696969696969696;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~3 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[1].u|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[1].u|dreg[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[1].u|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[1].u|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[1].u|dreg[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i116~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[1].u|dreg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[2].u|dreg[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[3].u|dreg[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i116~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i116~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i116~0 .lut_mask = 64'h9696969696969696;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i116~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~4 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~4 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[0].u|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[0].u|dreg[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[0].u|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[0].u|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[0].u|dreg[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i115~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[0].u|dreg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[1].u|dreg[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[2].u|dreg[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[3].u|dreg[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i115~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i115~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i115~0 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i115~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i120~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[4].u|dreg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~3_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i116~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~4_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i115~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i120~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i120~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i120~0 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i120~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i120 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[3].u|dreg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[4].u|dreg[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i117~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_in_wr_ptr[0]~2_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i120~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i120~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i120 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i120 .lut_mask = 64'hFF69FF96FFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i120 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_25~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~11_sumout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~11_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_25~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_25~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_25~0 .lut_mask = 64'h6FFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_25~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_24~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[5]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~16_sumout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~16_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_24~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_24~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_24~0 .lut_mask = 64'h6FFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_24~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_23~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[6]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~21_sumout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~21_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_23~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_23~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_23~0 .lut_mask = 64'h6FFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_23~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_22~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[7]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~26_sumout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~26_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_22~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_22~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_22~0 .lut_mask = 64'h7BFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_22~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_37~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_37~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_37~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_37~0 .lut_mask = 64'hBFBFBFBFBFBFBFBF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_37~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_37~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~31_sumout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~31_sumout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_37~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_37~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_37~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_37~1 .lut_mask = 64'h47FFFFFF47FFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_37~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_36~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_36~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_36~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_36~0 .lut_mask = 64'hBFBFBFBFBFBFBFBF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_36~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_36~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~36_sumout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~36_sumout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_36~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_36~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_36~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_36~1 .lut_mask = 64'h47FFFFFF47FFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_36~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_35~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~41_sumout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~41_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_35~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_35~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_35~0 .lut_mask = 64'h6FFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_35~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_34~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[3]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~46_sumout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~46_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_34~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_34~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_34~0 .lut_mask = 64'h6FFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_34~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_33~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~51_sumout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~51_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_33~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_33~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_33~0 .lut_mask = 64'h6FFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_33~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_31~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[6]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~56_sumout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~56_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_31~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_31~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_31~0 .lut_mask = 64'h6FFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_31~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_30~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[7]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~61_sumout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~61_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_30~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_30~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_30~0 .lut_mask = 64'h7BFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_30~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_29~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_37~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~66_sumout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~66_sumout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_29~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_29~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_29~0 .lut_mask = 64'h47FFFFFF47FFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_29~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_28~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_36~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~71_sumout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~71_sumout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_28~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_28~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_28~0 .lut_mask = 64'h47FFFFFF47FFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_28~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_27~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_4~76_sumout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_0~76_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_27~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_27~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_27~0 .lut_mask = 64'h6FFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_27~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i776~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR3~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR2~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[9]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i776~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i776~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i776~0 .lut_mask = 64'hF377FFFFF377FFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i776~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i775~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR2~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[9]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i775~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i775~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i775~0 .lut_mask = 64'hF377FFFFF377FFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i775~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_ASSERT~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_3~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_7~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~1 .lut_mask = 64'hFF7FFFFF3F7FFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769~combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~1_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~2 .lut_mask = 64'hDFFFDFFFDFFFDFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i779~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_DATA_WAIT (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i784~1_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_DATA_WAIT~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_DATA_WAIT .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_DATA_WAIT .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i656~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~1_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_7~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~0 .lut_mask = 64'hFBFFFBFFFBFFFBFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~1 .lut_mask = 64'hFFFEFFFEFFFEFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READY~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~1_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~1_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_7~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~2 .lut_mask = 64'h7FFFFFFFBFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_DATA_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~2_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~3 .lut_mask = 64'hFEFFFFFFFEFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_ASSERT~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_CMD_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|full1~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769~combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~3_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~4 .lut_mask = 64'hFFFFFFFFFFFFF7D5;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i782~4 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|full1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|read_latency_shift_reg[1]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|full1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|full1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|full1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|read_latency_shift_reg[0]~q ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1 .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|i716~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|i716~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|i716~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|i716~0 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|i716~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~0_combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|response_accepted~combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|nonposted_cmd_accepted~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~0 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|add_0~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|response_accepted~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|add_0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|add_0~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|add_0~0 .lut_mask = 64'h9696969696969696;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|add_0~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|add_0~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|response_accepted~combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|add_0~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|add_0~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|add_0~1 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|add_0~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|add_0~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|response_accepted~combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|add_0~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|add_0~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|add_0~2 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|add_0~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[111] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[0][112]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[111]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[111] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[111] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[111] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem[0][112]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[111]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[111] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[111] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[111]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[111]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~0 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[1] (
	.clk(reconfig_clk0),
	.d(vcc),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_reset_0|agent_reset~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|outpipe1|out_valid (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|rhs1_valid~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|outpipe1|out_valid~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|outpipe1|out_valid .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|outpipe1|out_valid .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|outpipe1|out_payload[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|outpipe1|out_payload[0]~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|outpipe1|out_payload[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|outpipe1|out_payload[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|outpipe1|out_payload[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_reset_0|agent_reset~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_reset_0|agent_reset~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|outpipe1|out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|outpipe1|out_payload[0]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_reset_0|agent_reset~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_reset_0|agent_reset~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_reset_0|agent_reset~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_reset_0|agent_reset~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[5]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i777~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR3~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[9]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i777~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i777~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i777~0 .lut_mask = 64'hF377FFFFF377FFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i777~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[2]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[2] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i43 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[14]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[10]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i43~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i43 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i43 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i43 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i5~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i9 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i9~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i9 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i9 .lut_mask = 64'h9696969696969696;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i9 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i41 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[9]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i41~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i41 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i41 .lut_mask = 64'hBBBBBBBBBBBBBBBB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i41 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i48 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[12]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[13]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i48~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i48 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i48 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i48 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i19 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i19~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i19 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i19 .lut_mask = 64'hDFFFDFFFDFFFDFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i19 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i33 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[5]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[6]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i33~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i33 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i33 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i33 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_toggle_flopped~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_toggle_flopped~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_to_out_synchronizer|dreg[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_toggle_flopped~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_toggle_flopped~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_toggle_flopped~0 .lut_mask = 64'h5353535353535353;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_toggle_flopped~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_to_out_synchronizer|dreg[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_to_out_synchronizer|din_s1~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_to_out_synchronizer|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_to_out_synchronizer|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_to_out_synchronizer|dreg[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_bit_counter[2]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~1 .lut_mask = 64'hFFDFFFDFFFDFFFDF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i837~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_3~2_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~6_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~2 .lut_mask = 64'hFFFFFFFFFFFFFFF7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[8]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_2~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~7_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~3 .lut_mask = 64'hFEFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_all_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~1_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~2_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~3_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~4 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~4 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~4_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~5 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~5 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|din_s1~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_toggle_flopped~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_to_out_synchronizer|dreg[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter_source_ready~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~1 .lut_mask = 64'hFF96FFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full0~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_PADDED~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_cdr~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_17~combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~6 .lut_mask = 64'hFFFFEDFFFFFFDEFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state~6 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~5_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~5_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[3] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[3]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~1_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~6_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~7_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~2 .lut_mask = 64'h5FFF3FFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~2_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~3 .lut_mask = 64'hF7FFF7FFF7FFF7FF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~3 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[7] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[7] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_reg[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7]~0 .lut_mask = 64'hFFFFFFFFFFFFDFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~4_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[3] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~5_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[4] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[5] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~6_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[5] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[6] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~7_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[6] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|take_in_data~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[7]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|take_in_data~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[7] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[1]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|take_in_data~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[2]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|take_in_data~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[3]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|take_in_data~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[4]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|take_in_data~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[5]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|take_in_data~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[6]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|take_in_data~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_buffer[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_1 (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~9_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_1 .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~10_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~11_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~0 .lut_mask = 64'hDDDDDDDDDDDDDDDD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[1] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[2] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[3] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_1~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[3]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~0 .lut_mask = 64'hFFFFFF7FFFFFFF7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i429~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|decode_header_1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_cdr~0_combout ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i429~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i429~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i429~0 .lut_mask = 64'hDDDDDDDDDDDDDDDD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i429~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i429~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i429~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i429~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i429~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i429~1 .lut_mask = 64'hFF7BFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i429~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_2~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~0 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[6] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[6] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[7] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[7] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[7]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~0 .lut_mask = 64'hFEFEFEFEFEFEFEFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_2~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[3]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~0 .lut_mask = 64'hFFFFFFFDFFFFFFFD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_1~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[3]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_2~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~1 .lut_mask = 64'hFFFFFF6FFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[5] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[5] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~4_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[1] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~5_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[2] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~6_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[3] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~7_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[4] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[4]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~2 .lut_mask = 64'hFFFFFFFDFFFFFFFD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[5]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[3]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[4]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~3 .lut_mask = 64'hFFFFFFFFFFFFFFFB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~1_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~3_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~4 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~4 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_2~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_cdr~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~4_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~6 .lut_mask = 64'hF7FFFFFFFFF7FFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~1 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|core_tdi ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[14] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[14]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[14] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[14] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[8] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[9]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[8] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[9] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[10]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[9] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[10] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[11]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[10]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[10] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[10] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[11] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[12]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[11]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[11] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[11] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[12] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[13]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[12]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[12] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[12] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[13] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[14]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[13]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[13] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[13] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[5]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[4] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[5] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[6]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[5] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[6] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[7]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[6] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[7] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[8]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[7] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor_synchronizer|dreg[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor_synchronizer|dreg[0]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor_synchronizer|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor_synchronizer|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor_synchronizer|dreg[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i927~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_debug[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor_synchronizer|dreg[1]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i927~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i927~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i927~2 .lut_mask = 64'hDFFFEFFFDFFFEFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i927~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2_synchronizer|dreg[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2_synchronizer|din_s1~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2_synchronizer|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2_synchronizer|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2_synchronizer|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|din_s1 (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|din_s1~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[3] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~2 .lut_mask = 64'hFBFBFBFBFBFBFBFB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[3] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~2 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~2 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~7_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[3]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[2] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~4 .lut_mask = 64'hF6F9F9F6F6F9F9F6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~4 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i202~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~4_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~5 .lut_mask = 64'h7FF7FFFF7FF7FFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~5 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~1 .lut_mask = 64'hFDFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~6_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~4_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~3 .lut_mask = 64'hFFFFDDF5FFFFDDF5;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i212~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~3_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~4 .lut_mask = 64'hB1FFB1FFB1FFB1FF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~4 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i212~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~0 .lut_mask = 64'hFFFFFFFFFFFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~0_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~0 .lut_mask = 64'h6F6F6F6F6F6F6F6F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~1 .lut_mask = 64'hF7FFFFFFF7FFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~1 .lut_mask = 64'h96FF96FF96FF96FF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~0_combout ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~2 .lut_mask = 64'hBBBBBBBBBBBBBBBB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~3 .lut_mask = 64'h6996FFFF6996FFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~3 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i93~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[3] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i193~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[3]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i193~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i193~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i193~2 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i193~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_CMD_WAIT~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|full1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_DATA_WAIT~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~0 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~1 .lut_mask = 64'hFFEFFFEFFFEFFFEF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[5]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[11]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~1_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~2_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2 .lut_mask = 64'hEFFFFFFFEFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_7~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~2 .lut_mask = 64'hFFF7FFF7FFF7FFF7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769~combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~1_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~2_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~3 .lut_mask = 64'hFFBFFFFFFFBFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i783~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_39~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[8]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR1~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|last_trans~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_39~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_39~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_39~0 .lut_mask = 64'hF7FFF7FFF7FFF7FF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_39~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_3~0_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~1 .lut_mask = 64'hF7F7F7F7F7F7F7F7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.WRITE_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|last_trans~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~1_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~0 .lut_mask = 64'hFFFFFFFDFFFFFFFD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[9]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_7~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~2 .lut_mask = 64'hFFFFFFFFFFFFFFFB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_ASSERT~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_CMD_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|full1~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_EXTRA~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~2 .lut_mask = 64'hFFFEFFFFFFFEFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_WRITE_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[9]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READY~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~2_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~3 .lut_mask = 64'hF7FFFFFFF777FFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i771~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i772~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[9]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_EXTRA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_SIZE1~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i772~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i772~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i772~0 .lut_mask = 64'hAF3FFFFFAF3FFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i772~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i773~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[9]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_SIZE1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_SIZE2~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i773~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i773~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i773~0 .lut_mask = 64'hAF3FFFFFAF3FFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i773~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_valid (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i12~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_valid~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_valid .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_valid .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|full (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i120~combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|full~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|full .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|full .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i33 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|full~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i33~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i33 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i33 .lut_mask = 64'hDDDDDDDDDDDDDDDD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i33 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~3_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~4_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~1_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i13~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|in_ready_0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|empty~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[0]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~0 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~1_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|in_ready_0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|empty~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[0]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[1]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~1 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~2_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[2] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|in_ready_0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|empty~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[0]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[1]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[2]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~2 .lut_mask = 64'h6996966996696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~3_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[3] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|empty~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[3]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|internal_out_ready~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~3 .lut_mask = 64'h6996966996696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i770~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i770~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i770~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i770~0 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i770~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i770~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_WAIT~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READY~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i770~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_nor_2~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i770~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i770~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i770~1 .lut_mask = 64'hFFFFFFFFFFFFBFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i770~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[3].u|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[3].u|dreg[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[3].u|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[3].u|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[3].u|dreg[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[4].u|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[4].u|dreg[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[4].u|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[4].u|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[4].u|dreg[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[2].u|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[2].u|dreg[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[2].u|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[2].u|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[2].u|dreg[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i108 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[2].u|dreg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[3].u|dreg[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[4].u|dreg[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~2_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i108~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i108 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i108 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i108 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~4_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[4] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|add_3~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[3]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|add_3~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|add_3~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|add_3~0 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|add_3~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|empty~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|internal_out_ready~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|add_3~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~4 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~4 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[1].u|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[1].u|dreg[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[1].u|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[1].u|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[1].u|dreg[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i107~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[1].u|dreg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[2].u|dreg[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[3].u|dreg[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i107~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i107~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i107~0 .lut_mask = 64'h9696969696969696;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i107~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[0].u|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[0].u|dreg[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[0].u|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[0].u|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[0].u|dreg[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i106~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[0].u|dreg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[1].u|dreg[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[2].u|dreg[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[3].u|dreg[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i106~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i106~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i106~0 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i106~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|reduce_nor_0~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[4].u|dreg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i107~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i106~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|reduce_nor_0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|reduce_nor_0~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|reduce_nor_0~0 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|reduce_nor_0~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|reduce_nor_0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[3].u|dreg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[4].u|dreg[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~3_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i108~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_out_rd_ptr[0]~4_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|reduce_nor_0~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|reduce_nor_0~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|reduce_nor_0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|reduce_nor_0 .lut_mask = 64'hFFFFFFFF69FF96FF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|reduce_nor_0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|read_latency_shift_reg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|i222~combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|read_latency_shift_reg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|read_latency_shift_reg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|read_latency_shift_reg[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|i222~combout ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~1 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|read_latency_shift_reg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|i222~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~2 .lut_mask = 64'h9696969696969696;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[1]~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|i222~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[1]~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[1]~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[1]~3 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[1]~3 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[71] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[71]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[71]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[71] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[71] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[71]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[71]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[5]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i13~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[3].u|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[3].u|din_s1~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[3].u|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[3].u|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[3].u|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[4].u|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[4].u|din_s1~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[4].u|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[4].u|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[4].u|dreg[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~1 .lut_mask = 64'hFFF7FFF7FFF7FFF7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READY~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_valid~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_65~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i656~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~2 .lut_mask = 64'hFEFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.WRITE_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|last_trans~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~2_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~1_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~3 .lut_mask = 64'hFFBFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~3 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[2].u|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[2].u|din_s1~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[2].u|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[2].u|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[2].u|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[1].u|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[1].u|din_s1~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[1].u|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[1].u|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[1].u|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[0].u|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[0].u|din_s1~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[0].u|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[0].u|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[0].u|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[6]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i13~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[7]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i13~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[7] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[8] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[8]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i13~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[8] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[9] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[9]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i13~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[9] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[14] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_57~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[8]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[14]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[14] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|address[14] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[2]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i13~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[3]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i13~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[4]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i13~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[4] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i784~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR4~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_DATA_WAIT~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|enable~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i778~1_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_7~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i784~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i784~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i784~0 .lut_mask = 64'hFFFFFFFFFFBFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i784~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i784~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_CMD_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|full1~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i769~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i784~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i784~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i784~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i784~1 .lut_mask = 64'hFFFBFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i784~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[0][112] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[0][112]~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[0][112]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[0][112] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[0][112] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem[0][112] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem[0][112]~0_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem[0][112]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem[0][112] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem[0][112] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|inpipe|out_valid (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_channel_adap|out_valid~1_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|inpipe|out_valid~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|inpipe|out_valid .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|inpipe|out_valid .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|inpipe|out_payload[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_channel_adap|out_valid~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|inpipe|out_payload[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|inpipe|out_payload[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|inpipe|out_payload[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|rhs1_valid~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|inpipe|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|inpipe|out_payload[1]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|rhs1_valid~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|rhs1_valid~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|rhs1_valid~0 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|rhs1_valid~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|inpipe|out_payload[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_data~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_channel_adap|out_valid~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|inpipe|out_payload[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|inpipe|out_payload[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|inpipe|out_payload[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|outpipe1|out_payload[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|outpipe1|out_payload[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|inpipe|out_payload[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|rhs1_valid~0_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|outpipe1|out_payload[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|outpipe1|out_payload[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|outpipe1|out_payload[0]~0 .lut_mask = 64'h5353535353535353;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_demux|outpipe1|out_payload[0]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[4]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[5] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~TMSUTAP ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[0]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i5~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i5 .lut_mask = 64'hDDDDDDDDDDDDDDDD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i5 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[1]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i6~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i6 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|i6 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_to_out_synchronizer|din_s1 (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_toggle~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_to_out_synchronizer|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_to_out_synchronizer|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_to_out_synchronizer|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|din_s1 (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(vcc),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~6_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~5_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[4] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~1_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~6_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~7_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~4 .lut_mask = 64'hFFFFFDFFFFFFFDFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~4 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~6_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~4_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~5 .lut_mask = 64'hFFFF7FFF3FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~5 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[8] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i919~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[8] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[8]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~3 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~4 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~4 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[5]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~5 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~5 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~6 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~7 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_control[7]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~7 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~7 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i986~7 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[0] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_toggle (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_toggle~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_toggle~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_toggle .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_toggle .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[5]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_valid (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_valid~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_valid~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_valid .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_valid .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|take_in_data (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_toggle~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_valid~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|take_in_data~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|take_in_data .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|take_in_data .lut_mask = 64'h6F6F6F6F6F6F6F6F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|take_in_data .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[7] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[7] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[1] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[2] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[3] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[4] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[5] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[6] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_payload[6] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~7 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[5]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[6]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~7 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~7 .lut_mask = 64'hFFFEFFFEFFFEFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~7 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~8 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i495~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~7_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~8_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~8 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~8 .lut_mask = 64'hBFFFBFFFBFFFBFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~8 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~1_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~3_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~5 .lut_mask = 64'h7FFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~5 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_length[2]~0_combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[6]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~2_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~8_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~6 .lut_mask = 64'hFFFFFFFFFFFFEFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~7 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~6_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~7 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~7 .lut_mask = 64'hFFFF7FFFFFFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~7 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~9 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~8_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~5_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~7_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~9_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~9 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~9 .lut_mask = 64'hDFFFFFFFFFFFDFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~9 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~10 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_cdr~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~8_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~4_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~10_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~10 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~10 .lut_mask = 64'h7DFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~10 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~11 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_2~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_cdr~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~4_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~11_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~11 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~11 .lut_mask = 64'hF7FFFFFFFFF7FFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state~11 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~0 .lut_mask = 64'hFFFEFFFEFFFEFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0]~0 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~1 .lut_mask = 64'hFFFFFFBEFFFFFFBE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~2 .lut_mask = 64'hFFFFFFFFFFFFEBBE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_1~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in_bit_counter[3]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_1~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_1~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_1~0 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_1~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_1~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~3 .lut_mask = 64'hFFFEFFFEFFFEFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i415~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~1_sumout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~0 .lut_mask = 64'hB77BFFFFB77BFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0]~0 .lut_mask = 64'hF7FFFFFFF7FFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[0]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[7]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~6_sumout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~1 .lut_mask = 64'hB77BFFFFB77BFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[5]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~11_sumout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~2 .lut_mask = 64'hB77BFFFFB77BFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~16_sumout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~3 .lut_mask = 64'hB77BFFFFB77BFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~21_sumout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~4 .lut_mask = 64'hB77BFFFFB77BFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~4 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~26_sumout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~5 .lut_mask = 64'hB77BFFFFB77BFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~5 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~31_sumout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~6 .lut_mask = 64'hB77BFFFFB77BFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~7 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|offset[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_0~36_sumout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~7 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~7 .lut_mask = 64'hB77BFFFFB77BFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i391~7 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~1 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor_synchronizer|dreg[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor_synchronizer|din_s1~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor_synchronizer|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor_synchronizer|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor_synchronizer|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2_synchronizer|din_s1 (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2_synchronizer|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2_synchronizer|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2_synchronizer|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~4_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[4] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~3 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~3 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~4_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[4] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~3 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~3 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[3]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[3] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~6 .lut_mask = 64'hFFFF7FF7FFFF7FF7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~7 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|core_tdi ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mix_writedata[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i202~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~6_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~7 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~7 .lut_mask = 64'h7FF7FFFF7FF7FFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i211~7 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~5 .lut_mask = 64'hEFFFEFFFEFFFEFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~5 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|core_tdi ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i212~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~5_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~6 .lut_mask = 64'hFFFFF7D5FFFFF7D5;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i106~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i212~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~4 .lut_mask = 64'hFFFFFFFF96696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|i98~4 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|core_tdi ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~3 .lut_mask = 64'hDDDDDDDDDDDDDDDD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|i170~3 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[1]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i13~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_payload[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_valid (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i12~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_valid~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_valid .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_valid .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[10] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[10]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[10] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[10] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i12~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|full~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_valid~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[10]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i12~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i12~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i12~0 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i12~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[3].u|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[3].u|dreg[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[3].u|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[3].u|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[3].u|dreg[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[4].u|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[4].u|dreg[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[4].u|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[4].u|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[4].u|dreg[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i33~combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~0 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[2].u|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[2].u|dreg[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[2].u|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[2].u|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[2].u|dreg[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|full~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[1]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[2]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~1 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i117 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[2].u|dreg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[3].u|dreg[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[4].u|dreg[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~1_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i117~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i117 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i117 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i117 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~2_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[4] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[4]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i33~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~2 .lut_mask = 64'h6996966996696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|full~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[0]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~3 .lut_mask = 64'h9696969696969696;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~3 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[1].u|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[1].u|dreg[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[1].u|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[1].u|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[1].u|dreg[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i116~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[1].u|dreg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[2].u|dreg[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[3].u|dreg[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i116~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i116~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i116~0 .lut_mask = 64'h9696969696969696;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i116~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|full~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~4 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~4 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[0].u|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[0].u|dreg[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[0].u|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[0].u|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[0].u|dreg[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i115~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[0].u|dreg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[1].u|dreg[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[2].u|dreg[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[3].u|dreg[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i115~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i115~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i115~0 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i115~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i120~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[4].u|dreg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~3_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i116~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~4_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i115~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i120~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i120~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i120~0 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i120~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i120 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[3].u|dreg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[4].u|dreg[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i117~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|next_in_wr_ptr[0]~2_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i120~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i120~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i120 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i120 .lut_mask = 64'hFF69FF96FFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i120 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_endofpacket~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i13~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|full~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_valid~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[10]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i13~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i13~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i13~0 .lut_mask = 64'hEFFFEFFFEFFFEFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe1|i13~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[3].u|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[3].u|din_s1~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[3].u|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[3].u|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[3].u|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[4].u|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[4].u|din_s1~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[4].u|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[4].u|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[4].u|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[2].u|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[2].u|din_s1~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[2].u|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[2].u|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[2].u|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[1].u|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[1].u|din_s1~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[1].u|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[1].u|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[1].u|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[0].u|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[0].u|din_s1~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[0].u|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[0].u|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[0].u|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[3]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[3].u|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[3]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[3].u|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[3].u|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[3].u|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[4].u|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[4]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[4].u|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[4].u|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[4].u|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[2].u|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[2]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[2].u|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[2].u|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[2].u|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[1].u|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[1]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[1].u|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[1].u|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[1].u|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[0].u|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[0].u|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[0].u|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|read_crosser|sync[0].u|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[4]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|data_out[5]~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[7] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[8] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[6]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[8] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[9] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[7]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[9] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_57~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR3~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_payload[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|add_2~146_sumout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_57~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_57~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_57~0 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_57~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[1]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[2]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[1][112] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[1][112]~1_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[1][112]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[1][112] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[1][112] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[0][112]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|read_latency_shift_reg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[0][112]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[1][112]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[0][112]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[0][112]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[0][112]~0 .lut_mask = 64'hF6FFFFFFF6FFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[0][112]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem[1][112] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|i288~0_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem[1][112]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem[1][112] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem[1][112] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|i288~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem[1][112]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|i288~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|i288~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|i288~0 .lut_mask = 64'hBBBBBBBBBBBBBBBB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|i288~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem[0][112]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|read_latency_shift_reg[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem_used[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem[0][112]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|i288~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem[0][112]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem[0][112]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem[0][112]~0 .lut_mask = 64'h6FFF6FFF6FFF6FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_agent_rsp_fifo|mem[0][112]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[5]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[6]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[7]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[8]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[7] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_valid (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1275~combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_valid~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_valid .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_valid .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[2]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[3]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[4]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[3] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_channel_adap|out_valid~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[3]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_channel_adap|out_valid~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_channel_adap|out_valid~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_channel_adap|out_valid~0 .lut_mask = 64'hFFFDFFFDFFFDFFFD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_channel_adap|out_valid~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_channel_adap|out_valid~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[5]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[6]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[7]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_channel_adap|out_valid~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_channel_adap|out_valid~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_channel_adap|out_valid~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_channel_adap|out_valid~1 .lut_mask = 64'hFFFEFFFFFFFEFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_channel_adap|out_valid~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[1]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_data (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[0]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[7]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_data~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_data .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_data .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[3]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~9_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~5_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~6_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~4_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~6 .lut_mask = 64'h5FFF3FFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i919~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|core_tdi ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i919~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i919~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i919~0 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i919~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_ready (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_toggle~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_valid~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_ready~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_ready .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_ready .lut_mask = 64'hF6F6F6F6F6F6F6F6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_ready .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_toggle~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_toggle~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_valid~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_toggle~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_toggle~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_toggle~0 .lut_mask = 64'hC5C5C5C5C5C5C5C5;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_toggle~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[4]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_valid (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i140~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_valid~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_valid .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_valid .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor_synchronizer|din_s1 (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor_synchronizer|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor_synchronizer|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor_synchronizer|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2 .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[5] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~5_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[5] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[5]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~4 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~4 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[5] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~5_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[5] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[5]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~4 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~4 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|core_tdi ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_startofpacket~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_varchannel (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i72~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i39~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_varchannel~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_varchannel .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_varchannel .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_valid (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_valid~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_valid~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_valid .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_valid .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_valid~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[5]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[2]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[1]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_valid~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_valid~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_valid~0 .lut_mask = 64'hFFFFFFFFFFFFFFFD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_valid~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_esc (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_esc~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_esc~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_esc .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_esc .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[0] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[1] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[2] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[3] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[4] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[5] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[6] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|infer_mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[7] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_ready~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[7] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|reduce_nor_0~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[5]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[6]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[7]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|reduce_nor_0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|reduce_nor_0~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|reduce_nor_0~0 .lut_mask = 64'hFFFF7FFFFFFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|reduce_nor_0~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i94~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_esc~q ),
	.datab(gnd),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|reduce_nor_0~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i94~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i94~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i94~0 .lut_mask = 64'hAFFAFFFFAFFAFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i94~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_valid (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i12~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_valid~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_valid .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_valid .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h_channel_adap|out_valid (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i12~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h_channel_adap|out_valid~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h_channel_adap|out_valid .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h_channel_adap|out_valid .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_sop (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_sop~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_sop~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_sop .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_sop .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~1_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i395 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_sop~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[1]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i395~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i395 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i395 .lut_mask = 64'hBBBBBBBBBBBBBBBB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i395 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~2_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~3_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[4] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|need_esc~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[4]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|need_esc~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|need_esc~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|need_esc~0 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|need_esc~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop~1_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i398 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[0]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i398~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i398 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i398 .lut_mask = 64'hBBBBBBBBBBBBBBBB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i398 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_valid (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i47~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_valid~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_valid .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_valid .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|full (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~3_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|full~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|full .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|full .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h_channel_adap|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|full~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0 .lut_mask = 64'hFDFDFDFDFDFDFDFD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~1_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_channel[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_channel[0]~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_channel[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_channel[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_channel[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[10] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[10]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[10] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[10] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_channel[6] (
	.clk(reconfig_clk0),
	.d(vcc),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_channel[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_channel[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_channel[6] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_channel[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[10]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_channel[6]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0 .lut_mask = 64'hFFFFDFFDFFFFDFFD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_esc (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_esc~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_esc~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_esc .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_esc .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~4_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~5_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~6_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[7] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[8] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~7_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[8] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[9] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~8_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[9] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i392~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_esc~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[5]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[6]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[7]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[8]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[9]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i392~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i392~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i392~0 .lut_mask = 64'hFFFFFFFFBFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i392~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|in_ready (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i395~combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|need_esc~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i398~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i392~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|in_ready~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|in_ready .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|in_ready .lut_mask = 64'hFFFFFFFFFFFFFEFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|in_ready .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i12~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[6]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[7]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_varchannel~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_valid~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i94~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i12~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i12~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i12~0 .lut_mask = 64'hFFFFFEFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i12~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i13 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[6]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[7]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_varchannel~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_valid~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i94~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i13~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i13 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i13 .lut_mask = 64'hFFFFFFFFFFFFFEFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|i13 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[3].u|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[3].u|din_s1~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[3].u|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[3].u|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[3].u|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[4].u|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[4].u|din_s1~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[4].u|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[4].u|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[4].u|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[2].u|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[2].u|din_s1~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[2].u|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[2].u|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[2].u|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[1].u|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[1].u|din_s1~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[1].u|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[1].u|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[1].u|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[0].u|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[0].u|din_s1~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[0].u|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[0].u|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[0].u|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_endofpacket (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i75~1_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i39~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_endofpacket~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_endofpacket .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_endofpacket .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[3].u|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[3]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[3].u|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[3].u|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[3].u|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[4].u|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[4]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[4].u|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[4].u|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[4].u|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[2].u|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[2]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[2].u|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[2].u|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[2].u|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[1].u|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[1]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[1].u|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[1].u|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[1].u|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[0].u|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[0].u|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[0].u|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|write_crosser|sync[0].u|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i152~combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[4]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i151~combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i150~combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|add_3~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr_gray[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|data_out[5]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_esc~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[5]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|data_out[5]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|data_out[5]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|data_out[5]~0 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|data_out[5]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[2][112] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|i634~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[2][112]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[2][112] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[2][112] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|i634~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[2][112]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|i634~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|i634~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|i634~0 .lut_mask = 64'hBBBBBBBBBBBBBBBB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|i634~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[1][112]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_translator|read_latency_shift_reg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[1][112]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|i634~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[1][112]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[1][112]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[1][112]~1 .lut_mask = 64'h96FFFFFF96FFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem[1][112]~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[5] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[5]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[5] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[9] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[9]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[9] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_prev (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[6]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_prev~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_prev .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_prev .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[5]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[6] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[7]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[9]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_prev~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[6]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[7]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[7]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[7]~0 .lut_mask = 64'hBFFBBFFBBFFBBFFB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|mgmt_channel[7]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[6] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[6]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[6] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[7] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[7]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[7] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[8] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[8]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[8] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1275 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[9]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_prev~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[6]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1275~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1275 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1275 .lut_mask = 64'h7D7D7D7D7D7D7D7D;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1275 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[2]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[2] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[3]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[3] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[4]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[4] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[1]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[1] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[2]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[6] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~7_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~5_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[6] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~8 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_inserter|received_esc~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[5]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~2_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~3_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~8_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~8 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~8 .lut_mask = 64'h7DFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~8 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~9 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~14_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~8_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~9_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~9 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~9 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~9 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|full~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write .lut_mask = 64'hDDDDDDDDDDDDDDDD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~3_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~4_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~2_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~1_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~1_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i45 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_toggle~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_valid~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_valid~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i45~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i45 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i45 .lut_mask = 64'hF6FFF6FFF6FFF6FF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i45 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i45~combout ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~0 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~1_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i45~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~1 .lut_mask = 64'h9696969696969696;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~2_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[2] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i45~combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~2 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~3_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[3] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i45~combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~3 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~3 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~4_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[4] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[4]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i45~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~4 .lut_mask = 64'h6996966996696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~4 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~5_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[5] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_1~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[4]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[5]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_1~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_1~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_1~0 .lut_mask = 64'h6996966996696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_1~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[5]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i45~combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_1~0_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~5 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_rd_ptr[0]~5 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[3]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|empty (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i110~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|empty~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|empty .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|empty .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i81~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[3]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i81~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i81~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i81~0 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i81~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|in_data_toggle~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|out_valid~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|internal_out_valid~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[0]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~0 .lut_mask = 64'hF6FFF9FFF9FFF6FF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[1]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[2]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~1 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i81~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[3]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[4]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i81~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i81~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i81~1 .lut_mask = 64'h6996966996696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i81~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[5]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i81~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~1_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_1~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i81~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~2 .lut_mask = 64'hFFFFFFFFDFFFEFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i140~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|empty~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~2_combout ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i140~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i140~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i140~0 .lut_mask = 64'hDDDDDDDDDDDDDDDD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i140~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~2_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[7] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~3_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~4_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~5_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~6_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~7_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~8_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_data[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor (
	.clk(reconfig_clk0),
	.d(vcc),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sensor .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[6] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~6_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[6] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~5 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~5 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[6] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~6_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[6] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~5 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~5 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_startofpacket (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i74~1_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i39~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_startofpacket~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_startofpacket .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_startofpacket .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i50~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_esc~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|reduce_nor_0~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i50~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i50~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i50~0 .lut_mask = 64'hFEFFFFFFFEFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i50~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[5]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_varchannel~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i50~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i94~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[5]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[5]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[5]~0 .lut_mask = 64'hFFFFFF7FFFFFFF7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|out_channel[5]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i72~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_varchannel~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[7]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i50~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i94~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i72~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i72~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i72~0 .lut_mask = 64'h27FF27FF27FF27FF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i72~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i39~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0_combout ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i39~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i39~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i39~0 .lut_mask = 64'hDDDDDDDDDDDDDDDD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i39~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_valid (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i140~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_valid~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_valid .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_valid .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_ready (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0_combout ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_ready~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_ready .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_ready .lut_mask = 64'hEEEEEEEEEEEEEEEE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_ready .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|reduce_nor_3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|reduce_nor_0~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|reduce_nor_3~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|reduce_nor_3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|reduce_nor_3 .lut_mask = 64'hDFFFDFFFDFFFDFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|reduce_nor_3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_esc~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_esc~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|reduce_nor_3~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_esc~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_esc~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_esc~0 .lut_mask = 64'h9F6F9F6F9F6F9F6F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_esc~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i12~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[10]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_valid~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h_channel_adap|out_valid~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|in_ready~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i12~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i12~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i12~0 .lut_mask = 64'hFFFFFFFFDFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i12~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_valid (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|empty~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|internal_out_ready~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_valid~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_valid .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_valid .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|packet_in_progress (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|i36~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|packet_in_progress~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|packet_in_progress .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|packet_in_progress .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_valid~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_valid~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_valid~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_valid~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_valid~0 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_valid~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[8] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[8] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|internal_out_ready~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[8] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i13~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[8]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[0]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~0 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|i36~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h_channel_adap|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|packet_in_progress~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_valid~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|in_ready~combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|i36~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|i36~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|i36~0 .lut_mask = 64'hFF7FF777FF7FF777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|i36~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_valid~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|i36~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~0 .lut_mask = 64'hBFEFBFEFBFEFBFEF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i12~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h_channel_adap|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_valid~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|in_ready~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i12~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i12~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i12~0 .lut_mask = 64'hF7F7F7F7F7F7F7F7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i12~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i392 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|need_esc~0_combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i392~0_combout ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i392~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i392 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i392 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i392 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_sop~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_sop~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i398~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i392~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_sop~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_sop~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_sop~0 .lut_mask = 64'hBF7F7FBFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_sop~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[9] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[9] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|internal_out_ready~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[9] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[1]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i13~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[9]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~1 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i13 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h_channel_adap|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_valid~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|in_ready~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i13~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i13 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i13 .lut_mask = 64'hBFBFBFBFBFBFBFBF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i13 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[1] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|internal_out_ready~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[3]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i13~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[3] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[3]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~2 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[2] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|internal_out_ready~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[4]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i13~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[4] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[4]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~3 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i395~combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop~0 .lut_mask = 64'hFBFBFBFBFBFBFBFB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i392~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop~1 .lut_mask = 64'h7FBF7FBF7FBF7FBF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i47~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h_channel_adap|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|full~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i47~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i47~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i47~0 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i47~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|full~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i45~combout ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~0 .lut_mask = 64'hDDDDDDDDDDDDDDDD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[4]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~0 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[4]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[5]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~1 .lut_mask = 64'h6996966996696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[3]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~2 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[0]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[1]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[2]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~1 .lut_mask = 64'h6996966996696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write~combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i45~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~2_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~2 .lut_mask = 64'hF7FBFFFFF7FBFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|rd_ptr[5]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~1_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~2_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~3 .lut_mask = 64'h6F9F9F6FFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|next_full~3 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i250~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[4]~1_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[3]~2_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[2]~3_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[0]~4_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~5_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|LessThan_0~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[0]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|LessThan_0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|LessThan_0~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|LessThan_0~0 .lut_mask = 64'hFFFFFFFEFFFFFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|LessThan_0~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i247~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_sop~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[0]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i247~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i247~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i247~0 .lut_mask = 64'hFBFFFBFFFBFFFBFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i247~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|need_esc~0_combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i247~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i392~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~0 .lut_mask = 64'hFFFEFFFEFFFEFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|LessThan_0~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~1 .lut_mask = 64'h7DD7FFFFD77DFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_esc~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_esc~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i398~combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i392~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_eop~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_esc~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_esc~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_esc~0 .lut_mask = 64'h7FDF7FDF7FDF7FDF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_esc~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[3] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|internal_out_ready~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[5]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i13~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[5] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[5]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~4 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~4 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[4] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|internal_out_ready~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[6]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i13~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[6] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[6]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~5 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~5 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[5] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|internal_out_ready~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[7]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i13~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[7] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[5]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[7]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~6 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~6 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[6] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|internal_out_ready~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[8] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[8]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i13~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[8] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~7 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[8]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~7 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~7 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~7 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[7] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|internal_out_ready~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[7] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[9] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[9]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i13~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[9] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~8 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[7]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[9]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~8_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~8 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~8 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~8 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[3].u|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[3]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[3].u|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[3].u|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[3].u|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[4].u|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[4]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[4].u|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[4].u|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[4].u|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[2].u|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[2]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[2].u|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[2].u|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[2].u|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[1].u|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[1]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[1].u|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[1].u|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[1].u|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[0].u|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[0].u|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[0].u|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|read_crosser|sync[0].u|din_s1 .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i75~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_esc~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|reduce_nor_0~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i75~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i75~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i75~0 .lut_mask = 64'hFFBFFFFFFFBFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i75~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i75~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_varchannel~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_endofpacket~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i75~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i94~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i75~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i75~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i75~1 .lut_mask = 64'hBFFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i75~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i129~combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[4]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i128~combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i127~combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|add_2~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr_gray[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~1_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[4] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i152 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[4]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i152~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i152 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i152 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i152 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~2_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[2] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i151 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[3]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i151~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i151 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i151 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i151 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~3_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i150 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[2]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i150~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i150 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i150 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i150 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~4_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|add_3~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[1]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|add_3~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|add_3~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|add_3~0 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|add_3~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_reg[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~0 .lut_mask = 64'hFFFFFFFFDFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[9] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~7_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[9] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[4]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[7] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~8_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[7] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[8] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~9_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[8] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[1]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[7] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[7]~11_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[0]~5_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[7] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~7 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[7]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~6_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~4_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~7 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~7 .lut_mask = 64'hFFFF7FFF3FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~7 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[1]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~3 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[2]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~4 .lut_mask = 64'h9696969696969696;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|add_0~4 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~9_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|i13~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[7]~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[7] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i247~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|need_esc~0_combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i247~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i392~0_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i247~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i247~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i247~1 .lut_mask = 64'hFEFEFEFEFEFEFEFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i247~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[7]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i395~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i247~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~1 .lut_mask = 64'hFF7FFFFFFFFFFF7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[2]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[3] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i110~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|empty~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|write~combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i45~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|reduce_nor_0~2_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i110~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i110~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i110~0 .lut_mask = 64'hFFF7FFF7FFF7FFF7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|i110~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[9]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|LessThan_0~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i247~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~2 .lut_mask = 64'hF737FFFFF737FFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i247~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i392~combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~3 .lut_mask = 64'hFFF7FFF7FFF7FFF7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i395~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i398~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i392~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~4 .lut_mask = 64'hFFDDFFF5FFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~4 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[5]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~5 .lut_mask = 64'hDDF5DDF5DDF5DDF5;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~5 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[6]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~6 .lut_mask = 64'hDDF5DDF5DDF5DDF5;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~7 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_esc~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[7]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~7 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~7 .lut_mask = 64'hFFF9FFF6FFF9FFF6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~7 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~8 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[8]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~8_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~8 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~8 .lut_mask = 64'hDDF5DDF5DDF5DDF5;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i258~8 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[5]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[7] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~7_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[7] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[7]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~6 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[7]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~6 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i74~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_esc~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_payload[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|reduce_nor_0~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i74~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i74~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i74~0 .lut_mask = 64'hFFEFFFFFFFEFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i74~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i74~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|received_varchannel~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t_channel_adap|out_startofpacket~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i74~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i94~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i74~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i74~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i74~1 .lut_mask = 64'hBFFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|b2p|i74~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|empty (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i110~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|empty~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|empty .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|empty .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|write~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~1_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|write~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~1_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~2_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~2_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|write~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~3_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[3] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i81~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[3]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i81~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i81~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i81~0 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i81~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~4_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[4] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[4]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~0 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~3_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|write~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~4_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|write~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~0_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|write~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|reduce_nor_0~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[2]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|reduce_nor_0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|reduce_nor_0~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|reduce_nor_0~0 .lut_mask = 64'h6996966996696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|reduce_nor_0~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~5_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[5] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[4]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[5]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~1 .lut_mask = 64'h6996966996696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|reduce_nor_0~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[5]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i81~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|reduce_nor_0~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|reduce_nor_0~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|reduce_nor_0~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|reduce_nor_0~1 .lut_mask = 64'hF6F9FFFFF9F6FFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|reduce_nor_0~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i140~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|empty~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|reduce_nor_0~1_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i140~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i140~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i140~0 .lut_mask = 64'hFFDFFFFFFFDFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i140~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_valid (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|i9~combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_valid~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_valid .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_valid .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|full (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_full~2_combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|full~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|full .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|full .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|write (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|full~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|write~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|write .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|write .lut_mask = 64'hDDDDDDDDDDDDDDDD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|write .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|i9~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~0 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[1]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~1 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[1]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[2]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~2 .lut_mask = 64'h6996966996696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[2]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~2 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[3]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~2_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~3 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~4 .lut_mask = 64'h9FFF6FFF9FFF6FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~4 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[5]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_1~1_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~5 .lut_mask = 64'h9FFF6FFF9FFF6FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_rd_ptr[0]~5 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[1]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|i9~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[2]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|i9~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[3]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|i9~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[4]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|i9~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[5]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|i9~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[6]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|i9~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[7]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|i9~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_data[7] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|empty (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~combout ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|empty~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|empty .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|empty .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|internal_out_ready~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h_channel_adap|out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_valid~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|in_ready~combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|internal_out_ready~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|internal_out_ready~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|internal_out_ready~0 .lut_mask = 64'hFDFFFDFFFDFFFDFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|internal_out_ready~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i13~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[10]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_valid~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h_channel_adap|out_valid~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|in_ready~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i13~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i13~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i13~0 .lut_mask = 64'hFFFFFFFDFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i13~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i250~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i247~1_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i250~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i250~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i250~0 .lut_mask = 64'hF7F7F7F7F7F7F7F7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i250~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|LessThan_0~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|LessThan_0~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|LessThan_0~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|LessThan_0~1 .lut_mask = 64'hFFFEFFFEFFFEFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|LessThan_0~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|LessThan_0~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~0 .lut_mask = 64'hFFFFEFFFFFFFEFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[4]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|LessThan_0~1_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[4]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[4]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[4]~1 .lut_mask = 64'hB77BB77BB77BB77B;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[4]~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[3]~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[3]~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[3]~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[3]~2 .lut_mask = 64'h9669FFFF6996FFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[3]~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[2]~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[2]~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[2]~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[2]~3 .lut_mask = 64'h69FF96FF69FF96FF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[2]~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[0]~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|LessThan_0~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[0]~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[0]~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[0]~4 .lut_mask = 64'hF9F6F6F9F6F9F9F6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[0]~4 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~5 .lut_mask = 64'h9F6F9F6F9F6F9F6F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|channel_count[1]~5 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i152~combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[4]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i151~combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i150~combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|add_3~1_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr_gray[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i129 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[4]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i129~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i129 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i129 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i129 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i128 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[3]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i128~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i128 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i128 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i128 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i127 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[2]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i127~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i127 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i127 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i127 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|add_2~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|in_wr_ptr[1]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|add_2~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|add_2~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|add_2~0 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|add_2~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h_channel_adap|out_valid~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_valid~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|in_ready~combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~5_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~0 .lut_mask = 64'h6996966996696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|empty~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h_channel_adap|out_valid~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_valid~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|in_ready~combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~6_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~1 .lut_mask = 64'h6996966996696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|empty~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|internal_out_ready~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~2 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|empty~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|internal_out_ready~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~3 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h_channel_adap|out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_valid~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[0]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|empty~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|in_ready~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~4 .lut_mask = 64'h6996966996696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~4 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[10] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~10_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[10]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[10] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[10] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~7 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[10]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~7 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~7 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~7 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[3]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[4] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~8 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[8]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~8_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~8 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~8 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~8 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~9 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[9]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~9_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~9 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~9 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~9 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[0]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[7]~10 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_READ_DATA~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_all_valid~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_18~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_17~combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~3_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[7]~10_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[7]~10 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[7]~10 .lut_mask = 64'h9F6FFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[7]~10 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[7]~11 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[7]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[7]~10_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[7]~11_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[7]~11 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[7]~11 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[7]~11 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|mem_rtl_0|auto_generated|altera_syncram_impl1|q_b[0] ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|internal_out_ready~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|out_payload[2]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|i13~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[2] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~9 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_payload[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|outpipe0|out_payload[2]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~9_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~9 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~9 .lut_mask = 64'h2727272727272727;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|selected_payload[0]~9 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[0]~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[13]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|i46~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~0_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[13]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[13]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[13]~0 .lut_mask = 64'hBFBFBFBFBFBFBFBF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[13]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[7]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[7]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[0]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|LessThan_0~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[13]~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[7]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[7]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[7]~1 .lut_mask = 64'hBFFF7FFF7FFFBFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[7]~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[1]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[4]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_udr~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[8] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~8_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[8] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~7 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[8]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~7 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~7 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~7 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i110~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|empty~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|write~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|reduce_nor_0~1_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i110~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i110~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i110~0 .lut_mask = 64'hFFFFDFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i110~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[3]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[4]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~0 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[3]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[4]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[5]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~1 .lut_mask = 64'h6996966996696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[3]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~2 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~3 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~4 .lut_mask = 64'h9696969696969696;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~4 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|edge_detector_register (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[6]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|edge_detector_register~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|edge_detector_register .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|edge_detector_register .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[5]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[6] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|i9 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|edge_detector_register~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[6]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|i9~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|i9 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|i9 .lut_mask = 64'hBBBBBBBBBBBBBBBB;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|i9 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i101~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[3]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i101~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i101~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i101~0 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i101~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_full~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[2]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_full~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_full~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_full~0 .lut_mask = 64'h6996966996696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_full~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_full~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|rd_ptr[5]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|i101~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_full~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|add_0~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_full~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_full~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_full~1 .lut_mask = 64'hFF69FFFFFF96FFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_full~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_full~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|out_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|internal_out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|src_valid~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|full~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_full~1_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|demux|inpipe|in_ready~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_full~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_full~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_full~2 .lut_mask = 64'hDFFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|next_full~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[0]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_valid~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[1]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_valid~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[2]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_valid~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[3]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_valid~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[4]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_valid~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[5] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_data[5]~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_valid~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[6] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[6]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_valid~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[7] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[7]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_valid~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_data_buffer[7] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[3].u|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[3].u|dreg[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[3].u|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[3].u|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[3].u|dreg[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[4].u|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[4].u|dreg[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[4].u|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[4].u|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[4].u|dreg[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[2].u|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[2].u|dreg[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[2].u|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[2].u|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[2].u|dreg[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[1].u|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[1].u|dreg[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[1].u|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[1].u|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[1].u|dreg[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[0].u|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[0].u|dreg[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[0].u|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[0].u|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[0].u|dreg[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|empty~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|internal_out_ready~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~1_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~2_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~3_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~4_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0 .lut_mask = 64'hFFFFFFFFFFF9FFF6;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_endofpacket (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_82~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_endofpacket~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_endofpacket .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_endofpacket .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_startofpacket (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_72~1_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_startofpacket~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_startofpacket .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_startofpacket .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~2_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~5_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~5_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~5_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~8_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~5_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~11_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~5_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~14_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~5_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~17_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~5_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~21_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[7] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i152 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[4]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i152~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i152 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i152 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i152 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i151 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[3]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i151~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i151 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i151 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i151 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i150 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[2]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i150~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i150 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i150 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|i150 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|add_3~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|out_rd_ptr[1]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|add_3~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|add_3~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|add_3~1 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|h2t0_fifo|add_3~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~10 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|core_tdi ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~10_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~10 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~10 .lut_mask = 64'hFDFDFDFDFDFDFDFD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1212~10 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[2]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|din_s1~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[0]~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[10]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|sent_channel_char~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[0]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|LessThan_0~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[13]~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[0]~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[0]~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[0]~2 .lut_mask = 64'h7FFFFFFFF7FFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_varchannel[0]~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[3]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[4] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_udr (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_reg[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_udr~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_udr .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_udr .lut_mask = 64'hDFDFDFDFDFDFDFDF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|virtual_state_udr .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[9] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[9]~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[9] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~8 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[9]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~8_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~8 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~8 .lut_mask = 64'h7F7F7F7F7F7F7F7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i956~8 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[4]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[1]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_valid (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_valid~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_valid .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_valid .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[2]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[1] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[3]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[2] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|received_esc (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|received_esc~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|received_esc~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|received_esc .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|received_esc .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[4]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[3] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[5]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[4] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[5] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[6]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[5] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[6] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[7]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[6] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[7] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|core_tdi ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[7] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|reduce_nor_0~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[5]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[6]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[7]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|reduce_nor_0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|reduce_nor_0~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|reduce_nor_0~0 .lut_mask = 64'hFFFFFDFFFFFFFDFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|reduce_nor_0~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_valid (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|received_esc~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|reduce_nor_0~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_valid~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_valid .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_valid .lut_mask = 64'hFFFFFFFFB77BFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_valid .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_data[5]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[5]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|received_esc~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_data[5]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_data[5]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_data[5]~0 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_data[5]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[3].u|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[3].u|din_s1~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[3].u|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[3].u|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[3].u|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[4].u|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[4].u|din_s1~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[4].u|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[4].u|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[4].u|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[2].u|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[2].u|din_s1~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[2].u|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[2].u|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[2].u|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[1].u|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[1].u|din_s1~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[1].u|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[1].u|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[1].u|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[0].u|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[0].u|din_s1~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[0].u|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[0].u|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[0].u|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|first_trans (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_38~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|first_trans~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|first_trans .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|first_trans .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_72~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_startofpacket~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|first_trans~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_65~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_72~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_72~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_72~0 .lut_mask = 64'hDFFF1FFFDFFF1FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_72~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_72~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.WRITE_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|last_trans~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_72~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|i780~1_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_72~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_72~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_72~1 .lut_mask = 64'hBFFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_72~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_CMD_WAIT~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_DATA_WAIT~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[9]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[17] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[25]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[17]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[17] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[17] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[9] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[17]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[9] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[17]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[9]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~0 .lut_mask = 64'h6FFFFFFF6FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[9]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[1]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~1 .lut_mask = 64'h7FFFFFFFDFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~1_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~2 .lut_mask = 64'h7BFFFFFF7BFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_74~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_CMD_WAIT~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_DATA_WAIT~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_74~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_74~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_74~0 .lut_mask = 64'hFFFEFFFEFFFEFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_74~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~3 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_65~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_74~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~3_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~4 .lut_mask = 64'hFFFFFFFFFFFFFFF7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~4 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|full0~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.WRITE_WAIT~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|last_trans~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~4_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|internal_valid~1_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~5 .lut_mask = 64'hFFFFEFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~5 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[10]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[18] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[26]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[18]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[18] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[18] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[10] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[18]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[10]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[10] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[10] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[18]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[10]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~3 .lut_mask = 64'h6FFFFFFF6FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[10]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~4 .lut_mask = 64'h7FFFFFFFDFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~4 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~3_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~4_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~5 .lut_mask = 64'h7BFFFFFF7BFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~5 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[11]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[19] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[27]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[19]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[19] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[19] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[11] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[19]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[11]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[11] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[11] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[3]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[19]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[11]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~6 .lut_mask = 64'h6FFFFFFF6FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~7 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[3]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[11]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[3]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~7 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~7 .lut_mask = 64'h7FFFFFFFDFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~7 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~8 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[3]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~6_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~7_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~8_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~8 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~8 .lut_mask = 64'h7BFFFFFF7BFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~8 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i194~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[12]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[20] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[28]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[20]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[20] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[20] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[12] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[20]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[12]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[12] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[12] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~9 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[20]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[12]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~9_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~9 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~9 .lut_mask = 64'h6FFFFFFF6FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~9 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~10 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[4]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[12]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[4]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~10_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~10 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~10 .lut_mask = 64'h7FFFFFFFDFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~10 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~11 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~9_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~10_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~11_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~11 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~11 .lut_mask = 64'h7BFFFFFF7BFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~11 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~4_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[13]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[21] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[29]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[21]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[21] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[21] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[13] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[21]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[13]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[13] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[13] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~12 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[5]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[21]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[13]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~12_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~12 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~12 .lut_mask = 64'h6FFFFFFF6FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~12 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~13 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[5]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[13]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[5]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~13_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~13 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~13 .lut_mask = 64'h7FFFFFFFDFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~13 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~14 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[5]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~12_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~13_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~14_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~14 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~14 .lut_mask = 64'h7BFFFFFF7BFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~14 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~5_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[14]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[22] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[30]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[22]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[22] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[22] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[14] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[22]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[14]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[14] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[14] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~15 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[6]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[22]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[14]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~15_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~15 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~15 .lut_mask = 64'h6FFFFFFF6FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~15 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~16 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[6]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[14]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[6]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~16_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~16 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~16 .lut_mask = 64'h7FFFFFFFDFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~16 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~17 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~15_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~16_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~17_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~17 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~17 .lut_mask = 64'h7BFFFFFF7BFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~17 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[9]~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[7] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[15]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[7] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[15] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[23]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[15]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[15] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[15] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[23] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[31]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[23]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[23] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[23] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Mux_52~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[7]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[7]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[15]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[23]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Mux_52~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Mux_52~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Mux_52~0 .lut_mask = 64'h7FFFFFFFFFFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Mux_52~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~18 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[7]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[15]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~18_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~18 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~18 .lut_mask = 64'h6FFF6FFF6FFF6FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~18 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~19 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|full~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Mux_52~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~18_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~19_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~19 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~19 .lut_mask = 64'hBFFFFFFFBFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~19 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~20 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[7]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_65~0_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|reduce_or_74~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~3_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~20_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~20 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~20 .lut_mask = 64'hDFFFDFFFDFFFDFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~20 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~21 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[7]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~19_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~20_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_0~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~21_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~21 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~21 .lut_mask = 64'hFFFF7FFFFFFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~21 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[1]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~24_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~5_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|din_s1~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[2]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[3] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[9]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[9]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~2_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[9]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[9]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[9]~1 .lut_mask = 64'hDFFFFFDFDFFFFFDF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_info[9]~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[3]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[2]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[1] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i483~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i483~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[1] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i483~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[0]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[2] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_valid (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_valid~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_valid .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_valid .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_valid~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0 .lut_mask = 64'hFDFFFDFFFDFFFDFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~0 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[3]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[2] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[4]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[3] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|received_esc~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover_sink_data[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|received_esc~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|reduce_nor_0~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|received_esc~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|received_esc~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|received_esc~0 .lut_mask = 64'h96696996FFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|received_esc~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[5]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[4] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[5] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[6]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[5] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[6] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[7]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[6] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[7] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|core_tdi ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_in[7] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[3].u|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[3]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[3].u|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[3].u|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[3].u|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[4].u|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[4]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[4].u|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[4].u|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[4].u|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[2].u|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[2]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[2].u|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[2].u|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[2].u|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[1].u|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[1]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[1].u|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[1].u|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[1].u|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[0].u|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[0].u|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[0].u|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[0].u|din_s1 .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_38~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.GET_ADDR1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|first_trans~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_38~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_38~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_38~0 .lut_mask = 64'hDFDFDFDFDFDFDFDF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_38~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[1]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[1]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~1 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[9] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i199~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[9] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[25] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i215~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[25]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[25] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[25] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[17] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i207~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[17]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[17] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[17] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[7]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[2]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[2] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[2]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~2 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[10] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i200~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[10]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[10] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[10] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[26] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i216~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[26]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[26] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[26] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[18] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i208~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[18]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[18] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[18] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[3]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[3]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[3] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[3]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[3]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~3 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~3 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[11] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i201~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[11]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[11] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[11] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[27] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i217~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[27]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[27] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[27] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[19] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i209~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[19]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[19] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[19] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[4]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[4] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i194 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[4]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i194~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i194 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i194 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i194 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[12] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i202~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[12]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[12] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[12] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[28] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i218~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[28]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[28] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[28] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[20] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i210~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[20]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[20] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[20] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[5]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[5]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[5] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[5]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[5]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~4 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~4 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[13] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i203~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[13]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[13] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[13] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[29] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i219~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[29]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[29] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[29] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[21] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i211~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[21]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[21] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[21] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[6]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[6]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[6] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[6]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[6]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~5 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~5 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[14] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i204~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[14]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[14] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[14] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[30] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i220~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[30]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[30] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[30] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[22] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i212~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[22]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[22] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[22] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[7]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[7] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[9] (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[7]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[2]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[9]~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[9] .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[9] .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[9] .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[15] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i205~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[15]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[15] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[15] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[23] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i213~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[23]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[23] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[23] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[31] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i221~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[31]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[31] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[31] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[0]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_mgmt[10]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[8]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[16] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[24]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[16]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[16] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[16] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[8] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[16]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[8] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~22 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[16]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|read_data_buffer[8]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~22_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~22 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~22 .lut_mask = 64'h6FFFFFFF6FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~22 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~23 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|current_byte[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|counter[8]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|command[0]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.RETURN_PACKET~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~23_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~23 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~23 .lut_mask = 64'h7FFFFFFFDFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~23 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~24 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|state.READ_SEND_ISSUE~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|out_data[5]~2_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~22_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~23_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~24_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~24 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~24 .lut_mask = 64'h7BFFFFFF7BFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|transacto|p2m|Select_80~24 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_data_toggle_flopped~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|out_to_in_synchronizer|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[1]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[2]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[3] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~1 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i595~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i483~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i483~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i483~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i483~0 .lut_mask = 64'hF7FFF7FFF7FFF7FF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i483~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[0]~0 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[0]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i483~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[1]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i483~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i483~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i483~1 .lut_mask = 64'h7FF7FFFF7FF7FFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i483~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i483~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[1]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[2]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i483~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i483~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i483~2 .lut_mask = 64'hF77F7FF7FFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i483~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[5] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[5] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~4_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~5_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[1] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~6_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[2] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[3] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~7_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[3] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[4] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~8_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[4] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[3]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[4]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~0 .lut_mask = 64'hFFFFFFFEFFFFFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[6] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~9_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[6] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[6]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[18]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[9]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[7]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[17]~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~1 .lut_mask = 64'hFFFFFFFEFFFFFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[16]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[15]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[13]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[8]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[12]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[11]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~2 .lut_mask = 64'hFFFFFFFFFFFFFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[5]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[14]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[10]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~1_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~2_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0 .lut_mask = 64'hFFFFFFFFFFFFFF7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_or_0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i129~combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[4] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[4]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i128~combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i127~combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|add_2~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr_gray[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[1] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~1_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[9] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[9]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[9] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i199 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[9]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i199~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i199 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i199 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i199 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[25] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[25]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[25]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[25] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[25] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i215 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[25]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i215~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i215 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i215 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i215 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[17] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[17]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[17]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[17] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[17] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i207 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[17]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i207~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i207 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i207 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i207 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[7] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~1_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[7] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[2] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~2_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[10] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[10]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[10]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[10] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[10] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i200 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[10]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i200~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i200 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i200 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i200 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[26] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[26]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[26]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[26] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[26] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i216 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[26]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i216~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i216 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i216 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i216 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[18] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[18]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[18]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[18] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[18] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i208 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[18]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i208~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i208 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i208 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i208 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[3] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~2_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[3] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~3_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[3]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[3] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[3] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[11] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[11]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[11]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[11] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[11] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i201 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[11]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i201~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i201 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i201 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i201 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[27] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[27]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[27]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[27] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[27] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i217 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[27]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i217~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i217 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i217 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i217 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[19] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[19]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[19]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[19] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[19] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i209 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[19]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i209~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i209 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i209 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i209 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[4] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~4_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[4]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[4] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[4] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[12] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[12]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[12]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[12] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[12] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i202 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[12]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i202~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i202 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i202 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i202 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[28] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[28]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[28]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[28] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[28] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i218 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[28]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i218~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i218 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i218 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i218 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[20] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[20]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[20]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[20] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[20] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i210 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[20]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i210~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i210 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i210 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i210 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[5] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~3_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[5] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~5_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[5]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[5] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[5] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[13] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[13]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[13]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[13] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[13] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i203 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[13]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i203~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i203 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i203 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i203 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[29] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[29]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[29]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[29] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[29] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i219 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[29]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i219~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i219 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i219 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i219 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[21] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[21]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[21]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[21] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[21] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i211 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[21]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i211~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i211 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i211 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i211 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[6] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~4_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[6] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~6_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[6]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[6] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[6] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[14] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[14]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[14]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[14] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[14] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i204 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[14]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i204~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i204 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i204 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i204 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[30] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[30]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[30]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[30] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[30] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i220 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[30]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i220~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i220 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i220 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i220 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[22] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[22]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[22]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[22] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[22] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i212 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[22]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i212~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i212 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i212 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i212 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[7] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~7_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[7]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[7] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[7] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[15] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[15]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[15]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[15] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[15] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i205 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[15]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i205~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i205 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i205 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i205 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[23] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[23]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[23]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[23] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[23] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i213 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[23]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i213~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i213 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i213 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i213 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[31] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[31]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[31]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[31] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[31] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i221 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[31]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i221~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i221 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i221 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i221 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|din_s1~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[0]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[0]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[0] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2] (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[0]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2]~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2] .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2] .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|src_payload[2] .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[8] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i198~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[8] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[24] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i214~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[24]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[24] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[24] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[16] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i206~combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[16]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[16] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline_001|gen_inst[0].core|data1[16] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[1] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[1]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[2] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~1_sumout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~0 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|decode_header_2 (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i453~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|decode_header_2~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|decode_header_2 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|decode_header_2 .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[18]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_bit_counter[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_valid~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|decode_header_2~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[18]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[18]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[18]~0 .lut_mask = 64'hFFFFFFBFFFFFFFBF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[18]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[18]~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1 .lut_mask = 64'hFFFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[1] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[15]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[1] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[0] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_in[14]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[0] .power_up = "low";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2] (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|core_tdi ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~1_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2] .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~1 .lut_mask = 64'hFF7FFF7FFF7FFF7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~1_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~1_sumout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~6_sumout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~2 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[18]~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~2 .lut_mask = 64'hFEFFFEFFFEFFFEFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|valid_write_data_length_byte_counter[0]~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~6_sumout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~11_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~3 .lut_mask = 64'hF3FF77FFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~16_sumout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~4 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~4 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~21_sumout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~5 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~5 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~26_sumout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~6 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~7 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~31_sumout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~7 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~7 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~7 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~8 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~36_sumout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~8_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~8 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~8 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~8 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~9 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_WRITE_DATA~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~41_sumout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~9_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~9 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~9 .lut_mask = 64'h7FFFFFFF7FFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~9 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~10 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~1_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~11_sumout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~46_sumout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~10_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~10 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~10 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~10 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~11 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~16_sumout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~51_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~11_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~11 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~11 .lut_mask = 64'hD7FF7DFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~11 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~12 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~56_sumout ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~12_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~12 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~12 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~12 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~13 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~1_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~21_sumout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~61_sumout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~13_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~13 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~13 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~13 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~14 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~1_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~26_sumout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~66_sumout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~14_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~14 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~14 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~14 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~15 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~1_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~31_sumout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~71_sumout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~15_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~15 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~15 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~15 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~16 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~36_sumout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~76_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~16_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~16 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~16 .lut_mask = 64'hCF5FFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~16 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~17 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~81_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~17_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~17 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~17 .lut_mask = 64'hEFBFBFEFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~17 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~18 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~41_sumout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~86_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~18_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~18 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~18 .lut_mask = 64'hAF3FFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~18 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~19 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i214~0_combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_3~46_sumout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|add_5~91_sumout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~19_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~19 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~19 .lut_mask = 64'h9F6FFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i480~19 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i129 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[4]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i129~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i129 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i129 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i129 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i128 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[2]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[3]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i128~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i128 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i128 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i128 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i127 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[2]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i127~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i127 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i127 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|i127 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|add_2~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|in_wr_ptr[1]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|add_2~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|add_2~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|add_2~0 .lut_mask = 64'h6666666666666666;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|add_2~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_read_1t (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent|m0_read~0_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_read_1t~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_read_1t .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_read_1t .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[2] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[40]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[2]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[2] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[2] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[38]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[39]~q ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_read_1t~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~0 .lut_mask = 64'hFF7DFF7DFF7DFF7D;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[9] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[9] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[25] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[25]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[25] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[25] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[17] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[17]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[17] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[17] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_read_1t~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~1 .lut_mask = 64'hF7FDF7FDF7FDF7FD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[10] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[10]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[10] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[10] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[26] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[26]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[26] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[26] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[18] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[18]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[18] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[18] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_read_1t~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~2 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[11] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[11]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[11] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[11] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[27] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[27]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[27] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[27] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[19] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[19]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[19] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[19] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[12] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[12]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[12] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[12] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[28] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[28]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[28] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[28] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[20] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[20]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[20] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[20] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_read_1t~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~3 .lut_mask = 64'hDFFFDFFFDFFFDFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~3 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[13] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[13]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[13] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[13] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[29] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[29]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[29] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[29] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[21] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[21]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[21] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[21] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_read_1t~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[0]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~4 .lut_mask = 64'hF7F7F7F7F7F7F7F7;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~4 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[14] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[14]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[14] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[14] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[30] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[30]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[30] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[30] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[22] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[22]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[22] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[22] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[15] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[15]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[15] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[15] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[23] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[23]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[23] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[23] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[31] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[31]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[31] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[31] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle_synchronizer|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~5_combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mgmt_rst_synch_0|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_readdata[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[0] (
	.clk(reconfig_clk0),
	.d(\xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~0_combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[8] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[8]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[8] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i198 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[8]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i198~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i198 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i198 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i198 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[24] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[24]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[24]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[24] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[24] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i214 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[24]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i214~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i214 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i214 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i214 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[16] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[16]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[16]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[16] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[16] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i206 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_003|gen_inst[0].core|data1[16]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i206~combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i206 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i206 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rsp_mux|i206 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|din_s1~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[1] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[0]~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[1]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[1] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[1] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i453~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_2~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_HEADER_1~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_state.ST_BYPASS~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i453~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i453~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i453~0 .lut_mask = 64'hEFEFEFEFEFEFEFEF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i453~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i453~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|decode_header_2~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i453~0_combout ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~0_combout ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i453~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i453~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i453~1 .lut_mask = 64'hFFFFBFEFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i453~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|i15~combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reduce_nor_6~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~0_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~1 .lut_mask = 64'h7FFF7FFF7FFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|write_data_length[2]~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent|m0_read~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent_rsp_fifo|mem_used[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[71]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent|m0_read~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent|m0_read~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent|m0_read~0 .lut_mask = 64'hDFDFDFDFDFDFDFDF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|rom_rom_agent|m0_read~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[40] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~1_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i716~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[40]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[40] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[40] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[38] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~2_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i716~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[38]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[38] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[38] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[39] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~3_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i716~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[39]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[39] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data1[39] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1214~0_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~0_combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle .power_up = "low";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|rom_read_1t~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|read_addr[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~5 .lut_mask = 64'hD77DD77DD77DD77D;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|rom|i19~5 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[8] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[8] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[24] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[24]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[24] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[24] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[16] (
	.clk(reconfig_clk0),
	.d(\~GND~combout ),
	.asdata(vcc),
	.clrn(!reconfig_reset0),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[16]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[16] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|bridge_0_int_master_translator|av_readdata_pre[16] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|din_s1 (
	.clk(reconfig_clk0),
	.d(vcc),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_sense_reset_n_synchronizer|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[0] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|din_s1~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[0]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[0] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|dreg[0] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[40] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[40]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[40]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[40] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[40] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[40]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[40]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~1 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~1 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[38] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[38]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[38]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[38] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[38] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[38]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[38]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~2 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~2 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[39] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[39]~q ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0~q ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[39]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[39] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[39] .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|limiter_pipeline|gen_inst[0].core|data1[39]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|full0~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|data0[39]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~3 .lut_mask = 64'h4747474747474747;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline|gen_inst[0].core|i317~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1214~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_out[10]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.mgmt_toggle~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1214~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1214~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1214~0 .lut_mask = 64'hEEEEEEEEEEEEEEEE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i1214~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|din_s1 (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_valid_buffer~q ),
	.asdata(vcc),
	.clrn(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|din_s1~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|din_s1 .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|crosser|synchronizer|din_s1 .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_valid_buffer (
	.clk(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom~tckutap ),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|idle_remover|out_valid~combout ),
	.asdata(vcc),
	.clrn(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|synchronizer|dreg[1]~q ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_valid_buffer~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_valid_buffer .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|source_crosser|sink_valid_buffer .power_up = "dont_care";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[5]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[6]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[7]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[12]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[13]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|scan_length_byte_counter[14]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~6 .lut_mask = 64'hFFFFFFFFFFFFFFFE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~12 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_valid~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~12_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~12 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~12 .lut_mask = 64'h7777777777777777;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~12 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~13 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_data_all_valid~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[8]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~13_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~13 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~13 .lut_mask = 64'hFDFDFDFDFDFDFDFD;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[5]~13 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[8]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~5 .lut_mask = 64'hEEEEEEEEEEEEEEEE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i870~5 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~8 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|full1~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~1_combout ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|dr_data_out[1]~7_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|sink_crosser|output_stage|data1[1]~q ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~8_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~8 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~8 .lut_mask = 64'hFF7FFF7FFF7FFF7F;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i828~8 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~7 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|read_state.ST_HEADER~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|padded_bit_counter[0]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[1]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[2]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|header_out_bit_counter[3]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~7_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~7 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~7 .lut_mask = 64'hFFFFFFFFFFFFF6FF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i897~7 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~5 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|empty~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_valid~q ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~5_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~5 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~5 .lut_mask = 64'hFFFF7FFFFFFF7FFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~5 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~6 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|select[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_valid~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[0]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[1]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[2]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[3]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~6_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~6 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~6 .lut_mask = 64'hDFFFFFFFFFFFFFFF;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~6 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~8 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[7]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|bypass_bit_counter[5]~q ),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~8_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~8 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~8 .lut_mask = 64'hEEEEEEEEEEEEEEEE;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|i494~8 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[0]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[1].u|dreg[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[0].u|dreg[1]~q ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~0 .lut_mask = 64'h9696969696969696;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[3].u|dreg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[4].u|dreg[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[2]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[1].u|dreg[1]~q ),
	.dataf(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[2].u|dreg[1]~q ),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~1 .lut_mask = 64'h6996966996696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~2 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|out_rd_ptr[2]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[1].u|dreg[1]~q ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[0].u|dreg[1]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~2 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~2 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~2 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~3 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[3].u|dreg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[4].u|dreg[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[2].u|dreg[1]~q ),
	.datae(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~0_combout ),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~3 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~3 .lut_mask = 64'h9669699696696996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~3 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~4 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[3].u|dreg[1]~q ),
	.datab(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|write_crosser|sync[4].u|dreg[1]~q ),
	.datac(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~0_combout ),
	.datad(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|next_out_rd_ptr[0]~1_combout ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~4 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~4 .lut_mask = 64'h6996699669966996;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|t2h0_fifo|reduce_nor_0~4 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3]~q ),
	.datab(gnd),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~0 .lut_mask = 64'hAAAAAAAAAAAAAAAA;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1]~q ),
	.datab(gnd),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~1 .lut_mask = 64'hAAAAAAAAAAAAAAAA;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~1 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~q ),
	.datab(gnd),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~1 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~1 .lut_mask = 64'hAAAAAAAAAAAAAAAA;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|transacto_avalon_master_limiter|pending_response_count[0]~1 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|din_s1~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|has_mgmt.debug_reset_synchronizer|dreg[6]~q ),
	.datab(gnd),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|din_s1~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|din_s1~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|din_s1~0 .lut_mask = 64'hAAAAAAAAAAAAAAAA;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|reset_to_sample_synchronizer|din_s1~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2~q ),
	.datab(gnd),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2~0 .lut_mask = 64'hAAAAAAAAAAAAAAAA;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|jtag|normal.jtag_dc_streaming|jtag_streaming|clock_to_sample_div2~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_channel[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|stfabric|mux|outpipe|out_payload[10]~q ),
	.datab(gnd),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_channel[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_channel[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_channel[0]~0 .lut_mask = 64'hAAAAAAAAAAAAAAAA;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|p2b|stored_channel[0]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~q ),
	.datab(gnd),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~0 .lut_mask = 64'hAAAAAAAAAAAAAAAA;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|t2h_fifo|wr_ptr[0]~0 .shared_arith = "off";

fourteennm_lcell_comb \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~0 (
	.dataa(!\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~q ),
	.datab(gnd),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.datah(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~0 .extended_lut = "off";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~0 .lut_mask = 64'hAAAAAAAAAAAAAAAA;
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|host_link_jtag|h2t_fifo|wr_ptr[0]~0 .shared_arith = "off";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[8] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~22_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[8]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[8] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[8] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[9] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~23_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[9]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[9] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[9] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[10] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~24_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[10]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[10] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[10] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[11] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~25_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[11]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[11] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[11] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[12] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~26_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[12]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[12] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[12] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[13] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~27_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[13]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[13] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[13] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[14] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~28_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[14]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[14] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[14] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[15] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~29_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[15]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[15] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[15] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[16] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~30_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[16]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[16] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[16] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[17] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~31_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[17]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[17] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[17] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[18] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~32_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[18]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[18] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[18] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[19] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~33_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[19]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[19] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[19] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[20] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~34_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[20]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[20] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[20] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[21] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~35_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[21]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[21] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[21] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[22] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~36_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[22]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[22] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[22] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[23] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~37_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[23]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[23] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[23] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[24] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~38_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[24]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[24] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[24] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[25] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~39_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[25]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[25] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[25] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[26] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~40_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[26]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[26] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[26] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[27] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~41_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[27]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[27] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[27] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[28] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~42_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[28]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[28] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[28] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[29] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~43_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[29]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[29] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[29] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[30] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~44_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[30]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[30] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[30] .power_up = "dont_care";

fourteennm_ff \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[31] (
	.clk(reconfig_clk0),
	.d(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i355~45_combout ),
	.asdata(vcc),
	.clrn(vcc),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|i240~combout ),
	.sclr1(gnd),
	.q(\auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[31]~q ));
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[31] .is_wysiwyg = "true";
defparam \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|memfabric|mm_interconnect_0|agent_pipeline_002|gen_inst[0].core|data1[31] .power_up = "dont_care";

assign tx_serial_clk = \xcvr_atx_pll_s10_htile_0|tx_serial_clk ;

assign pll_locked = \xcvr_atx_pll_s10_htile_0|lc_pll_pld_adapt_inst~O_LOCK ;

assign reconfig_readdata0[0] = \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~0_combout ;

assign reconfig_readdata0[1] = \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~1_combout ;

assign reconfig_readdata0[2] = \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~2_combout ;

assign reconfig_readdata0[3] = \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~3_combout ;

assign reconfig_readdata0[4] = \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~4_combout ;

assign reconfig_readdata0[5] = \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~5_combout ;

assign reconfig_readdata0[6] = \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~6_combout ;

assign reconfig_readdata0[7] = \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|expanded_avmm_readdata[0]~7_combout ;

assign reconfig_readdata0[8] = \~GND~combout ;

assign reconfig_readdata0[9] = \~GND~combout ;

assign reconfig_readdata0[10] = \~GND~combout ;

assign reconfig_readdata0[11] = \~GND~combout ;

assign reconfig_readdata0[12] = \~GND~combout ;

assign reconfig_readdata0[13] = \~GND~combout ;

assign reconfig_readdata0[14] = \~GND~combout ;

assign reconfig_readdata0[15] = \~GND~combout ;

assign reconfig_readdata0[16] = \~GND~combout ;

assign reconfig_readdata0[17] = \~GND~combout ;

assign reconfig_readdata0[18] = \~GND~combout ;

assign reconfig_readdata0[19] = \~GND~combout ;

assign reconfig_readdata0[20] = \~GND~combout ;

assign reconfig_readdata0[21] = \~GND~combout ;

assign reconfig_readdata0[22] = \~GND~combout ;

assign reconfig_readdata0[23] = \~GND~combout ;

assign reconfig_readdata0[24] = \~GND~combout ;

assign reconfig_readdata0[25] = \~GND~combout ;

assign reconfig_readdata0[26] = \~GND~combout ;

assign reconfig_readdata0[27] = \~GND~combout ;

assign reconfig_readdata0[28] = \~GND~combout ;

assign reconfig_readdata0[29] = \~GND~combout ;

assign reconfig_readdata0[30] = \~GND~combout ;

assign reconfig_readdata0[31] = \~GND~combout ;

assign reconfig_waitrequest0 = \xcvr_atx_pll_s10_htile_0|alt_xcvr_atx_pll_optional_rcfg_logic|g_arbiter_enable.alt_xcvr_rcfg_arb|strm_waitrequest[0]~0_combout ;

assign pll_cal_busy = \xcvr_atx_pll_s10_htile_0|s10_xcvr_avmm_inst|pld_cal_done[0]~_wirecell_combout ;

assign altera_reserved_tdo = \auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|ext_tdo ;

endmodule
