library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

-- Audio generator module definition
entity aud_gen is
    port (
        aud_clock_12: in std_logic; -- Input clock signal (12 MHz)
        aud_bk: out std_logic;      -- Output clock copy signal
        aud_dalr: out std_logic;    -- Left/right channel sample synchronization signal
        aud_dadat: out std_logic;   -- Audio data output signal
        aud_data_in: in std_logic_vector(31 downto 0) -- Input audio data (32-bit)
    );
end aud_gen;

architecture main of aud_gen is

    -- Internal signals
    signal sample_flag: std_logic := '0';        -- Flag to indicate new sample transmission
    signal data_index: integer range 0 to 31 := 0; -- Index for processing current bit of data
    signal da_data: std_logic_vector(15 downto 0) := (others => '0'); -- Temporary audio data signal
    signal da_data_out: std_logic_vector(31 downto 0) := (others => '0'); -- Output sample data
    signal aud_prscl: integer range 0 to 300 := 0; -- Clock prescaler
    signal clk_en: std_logic := '0';             -- Sample clock enable signal
begin

    -- Copy the input clock signal
    aud_bk <= aud_clock_12;

    -- Main process for generating control signals and sending audio data
    process(aud_clock_12)
    begin
        if falling_edge(aud_clock_12) then -- Triggered on the falling edge of the clock
            aud_dalr <= clk_en; -- Synchronize left/right channel signal

            -- Clock prescaler to generate a 48 kHz frequency
            if (aud_prscl < 250) then
                aud_prscl <= aud_prscl + 1; -- Increment prescaler counter
                clk_en <= '0'; -- Do not enable sample transmission yet
            else
                aud_prscl <= 0; -- Reset prescaler counter
                da_data_out <= aud_data_in; -- Load input audio sample data
                clk_en <= '1'; -- Enable sample transmission
            end if;

            -- Prepare for a new sample transmission when enabled
            if (clk_en = '1') then
                sample_flag <= '1'; -- Set the flag to start transmission
                data_index <= 31; -- Initialize data index to the highest bit
            end if;

            -- Transmit audio data bit by bit
            if (sample_flag = '1') then
                if (data_index > 0) then
                    aud_dadat <= da_data_out(data_index); -- Transmit current bit
                    data_index <= data_index - 1; -- Move to the next bit
                else
                    aud_dadat <= da_data_out(data_index); -- Transmit the last bit
                    sample_flag <= '0'; -- Complete the sample transmission
                end if;
            end if;
        end if;
    end process;

end main;