LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;

entity HEX is
	port( HEXcnt	: in unsigned(3 downto 0);
			HEXOut	: out unsigned(6 downto 0)
	);
end HEX;

architecture behavioral of HEX is 
	
	signal HEXInt : integer;
	
	type SegROM is array (0 to 15) of unsigned(6 downto 0);
	constant segStates : SegROM := (
		0 => "1000000",
		1 => "1111001",
		2 => "0100100",
		3 => "0110000",
		4 => "0011001",
		5 => "0010010",
		6 => "0000010",
		7 => "1111000",
		8 => "0000000",
		9 => "0010000",
		10 => "0001000",
		11 => "0000011",
		12 => "1000110",
		13 => "0100001",
		14 => "0000110",
		15 => "0001110");
	
begin
	
	process(HEXcnt, HEXInt) begin
	
		HEXInt <= to_integer(unsigned(HEXcnt));
		HEXOut <= segStates(HEXInt);
	
	end process;
	
end behavioral;