{
model = "ALTR,q_sys";
compatible = "ALTR,q_sys";
#address-cells = <1>;
#size-cells = <1>;

cpus {
#address-cells = <1>;
#size-cells = <0>;

nios2_gen2_0: cpu@0x0 {
device_type = "cpu";
compatible = "altr,nios2-15.0", "altr,nios2-1.1";
reg = <0x00000000>;
interrupt-controller;
#interrupt-cells = <1>;
altr,exception-addr = <3221225504>; /* embeddedsw.dts.params.altr,exception-addr type NUMBER */
altr,fast-tlb-miss-addr = <3355443200>; /* embeddedsw.dts.params.altr,fast-tlb-miss-addr type NUMBER */
altr,has-div = <1>; /* embeddedsw.dts.params.altr,has-div type NUMBER */
altr,has-initda = <1>; /* embeddedsw.dts.params.altr,has-initda type NUMBER */
altr,has-mmu = <1>; /* embeddedsw.dts.params.altr,has-mmu type NUMBER */
altr,has-mul = <1>; /* embeddedsw.dts.params.altr,has-mul type NUMBER */
altr,implementation = "fast"; /* embeddedsw.dts.params.altr,implementation type STRING */
altr,pid-num-bits = <8>; /* embeddedsw.dts.params.altr,pid-num-bits type NUMBER */
altr,reset-addr = <3221225472>; /* embeddedsw.dts.params.altr,reset-addr type NUMBER */
altr,tlb-num-entries = <256>; /* embeddedsw.dts.params.altr,tlb-num-entries type NUMBER */
altr,tlb-num-ways = <16>; /* embeddedsw.dts.params.altr,tlb-num-ways type NUMBER */
altr,tlb-ptr-sz = <8>; /* embeddedsw.dts.params.altr,tlb-ptr-sz type NUMBER */
clock-frequency = <125000000>; /* embeddedsw.dts.params.clock-frequency type NUMBER */
dcache-line-size = <32>; /* embeddedsw.dts.params.dcache-line-size type NUMBER */
dcache-size = <32768>; /* embeddedsw.dts.params.dcache-size type NUMBER */
icache-line-size = <32>; /* embeddedsw.dts.params.icache-line-size type NUMBER */
icache-size = <32768>; /* embeddedsw.dts.params.icache-size type NUMBER */
}; //end cpu@0x0 (nios2_gen2_0)
}; //end cpus

memory@0 {
device_type = "memory";
reg = <0x08000000 0x00001000 0x00000000 0x07ffffff>;
}; //end memory@0

sopc0: sopc@0 {
device_type = "soc";
ranges;
#address-cells = <1>;
#size-cells = <1>;
compatible = "ALTR,avalon", "simple-bus";
bus-frequency = <125000000>;

jtag_uart_0: serial@0x8002028 {
compatible = "altr,juart-15.0", "altr,juart-1.0";
reg = <0x08002028 0x00000008>;
interrupt-parent = <&nios2_gen2_0>;
interrupts = <2>;
}; //end serial@0x8002028 (jtag_uart_0)

eth_tse_0: ethernet@0x10000000 {
compatible = "altr,tse-15.0", "altr,tse-1.0";
reg = <0x10000000 0x00000400>,
<0x10000440 0x00000040>,
<0x10000400 0x00000040>,
<0x00000000 0x08000000>;
reg-names = "control_port", "rx_csr", "tx_csr", "s1";
interrupt-parent = <&nios2_gen2_0>;
interrupts = <4 3>;
interrupt-names = "rx_irq", "tx_irq";
ALTR,rx-fifo-depth = <2048>; /* embeddedsw.dts.params.ALTR,rx-fifo-depth type NUMBER */
ALTR,tx-fifo-depth = <2048>; /* embeddedsw.dts.params.ALTR,tx-fifo-depth type NUMBER */
rx-fifo-depth = <8192>; /* embeddedsw.dts.params.rx-fifo-depth type NUMBER */
tx-fifo-depth = <8192>; /* embeddedsw.dts.params.tx-fifo-depth type NUMBER */
address-bits = <48>;
max-frame-size = <1518>;
local-mac-address = [00 00 00 00 00 00];
altr,has-supplementary-unicast;
altr,enable-sup-addr = <1>;
altr,has-hash-multicast-filter;
altr,enable-hash = <1>;
phy-mode = "rgmii";
altr,mii-id = <0>;
phy-handle = <&phy0>;
// altr,phy-addr = <0>;

eth_tse_0_mdio: mdio {
compatible = "altr,tse-mdio";
#address-cells = <1>;
#size-cells = <0>;

phy0: ethernet-phy@0 {
reg = <0x0>;
device_type = "ethernet-phy";
};//end ethernet-phy at 0 (phy0)
}; //end mdio (eth_tse_0_mdio)
}; //end ethernet@0x10000000 (eth_tse_0)

sysid_qsys_0: sysid@0x8002020 {
compatible = "altr,sysid-15.0", "altr,sysid-1.0";
reg = <0x08002020 0x00000008>;
id = <0>; /* embeddedsw.dts.params.id type NUMBER */
timestamp = <1442930316>; /* embeddedsw.dts.params.timestamp type NUMBER */
}; //end sysid@0x8002020 (sysid_qsys_0)

timer_0: timer@0x8002000 {
compatible = "altr,timer-15.0", "altr,timer-1.0";
reg = <0x08002000 0x00000020>;
interrupt-parent = <&nios2_gen2_0>;
interrupts = <1>;
clock-frequency = <125000000>; /* embeddedsw.dts.params.clock-frequency type NUMBER */
}; //end timer@0x8002000 (timer_0)

timer_1: timer@0x8002040 {
compatible = "altr,timer-15.0", "altr,timer-1.0";
reg = <0x08002040 0x00000020>;
interrupt-parent = <&nios2_gen2_0>;
interrupts = <0>;
clock-frequency = <125000000>; /* embeddedsw.dts.params.clock-frequency type NUMBER */
}; //end timer@0x8002040 (timer_1)
}; //end sopc@0 (sopc0)

chosen {
bootargs = "debug console=ttyJ0,115200";
}; //end chosen
}; //end /