-- *************************************************************************** -- QuadCore9400 Processor Core Boundary Scan Descriptor Language -- (BSDL) Model, Version 0.1 -- -- -- -- -- *************************************************************************** -- Information in this document is provided in connection with Intel products. -- No license, express or implied, by estoppel or otherwise, to any -- intellectual property rights is granted by this document. Except as -- provided in Intel's Terms and Conditions of Sale for such products, -- Intel assumes no liability whatsoever, and Intel disclaims any express or -- implied warranty, relating to sale and/or use of Intel products including -- liability or warranties relating to fitness for a particular purpose, -- merchantability, or infringement of any patent, copyright or other -- intellectual property right. Intel products are not intended for use in -- medical, life saving, or life sustaining applications. -- -- Intel may make changes to specifications and product descriptions at any -- time, without notice. -- -- The SKYLAKES SERVER XCC processor may contain design defects or errors -- known as errata which may cause the product to deviate from published -- specifications. Current characterized errata are available on request. -- -- Contact your local Intel sales office or your distributor to obtain the -- latest specifications and before placing your product order. -- -- Copyright (c) Intel Corporation 2013. Third-party brands and names are the -- property of their respective owners. -- *************************************************************************** -- -- Version 0.1 03/2015 by lsu2 (Liying Su) -- - Initial version. My first ever BSDL. -- verified syntactically correct with http://goto/bsdlchecker -- -- *************************************************************************** -- entity SKX_XCC is generic(PHYSICAL_PIN_MAP : string := "LGA"); port ( BCLK0_DN : in bit; BCLK0_DP : in bit; BCLK1_DN : in bit; BCLK1_DP : in bit; BCLK2_DN : in bit; BCLK2_DP : in bit; BMCINIT : in bit; CATERR_N : out bit; CD_CLKOBS_DN_0 : linkage bit; CD_CLKOBS_DN_1 : linkage bit; CD_CLKOBS_DP_0 : linkage bit; CD_CLKOBS_DP_1 : linkage bit; CD_EXT_REFCLK_DN : linkage bit; CD_EXT_REFCLK_DP : linkage bit; CD_HFI0_I2CCLK : linkage bit; CD_HFI0_I2CDAT : linkage bit; CD_HFI0_INT_N : linkage bit; CD_HFI0_LED_N : linkage bit; CD_HFI0_MODPRST_N : linkage bit; CD_HFI0_RESET_N : linkage bit; CD_HFI1_I2CCLK : linkage bit; CD_HFI1_I2CDAT : linkage bit; CD_HFI1_INT_N : linkage bit; CD_HFI1_LED_N : linkage bit; CD_HFI1_MODPRST_N : linkage bit; CD_HFI1_RESET_N : linkage bit; CD_HFI_REFCLK_DN : linkage bit; CD_HFI_REFCLK_DP : linkage bit; CD_PE_REFCLK_DN : linkage bit; CD_PE_REFCLK_DP : linkage bit; CD_PLL_RESET_N : linkage bit; CD_POR_N : linkage bit; CD_TCLK : linkage bit; CD_TDI : linkage bit; CD_TDO : linkage bit; CD_TMS : linkage bit; CD_TRST_N : linkage bit; CD_TR_TCK : linkage bit; CD_VCCE_1P0 : linkage bit_vector(5 downto 0); CD_VCCH_1P8 : linkage bit_vector(3 downto 0); CD_VCCH_2P5 : linkage bit_vector(2 downto 0); CD_VCCP_1P0 : linkage bit_vector(9 downto 0); CD_VCCP_SENSE_DP : linkage bit; CD_VCC_CORE : linkage bit_vector(12 downto 0); CD_VCC_CORE_SENSE_DP : linkage bit; CD_VSS_VCCP_SENSE_DN : linkage bit; CD_VSS_VCC_CORE_SENSE_DN : linkage bit; CGU_AMONI : linkage bit; CGU_AMONV : linkage bit; DDR012_DRAM_PWR_OK : in bit; DDR012_MEMHOT_N : inout bit; DDR012_RCOMP_0 : linkage bit; DDR012_RCOMP_1 : linkage bit; DDR012_RCOMP_2 : linkage bit; DDR012_RESET_N : out bit; DDR012_SPDSCL : inout bit; DDR012_SPDSDA : inout bit; DDR012_VIEWDIG_0 : linkage bit; DDR012_VIEWDIG_1 : linkage bit; DDR0_ACT_N : out bit; DDR0_ALERT_N : in bit; DDR0_BA_0 : out bit; DDR0_BA_1 : out bit; DDR0_BG_0 : out bit; DDR0_BG_1 : out bit; DDR0_CAVREF : linkage bit; DDR0_CKE_0 : out bit; DDR0_CKE_1 : inout bit; DDR0_CKE_2 : out bit; DDR0_CKE_3 : inout bit; DDR0_CLK_DN_0 : inout bit; DDR0_CLK_DN_1 : inout bit; DDR0_CLK_DN_2 : inout bit; DDR0_CLK_DN_3 : inout bit; DDR0_CLK_DP_0 : inout bit; DDR0_CLK_DP_1 : inout bit; DDR0_CLK_DP_2 : inout bit; DDR0_CLK_DP_3 : inout bit; DDR0_CS_N_0 : out bit; DDR0_CS_N_1 : out bit; DDR0_CS_N_2 : out bit; DDR0_CS_N_3 : out bit; DDR0_CS_N_4 : out bit; DDR0_CS_N_5 : out bit; DDR0_CS_N_6 : out bit; DDR0_CS_N_7 : out bit; DDR0_C_2 : out bit; DDR0_DQS_DN_0 : out bit; DDR0_DQS_DN_1 : out bit; DDR0_DQS_DN_10 : out bit; DDR0_DQS_DN_11 : out bit; DDR0_DQS_DN_12 : out bit; DDR0_DQS_DN_13 : out bit; DDR0_DQS_DN_14 : out bit; DDR0_DQS_DN_15 : out bit; DDR0_DQS_DN_16 : out bit; DDR0_DQS_DN_17 : out bit; DDR0_DQS_DN_2 : out bit; DDR0_DQS_DN_3 : out bit; DDR0_DQS_DN_4 : out bit; DDR0_DQS_DN_5 : out bit; DDR0_DQS_DN_6 : out bit; DDR0_DQS_DN_7 : out bit; DDR0_DQS_DN_8 : out bit; DDR0_DQS_DN_9 : out bit; DDR0_DQS_DP_0 : out bit; DDR0_DQS_DP_1 : out bit; DDR0_DQS_DP_10 : out bit; DDR0_DQS_DP_11 : out bit; DDR0_DQS_DP_12 : out bit; DDR0_DQS_DP_13 : out bit; DDR0_DQS_DP_14 : out bit; DDR0_DQS_DP_15 : out bit; DDR0_DQS_DP_16 : out bit; DDR0_DQS_DP_17 : out bit; DDR0_DQS_DP_2 : out bit; DDR0_DQS_DP_3 : out bit; DDR0_DQS_DP_4 : out bit; DDR0_DQS_DP_5 : out bit; DDR0_DQS_DP_6 : out bit; DDR0_DQS_DP_7 : out bit; DDR0_DQS_DP_8 : out bit; DDR0_DQS_DP_9 : out bit; DDR0_DQ_0 : inout bit; DDR0_DQ_1 : inout bit; DDR0_DQ_10 : inout bit; DDR0_DQ_11 : inout bit; DDR0_DQ_12 : inout bit; DDR0_DQ_13 : inout bit; DDR0_DQ_14 : inout bit; DDR0_DQ_15 : inout bit; DDR0_DQ_16 : inout bit; DDR0_DQ_17 : inout bit; DDR0_DQ_18 : inout bit; DDR0_DQ_19 : inout bit; DDR0_DQ_2 : inout bit; DDR0_DQ_20 : inout bit; DDR0_DQ_21 : inout bit; DDR0_DQ_22 : inout bit; DDR0_DQ_23 : inout bit; DDR0_DQ_24 : inout bit; DDR0_DQ_25 : inout bit; DDR0_DQ_26 : inout bit; DDR0_DQ_27 : inout bit; DDR0_DQ_28 : inout bit; DDR0_DQ_29 : inout bit; DDR0_DQ_3 : inout bit; DDR0_DQ_30 : inout bit; DDR0_DQ_31 : inout bit; DDR0_DQ_32 : inout bit; DDR0_DQ_33 : inout bit; DDR0_DQ_34 : inout bit; DDR0_DQ_35 : inout bit; DDR0_DQ_36 : inout bit; DDR0_DQ_37 : inout bit; DDR0_DQ_38 : inout bit; DDR0_DQ_39 : inout bit; DDR0_DQ_4 : inout bit; DDR0_DQ_40 : inout bit; DDR0_DQ_41 : inout bit; DDR0_DQ_42 : inout bit; DDR0_DQ_43 : inout bit; DDR0_DQ_44 : inout bit; DDR0_DQ_45 : inout bit; DDR0_DQ_46 : inout bit; DDR0_DQ_47 : inout bit; DDR0_DQ_48 : inout bit; DDR0_DQ_49 : inout bit; DDR0_DQ_5 : inout bit; DDR0_DQ_50 : inout bit; DDR0_DQ_51 : inout bit; DDR0_DQ_52 : inout bit; DDR0_DQ_53 : inout bit; DDR0_DQ_54 : inout bit; DDR0_DQ_55 : inout bit; DDR0_DQ_56 : inout bit; DDR0_DQ_57 : inout bit; DDR0_DQ_58 : inout bit; DDR0_DQ_59 : inout bit; DDR0_DQ_6 : inout bit; DDR0_DQ_60 : inout bit; DDR0_DQ_61 : inout bit; DDR0_DQ_62 : inout bit; DDR0_DQ_63 : inout bit; DDR0_DQ_7 : inout bit; DDR0_DQ_8 : inout bit; DDR0_DQ_9 : inout bit; DDR0_ECC_0 : inout bit; DDR0_ECC_1 : inout bit; DDR0_ECC_2 : inout bit; DDR0_ECC_3 : inout bit; DDR0_ECC_4 : inout bit; DDR0_ECC_5 : inout bit; DDR0_ECC_6 : inout bit; DDR0_ECC_7 : inout bit; DDR0_MA_0 : out bit; DDR0_MA_1 : out bit; DDR0_MA_10 : out bit; DDR0_MA_11 : out bit; DDR0_MA_12 : out bit; DDR0_MA_13 : out bit; DDR0_MA_14 : out bit; DDR0_MA_15 : out bit; DDR0_MA_16 : out bit; DDR0_MA_17 : out bit; DDR0_MA_2 : out bit; DDR0_MA_3 : out bit; DDR0_MA_4 : out bit; DDR0_MA_5 : out bit; DDR0_MA_6 : out bit; DDR0_MA_7 : out bit; DDR0_MA_8 : out bit; DDR0_MA_9 : out bit; DDR0_ODT_0 : out bit; DDR0_ODT_1 : inout bit; DDR0_ODT_2 : out bit; DDR0_ODT_3 : inout bit; DDR0_PAR : out bit; DDR1_ACT_N : out bit; DDR1_ALERT_N : in bit; DDR1_BA_0 : out bit; DDR1_BA_1 : out bit; DDR1_BG_0 : out bit; DDR1_BG_1 : out bit; DDR1_CAVREF : linkage bit; DDR1_CKE_0 : out bit; DDR1_CKE_1 : inout bit; DDR1_CKE_2 : out bit; DDR1_CKE_3 : inout bit; DDR1_CLK_DN_0 : inout bit; DDR1_CLK_DN_1 : inout bit; DDR1_CLK_DN_2 : inout bit; DDR1_CLK_DN_3 : inout bit; DDR1_CLK_DP_0 : inout bit; DDR1_CLK_DP_1 : inout bit; DDR1_CLK_DP_2 : inout bit; DDR1_CLK_DP_3 : inout bit; DDR1_CS_N_0 : out bit; DDR1_CS_N_1 : out bit; DDR1_CS_N_2 : out bit; DDR1_CS_N_3 : out bit; DDR1_CS_N_4 : out bit; DDR1_CS_N_5 : out bit; DDR1_CS_N_6 : out bit; DDR1_CS_N_7 : out bit; DDR1_C_2 : out bit; DDR1_DQS_DN_0 : out bit; DDR1_DQS_DN_1 : out bit; DDR1_DQS_DN_10 : out bit; DDR1_DQS_DN_11 : out bit; DDR1_DQS_DN_12 : out bit; DDR1_DQS_DN_13 : out bit; DDR1_DQS_DN_14 : out bit; DDR1_DQS_DN_15 : out bit; DDR1_DQS_DN_16 : out bit; DDR1_DQS_DN_17 : out bit; DDR1_DQS_DN_2 : out bit; DDR1_DQS_DN_3 : out bit; DDR1_DQS_DN_4 : out bit; DDR1_DQS_DN_5 : out bit; DDR1_DQS_DN_6 : out bit; DDR1_DQS_DN_7 : out bit; DDR1_DQS_DN_8 : out bit; DDR1_DQS_DN_9 : out bit; DDR1_DQS_DP_0 : out bit; DDR1_DQS_DP_1 : out bit; DDR1_DQS_DP_10 : out bit; DDR1_DQS_DP_11 : out bit; DDR1_DQS_DP_12 : out bit; DDR1_DQS_DP_13 : out bit; DDR1_DQS_DP_14 : out bit; DDR1_DQS_DP_15 : out bit; DDR1_DQS_DP_16 : out bit; DDR1_DQS_DP_17 : out bit; DDR1_DQS_DP_2 : out bit; DDR1_DQS_DP_3 : out bit; DDR1_DQS_DP_4 : out bit; DDR1_DQS_DP_5 : out bit; DDR1_DQS_DP_6 : out bit; DDR1_DQS_DP_7 : out bit; DDR1_DQS_DP_8 : out bit; DDR1_DQS_DP_9 : out bit; DDR1_DQ_0 : inout bit; DDR1_DQ_1 : inout bit; DDR1_DQ_10 : inout bit; DDR1_DQ_11 : inout bit; DDR1_DQ_12 : inout bit; DDR1_DQ_13 : inout bit; DDR1_DQ_14 : inout bit; DDR1_DQ_15 : inout bit; DDR1_DQ_16 : inout bit; DDR1_DQ_17 : inout bit; DDR1_DQ_18 : inout bit; DDR1_DQ_19 : inout bit; DDR1_DQ_2 : inout bit; DDR1_DQ_20 : inout bit; DDR1_DQ_21 : inout bit; DDR1_DQ_22 : inout bit; DDR1_DQ_23 : inout bit; DDR1_DQ_24 : inout bit; DDR1_DQ_25 : inout bit; DDR1_DQ_26 : inout bit; DDR1_DQ_27 : inout bit; DDR1_DQ_28 : inout bit; DDR1_DQ_29 : inout bit; DDR1_DQ_3 : inout bit; DDR1_DQ_30 : inout bit; DDR1_DQ_31 : inout bit; DDR1_DQ_32 : inout bit; DDR1_DQ_33 : inout bit; DDR1_DQ_34 : inout bit; DDR1_DQ_35 : inout bit; DDR1_DQ_36 : inout bit; DDR1_DQ_37 : inout bit; DDR1_DQ_38 : inout bit; DDR1_DQ_39 : inout bit; DDR1_DQ_4 : inout bit; DDR1_DQ_40 : inout bit; DDR1_DQ_41 : inout bit; DDR1_DQ_42 : inout bit; DDR1_DQ_43 : inout bit; DDR1_DQ_44 : inout bit; DDR1_DQ_45 : inout bit; DDR1_DQ_46 : inout bit; DDR1_DQ_47 : inout bit; DDR1_DQ_48 : inout bit; DDR1_DQ_49 : inout bit; DDR1_DQ_5 : inout bit; DDR1_DQ_50 : inout bit; DDR1_DQ_51 : inout bit; DDR1_DQ_52 : inout bit; DDR1_DQ_53 : inout bit; DDR1_DQ_54 : inout bit; DDR1_DQ_55 : inout bit; DDR1_DQ_56 : inout bit; DDR1_DQ_57 : inout bit; DDR1_DQ_58 : inout bit; DDR1_DQ_59 : inout bit; DDR1_DQ_6 : inout bit; DDR1_DQ_60 : inout bit; DDR1_DQ_61 : inout bit; DDR1_DQ_62 : inout bit; DDR1_DQ_63 : inout bit; DDR1_DQ_7 : inout bit; DDR1_DQ_8 : inout bit; DDR1_DQ_9 : inout bit; DDR1_ECC_0 : inout bit; DDR1_ECC_1 : inout bit; DDR1_ECC_2 : inout bit; DDR1_ECC_3 : inout bit; DDR1_ECC_4 : inout bit; DDR1_ECC_5 : inout bit; DDR1_ECC_6 : inout bit; DDR1_ECC_7 : inout bit; DDR1_MA_0 : out bit; DDR1_MA_1 : out bit; DDR1_MA_10 : out bit; DDR1_MA_11 : out bit; DDR1_MA_12 : out bit; DDR1_MA_13 : out bit; DDR1_MA_14 : out bit; DDR1_MA_15 : out bit; DDR1_MA_16 : out bit; DDR1_MA_17 : out bit; DDR1_MA_2 : out bit; DDR1_MA_3 : out bit; DDR1_MA_4 : out bit; DDR1_MA_5 : out bit; DDR1_MA_6 : out bit; DDR1_MA_7 : out bit; DDR1_MA_8 : out bit; DDR1_MA_9 : out bit; DDR1_ODT_0 : out bit; DDR1_ODT_1 : inout bit; DDR1_ODT_2 : out bit; DDR1_ODT_3 : inout bit; DDR1_PAR : out bit; DDR2_ACT_N : out bit; DDR2_ALERT_N : in bit; DDR2_BA_0 : out bit; DDR2_BA_1 : out bit; DDR2_BG_0 : out bit; DDR2_BG_1 : out bit; DDR2_CAVREF : linkage bit; DDR2_CKE_0 : out bit; DDR2_CKE_1 : inout bit; DDR2_CKE_2 : out bit; DDR2_CKE_3 : inout bit; DDR2_CLK_DN_0 : inout bit; DDR2_CLK_DN_1 : inout bit; DDR2_CLK_DN_2 : inout bit; DDR2_CLK_DN_3 : inout bit; DDR2_CLK_DP_0 : inout bit; DDR2_CLK_DP_1 : inout bit; DDR2_CLK_DP_2 : inout bit; DDR2_CLK_DP_3 : inout bit; DDR2_CS_N_0 : out bit; DDR2_CS_N_1 : out bit; DDR2_CS_N_2 : out bit; DDR2_CS_N_3 : out bit; DDR2_CS_N_4 : out bit; DDR2_CS_N_5 : out bit; DDR2_CS_N_6 : out bit; DDR2_CS_N_7 : out bit; DDR2_C_2 : out bit; DDR2_DQS_DN_0 : out bit; DDR2_DQS_DN_1 : out bit; DDR2_DQS_DN_10 : out bit; DDR2_DQS_DN_11 : out bit; DDR2_DQS_DN_12 : out bit; DDR2_DQS_DN_13 : out bit; DDR2_DQS_DN_14 : out bit; DDR2_DQS_DN_15 : out bit; DDR2_DQS_DN_16 : out bit; DDR2_DQS_DN_17 : out bit; DDR2_DQS_DN_2 : out bit; DDR2_DQS_DN_3 : out bit; DDR2_DQS_DN_4 : out bit; DDR2_DQS_DN_5 : out bit; DDR2_DQS_DN_6 : out bit; DDR2_DQS_DN_7 : out bit; DDR2_DQS_DN_8 : out bit; DDR2_DQS_DN_9 : out bit; DDR2_DQS_DP_0 : out bit; DDR2_DQS_DP_1 : out bit; DDR2_DQS_DP_10 : out bit; DDR2_DQS_DP_11 : out bit; DDR2_DQS_DP_12 : out bit; DDR2_DQS_DP_13 : out bit; DDR2_DQS_DP_14 : out bit; DDR2_DQS_DP_15 : out bit; DDR2_DQS_DP_16 : out bit; DDR2_DQS_DP_17 : out bit; DDR2_DQS_DP_2 : out bit; DDR2_DQS_DP_3 : out bit; DDR2_DQS_DP_4 : out bit; DDR2_DQS_DP_5 : out bit; DDR2_DQS_DP_6 : out bit; DDR2_DQS_DP_7 : out bit; DDR2_DQS_DP_8 : out bit; DDR2_DQS_DP_9 : out bit; DDR2_DQ_0 : inout bit; DDR2_DQ_1 : inout bit; DDR2_DQ_10 : inout bit; DDR2_DQ_11 : inout bit; DDR2_DQ_12 : inout bit; DDR2_DQ_13 : inout bit; DDR2_DQ_14 : inout bit; DDR2_DQ_15 : inout bit; DDR2_DQ_16 : inout bit; DDR2_DQ_17 : inout bit; DDR2_DQ_18 : inout bit; DDR2_DQ_19 : inout bit; DDR2_DQ_2 : inout bit; DDR2_DQ_20 : inout bit; DDR2_DQ_21 : inout bit; DDR2_DQ_22 : inout bit; DDR2_DQ_23 : inout bit; DDR2_DQ_24 : inout bit; DDR2_DQ_25 : inout bit; DDR2_DQ_26 : inout bit; DDR2_DQ_27 : inout bit; DDR2_DQ_28 : inout bit; DDR2_DQ_29 : inout bit; DDR2_DQ_3 : inout bit; DDR2_DQ_30 : inout bit; DDR2_DQ_31 : inout bit; DDR2_DQ_32 : inout bit; DDR2_DQ_33 : inout bit; DDR2_DQ_34 : inout bit; DDR2_DQ_35 : inout bit; DDR2_DQ_36 : inout bit; DDR2_DQ_37 : inout bit; DDR2_DQ_38 : inout bit; DDR2_DQ_39 : inout bit; DDR2_DQ_4 : inout bit; DDR2_DQ_40 : inout bit; DDR2_DQ_41 : inout bit; DDR2_DQ_42 : inout bit; DDR2_DQ_43 : inout bit; DDR2_DQ_44 : inout bit; DDR2_DQ_45 : inout bit; DDR2_DQ_46 : inout bit; DDR2_DQ_47 : inout bit; DDR2_DQ_48 : inout bit; DDR2_DQ_49 : inout bit; DDR2_DQ_5 : inout bit; DDR2_DQ_50 : inout bit; DDR2_DQ_51 : inout bit; DDR2_DQ_52 : inout bit; DDR2_DQ_53 : inout bit; DDR2_DQ_54 : inout bit; DDR2_DQ_55 : inout bit; DDR2_DQ_56 : inout bit; DDR2_DQ_57 : inout bit; DDR2_DQ_58 : inout bit; DDR2_DQ_59 : inout bit; DDR2_DQ_6 : inout bit; DDR2_DQ_60 : inout bit; DDR2_DQ_61 : inout bit; DDR2_DQ_62 : inout bit; DDR2_DQ_63 : inout bit; DDR2_DQ_7 : inout bit; DDR2_DQ_8 : inout bit; DDR2_DQ_9 : inout bit; DDR2_ECC_0 : inout bit; DDR2_ECC_1 : inout bit; DDR2_ECC_2 : inout bit; DDR2_ECC_3 : inout bit; DDR2_ECC_4 : inout bit; DDR2_ECC_5 : inout bit; DDR2_ECC_6 : inout bit; DDR2_ECC_7 : inout bit; DDR2_MA_0 : out bit; DDR2_MA_1 : out bit; DDR2_MA_10 : out bit; DDR2_MA_11 : out bit; DDR2_MA_12 : out bit; DDR2_MA_13 : out bit; DDR2_MA_14 : out bit; DDR2_MA_15 : out bit; DDR2_MA_16 : out bit; DDR2_MA_17 : out bit; DDR2_MA_2 : out bit; DDR2_MA_3 : out bit; DDR2_MA_4 : out bit; DDR2_MA_5 : out bit; DDR2_MA_6 : out bit; DDR2_MA_7 : out bit; DDR2_MA_8 : out bit; DDR2_MA_9 : out bit; DDR2_ODT_0 : out bit; DDR2_ODT_1 : inout bit; DDR2_ODT_2 : out bit; DDR2_ODT_3 : inout bit; DDR2_PAR : out bit; DDR345_DRAM_PWR_OK : in bit; DDR345_MEMHOT_N : inout bit; DDR345_RCOMP_0 : linkage bit; DDR345_RCOMP_1 : linkage bit; DDR345_RCOMP_2 : linkage bit; DDR345_RESET_N : out bit; DDR345_SPDSCL : inout bit; DDR345_SPDSDA : inout bit; DDR345_VIEWDIG_0 : linkage bit; DDR345_VIEWDIG_1 : linkage bit; DDR3_ACT_N : out bit; DDR3_ALERT_N : in bit; DDR3_BA_0 : out bit; DDR3_BA_1 : out bit; DDR3_BG_0 : out bit; DDR3_BG_1 : out bit; DDR3_CAVREF : linkage bit; DDR3_CKE_0 : out bit; DDR3_CKE_1 : inout bit; DDR3_CKE_2 : out bit; DDR3_CKE_3 : inout bit; DDR3_CLK_DN_0 : inout bit; DDR3_CLK_DN_1 : inout bit; DDR3_CLK_DN_2 : inout bit; DDR3_CLK_DN_3 : inout bit; DDR3_CLK_DP_0 : inout bit; DDR3_CLK_DP_1 : inout bit; DDR3_CLK_DP_2 : inout bit; DDR3_CLK_DP_3 : inout bit; DDR3_CS_N_0 : out bit; DDR3_CS_N_1 : out bit; DDR3_CS_N_2 : out bit; DDR3_CS_N_3 : out bit; DDR3_CS_N_4 : out bit; DDR3_CS_N_5 : out bit; DDR3_CS_N_6 : out bit; DDR3_CS_N_7 : out bit; DDR3_C_2 : out bit; DDR3_DQS_DN_0 : out bit; DDR3_DQS_DN_1 : out bit; DDR3_DQS_DN_10 : out bit; DDR3_DQS_DN_11 : out bit; DDR3_DQS_DN_12 : out bit; DDR3_DQS_DN_13 : out bit; DDR3_DQS_DN_14 : out bit; DDR3_DQS_DN_15 : out bit; DDR3_DQS_DN_16 : out bit; DDR3_DQS_DN_17 : out bit; DDR3_DQS_DN_2 : out bit; DDR3_DQS_DN_3 : out bit; DDR3_DQS_DN_4 : out bit; DDR3_DQS_DN_5 : out bit; DDR3_DQS_DN_6 : out bit; DDR3_DQS_DN_7 : out bit; DDR3_DQS_DN_8 : out bit; DDR3_DQS_DN_9 : out bit; DDR3_DQS_DP_0 : out bit; DDR3_DQS_DP_1 : out bit; DDR3_DQS_DP_10 : out bit; DDR3_DQS_DP_11 : out bit; DDR3_DQS_DP_12 : out bit; DDR3_DQS_DP_13 : out bit; DDR3_DQS_DP_14 : out bit; DDR3_DQS_DP_15 : out bit; DDR3_DQS_DP_16 : out bit; DDR3_DQS_DP_17 : out bit; DDR3_DQS_DP_2 : out bit; DDR3_DQS_DP_3 : out bit; DDR3_DQS_DP_4 : out bit; DDR3_DQS_DP_5 : out bit; DDR3_DQS_DP_6 : out bit; DDR3_DQS_DP_7 : out bit; DDR3_DQS_DP_8 : out bit; DDR3_DQS_DP_9 : out bit; DDR3_DQ_0 : inout bit; DDR3_DQ_1 : inout bit; DDR3_DQ_10 : inout bit; DDR3_DQ_11 : inout bit; DDR3_DQ_12 : inout bit; DDR3_DQ_13 : inout bit; DDR3_DQ_14 : inout bit; DDR3_DQ_15 : inout bit; DDR3_DQ_16 : inout bit; DDR3_DQ_17 : inout bit; DDR3_DQ_18 : inout bit; DDR3_DQ_19 : inout bit; DDR3_DQ_2 : inout bit; DDR3_DQ_20 : inout bit; DDR3_DQ_21 : inout bit; DDR3_DQ_22 : inout bit; DDR3_DQ_23 : inout bit; DDR3_DQ_24 : inout bit; DDR3_DQ_25 : inout bit; DDR3_DQ_26 : inout bit; DDR3_DQ_27 : inout bit; DDR3_DQ_28 : inout bit; DDR3_DQ_29 : inout bit; DDR3_DQ_3 : inout bit; DDR3_DQ_30 : inout bit; DDR3_DQ_31 : inout bit; DDR3_DQ_32 : inout bit; DDR3_DQ_33 : inout bit; DDR3_DQ_34 : inout bit; DDR3_DQ_35 : inout bit; DDR3_DQ_36 : inout bit; DDR3_DQ_37 : inout bit; DDR3_DQ_38 : inout bit; DDR3_DQ_39 : inout bit; DDR3_DQ_4 : inout bit; DDR3_DQ_40 : inout bit; DDR3_DQ_41 : inout bit; DDR3_DQ_42 : inout bit; DDR3_DQ_43 : inout bit; DDR3_DQ_44 : inout bit; DDR3_DQ_45 : inout bit; DDR3_DQ_46 : inout bit; DDR3_DQ_47 : inout bit; DDR3_DQ_48 : inout bit; DDR3_DQ_49 : inout bit; DDR3_DQ_5 : inout bit; DDR3_DQ_50 : inout bit; DDR3_DQ_51 : inout bit; DDR3_DQ_52 : inout bit; DDR3_DQ_53 : inout bit; DDR3_DQ_54 : inout bit; DDR3_DQ_55 : inout bit; DDR3_DQ_56 : inout bit; DDR3_DQ_57 : inout bit; DDR3_DQ_58 : inout bit; DDR3_DQ_59 : inout bit; DDR3_DQ_6 : inout bit; DDR3_DQ_60 : inout bit; DDR3_DQ_61 : inout bit; DDR3_DQ_62 : inout bit; DDR3_DQ_63 : inout bit; DDR3_DQ_7 : inout bit; DDR3_DQ_8 : inout bit; DDR3_DQ_9 : inout bit; DDR3_ECC_0 : inout bit; DDR3_ECC_1 : inout bit; DDR3_ECC_2 : inout bit; DDR3_ECC_3 : inout bit; DDR3_ECC_4 : inout bit; DDR3_ECC_5 : inout bit; DDR3_ECC_6 : inout bit; DDR3_ECC_7 : inout bit; DDR3_MA_0 : out bit; DDR3_MA_1 : out bit; DDR3_MA_10 : out bit; DDR3_MA_11 : out bit; DDR3_MA_12 : out bit; DDR3_MA_13 : out bit; DDR3_MA_14 : out bit; DDR3_MA_15 : out bit; DDR3_MA_16 : out bit; DDR3_MA_17 : out bit; DDR3_MA_2 : out bit; DDR3_MA_3 : out bit; DDR3_MA_4 : out bit; DDR3_MA_5 : out bit; DDR3_MA_6 : out bit; DDR3_MA_7 : out bit; DDR3_MA_8 : out bit; DDR3_MA_9 : out bit; DDR3_ODT_0 : out bit; DDR3_ODT_1 : inout bit; DDR3_ODT_2 : out bit; DDR3_ODT_3 : inout bit; DDR3_PAR : out bit; DDR4_ACT_N : out bit; DDR4_ALERT_N : in bit; DDR4_BA_0 : out bit; DDR4_BA_1 : out bit; DDR4_BG_0 : out bit; DDR4_BG_1 : out bit; DDR4_CAVREF : linkage bit; DDR4_CKE_0 : out bit; DDR4_CKE_1 : inout bit; DDR4_CKE_2 : out bit; DDR4_CKE_3 : inout bit; DDR4_CLK_DN_0 : inout bit; DDR4_CLK_DN_1 : inout bit; DDR4_CLK_DN_2 : inout bit; DDR4_CLK_DN_3 : inout bit; DDR4_CLK_DP_0 : inout bit; DDR4_CLK_DP_1 : inout bit; DDR4_CLK_DP_2 : inout bit; DDR4_CLK_DP_3 : inout bit; DDR4_CS_N_0 : out bit; DDR4_CS_N_1 : out bit; DDR4_CS_N_2 : out bit; DDR4_CS_N_3 : out bit; DDR4_CS_N_4 : out bit; DDR4_CS_N_5 : out bit; DDR4_CS_N_6 : out bit; DDR4_CS_N_7 : out bit; DDR4_C_2 : out bit; DDR4_DQS_DN_0 : out bit; DDR4_DQS_DN_1 : out bit; DDR4_DQS_DN_10 : out bit; DDR4_DQS_DN_11 : out bit; DDR4_DQS_DN_12 : out bit; DDR4_DQS_DN_13 : out bit; DDR4_DQS_DN_14 : out bit; DDR4_DQS_DN_15 : out bit; DDR4_DQS_DN_16 : out bit; DDR4_DQS_DN_17 : out bit; DDR4_DQS_DN_2 : out bit; DDR4_DQS_DN_3 : out bit; DDR4_DQS_DN_4 : out bit; DDR4_DQS_DN_5 : out bit; DDR4_DQS_DN_6 : out bit; DDR4_DQS_DN_7 : out bit; DDR4_DQS_DN_8 : out bit; DDR4_DQS_DN_9 : out bit; DDR4_DQS_DP_0 : out bit; DDR4_DQS_DP_1 : out bit; DDR4_DQS_DP_10 : out bit; DDR4_DQS_DP_11 : out bit; DDR4_DQS_DP_12 : out bit; DDR4_DQS_DP_13 : out bit; DDR4_DQS_DP_14 : out bit; DDR4_DQS_DP_15 : out bit; DDR4_DQS_DP_16 : out bit; DDR4_DQS_DP_17 : out bit; DDR4_DQS_DP_2 : out bit; DDR4_DQS_DP_3 : out bit; DDR4_DQS_DP_4 : out bit; DDR4_DQS_DP_5 : out bit; DDR4_DQS_DP_6 : out bit; DDR4_DQS_DP_7 : out bit; DDR4_DQS_DP_8 : out bit; DDR4_DQS_DP_9 : out bit; DDR4_DQ_0 : inout bit; DDR4_DQ_1 : inout bit; DDR4_DQ_10 : inout bit; DDR4_DQ_11 : inout bit; DDR4_DQ_12 : inout bit; DDR4_DQ_13 : inout bit; DDR4_DQ_14 : inout bit; DDR4_DQ_15 : inout bit; DDR4_DQ_16 : inout bit; DDR4_DQ_17 : inout bit; DDR4_DQ_18 : inout bit; DDR4_DQ_19 : inout bit; DDR4_DQ_2 : inout bit; DDR4_DQ_20 : inout bit; DDR4_DQ_21 : inout bit; DDR4_DQ_22 : inout bit; DDR4_DQ_23 : inout bit; DDR4_DQ_24 : inout bit; DDR4_DQ_25 : inout bit; DDR4_DQ_26 : inout bit; DDR4_DQ_27 : inout bit; DDR4_DQ_28 : inout bit; DDR4_DQ_29 : inout bit; DDR4_DQ_3 : inout bit; DDR4_DQ_30 : inout bit; DDR4_DQ_31 : inout bit; DDR4_DQ_32 : inout bit; DDR4_DQ_33 : inout bit; DDR4_DQ_34 : inout bit; DDR4_DQ_35 : inout bit; DDR4_DQ_36 : inout bit; DDR4_DQ_37 : inout bit; DDR4_DQ_38 : inout bit; DDR4_DQ_39 : inout bit; DDR4_DQ_4 : inout bit; DDR4_DQ_40 : inout bit; DDR4_DQ_41 : inout bit; DDR4_DQ_42 : inout bit; DDR4_DQ_43 : inout bit; DDR4_DQ_44 : inout bit; DDR4_DQ_45 : inout bit; DDR4_DQ_46 : inout bit; DDR4_DQ_47 : inout bit; DDR4_DQ_48 : inout bit; DDR4_DQ_49 : inout bit; DDR4_DQ_5 : inout bit; DDR4_DQ_50 : inout bit; DDR4_DQ_51 : inout bit; DDR4_DQ_52 : inout bit; DDR4_DQ_53 : inout bit; DDR4_DQ_54 : inout bit; DDR4_DQ_55 : inout bit; DDR4_DQ_56 : inout bit; DDR4_DQ_57 : inout bit; DDR4_DQ_58 : inout bit; DDR4_DQ_59 : inout bit; DDR4_DQ_6 : inout bit; DDR4_DQ_60 : inout bit; DDR4_DQ_61 : inout bit; DDR4_DQ_62 : inout bit; DDR4_DQ_63 : inout bit; DDR4_DQ_7 : inout bit; DDR4_DQ_8 : inout bit; DDR4_DQ_9 : inout bit; DDR4_ECC_0 : inout bit; DDR4_ECC_1 : inout bit; DDR4_ECC_2 : inout bit; DDR4_ECC_3 : inout bit; DDR4_ECC_4 : inout bit; DDR4_ECC_5 : inout bit; DDR4_ECC_6 : inout bit; DDR4_ECC_7 : inout bit; DDR4_MA_0 : out bit; DDR4_MA_1 : out bit; DDR4_MA_10 : out bit; DDR4_MA_11 : out bit; DDR4_MA_12 : out bit; DDR4_MA_13 : out bit; DDR4_MA_14 : out bit; DDR4_MA_15 : out bit; DDR4_MA_16 : out bit; DDR4_MA_17 : out bit; DDR4_MA_2 : out bit; DDR4_MA_3 : out bit; DDR4_MA_4 : out bit; DDR4_MA_5 : out bit; DDR4_MA_6 : out bit; DDR4_MA_7 : out bit; DDR4_MA_8 : out bit; DDR4_MA_9 : out bit; DDR4_ODT_0 : out bit; DDR4_ODT_1 : inout bit; DDR4_ODT_2 : out bit; DDR4_ODT_3 : inout bit; DDR4_PAR : out bit; DDR5_ACT_N : out bit; DDR5_ALERT_N : in bit; DDR5_BA_0 : out bit; DDR5_BA_1 : out bit; DDR5_BG_0 : out bit; DDR5_BG_1 : out bit; DDR5_CAVREF : linkage bit; DDR5_CKE_0 : out bit; DDR5_CKE_1 : inout bit; DDR5_CKE_2 : out bit; DDR5_CKE_3 : inout bit; DDR5_CLK_DN_0 : inout bit; DDR5_CLK_DN_1 : inout bit; DDR5_CLK_DN_2 : inout bit; DDR5_CLK_DN_3 : inout bit; DDR5_CLK_DP_0 : inout bit; DDR5_CLK_DP_1 : inout bit; DDR5_CLK_DP_2 : inout bit; DDR5_CLK_DP_3 : inout bit; DDR5_CS_N_0 : out bit; DDR5_CS_N_1 : out bit; DDR5_CS_N_2 : out bit; DDR5_CS_N_3 : out bit; DDR5_CS_N_4 : out bit; DDR5_CS_N_5 : out bit; DDR5_CS_N_6 : out bit; DDR5_CS_N_7 : out bit; DDR5_C_2 : out bit; DDR5_DQS_DN_0 : out bit; DDR5_DQS_DN_1 : out bit; DDR5_DQS_DN_10 : out bit; DDR5_DQS_DN_11 : out bit; DDR5_DQS_DN_12 : out bit; DDR5_DQS_DN_13 : out bit; DDR5_DQS_DN_14 : out bit; DDR5_DQS_DN_15 : out bit; DDR5_DQS_DN_16 : out bit; DDR5_DQS_DN_17 : out bit; DDR5_DQS_DN_2 : out bit; DDR5_DQS_DN_3 : out bit; DDR5_DQS_DN_4 : out bit; DDR5_DQS_DN_5 : out bit; DDR5_DQS_DN_6 : out bit; DDR5_DQS_DN_7 : out bit; DDR5_DQS_DN_8 : out bit; DDR5_DQS_DN_9 : out bit; DDR5_DQS_DP_0 : out bit; DDR5_DQS_DP_1 : out bit; DDR5_DQS_DP_10 : out bit; DDR5_DQS_DP_11 : out bit; DDR5_DQS_DP_12 : out bit; DDR5_DQS_DP_13 : out bit; DDR5_DQS_DP_14 : out bit; DDR5_DQS_DP_15 : out bit; DDR5_DQS_DP_16 : out bit; DDR5_DQS_DP_17 : out bit; DDR5_DQS_DP_2 : out bit; DDR5_DQS_DP_3 : out bit; DDR5_DQS_DP_4 : out bit; DDR5_DQS_DP_5 : out bit; DDR5_DQS_DP_6 : out bit; DDR5_DQS_DP_7 : out bit; DDR5_DQS_DP_8 : out bit; DDR5_DQS_DP_9 : out bit; DDR5_DQ_0 : inout bit; DDR5_DQ_1 : inout bit; DDR5_DQ_10 : inout bit; DDR5_DQ_11 : inout bit; DDR5_DQ_12 : inout bit; DDR5_DQ_13 : inout bit; DDR5_DQ_14 : inout bit; DDR5_DQ_15 : inout bit; DDR5_DQ_16 : inout bit; DDR5_DQ_17 : inout bit; DDR5_DQ_18 : inout bit; DDR5_DQ_19 : inout bit; DDR5_DQ_2 : inout bit; DDR5_DQ_20 : inout bit; DDR5_DQ_21 : inout bit; DDR5_DQ_22 : inout bit; DDR5_DQ_23 : inout bit; DDR5_DQ_24 : inout bit; DDR5_DQ_25 : inout bit; DDR5_DQ_26 : inout bit; DDR5_DQ_27 : inout bit; DDR5_DQ_28 : inout bit; DDR5_DQ_29 : inout bit; DDR5_DQ_3 : inout bit; DDR5_DQ_30 : inout bit; DDR5_DQ_31 : inout bit; DDR5_DQ_32 : inout bit; DDR5_DQ_33 : inout bit; DDR5_DQ_34 : inout bit; DDR5_DQ_35 : inout bit; DDR5_DQ_36 : inout bit; DDR5_DQ_37 : inout bit; DDR5_DQ_38 : inout bit; DDR5_DQ_39 : inout bit; DDR5_DQ_4 : inout bit; DDR5_DQ_40 : inout bit; DDR5_DQ_41 : inout bit; DDR5_DQ_42 : inout bit; DDR5_DQ_43 : inout bit; DDR5_DQ_44 : inout bit; DDR5_DQ_45 : inout bit; DDR5_DQ_46 : inout bit; DDR5_DQ_47 : inout bit; DDR5_DQ_48 : inout bit; DDR5_DQ_49 : inout bit; DDR5_DQ_5 : inout bit; DDR5_DQ_50 : inout bit; DDR5_DQ_51 : inout bit; DDR5_DQ_52 : inout bit; DDR5_DQ_53 : inout bit; DDR5_DQ_54 : inout bit; DDR5_DQ_55 : inout bit; DDR5_DQ_56 : inout bit; DDR5_DQ_57 : inout bit; DDR5_DQ_58 : inout bit; DDR5_DQ_59 : inout bit; DDR5_DQ_6 : inout bit; DDR5_DQ_60 : inout bit; DDR5_DQ_61 : inout bit; DDR5_DQ_62 : inout bit; DDR5_DQ_63 : inout bit; DDR5_DQ_7 : inout bit; DDR5_DQ_8 : inout bit; DDR5_DQ_9 : inout bit; DDR5_ECC_0 : inout bit; DDR5_ECC_1 : inout bit; DDR5_ECC_2 : inout bit; DDR5_ECC_3 : inout bit; DDR5_ECC_4 : inout bit; DDR5_ECC_5 : inout bit; DDR5_ECC_6 : inout bit; DDR5_ECC_7 : inout bit; DDR5_MA_0 : out bit; DDR5_MA_1 : out bit; DDR5_MA_10 : out bit; DDR5_MA_11 : out bit; DDR5_MA_12 : out bit; DDR5_MA_13 : out bit; DDR5_MA_14 : out bit; DDR5_MA_15 : out bit; DDR5_MA_16 : out bit; DDR5_MA_17 : out bit; DDR5_MA_2 : out bit; DDR5_MA_3 : out bit; DDR5_MA_4 : out bit; DDR5_MA_5 : out bit; DDR5_MA_6 : out bit; DDR5_MA_7 : out bit; DDR5_MA_8 : out bit; DDR5_MA_9 : out bit; DDR5_ODT_0 : out bit; DDR5_ODT_1 : inout bit; DDR5_ODT_2 : out bit; DDR5_ODT_3 : inout bit; DDR5_PAR : out bit; DMI_RX_DN_0 : in bit; DMI_RX_DN_1 : in bit; DMI_RX_DN_2 : in bit; DMI_RX_DN_3 : in bit; DMI_RX_DP_0 : in bit; DMI_RX_DP_1 : in bit; DMI_RX_DP_2 : in bit; DMI_RX_DP_3 : in bit; DMI_TX_DN_0 : buffer bit; DMI_TX_DN_1 : buffer bit; DMI_TX_DN_2 : buffer bit; DMI_TX_DN_3 : buffer bit; DMI_TX_DP_0 : buffer bit; DMI_TX_DP_1 : buffer bit; DMI_TX_DP_2 : buffer bit; DMI_TX_DP_3 : buffer bit; EAR_N : in bit; ERROR_N_0 : out bit; ERROR_N_1 : out bit; ERROR_N_2 : out bit; EXT_BGREF : linkage bit; FIVR_CLKREF : in bit; FIVR_FAULT : out bit; FIVR_PROBE_ANA_0 : linkage bit; FIVR_PROBE_ANA_1 : linkage bit; FIVR_PROBE_DIG_1 : out bit; FIVR_VCCF_SENSE : linkage bit; FIVR_VLOAD_CORE_1 : linkage bit; FIVR_VLOAD_CORE_3 : linkage bit; FIVR_VLOAD_CORE_44 : linkage bit; FIVR_VLOAD_CORE_53 : linkage bit; FIVR_VLOAD_CORE_54 : linkage bit; FIVR_VLOAD_CORE_FUTURE_12 : linkage bit; FIVR_VLOAD_GT0 : linkage bit_vector(2 downto 0); FIVR_VLOAD_GT1 : linkage bit_vector(2 downto 0); FIVR_VLOAD_GT2 : linkage bit_vector(2 downto 0); FIVR_VLOAD_GT_UNGATED0 : linkage bit_vector(1 downto 0); FIVR_VLOAD_GT_UNGATED1 : linkage bit_vector(1 downto 0); FIVR_VLOAD_GT_UNGATED2 : linkage bit_vector(1 downto 0); FIVR_VSS_VCCF_SENSE : linkage bit; KTI01_AMONI : linkage bit; KTI01_AMONV : linkage bit; KTI01_DFX_DN : linkage bit; KTI01_DFX_DP : linkage bit; KTI01_DMON : linkage bit; KTI01_HSCLK_DN : linkage bit; KTI01_HSCLK_DP : linkage bit; KTI01_RBIAS : linkage bit_vector(1 downto 0); KTI01_VCCQ : linkage bit_vector(5 downto 0); KTI0_RX_DN_0 : in bit; KTI0_RX_DN_1 : in bit; KTI0_RX_DN_10 : in bit; KTI0_RX_DN_11 : in bit; KTI0_RX_DN_12 : in bit; KTI0_RX_DN_13 : in bit; KTI0_RX_DN_14 : in bit; KTI0_RX_DN_15 : in bit; KTI0_RX_DN_16 : in bit; KTI0_RX_DN_17 : in bit; KTI0_RX_DN_18 : in bit; KTI0_RX_DN_19 : in bit; KTI0_RX_DN_2 : in bit; KTI0_RX_DN_3 : in bit; KTI0_RX_DN_4 : in bit; KTI0_RX_DN_5 : in bit; KTI0_RX_DN_6 : in bit; KTI0_RX_DN_7 : in bit; KTI0_RX_DN_8 : in bit; KTI0_RX_DN_9 : in bit; KTI0_RX_DP_0 : in bit; KTI0_RX_DP_1 : in bit; KTI0_RX_DP_10 : in bit; KTI0_RX_DP_11 : in bit; KTI0_RX_DP_12 : in bit; KTI0_RX_DP_13 : in bit; KTI0_RX_DP_14 : in bit; KTI0_RX_DP_15 : in bit; KTI0_RX_DP_16 : in bit; KTI0_RX_DP_17 : in bit; KTI0_RX_DP_18 : in bit; KTI0_RX_DP_19 : in bit; KTI0_RX_DP_2 : in bit; KTI0_RX_DP_3 : in bit; KTI0_RX_DP_4 : in bit; KTI0_RX_DP_5 : in bit; KTI0_RX_DP_6 : in bit; KTI0_RX_DP_7 : in bit; KTI0_RX_DP_8 : in bit; KTI0_RX_DP_9 : in bit; KTI0_TX_DN_0 : buffer bit; KTI0_TX_DN_1 : buffer bit; KTI0_TX_DN_10 : buffer bit; KTI0_TX_DN_11 : buffer bit; KTI0_TX_DN_12 : buffer bit; KTI0_TX_DN_13 : buffer bit; KTI0_TX_DN_14 : buffer bit; KTI0_TX_DN_15 : buffer bit; KTI0_TX_DN_16 : buffer bit; KTI0_TX_DN_17 : buffer bit; KTI0_TX_DN_18 : buffer bit; KTI0_TX_DN_19 : buffer bit; KTI0_TX_DN_2 : buffer bit; KTI0_TX_DN_3 : buffer bit; KTI0_TX_DN_4 : buffer bit; KTI0_TX_DN_5 : buffer bit; KTI0_TX_DN_6 : buffer bit; KTI0_TX_DN_7 : buffer bit; KTI0_TX_DN_8 : buffer bit; KTI0_TX_DN_9 : buffer bit; KTI0_TX_DP_0 : buffer bit; KTI0_TX_DP_1 : buffer bit; KTI0_TX_DP_10 : buffer bit; KTI0_TX_DP_11 : buffer bit; KTI0_TX_DP_12 : buffer bit; KTI0_TX_DP_13 : buffer bit; KTI0_TX_DP_14 : buffer bit; KTI0_TX_DP_15 : buffer bit; KTI0_TX_DP_16 : buffer bit; KTI0_TX_DP_17 : buffer bit; KTI0_TX_DP_18 : buffer bit; KTI0_TX_DP_19 : buffer bit; KTI0_TX_DP_2 : buffer bit; KTI0_TX_DP_3 : buffer bit; KTI0_TX_DP_4 : buffer bit; KTI0_TX_DP_5 : buffer bit; KTI0_TX_DP_6 : buffer bit; KTI0_TX_DP_7 : buffer bit; KTI0_TX_DP_8 : buffer bit; KTI0_TX_DP_9 : buffer bit; KTI1_RX_DN_0 : in bit; KTI1_RX_DN_1 : in bit; KTI1_RX_DN_10 : in bit; KTI1_RX_DN_11 : in bit; KTI1_RX_DN_12 : in bit; KTI1_RX_DN_13 : in bit; KTI1_RX_DN_14 : in bit; KTI1_RX_DN_15 : in bit; KTI1_RX_DN_16 : in bit; KTI1_RX_DN_17 : in bit; KTI1_RX_DN_18 : in bit; KTI1_RX_DN_19 : in bit; KTI1_RX_DN_2 : in bit; KTI1_RX_DN_3 : in bit; KTI1_RX_DN_4 : in bit; KTI1_RX_DN_5 : in bit; KTI1_RX_DN_6 : in bit; KTI1_RX_DN_7 : in bit; KTI1_RX_DN_8 : in bit; KTI1_RX_DN_9 : in bit; KTI1_RX_DP_0 : in bit; KTI1_RX_DP_1 : in bit; KTI1_RX_DP_10 : in bit; KTI1_RX_DP_11 : in bit; KTI1_RX_DP_12 : in bit; KTI1_RX_DP_13 : in bit; KTI1_RX_DP_14 : in bit; KTI1_RX_DP_15 : in bit; KTI1_RX_DP_16 : in bit; KTI1_RX_DP_17 : in bit; KTI1_RX_DP_18 : in bit; KTI1_RX_DP_19 : in bit; KTI1_RX_DP_2 : in bit; KTI1_RX_DP_3 : in bit; KTI1_RX_DP_4 : in bit; KTI1_RX_DP_5 : in bit; KTI1_RX_DP_6 : in bit; KTI1_RX_DP_7 : in bit; KTI1_RX_DP_8 : in bit; KTI1_RX_DP_9 : in bit; KTI1_TX_DN_0 : buffer bit; KTI1_TX_DN_1 : buffer bit; KTI1_TX_DN_10 : buffer bit; KTI1_TX_DN_11 : buffer bit; KTI1_TX_DN_12 : buffer bit; KTI1_TX_DN_13 : buffer bit; KTI1_TX_DN_14 : buffer bit; KTI1_TX_DN_15 : buffer bit; KTI1_TX_DN_16 : buffer bit; KTI1_TX_DN_17 : buffer bit; KTI1_TX_DN_18 : buffer bit; KTI1_TX_DN_19 : buffer bit; KTI1_TX_DN_2 : buffer bit; KTI1_TX_DN_3 : buffer bit; KTI1_TX_DN_4 : buffer bit; KTI1_TX_DN_5 : buffer bit; KTI1_TX_DN_6 : buffer bit; KTI1_TX_DN_7 : buffer bit; KTI1_TX_DN_8 : buffer bit; KTI1_TX_DN_9 : buffer bit; KTI1_TX_DP_0 : buffer bit; KTI1_TX_DP_1 : buffer bit; KTI1_TX_DP_10 : buffer bit; KTI1_TX_DP_11 : buffer bit; KTI1_TX_DP_12 : buffer bit; KTI1_TX_DP_13 : buffer bit; KTI1_TX_DP_14 : buffer bit; KTI1_TX_DP_15 : buffer bit; KTI1_TX_DP_16 : buffer bit; KTI1_TX_DP_17 : buffer bit; KTI1_TX_DP_18 : buffer bit; KTI1_TX_DP_19 : buffer bit; KTI1_TX_DP_2 : buffer bit; KTI1_TX_DP_3 : buffer bit; KTI1_TX_DP_4 : buffer bit; KTI1_TX_DP_5 : buffer bit; KTI1_TX_DP_6 : buffer bit; KTI1_TX_DP_7 : buffer bit; KTI1_TX_DP_8 : buffer bit; KTI1_TX_DP_9 : buffer bit; KTI2_AMONI : linkage bit; KTI2_AMONV : linkage bit; KTI2_DFX_DN : linkage bit; KTI2_DFX_DP : linkage bit; KTI2_DMON : linkage bit; KTI2_HSCLK_DN : linkage bit; KTI2_HSCLK_DP : linkage bit; KTI2_RBIAS : linkage bit_vector(1 downto 0); KTI2_RX_DN_0 : in bit; KTI2_RX_DN_1 : in bit; KTI2_RX_DN_10 : in bit; KTI2_RX_DN_11 : in bit; KTI2_RX_DN_12 : in bit; KTI2_RX_DN_13 : in bit; KTI2_RX_DN_14 : in bit; KTI2_RX_DN_15 : in bit; KTI2_RX_DN_16 : in bit; KTI2_RX_DN_17 : in bit; KTI2_RX_DN_18 : in bit; KTI2_RX_DN_19 : in bit; KTI2_RX_DN_2 : in bit; KTI2_RX_DN_3 : in bit; KTI2_RX_DN_4 : in bit; KTI2_RX_DN_5 : in bit; KTI2_RX_DN_6 : in bit; KTI2_RX_DN_7 : in bit; KTI2_RX_DN_8 : in bit; KTI2_RX_DN_9 : in bit; KTI2_RX_DP_0 : in bit; KTI2_RX_DP_1 : in bit; KTI2_RX_DP_10 : in bit; KTI2_RX_DP_11 : in bit; KTI2_RX_DP_12 : in bit; KTI2_RX_DP_13 : in bit; KTI2_RX_DP_14 : in bit; KTI2_RX_DP_15 : in bit; KTI2_RX_DP_16 : in bit; KTI2_RX_DP_17 : in bit; KTI2_RX_DP_18 : in bit; KTI2_RX_DP_19 : in bit; KTI2_RX_DP_2 : in bit; KTI2_RX_DP_3 : in bit; KTI2_RX_DP_4 : in bit; KTI2_RX_DP_5 : in bit; KTI2_RX_DP_6 : in bit; KTI2_RX_DP_7 : in bit; KTI2_RX_DP_8 : in bit; KTI2_RX_DP_9 : in bit; KTI2_TX_DN_0 : buffer bit; KTI2_TX_DN_1 : buffer bit; KTI2_TX_DN_10 : buffer bit; KTI2_TX_DN_11 : buffer bit; KTI2_TX_DN_12 : buffer bit; KTI2_TX_DN_13 : buffer bit; KTI2_TX_DN_14 : buffer bit; KTI2_TX_DN_15 : buffer bit; KTI2_TX_DN_16 : buffer bit; KTI2_TX_DN_17 : buffer bit; KTI2_TX_DN_18 : buffer bit; KTI2_TX_DN_19 : buffer bit; KTI2_TX_DN_2 : buffer bit; KTI2_TX_DN_3 : buffer bit; KTI2_TX_DN_4 : buffer bit; KTI2_TX_DN_5 : buffer bit; KTI2_TX_DN_6 : buffer bit; KTI2_TX_DN_7 : buffer bit; KTI2_TX_DN_8 : buffer bit; KTI2_TX_DN_9 : buffer bit; KTI2_TX_DP_0 : buffer bit; KTI2_TX_DP_1 : buffer bit; KTI2_TX_DP_10 : buffer bit; KTI2_TX_DP_11 : buffer bit; KTI2_TX_DP_12 : buffer bit; KTI2_TX_DP_13 : buffer bit; KTI2_TX_DP_14 : buffer bit; KTI2_TX_DP_15 : buffer bit; KTI2_TX_DP_16 : buffer bit; KTI2_TX_DP_17 : buffer bit; KTI2_TX_DP_18 : buffer bit; KTI2_TX_DP_19 : buffer bit; KTI2_TX_DP_2 : buffer bit; KTI2_TX_DP_3 : buffer bit; KTI2_TX_DP_4 : buffer bit; KTI2_TX_DP_5 : buffer bit; KTI2_TX_DP_6 : buffer bit; KTI2_TX_DP_7 : buffer bit; KTI2_TX_DP_8 : buffer bit; KTI2_TX_DP_9 : buffer bit; KTI2_VCCQ : linkage bit_vector(2 downto 0); LEGACY_SKT : in bit; LGSPARE_7 : linkage bit; LGSPARE_8 : linkage bit; MBP_N_0 : inout bit; MBP_N_1 : inout bit; MBP_N_2 : inout bit; MBP_N_3 : inout bit; MBP_N_4 : inout bit; MBP_N_5 : inout bit; MBP_N_6 : inout bit; MBP_N_7 : inout bit; MCI_BIST_ENABLE : in bit; MCI_DEBUG_EN_N : in bit; MCI_DMIMODE_OVERRIDE : inout bit; MCI_FRMAGENT : in bit; MCI_KSFC_DIS : inout bit; MCI_LGSPARE_2 : inout bit; MCI_LGSPARE_3 : inout bit; MCI_LGSPARE_4 : inout bit; MCI_LGSPARE_5 : inout bit; MCI_LGSPARE_6 : inout bit; MCI_NOA_AVRB_0 : in bit; MCI_NOA_AVRB_1 : in bit; MCI_NOA_AVRB_10 : in bit; MCI_NOA_AVRB_11 : in bit; MCI_NOA_AVRB_12 : in bit; MCI_NOA_AVRB_13 : in bit; MCI_NOA_AVRB_14 : in bit; MCI_NOA_AVRB_15 : in bit; MCI_NOA_AVRB_2 : in bit; MCI_NOA_AVRB_3 : in bit; MCI_NOA_AVRB_4 : in bit; MCI_NOA_AVRB_5 : in bit; MCI_NOA_AVRB_6 : in bit; MCI_NOA_AVRB_7 : in bit; MCI_NOA_AVRB_8 : in bit; MCI_NOA_AVRB_9 : in bit; MCI_NOA_AVRB_STB_DN_0 : in bit; MCI_NOA_AVRB_STB_DN_1 : in bit; MCI_NOA_AVRB_STB_DP_0 : in bit; MCI_NOA_AVRB_STB_DP_1 : in bit; MCI_SAFE_MODE_BOOT : in bit; MCI_SOCKET_ID_0 : in bit; MCI_SOCKET_ID_1 : in bit; MCI_TXT_AGENT : in bit; MCI_TXT_PLTEN : in bit; MCP01_AMONI : linkage bit; MCP01_AMONV : linkage bit; MCP01_DFX_DN : linkage bit; MCP01_DFX_DP : linkage bit; MCP01_DMON : linkage bit; MCP01_HSCLK_DN : linkage bit; MCP01_HSCLK_DP : linkage bit; MCP01_RBIAS : linkage bit_vector(1 downto 0); MSMI_N : inout bit; NMI : in bit; NOA_COMP : linkage bit; OVERCLK_0 : in bit; OVERCLK_1 : in bit; OVERCLK_2 : in bit; PE012_AMONI : linkage bit; PE012_AMONV : linkage bit; PE012_DFX_DN : linkage bit; PE012_DFX_DP : linkage bit; PE012_DMON : linkage bit; PE012_HSCLK_DN : linkage bit; PE012_HSCLK_DP : linkage bit; PE012_RBIAS : linkage bit_vector(1 downto 0); PE1_RX_DN_0 : in bit; PE1_RX_DN_1 : in bit; PE1_RX_DN_10 : in bit; PE1_RX_DN_11 : in bit; PE1_RX_DN_12 : in bit; PE1_RX_DN_13 : in bit; PE1_RX_DN_14 : in bit; PE1_RX_DN_15 : in bit; PE1_RX_DN_2 : in bit; PE1_RX_DN_3 : in bit; PE1_RX_DN_4 : in bit; PE1_RX_DN_5 : in bit; PE1_RX_DN_6 : in bit; PE1_RX_DN_7 : in bit; PE1_RX_DN_8 : in bit; PE1_RX_DN_9 : in bit; PE1_RX_DP_0 : in bit; PE1_RX_DP_1 : in bit; PE1_RX_DP_10 : in bit; PE1_RX_DP_11 : in bit; PE1_RX_DP_12 : in bit; PE1_RX_DP_13 : in bit; PE1_RX_DP_14 : in bit; PE1_RX_DP_15 : in bit; PE1_RX_DP_2 : in bit; PE1_RX_DP_3 : in bit; PE1_RX_DP_4 : in bit; PE1_RX_DP_5 : in bit; PE1_RX_DP_6 : in bit; PE1_RX_DP_7 : in bit; PE1_RX_DP_8 : in bit; PE1_RX_DP_9 : in bit; PE1_TX_DN_0 : buffer bit; PE1_TX_DN_1 : buffer bit; PE1_TX_DN_10 : buffer bit; PE1_TX_DN_11 : buffer bit; PE1_TX_DN_12 : buffer bit; PE1_TX_DN_13 : buffer bit; PE1_TX_DN_14 : buffer bit; PE1_TX_DN_15 : buffer bit; PE1_TX_DN_2 : buffer bit; PE1_TX_DN_3 : buffer bit; PE1_TX_DN_4 : buffer bit; PE1_TX_DN_5 : buffer bit; PE1_TX_DN_6 : buffer bit; PE1_TX_DN_7 : buffer bit; PE1_TX_DN_8 : buffer bit; PE1_TX_DN_9 : buffer bit; PE1_TX_DP_0 : buffer bit; PE1_TX_DP_1 : buffer bit; PE1_TX_DP_10 : buffer bit; PE1_TX_DP_11 : buffer bit; PE1_TX_DP_12 : buffer bit; PE1_TX_DP_13 : buffer bit; PE1_TX_DP_14 : buffer bit; PE1_TX_DP_15 : buffer bit; PE1_TX_DP_2 : buffer bit; PE1_TX_DP_3 : buffer bit; PE1_TX_DP_4 : buffer bit; PE1_TX_DP_5 : buffer bit; PE1_TX_DP_6 : buffer bit; PE1_TX_DP_7 : buffer bit; PE1_TX_DP_8 : buffer bit; PE1_TX_DP_9 : buffer bit; PE2_RX_DN_0 : in bit; PE2_RX_DN_1 : in bit; PE2_RX_DN_10 : in bit; PE2_RX_DN_11 : in bit; PE2_RX_DN_12 : in bit; PE2_RX_DN_13 : in bit; PE2_RX_DN_14 : in bit; PE2_RX_DN_15 : in bit; PE2_RX_DN_2 : in bit; PE2_RX_DN_3 : in bit; PE2_RX_DN_4 : in bit; PE2_RX_DN_5 : in bit; PE2_RX_DN_6 : in bit; PE2_RX_DN_7 : in bit; PE2_RX_DN_8 : in bit; PE2_RX_DN_9 : in bit; PE2_RX_DP_0 : in bit; PE2_RX_DP_1 : in bit; PE2_RX_DP_10 : in bit; PE2_RX_DP_11 : in bit; PE2_RX_DP_12 : in bit; PE2_RX_DP_13 : in bit; PE2_RX_DP_14 : in bit; PE2_RX_DP_15 : in bit; PE2_RX_DP_2 : in bit; PE2_RX_DP_3 : in bit; PE2_RX_DP_4 : in bit; PE2_RX_DP_5 : in bit; PE2_RX_DP_6 : in bit; PE2_RX_DP_7 : in bit; PE2_RX_DP_8 : in bit; PE2_RX_DP_9 : in bit; PE2_TX_DN_0 : buffer bit; PE2_TX_DN_1 : buffer bit; PE2_TX_DN_10 : buffer bit; PE2_TX_DN_11 : buffer bit; PE2_TX_DN_12 : buffer bit; PE2_TX_DN_13 : buffer bit; PE2_TX_DN_14 : buffer bit; PE2_TX_DN_15 : buffer bit; PE2_TX_DN_2 : buffer bit; PE2_TX_DN_3 : buffer bit; PE2_TX_DN_4 : buffer bit; PE2_TX_DN_5 : buffer bit; PE2_TX_DN_6 : buffer bit; PE2_TX_DN_7 : buffer bit; PE2_TX_DN_8 : buffer bit; PE2_TX_DN_9 : buffer bit; PE2_TX_DP_0 : buffer bit; PE2_TX_DP_1 : buffer bit; PE2_TX_DP_10 : buffer bit; PE2_TX_DP_11 : buffer bit; PE2_TX_DP_12 : buffer bit; PE2_TX_DP_13 : buffer bit; PE2_TX_DP_14 : buffer bit; PE2_TX_DP_15 : buffer bit; PE2_TX_DP_2 : buffer bit; PE2_TX_DP_3 : buffer bit; PE2_TX_DP_4 : buffer bit; PE2_TX_DP_5 : buffer bit; PE2_TX_DP_6 : buffer bit; PE2_TX_DP_7 : buffer bit; PE2_TX_DP_8 : buffer bit; PE2_TX_DP_9 : buffer bit; PE3_AMONI : linkage bit; PE3_AMONV : linkage bit; PE3_DFX_DN : linkage bit; PE3_DFX_DP : linkage bit; PE3_DMON : linkage bit; PE3_HSCLK_DN : linkage bit; PE3_HSCLK_DP : linkage bit; PE3_RBIAS : linkage bit_vector(1 downto 0); PE3_RX_DN_0 : in bit; PE3_RX_DN_1 : in bit; PE3_RX_DN_10 : in bit; PE3_RX_DN_11 : in bit; PE3_RX_DN_12 : in bit; PE3_RX_DN_13 : in bit; PE3_RX_DN_14 : in bit; PE3_RX_DN_15 : in bit; PE3_RX_DN_2 : in bit; PE3_RX_DN_3 : in bit; PE3_RX_DN_4 : in bit; PE3_RX_DN_5 : in bit; PE3_RX_DN_6 : in bit; PE3_RX_DN_7 : in bit; PE3_RX_DN_8 : in bit; PE3_RX_DN_9 : in bit; PE3_RX_DP_0 : in bit; PE3_RX_DP_1 : in bit; PE3_RX_DP_10 : in bit; PE3_RX_DP_11 : in bit; PE3_RX_DP_12 : in bit; PE3_RX_DP_13 : in bit; PE3_RX_DP_14 : in bit; PE3_RX_DP_15 : in bit; PE3_RX_DP_2 : in bit; PE3_RX_DP_3 : in bit; PE3_RX_DP_4 : in bit; PE3_RX_DP_5 : in bit; PE3_RX_DP_6 : in bit; PE3_RX_DP_7 : in bit; PE3_RX_DP_8 : in bit; PE3_RX_DP_9 : in bit; PE3_TX_DN_0 : buffer bit; PE3_TX_DN_1 : buffer bit; PE3_TX_DN_10 : buffer bit; PE3_TX_DN_11 : buffer bit; PE3_TX_DN_12 : buffer bit; PE3_TX_DN_13 : buffer bit; PE3_TX_DN_14 : buffer bit; PE3_TX_DN_15 : buffer bit; PE3_TX_DN_2 : buffer bit; PE3_TX_DN_3 : buffer bit; PE3_TX_DN_4 : buffer bit; PE3_TX_DN_5 : buffer bit; PE3_TX_DN_6 : buffer bit; PE3_TX_DN_7 : buffer bit; PE3_TX_DN_8 : buffer bit; PE3_TX_DN_9 : buffer bit; PE3_TX_DP_0 : buffer bit; PE3_TX_DP_1 : buffer bit; PE3_TX_DP_10 : buffer bit; PE3_TX_DP_11 : buffer bit; PE3_TX_DP_12 : buffer bit; PE3_TX_DP_13 : buffer bit; PE3_TX_DP_14 : buffer bit; PE3_TX_DP_15 : buffer bit; PE3_TX_DP_2 : buffer bit; PE3_TX_DP_3 : buffer bit; PE3_TX_DP_4 : buffer bit; PE3_TX_DP_5 : buffer bit; PE3_TX_DP_6 : buffer bit; PE3_TX_DP_7 : buffer bit; PE3_TX_DP_8 : buffer bit; PE3_TX_DP_9 : buffer bit; PECI : inout bit; PE_HP_SCL : inout bit; PE_HP_SDA : inout bit; PIO_VCCQ : linkage bit_vector(10 downto 0); PIROM_ADDR_0 : linkage bit; PIROM_ADDR_1 : linkage bit; PIROM_ADDR_2 : linkage bit; PKGID_0 : linkage bit; PKGID_1 : linkage bit; PKGID_2 : linkage bit; PMSYNC : in bit; PMSYNC_CLK : in bit; PM_FAST_WAKE_N : inout bit; PRDY_N : out bit; PREQ_N : in bit; PROCDIS_N : in bit; PROCHOT_N : in bit; PROC_ID_0 : linkage bit; PROC_ID_1 : linkage bit; PWRGOOD : in bit; PWR_DEBUG_N : in bit; QPI0_CLK_RX_DN_RSVD : linkage bit; QPI0_CLK_RX_DP_RSVD : linkage bit; QPI0_CLK_TX_DN_RSVD_RFID : linkage bit; QPI0_CLK_TX_DP_RSVD_RFID : linkage bit; QPI1_CLK_RX_DN_RSVD : linkage bit; QPI1_CLK_RX_DP_RSVD : linkage bit; QPI1_CLK_TX_DN_RSVD : linkage bit; QPI1_CLK_TX_DP_RSVD : linkage bit; QPI2_CLK_RX_DN_RSVD : linkage bit; QPI2_CLK_RX_DP_RSVD : linkage bit; QPI2_CLK_TX_DN_RSVD : linkage bit; QPI2_CLK_TX_DP_RSVD : linkage bit; RC_ENET_CLK_DN : linkage bit; RC_ENET_CLK_DP : linkage bit; RC_GPIO_0 : linkage bit; RC_GPIO_1 : linkage bit; RC_GPIO_10 : linkage bit; RC_GPIO_11 : linkage bit; RC_GPIO_12 : linkage bit; RC_GPIO_13 : linkage bit; RC_GPIO_14 : linkage bit; RC_GPIO_15 : linkage bit; RC_GPIO_2 : linkage bit; RC_GPIO_3 : linkage bit; RC_GPIO_4 : linkage bit; RC_GPIO_5 : linkage bit; RC_GPIO_6 : linkage bit; RC_GPIO_7 : linkage bit; RC_GPIO_8 : linkage bit; RC_GPIO_9 : linkage bit; RC_REFCLK_0 : linkage bit_vector(1 downto 0); RC_REFCLK_1 : linkage bit_vector(1 downto 0); RC_VCCH_1P8 : linkage bit_vector(4 downto 0); RC_VCC_CORE : linkage bit_vector(52 downto 0); RC_VCC_CORE_B : linkage bit_vector(14 downto 0); RESET_N : in bit; RFID_VCC2P5 : linkage bit; SKTOCC_N : linkage bit; SMBCLK : linkage bit; SMBDAT : linkage bit; SM_WP : linkage bit; SOCKET_ID2 : in bit; SPARE : linkage bit_vector(88 downto 0); SPARE_NCTF_0 : linkage bit; SPARE_NCTF_1 : linkage bit; SPARE_NCTF_2 : linkage bit; SPARE_NCTF_3 : linkage bit; SPARE_NCTF_5 : linkage bit; SPARE_NCTF_6 : linkage bit; SPARE_NCTF_7 : linkage bit; SPARE_NCTF_8 : linkage bit; SPARE_NCTF_9 : linkage bit; SVIDALERT_N_0 : in bit; SVIDALERT_N_1 : in bit; SVIDCLK_0 : out bit; SVIDCLK_1 : out bit; SVIDDATA_0 : inout bit; SVIDDATA_1 : inout bit; TCK : in bit; TDI : in bit; TDO : out bit; THERMADA_0 : linkage bit; THERMADA_1 : linkage bit; THERMADC_0 : linkage bit; THERMADC_1 : linkage bit; THERMTRIP_N : out bit; TMS : in bit; TRST_N : in bit; TSC_SYNC : inout bit; VCC3P3 : linkage bit; VCCD012 : linkage bit_vector(48 downto 0); VCCD012_NCTF : linkage bit_vector(2 downto 0); VCCD345 : linkage bit_vector(48 downto 0); VCCD345_NCTF : linkage bit_vector(1 downto 0); VCCFUSE : linkage bit_vector(1 downto 0); VCCFUSEPGM_0 : linkage bit; VCCFUSEPGM_1 : linkage bit; VCCFUSEPGM_2 : linkage bit; VCCFUSEPGM_3 : linkage bit; VCCFUSEPGM_4 : linkage bit; VCCFUSEPGM_5 : linkage bit; VCCFUSEPGM_6 : linkage bit; VCCFUSEPGM_7 : linkage bit; VCCIN : linkage bit_vector(267 downto 0); VCCINR2PMAX : linkage bit_vector(1 downto 0); VCCIN_SENSE_DP : linkage bit; VCCIO : linkage bit_vector(74 downto 0); VCCIO_SENSE_DP : linkage bit; VCCSA : linkage bit_vector(25 downto 0); VCCSA_SENSE_DP : linkage bit; VSENSEPMAX : linkage bit; VSS : linkage bit_vector(1230 downto 0); VSS_NCTF : linkage bit_vector(22 downto 0); VSS_VCCIN_SENSE_DN : linkage bit; VSS_VCCIO_SENSE_DN : linkage bit; VSS_VCCSA_SENSE_DN : linkage bit ); use STD_1149_1_2001.all; use STD_1149_6_2003.all; attribute COMPONENT_CONFORMANCE of SKX_XCC : entity is "STD_1149_1_2001" ; attribute PIN_MAP of SKX_XCC : entity is PHYSICAL_PIN_MAP; constant LGA : PIN_MAP_STRING := -- Define PinOut "BCLK0_DN : AU24, " & "BCLK0_DP : AW24, " & "BCLK1_DN : CR26, " & "BCLK1_DP : CP27, " & "BCLK2_DN : CT25, " & "BCLK2_DP : CU26, " & "BMCINIT : BD23, " & "CATERR_N : AL14, " & "CD_CLKOBS_DN_0 : CB25, " & "CD_CLKOBS_DN_1 : BV23, " & "CD_CLKOBS_DP_0 : CD25, " & "CD_CLKOBS_DP_1 : BW22, " & "CD_EXT_REFCLK_DN : CA24, " & "CD_EXT_REFCLK_DP : BY25, " & "CD_HFI0_I2CCLK : BN22, " & "CD_HFI0_I2CDAT : BP23, " & "CD_HFI0_INT_N : BP19, " & "CD_HFI0_LED_N : BK21, " & "CD_HFI0_MODPRST_N : BR20, " & "CD_HFI0_RESET_N : BN24, " & "CD_HFI1_I2CCLK : BJ22, " & "CD_HFI1_I2CDAT : BH23, " & "CD_HFI1_INT_N : BM21, " & "CD_HFI1_LED_N : BM23, " & "CD_HFI1_MODPRST_N : BT19, " & "CD_HFI1_RESET_N : BK23, " & "CD_HFI_REFCLK_DN : BE16, " & "CD_HFI_REFCLK_DP : BG16, " & "CD_PE_REFCLK_DN : BU24, " & "CD_PE_REFCLK_DP : BW24, " & "CD_PLL_RESET_N : CH25, " & "CD_POR_N : CF25, " & "CD_TCLK : CB23, " & "CD_TDI : BY21, " & "CD_TDO : CC22, " & "CD_TMS : CE24, " & "CD_TRST_N : CD23, " & "CD_TR_TCK : CG24, " & "CD_VCCE_1P0 : ( BT11, BR12, BP13, BP11, BN12, BM11 ) , " & "CD_VCCH_1P8 : ( BY27, BV27, BU26, BT27 ) , " & "CD_VCCH_2P5 : ( B11, A12, A10 ) , " & "CD_VCCP_1P0 : ( BV15, BV13, BV11, BU14, BU12, BT15, BT13, BR14, BP15, " & " BN14 ) , " & "CD_VCCP_SENSE_DP : BT17, " & "CD_VCC_CORE : ( BL14, BK15, BK13, BJ14, BJ12, BH13, BG14, BG12, BF13, " & " BF11, BE14, BE12, BD13 ) , " & "CD_VCC_CORE_SENSE_DP : BN16, " & "CD_VSS_VCCP_SENSE_DN : BU16, " & "CD_VSS_VCC_CORE_SENSE_DN : BL16, " & "CGU_AMONI : E24, " & "CGU_AMONV : F23, " & "DDR012_DRAM_PWR_OK : AN30, " & "DDR012_MEMHOT_N : AH13, " & "DDR012_RCOMP_0 : Y43, " & "DDR012_RCOMP_1 : AB43, " & "DDR012_RCOMP_2 : AC42, " & "DDR012_RESET_N : U64, " & "DDR012_SPDSCL : AJ18, " & "DDR012_SPDSDA : AF17, " & "DDR012_VIEWDIG_0 : AG46, " & "DDR012_VIEWDIG_1 : AF45, " & "DDR0_ACT_N : J60, " & "DDR0_ALERT_N : B61, " & "DDR0_BA_0 : C52, " & "DDR0_BA_1 : G54, " & "DDR0_BG_0 : D61, " & "DDR0_BG_1 : F63, " & "DDR0_CAVREF : AJ64, " & "DDR0_CKE_0 : C62, " & "DDR0_CKE_1 : C64, " & "DDR0_CKE_2 : B63, " & "DDR0_CKE_3 : D63, " & "DDR0_CLK_DN_0 : F55, " & "DDR0_CLK_DN_1 : C54, " & "DDR0_CLK_DN_2 : J56, " & "DDR0_CLK_DN_3 : C56, " & "DDR0_CLK_DP_0 : D55, " & "DDR0_CLK_DP_1 : B55, " & "DDR0_CLK_DP_2 : G56, " & "DDR0_CLK_DP_3 : B57, " & "DDR0_CS_N_0 : G52, " & "DDR0_CS_N_1 : F49, " & "DDR0_CS_N_2 : D47, " & "DDR0_CS_N_3 : F47, " & "DDR0_CS_N_4 : B51, " & "DDR0_CS_N_5 : D49, " & "DDR0_CS_N_6 : F45, " & "DDR0_CS_N_7 : K45, " & "DDR0_C_2 : G46, " & "DDR0_DQS_DN_0 : AJ84, " & "DDR0_DQS_DN_1 : R84, " & "DDR0_DQS_DN_10 : U84, " & "DDR0_DQS_DN_11 : U82, " & "DDR0_DQS_DN_12 : K75, " & "DDR0_DQS_DN_13 : A40, " & "DDR0_DQS_DN_14 : J36, " & "DDR0_DQS_DN_15 : J30, " & "DDR0_DQS_DN_16 : J24, " & "DDR0_DQS_DN_17 : AB67, " & "DDR0_DQS_DN_2 : P79, " & "DDR0_DQS_DN_3 : T75, " & "DDR0_DQS_DN_4 : G40, " & "DDR0_DQS_DN_5 : R36, " & "DDR0_DQS_DN_6 : R30, " & "DDR0_DQS_DN_7 : N24, " & "DDR0_DQS_DN_8 : AH67, " & "DDR0_DQS_DN_9 : AL84, " & "DDR0_DQS_DP_0 : AH85, " & "DDR0_DQS_DP_1 : P85, " & "DDR0_DQS_DP_10 : V85, " & "DDR0_DQS_DP_11 : T81, " & "DDR0_DQS_DP_12 : M75, " & "DDR0_DQS_DP_13 : C40, " & "DDR0_DQS_DP_14 : L36, " & "DDR0_DQS_DP_15 : L30, " & "DDR0_DQS_DP_16 : L24, " & "DDR0_DQS_DP_17 : AD67, " & "DDR0_DQS_DP_2 : R80, " & "DDR0_DQS_DP_3 : P75, " & "DDR0_DQS_DP_4 : E40, " & "DDR0_DQS_DP_5 : N36, " & "DDR0_DQS_DP_6 : N30, " & "DDR0_DQS_DP_7 : R24, " & "DDR0_DQS_DP_8 : AF67, " & "DDR0_DQS_DP_9 : AM85, " & "DDR0_DQ_0 : AN86, " & "DDR0_DQ_1 : AN84, " & "DDR0_DQ_10 : L86, " & "DDR0_DQ_11 : L84, " & "DDR0_DQ_12 : AA86, " & "DDR0_DQ_13 : AA84, " & "DDR0_DQ_14 : N86, " & "DDR0_DQ_15 : N84, " & "DDR0_DQ_16 : V81, " & "DDR0_DQ_17 : T79, " & "DDR0_DQ_18 : N82, " & "DDR0_DQ_19 : M81, " & "DDR0_DQ_2 : AE86, " & "DDR0_DQ_20 : W80, " & "DDR0_DQ_21 : V79, " & "DDR0_DQ_22 : R82, " & "DDR0_DQ_23 : N80, " & "DDR0_DQ_24 : L76, " & "DDR0_DQ_25 : R76, " & "DDR0_DQ_26 : M73, " & "DDR0_DQ_27 : P73, " & "DDR0_DQ_28 : M77, " & "DDR0_DQ_29 : P77, " & "DDR0_DQ_3 : AE84, " & "DDR0_DQ_30 : L74, " & "DDR0_DQ_31 : R74, " & "DDR0_DQ_32 : C42, " & "DDR0_DQ_33 : B41, " & "DDR0_DQ_34 : C38, " & "DDR0_DQ_35 : E38, " & "DDR0_DQ_36 : E42, " & "DDR0_DQ_37 : F41, " & "DDR0_DQ_38 : B39, " & "DDR0_DQ_39 : F39, " & "DDR0_DQ_4 : AR86, " & "DDR0_DQ_40 : K37, " & "DDR0_DQ_41 : P37, " & "DDR0_DQ_42 : L34, " & "DDR0_DQ_43 : N34, " & "DDR0_DQ_44 : L38, " & "DDR0_DQ_45 : N38, " & "DDR0_DQ_46 : K35, " & "DDR0_DQ_47 : P35, " & "DDR0_DQ_48 : K31, " & "DDR0_DQ_49 : P31, " & "DDR0_DQ_5 : AR84, " & "DDR0_DQ_50 : L28, " & "DDR0_DQ_51 : N28, " & "DDR0_DQ_52 : L32, " & "DDR0_DQ_53 : N32, " & "DDR0_DQ_54 : K29, " & "DDR0_DQ_55 : P29, " & "DDR0_DQ_56 : K25, " & "DDR0_DQ_57 : P25, " & "DDR0_DQ_58 : P23, " & "DDR0_DQ_59 : T23, " & "DDR0_DQ_6 : AG86, " & "DDR0_DQ_60 : L26, " & "DDR0_DQ_61 : N26, " & "DDR0_DQ_62 : H23, " & "DDR0_DQ_63 : K23, " & "DDR0_DQ_7 : AG84, " & "DDR0_DQ_8 : W86, " & "DDR0_DQ_9 : W84, " & "DDR0_ECC_0 : AC68, " & "DDR0_ECC_1 : AG68, " & "DDR0_ECC_2 : AD65, " & "DDR0_ECC_3 : AF65, " & "DDR0_ECC_4 : AD69, " & "DDR0_ECC_5 : AF69, " & "DDR0_ECC_6 : AC66, " & "DDR0_ECC_7 : AG66, " & "DDR0_MA_0 : F53, " & "DDR0_MA_1 : F57, " & "DDR0_MA_10 : J54, " & "DDR0_MA_11 : G62, " & "DDR0_MA_12 : J64, " & "DDR0_MA_13 : J48, " & "DDR0_MA_14 : F51, " & "DDR0_MA_15 : K49, " & "DDR0_MA_16 : D51, " & "DDR0_MA_17 : K47, " & "DDR0_MA_2 : D57, " & "DDR0_MA_3 : C58, " & "DDR0_MA_4 : G58, " & "DDR0_MA_5 : F59, " & "DDR0_MA_6 : D59, " & "DDR0_MA_7 : G60, " & "DDR0_MA_8 : C60, " & "DDR0_MA_9 : F61, " & "DDR0_ODT_0 : C50, " & "DDR0_ODT_1 : C48, " & "DDR0_ODT_2 : G50, " & "DDR0_ODT_3 : G48, " & "DDR0_PAR : D53, " & "DDR1_ACT_N : T63, " & "DDR1_ALERT_N : W62, " & "DDR1_BA_0 : T53, " & "DDR1_BA_1 : K55, " & "DDR1_BG_0 : M61, " & "DDR1_BG_1 : N60, " & "DDR1_CAVREF : AK63, " & "DDR1_CKE_0 : N62, " & "DDR1_CKE_1 : R64, " & "DDR1_CKE_2 : K63, " & "DDR1_CKE_3 : L64, " & "DDR1_CLK_DN_0 : M53, " & "DDR1_CLK_DN_1 : R54, " & "DDR1_CLK_DN_2 : N56, " & "DDR1_CLK_DN_3 : R56, " & "DDR1_CLK_DP_0 : N54, " & "DDR1_CLK_DP_1 : T55, " & "DDR1_CLK_DP_2 : M57, " & "DDR1_CLK_DP_3 : T57, " & "DDR1_CS_N_0 : K51, " & "DDR1_CS_N_1 : R50, " & "DDR1_CS_N_2 : N46, " & "DDR1_CS_N_3 : V47, " & "DDR1_CS_N_4 : J50, " & "DDR1_CS_N_5 : T49, " & "DDR1_CS_N_6 : M45, " & "DDR1_CS_N_7 : R46, " & "DDR1_C_2 : M47, " & "DDR1_DQS_DN_0 : AP79, " & "DDR1_DQS_DN_1 : AD79, " & "DDR1_DQS_DN_10 : AG82, " & "DDR1_DQS_DN_11 : D79, " & "DDR1_DQS_DN_12 : B73, " & "DDR1_DQS_DN_13 : J42, " & "DDR1_DQS_DN_14 : A34, " & "DDR1_DQS_DN_15 : A28, " & "DDR1_DQS_DN_16 : T27, " & "DDR1_DQS_DN_17 : G68, " & "DDR1_DQS_DN_2 : K79, " & "DDR1_DQS_DN_3 : H73, " & "DDR1_DQS_DN_4 : N42, " & "DDR1_DQS_DN_5 : G34, " & "DDR1_DQS_DN_6 : G28, " & "DDR1_DQS_DN_7 : AB27, " & "DDR1_DQS_DN_8 : N68, " & "DDR1_DQS_DN_9 : AU82, " & "DDR1_DQS_DP_0 : AR80, " & "DDR1_DQS_DP_1 : AE80, " & "DDR1_DQS_DP_10 : AF81, " & "DDR1_DQS_DP_11 : F79, " & "DDR1_DQS_DP_12 : D73, " & "DDR1_DQS_DP_13 : L42, " & "DDR1_DQS_DP_14 : C34, " & "DDR1_DQS_DP_15 : C28, " & "DDR1_DQS_DP_16 : V27, " & "DDR1_DQS_DP_17 : J68, " & "DDR1_DQS_DP_2 : H79, " & "DDR1_DQS_DP_3 : F73, " & "DDR1_DQS_DP_4 : R42, " & "DDR1_DQS_DP_5 : E34, " & "DDR1_DQS_DP_6 : E28, " & "DDR1_DQS_DP_7 : Y27, " & "DDR1_DQS_DP_8 : L68, " & "DDR1_DQS_DP_9 : AT81, " & "DDR1_DQ_0 : AV81, " & "DDR1_DQ_1 : AT79, " & "DDR1_DQ_10 : AC82, " & "DDR1_DQ_11 : AB81, " & "DDR1_DQ_12 : AJ80, " & "DDR1_DQ_13 : AH79, " & "DDR1_DQ_14 : AE82, " & "DDR1_DQ_15 : AC80, " & "DDR1_DQ_16 : E80, " & "DDR1_DQ_17 : J80, " & "DDR1_DQ_18 : F77, " & "DDR1_DQ_19 : H77, " & "DDR1_DQ_2 : AN82, " & "DDR1_DQ_20 : F81, " & "DDR1_DQ_21 : H81, " & "DDR1_DQ_22 : E78, " & "DDR1_DQ_23 : J78, " & "DDR1_DQ_24 : D75, " & "DDR1_DQ_25 : C74, " & "DDR1_DQ_26 : D71, " & "DDR1_DQ_27 : F71, " & "DDR1_DQ_28 : F75, " & "DDR1_DQ_29 : G74, " & "DDR1_DQ_3 : AM81, " & "DDR1_DQ_30 : C72, " & "DDR1_DQ_31 : G72, " & "DDR1_DQ_32 : K43, " & "DDR1_DQ_33 : H43, " & "DDR1_DQ_34 : L40, " & "DDR1_DQ_35 : N40, " & "DDR1_DQ_36 : P43, " & "DDR1_DQ_37 : T43, " & "DDR1_DQ_38 : K41, " & "DDR1_DQ_39 : P41, " & "DDR1_DQ_4 : AW80, " & "DDR1_DQ_40 : C36, " & "DDR1_DQ_41 : B35, " & "DDR1_DQ_42 : C32, " & "DDR1_DQ_43 : E32, " & "DDR1_DQ_44 : E36, " & "DDR1_DQ_45 : F35, " & "DDR1_DQ_46 : B33, " & "DDR1_DQ_47 : F33, " & "DDR1_DQ_48 : C30, " & "DDR1_DQ_49 : B29, " & "DDR1_DQ_5 : AV79, " & "DDR1_DQ_50 : C26, " & "DDR1_DQ_51 : E26, " & "DDR1_DQ_52 : E30, " & "DDR1_DQ_53 : F29, " & "DDR1_DQ_54 : B27, " & "DDR1_DQ_55 : F27, " & "DDR1_DQ_56 : U28, " & "DDR1_DQ_57 : AA28, " & "DDR1_DQ_58 : V25, " & "DDR1_DQ_59 : Y25, " & "DDR1_DQ_6 : AR82, " & "DDR1_DQ_60 : V29, " & "DDR1_DQ_61 : Y29, " & "DDR1_DQ_62 : U26, " & "DDR1_DQ_63 : AA26, " & "DDR1_DQ_7 : AN80, " & "DDR1_DQ_8 : AH81, " & "DDR1_DQ_9 : AF79, " & "DDR1_ECC_0 : J70, " & "DDR1_ECC_1 : H69, " & "DDR1_ECC_2 : J66, " & "DDR1_ECC_3 : L66, " & "DDR1_ECC_4 : L70, " & "DDR1_ECC_5 : M69, " & "DDR1_ECC_6 : H67, " & "DDR1_ECC_7 : M67, " & "DDR1_MA_0 : J52, " & "DDR1_MA_1 : J58, " & "DDR1_MA_10 : M55, " & "DDR1_MA_11 : R60, " & "DDR1_MA_12 : T61, " & "DDR1_MA_13 : M51, " & "DDR1_MA_14 : T51, " & "DDR1_MA_15 : N52, " & "DDR1_MA_16 : R52, " & "DDR1_MA_17 : N48, " & "DDR1_MA_2 : K57, " & "DDR1_MA_3 : N58, " & "DDR1_MA_4 : M59, " & "DDR1_MA_5 : R58, " & "DDR1_MA_6 : T59, " & "DDR1_MA_7 : V61, " & "DDR1_MA_8 : W60, " & "DDR1_MA_9 : K59, " & "DDR1_ODT_0 : N50, " & "DDR1_ODT_1 : R48, " & "DDR1_ODT_2 : M49, " & "DDR1_ODT_3 : T47, " & "DDR1_PAR : K53, " & "DDR2_ACT_N : AB61, " & "DDR2_ALERT_N : AD61, " & "DDR2_BA_0 : W52, " & "DDR2_BA_1 : AE56, " & "DDR2_BG_0 : AA60, " & "DDR2_BG_1 : AE62, " & "DDR2_CAVREF : AH63, " & "DDR2_CKE_0 : AA62, " & "DDR2_CKE_1 : AD63, " & "DDR2_CKE_2 : V63, " & "DDR2_CKE_3 : AB63, " & "DDR2_CLK_DN_0 : AA54, " & "DDR2_CLK_DN_1 : W54, " & "DDR2_CLK_DN_2 : AA56, " & "DDR2_CLK_DN_3 : W56, " & "DDR2_CLK_DP_0 : AB55, " & "DDR2_CLK_DP_1 : V55, " & "DDR2_CLK_DP_2 : AB57, " & "DDR2_CLK_DP_3 : V57, " & "DDR2_CS_N_0 : V51, " & "DDR2_CS_N_1 : AB49, " & "DDR2_CS_N_2 : W46, " & "DDR2_CS_N_3 : AA46, " & "DDR2_CS_N_4 : AB51, " & "DDR2_CS_N_5 : W48, " & "DDR2_CS_N_6 : T45, " & "DDR2_CS_N_7 : V45, " & "DDR2_C_2 : AB45, " & "DDR2_DQS_DN_0 : AL74, " & "DDR2_DQS_DN_1 : AA74, " & "DDR2_DQS_DN_10 : AD77, " & "DDR2_DQS_DN_11 : U72, " & "DDR2_DQS_DN_12 : AL66, " & "DDR2_DQS_DN_13 : T39, " & "DDR2_DQS_DN_14 : T33, " & "DDR2_DQS_DN_15 : AC30, " & "DDR2_DQS_DN_16 : AC24, " & "DDR2_DQS_DN_17 : AT71, " & "DDR2_DQS_DN_2 : Y69, " & "DDR2_DQS_DN_3 : AU66, " & "DDR2_DQS_DN_4 : AB39, " & "DDR2_DQS_DN_5 : AB33, " & "DDR2_DQS_DN_6 : AJ30, " & "DDR2_DQS_DN_7 : AJ24, " & "DDR2_DQS_DN_8 : BB71, " & "DDR2_DQS_DN_9 : AP77, " & "DDR2_DQS_DP_0 : AM75, " & "DDR2_DQS_DP_1 : AB75, " & "DDR2_DQS_DP_10 : AC76, " & "DDR2_DQS_DP_11 : V71, " & "DDR2_DQS_DP_12 : AN66, " & "DDR2_DQS_DP_13 : V39, " & "DDR2_DQS_DP_14 : V33, " & "DDR2_DQS_DP_15 : AE30, " & "DDR2_DQS_DP_16 : AE24, " & "DDR2_DQS_DP_17 : AV71, " & "DDR2_DQS_DP_2 : W70, " & "DDR2_DQS_DP_3 : AR66, " & "DDR2_DQS_DP_4 : Y39, " & "DDR2_DQS_DP_5 : Y33, " & "DDR2_DQS_DP_6 : AG30, " & "DDR2_DQS_DP_7 : AG24, " & "DDR2_DQS_DP_8 : AY71, " & "DDR2_DQS_DP_9 : AN76, " & "DDR2_DQ_0 : AR76, " & "DDR2_DQ_1 : AN74, " & "DDR2_DQ_10 : Y77, " & "DDR2_DQ_11 : W76, " & "DDR2_DQ_12 : AF75, " & "DDR2_DQ_13 : AE74, " & "DDR2_DQ_14 : AB77, " & "DDR2_DQ_15 : Y75, " & "DDR2_DQ_16 : W72, " & "DDR2_DQ_17 : AA70, " & "DDR2_DQ_18 : R70, " & "DDR2_DQ_19 : T69, " & "DDR2_DQ_2 : AK77, " & "DDR2_DQ_20 : AA72, " & "DDR2_DQ_21 : AB71, " & "DDR2_DQ_22 : T71, " & "DDR2_DQ_23 : V69, " & "DDR2_DQ_24 : AM67, " & "DDR2_DQ_25 : AT67, " & "DDR2_DQ_26 : AN64, " & "DDR2_DQ_27 : AR64, " & "DDR2_DQ_28 : AN68, " & "DDR2_DQ_29 : AR68, " & "DDR2_DQ_3 : AJ76, " & "DDR2_DQ_30 : AM65, " & "DDR2_DQ_31 : AT65, " & "DDR2_DQ_32 : U40, " & "DDR2_DQ_33 : AA40, " & "DDR2_DQ_34 : V37, " & "DDR2_DQ_35 : Y37, " & "DDR2_DQ_36 : V41, " & "DDR2_DQ_37 : Y41, " & "DDR2_DQ_38 : U38, " & "DDR2_DQ_39 : AA38, " & "DDR2_DQ_4 : AT75, " & "DDR2_DQ_40 : U34, " & "DDR2_DQ_41 : AA34, " & "DDR2_DQ_42 : V31, " & "DDR2_DQ_43 : Y31, " & "DDR2_DQ_44 : V35, " & "DDR2_DQ_45 : Y35, " & "DDR2_DQ_46 : U32, " & "DDR2_DQ_47 : AA32, " & "DDR2_DQ_48 : AD31, " & "DDR2_DQ_49 : AH31, " & "DDR2_DQ_5 : AR74, " & "DDR2_DQ_50 : AE28, " & "DDR2_DQ_51 : AG28, " & "DDR2_DQ_52 : AE32, " & "DDR2_DQ_53 : AG32, " & "DDR2_DQ_54 : AD29, " & "DDR2_DQ_55 : AH29, " & "DDR2_DQ_56 : AD25, " & "DDR2_DQ_57 : AH25, " & "DDR2_DQ_58 : AE22, " & "DDR2_DQ_59 : AG22, " & "DDR2_DQ_6 : AM77, " & "DDR2_DQ_60 : AE26, " & "DDR2_DQ_61 : AG26, " & "DDR2_DQ_62 : AD23, " & "DDR2_DQ_63 : AH23, " & "DDR2_DQ_7 : AK75, " & "DDR2_DQ_8 : AE76, " & "DDR2_DQ_9 : AC74, " & "DDR2_ECC_0 : AU72, " & "DDR2_ECC_1 : BA72, " & "DDR2_ECC_2 : AV69, " & "DDR2_ECC_3 : AY69, " & "DDR2_ECC_4 : AV73, " & "DDR2_ECC_5 : AY73, " & "DDR2_ECC_6 : AU70, " & "DDR2_ECC_7 : BA70, " & "DDR2_MA_0 : AB53, " & "DDR2_MA_1 : AE58, " & "DDR2_MA_10 : AD55, " & "DDR2_MA_11 : AG60, " & "DDR2_MA_12 : AG62, " & "DDR2_MA_13 : AD53, " & "DDR2_MA_14 : W50, " & "DDR2_MA_15 : AE54, " & "DDR2_MA_16 : AA52, " & "DDR2_MA_17 : AC46, " & "DDR2_MA_2 : AD57, " & "DDR2_MA_3 : W58, " & "DDR2_MA_4 : AA58, " & "DDR2_MA_5 : V59, " & "DDR2_MA_6 : AB59, " & "DDR2_MA_7 : AE60, " & "DDR2_MA_8 : AD59, " & "DDR2_MA_9 : AG58, " & "DDR2_ODT_0 : AA50, " & "DDR2_ODT_1 : AA48, " & "DDR2_ODT_2 : V49, " & "DDR2_ODT_3 : AB47, " & "DDR2_PAR : V53, " & "DDR345_DRAM_PWR_OK : CR28, " & "DDR345_MEMHOT_N : AF13, " & "DDR345_RCOMP_0 : DC48, " & "DDR345_RCOMP_1 : DD47, " & "DDR345_RCOMP_2 : DD49, " & "DDR345_RESET_N : DV63, " & "DDR345_SPDSCL : AE18, " & "DDR345_SPDSDA : AD17, " & "DDR345_VIEWDIG_0 : DB51, " & "DDR345_VIEWDIG_1 : DC50, " & "DDR3_ACT_N : DW60, " & "DDR3_ALERT_N : ED63, " & "DDR3_BA_0 : EE52, " & "DDR3_BA_1 : EA54, " & "DDR3_BG_0 : ED61, " & "DDR3_BG_1 : DW62, " & "DDR3_CAVREF : CP61, " & "DDR3_CKE_0 : EE62, " & "DDR3_CKE_1 : EF63, " & "DDR3_CKE_2 : EA62, " & "DDR3_CKE_3 : EB63, " & "DDR3_CLK_DN_0 : ED55, " & "DDR3_CLK_DN_1 : EF55, " & "DDR3_CLK_DN_2 : DW56, " & "DDR3_CLK_DN_3 : EF57, " & "DDR3_CLK_DP_0 : EB55, " & "DDR3_CLK_DP_1 : EE54, " & "DDR3_CLK_DP_2 : EA56, " & "DDR3_CLK_DP_3 : EE56, " & "DDR3_CS_N_0 : EF51, " & "DDR3_CS_N_1 : ED49, " & "DDR3_CS_N_2 : ED47, " & "DDR3_CS_N_3 : EB47, " & "DDR3_CS_N_4 : EB51, " & "DDR3_CS_N_5 : EB49, " & "DDR3_CS_N_6 : DV45, " & "DDR3_CS_N_7 : EB45, " & "DDR3_C_2 : DV47, " & "DDR3_DQS_DN_0 : CU84, " & "DDR3_DQS_DN_1 : DN84, " & "DDR3_DQS_DN_10 : DM85, " & "DDR3_DQS_DN_11 : DN80, " & "DDR3_DQS_DN_12 : DP75, " & "DDR3_DQS_DN_13 : EA38, " & "DDR3_DQS_DN_14 : DP35, " & "DDR3_DQS_DN_15 : DM29, " & "DDR3_DQS_DN_16 : DM23, " & "DDR3_DQS_DN_17 : DB67, " & "DDR3_DQS_DN_2 : DL82, " & "DDR3_DQS_DN_3 : DV75, " & "DDR3_DQS_DN_4 : EE38, " & "DDR3_DQS_DN_5 : DV35, " & "DDR3_DQS_DN_6 : DV29, " & "DDR3_DQS_DN_7 : DV23, " & "DDR3_DQS_DN_8 : DF67, " & "DDR3_DQS_DN_9 : CR84, " & "DDR3_DQS_DP_0 : CV85, " & "DDR3_DQS_DP_1 : DP85, " & "DDR3_DQS_DP_10 : DL84, " & "DDR3_DQS_DP_11 : DP79, " & "DDR3_DQS_DP_12 : DM75, " & "DDR3_DQS_DP_13 : DW38, " & "DDR3_DQS_DP_14 : DM35, " & "DDR3_DQS_DP_15 : DP29, " & "DDR3_DQS_DP_16 : DP23, " & "DDR3_DQS_DP_17 : CY67, " & "DDR3_DQS_DP_2 : DM81, " & "DDR3_DQS_DP_3 : DT75, " & "DDR3_DQS_DP_4 : EC38, " & "DDR3_DQS_DP_5 : DT35, " & "DDR3_DQS_DP_6 : DT29, " & "DDR3_DQS_DP_7 : DT23, " & "DDR3_DQS_DP_8 : DD67, " & "DDR3_DQS_DP_9 : CP85, " & "DDR3_DQ_0 : CN84, " & "DDR3_DQ_1 : CN86, " & "DDR3_DQ_10 : DV83, " & "DDR3_DQ_11 : DY83, " & "DDR3_DQ_12 : DD85, " & "DDR3_DQ_13 : DE84, " & "DDR3_DQ_14 : DR84, " & "DDR3_DQ_15 : DV85, " & "DDR3_DQ_16 : DM79, " & "DDR3_DQ_17 : DK81, " & "DDR3_DQ_18 : DT81, " & "DDR3_DQ_19 : DR82, " & "DDR3_DQ_2 : DA86, " & "DDR3_DQ_20 : DK79, " & "DDR3_DQ_21 : DJ80, " & "DDR3_DQ_22 : DR80, " & "DDR3_DQ_23 : DN82, " & "DDR3_DQ_24 : DN76, " & "DDR3_DQ_25 : DU76, " & "DDR3_DQ_26 : DP73, " & "DDR3_DQ_27 : DT73, " & "DDR3_DQ_28 : DP77, " & "DDR3_DQ_29 : DT77, " & "DDR3_DQ_3 : DA84, " & "DDR3_DQ_30 : DN74, " & "DDR3_DQ_31 : DU74, " & "DDR3_DQ_32 : EC40, " & "DDR3_DQ_33 : ED39, " & "DDR3_DQ_34 : EA36, " & "DDR3_DQ_35 : EC36, " & "DDR3_DQ_36 : DY39, " & "DDR3_DQ_37 : EA40, " & "DDR3_DQ_38 : DY37, " & "DDR3_DQ_39 : ED37, " & "DDR3_DQ_4 : CL84, " & "DDR3_DQ_40 : DN36, " & "DDR3_DQ_41 : DU36, " & "DDR3_DQ_42 : DP33, " & "DDR3_DQ_43 : DT33, " & "DDR3_DQ_44 : DP37, " & "DDR3_DQ_45 : DT37, " & "DDR3_DQ_46 : DN34, " & "DDR3_DQ_47 : DU34, " & "DDR3_DQ_48 : DN30, " & "DDR3_DQ_49 : DU30, " & "DDR3_DQ_5 : CL86, " & "DDR3_DQ_50 : DP27, " & "DDR3_DQ_51 : DT27, " & "DDR3_DQ_52 : DP31, " & "DDR3_DQ_53 : DT31, " & "DDR3_DQ_54 : DN28, " & "DDR3_DQ_55 : DU28, " & "DDR3_DQ_56 : DN24, " & "DDR3_DQ_57 : DU24, " & "DDR3_DQ_58 : DY21, " & "DDR3_DQ_59 : EB21, " & "DDR3_DQ_6 : CW86, " & "DDR3_DQ_60 : DP25, " & "DDR3_DQ_61 : DT25, " & "DDR3_DQ_62 : EC22, " & "DDR3_DQ_63 : DW22, " & "DDR3_DQ_7 : CW84, " & "DDR3_DQ_8 : DG84, " & "DDR3_DQ_9 : DH85, " & "DDR3_ECC_0 : DA68, " & "DDR3_ECC_1 : DE68, " & "DDR3_ECC_2 : DB65, " & "DDR3_ECC_3 : DD65, " & "DDR3_ECC_4 : DB69, " & "DDR3_ECC_5 : DD69, " & "DDR3_ECC_6 : DA66, " & "DDR3_ECC_7 : DE66, " & "DDR3_MA_0 : EB53, " & "DDR3_MA_1 : ED57, " & "DDR3_MA_10 : DW54, " & "DDR3_MA_11 : EB61, " & "DDR3_MA_12 : DT63, " & "DDR3_MA_13 : DW48, " & "DDR3_MA_14 : ED51, " & "DDR3_MA_15 : DV49, " & "DDR3_MA_16 : EA52, " & "DDR3_MA_17 : EA46, " & "DDR3_MA_2 : EE58, " & "DDR3_MA_3 : EB57, " & "DDR3_MA_4 : ED59, " & "DDR3_MA_5 : EA58, " & "DDR3_MA_6 : EE60, " & "DDR3_MA_7 : EA60, " & "DDR3_MA_8 : EB59, " & "DDR3_MA_9 : EF61, " & "DDR3_ODT_0 : EE50, " & "DDR3_ODT_1 : EE48, " & "DDR3_ODT_2 : EA50, " & "DDR3_ODT_3 : EA48, " & "DDR3_PAR : ED53, " & "DDR4_ACT_N : DR62, " & "DDR4_ALERT_N : DT61, " & "DDR4_BA_0 : DM53, " & "DDR4_BA_1 : DV55, " & "DDR4_BG_0 : DJ62, " & "DDR4_BG_1 : DM61, " & "DDR4_CAVREF : CT61, " & "DDR4_CKE_0 : DM63, " & "DDR4_CKE_1 : DN64, " & "DDR4_CKE_2 : DL64, " & "DDR4_CKE_3 : DR64, " & "DDR4_CLK_DN_0 : DM55, " & "DDR4_CLK_DN_1 : DR54, " & "DDR4_CLK_DN_2 : DM57, " & "DDR4_CLK_DN_3 : DT57, " & "DDR4_CLK_DP_0 : DN54, " & "DDR4_CLK_DP_1 : DT53, " & "DDR4_CLK_DP_2 : DN56, " & "DDR4_CLK_DP_3 : DR56, " & "DDR4_CS_N_0 : DV51, " & "DDR4_CS_N_1 : DN50, " & "DDR4_CS_N_2 : DR46, " & "DDR4_CS_N_3 : DK47, " & "DDR4_CS_N_4 : DW50, " & "DDR4_CS_N_5 : DM49, " & "DDR4_CS_N_6 : DT45, " & "DDR4_CS_N_7 : DN46, " & "DDR4_C_2 : DT47, " & "DDR4_DQS_DN_0 : CL82, " & "DDR4_DQS_DN_1 : DA82, " & "DDR4_DQS_DN_10 : DC80, " & "DDR4_DQS_DN_11 : DY79, " & "DDR4_DQS_DN_12 : EB73, " & "DDR4_DQS_DN_13 : DP41, " & "DDR4_DQS_DN_14 : EA32, " & "DDR4_DQS_DN_15 : EA26, " & "DDR4_DQS_DN_16 : DG26, " & "DDR4_DQS_DN_17 : DV67, " & "DDR4_DQS_DN_2 : ED79, " & "DDR4_DQS_DN_3 : EF73, " & "DDR4_DQS_DN_4 : DV41, " & "DDR4_DQS_DN_5 : EE32, " & "DDR4_DQS_DN_6 : EE26, " & "DDR4_DQS_DN_7 : DL26, " & "DDR4_DQS_DN_8 : EB67, " & "DDR4_DQS_DN_9 : CN80, " & "DDR4_DQS_DP_0 : CM81, " & "DDR4_DQS_DP_1 : DB81, " & "DDR4_DQS_DP_10 : DD79, " & "DDR4_DQS_DP_11 : DV79, " & "DDR4_DQS_DP_12 : DY73, " & "DDR4_DQS_DP_13 : DM41, " & "DDR4_DQS_DP_14 : DW32, " & "DDR4_DQS_DP_15 : DW26, " & "DDR4_DQS_DP_16 : DE26, " & "DDR4_DQS_DP_17 : DT67, " & "DDR4_DQS_DP_2 : EB79, " & "DDR4_DQS_DP_3 : ED73, " & "DDR4_DQS_DP_4 : DT41, " & "DDR4_DQS_DP_5 : EC32, " & "DDR4_DQS_DP_6 : EC26, " & "DDR4_DQS_DP_7 : DJ26, " & "DDR4_DQS_DP_8 : DY67, " & "DDR4_DQS_DP_9 : CP79, " & "DDR4_DQ_0 : CM79, " & "DDR4_DQ_1 : CK81, " & "DDR4_DQ_10 : DE80, " & "DDR4_DQ_11 : DF81, " & "DDR4_DQ_12 : CY79, " & "DDR4_DQ_13 : CW80, " & "DDR4_DQ_14 : DC82, " & "DDR4_DQ_15 : DE82, " & "DDR4_DQ_16 : DW80, " & "DDR4_DQ_17 : EC80, " & "DDR4_DQ_18 : DY77, " & "DDR4_DQ_19 : EB77, " & "DDR4_DQ_2 : CT81, " & "DDR4_DQ_20 : DY81, " & "DDR4_DQ_21 : EB81, " & "DDR4_DQ_22 : DW78, " & "DDR4_DQ_23 : EC78, " & "DDR4_DQ_24 : ED75, " & "DDR4_DQ_25 : EE74, " & "DDR4_DQ_26 : EB71, " & "DDR4_DQ_27 : ED71, " & "DDR4_DQ_28 : EA74, " & "DDR4_DQ_29 : EB75, " & "DDR4_DQ_3 : CR82, " & "DDR4_DQ_30 : EA72, " & "DDR4_DQ_31 : EE72, " & "DDR4_DQ_32 : DU42, " & "DDR4_DQ_33 : DW42, " & "DDR4_DQ_34 : DP39, " & "DDR4_DQ_35 : DT39, " & "DDR4_DQ_36 : DL42, " & "DDR4_DQ_37 : DN42, " & "DDR4_DQ_38 : DN40, " & "DDR4_DQ_39 : DU40, " & "DDR4_DQ_4 : CK79, " & "DDR4_DQ_40 : EC34, " & "DDR4_DQ_41 : ED33, " & "DDR4_DQ_42 : EA30, " & "DDR4_DQ_43 : EC30, " & "DDR4_DQ_44 : DY33, " & "DDR4_DQ_45 : EA34, " & "DDR4_DQ_46 : DY31, " & "DDR4_DQ_47 : ED31, " & "DDR4_DQ_48 : EC28, " & "DDR4_DQ_49 : ED27, " & "DDR4_DQ_5 : CJ80, " & "DDR4_DQ_50 : EA24, " & "DDR4_DQ_51 : EC24, " & "DDR4_DQ_52 : DY27, " & "DDR4_DQ_53 : EA28, " & "DDR4_DQ_54 : DY25, " & "DDR4_DQ_55 : ED25, " & "DDR4_DQ_56 : DF27, " & "DDR4_DQ_57 : DK27, " & "DDR4_DQ_58 : DD25, " & "DDR4_DQ_59 : DJ24, " & "DDR4_DQ_6 : CR80, " & "DDR4_DQ_60 : DG28, " & "DDR4_DQ_61 : DJ28, " & "DDR4_DQ_62 : DF25, " & "DDR4_DQ_63 : DK25, " & "DDR4_DQ_7 : CN82, " & "DDR4_DQ_8 : DB79, " & "DDR4_DQ_9 : CY81, " & "DDR4_ECC_0 : DY69, " & "DDR4_ECC_1 : EA68, " & "DDR4_ECC_2 : DV65, " & "DDR4_ECC_3 : DY65, " & "DDR4_ECC_4 : DU68, " & "DDR4_ECC_5 : DV69, " & "DDR4_ECC_6 : DU66, " & "DDR4_ECC_7 : EA66, " & "DDR4_MA_0 : DW52, " & "DDR4_MA_1 : DW58, " & "DDR4_MA_10 : DT55, " & "DDR4_MA_11 : DR60, " & "DDR4_MA_12 : DN60, " & "DDR4_MA_13 : DT51, " & "DDR4_MA_14 : DM51, " & "DDR4_MA_15 : DR52, " & "DDR4_MA_16 : DN52, " & "DDR4_MA_17 : DR48, " & "DDR4_MA_2 : DV57, " & "DDR4_MA_3 : DR58, " & "DDR4_MA_4 : DT59, " & "DDR4_MA_5 : DN58, " & "DDR4_MA_6 : DM59, " & "DDR4_MA_7 : DK61, " & "DDR4_MA_8 : DJ60, " & "DDR4_MA_9 : DV59, " & "DDR4_ODT_0 : DR50, " & "DDR4_ODT_1 : DN48, " & "DDR4_ODT_2 : DT49, " & "DDR4_ODT_3 : DM47, " & "DDR4_PAR : DV53, " & "DDR5_ACT_N : DC62, " & "DDR5_ALERT_N : DD61, " & "DDR5_BA_0 : DJ52, " & "DDR5_BA_1 : DC56, " & "DDR5_BG_0 : DA62, " & "DDR5_BG_1 : DF61, " & "DDR5_CAVREF : CV61, " & "DDR5_CKE_0 : DG62, " & "DDR5_CKE_1 : DD63, " & "DDR5_CKE_2 : DK63, " & "DDR5_CKE_3 : DF63, " & "DDR5_CLK_DN_0 : DK55, " & "DDR5_CLK_DN_1 : DF55, " & "DDR5_CLK_DN_2 : DK57, " & "DDR5_CLK_DN_3 : DF57, " & "DDR5_CLK_DP_0 : DJ54, " & "DDR5_CLK_DP_1 : DG54, " & "DDR5_CLK_DP_2 : DJ56, " & "DDR5_CLK_DP_3 : DG56, " & "DDR5_CS_N_0 : DK51, " & "DDR5_CS_N_1 : DF49, " & "DDR5_CS_N_2 : DJ46, " & "DDR5_CS_N_3 : DG46, " & "DDR5_CS_N_4 : DF51, " & "DDR5_CS_N_5 : DJ48, " & "DDR5_CS_N_6 : DM45, " & "DDR5_CS_N_7 : DK45, " & "DDR5_C_2 : DF45, " & "DDR5_DQS_DN_0 : CP77, " & "DDR5_DQS_DN_1 : DD77, " & "DDR5_DQS_DN_10 : DF75, " & "DDR5_DQS_DN_11 : DJ70, " & "DDR5_DQS_DN_12 : CP65, " & "DDR5_DQS_DN_13 : DE40, " & "DDR5_DQS_DN_14 : DG32, " & "DDR5_DQS_DN_15 : CY35, " & "DDR5_DQS_DN_16 : CY29, " & "DDR5_DQS_DN_17 : CJ70, " & "DDR5_DQS_DN_2 : DL72, " & "DDR5_DQS_DN_3 : CV65, " & "DDR5_DQS_DN_4 : DG40, " & "DDR5_DQS_DN_5 : DL32, " & "DDR5_DQS_DN_6 : DD35, " & "DDR5_DQS_DN_7 : DD29, " & "DDR5_DQS_DN_8 : CN70, " & "DDR5_DQS_DN_9 : CT75, " & "DDR5_DQS_DP_0 : CR76, " & "DDR5_DQS_DP_1 : DE76, " & "DDR5_DQS_DP_10 : DG74, " & "DDR5_DQS_DP_11 : DH69, " & "DDR5_DQS_DP_12 : CM65, " & "DDR5_DQS_DP_13 : DC40, " & "DDR5_DQS_DP_14 : DE32, " & "DDR5_DQS_DP_15 : CV35, " & "DDR5_DQS_DP_16 : CV29, " & "DDR5_DQS_DP_17 : CG70, " & "DDR5_DQS_DP_2 : DK71, " & "DDR5_DQS_DP_3 : CT65, " & "DDR5_DQS_DP_4 : DJ40, " & "DDR5_DQS_DP_5 : DJ32, " & "DDR5_DQS_DP_6 : DB35, " & "DDR5_DQS_DP_7 : DB29, " & "DDR5_DQS_DP_8 : CL70, " & "DDR5_DQS_DP_9 : CU74, " & "DDR5_DQ_0 : CR74, " & "DDR5_DQ_1 : CN76, " & "DDR5_DQ_10 : DH75, " & "DDR5_DQ_11 : DJ76, " & "DDR5_DQ_12 : DC74, " & "DDR5_DQ_13 : DB75, " & "DDR5_DQ_14 : DF77, " & "DDR5_DQ_15 : DH77, " & "DDR5_DQ_16 : DG70, " & "DDR5_DQ_17 : DJ72, " & "DDR5_DQ_18 : DM69, " & "DDR5_DQ_19 : DN70, " & "DDR5_DQ_2 : CW76, " & "DDR5_DQ_20 : DF71, " & "DDR5_DQ_21 : DG72, " & "DDR5_DQ_22 : DK69, " & "DDR5_DQ_23 : DM71, " & "DDR5_DQ_24 : CN66, " & "DDR5_DQ_25 : CU66, " & "DDR5_DQ_26 : CP63, " & "DDR5_DQ_27 : CT63, " & "DDR5_DQ_28 : CP67, " & "DDR5_DQ_29 : CT67, " & "DDR5_DQ_3 : CV77, " & "DDR5_DQ_30 : CN64, " & "DDR5_DQ_31 : CU64, " & "DDR5_DQ_32 : DD41, " & "DDR5_DQ_33 : DG42, " & "DDR5_DQ_34 : DE38, " & "DDR5_DQ_35 : DG38, " & "DDR5_DQ_36 : DA42, " & "DDR5_DQ_37 : DE42, " & "DDR5_DQ_38 : DD39, " & "DDR5_DQ_39 : DH39, " & "DDR5_DQ_4 : CN74, " & "DDR5_DQ_40 : DF33, " & "DDR5_DQ_41 : DK33, " & "DDR5_DQ_42 : DG30, " & "DDR5_DQ_43 : DJ30, " & "DDR5_DQ_44 : DG34, " & "DDR5_DQ_45 : DJ34, " & "DDR5_DQ_46 : DF31, " & "DDR5_DQ_47 : DK31, " & "DDR5_DQ_48 : CW36, " & "DDR5_DQ_49 : DC36, " & "DDR5_DQ_5 : CM75, " & "DDR5_DQ_50 : CY33, " & "DDR5_DQ_51 : DB33, " & "DDR5_DQ_52 : CY37, " & "DDR5_DQ_53 : DB37, " & "DDR5_DQ_54 : CW34, " & "DDR5_DQ_55 : DC34, " & "DDR5_DQ_56 : CW30, " & "DDR5_DQ_57 : DC30, " & "DDR5_DQ_58 : CY27, " & "DDR5_DQ_59 : DB27, " & "DDR5_DQ_6 : CV75, " & "DDR5_DQ_60 : CY31, " & "DDR5_DQ_61 : DB31, " & "DDR5_DQ_62 : CW28, " & "DDR5_DQ_63 : DC28, " & "DDR5_DQ_7 : CT77, " & "DDR5_DQ_8 : DE74, " & "DDR5_DQ_9 : DC76, " & "DDR5_ECC_0 : CH71, " & "DDR5_ECC_1 : CM71, " & "DDR5_ECC_2 : CJ68, " & "DDR5_ECC_3 : CL68, " & "DDR5_ECC_4 : CJ72, " & "DDR5_ECC_5 : CL72, " & "DDR5_ECC_6 : CH69, " & "DDR5_ECC_7 : CM69, " & "DDR5_MA_0 : DF53, " & "DDR5_MA_1 : DC58, " & "DDR5_MA_10 : DD55, " & "DDR5_MA_11 : DA60, " & "DDR5_MA_12 : DG60, " & "DDR5_MA_13 : DD53, " & "DDR5_MA_14 : DJ50, " & "DDR5_MA_15 : DC54, " & "DDR5_MA_16 : DG52, " & "DDR5_MA_17 : DE46, " & "DDR5_MA_2 : DD57, " & "DDR5_MA_3 : DG58, " & "DDR5_MA_4 : DJ58, " & "DDR5_MA_5 : DF59, " & "DDR5_MA_6 : DK59, " & "DDR5_MA_7 : DC60, " & "DDR5_MA_8 : DD59, " & "DDR5_MA_9 : DA58, " & "DDR5_ODT_0 : DG50, " & "DDR5_ODT_1 : DG48, " & "DDR5_ODT_2 : DK49, " & "DDR5_ODT_3 : DF47, " & "DDR5_PAR : DK53, " & "DMI_RX_DN_0 : CK9, " & "DMI_RX_DN_1 : CM11, " & "DMI_RX_DN_2 : CR12, " & "DMI_RX_DN_3 : CT11, " & "DMI_RX_DP_0 : CL10, " & "DMI_RX_DP_1 : CN10, " & "DMI_RX_DP_2 : CP11, " & "DMI_RX_DP_3 : CV11, " & "DMI_TX_DN_0 : CG4, " & "DMI_TX_DN_1 : CJ4, " & "DMI_TX_DN_2 : CN4, " & "DMI_TX_DN_3 : CP5, " & "DMI_TX_DP_0 : CH5, " & "DMI_TX_DP_1 : CL4, " & "DMI_TX_DP_2 : CM3, " & "DMI_TX_DP_3 : CR4, " & "EAR_N : AJ14, " & "ERROR_N_0 : AJ12, " & "ERROR_N_1 : AK11, " & "ERROR_N_2 : AL12, " & "EXT_BGREF : AR16, " & "FIVR_CLKREF : AH15, " & "FIVR_FAULT : AU14, " & "FIVR_PROBE_ANA_0 : AH19, " & "FIVR_PROBE_ANA_1 : AF19, " & "FIVR_PROBE_DIG_1 : AT13, " & "FIVR_VCCF_SENSE : AM23, " & "FIVR_VLOAD_CORE_1 : F83, " & "FIVR_VLOAD_CORE_3 : G84, " & "FIVR_VLOAD_CORE_44 : EB85, " & "FIVR_VLOAD_CORE_53 : ED83, " & "FIVR_VLOAD_CORE_54 : EC84, " & "FIVR_VLOAD_CORE_FUTURE_12 : AH73, " & "FIVR_VLOAD_GT0 : ( AG72, AF71, AE72 ) , " & "FIVR_VLOAD_GT1 : ( AK69, AJ70, AH71 ) , " & "FIVR_VLOAD_GT2 : ( DL66, DK67, DJ66 ) , " & "FIVR_VLOAD_GT_UNGATED0 : ( Y65, V65 ) , " & "FIVR_VLOAD_GT_UNGATED1 : ( CV69, CT69 ) , " & "FIVR_VLOAD_GT_UNGATED2 : ( CY63, CW62 ) , " & "FIVR_VSS_VCCF_SENSE : AL22, " & "KTI01_AMONI : C6, " & "KTI01_AMONV : F3, " & "KTI01_DFX_DN : A24, " & "KTI01_DFX_DP : C24, " & "KTI01_DMON : H1, " & "KTI01_HSCLK_DN : D17, " & "KTI01_HSCLK_DP : C18, " & "KTI01_RBIAS : ( AT29, AP29 ) , " & "KTI01_VCCQ : ( BC26, BB27, BA26, AY27, AW26, AV27 ) , " & "KTI0_RX_DN_0 : AC10, " & "KTI0_RX_DN_1 : AA8, " & "KTI0_RX_DN_10 : AP7, " & "KTI0_RX_DN_11 : AR8, " & "KTI0_RX_DN_12 : AU10, " & "KTI0_RX_DN_13 : BA8, " & "KTI0_RX_DN_14 : BC6, " & "KTI0_RX_DN_15 : BD7, " & "KTI0_RX_DN_16 : AW8, " & "KTI0_RX_DN_17 : AY9, " & "KTI0_RX_DN_18 : BD9, " & "KTI0_RX_DN_19 : BB11, " & "KTI0_RX_DN_2 : AB7, " & "KTI0_RX_DN_3 : AD5, " & "KTI0_RX_DN_4 : AE6, " & "KTI0_RX_DN_5 : AG8, " & "KTI0_RX_DN_6 : AJ6, " & "KTI0_RX_DN_7 : AL6, " & "KTI0_RX_DN_8 : AK7, " & "KTI0_RX_DN_9 : AM9, " & "KTI0_RX_DP_0 : AB9, " & "KTI0_RX_DP_1 : AC8, " & "KTI0_RX_DP_10 : AN8, " & "KTI0_RX_DP_11 : AU8, " & "KTI0_RX_DP_12 : AT9, " & "KTI0_RX_DP_13 : AY7, " & "KTI0_RX_DP_14 : BB7, " & "KTI0_RX_DP_15 : BF7, " & "KTI0_RX_DP_16 : AV9, " & "KTI0_RX_DP_17 : BB9, " & "KTI0_RX_DP_18 : BC10, " & "KTI0_RX_DP_19 : BA10, " & "KTI0_RX_DP_2 : AA6, " & "KTI0_RX_DP_3 : AC6, " & "KTI0_RX_DP_4 : AG6, " & "KTI0_RX_DP_5 : AF7, " & "KTI0_RX_DP_6 : AH7, " & "KTI0_RX_DP_7 : AK5, " & "KTI0_RX_DP_8 : AM7, " & "KTI0_RX_DP_9 : AL8, " & "KTI0_TX_DN_0 : N2, " & "KTI0_TX_DN_1 : P1, " & "KTI0_TX_DN_10 : AM3, " & "KTI0_TX_DN_11 : AN4, " & "KTI0_TX_DN_12 : AT1, " & "KTI0_TX_DN_13 : AT3, " & "KTI0_TX_DN_14 : AU4, " & "KTI0_TX_DN_15 : AV5, " & "KTI0_TX_DN_16 : BA4, " & "KTI0_TX_DN_17 : BB3, " & "KTI0_TX_DN_18 : BF3, " & "KTI0_TX_DN_19 : BG4, " & "KTI0_TX_DN_2 : V3, " & "KTI0_TX_DN_3 : Y1, " & "KTI0_TX_DN_4 : AB3, " & "KTI0_TX_DN_5 : AC2, " & "KTI0_TX_DN_6 : AG4, " & "KTI0_TX_DN_7 : AE2, " & "KTI0_TX_DN_8 : AH3, " & "KTI0_TX_DN_9 : AL2, " & "KTI0_TX_DP_0 : M1, " & "KTI0_TX_DP_1 : T1, " & "KTI0_TX_DP_10 : AK3, " & "KTI0_TX_DP_11 : AP3, " & "KTI0_TX_DP_12 : AP1, " & "KTI0_TX_DP_13 : AR2, " & "KTI0_TX_DP_14 : AR4, " & "KTI0_TX_DP_15 : AW4, " & "KTI0_TX_DP_16 : AY3, " & "KTI0_TX_DP_17 : BC2, " & "KTI0_TX_DP_18 : BD3, " & "KTI0_TX_DP_19 : BH3, " & "KTI0_TX_DP_2 : Y3, " & "KTI0_TX_DP_3 : W2, " & "KTI0_TX_DP_4 : AA2, " & "KTI0_TX_DP_5 : AD1, " & "KTI0_TX_DP_6 : AF3, " & "KTI0_TX_DP_7 : AG2, " & "KTI0_TX_DP_8 : AJ2, " & "KTI0_TX_DP_9 : AK1, " & "KTI1_RX_DN_0 : T5, " & "KTI1_RX_DN_1 : P7, " & "KTI1_RX_DN_10 : R16, " & "KTI1_RX_DN_11 : P17, " & "KTI1_RX_DN_12 : U16, " & "KTI1_RX_DN_13 : W18, " & "KTI1_RX_DN_14 : R20, " & "KTI1_RX_DN_15 : U18, " & "KTI1_RX_DN_16 : P21, " & "KTI1_RX_DN_17 : V19, " & "KTI1_RX_DN_18 : Y21, " & "KTI1_RX_DN_19 : AB19, " & "KTI1_RX_DN_2 : V7, " & "KTI1_RX_DN_3 : T9, " & "KTI1_RX_DN_4 : P9, " & "KTI1_RX_DN_5 : R10, " & "KTI1_RX_DN_6 : U12, " & "KTI1_RX_DN_7 : L12, " & "KTI1_RX_DN_8 : N14, " & "KTI1_RX_DN_9 : R12, " & "KTI1_RX_DP_0 : R6, " & "KTI1_RX_DP_1 : T7, " & "KTI1_RX_DP_10 : T15, " & "KTI1_RX_DP_11 : N16, " & "KTI1_RX_DP_12 : W16, " & "KTI1_RX_DP_13 : V17, " & "KTI1_RX_DP_14 : P19, " & "KTI1_RX_DP_15 : T19, " & "KTI1_RX_DP_16 : T21, " & "KTI1_RX_DP_17 : Y19, " & "KTI1_RX_DP_18 : W20, " & "KTI1_RX_DP_19 : AA20, " & "KTI1_RX_DP_2 : U8, " & "KTI1_RX_DP_3 : R8, " & "KTI1_RX_DP_4 : N10, " & "KTI1_RX_DP_5 : U10, " & "KTI1_RX_DP_6 : T11, " & "KTI1_RX_DP_7 : N12, " & "KTI1_RX_DP_8 : M13, " & "KTI1_RX_DP_9 : P13, " & "KTI1_TX_DN_0 : M3, " & "KTI1_TX_DN_1 : L4, " & "KTI1_TX_DN_10 : E12, " & "KTI1_TX_DN_11 : G14, " & "KTI1_TX_DN_12 : D15, " & "KTI1_TX_DN_13 : F15, " & "KTI1_TX_DN_14 : H17, " & "KTI1_TX_DN_15 : K19, " & "KTI1_TX_DN_16 : G18, " & "KTI1_TX_DN_17 : J20, " & "KTI1_TX_DN_18 : F21, " & "KTI1_TX_DN_19 : H21, " & "KTI1_TX_DN_2 : K5, " & "KTI1_TX_DN_3 : J6, " & "KTI1_TX_DN_4 : G6, " & "KTI1_TX_DN_5 : H7, " & "KTI1_TX_DN_6 : K9, " & "KTI1_TX_DN_7 : D9, " & "KTI1_TX_DN_8 : F11, " & "KTI1_TX_DN_9 : G10, " & "KTI1_TX_DP_0 : P3, " & "KTI1_TX_DP_1 : K3, " & "KTI1_TX_DP_10 : G12, " & "KTI1_TX_DP_11 : F13, " & "KTI1_TX_DP_12 : E14, " & "KTI1_TX_DP_13 : H15, " & "KTI1_TX_DP_14 : G16, " & "KTI1_TX_DP_15 : L18, " & "KTI1_TX_DP_16 : J18, " & "KTI1_TX_DP_17 : H19, " & "KTI1_TX_DP_18 : G20, " & "KTI1_TX_DP_19 : K21, " & "KTI1_TX_DP_2 : M5, " & "KTI1_TX_DP_3 : H5, " & "KTI1_TX_DP_4 : F7, " & "KTI1_TX_DP_5 : K7, " & "KTI1_TX_DP_6 : J8, " & "KTI1_TX_DP_7 : F9, " & "KTI1_TX_DP_8 : E10, " & "KTI1_TX_DP_9 : H9, " & "KTI2_AMONI : CG10, " & "KTI2_AMONV : CN22, " & "KTI2_DFX_DN : CW22, " & "KTI2_DFX_DP : CY23, " & "KTI2_DMON : CK19, " & "KTI2_HSCLK_DN : EC16, " & "KTI2_HSCLK_DP : EE16, " & "KTI2_RBIAS : ( CL28, CK29 ) , " & "KTI2_RX_DN_0 : DF23, " & "KTI2_RX_DN_1 : DE22, " & "KTI2_RX_DN_10 : CN20, " & "KTI2_RX_DN_11 : CP21, " & "KTI2_RX_DN_12 : CL16, " & "KTI2_RX_DN_13 : CJ18, " & "KTI2_RX_DN_14 : CH17, " & "KTI2_RX_DN_15 : CE16, " & "KTI2_RX_DN_16 : CD15, " & "KTI2_RX_DN_17 : CF17, " & "KTI2_RX_DN_18 : CB15, " & "KTI2_RX_DN_19 : BY17, " & "KTI2_RX_DN_2 : DC22, " & "KTI2_RX_DN_3 : DB21, " & "KTI2_RX_DN_4 : DD19, " & "KTI2_RX_DN_5 : DA20, " & "KTI2_RX_DN_6 : CW20, " & "KTI2_RX_DN_7 : CV19, " & "KTI2_RX_DN_8 : CT21, " & "KTI2_RX_DN_9 : CR18, " & "KTI2_RX_DP_0 : DG22, " & "KTI2_RX_DP_1 : DD21, " & "KTI2_RX_DP_10 : CP19, " & "KTI2_RX_DP_11 : CM21, " & "KTI2_RX_DP_12 : CJ16, " & "KTI2_RX_DP_13 : CK17, " & "KTI2_RX_DP_14 : CG16, " & "KTI2_RX_DP_15 : CF15, " & "KTI2_RX_DP_16 : CC14, " & "KTI2_RX_DP_17 : CD17, " & "KTI2_RX_DP_18 : BY15, " & "KTI2_RX_DP_19 : CA16, " & "KTI2_RX_DP_2 : DA22, " & "KTI2_RX_DP_3 : DC20, " & "KTI2_RX_DP_4 : DB19, " & "KTI2_RX_DP_5 : CY19, " & "KTI2_RX_DP_6 : CU20, " & "KTI2_RX_DP_7 : CW18, " & "KTI2_RX_DP_8 : CR20, " & "KTI2_RX_DP_9 : CN18, " & "KTI2_TX_DN_0 : DT21, " & "KTI2_TX_DN_1 : DM21, " & "KTI2_TX_DN_10 : DA16, " & "KTI2_TX_DN_11 : CW14, " & "KTI2_TX_DN_12 : CU14, " & "KTI2_TX_DN_13 : CM13, " & "KTI2_TX_DN_14 : CJ14, " & "KTI2_TX_DN_15 : CF13, " & "KTI2_TX_DN_16 : CH11, " & "KTI2_TX_DN_17 : CE12, " & "KTI2_TX_DN_18 : CC10, " & "KTI2_TX_DN_19 : CC12, " & "KTI2_TX_DN_2 : DL20, " & "KTI2_TX_DN_3 : DG20, " & "KTI2_TX_DN_4 : DH19, " & "KTI2_TX_DN_5 : DK17, " & "KTI2_TX_DN_6 : DG18, " & "KTI2_TX_DN_7 : DD17, " & "KTI2_TX_DN_8 : DF15, " & "KTI2_TX_DN_9 : DC16, " & "KTI2_TX_DP_0 : DP21, " & "KTI2_TX_DP_1 : DN20, " & "KTI2_TX_DP_10 : CW16, " & "KTI2_TX_DP_11 : CV13, " & "KTI2_TX_DP_12 : CR14, " & "KTI2_TX_DP_13 : CK13, " & "KTI2_TX_DP_14 : CH13, " & "KTI2_TX_DP_15 : CG12, " & "KTI2_TX_DP_16 : CF11, " & "KTI2_TX_DP_17 : CD11, " & "KTI2_TX_DP_18 : CB11, " & "KTI2_TX_DP_19 : CA12, " & "KTI2_TX_DP_2 : DK19, " & "KTI2_TX_DP_3 : DJ20, " & "KTI2_TX_DP_4 : DJ18, " & "KTI2_TX_DP_5 : DH17, " & "KTI2_TX_DP_6 : DF17, " & "KTI2_TX_DP_7 : DE16, " & "KTI2_TX_DP_8 : DD15, " & "KTI2_TX_DP_9 : DB15, " & "KTI2_VCCQ : ( CF27, CD27, CC26 ) , " & "LEGACY_SKT : AE20, " & "LGSPARE_7 : AJ20, " & "LGSPARE_8 : AG20, " & "MBP_N_0 : AJ10, " & "MBP_N_1 : AH11, " & "MBP_N_2 : AG10, " & "MBP_N_3 : AF11, " & "MBP_N_4 : AA12, " & "MBP_N_5 : Y11, " & "MBP_N_6 : AE12, " & "MBP_N_7 : AC12, " & "MCI_BIST_ENABLE : BA20, " & "MCI_DEBUG_EN_N : AV21, " & "MCI_DMIMODE_OVERRIDE : AW12, " & "MCI_FRMAGENT : AV17, " & "MCI_KSFC_DIS : AW14, " & "MCI_LGSPARE_2 : AU18, " & "MCI_LGSPARE_3 : AW16, " & "MCI_LGSPARE_4 : AW22, " & "MCI_LGSPARE_5 : AW20, " & "MCI_LGSPARE_6 : AY13, " & "MCI_NOA_AVRB_0 : BB15, " & "MCI_NOA_AVRB_1 : BA14, " & "MCI_NOA_AVRB_10 : BA18, " & "MCI_NOA_AVRB_11 : BE22, " & "MCI_NOA_AVRB_12 : BC22, " & "MCI_NOA_AVRB_13 : BC20, " & "MCI_NOA_AVRB_14 : BE20, " & "MCI_NOA_AVRB_15 : BD19, " & "MCI_NOA_AVRB_2 : BF21, " & "MCI_NOA_AVRB_3 : BB13, " & "MCI_NOA_AVRB_4 : BG20, " & "MCI_NOA_AVRB_5 : BG18, " & "MCI_NOA_AVRB_6 : BC14, " & "MCI_NOA_AVRB_7 : BB17, " & "MCI_NOA_AVRB_8 : BE18, " & "MCI_NOA_AVRB_9 : BA16, " & "MCI_NOA_AVRB_STB_DN_0 : BC18, " & "MCI_NOA_AVRB_STB_DN_1 : BB21, " & "MCI_NOA_AVRB_STB_DP_0 : BD17, " & "MCI_NOA_AVRB_STB_DP_1 : BA22, " & "MCI_SAFE_MODE_BOOT : AR18, " & "MCI_SOCKET_ID_0 : AU22, " & "MCI_SOCKET_ID_1 : AU16, " & "MCI_TXT_AGENT : AW18, " & "MCI_TXT_PLTEN : AV15, " & "MCP01_AMONI : CY39, " & "MCP01_AMONV : DA40, " & "MCP01_DFX_DN : DK37, " & "MCP01_DFX_DP : DL38, " & "MCP01_DMON : CN28, " & "MCP01_HSCLK_DN : DG36, " & "MCP01_HSCLK_DP : DJ36, " & "MCP01_RBIAS : ( CU32, CT31 ) , " & "MSMI_N : AN20, " & "NMI : AP11, " & "NOA_COMP : AY19, " & "OVERCLK_0 : AN12, " & "OVERCLK_1 : AM13, " & "OVERCLK_2 : AN14, " & "PE012_AMONI : DK15, " & "PE012_AMONV : DP17, " & "PE012_DFX_DN : CB5, " & "PE012_DFX_DP : CC6, " & "PE012_DMON : BW10, " & "PE012_HSCLK_DN : CT5, " & "PE012_HSCLK_DP : CU6, " & "PE012_RBIAS : ( CN30, CL30 ) , " & "PE1_RX_DN_0 : CW8, " & "PE1_RX_DN_1 : DA8, " & "PE1_RX_DN_10 : DT11, " & "PE1_RX_DN_11 : DT13, " & "PE1_RX_DN_12 : DV13, " & "PE1_RX_DN_13 : DW14, " & "PE1_RX_DN_14 : DY15, " & "PE1_RX_DN_15 : DU16, " & "PE1_RX_DN_2 : DC8, " & "PE1_RX_DN_3 : DC10, " & "PE1_RX_DN_4 : DE10, " & "PE1_RX_DN_5 : DH9, " & "PE1_RX_DN_6 : DK9, " & "PE1_RX_DN_7 : DM9, " & "PE1_RX_DN_8 : DM11, " & "PE1_RX_DN_9 : DP11, " & "PE1_RX_DP_0 : CU8, " & "PE1_RX_DP_1 : CY7, " & "PE1_RX_DP_10 : DR12, " & "PE1_RX_DP_11 : DP13, " & "PE1_RX_DP_12 : DU12, " & "PE1_RX_DP_13 : DY13, " & "PE1_RX_DP_14 : DV15, " & "PE1_RX_DP_15 : DT15, " & "PE1_RX_DP_2 : DB9, " & "PE1_RX_DP_3 : DA10, " & "PE1_RX_DP_4 : DD9, " & "PE1_RX_DP_5 : DF9, " & "PE1_RX_DP_6 : DJ8, " & "PE1_RX_DP_7 : DL10, " & "PE1_RX_DP_8 : DK11, " & "PE1_RX_DP_9 : DN10, " & "PE1_TX_DN_0 : DA2, " & "PE1_TX_DN_1 : DC2, " & "PE1_TX_DN_10 : DW4, " & "PE1_TX_DN_11 : DU6, " & "PE1_TX_DN_12 : DV7, " & "PE1_TX_DN_13 : DY7, " & "PE1_TX_DN_14 : EA8, " & "PE1_TX_DN_15 : ED9, " & "PE1_TX_DN_2 : DE2, " & "PE1_TX_DN_3 : DE4, " & "PE1_TX_DN_4 : DG4, " & "PE1_TX_DN_5 : DK3, " & "PE1_TX_DN_6 : DM3, " & "PE1_TX_DN_7 : DN4, " & "PE1_TX_DN_8 : DT5, " & "PE1_TX_DN_9 : DV3, " & "PE1_TX_DP_0 : CW2, " & "PE1_TX_DP_1 : DB1, " & "PE1_TX_DP_10 : DU4, " & "PE1_TX_DP_11 : DV5, " & "PE1_TX_DP_12 : DT7, " & "PE1_TX_DP_13 : DW6, " & "PE1_TX_DP_14 : EB7, " & "PE1_TX_DP_15 : EC8, " & "PE1_TX_DP_2 : DD3, " & "PE1_TX_DP_3 : DC4, " & "PE1_TX_DP_4 : DF3, " & "PE1_TX_DP_5 : DH3, " & "PE1_TX_DP_6 : DL2, " & "PE1_TX_DP_7 : DP3, " & "PE1_TX_DP_8 : DR4, " & "PE1_TX_DP_9 : DU2, " & "PE2_RX_DN_0 : CT9, " & "PE2_RX_DN_1 : CP9, " & "PE2_RX_DN_10 : BV7, " & "PE2_RX_DN_11 : BT7, " & "PE2_RX_DN_12 : BR8, " & "PE2_RX_DN_13 : BN8, " & "PE2_RX_DN_14 : BL8, " & "PE2_RX_DN_15 : BK9, " & "PE2_RX_DN_2 : CP7, " & "PE2_RX_DN_3 : CM7, " & "PE2_RX_DN_4 : CK7, " & "PE2_RX_DN_5 : CG8, " & "PE2_RX_DN_6 : CE6, " & "PE2_RX_DN_7 : CE8, " & "PE2_RX_DN_8 : BY9, " & "PE2_RX_DN_9 : BY7, " & "PE2_RX_DP_0 : CR8, " & "PE2_RX_DP_1 : CM9, " & "PE2_RX_DP_10 : BU6, " & "PE2_RX_DP_11 : BP7, " & "PE2_RX_DP_12 : BP9, " & "PE2_RX_DP_13 : BM7, " & "PE2_RX_DP_14 : BJ8, " & "PE2_RX_DP_15 : BJ10, " & "PE2_RX_DP_2 : CN8, " & "PE2_RX_DP_3 : CL6, " & "PE2_RX_DP_4 : CH7, " & "PE2_RX_DP_5 : CF7, " & "PE2_RX_DP_6 : CD7, " & "PE2_RX_DP_7 : CC8, " & "PE2_RX_DP_8 : BV9, " & "PE2_RX_DP_9 : BW8, " & "PE2_TX_DN_0 : CY3, " & "PE2_TX_DN_1 : CV3, " & "PE2_TX_DN_10 : CA4, " & "PE2_TX_DN_11 : BW4, " & "PE2_TX_DN_12 : BU4, " & "PE2_TX_DN_13 : BP5, " & "PE2_TX_DN_14 : BL4, " & "PE2_TX_DN_15 : BM5, " & "PE2_TX_DN_2 : CT1, " & "PE2_TX_DN_3 : CT3, " & "PE2_TX_DN_4 : CM1, " & "PE2_TX_DN_5 : CL2, " & "PE2_TX_DN_6 : CG2, " & "PE2_TX_DN_7 : CF3, " & "PE2_TX_DN_8 : CC2, " & "PE2_TX_DN_9 : CB3, " & "PE2_TX_DP_0 : CW4, " & "PE2_TX_DP_1 : CU2, " & "PE2_TX_DP_10 : BY5, " & "PE2_TX_DP_11 : BV3, " & "PE2_TX_DP_12 : BR4, " & "PE2_TX_DP_13 : BN4, " & "PE2_TX_DP_14 : BM3, " & "PE2_TX_DP_15 : BK5, " & "PE2_TX_DP_2 : CR2, " & "PE2_TX_DP_3 : CP3, " & "PE2_TX_DP_4 : CK1, " & "PE2_TX_DP_5 : CK3, " & "PE2_TX_DP_6 : CE2, " & "PE2_TX_DP_7 : CE4, " & "PE2_TX_DP_8 : CD3, " & "PE2_TX_DP_9 : BY3, " & "PE3_AMONI : EC4, " & "PE3_AMONV : EB5, " & "PE3_DFX_DN : DY3, " & "PE3_DFX_DP : EA4, " & "PE3_DMON : EB3, " & "PE3_HSCLK_DN : ED5, " & "PE3_HSCLK_DP : EE6, " & "PE3_RBIAS : ( CR30, CP29 ) , " & "PE3_RX_DN_0 : EA18, " & "PE3_RX_DN_1 : DW18, " & "PE3_RX_DN_10 : DG12, " & "PE3_RX_DN_11 : DG10, " & "PE3_RX_DN_12 : DD13, " & "PE3_RX_DN_13 : DB11, " & "PE3_RX_DN_14 : CY11, " & "PE3_RX_DN_15 : CV9, " & "PE3_RX_DN_2 : DW16, " & "PE3_RX_DN_3 : DT19, " & "PE3_RX_DN_4 : DR16, " & "PE3_RX_DN_5 : DR14, " & "PE3_RX_DN_6 : DN14, " & "PE3_RX_DN_7 : DL14, " & "PE3_RX_DN_8 : DL12, " & "PE3_RX_DN_9 : DJ12, " & "PE3_RX_DP_0 : DY17, " & "PE3_RX_DP_1 : DU18, " & "PE3_RX_DP_10 : DE12, " & "PE3_RX_DP_11 : DF11, " & "PE3_RX_DP_12 : DC12, " & "PE3_RX_DP_13 : DA12, " & "PE3_RX_DP_14 : CW10, " & "PE3_RX_DP_15 : CU10, " & "PE3_RX_DP_2 : DV17, " & "PE3_RX_DP_3 : DR18, " & "PE3_RX_DP_4 : DN16, " & "PE3_RX_DP_5 : DP15, " & "PE3_RX_DP_6 : DM13, " & "PE3_RX_DP_7 : DJ14, " & "PE3_RX_DP_8 : DK13, " & "PE3_RX_DP_9 : DH11, " & "PE3_TX_DN_0 : EE14, " & "PE3_TX_DN_1 : EE12, " & "PE3_TX_DN_10 : DL6, " & "PE3_TX_DN_11 : DJ4, " & "PE3_TX_DN_12 : DJ6, " & "PE3_TX_DN_13 : DD5, " & "PE3_TX_DN_14 : DB5, " & "PE3_TX_DN_15 : CY5, " & "PE3_TX_DN_2 : EC12, " & "PE3_TX_DN_3 : DY11, " & "PE3_TX_DN_4 : EB9, " & "PE3_TX_DN_5 : DW10, " & "PE3_TX_DN_6 : DU8, " & "PE3_TX_DN_7 : DR8, " & "PE3_TX_DN_8 : DM7, " & "PE3_TX_DN_9 : DP5, " & "PE3_TX_DP_0 : EC14, " & "PE3_TX_DP_1 : ED13, " & "PE3_TX_DP_10 : DK5, " & "PE3_TX_DP_11 : DH5, " & "PE3_TX_DP_12 : DG6, " & "PE3_TX_DP_13 : DC6, " & "PE3_TX_DP_14 : DA4, " & "PE3_TX_DP_15 : CV5, " & "PE3_TX_DP_2 : EB11, " & "PE3_TX_DP_3 : EA10, " & "PE3_TX_DP_4 : DY9, " & "PE3_TX_DP_5 : DV9, " & "PE3_TX_DP_6 : DT9, " & "PE3_TX_DP_7 : DP7, " & "PE3_TX_DP_8 : DN6, " & "PE3_TX_DP_9 : DM5, " & "PECI : AU12, " & "PE_HP_SCL : AM19, " & "PE_HP_SDA : AL18, " & "PIO_VCCQ : ( CJ28, CH27, BM27, BL26, BK27, BK25, BJ26, BH27, BH25, " & " BG26, BF27 ) , " & "PIROM_ADDR_0 : CU58, " & "PIROM_ADDR_1 : CV57, " & "PIROM_ADDR_2 : CW56, " & "PKGID_0 : DC72, " & "PKGID_1 : CW72, " & "PKGID_2 : DA72, " & "PMSYNC : AR14, " & "PMSYNC_CLK : AT19, " & "PM_FAST_WAKE_N : AF15, " & "PRDY_N : AG16, " & "PREQ_N : AR12, " & "PROCDIS_N : AB17, " & "PROCHOT_N : AC16, " & "PROC_ID_0 : CY71, " & "PROC_ID_1 : DB71, " & "PWRGOOD : BC24, " & "PWR_DEBUG_N : AP17, " & "QPI0_CLK_RX_DN_RSVD : E4, " & "QPI0_CLK_RX_DP_RSVD : D5, " & "QPI0_CLK_TX_DN_RSVD_RFID : B3, " & "QPI0_CLK_TX_DP_RSVD_RFID : A4, " & "QPI1_CLK_RX_DN_RSVD : A6, " & "QPI1_CLK_RX_DP_RSVD : B7, " & "QPI1_CLK_TX_DN_RSVD : G2, " & "QPI1_CLK_TX_DP_RSVD : E2, " & "QPI2_CLK_RX_DN_RSVD : DN66, " & "QPI2_CLK_RX_DP_RSVD : DM67, " & "QPI2_CLK_TX_DN_RSVD : DV71, " & "QPI2_CLK_TX_DP_RSVD : DT71, " & "RC_ENET_CLK_DN : AL26, " & "RC_ENET_CLK_DP : AK27, " & "RC_GPIO_0 : AF53, " & "RC_GPIO_1 : AE52, " & "RC_GPIO_10 : AG52, " & "RC_GPIO_11 : AG54, " & "RC_GPIO_12 : AH55, " & "RC_GPIO_13 : AG56, " & "RC_GPIO_14 : AJ56, " & "RC_GPIO_15 : AK57, " & "RC_GPIO_2 : AE48, " & "RC_GPIO_3 : AG48, " & "RC_GPIO_4 : AF49, " & "RC_GPIO_5 : AD49, " & "RC_GPIO_6 : AE50, " & "RC_GPIO_7 : AG50, " & "RC_GPIO_8 : AF51, " & "RC_GPIO_9 : AD51, " & "RC_REFCLK_0 : ( AP27, AM27 ) , " & "RC_REFCLK_1 : ( BB25, BD25 ) , " & "RC_VCCH_1P8 : ( B17, B15, B13, A16, A14 ) , " & "RC_VCC_CORE : ( DA24, CY25, CW24, CV23, CU24, CT23, CP23, CN24, CM25, " & " CM23, CL26, CL24, CK25, CK23, CJ26, CJ24, CJ22, CJ20, CH23, " & " CH21, CG26, CG20, CF23, CF21, CF19, CE22, CD21, CD19, CC20, " & " CB21, CB19, CA22, BY19, BW20, BV21, BV19, BU22, BU20, BU18, " & " BR24, BR22, BP21, BP17, BN18, BM19, BM17, BL20, BL18, BK17, " & " BJ20, BJ18, BJ16, BH19 ) , " & "RC_VCC_CORE_B : ( AT25, AT23, AR26, AR22, AR20, AP25, AP23, AN26, AN24, " & " AN22, AN18, AM25, AM21, AL20, AK21 ) , " & "RESET_N : AP21, " & "RFID_VCC2P5 : A8, " & "SKTOCC_N : AB13, " & "SMBCLK : CT59, " & "SMBDAT : CW58, " & "SM_WP : CV59, " & "SOCKET_ID2 : AU20, " & "SPARE : ( EF77, EF47, EE46, ED45, EC44, EA44, DW46, DW44, DV61, " & " DU44, DR44, DP65, DN62, DK65, DH65, DG64, DD51, DC52, DC46, " & " DA56, DA54, CY73, CY57, CW60, CU60, CR60, CP31, CK77, CH77, " & " CG82, CG78, CF81, CF79, CE80, CE78, BD69, BD67, BD65, BC68, " & " BC66, BC64, BB67, BB65, BA82, BA78, BA76, BA66, BA64, AY83, " & " AY77, AY75, AY67, AY65, AW76, AW64, AV77, AR62, AP61, AN62, " & " AN60, AM61, AM59, AL62, AL60, AL58, AK61, AK59, AJ62, AJ60, " & " AJ58, AH57, AE46, Y23, W66, V67, U66, T67, R66, R62, " & " P65, M63, K61, J62, J46, H83, G64, F65, D65, B77 ) , " & "SPARE_NCTF_0 : E84, " & "SPARE_NCTF_1 : D83, " & "SPARE_NCTF_2 : C82, " & "SPARE_NCTF_3 : B81, " & "SPARE_NCTF_5 : EF81, " & "SPARE_NCTF_6 : EE82, " & "SPARE_NCTF_7 : EF83, " & "SPARE_NCTF_8 : EE84, " & "SPARE_NCTF_9 : H85, " & "SVIDALERT_N_0 : DE44, " & "SVIDALERT_N_1 : DL44, " & "SVIDCLK_0 : DC44, " & "SVIDCLK_1 : DG44, " & "SVIDDATA_0 : DB45, " & "SVIDDATA_1 : DJ44, " & "TCK : AA14, " & "TDI : AC14, " & "TDO : AE14, " & "THERMADA_0 : AF47, " & "THERMADA_1 : DA52, " & "THERMADC_0 : AD47, " & "THERMADC_1 : CY53, " & "THERMTRIP_N : AB15, " & "TMS : W14, " & "TRST_N : Y13, " & "TSC_SYNC : AM11, " & "VCC3P3 : CY55, " & "VCCD012 : ( AF63, AF61, AF59, AF57, AF55, AD45, Y63, Y61, Y59, " & " Y57, Y55, Y53, Y51, Y49, Y47, Y45, W64, U62, U60, " & " U58, U56, U54, U52, U50, U48, U46, N64, L62, L60, " & " L58, L56, L54, L52, L50, L48, L46, E64, E62, E60, " & " E58, E56, E54, E52, E50, E48, E46, B59, B53, B49 ) , " & "VCCD012_NCTF : ( D45, C46, B47 ) , " & "VCCD345 : ( EF59, EF53, EF49, EC62, EC60, EC58, EC56, EC54, EC52, " & " EC50, EC48, EC46, DU64, DU62, DU60, DU58, DU56, DU54, DU52, " & " DU50, DU48, DU46, DL62, DL60, DL58, DL56, DL54, DL52, DL50, " & " DL48, DL46, DJ64, DH63, DH61, DH59, DH57, DH55, DH53, DH51, " & " DH49, DH47, DH45, DD45, DB63, DB61, DB59, DB57, DB55, DB53 ) , " & "VCCD345_NCTF : ( EF45, EE44 ) , " & "VCCFUSE : ( AE36, AD37 ) , " & "VCCFUSEPGM_0 : AC36, " & "VCCFUSEPGM_1 : AF35, " & "VCCFUSEPGM_2 : AD35, " & "VCCFUSEPGM_3 : AE34, " & "VCCFUSEPGM_4 : AG34, " & "VCCFUSEPGM_5 : AM29, " & "VCCFUSEPGM_6 : AL28, " & "VCCFUSEPGM_7 : AR28, " & "VCCIN : ( CY49, CY47, CW50, CW48, CW46, CV51, CU54, CU52, CU42, " & " CU40, CU38, CT55, CT53, CT41, CT39, CT37, CR56, CR54, CR34, " & " CP57, CP55, CP33, CN58, CN56, CM59, CM57, CL60, CL58, CK61, " & " CK59, CJ60, CH85, CH61, CG84, CG60, CF85, CF61, CE84, CE60, " & " CD85, CD83, CD61, CC84, CC62, CC60, CB83, CB81, CB79, CB77, " & " CB75, CB73, CB61, CA84, CA82, CA80, CA78, CA76, CA74, CA72, " & " CA62, CA60, BY83, BY81, BY79, BY77, BY75, BY73, BY61, BW84, " & " BW70, BW68, BW66, BW64, BW62, BW60, BV83, BV81, BV79, BV77, " & " BV75, BV73, BV71, BV69, BV67, BV65, BV63, BV61, BU84, BU82, " & " BU80, BU78, BU76, BU74, BU72, BU70, BU68, BU66, BU64, BU62, " & " BU60, BT83, BT81, BT79, BT77, BT75, BT73, BT71, BT69, BT67, " & " BT65, BT63, BT61, BR84, BR62, BR60, BP83, BP81, BP79, BP77, " & " BP75, BP73, BP71, BP69, BP67, BP65, BP63, BP61, BN84, BN82, " & " BN80, BN78, BN76, BN74, BN72, BN70, BN68, BN66, BN64, BN62, " & " BN60, BM83, BM81, BM79, BM77, BM75, BM73, BM71, BM69, BM67, " & " BM65, BM63, BM61, BL84, BL62, BL60, BK83, BK81, BK79, BK77, " & " BK75, BK73, BK71, BK69, BK67, BK65, BK63, BK61, BJ84, BJ82, " & " BJ80, BJ78, BJ76, BJ74, BJ72, BJ70, BJ68, BJ66, BJ64, BJ62, " & " BJ60, BH83, BH81, BH79, BH77, BH75, BH73, BH71, BH69, BH67, " & " BH65, BH63, BH61, BG84, BG70, BG68, BG66, BG64, BG62, BG60, " & " BF85, BF83, BF81, BF79, BF77, BF75, BF73, BF61, BE84, BE82, " & " BE80, BE78, BE76, BE74, BE72, BE62, BE60, BD85, BD83, BD81, " & " BD79, BD77, BD75, BD73, BD61, BC84, BC62, BC60, BB85, BB61, " & " BA60, AY61, AW60, AV61, AV59, AU60, AU58, AT59, AT57, AR58, " & " AR56, AP57, AP55, AN56, AN54, AN32, AM55, AM53, AM33, AL54, " & " AL52, AL50, AL48, AL46, AL34, AK53, AK51, AK49, AK47, AK45, " & " AK35, AJ36, AH41, AH39, AH37, AG42, AG40, AG38, AF43 ) , " & "VCCINR2PMAX : ( AW86, AV85 ) , " & "VCCIN_SENSE_DP : BA86, " & "VCCIO : ( EE10, EB15, EA12, DV11, DU20, DR10, DR2, DP19, DN8, " & " DM17, DK21, DJ16, DH7, DG8, DF21, DF13, DE14, DD7, DC18, " & " DA14, CY17, CV21, CV7, CU18, CU12, CP13, CN6, CM15, CL20, " & " CL12, CK5, CH9, CG14, CF5, CE18, CD9, CB17, CB13, BP25, " & " BJ24, BF23, BE24, BB5, BA24, AY11, AW6, AT11, AT7, AT5, " & " AN10, AM5, AH9, AF5, AE10, AC20, AC4, AA10, W10, W6, " & " W4, U14, T3, P5, N18, M21, M11, M9, M7, L16, " & " L14, K15, J10, J2, H13, D7 ) , " & "VCCIO_SENSE_DP : BH5, " & "VCCSA : ( CJ66, CJ64, CH75, CH65, CG74, CG66, CG64, CF75, CF73, " & " CF67, CF65, CE74, CE72, CE68, CE66, CE64, CD71, CD69, CD67, " & " CD65, CC70, CC68, CC66, CB69, CB67, CB65 ) , " & "VCCSA_SENSE_DP : CE76, " & "VSENSEPMAX : AD41, " & "VSS : ( EF79, EF75, EF71, EE78, EE76, EE70, EE36, EE34, EE30, " & " EE28, EE24, ED77, ED69, ED35, ED29, ED23, ED15, ED11, EC76, " & " EC74, EC72, EC70, EC10, EB69, EB65, EB41, EB39, EB37, EB35, " & " EB33, EB31, EB29, EB27, EB25, EB23, EB13, EA82, EA80, EA78, " & " EA76, EA70, EA64, EA42, EA22, EA20, EA16, EA14, EA6, DY75, " & " DY71, DY63, DY61, DY59, DY57, DY55, DY53, DY51, DY49, DY47, " & " DY45, DY41, DY35, DY29, DY23, DY19, DY5, DW84, DW82, DW76, " & " DW74, DW72, DW70, DW68, DW66, DW64, DW40, DW36, DW34, DW30, " & " DW28, DW24, DW20, DW12, DW8, DV81, DV77, DV73, DV39, DV37, " & " DV33, DV31, DV27, DV25, DV21, DV19, DU84, DU82, DU80, DU78, " & " DU72, DU70, DU38, DU32, DU26, DU22, DU14, DU10, DT85, DT83, " & " DT79, DT69, DT65, DT17, DT3, DR78, DR76, DR74, DR72, DR70, " & " DR68, DR66, DR42, DR40, DR38, DR36, DR34, DR32, DR30, DR28, " & " DR26, DR24, DR22, DR20, DR6, DP83, DP81, DP71, DP69, DP67, " & " DP63, DP61, DP59, DP57, DP55, DP53, DP51, DP49, DP47, DP45, " & " DP9, DN78, DN72, DN68, DN44, DN38, DN32, DN26, DN22, DN18, " & " DN12, DN2, DM83, DM77, DM73, DM65, DM39, DM37, DM33, DM31, " & " DM27, DM25, DM19, DM15, DL80, DL78, DL76, DL74, DL70, DL68, " & " DL40, DL36, DL34, DL30, DL28, DL24, DL22, DL18, DL16, DL8, " & " DL4, DK85, DK83, DK77, DK75, DK73, DK41, DK39, DK35, DK29, " & " DK23, DK7, DJ84, DJ82, DJ78, DJ74, DJ68, DJ42, DJ38, DJ22, " & " DJ10, DJ2, DH83, DH81, DH79, DH73, DH71, DH67, DH41, DH37, " & " DH35, DH33, DH31, DH29, DH27, DH25, DH23, DH21, DH15, DH13, " & " DG82, DG80, DG78, DG76, DG68, DG66, DG24, DG16, DG14, DG2, " & " DF85, DF83, DF79, DF73, DF69, DF65, DF41, DF39, DF37, DF35, " & " DF29, DF19, DF7, DF5, DE78, DE72, DE70, DE64, DE62, DE60, " & " DE58, DE56, DE54, DE52, DE50, DE48, DE36, DE34, DE30, DE28, " & " DE24, DE20, DE18, DE8, DE6, DD83, DD81, DD75, DD73, DD71, " & " DD37, DD33, DD31, DD27, DD23, DD11, DC86, DC84, DC78, DC70, " & " DC68, DC66, DC64, DC42, DC38, DC32, DC26, DC24, DC14, DB85, " & " DB83, DB77, DB73, DB49, DB47, DB41, DB39, DB25, DB23, DB17, " & " DB13, DB7, DB3, DA80, DA78, DA76, DA74, DA70, DA64, DA50, " & " DA48, DA46, DA44, DA38, DA36, DA34, DA32, DA30, DA28, DA26, " & " DA18, DA6, CY85, CY83, CY77, CY75, CY69, CY65, CY61, CY59, " & " CY51, CY45, CY41, CY21, CY15, CY13, CY9, CY1, CW82, CW78, " & " CW74, CW68, CW66, CW64, CW54, CW52, CW42, CW40, CW38, CW32, " & " CW26, CW12, CW6, CV83, CV81, CV79, CV73, CV67, CV63, CV55, " & " CV53, CV41, CV39, CV37, CV33, CV31, CV27, CV25, CV17, CV1, " & " CU86, CU82, CU80, CU78, CU76, CU68, CU62, CU56, CU36, CU34, " & " CU30, CU28, CU22, CU4, CT85, CT83, CT79, CT73, CT57, CT35, " & " CT33, CT29, CT27, CT19, CT13, CT7, CR86, CR78, CR68, CR66, " & " CR64, CR62, CR58, CR32, CR24, CR22, CR10, CR6, CP83, CP81, " & " CP75, CP73, CP69, CP59, CP25, CP1, CN78, CN68, CN62, CN60, " & " CN32, CN26, CN14, CN12, CN2, CM85, CM83, CM77, CM73, CM67, " & " CM63, CM61, CM31, CM29, CM27, CM19, CM5, CL80, CL78, CL76, " & " CL74, CL66, CL64, CL62, CL22, CL18, CL14, CL8, CK85, CK83, " & " CK75, CK73, CK71, CK69, CK67, CK65, CK63, CK27, CK21, CK15, " & " CK11, CJ86, CJ84, CJ82, CJ78, CJ76, CJ74, CJ62, CJ12, CJ10, " & " CJ8, CJ6, CJ2, CH83, CH81, CH79, CH73, CH67, CH63, CH19, " & " CH15, CH3, CH1, CG80, CG72, CG68, CG62, CG22, CG18, CG6, " & " CF83, CF77, CF71, CF69, CF63, CF9, CE82, CE70, CE62, CE26, " & " CE20, CE14, CE10, CD81, CD79, CD77, CD75, CD73, CD63, CD13, " & " CD5, CC82, CC80, CC78, CC76, CC74, CC72, CC64, CC24, CC18, " & " CC16, CC4, CB71, CB63, CB27, CB9, CB7, CA70, CA68, CA66, " & " CA64, CA26, CA20, CA18, CA14, CA10, CA8, CA6, CA2, BY71, " & " BY69, BY67, BY65, BY63, BY23, BY13, BY11, BW82, BW80, BW78, " & " BW76, BW74, BW72, BW26, BW18, BW16, BW14, BW12, BW6, BV25, " & " BV17, BV5, BU10, BU8, BT25, BT23, BT21, BT9, BT5, BT3, " & " BR82, BR80, BR78, BR76, BR74, BR72, BR70, BR68, BR66, BR64, " & " BR26, BR18, BR16, BR10, BR6, BP27, BP3, BN26, BN20, BN10, " & " BN6, BM25, BM15, BM13, BM9, BL82, BL80, BL78, BL76, BL74, " & " BL72, BL70, BL68, BL66, BL64, BL24, BL22, BL12, BL10, BL6, " & " BK19, BK11, BK7, BK3, BJ6, BJ4, BH21, BH17, BH15, BH11, " & " BH9, BH7, BG82, BG80, BG78, BG76, BG74, BG72, BG24, BG22, " & " BG10, BG8, BG6, BF71, BF69, BF67, BF65, BF63, BF25, BF19, " & " BF17, BF15, BF9, BE70, BE68, BE66, BE64, BE26, BE10, BE8, " & " BE6, BE4, BD71, BD63, BD27, BD21, BD15, BD11, BD5, BC82, " & " BC80, BC78, BC76, BC74, BC72, BC70, BC16, BC12, BC8, BC4, " & " BB83, BB81, BB79, BB77, BB75, BB73, BB69, BB63, BB23, BB19, " & " BA84, BA80, BA74, BA68, BA62, BA12, BA6, BA2, AY81, AY79, " & " AY63, AY25, AY23, AY21, AY17, AY15, AY5, AW84, AW82, AW78, " & " AW74, AW72, AW70, AW68, AW66, AW62, AW10, AW2, AV83, AV75, " & " AV67, AV65, AV63, AV25, AV23, AV19, AV13, AV11, AV7, AV3, " & " AV1, AU86, AU84, AU80, AU78, AU76, AU74, AU68, AU64, AU62, " & " AU28, AU26, AU6, AU2, AT85, AT83, AT77, AT73, AT69, AT63, " & " AT61, AT27, AT21, AT17, AT15, AR78, AR72, AR60, AR30, AR24, " & " AR10, AR6, AP85, AP83, AP81, AP75, AP73, AP69, AP67, AP65, " & " AP63, AP59, AP31, AP19, AP13, AP9, AP5, AN78, AN58, AN28, " & " AN6, AN2, AM83, AM79, AM73, AM69, AM63, AM57, AM31, AM1, " & " AL86, AL82, AL80, AL78, AL76, AL68, AL64, AL56, AL32, AL30, " & " AL24, AL10, AL4, AK85, AK83, AK81, AK79, AK73, AK67, AK65, " & " AK55, AK33, AK31, AK29, AK25, AK23, AK19, AK13, AK9, AJ86, " & " AJ82, AJ78, AJ74, AJ68, AJ66, AJ54, AJ52, AJ50, AJ48, AJ46, " & " AJ34, AJ32, AJ28, AJ26, AJ22, AJ8, AJ4, AH83, AH77, AH75, " & " AH69, AH65, AH61, AH59, AH53, AH51, AH49, AH47, AH45, AH35, " & " AH33, AH27, AH21, AH5, AH1, AG80, AG78, AG76, AG74, AG70, " & " AG64, AG36, AG18, AG14, AG12, AF85, AF83, AF77, AF73, AF41, " & " AF39, AF37, AF33, AF31, AF29, AF27, AF25, AF23, AF21, AF9, " & " AF1, AE78, AE70, AE68, AE66, AE64, AE42, AE40, AE38, AE16, " & " AE8, AE4, AD85, AD83, AD81, AD75, AD73, AD71, AD43, AD39, " & " AD33, AD27, AD21, AD19, AD15, AD13, AD11, AD9, AD7, AD3, " & " AC86, AC84, AC78, AC72, AC70, AC64, AC62, AC60, AC58, AC56, " & " AC54, AC52, AC50, AC48, AC40, AC38, AC34, AC32, AC28, AC26, " & " AC22, AC18, AB85, AB83, AB79, AB73, AB69, AB65, AB41, AB37, " & " AB35, AB31, AB29, AB25, AB23, AB21, AB11, AB5, AB1, AA82, " & " AA80, AA78, AA76, AA68, AA66, AA64, AA42, AA36, AA30, AA24, " & " AA22, AA18, AA16, AA4, Y85, Y83, Y81, Y79, Y73, Y71, " & " Y67, Y17, Y15, Y9, Y7, Y5, W82, W78, W74, W68, " & " W42, W40, W38, W36, W34, W32, W30, W28, W26, W24, " & " W22, W12, W8, V83, V77, V75, V73, V43, V23, V21, " & " V15, V13, V11, V9, V5, V1, U86, U80, U78, U76, " & " U74, U70, U68, U42, U36, U30, U24, U22, U20, U6, " & " U4, U2, T85, T83, T77, T73, T65, T41, T37, T35, " & " T31, T29, T25, T17, T13, R86, R78, R72, R68, R40, " & " R38, R34, R32, R28, R26, R22, R18, R14, R4, R2, " & " P83, P81, P71, P69, P67, P63, P61, P59, P57, P55, " & " P53, P51, P49, P47, P45, P39, P33, P27, P15, P11, " & " N78, N76, N74, N72, N70, N66, N22, N20, N8, N6, " & " N4, M85, M83, M79, M71, M65, M43, M41, M39, M37, " & " M35, M33, M31, M29, M27, M25, M23, M19, M17, M15, " & " L82, L80, L78, L72, L22, L20, L10, L8, L6, L2, " & " K85, K83, K81, K77, K73, K71, K69, K67, K65, K39, " & " K33, K27, K17, K13, K11, K1, J84, J82, J76, J74, " & " J72, J40, J38, J34, J32, J28, J26, J22, J16, J14, " & " J12, J4, H75, H71, H65, H63, H61, H59, H57, H55, " & " H53, H51, H49, H47, H45, H41, H39, H37, H35, H33, " & " H31, H29, H27, H25, H11, H3, G82, G80, G78, G76, " & " G70, G66, G42, G38, G36, G32, G30, G26, G24, G22, " & " G8, G4, F69, F67, F43, F37, F31, F25, F19, F17, " & " F5, E76, E74, E72, E66, E22, E20, E18, E16, E8, " & " E6, D77, D43, D41, D39, D37, D35, D33, D31, D29, " & " D27, D25, D13, D11, C78, C76, C16, C14, C12, C10, " & " C8, B75, B71, B37, B31, B25, B9, A38, A36, A32, " & " A30, A26 ) , " & "VSS_NCTF : ( EE80, EE40, EE8, ED81, ED41, ED7, EC82, EC42, EC6, " & " EB83, EA84, DY85, DW2, J86, E82, D81, D3, C80, C4, " & " B79, B43, B5, A42 ) , " & "VSS_VCCIN_SENSE_DN : AY85, " & "VSS_VCCIO_SENSE_DN : BF5, " & "VSS_VCCSA_SENSE_DN : CG76"; attribute PORT_GROUPING of SKX_XCC : entity is "Differential_Current (( DMI_TX_DP_0 , DMI_TX_DN_0 )),"& "Differential_Current (( DMI_TX_DP_1 , DMI_TX_DN_1 )),"& "Differential_Current (( DMI_TX_DP_2 , DMI_TX_DN_2 )),"& "Differential_Current (( DMI_TX_DP_3 , DMI_TX_DN_3 )),"& "Differential_Current (( KTI0_TX_DP_0 , KTI0_TX_DN_0 )),"& "Differential_Current (( KTI0_TX_DP_1 , KTI0_TX_DN_1 )),"& "Differential_Current (( KTI0_TX_DP_10 , KTI0_TX_DN_10 )),"& "Differential_Current (( KTI0_TX_DP_11 , KTI0_TX_DN_11 )),"& "Differential_Current (( KTI0_TX_DP_12 , KTI0_TX_DN_12 )),"& "Differential_Current (( KTI0_TX_DP_13 , KTI0_TX_DN_13 )),"& "Differential_Current (( KTI0_TX_DP_14 , KTI0_TX_DN_14 )),"& "Differential_Current (( KTI0_TX_DP_15 , KTI0_TX_DN_15 )),"& "Differential_Current (( KTI0_TX_DP_16 , KTI0_TX_DN_16 )),"& "Differential_Current (( KTI0_TX_DP_17 , KTI0_TX_DN_17 )),"& "Differential_Current (( KTI0_TX_DP_18 , KTI0_TX_DN_18 )),"& "Differential_Current (( KTI0_TX_DP_19 , KTI0_TX_DN_19 )),"& "Differential_Current (( KTI0_TX_DP_2 , KTI0_TX_DN_2 )),"& "Differential_Current (( KTI0_TX_DP_3 , KTI0_TX_DN_3 )),"& "Differential_Current (( KTI0_TX_DP_4 , KTI0_TX_DN_4 )),"& "Differential_Current (( KTI0_TX_DP_5 , KTI0_TX_DN_5 )),"& "Differential_Current (( KTI0_TX_DP_6 , KTI0_TX_DN_6 )),"& "Differential_Current (( KTI0_TX_DP_7 , KTI0_TX_DN_7 )),"& "Differential_Current (( KTI0_TX_DP_8 , KTI0_TX_DN_8 )),"& "Differential_Current (( KTI0_TX_DP_9 , KTI0_TX_DN_9 )),"& "Differential_Current (( KTI1_TX_DP_0 , KTI1_TX_DN_0 )),"& "Differential_Current (( KTI1_TX_DP_1 , KTI1_TX_DN_1 )),"& "Differential_Current (( KTI1_TX_DP_10 , KTI1_TX_DN_10 )),"& "Differential_Current (( KTI1_TX_DP_11 , KTI1_TX_DN_11 )),"& "Differential_Current (( KTI1_TX_DP_12 , KTI1_TX_DN_12 )),"& "Differential_Current (( KTI1_TX_DP_13 , KTI1_TX_DN_13 )),"& "Differential_Current (( KTI1_TX_DP_14 , KTI1_TX_DN_14 )),"& "Differential_Current (( KTI1_TX_DP_15 , KTI1_TX_DN_15 )),"& "Differential_Current (( KTI1_TX_DP_16 , KTI1_TX_DN_16 )),"& "Differential_Current (( KTI1_TX_DP_17 , KTI1_TX_DN_17 )),"& "Differential_Current (( KTI1_TX_DP_18 , KTI1_TX_DN_18 )),"& "Differential_Current (( KTI1_TX_DP_19 , KTI1_TX_DN_19 )),"& "Differential_Current (( KTI1_TX_DP_2 , KTI1_TX_DN_2 )),"& "Differential_Current (( KTI1_TX_DP_3 , KTI1_TX_DN_3 )),"& "Differential_Current (( KTI1_TX_DP_4 , KTI1_TX_DN_4 )),"& "Differential_Current (( KTI1_TX_DP_5 , KTI1_TX_DN_5 )),"& "Differential_Current (( KTI1_TX_DP_6 , KTI1_TX_DN_6 )),"& "Differential_Current (( KTI1_TX_DP_7 , KTI1_TX_DN_7 )),"& "Differential_Current (( KTI1_TX_DP_8 , KTI1_TX_DN_8 )),"& "Differential_Current (( KTI1_TX_DP_9 , KTI1_TX_DN_9 )),"& "Differential_Current (( KTI2_TX_DP_0 , KTI2_TX_DN_0 )),"& "Differential_Current (( KTI2_TX_DP_1 , KTI2_TX_DN_1 )),"& "Differential_Current (( KTI2_TX_DP_10 , KTI2_TX_DN_10 )),"& "Differential_Current (( KTI2_TX_DP_11 , KTI2_TX_DN_11 )),"& "Differential_Current (( KTI2_TX_DP_12 , KTI2_TX_DN_12 )),"& "Differential_Current (( KTI2_TX_DP_13 , KTI2_TX_DN_13 )),"& "Differential_Current (( KTI2_TX_DP_14 , KTI2_TX_DN_14 )),"& "Differential_Current (( KTI2_TX_DP_15 , KTI2_TX_DN_15 )),"& "Differential_Current (( KTI2_TX_DP_16 , KTI2_TX_DN_16 )),"& "Differential_Current (( KTI2_TX_DP_17 , KTI2_TX_DN_17 )),"& "Differential_Current (( KTI2_TX_DP_18 , KTI2_TX_DN_18 )),"& "Differential_Current (( KTI2_TX_DP_19 , KTI2_TX_DN_19 )),"& "Differential_Current (( KTI2_TX_DP_2 , KTI2_TX_DN_2 )),"& "Differential_Current (( KTI2_TX_DP_3 , KTI2_TX_DN_3 )),"& "Differential_Current (( KTI2_TX_DP_4 , KTI2_TX_DN_4 )),"& "Differential_Current (( KTI2_TX_DP_5 , KTI2_TX_DN_5 )),"& "Differential_Current (( KTI2_TX_DP_6 , KTI2_TX_DN_6 )),"& "Differential_Current (( KTI2_TX_DP_7 , KTI2_TX_DN_7 )),"& "Differential_Current (( KTI2_TX_DP_8 , KTI2_TX_DN_8 )),"& "Differential_Current (( KTI2_TX_DP_9 , KTI2_TX_DN_9 )),"& "Differential_Current (( PE1_TX_DP_0 , PE1_TX_DN_0 )),"& "Differential_Current (( PE1_TX_DP_1 , PE1_TX_DN_1 )),"& "Differential_Current (( PE1_TX_DP_10 , PE1_TX_DN_10 )),"& "Differential_Current (( PE1_TX_DP_11 , PE1_TX_DN_11 )),"& "Differential_Current (( PE1_TX_DP_12 , PE1_TX_DN_12 )),"& "Differential_Current (( PE1_TX_DP_13 , PE1_TX_DN_13 )),"& "Differential_Current (( PE1_TX_DP_14 , PE1_TX_DN_14 )),"& "Differential_Current (( PE1_TX_DP_15 , PE1_TX_DN_15 )),"& "Differential_Current (( PE1_TX_DP_2 , PE1_TX_DN_2 )),"& "Differential_Current (( PE1_TX_DP_3 , PE1_TX_DN_3 )),"& "Differential_Current (( PE1_TX_DP_4 , PE1_TX_DN_4 )),"& "Differential_Current (( PE1_TX_DP_5 , PE1_TX_DN_5 )),"& "Differential_Current (( PE1_TX_DP_6 , PE1_TX_DN_6 )),"& "Differential_Current (( PE1_TX_DP_7 , PE1_TX_DN_7 )),"& "Differential_Current (( PE1_TX_DP_8 , PE1_TX_DN_8 )),"& "Differential_Current (( PE1_TX_DP_9 , PE1_TX_DN_9 )),"& "Differential_Current (( PE2_TX_DP_0 , PE2_TX_DN_0 )),"& "Differential_Current (( PE2_TX_DP_1 , PE2_TX_DN_1 )),"& "Differential_Current (( PE2_TX_DP_10 , PE2_TX_DN_10 )),"& "Differential_Current (( PE2_TX_DP_11 , PE2_TX_DN_11 )),"& "Differential_Current (( PE2_TX_DP_12 , PE2_TX_DN_12 )),"& "Differential_Current (( PE2_TX_DP_13 , PE2_TX_DN_13 )),"& "Differential_Current (( PE2_TX_DP_14 , PE2_TX_DN_14 )),"& "Differential_Current (( PE2_TX_DP_15 , PE2_TX_DN_15 )),"& "Differential_Current (( PE2_TX_DP_2 , PE2_TX_DN_2 )),"& "Differential_Current (( PE2_TX_DP_3 , PE2_TX_DN_3 )),"& "Differential_Current (( PE2_TX_DP_4 , PE2_TX_DN_4 )),"& "Differential_Current (( PE2_TX_DP_5 , PE2_TX_DN_5 )),"& "Differential_Current (( PE2_TX_DP_6 , PE2_TX_DN_6 )),"& "Differential_Current (( PE2_TX_DP_7 , PE2_TX_DN_7 )),"& "Differential_Current (( PE2_TX_DP_8 , PE2_TX_DN_8 )),"& "Differential_Current (( PE2_TX_DP_9 , PE2_TX_DN_9 )),"& "Differential_Current (( PE3_TX_DP_0 , PE3_TX_DN_0 )),"& "Differential_Current (( PE3_TX_DP_1 , PE3_TX_DN_1 )),"& "Differential_Current (( PE3_TX_DP_10 , PE3_TX_DN_10 )),"& "Differential_Current (( PE3_TX_DP_11 , PE3_TX_DN_11 )),"& "Differential_Current (( PE3_TX_DP_12 , PE3_TX_DN_12 )),"& "Differential_Current (( PE3_TX_DP_13 , PE3_TX_DN_13 )),"& "Differential_Current (( PE3_TX_DP_14 , PE3_TX_DN_14 )),"& "Differential_Current (( PE3_TX_DP_15 , PE3_TX_DN_15 )),"& "Differential_Current (( PE3_TX_DP_2 , PE3_TX_DN_2 )),"& "Differential_Current (( PE3_TX_DP_3 , PE3_TX_DN_3 )),"& "Differential_Current (( PE3_TX_DP_4 , PE3_TX_DN_4 )),"& "Differential_Current (( PE3_TX_DP_5 , PE3_TX_DN_5 )),"& "Differential_Current (( PE3_TX_DP_6 , PE3_TX_DN_6 )),"& "Differential_Current (( PE3_TX_DP_7 , PE3_TX_DN_7 )),"& "Differential_Current (( PE3_TX_DP_8 , PE3_TX_DN_8 )),"& "Differential_Current (( PE3_TX_DP_9 , PE3_TX_DN_9 ))"; -- -- Scan Port Identification -- attribute Tap_Scan_In of TDI : signal is true; attribute Tap_Scan_Mode of TMS : signal is true; attribute Tap_Scan_Out of TDO : signal is true; attribute Tap_Scan_Reset of TRST_N : signal is true; attribute Tap_Scan_Clock of TCK : signal is (16.0e6, both); -- -- Compliance enable description -- attribute COMPLIANCE_PATTERNS of SKX_XCC : entity is "(DDR012_DRAM_PWR_OK, DDR345_DRAM_PWR_OK, PWRGOOD ) (111)"; attribute Instruction_Length of SKX_XCC : entity is 11; attribute Instruction_Opcode of SKX_XCC : entity is " EXTEST ( 00000001001 ), " & " SAMPLE ( 00000000001 ), " & " PRELOAD ( 00000000001 ), " & " IDCODE ( 00000000010 ), " & " CLAMP ( 00000000100 ), " & " EXTEST_TRAIN ( 00000001111 ), " & " EXTEST_PULSE ( 00000001110 ), " & -- RUNBIST commented because some compilers generate error when supporting syntax is not found -- " RUNBIST ( 00000000111 ), " & " HIGHZ ( 00000001000 ), " & " EXTEST_TOGGLE ( 00000001101 ), " & " BYPASS ( 11111111111 ), " & " Reserved ( 00000000000, 00000000011, 00000000101, 00000000110, " & " 00000001010, 00000001011, 00000001100, 00000010000, " & " 00000010001, 00000010010, 00000010011, 00000010100, " & " 00000010101, 00000010110, 00000010111, 00000011000, " & " 00000011001, 00000011010, 00000011011, 00000011100, " & " 00000011101, 00000011110, 00000011111, 00000100000, " & " 00000100001, 00000100010, 00000100011, 00000100100, " & " 00000100101, 00000100110, 00000100111, 00000101000, " & " 00000101001, 00000101010, 00000101011, 00000101100, " & " 00000101101, 00000101110, 00000101111, 00000110000, " & " 00000110001, 00000110010, 00000110011, 00000110100, " & " 00000110101, 00000110110, 00000110111, 00000111000, " & " 00000111001, 00000111010, 00000111011, 00000111100, " & " 00000111101, 00000111110, 00000111111, 00001000000, " & " 00001000001, 00001000010, 00001000011, 00001000100, " & " 00001000101, 00001000110, 00001000111, 00001001000, " & " 00001001001, 00001001010, 00001001011, 00001001100, " & " 00001001101, 00001001110, 00001001111, 00001010000, " & " 00001010001, 00001010010, 00001010011, 00001010100, " & " 00001010101, 00001010110, 00001010111, 00001011000, " & " 00001011001, 00001011010, 00001011011, 00001011100, " & " 00001011101, 00001011110, 00001011111, 00001100000, " & " 00001100001, 00001100010, 00001100011, 00001100100, " & " 00001100101, 00001100110, 00001100111, 00001101000, " & " 00001101001, 00001101010, 00001101011, 00001101100, " & " 00001101101, 00001101110, 00001101111, 00001110000, " & " 00001110001, 00001110010, 00001110011, 00001110100, " & " 00001110101, 00001110110, 00001110111, 00001111000, " & " 00001111001, 00001111010, 00001111011, 00001111100, " & " 00001111101, 00001111110, 00001111111, 00010000000, " & " 00010000001, 00010000010, 00010000011, 00010000100, " & " 00010000101, 00010000110, 00010000111, 00010001000, " & " 00010001001, 00010001010, 00010001011, 00010001100, " & " 00010001101, 00010001110, 00010001111, 00010010000, " & " 00010010001, 00010010010, 00010010011, 00010010100, " & " 00010010101, 00010010110, 00010010111, 00010011000, " & " 00010011001, 00010011010, 00010011011, 00010011100, " & " 00010011101, 00010011110, 00010011111, 00010100000, " & " 00010100001, 00010100010, 00010100011, 00010100100, " & " 00010100101, 00010100110, 00010100111, 00010101000, " & " 00010101001, 00010101010, 00010101011, 00010101100, " & " 00010101101, 00010101110, 00010101111, 00010110000, " & " 00010110001, 00010110010, 00010110011, 00010110100, " & " 00010110101, 00010110110, 00010110111, 00010111000, " & " 00010111001, 00010111010, 00010111011, 00010111100, " & " 00010111101, 00010111110, 00010111111, 00011000000, " & " 00011000001, 00011000010, 00011000011, 00011000100, " & " 00011000101, 00011000110, 00011000111, 00011001000, " & " 00011001001, 00011001010, 00011001011, 00011001100, " & " 00011001101, 00011001110, 00011001111, 00011010000, " & " 00011010001, 00011010010, 00011010011, 00011010100, " & " 00011010101, 00011010110, 00011010111, 00011011000, " & " 00011011001, 00011011010, 00011011011, 00011011100, " & " 00011011101, 00011011110, 00011011111, 00011100000, " & " 00011100001, 00011100010, 00011100011, 00011100100, " & " 00011100101, 00011100110, 00011100111, 00011101000, " & " 00011101001, 00011101010, 00011101011, 00011101100, " & " 00011101101, 00011101110, 00011101111, 00011110000, " & " 00011110001, 00011110010, 00011110011, 00011110100, " & " 00011110101, 00011110110, 00011110111, 00011111000, " & " 00011111001, 00011111010, 00011111011, 00011111100, " & " 00011111101, 00011111110, 00011111111, 00100000000, " & " 00100000001, 00100000010, 00100000011, 00100000100, " & " 00100000101, 00100000110, 00100000111, 00100001000, " & " 00100001001, 00100001010, 00100001011, 00100001100, " & " 00100001101, 00100001110, 00100001111, 00100010000, " & " 00100010001, 00100010010, 00100010011, 00100010100, " & " 00100010101, 00100010110, 00100010111, 00100011000, " & " 00100011001, 00100011010, 00100011011, 00100011100, " & " 00100011101, 00100011110, 00100011111, 00100100000, " & " 00100100001, 00100100010, 00100100011, 00100100100, " & " 00100100101, 00100100110, 00100100111, 00100101000, " & " 00100101001, 00100101010, 00100101011, 00100101100, " & " 00100101101, 00100101110, 00100101111, 00100110000, " & " 00100110001, 00100110010, 00100110011, 00100110100, " & " 00100110101, 00100110110, 00100110111, 00100111000, " & " 00100111001, 00100111010, 00100111011, 00100111100, " & " 00100111101, 00100111110, 00100111111, 00101000000, " & " 00101000001, 00101000010, 00101000011, 00101000100, " & " 00101000101, 00101000110, 00101000111, 00101001000, " & " 00101001001, 00101001010, 00101001011, 00101001100, " & " 00101001101, 00101001110, 00101001111, 00101010000, " & " 00101010001, 00101010010, 00101010011, 00101010100, " & " 00101010101, 00101010110, 00101010111, 00101011000, " & " 00101011001, 00101011010, 00101011011, 00101011100, " & " 00101011101, 00101011110, 00101011111, 00101100000, " & " 00101100001, 00101100010, 00101100011, 00101100100, " & " 00101100101, 00101100110, 00101100111, 00101101000, " & " 00101101001, 00101101010, 00101101011, 00101101100, " & " 00101101101, 00101101110, 00101101111, 00101110000, " & " 00101110001, 00101110010, 00101110011, 00101110100, " & " 00101110101, 00101110110, 00101110111, 00101111000, " & " 00101111001, 00101111010, 00101111011, 00101111100, " & " 00101111101, 00101111110, 00101111111, 00110000000, " & " 00110000001, 00110000010, 00110000011, 00110000100, " & " 00110000101, 00110000110, 00110000111, 00110001000, " & " 00110001001, 00110001010, 00110001011, 00110001100, " & " 00110001101, 00110001110, 00110001111, 00110010000, " & " 00110010001, 00110010010, 00110010011, 00110010100, " & " 00110010101, 00110010110, 00110010111, 00110011000, " & " 00110011001, 00110011010, 00110011011, 00110011100, " & " 00110011101, 00110011110, 00110011111, 00110100000, " & " 00110100001, 00110100010, 00110100011, 00110100100, " & " 00110100101, 00110100110, 00110100111, 00110101000, " & " 00110101001, 00110101010, 00110101011, 00110101100, " & " 00110101101, 00110101110, 00110101111, 00110110000, " & " 00110110001, 00110110010, 00110110011, 00110110100, " & " 00110110101, 00110110110, 00110110111, 00110111000, " & " 00110111001, 00110111010, 00110111011, 00110111100, " & " 00110111101, 00110111110, 00110111111, 00111000000, " & " 00111000001, 00111000010, 00111000011, 00111000100, " & " 00111000101, 00111000110, 00111000111, 00111001000, " & " 00111001001, 00111001010, 00111001011, 00111001100, " & " 00111001101, 00111001110, 00111001111, 00111010000, " & " 00111010001, 00111010010, 00111010011, 00111010100, " & " 00111010101, 00111010110, 00111010111, 00111011000, " & " 00111011001, 00111011010, 00111011011, 00111011100, " & " 00111011101, 00111011110, 00111011111, 00111100000, " & " 00111100001, 00111100010, 00111100011, 00111100100, " & " 00111100101, 00111100110, 00111100111, 00111101000, " & " 00111101001, 00111101010, 00111101011, 00111101100, " & " 00111101101, 00111101110, 00111101111, 00111110000, " & " 00111110001, 00111110010, 00111110011, 00111110100, " & " 00111110101, 00111110110, 00111110111, 00111111000, " & " 00111111001, 00111111010, 00111111011, 00111111100, " & " 00111111101, 00111111110, 00111111111, 01000000000, " & " 01000000001, 01000000010, 01000000011, 01000000100, " & " 01000000101, 01000000110, 01000000111, 01000001000, " & " 01000001001, 01000001010, 01000001011, 01000001100, " & " 01000001101, 01000001110, 01000001111, 01000010000, " & " 01000010001, 01000010010, 01000010011, 01000010100, " & " 01000010101, 01000010110, 01000010111, 01000011000, " & " 01000011001, 01000011010, 01000011011, 01000011100, " & " 01000011101, 01000011110, 01000011111, 01000100000, " & " 01000100001, 01000100010, 01000100011, 01000100100, " & " 01000100101, 01000100110, 01000100111, 01000101000, " & " 01000101001, 01000101010, 01000101011, 01000101100, " & " 01000101101, 01000101110, 01000101111, 01000110000, " & " 01000110001, 01000110010, 01000110011, 01000110100, " & " 01000110101, 01000110110, 01000110111, 01000111000, " & " 01000111001, 01000111010, 01000111011, 01000111100, " & " 01000111101, 01000111110, 01000111111, 01001000000, " & " 01001000001, 01001000010, 01001000011, 01001000100, " & " 01001000101, 01001000110, 01001000111, 01001001000, " & " 01001001001, 01001001010, 01001001011, 01001001100, " & " 01001001101, 01001001110, 01001001111, 01001010000, " & " 01001010001, 01001010010, 01001010011, 01001010100, " & " 01001010101, 01001010110, 01001010111, 01001011000, " & " 01001011001, 01001011010, 01001011011, 01001011100, " & " 01001011101, 01001011110, 01001011111, 01001100000, " & " 01001100001, 01001100010, 01001100011, 01001100100, " & " 01001100101, 01001100110, 01001100111, 01001101000, " & " 01001101001, 01001101010, 01001101011, 01001101100, " & " 01001101101, 01001101110, 01001101111, 01001110000, " & " 01001110001, 01001110010, 01001110011, 01001110100, " & " 01001110101, 01001110110, 01001110111, 01001111000, " & " 01001111001, 01001111010, 01001111011, 01001111100, " & " 01001111101, 01001111110, 01001111111, 01010000000, " & " 01010000001, 01010000010, 01010000011, 01010000100, " & " 01010000101, 01010000110, 01010000111, 01010001000, " & " 01010001001, 01010001010, 01010001011, 01010001100, " & " 01010001101, 01010001110, 01010001111, 01010010000, " & " 01010010001, 01010010010, 01010010011, 01010010100, " & " 01010010101, 01010010110, 01010010111, 01010011000, " & " 01010011001, 01010011010, 01010011011, 01010011100, " & " 01010011101, 01010011110, 01010011111, 01010100000, " & " 01010100001, 01010100010, 01010100011, 01010100100, " & " 01010100101, 01010100110, 01010100111, 01010101000, " & " 01010101001, 01010101010, 01010101011, 01010101100, " & " 01010101101, 01010101110, 01010101111, 01010110000, " & " 01010110001, 01010110010, 01010110011, 01010110100, " & " 01010110101, 01010110110, 01010110111, 01010111000, " & " 01010111001, 01010111010, 01010111011, 01010111100, " & " 01010111101, 01010111110, 01010111111, 01011000000, " & " 01011000001, 01011000010, 01011000011, 01011000100, " & " 01011000101, 01011000110, 01011000111, 01011001000, " & " 01011001001, 01011001010, 01011001011, 01011001100, " & " 01011001101, 01011001110, 01011001111, 01011010000, " & " 01011010001, 01011010010, 01011010011, 01011010100, " & " 01011010101, 01011010110, 01011010111, 01011011000, " & " 01011011001, 01011011010, 01011011011, 01011011100, " & " 01011011101, 01011011110, 01011011111, 01011100000, " & " 01011100001, 01011100010, 01011100011, 01011100100, " & " 01011100101, 01011100110, 01011100111, 01011101000, " & " 01011101001, 01011101010, 01011101011, 01011101100, " & " 01011101101, 01011101110, 01011101111, 01011110000, " & " 01011110001, 01011110010, 01011110011, 01011110100, " & " 01011110101, 01011110110, 01011110111, 01011111000, " & " 01011111001, 01011111010, 01011111011, 01011111100, " & " 01011111101, 01011111110, 01011111111, 01100000000, " & " 01100000001, 01100000010, 01100000011, 01100000100, " & " 01100000101, 01100000110, 01100000111, 01100001000, " & " 01100001001, 01100001010, 01100001011, 01100001100, " & " 01100001101, 01100001110, 01100001111, 01100010000, " & " 01100010001, 01100010010, 01100010011, 01100010100, " & " 01100010101, 01100010110, 01100010111, 01100011000, " & " 01100011001, 01100011010, 01100011011, 01100011100, " & " 01100011101, 01100011110, 01100011111, 01100100000, " & " 01100100001, 01100100010, 01100100011, 01100100100, " & " 01100100101, 01100100110, 01100100111, 01100101000, " & " 01100101001, 01100101010, 01100101011, 01100101100, " & " 01100101101, 01100101110, 01100101111, 01100110000, " & " 01100110001, 01100110010, 01100110011, 01100110100, " & " 01100110101, 01100110110, 01100110111, 01100111000, " & " 01100111001, 01100111010, 01100111011, 01100111100, " & " 01100111101, 01100111110, 01100111111, 01101000000, " & " 01101000001, 01101000010, 01101000011, 01101000100, " & " 01101000101, 01101000110, 01101000111, 01101001000, " & " 01101001001, 01101001010, 01101001011, 01101001100, " & " 01101001101, 01101001110, 01101001111, 01101010000, " & " 01101010001, 01101010010, 01101010011, 01101010100, " & " 01101010101, 01101010110, 01101010111, 01101011000, " & " 01101011001, 01101011010, 01101011011, 01101011100, " & " 01101011101, 01101011110, 01101011111, 01101100000, " & " 01101100001, 01101100010, 01101100011, 01101100100, " & " 01101100101, 01101100110, 01101100111, 01101101000, " & " 01101101001, 01101101010, 01101101011, 01101101100, " & " 01101101101, 01101101110, 01101101111, 01101110000, " & " 01101110001, 01101110010, 01101110011, 01101110100, " & " 01101110101, 01101110110, 01101110111, 01101111000, " & " 01101111001, 01101111010, 01101111011, 01101111100, " & " 01101111101, 01101111110, 01101111111, 01110000000, " & " 01110000001, 01110000010, 01110000011, 01110000100, " & " 01110000101, 01110000110, 01110000111, 01110001000, " & " 01110001001, 01110001010, 01110001011, 01110001100, " & " 01110001101, 01110001110, 01110001111, 01110010000, " & " 01110010001, 01110010010, 01110010011, 01110010100, " & " 01110010101, 01110010110, 01110010111, 01110011000, " & " 01110011001, 01110011010, 01110011011, 01110011100, " & " 01110011101, 01110011110, 01110011111, 01110100000, " & " 01110100001, 01110100010, 01110100011, 01110100100, " & " 01110100101, 01110100110, 01110100111, 01110101000, " & " 01110101001, 01110101010, 01110101011, 01110101100, " & " 01110101101, 01110101110, 01110101111, 01110110000, " & " 01110110001, 01110110010, 01110110011, 01110110100, " & " 01110110101, 01110110110, 01110110111, 01110111000, " & " 01110111001, 01110111010, 01110111011, 01110111100, " & " 01110111101, 01110111110, 01110111111, 01111000000, " & " 01111000001, 01111000010, 01111000011, 01111000100, " & " 01111000101, 01111000110, 01111000111, 01111001000, " & " 01111001001, 01111001010, 01111001011, 01111001100, " & " 01111001101, 01111001110, 01111001111, 01111010000, " & " 01111010001, 01111010010, 01111010011, 01111010100, " & " 01111010101, 01111010110, 01111010111, 01111011000, " & " 01111011001, 01111011010, 01111011011, 01111011100, " & " 01111011101, 01111011110, 01111011111, 01111100000, " & " 01111100001, 01111100010, 01111100011, 01111100100, " & " 01111100101, 01111100110, 01111100111, 01111101000, " & " 01111101001, 01111101010, 01111101011, 01111101100, " & " 01111101101, 01111101110, 01111101111, 01111110000, " & " 01111110001, 01111110010, 01111110011, 01111110100, " & " 01111110101, 01111110110, 01111110111, 01111111000, " & " 01111111001, 01111111010, 01111111011, 01111111100, " & " 01111111101, 01111111110, 01111111111, 10000000000, " & " 10000000001, 10000000010, 10000000011, 10000000100, " & " 10000000101, 10000000110, 10000000111, 10000001000, " & " 10000001001, 10000001010, 10000001011, 10000001100, " & " 10000001101, 10000001110, 10000001111, 10000010000, " & " 10000010001, 10000010010, 10000010011, 10000010100, " & " 10000010101, 10000010110, 10000010111, 10000011000, " & " 10000011001, 10000011010, 10000011011, 10000011100, " & " 10000011101, 10000011110, 10000011111, 10000100000, " & " 10000100001, 10000100010, 10000100011, 10000100100, " & " 10000100101, 10000100110, 10000100111, 10000101000, " & " 10000101001, 10000101010, 10000101011, 10000101100, " & " 10000101101, 10000101110, 10000101111, 10000110000, " & " 10000110001, 10000110010, 10000110011, 10000110100, " & " 10000110101, 10000110110, 10000110111, 10000111000, " & " 10000111001, 10000111010, 10000111011, 10000111100, " & " 10000111101, 10000111110, 10000111111, 10001000000, " & " 10001000001, 10001000010, 10001000011, 10001000100, " & " 10001000101, 10001000110, 10001000111, 10001001000, " & " 10001001001, 10001001010, 10001001011, 10001001100, " & " 10001001101, 10001001110, 10001001111, 10001010000, " & " 10001010001, 10001010010, 10001010011, 10001010100, " & " 10001010101, 10001010110, 10001010111, 10001011000, " & " 10001011001, 10001011010, 10001011011, 10001011100, " & " 10001011101, 10001011110, 10001011111, 10001100000, " & " 10001100001, 10001100010, 10001100011, 10001100100, " & " 10001100101, 10001100110, 10001100111, 10001101000, " & " 10001101001, 10001101010, 10001101011, 10001101100, " & " 10001101101, 10001101110, 10001101111, 10001110000, " & " 10001110001, 10001110010, 10001110011, 10001110100, " & " 10001110101, 10001110110, 10001110111, 10001111000, " & " 10001111001, 10001111010, 10001111011, 10001111100, " & " 10001111101, 10001111110, 10001111111, 10010000000, " & " 10010000001, 10010000010, 10010000011, 10010000100, " & " 10010000101, 10010000110, 10010000111, 10010001000, " & " 10010001001, 10010001010, 10010001011, 10010001100, " & " 10010001101, 10010001110, 10010001111, 10010010000, " & " 10010010001, 10010010010, 10010010011, 10010010100, " & " 10010010101, 10010010110, 10010010111, 10010011000, " & " 10010011001, 10010011010, 10010011011, 10010011100, " & " 10010011101, 10010011110, 10010011111, 10010100000, " & " 10010100001, 10010100010, 10010100011, 10010100100, " & " 10010100101, 10010100110, 10010100111, 10010101000, " & " 10010101001, 10010101010, 10010101011, 10010101100, " & " 10010101101, 10010101110, 10010101111, 10010110000, " & " 10010110001, 10010110010, 10010110011, 10010110100, " & " 10010110101, 10010110110, 10010110111, 10010111000, " & " 10010111001, 10010111010, 10010111011, 10010111100, " & " 10010111101, 10010111110, 10010111111, 10011000000, " & " 10011000001, 10011000010, 10011000011, 10011000100, " & " 10011000101, 10011000110, 10011000111, 10011001000, " & " 10011001001, 10011001010, 10011001011, 10011001100, " & " 10011001101, 10011001110, 10011001111, 10011010000, " & " 10011010001, 10011010010, 10011010011, 10011010100, " & " 10011010101, 10011010110, 10011010111, 10011011000, " & " 10011011001, 10011011010, 10011011011, 10011011100, " & " 10011011101, 10011011110, 10011011111, 10011100000, " & " 10011100001, 10011100010, 10011100011, 10011100100, " & " 10011100101, 10011100110, 10011100111, 10011101000, " & " 10011101001, 10011101010, 10011101011, 10011101100, " & " 10011101101, 10011101110, 10011101111, 10011110000, " & " 10011110001, 10011110010, 10011110011, 10011110100, " & " 10011110101, 10011110110, 10011110111, 10011111000, " & " 10011111001, 10011111010, 10011111011, 10011111100, " & " 10011111101, 10011111110, 10011111111, 10100000000, " & " 10100000001, 10100000010, 10100000011, 10100000100, " & " 10100000101, 10100000110, 10100000111, 10100001000, " & " 10100001001, 10100001010, 10100001011, 10100001100, " & " 10100001101, 10100001110, 10100001111, 10100010000, " & " 10100010001, 10100010010, 10100010011, 10100010100, " & " 10100010101, 10100010110, 10100010111, 10100011000, " & " 10100011001, 10100011010, 10100011011, 10100011100, " & " 10100011101, 10100011110, 10100011111, 10100100000, " & " 10100100001, 10100100010, 10100100011, 10100100100, " & " 10100100101, 10100100110, 10100100111, 10100101000, " & " 10100101001, 10100101010, 10100101011, 10100101100, " & " 10100101101, 10100101110, 10100101111, 10100110000, " & " 10100110001, 10100110010, 10100110011, 10100110100, " & " 10100110101, 10100110110, 10100110111, 10100111000, " & " 10100111001, 10100111010, 10100111011, 10100111100, " & " 10100111101, 10100111110, 10100111111, 10101000000, " & " 10101000001, 10101000010, 10101000011, 10101000100, " & " 10101000101, 10101000110, 10101000111, 10101001000, " & " 10101001001, 10101001010, 10101001011, 10101001100, " & " 10101001101, 10101001110, 10101001111, 10101010000, " & " 10101010001, 10101010010, 10101010011, 10101010100, " & " 10101010101, 10101010110, 10101010111, 10101011000, " & " 10101011001, 10101011010, 10101011011, 10101011100, " & " 10101011101, 10101011110, 10101011111, 10101100000, " & " 10101100001, 10101100010, 10101100011, 10101100100, " & " 10101100101, 10101100110, 10101100111, 10101101000, " & " 10101101001, 10101101010, 10101101011, 10101101100, " & " 10101101101, 10101101110, 10101101111, 10101110000, " & " 10101110001, 10101110010, 10101110011, 10101110100, " & " 10101110101, 10101110110, 10101110111, 10101111000, " & " 10101111001, 10101111010, 10101111011, 10101111100, " & " 10101111101, 10101111110, 10101111111, 10110000000, " & " 10110000001, 10110000010, 10110000011, 10110000100, " & " 10110000101, 10110000110, 10110000111, 10110001000, " & " 10110001001, 10110001010, 10110001011, 10110001100, " & " 10110001101, 10110001110, 10110001111, 10110010000, " & " 10110010001, 10110010010, 10110010011, 10110010100, " & " 10110010101, 10110010110, 10110010111, 10110011000, " & " 10110011001, 10110011010, 10110011011, 10110011100, " & " 10110011101, 10110011110, 10110011111, 10110100000, " & " 10110100001, 10110100010, 10110100011, 10110100100, " & " 10110100101, 10110100110, 10110100111, 10110101000, " & " 10110101001, 10110101010, 10110101011, 10110101100, " & " 10110101101, 10110101110, 10110101111, 10110110000, " & " 10110110001, 10110110010, 10110110011, 10110110100, " & " 10110110101, 10110110110, 10110110111, 10110111000, " & " 10110111001, 10110111010, 10110111011, 10110111100, " & " 10110111101, 10110111110, 10110111111, 10111000000, " & " 10111000001, 10111000010, 10111000011, 10111000100, " & " 10111000101, 10111000110, 10111000111, 10111001000, " & " 10111001001, 10111001010, 10111001011, 10111001100, " & " 10111001101, 10111001110, 10111001111, 10111010000, " & " 10111010001, 10111010010, 10111010011, 10111010100, " & " 10111010101, 10111010110, 10111010111, 10111011000, " & " 10111011001, 10111011010, 10111011011, 10111011100, " & " 10111011101, 10111011110, 10111011111, 10111100000, " & " 10111100001, 10111100010, 10111100011, 10111100100, " & " 10111100101, 10111100110, 10111100111, 10111101000, " & " 10111101001, 10111101010, 10111101011, 10111101100, " & " 10111101101, 10111101110, 10111101111, 10111110000, " & " 10111110001, 10111110010, 10111110011, 10111110100, " & " 10111110101, 10111110110, 10111110111, 10111111000, " & " 10111111001, 10111111010, 10111111011, 10111111100, " & " 10111111101, 10111111110, 10111111111, 11000000000, " & " 11000000001, 11000000010, 11000000011, 11000000100, " & " 11000000101, 11000000110, 11000000111, 11000001000, " & " 11000001001, 11000001010, 11000001011, 11000001100, " & " 11000001101, 11000001110, 11000001111, 11000010000, " & " 11000010001, 11000010010, 11000010011, 11000010100, " & " 11000010101, 11000010110, 11000010111, 11000011000, " & " 11000011001, 11000011010, 11000011011, 11000011100, " & " 11000011101, 11000011110, 11000011111, 11000100000, " & " 11000100001, 11000100010, 11000100011, 11000100100, " & " 11000100101, 11000100110, 11000100111, 11000101000, " & " 11000101001, 11000101010, 11000101011, 11000101100, " & " 11000101101, 11000101110, 11000101111, 11000110000, " & " 11000110001, 11000110010, 11000110011, 11000110100, " & " 11000110101, 11000110110, 11000110111, 11000111000, " & " 11000111001, 11000111010, 11000111011, 11000111100, " & " 11000111101, 11000111110, 11000111111, 11001000000, " & " 11001000001, 11001000010, 11001000011, 11001000100, " & " 11001000101, 11001000110, 11001000111, 11001001000, " & " 11001001001, 11001001010, 11001001011, 11001001100, " & " 11001001101, 11001001110, 11001001111, 11001010000, " & " 11001010001, 11001010010, 11001010011, 11001010100, " & " 11001010101, 11001010110, 11001010111, 11001011000, " & " 11001011001, 11001011010, 11001011011, 11001011100, " & " 11001011101, 11001011110, 11001011111, 11001100000, " & " 11001100001, 11001100010, 11001100011, 11001100100, " & " 11001100101, 11001100110, 11001100111, 11001101000, " & " 11001101001, 11001101010, 11001101011, 11001101100, " & " 11001101101, 11001101110, 11001101111, 11001110000, " & " 11001110001, 11001110010, 11001110011, 11001110100, " & " 11001110101, 11001110110, 11001110111, 11001111000, " & " 11001111001, 11001111010, 11001111011, 11001111100, " & " 11001111101, 11001111110, 11001111111, 11010000000, " & " 11010000001, 11010000010, 11010000011, 11010000100, " & " 11010000101, 11010000110, 11010000111, 11010001000, " & " 11010001001, 11010001010, 11010001011, 11010001100, " & " 11010001101, 11010001110, 11010001111, 11010010000, " & " 11010010001, 11010010010, 11010010011, 11010010100, " & " 11010010101, 11010010110, 11010010111, 11010011000, " & " 11010011001, 11010011010, 11010011011, 11010011100, " & " 11010011101, 11010011110, 11010011111, 11010100000, " & " 11010100001, 11010100010, 11010100011, 11010100100, " & " 11010100101, 11010100110, 11010100111, 11010101000, " & " 11010101001, 11010101010, 11010101011, 11010101100, " & " 11010101101, 11010101110, 11010101111, 11010110000, " & " 11010110001, 11010110010, 11010110011, 11010110100, " & " 11010110101, 11010110110, 11010110111, 11010111000, " & " 11010111001, 11010111010, 11010111011, 11010111100, " & " 11010111101, 11010111110, 11010111111, 11011000000, " & " 11011000001, 11011000010, 11011000011, 11011000100, " & " 11011000101, 11011000110, 11011000111, 11011001000, " & " 11011001001, 11011001010, 11011001011, 11011001100, " & " 11011001101, 11011001110, 11011001111, 11011010000, " & " 11011010001, 11011010010, 11011010011, 11011010100, " & " 11011010101, 11011010110, 11011010111, 11011011000, " & " 11011011001, 11011011010, 11011011011, 11011011100, " & " 11011011101, 11011011110, 11011011111, 11011100000, " & " 11011100001, 11011100010, 11011100011, 11011100100, " & " 11011100101, 11011100110, 11011100111, 11011101000, " & " 11011101001, 11011101010, 11011101011, 11011101100, " & " 11011101101, 11011101110, 11011101111, 11011110000, " & " 11011110001, 11011110010, 11011110011, 11011110100, " & " 11011110101, 11011110110, 11011110111, 11011111000, " & " 11011111001, 11011111010, 11011111011, 11011111100, " & " 11011111101, 11011111110, 11011111111, 11100000000, " & " 11100000001, 11100000010, 11100000011, 11100000100, " & " 11100000101, 11100000110, 11100000111, 11100001000, " & " 11100001001, 11100001010, 11100001011, 11100001100, " & " 11100001101, 11100001110, 11100001111, 11100010000, " & " 11100010001, 11100010010, 11100010011, 11100010100, " & " 11100010101, 11100010110, 11100010111, 11100011000, " & " 11100011001, 11100011010, 11100011011, 11100011100, " & " 11100011101, 11100011110, 11100011111, 11100100000, " & " 11100100001, 11100100010, 11100100011, 11100100100, " & " 11100100101, 11100100110, 11100100111, 11100101000, " & " 11100101001, 11100101010, 11100101011, 11100101100, " & " 11100101101, 11100101110, 11100101111, 11100110000, " & " 11100110001, 11100110010, 11100110011, 11100110100, " & " 11100110101, 11100110110, 11100110111, 11100111000, " & " 11100111001, 11100111010, 11100111011, 11100111100, " & " 11100111101, 11100111110, 11100111111, 11101000000, " & " 11101000001, 11101000010, 11101000011, 11101000100, " & " 11101000101, 11101000110, 11101000111, 11101001000, " & " 11101001001, 11101001010, 11101001011, 11101001100, " & " 11101001101, 11101001110, 11101001111, 11101010000, " & " 11101010001, 11101010010, 11101010011, 11101010100, " & " 11101010101, 11101010110, 11101010111, 11101011000, " & " 11101011001, 11101011010, 11101011011, 11101011100, " & " 11101011101, 11101011110, 11101011111, 11101100000, " & " 11101100001, 11101100010, 11101100011, 11101100100, " & " 11101100101, 11101100110, 11101100111, 11101101000, " & " 11101101001, 11101101010, 11101101011, 11101101100, " & " 11101101101, 11101101110, 11101101111, 11101110000, " & " 11101110001, 11101110010, 11101110011, 11101110100, " & " 11101110101, 11101110110, 11101110111, 11101111000, " & " 11101111001, 11101111010, 11101111011, 11101111100, " & " 11101111101, 11101111110, 11101111111, 11110000000, " & " 11110000001, 11110000010, 11110000011, 11110000100, " & " 11110000101, 11110000110, 11110000111, 11110001000, " & " 11110001001, 11110001010, 11110001011, 11110001100, " & " 11110001101, 11110001110, 11110001111, 11110010000, " & " 11110010001, 11110010010, 11110010011, 11110010100, " & " 11110010101, 11110010110, 11110010111, 11110011000, " & " 11110011001, 11110011010, 11110011011, 11110011100, " & " 11110011101, 11110011110, 11110011111, 11110100000, " & " 11110100001, 11110100010, 11110100011, 11110100100, " & " 11110100101, 11110100110, 11110100111, 11110101000, " & " 11110101001, 11110101010, 11110101011, 11110101100, " & " 11110101101, 11110101110, 11110101111, 11110110000, " & " 11110110001, 11110110010, 11110110011, 11110110100, " & " 11110110101, 11110110110, 11110110111, 11110111000, " & " 11110111001, 11110111010, 11110111011, 11110111100, " & " 11110111101, 11110111110, 11110111111, 11111000000, " & " 11111000001, 11111000010, 11111000011, 11111000100, " & " 11111000101, 11111000110, 11111000111, 11111001000, " & " 11111001001, 11111001010, 11111001011, 11111001100, " & " 11111001101, 11111001110, 11111001111, 11111010000, " & " 11111010001, 11111010010, 11111010011, 11111010100, " & " 11111010101, 11111010110, 11111010111, 11111011000, " & " 11111011001, 11111011010, 11111011011, 11111011100, " & " 11111011101, 11111011110, 11111011111, 11111100000, " & " 11111100001, 11111100010, 11111100011, 11111100100, " & " 11111100101, 11111100110, 11111100111, 11111101000, " & " 11111101001, 11111101010, 11111101011, 11111101101, " & " 11111101110, 11111101111, 11111110000, 11111110001, " & " 11111110010, 11111110011, 11111110100, 11111110101, " & " 11111110110, 11111110111, 11111111000, 11111111001, " & " 11111101100, 11111111010, 11111111011, 11111111100, " & " 11111111101, 11111111110) " ; attribute Instruction_Capture of SKX_XCC : entity is "00000000001"; attribute Instruction_Private of SKX_XCC : entity is "Reserved"; -- -- SKX_XCC IDCODE Register -- attribute Idcode_Register of SKX_XCC: entity is "0100" & --version, h0 step "1010001101101000" & --part number "00000001001" & --manufacturers identity "1"; --required by The standard -- -- SKX_XCC Data Register Access -- attribute Register_Access of SKX_XCC: entity is "BOUNDARY (EXTEST, SAMPLE, EXTEST_TOGGLE, EXTEST_TRAIN, EXTEST_PULSE), " & "DEVICE_ID (IDCODE), " & "BYPASS (CLAMP, HIGHZ, BYPASS)"; -- -- SKX_XCC - Boundary Scan cells -- -- -- SKX_XCC Boundary Register Description -- Cell 0 is closest to TDO -- attribute BOUNDARY_LENGTH of SKX_XCC: entity is 1529; attribute BOUNDARY_REGISTER of SKX_XCC : entity is -- "num (cell port function safe [ccell disval rslt] )," & "0 (BC_0, *, internal, x )," & "1 (BC_0, *, internal, x )," & "2 (BC_0, *, internal, x )," & "3 (BC_0, *, control, 0 )," & "4 (BC_0, *, internal, x )," & "5 (BC_2, DDR345_RESET_N, output3, x, 3, 0, z )," & "6 (BC_2, DDR5_MA_8, output3, x, 3, 0, z )," & "7 (BC_2, DDR5_MA_7, output3, x, 3, 0, z )," & "8 (BC_2, DDR5_MA_5, output3, x, 3, 0, z )," & "9 (BC_2, DDR5_MA_6, output3, x, 3, 0, z )," & "10 (BC_2, DDR5_MA_2, output3, x, 3, 0, z )," & "11 (BC_2, DDR5_MA_4, output3, x, 3, 0, z )," & "12 (BC_2, DDR5_MA_1, output3, x, 3, 0, z )," & "13 (BC_2, DDR5_MA_3, output3, x, 3, 0, z )," & "14 (BC_2, DDR5_PAR, output3, x, 3, 0, z )," & "15 (BC_0, *, internal, x )," & "16 (BC_2, DDR5_DQS_DN_17, output3, x, 3, 0, z )," & "17 (BC_2, DDR5_DQS_DP_17, output3, x, 3, 0, z )," & "18 (BC_8, DDR5_ECC_5, bidir, x, 3, 0, z )," & "19 (BC_8, DDR5_ECC_4, bidir, x, 3, 0, z )," & "20 (BC_8, DDR5_ECC_7, bidir, x, 3, 0, z )," & "21 (BC_8, DDR5_ECC_6, bidir, x, 3, 0, z )," & "22 (BC_2, DDR5_DQS_DN_8, output3, x, 3, 0, z )," & "23 (BC_2, DDR5_DQS_DP_8, output3, x, 3, 0, z )," & "24 (BC_8, DDR5_ECC_3, bidir, x, 3, 0, z )," & "25 (BC_8, DDR5_ECC_2, bidir, x, 3, 0, z )," & "26 (BC_8, DDR5_ECC_1, bidir, x, 3, 0, z )," & "27 (BC_8, DDR5_ECC_0, bidir, x, 3, 0, z )," & "28 (BC_2, DDR5_DQS_DN_11, output3, x, 3, 0, z )," & "29 (BC_2, DDR5_DQS_DP_11, output3, x, 3, 0, z )," & "30 (BC_8, DDR5_DQ_21, bidir, x, 3, 0, z )," & "31 (BC_8, DDR5_DQ_20, bidir, x, 3, 0, z )," & "32 (BC_8, DDR5_DQ_23, bidir, x, 3, 0, z )," & "33 (BC_8, DDR5_DQ_22, bidir, x, 3, 0, z )," & "34 (BC_2, DDR5_DQS_DN_2, output3, x, 3, 0, z )," & "35 (BC_2, DDR5_DQS_DP_2, output3, x, 3, 0, z )," & "36 (BC_8, DDR5_DQ_19, bidir, x, 3, 0, z )," & "37 (BC_8, DDR5_DQ_18, bidir, x, 3, 0, z )," & "38 (BC_8, DDR5_DQ_17, bidir, x, 3, 0, z )," & "39 (BC_8, DDR5_DQ_16, bidir, x, 3, 0, z )," & "40 (BC_2, DDR5_DQS_DN_9, output3, x, 3, 0, z )," & "41 (BC_2, DDR5_DQS_DP_9, output3, x, 3, 0, z )," & "42 (BC_8, DDR5_DQ_5, bidir, x, 3, 0, z )," & "43 (BC_8, DDR5_DQ_4, bidir, x, 3, 0, z )," & "44 (BC_8, DDR5_DQ_7, bidir, x, 3, 0, z )," & "45 (BC_8, DDR5_DQ_6, bidir, x, 3, 0, z )," & "46 (BC_2, DDR5_DQS_DN_0, output3, x, 3, 0, z )," & "47 (BC_2, DDR5_DQS_DP_0, output3, x, 3, 0, z )," & "48 (BC_8, DDR5_DQ_3, bidir, x, 3, 0, z )," & "49 (BC_8, DDR5_DQ_2, bidir, x, 3, 0, z )," & "50 (BC_8, DDR5_DQ_1, bidir, x, 3, 0, z )," & "51 (BC_8, DDR5_DQ_0, bidir, x, 3, 0, z )," & "52 (BC_2, DDR5_DQS_DN_1, output3, x, 3, 0, z )," & "53 (BC_2, DDR5_DQS_DP_1, output3, x, 3, 0, z )," & "54 (BC_8, DDR5_DQ_11, bidir, x, 3, 0, z )," & "55 (BC_8, DDR5_DQ_10, bidir, x, 3, 0, z )," & "56 (BC_8, DDR5_DQ_9, bidir, x, 3, 0, z )," & "57 (BC_8, DDR5_DQ_8, bidir, x, 3, 0, z )," & "58 (BC_2, DDR5_DQS_DN_10, output3, x, 3, 0, z )," & "59 (BC_2, DDR5_DQS_DP_10, output3, x, 3, 0, z )," & "60 (BC_8, DDR5_DQ_13, bidir, x, 3, 0, z )," & "61 (BC_8, DDR5_DQ_12, bidir, x, 3, 0, z )," & "62 (BC_8, DDR5_DQ_15, bidir, x, 3, 0, z )," & "63 (BC_8, DDR5_DQ_14, bidir, x, 3, 0, z )," & "64 (BC_2, DDR5_DQS_DN_3, output3, x, 3, 0, z )," & "65 (BC_2, DDR5_DQS_DP_3, output3, x, 3, 0, z )," & "66 (BC_8, DDR5_DQ_27, bidir, x, 3, 0, z )," & "67 (BC_8, DDR5_DQ_26, bidir, x, 3, 0, z )," & "68 (BC_8, DDR5_DQ_25, bidir, x, 3, 0, z )," & "69 (BC_8, DDR5_DQ_24, bidir, x, 3, 0, z )," & "70 (BC_2, DDR5_DQS_DN_12, output3, x, 3, 0, z )," & "71 (BC_2, DDR5_DQS_DP_12, output3, x, 3, 0, z )," & "72 (BC_8, DDR5_DQ_29, bidir, x, 3, 0, z )," & "73 (BC_8, DDR5_DQ_28, bidir, x, 3, 0, z )," & "74 (BC_8, DDR5_DQ_31, bidir, x, 3, 0, z )," & "75 (BC_8, DDR5_DQ_30, bidir, x, 3, 0, z )," & "76 (BC_8, DDR5_CKE_1, bidir, x, 3, 0, z )," & "77 (BC_2, DDR5_CKE_0, output3, x, 3, 0, z )," & "78 (BC_2, DDR5_CKE_2, output3, x, 3, 0, z )," & "79 (BC_0, *, internal, x )," & "80 (BC_8, DDR5_CKE_3, bidir, x, 3, 0, z )," & "81 (BC_1, DDR5_ALERT_N, input, x )," & "82 (BC_2, DDR5_ACT_N, output3, x, 3, 0, z )," & "83 (BC_2, DDR5_BG_0, output3, x, 3, 0, z )," & "84 (BC_2, DDR5_BG_1, output3, x, 3, 0, z )," & "85 (BC_2, DDR5_MA_11, output3, x, 3, 0, z )," & "86 (BC_2, DDR5_MA_9, output3, x, 3, 0, z )," & "87 (BC_2, DDR5_MA_12, output3, x, 3, 0, z )," & "88 (BC_2, DDR5_CS_N_4, output3, x, 3, 0, z )," & "89 (BC_2, DDR5_ODT_2, output3, x, 3, 0, z )," & "90 (BC_2, DDR5_MA_15, output3, x, 3, 0, z )," & "91 (BC_2, DDR5_MA_13, output3, x, 3, 0, z )," & "92 (BC_2, DDR5_MA_16, output3, x, 3, 0, z )," & "93 (BC_2, DDR5_MA_14, output3, x, 3, 0, z )," & "94 (BC_2, DDR5_MA_10, output3, x, 3, 0, z )," & "95 (BC_2, DDR5_BA_1, output3, x, 3, 0, z )," & "96 (BC_2, DDR5_MA_0, output3, x, 3, 0, z )," & "97 (BC_2, DDR5_BA_0, output3, x, 3, 0, z )," & "98 (BC_2, DDR5_DQS_DN_4, output3, x, 3, 0, z )," & "99 (BC_2, DDR5_DQS_DP_4, output3, x, 3, 0, z )," & "100 (BC_8, DDR5_DQ_35, bidir, x, 3, 0, z )," & "101 (BC_8, DDR5_DQ_34, bidir, x, 3, 0, z )," & "102 (BC_8, DDR5_DQ_33, bidir, x, 3, 0, z )," & "103 (BC_8, DDR5_DQ_32, bidir, x, 3, 0, z )," & "104 (BC_2, DDR5_DQS_DN_13, output3, x, 3, 0, z )," & "105 (BC_2, DDR5_DQS_DP_13, output3, x, 3, 0, z )," & "106 (BC_8, DDR5_DQ_37, bidir, x, 3, 0, z )," & "107 (BC_8, DDR5_DQ_36, bidir, x, 3, 0, z )," & "108 (BC_8, DDR5_DQ_39, bidir, x, 3, 0, z )," & "109 (BC_8, DDR5_DQ_38, bidir, x, 3, 0, z )," & "110 (BC_2, DDR5_DQS_DN_6, output3, x, 3, 0, z )," & "111 (BC_2, DDR5_DQS_DP_6, output3, x, 3, 0, z )," & "112 (BC_8, DDR5_DQ_51, bidir, x, 3, 0, z )," & "113 (BC_8, DDR5_DQ_50, bidir, x, 3, 0, z )," & "114 (BC_8, DDR5_DQ_49, bidir, x, 3, 0, z )," & "115 (BC_8, DDR5_DQ_48, bidir, x, 3, 0, z )," & "116 (BC_2, DDR5_DQS_DN_15, output3, x, 3, 0, z )," & "117 (BC_2, DDR5_DQS_DP_15, output3, x, 3, 0, z )," & "118 (BC_8, DDR5_DQ_53, bidir, x, 3, 0, z )," & "119 (BC_8, DDR5_DQ_52, bidir, x, 3, 0, z )," & "120 (BC_8, DDR5_DQ_55, bidir, x, 3, 0, z )," & "121 (BC_8, DDR5_DQ_54, bidir, x, 3, 0, z )," & "122 (BC_2, DDR5_DQS_DN_16, output3, x, 3, 0, z )," & "123 (BC_2, DDR5_DQS_DP_16, output3, x, 3, 0, z )," & "124 (BC_8, DDR5_DQ_61, bidir, x, 3, 0, z )," & "125 (BC_8, DDR5_DQ_60, bidir, x, 3, 0, z )," & "126 (BC_8, DDR5_DQ_63, bidir, x, 3, 0, z )," & "127 (BC_8, DDR5_DQ_62, bidir, x, 3, 0, z )," & "128 (BC_2, DDR5_DQS_DN_7, output3, x, 3, 0, z )," & "129 (BC_2, DDR5_DQS_DP_7, output3, x, 3, 0, z )," & "130 (BC_8, DDR5_DQ_59, bidir, x, 3, 0, z )," & "131 (BC_8, DDR5_DQ_58, bidir, x, 3, 0, z )," & "132 (BC_8, DDR5_DQ_57, bidir, x, 3, 0, z )," & "133 (BC_8, DDR5_DQ_56, bidir, x, 3, 0, z )," & "134 (BC_2, DDR5_DQS_DN_14, output3, x, 3, 0, z )," & "135 (BC_2, DDR5_DQS_DP_14, output3, x, 3, 0, z )," & "136 (BC_8, DDR5_DQ_45, bidir, x, 3, 0, z )," & "137 (BC_8, DDR5_DQ_44, bidir, x, 3, 0, z )," & "138 (BC_8, DDR5_DQ_47, bidir, x, 3, 0, z )," & "139 (BC_8, DDR5_DQ_46, bidir, x, 3, 0, z )," & "140 (BC_2, DDR5_DQS_DN_5, output3, x, 3, 0, z )," & "141 (BC_2, DDR5_DQS_DP_5, output3, x, 3, 0, z )," & "142 (BC_8, DDR5_DQ_43, bidir, x, 3, 0, z )," & "143 (BC_8, DDR5_DQ_42, bidir, x, 3, 0, z )," & "144 (BC_8, DDR5_DQ_41, bidir, x, 3, 0, z )," & "145 (BC_8, DDR5_DQ_40, bidir, x, 3, 0, z )," & "146 (BC_2, DDR5_CS_N_3, output3, x, 3, 0, z )," & "147 (BC_2, DDR5_CS_N_2, output3, x, 3, 0, z )," & "148 (BC_2, DDR5_CS_N_1, output3, x, 3, 0, z )," & "149 (BC_8, DDR5_ODT_1, bidir, x, 3, 0, z )," & "150 (BC_2, DDR5_CS_N_0, output3, x, 3, 0, z )," & "151 (BC_2, DDR5_ODT_0, output3, x, 3, 0, z )," & "152 (BC_2, DDR5_CS_N_7, output3, x, 3, 0, z )," & "153 (BC_2, DDR5_CS_N_6, output3, x, 3, 0, z )," & "154 (BC_2, DDR5_MA_17, output3, x, 3, 0, z )," & "155 (BC_2, DDR5_C_2, output3, x, 3, 0, z )," & "156 (BC_2, DDR5_CS_N_5, output3, x, 3, 0, z )," & "157 (BC_8, DDR5_ODT_3, bidir, x, 3, 0, z )," & "158 (BC_2, DDR4_CS_N_4, output3, x, 3, 0, z )," & "159 (BC_2, DDR4_ODT_2, output3, x, 3, 0, z )," & "160 (BC_2, DDR4_MA_15, output3, x, 3, 0, z )," & "161 (BC_2, DDR4_MA_13, output3, x, 3, 0, z )," & "162 (BC_2, DDR4_MA_16, output3, x, 3, 0, z )," & "163 (BC_2, DDR4_MA_14, output3, x, 3, 0, z )," & "164 (BC_2, DDR4_MA_10, output3, x, 3, 0, z )," & "165 (BC_2, DDR4_BA_1, output3, x, 3, 0, z )," & "166 (BC_2, DDR4_MA_0, output3, x, 3, 0, z )," & "167 (BC_2, DDR4_BA_0, output3, x, 3, 0, z )," & "168 (BC_2, DDR4_DQS_DN_4, output3, x, 3, 0, z )," & "169 (BC_2, DDR4_DQS_DP_4, output3, x, 3, 0, z )," & "170 (BC_8, DDR4_DQ_35, bidir, x, 3, 0, z )," & "171 (BC_8, DDR4_DQ_34, bidir, x, 3, 0, z )," & "172 (BC_8, DDR4_DQ_33, bidir, x, 3, 0, z )," & "173 (BC_8, DDR4_DQ_32, bidir, x, 3, 0, z )," & "174 (BC_2, DDR4_DQS_DN_13, output3, x, 3, 0, z )," & "175 (BC_2, DDR4_DQS_DP_13, output3, x, 3, 0, z )," & "176 (BC_8, DDR4_DQ_37, bidir, x, 3, 0, z )," & "177 (BC_8, DDR4_DQ_36, bidir, x, 3, 0, z )," & "178 (BC_8, DDR4_DQ_39, bidir, x, 3, 0, z )," & "179 (BC_8, DDR4_DQ_38, bidir, x, 3, 0, z )," & "180 (BC_2, DDR4_DQS_DN_6, output3, x, 3, 0, z )," & "181 (BC_2, DDR4_DQS_DP_6, output3, x, 3, 0, z )," & "182 (BC_8, DDR4_DQ_51, bidir, x, 3, 0, z )," & "183 (BC_8, DDR4_DQ_50, bidir, x, 3, 0, z )," & "184 (BC_8, DDR4_DQ_49, bidir, x, 3, 0, z )," & "185 (BC_8, DDR4_DQ_48, bidir, x, 3, 0, z )," & "186 (BC_2, DDR4_DQS_DN_15, output3, x, 3, 0, z )," & "187 (BC_2, DDR4_DQS_DP_15, output3, x, 3, 0, z )," & "188 (BC_8, DDR4_DQ_53, bidir, x, 3, 0, z )," & "189 (BC_8, DDR4_DQ_52, bidir, x, 3, 0, z )," & "190 (BC_8, DDR4_DQ_55, bidir, x, 3, 0, z )," & "191 (BC_8, DDR4_DQ_54, bidir, x, 3, 0, z )," & "192 (BC_2, DDR4_DQS_DN_16, output3, x, 3, 0, z )," & "193 (BC_2, DDR4_DQS_DP_16, output3, x, 3, 0, z )," & "194 (BC_8, DDR4_DQ_61, bidir, x, 3, 0, z )," & "195 (BC_8, DDR4_DQ_60, bidir, x, 3, 0, z )," & "196 (BC_8, DDR4_DQ_63, bidir, x, 3, 0, z )," & "197 (BC_8, DDR4_DQ_62, bidir, x, 3, 0, z )," & "198 (BC_2, DDR4_DQS_DN_7, output3, x, 3, 0, z )," & "199 (BC_2, DDR4_DQS_DP_7, output3, x, 3, 0, z )," & "200 (BC_8, DDR4_DQ_59, bidir, x, 3, 0, z )," & "201 (BC_8, DDR4_DQ_58, bidir, x, 3, 0, z )," & "202 (BC_8, DDR4_DQ_57, bidir, x, 3, 0, z )," & "203 (BC_8, DDR4_DQ_56, bidir, x, 3, 0, z )," & "204 (BC_2, DDR4_DQS_DN_14, output3, x, 3, 0, z )," & "205 (BC_2, DDR4_DQS_DP_14, output3, x, 3, 0, z )," & "206 (BC_8, DDR4_DQ_45, bidir, x, 3, 0, z )," & "207 (BC_8, DDR4_DQ_44, bidir, x, 3, 0, z )," & "208 (BC_8, DDR4_DQ_47, bidir, x, 3, 0, z )," & "209 (BC_8, DDR4_DQ_46, bidir, x, 3, 0, z )," & "210 (BC_2, DDR4_DQS_DN_5, output3, x, 3, 0, z )," & "211 (BC_2, DDR4_DQS_DP_5, output3, x, 3, 0, z )," & "212 (BC_8, DDR4_DQ_43, bidir, x, 3, 0, z )," & "213 (BC_8, DDR4_DQ_42, bidir, x, 3, 0, z )," & "214 (BC_8, DDR4_DQ_41, bidir, x, 3, 0, z )," & "215 (BC_8, DDR4_DQ_40, bidir, x, 3, 0, z )," & "216 (BC_2, DDR4_CS_N_3, output3, x, 3, 0, z )," & "217 (BC_2, DDR4_CS_N_2, output3, x, 3, 0, z )," & "218 (BC_2, DDR4_CS_N_1, output3, x, 3, 0, z )," & "219 (BC_8, DDR4_ODT_1, bidir, x, 3, 0, z )," & "220 (BC_2, DDR4_CS_N_0, output3, x, 3, 0, z )," & "221 (BC_2, DDR4_ODT_0, output3, x, 3, 0, z )," & "222 (BC_2, DDR4_CS_N_7, output3, x, 3, 0, z )," & "223 (BC_2, DDR4_CS_N_6, output3, x, 3, 0, z )," & "224 (BC_2, DDR4_MA_17, output3, x, 3, 0, z )," & "225 (BC_2, DDR4_C_2, output3, x, 3, 0, z )," & "226 (BC_2, DDR4_CS_N_5, output3, x, 3, 0, z )," & "227 (BC_8, DDR4_ODT_3, bidir, x, 3, 0, z )," & "228 (BC_2, DDR4_MA_8, output3, x, 3, 0, z )," & "229 (BC_2, DDR4_MA_7, output3, x, 3, 0, z )," & "230 (BC_2, DDR4_MA_5, output3, x, 3, 0, z )," & "231 (BC_2, DDR4_MA_6, output3, x, 3, 0, z )," & "232 (BC_2, DDR4_MA_2, output3, x, 3, 0, z )," & "233 (BC_2, DDR4_MA_4, output3, x, 3, 0, z )," & "234 (BC_2, DDR4_MA_1, output3, x, 3, 0, z )," & "235 (BC_2, DDR4_MA_3, output3, x, 3, 0, z )," & "236 (BC_2, DDR4_PAR, output3, x, 3, 0, z )," & "237 (BC_0, *, internal, x )," & "238 (BC_2, DDR4_DQS_DN_17, output3, x, 3, 0, z )," & "239 (BC_2, DDR4_DQS_DP_17, output3, x, 3, 0, z )," & "240 (BC_8, DDR4_ECC_5, bidir, x, 3, 0, z )," & "241 (BC_8, DDR4_ECC_4, bidir, x, 3, 0, z )," & "242 (BC_8, DDR4_ECC_7, bidir, x, 3, 0, z )," & "243 (BC_8, DDR4_ECC_6, bidir, x, 3, 0, z )," & "244 (BC_2, DDR4_DQS_DN_8, output3, x, 3, 0, z )," & "245 (BC_2, DDR4_DQS_DP_8, output3, x, 3, 0, z )," & "246 (BC_8, DDR4_ECC_3, bidir, x, 3, 0, z )," & "247 (BC_8, DDR4_ECC_2, bidir, x, 3, 0, z )," & "248 (BC_8, DDR4_ECC_1, bidir, x, 3, 0, z )," & "249 (BC_8, DDR4_ECC_0, bidir, x, 3, 0, z )," & "250 (BC_2, DDR4_DQS_DN_11, output3, x, 3, 0, z )," & "251 (BC_2, DDR4_DQS_DP_11, output3, x, 3, 0, z )," & "252 (BC_8, DDR4_DQ_21, bidir, x, 3, 0, z )," & "253 (BC_8, DDR4_DQ_20, bidir, x, 3, 0, z )," & "254 (BC_8, DDR4_DQ_23, bidir, x, 3, 0, z )," & "255 (BC_8, DDR4_DQ_22, bidir, x, 3, 0, z )," & "256 (BC_2, DDR4_DQS_DN_2, output3, x, 3, 0, z )," & "257 (BC_2, DDR4_DQS_DP_2, output3, x, 3, 0, z )," & "258 (BC_8, DDR4_DQ_19, bidir, x, 3, 0, z )," & "259 (BC_8, DDR4_DQ_18, bidir, x, 3, 0, z )," & "260 (BC_8, DDR4_DQ_17, bidir, x, 3, 0, z )," & "261 (BC_8, DDR4_DQ_16, bidir, x, 3, 0, z )," & "262 (BC_2, DDR4_DQS_DN_9, output3, x, 3, 0, z )," & "263 (BC_2, DDR4_DQS_DP_9, output3, x, 3, 0, z )," & "264 (BC_8, DDR4_DQ_5, bidir, x, 3, 0, z )," & "265 (BC_8, DDR4_DQ_4, bidir, x, 3, 0, z )," & "266 (BC_8, DDR4_DQ_7, bidir, x, 3, 0, z )," & "267 (BC_8, DDR4_DQ_6, bidir, x, 3, 0, z )," & "268 (BC_2, DDR4_DQS_DN_0, output3, x, 3, 0, z )," & "269 (BC_2, DDR4_DQS_DP_0, output3, x, 3, 0, z )," & "270 (BC_8, DDR4_DQ_3, bidir, x, 3, 0, z )," & "271 (BC_8, DDR4_DQ_2, bidir, x, 3, 0, z )," & "272 (BC_8, DDR4_DQ_1, bidir, x, 3, 0, z )," & "273 (BC_8, DDR4_DQ_0, bidir, x, 3, 0, z )," & "274 (BC_2, DDR4_DQS_DN_1, output3, x, 3, 0, z )," & "275 (BC_2, DDR4_DQS_DP_1, output3, x, 3, 0, z )," & "276 (BC_8, DDR4_DQ_11, bidir, x, 3, 0, z )," & "277 (BC_8, DDR4_DQ_10, bidir, x, 3, 0, z )," & "278 (BC_8, DDR4_DQ_9, bidir, x, 3, 0, z )," & "279 (BC_8, DDR4_DQ_8, bidir, x, 3, 0, z )," & "280 (BC_2, DDR4_DQS_DN_10, output3, x, 3, 0, z )," & "281 (BC_2, DDR4_DQS_DP_10, output3, x, 3, 0, z )," & "282 (BC_8, DDR4_DQ_13, bidir, x, 3, 0, z )," & "283 (BC_8, DDR4_DQ_12, bidir, x, 3, 0, z )," & "284 (BC_8, DDR4_DQ_15, bidir, x, 3, 0, z )," & "285 (BC_8, DDR4_DQ_14, bidir, x, 3, 0, z )," & "286 (BC_2, DDR4_DQS_DN_3, output3, x, 3, 0, z )," & "287 (BC_2, DDR4_DQS_DP_3, output3, x, 3, 0, z )," & "288 (BC_8, DDR4_DQ_27, bidir, x, 3, 0, z )," & "289 (BC_8, DDR4_DQ_26, bidir, x, 3, 0, z )," & "290 (BC_8, DDR4_DQ_25, bidir, x, 3, 0, z )," & "291 (BC_8, DDR4_DQ_24, bidir, x, 3, 0, z )," & "292 (BC_2, DDR4_DQS_DN_12, output3, x, 3, 0, z )," & "293 (BC_2, DDR4_DQS_DP_12, output3, x, 3, 0, z )," & "294 (BC_8, DDR4_DQ_29, bidir, x, 3, 0, z )," & "295 (BC_8, DDR4_DQ_28, bidir, x, 3, 0, z )," & "296 (BC_8, DDR4_DQ_31, bidir, x, 3, 0, z )," & "297 (BC_8, DDR4_DQ_30, bidir, x, 3, 0, z )," & "298 (BC_8, DDR4_CKE_1, bidir, x, 3, 0, z )," & "299 (BC_2, DDR4_CKE_0, output3, x, 3, 0, z )," & "300 (BC_2, DDR4_CKE_2, output3, x, 3, 0, z )," & "301 (BC_0, *, internal, x )," & "302 (BC_8, DDR4_CKE_3, bidir, x, 3, 0, z )," & "303 (BC_1, DDR4_ALERT_N, input, x )," & "304 (BC_2, DDR4_ACT_N, output3, x, 3, 0, z )," & "305 (BC_2, DDR4_BG_0, output3, x, 3, 0, z )," & "306 (BC_2, DDR4_BG_1, output3, x, 3, 0, z )," & "307 (BC_2, DDR4_MA_11, output3, x, 3, 0, z )," & "308 (BC_2, DDR4_MA_9, output3, x, 3, 0, z )," & "309 (BC_2, DDR4_MA_12, output3, x, 3, 0, z )," & "310 (BC_2, DDR3_MA_8, output3, x, 3, 0, z )," & "311 (BC_2, DDR3_MA_7, output3, x, 3, 0, z )," & "312 (BC_2, DDR3_MA_5, output3, x, 3, 0, z )," & "313 (BC_2, DDR3_MA_6, output3, x, 3, 0, z )," & "314 (BC_2, DDR3_MA_2, output3, x, 3, 0, z )," & "315 (BC_2, DDR3_MA_4, output3, x, 3, 0, z )," & "316 (BC_2, DDR3_MA_1, output3, x, 3, 0, z )," & "317 (BC_2, DDR3_MA_3, output3, x, 3, 0, z )," & "318 (BC_2, DDR3_PAR, output3, x, 3, 0, z )," & "319 (BC_0, *, internal, x )," & "320 (BC_2, DDR3_DQS_DN_17, output3, x, 3, 0, z )," & "321 (BC_2, DDR3_DQS_DP_17, output3, x, 3, 0, z )," & "322 (BC_8, DDR3_ECC_5, bidir, x, 3, 0, z )," & "323 (BC_8, DDR3_ECC_4, bidir, x, 3, 0, z )," & "324 (BC_8, DDR3_ECC_7, bidir, x, 3, 0, z )," & "325 (BC_8, DDR3_ECC_6, bidir, x, 3, 0, z )," & "326 (BC_2, DDR3_DQS_DN_8, output3, x, 3, 0, z )," & "327 (BC_2, DDR3_DQS_DP_8, output3, x, 3, 0, z )," & "328 (BC_8, DDR3_ECC_3, bidir, x, 3, 0, z )," & "329 (BC_8, DDR3_ECC_2, bidir, x, 3, 0, z )," & "330 (BC_8, DDR3_ECC_1, bidir, x, 3, 0, z )," & "331 (BC_8, DDR3_ECC_0, bidir, x, 3, 0, z )," & "332 (BC_2, DDR3_DQS_DN_11, output3, x, 3, 0, z )," & "333 (BC_2, DDR3_DQS_DP_11, output3, x, 3, 0, z )," & "334 (BC_8, DDR3_DQ_21, bidir, x, 3, 0, z )," & "335 (BC_8, DDR3_DQ_20, bidir, x, 3, 0, z )," & "336 (BC_8, DDR3_DQ_23, bidir, x, 3, 0, z )," & "337 (BC_8, DDR3_DQ_22, bidir, x, 3, 0, z )," & "338 (BC_2, DDR3_DQS_DN_2, output3, x, 3, 0, z )," & "339 (BC_2, DDR3_DQS_DP_2, output3, x, 3, 0, z )," & "340 (BC_8, DDR3_DQ_19, bidir, x, 3, 0, z )," & "341 (BC_8, DDR3_DQ_18, bidir, x, 3, 0, z )," & "342 (BC_8, DDR3_DQ_17, bidir, x, 3, 0, z )," & "343 (BC_8, DDR3_DQ_16, bidir, x, 3, 0, z )," & "344 (BC_2, DDR3_DQS_DN_9, output3, x, 3, 0, z )," & "345 (BC_2, DDR3_DQS_DP_9, output3, x, 3, 0, z )," & "346 (BC_8, DDR3_DQ_5, bidir, x, 3, 0, z )," & "347 (BC_8, DDR3_DQ_4, bidir, x, 3, 0, z )," & "348 (BC_8, DDR3_DQ_7, bidir, x, 3, 0, z )," & "349 (BC_8, DDR3_DQ_6, bidir, x, 3, 0, z )," & "350 (BC_2, DDR3_DQS_DN_0, output3, x, 3, 0, z )," & "351 (BC_2, DDR3_DQS_DP_0, output3, x, 3, 0, z )," & "352 (BC_8, DDR3_DQ_3, bidir, x, 3, 0, z )," & "353 (BC_8, DDR3_DQ_2, bidir, x, 3, 0, z )," & "354 (BC_8, DDR3_DQ_1, bidir, x, 3, 0, z )," & "355 (BC_8, DDR3_DQ_0, bidir, x, 3, 0, z )," & "356 (BC_2, DDR3_DQS_DN_1, output3, x, 3, 0, z )," & "357 (BC_2, DDR3_DQS_DP_1, output3, x, 3, 0, z )," & "358 (BC_8, DDR3_DQ_11, bidir, x, 3, 0, z )," & "359 (BC_8, DDR3_DQ_10, bidir, x, 3, 0, z )," & "360 (BC_8, DDR3_DQ_9, bidir, x, 3, 0, z )," & "361 (BC_8, DDR3_DQ_8, bidir, x, 3, 0, z )," & "362 (BC_2, DDR3_DQS_DN_10, output3, x, 3, 0, z )," & "363 (BC_2, DDR3_DQS_DP_10, output3, x, 3, 0, z )," & "364 (BC_8, DDR3_DQ_13, bidir, x, 3, 0, z )," & "365 (BC_8, DDR3_DQ_12, bidir, x, 3, 0, z )," & "366 (BC_8, DDR3_DQ_15, bidir, x, 3, 0, z )," & "367 (BC_8, DDR3_DQ_14, bidir, x, 3, 0, z )," & "368 (BC_2, DDR3_DQS_DN_3, output3, x, 3, 0, z )," & "369 (BC_2, DDR3_DQS_DP_3, output3, x, 3, 0, z )," & "370 (BC_8, DDR3_DQ_27, bidir, x, 3, 0, z )," & "371 (BC_8, DDR3_DQ_26, bidir, x, 3, 0, z )," & "372 (BC_8, DDR3_DQ_25, bidir, x, 3, 0, z )," & "373 (BC_8, DDR3_DQ_24, bidir, x, 3, 0, z )," & "374 (BC_2, DDR3_DQS_DN_12, output3, x, 3, 0, z )," & "375 (BC_2, DDR3_DQS_DP_12, output3, x, 3, 0, z )," & "376 (BC_8, DDR3_DQ_29, bidir, x, 3, 0, z )," & "377 (BC_8, DDR3_DQ_28, bidir, x, 3, 0, z )," & "378 (BC_8, DDR3_DQ_31, bidir, x, 3, 0, z )," & "379 (BC_8, DDR3_DQ_30, bidir, x, 3, 0, z )," & "380 (BC_8, DDR3_CKE_1, bidir, x, 3, 0, z )," & "381 (BC_2, DDR3_CKE_0, output3, x, 3, 0, z )," & "382 (BC_2, DDR3_CKE_2, output3, x, 3, 0, z )," & "383 (BC_0, *, internal, x )," & "384 (BC_8, DDR3_CKE_3, bidir, x, 3, 0, z )," & "385 (BC_1, DDR3_ALERT_N, input, x )," & "386 (BC_2, DDR3_ACT_N, output3, x, 3, 0, z )," & "387 (BC_2, DDR3_BG_0, output3, x, 3, 0, z )," & "388 (BC_2, DDR3_BG_1, output3, x, 3, 0, z )," & "389 (BC_2, DDR3_MA_11, output3, x, 3, 0, z )," & "390 (BC_2, DDR3_MA_9, output3, x, 3, 0, z )," & "391 (BC_2, DDR3_MA_12, output3, x, 3, 0, z )," & "392 (BC_2, DDR3_CS_N_4, output3, x, 3, 0, z )," & "393 (BC_2, DDR3_ODT_2, output3, x, 3, 0, z )," & "394 (BC_2, DDR3_MA_15, output3, x, 3, 0, z )," & "395 (BC_2, DDR3_MA_13, output3, x, 3, 0, z )," & "396 (BC_2, DDR3_MA_16, output3, x, 3, 0, z )," & "397 (BC_2, DDR3_MA_14, output3, x, 3, 0, z )," & "398 (BC_2, DDR3_MA_10, output3, x, 3, 0, z )," & "399 (BC_2, DDR3_BA_1, output3, x, 3, 0, z )," & "400 (BC_2, DDR3_MA_0, output3, x, 3, 0, z )," & "401 (BC_2, DDR3_BA_0, output3, x, 3, 0, z )," & "402 (BC_2, DDR3_DQS_DN_4, output3, x, 3, 0, z )," & "403 (BC_2, DDR3_DQS_DP_4, output3, x, 3, 0, z )," & "404 (BC_8, DDR3_DQ_35, bidir, x, 3, 0, z )," & "405 (BC_8, DDR3_DQ_34, bidir, x, 3, 0, z )," & "406 (BC_8, DDR3_DQ_33, bidir, x, 3, 0, z )," & "407 (BC_8, DDR3_DQ_32, bidir, x, 3, 0, z )," & "408 (BC_2, DDR3_DQS_DN_13, output3, x, 3, 0, z )," & "409 (BC_2, DDR3_DQS_DP_13, output3, x, 3, 0, z )," & "410 (BC_8, DDR3_DQ_37, bidir, x, 3, 0, z )," & "411 (BC_8, DDR3_DQ_36, bidir, x, 3, 0, z )," & "412 (BC_8, DDR3_DQ_39, bidir, x, 3, 0, z )," & "413 (BC_8, DDR3_DQ_38, bidir, x, 3, 0, z )," & "414 (BC_2, DDR3_DQS_DN_6, output3, x, 3, 0, z )," & "415 (BC_2, DDR3_DQS_DP_6, output3, x, 3, 0, z )," & "416 (BC_8, DDR3_DQ_51, bidir, x, 3, 0, z )," & "417 (BC_8, DDR3_DQ_50, bidir, x, 3, 0, z )," & "418 (BC_8, DDR3_DQ_49, bidir, x, 3, 0, z )," & "419 (BC_8, DDR3_DQ_48, bidir, x, 3, 0, z )," & "420 (BC_2, DDR3_DQS_DN_15, output3, x, 3, 0, z )," & "421 (BC_2, DDR3_DQS_DP_15, output3, x, 3, 0, z )," & "422 (BC_8, DDR3_DQ_53, bidir, x, 3, 0, z )," & "423 (BC_8, DDR3_DQ_52, bidir, x, 3, 0, z )," & "424 (BC_8, DDR3_DQ_55, bidir, x, 3, 0, z )," & "425 (BC_8, DDR3_DQ_54, bidir, x, 3, 0, z )," & "426 (BC_2, DDR3_DQS_DN_16, output3, x, 3, 0, z )," & "427 (BC_2, DDR3_DQS_DP_16, output3, x, 3, 0, z )," & "428 (BC_8, DDR3_DQ_61, bidir, x, 3, 0, z )," & "429 (BC_8, DDR3_DQ_60, bidir, x, 3, 0, z )," & "430 (BC_8, DDR3_DQ_63, bidir, x, 3, 0, z )," & "431 (BC_8, DDR3_DQ_62, bidir, x, 3, 0, z )," & "432 (BC_2, DDR3_DQS_DN_7, output3, x, 3, 0, z )," & "433 (BC_2, DDR3_DQS_DP_7, output3, x, 3, 0, z )," & "434 (BC_8, DDR3_DQ_59, bidir, x, 3, 0, z )," & "435 (BC_8, DDR3_DQ_58, bidir, x, 3, 0, z )," & "436 (BC_8, DDR3_DQ_57, bidir, x, 3, 0, z )," & "437 (BC_8, DDR3_DQ_56, bidir, x, 3, 0, z )," & "438 (BC_2, DDR3_DQS_DN_14, output3, x, 3, 0, z )," & "439 (BC_2, DDR3_DQS_DP_14, output3, x, 3, 0, z )," & "440 (BC_8, DDR3_DQ_45, bidir, x, 3, 0, z )," & "441 (BC_8, DDR3_DQ_44, bidir, x, 3, 0, z )," & "442 (BC_8, DDR3_DQ_47, bidir, x, 3, 0, z )," & "443 (BC_8, DDR3_DQ_46, bidir, x, 3, 0, z )," & "444 (BC_2, DDR3_DQS_DN_5, output3, x, 3, 0, z )," & "445 (BC_2, DDR3_DQS_DP_5, output3, x, 3, 0, z )," & "446 (BC_8, DDR3_DQ_43, bidir, x, 3, 0, z )," & "447 (BC_8, DDR3_DQ_42, bidir, x, 3, 0, z )," & "448 (BC_8, DDR3_DQ_41, bidir, x, 3, 0, z )," & "449 (BC_8, DDR3_DQ_40, bidir, x, 3, 0, z )," & "450 (BC_2, DDR3_CS_N_3, output3, x, 3, 0, z )," & "451 (BC_2, DDR3_CS_N_2, output3, x, 3, 0, z )," & "452 (BC_2, DDR3_CS_N_1, output3, x, 3, 0, z )," & "453 (BC_8, DDR3_ODT_1, bidir, x, 3, 0, z )," & "454 (BC_2, DDR3_CS_N_0, output3, x, 3, 0, z )," & "455 (BC_2, DDR3_ODT_0, output3, x, 3, 0, z )," & "456 (BC_2, DDR3_CS_N_7, output3, x, 3, 0, z )," & "457 (BC_2, DDR3_CS_N_6, output3, x, 3, 0, z )," & "458 (BC_2, DDR3_MA_17, output3, x, 3, 0, z )," & "459 (BC_2, DDR3_C_2, output3, x, 3, 0, z )," & "460 (BC_2, DDR3_CS_N_5, output3, x, 3, 0, z )," & "461 (BC_8, DDR3_ODT_3, bidir, x, 3, 0, z )," & "462 (BC_8, DDR3_CLK_DN_2, bidir, x, 3, 0, z )," & "463 (BC_8, DDR3_CLK_DN_0, bidir, x, 3, 0, z )," & "464 (BC_8, DDR3_CLK_DP_0, bidir, x, 3, 0, z )," & "465 (BC_8, DDR3_CLK_DP_2, bidir, x, 3, 0, z )," & "466 (BC_8, DDR3_CLK_DN_3, bidir, x, 3, 0, z )," & "467 (BC_8, DDR3_CLK_DN_1, bidir, x, 3, 0, z )," & "468 (BC_8, DDR3_CLK_DP_1, bidir, x, 3, 0, z )," & "469 (BC_8, DDR3_CLK_DP_3, bidir, x, 3, 0, z )," & "470 (BC_8, DDR4_CLK_DN_2, bidir, x, 3, 0, z )," & "471 (BC_8, DDR4_CLK_DN_0, bidir, x, 3, 0, z )," & "472 (BC_8, DDR4_CLK_DP_0, bidir, x, 3, 0, z )," & "473 (BC_8, DDR4_CLK_DP_2, bidir, x, 3, 0, z )," & "474 (BC_8, DDR4_CLK_DN_3, bidir, x, 3, 0, z )," & "475 (BC_8, DDR4_CLK_DN_1, bidir, x, 3, 0, z )," & "476 (BC_8, DDR4_CLK_DP_1, bidir, x, 3, 0, z )," & "477 (BC_8, DDR4_CLK_DP_3, bidir, x, 3, 0, z )," & "478 (BC_8, DDR5_CLK_DN_2, bidir, x, 3, 0, z )," & "479 (BC_8, DDR5_CLK_DN_0, bidir, x, 3, 0, z )," & "480 (BC_8, DDR5_CLK_DP_0, bidir, x, 3, 0, z )," & "481 (BC_8, DDR5_CLK_DP_2, bidir, x, 3, 0, z )," & "482 (BC_8, DDR5_CLK_DN_3, bidir, x, 3, 0, z )," & "483 (BC_8, DDR5_CLK_DN_1, bidir, x, 3, 0, z )," & "484 (BC_8, DDR5_CLK_DP_1, bidir, x, 3, 0, z )," & "485 (BC_8, DDR5_CLK_DP_3, bidir, x, 3, 0, z )," & "486 (BC_0, *, internal, x )," & "487 (BC_0, *, internal, x )," & "488 (BC_0, *, internal, x )," & "489 (BC_0, *, control, 0 )," & "490 (BC_0, *, internal, x )," & "491 (BC_2, DDR012_RESET_N, output3, x, 489, 0, z )," & "492 (BC_2, DDR2_MA_8, output3, x, 489, 0, z )," & "493 (BC_2, DDR2_MA_7, output3, x, 489, 0, z )," & "494 (BC_2, DDR2_MA_5, output3, x, 489, 0, z )," & "495 (BC_2, DDR2_MA_6, output3, x, 489, 0, z )," & "496 (BC_2, DDR2_MA_2, output3, x, 489, 0, z )," & "497 (BC_2, DDR2_MA_4, output3, x, 489, 0, z )," & "498 (BC_2, DDR2_MA_1, output3, x, 489, 0, z )," & "499 (BC_2, DDR2_MA_3, output3, x, 489, 0, z )," & "500 (BC_2, DDR2_PAR, output3, x, 489, 0, z )," & "501 (BC_0, *, internal, x )," & "502 (BC_2, DDR2_DQS_DN_17, output3, x, 489, 0, z )," & "503 (BC_2, DDR2_DQS_DP_17, output3, x, 489, 0, z )," & "504 (BC_8, DDR2_ECC_5, bidir, x, 489, 0, z )," & "505 (BC_8, DDR2_ECC_4, bidir, x, 489, 0, z )," & "506 (BC_8, DDR2_ECC_7, bidir, x, 489, 0, z )," & "507 (BC_8, DDR2_ECC_6, bidir, x, 489, 0, z )," & "508 (BC_2, DDR2_DQS_DN_8, output3, x, 489, 0, z )," & "509 (BC_2, DDR2_DQS_DP_8, output3, x, 489, 0, z )," & "510 (BC_8, DDR2_ECC_3, bidir, x, 489, 0, z )," & "511 (BC_8, DDR2_ECC_2, bidir, x, 489, 0, z )," & "512 (BC_8, DDR2_ECC_1, bidir, x, 489, 0, z )," & "513 (BC_8, DDR2_ECC_0, bidir, x, 489, 0, z )," & "514 (BC_2, DDR2_DQS_DN_11, output3, x, 489, 0, z )," & "515 (BC_2, DDR2_DQS_DP_11, output3, x, 489, 0, z )," & "516 (BC_8, DDR2_DQ_21, bidir, x, 489, 0, z )," & "517 (BC_8, DDR2_DQ_20, bidir, x, 489, 0, z )," & "518 (BC_8, DDR2_DQ_23, bidir, x, 489, 0, z )," & "519 (BC_8, DDR2_DQ_22, bidir, x, 489, 0, z )," & "520 (BC_2, DDR2_DQS_DN_2, output3, x, 489, 0, z )," & "521 (BC_2, DDR2_DQS_DP_2, output3, x, 489, 0, z )," & "522 (BC_8, DDR2_DQ_19, bidir, x, 489, 0, z )," & "523 (BC_8, DDR2_DQ_18, bidir, x, 489, 0, z )," & "524 (BC_8, DDR2_DQ_17, bidir, x, 489, 0, z )," & "525 (BC_8, DDR2_DQ_16, bidir, x, 489, 0, z )," & "526 (BC_2, DDR2_DQS_DN_9, output3, x, 489, 0, z )," & "527 (BC_2, DDR2_DQS_DP_9, output3, x, 489, 0, z )," & "528 (BC_8, DDR2_DQ_5, bidir, x, 489, 0, z )," & "529 (BC_8, DDR2_DQ_4, bidir, x, 489, 0, z )," & "530 (BC_8, DDR2_DQ_7, bidir, x, 489, 0, z )," & "531 (BC_8, DDR2_DQ_6, bidir, x, 489, 0, z )," & "532 (BC_2, DDR2_DQS_DN_0, output3, x, 489, 0, z )," & "533 (BC_2, DDR2_DQS_DP_0, output3, x, 489, 0, z )," & "534 (BC_8, DDR2_DQ_3, bidir, x, 489, 0, z )," & "535 (BC_8, DDR2_DQ_2, bidir, x, 489, 0, z )," & "536 (BC_8, DDR2_DQ_1, bidir, x, 489, 0, z )," & "537 (BC_8, DDR2_DQ_0, bidir, x, 489, 0, z )," & "538 (BC_2, DDR2_DQS_DN_1, output3, x, 489, 0, z )," & "539 (BC_2, DDR2_DQS_DP_1, output3, x, 489, 0, z )," & "540 (BC_8, DDR2_DQ_11, bidir, x, 489, 0, z )," & "541 (BC_8, DDR2_DQ_10, bidir, x, 489, 0, z )," & "542 (BC_8, DDR2_DQ_9, bidir, x, 489, 0, z )," & "543 (BC_8, DDR2_DQ_8, bidir, x, 489, 0, z )," & "544 (BC_2, DDR2_DQS_DN_10, output3, x, 489, 0, z )," & "545 (BC_2, DDR2_DQS_DP_10, output3, x, 489, 0, z )," & "546 (BC_8, DDR2_DQ_13, bidir, x, 489, 0, z )," & "547 (BC_8, DDR2_DQ_12, bidir, x, 489, 0, z )," & "548 (BC_8, DDR2_DQ_15, bidir, x, 489, 0, z )," & "549 (BC_8, DDR2_DQ_14, bidir, x, 489, 0, z )," & "550 (BC_2, DDR2_DQS_DN_3, output3, x, 489, 0, z )," & "551 (BC_2, DDR2_DQS_DP_3, output3, x, 489, 0, z )," & "552 (BC_8, DDR2_DQ_27, bidir, x, 489, 0, z )," & "553 (BC_8, DDR2_DQ_26, bidir, x, 489, 0, z )," & "554 (BC_8, DDR2_DQ_25, bidir, x, 489, 0, z )," & "555 (BC_8, DDR2_DQ_24, bidir, x, 489, 0, z )," & "556 (BC_2, DDR2_DQS_DN_12, output3, x, 489, 0, z )," & "557 (BC_2, DDR2_DQS_DP_12, output3, x, 489, 0, z )," & "558 (BC_8, DDR2_DQ_29, bidir, x, 489, 0, z )," & "559 (BC_8, DDR2_DQ_28, bidir, x, 489, 0, z )," & "560 (BC_8, DDR2_DQ_31, bidir, x, 489, 0, z )," & "561 (BC_8, DDR2_DQ_30, bidir, x, 489, 0, z )," & "562 (BC_8, DDR2_CKE_1, bidir, x, 489, 0, z )," & "563 (BC_2, DDR2_CKE_0, output3, x, 489, 0, z )," & "564 (BC_2, DDR2_CKE_2, output3, x, 489, 0, z )," & "565 (BC_0, *, internal, x )," & "566 (BC_8, DDR2_CKE_3, bidir, x, 489, 0, z )," & "567 (BC_1, DDR2_ALERT_N, input, x )," & "568 (BC_2, DDR2_ACT_N, output3, x, 489, 0, z )," & "569 (BC_2, DDR2_BG_0, output3, x, 489, 0, z )," & "570 (BC_2, DDR2_BG_1, output3, x, 489, 0, z )," & "571 (BC_2, DDR2_MA_11, output3, x, 489, 0, z )," & "572 (BC_2, DDR2_MA_9, output3, x, 489, 0, z )," & "573 (BC_2, DDR2_MA_12, output3, x, 489, 0, z )," & "574 (BC_2, DDR2_CS_N_4, output3, x, 489, 0, z )," & "575 (BC_2, DDR2_ODT_2, output3, x, 489, 0, z )," & "576 (BC_2, DDR2_MA_15, output3, x, 489, 0, z )," & "577 (BC_2, DDR2_MA_13, output3, x, 489, 0, z )," & "578 (BC_2, DDR2_MA_16, output3, x, 489, 0, z )," & "579 (BC_2, DDR2_MA_14, output3, x, 489, 0, z )," & "580 (BC_2, DDR2_MA_10, output3, x, 489, 0, z )," & "581 (BC_2, DDR2_BA_1, output3, x, 489, 0, z )," & "582 (BC_2, DDR2_MA_0, output3, x, 489, 0, z )," & "583 (BC_2, DDR2_BA_0, output3, x, 489, 0, z )," & "584 (BC_2, DDR2_DQS_DN_4, output3, x, 489, 0, z )," & "585 (BC_2, DDR2_DQS_DP_4, output3, x, 489, 0, z )," & "586 (BC_8, DDR2_DQ_35, bidir, x, 489, 0, z )," & "587 (BC_8, DDR2_DQ_34, bidir, x, 489, 0, z )," & "588 (BC_8, DDR2_DQ_33, bidir, x, 489, 0, z )," & "589 (BC_8, DDR2_DQ_32, bidir, x, 489, 0, z )," & "590 (BC_2, DDR2_DQS_DN_13, output3, x, 489, 0, z )," & "591 (BC_2, DDR2_DQS_DP_13, output3, x, 489, 0, z )," & "592 (BC_8, DDR2_DQ_37, bidir, x, 489, 0, z )," & "593 (BC_8, DDR2_DQ_36, bidir, x, 489, 0, z )," & "594 (BC_8, DDR2_DQ_39, bidir, x, 489, 0, z )," & "595 (BC_8, DDR2_DQ_38, bidir, x, 489, 0, z )," & "596 (BC_2, DDR2_DQS_DN_6, output3, x, 489, 0, z )," & "597 (BC_2, DDR2_DQS_DP_6, output3, x, 489, 0, z )," & "598 (BC_8, DDR2_DQ_51, bidir, x, 489, 0, z )," & "599 (BC_8, DDR2_DQ_50, bidir, x, 489, 0, z )," & "600 (BC_8, DDR2_DQ_49, bidir, x, 489, 0, z )," & "601 (BC_8, DDR2_DQ_48, bidir, x, 489, 0, z )," & "602 (BC_2, DDR2_DQS_DN_15, output3, x, 489, 0, z )," & "603 (BC_2, DDR2_DQS_DP_15, output3, x, 489, 0, z )," & "604 (BC_8, DDR2_DQ_53, bidir, x, 489, 0, z )," & "605 (BC_8, DDR2_DQ_52, bidir, x, 489, 0, z )," & "606 (BC_8, DDR2_DQ_55, bidir, x, 489, 0, z )," & "607 (BC_8, DDR2_DQ_54, bidir, x, 489, 0, z )," & "608 (BC_2, DDR2_DQS_DN_16, output3, x, 489, 0, z )," & "609 (BC_2, DDR2_DQS_DP_16, output3, x, 489, 0, z )," & "610 (BC_8, DDR2_DQ_61, bidir, x, 489, 0, z )," & "611 (BC_8, DDR2_DQ_60, bidir, x, 489, 0, z )," & "612 (BC_8, DDR2_DQ_63, bidir, x, 489, 0, z )," & "613 (BC_8, DDR2_DQ_62, bidir, x, 489, 0, z )," & "614 (BC_2, DDR2_DQS_DN_7, output3, x, 489, 0, z )," & "615 (BC_2, DDR2_DQS_DP_7, output3, x, 489, 0, z )," & "616 (BC_8, DDR2_DQ_59, bidir, x, 489, 0, z )," & "617 (BC_8, DDR2_DQ_58, bidir, x, 489, 0, z )," & "618 (BC_8, DDR2_DQ_57, bidir, x, 489, 0, z )," & "619 (BC_8, DDR2_DQ_56, bidir, x, 489, 0, z )," & "620 (BC_2, DDR2_DQS_DN_14, output3, x, 489, 0, z )," & "621 (BC_2, DDR2_DQS_DP_14, output3, x, 489, 0, z )," & "622 (BC_8, DDR2_DQ_45, bidir, x, 489, 0, z )," & "623 (BC_8, DDR2_DQ_44, bidir, x, 489, 0, z )," & "624 (BC_8, DDR2_DQ_47, bidir, x, 489, 0, z )," & "625 (BC_8, DDR2_DQ_46, bidir, x, 489, 0, z )," & "626 (BC_2, DDR2_DQS_DN_5, output3, x, 489, 0, z )," & "627 (BC_2, DDR2_DQS_DP_5, output3, x, 489, 0, z )," & "628 (BC_8, DDR2_DQ_43, bidir, x, 489, 0, z )," & "629 (BC_8, DDR2_DQ_42, bidir, x, 489, 0, z )," & "630 (BC_8, DDR2_DQ_41, bidir, x, 489, 0, z )," & "631 (BC_8, DDR2_DQ_40, bidir, x, 489, 0, z )," & "632 (BC_2, DDR2_CS_N_3, output3, x, 489, 0, z )," & "633 (BC_2, DDR2_CS_N_2, output3, x, 489, 0, z )," & "634 (BC_2, DDR2_CS_N_1, output3, x, 489, 0, z )," & "635 (BC_8, DDR2_ODT_1, bidir, x, 489, 0, z )," & "636 (BC_2, DDR2_CS_N_0, output3, x, 489, 0, z )," & "637 (BC_2, DDR2_ODT_0, output3, x, 489, 0, z )," & "638 (BC_2, DDR2_CS_N_7, output3, x, 489, 0, z )," & "639 (BC_2, DDR2_CS_N_6, output3, x, 489, 0, z )," & "640 (BC_2, DDR2_MA_17, output3, x, 489, 0, z )," & "641 (BC_2, DDR2_C_2, output3, x, 489, 0, z )," & "642 (BC_2, DDR2_CS_N_5, output3, x, 489, 0, z )," & "643 (BC_8, DDR2_ODT_3, bidir, x, 489, 0, z )," & "644 (BC_2, DDR1_CS_N_4, output3, x, 489, 0, z )," & "645 (BC_2, DDR1_ODT_2, output3, x, 489, 0, z )," & "646 (BC_2, DDR1_MA_15, output3, x, 489, 0, z )," & "647 (BC_2, DDR1_MA_13, output3, x, 489, 0, z )," & "648 (BC_2, DDR1_MA_16, output3, x, 489, 0, z )," & "649 (BC_2, DDR1_MA_14, output3, x, 489, 0, z )," & "650 (BC_2, DDR1_MA_10, output3, x, 489, 0, z )," & "651 (BC_2, DDR1_BA_1, output3, x, 489, 0, z )," & "652 (BC_2, DDR1_MA_0, output3, x, 489, 0, z )," & "653 (BC_2, DDR1_BA_0, output3, x, 489, 0, z )," & "654 (BC_2, DDR1_DQS_DN_4, output3, x, 489, 0, z )," & "655 (BC_2, DDR1_DQS_DP_4, output3, x, 489, 0, z )," & "656 (BC_8, DDR1_DQ_35, bidir, x, 489, 0, z )," & "657 (BC_8, DDR1_DQ_34, bidir, x, 489, 0, z )," & "658 (BC_8, DDR1_DQ_33, bidir, x, 489, 0, z )," & "659 (BC_8, DDR1_DQ_32, bidir, x, 489, 0, z )," & "660 (BC_2, DDR1_DQS_DN_13, output3, x, 489, 0, z )," & "661 (BC_2, DDR1_DQS_DP_13, output3, x, 489, 0, z )," & "662 (BC_8, DDR1_DQ_37, bidir, x, 489, 0, z )," & "663 (BC_8, DDR1_DQ_36, bidir, x, 489, 0, z )," & "664 (BC_8, DDR1_DQ_39, bidir, x, 489, 0, z )," & "665 (BC_8, DDR1_DQ_38, bidir, x, 489, 0, z )," & "666 (BC_2, DDR1_DQS_DN_6, output3, x, 489, 0, z )," & "667 (BC_2, DDR1_DQS_DP_6, output3, x, 489, 0, z )," & "668 (BC_8, DDR1_DQ_51, bidir, x, 489, 0, z )," & "669 (BC_8, DDR1_DQ_50, bidir, x, 489, 0, z )," & "670 (BC_8, DDR1_DQ_49, bidir, x, 489, 0, z )," & "671 (BC_8, DDR1_DQ_48, bidir, x, 489, 0, z )," & "672 (BC_2, DDR1_DQS_DN_15, output3, x, 489, 0, z )," & "673 (BC_2, DDR1_DQS_DP_15, output3, x, 489, 0, z )," & "674 (BC_8, DDR1_DQ_53, bidir, x, 489, 0, z )," & "675 (BC_8, DDR1_DQ_52, bidir, x, 489, 0, z )," & "676 (BC_8, DDR1_DQ_55, bidir, x, 489, 0, z )," & "677 (BC_8, DDR1_DQ_54, bidir, x, 489, 0, z )," & "678 (BC_2, DDR1_DQS_DN_16, output3, x, 489, 0, z )," & "679 (BC_2, DDR1_DQS_DP_16, output3, x, 489, 0, z )," & "680 (BC_8, DDR1_DQ_61, bidir, x, 489, 0, z )," & "681 (BC_8, DDR1_DQ_60, bidir, x, 489, 0, z )," & "682 (BC_8, DDR1_DQ_63, bidir, x, 489, 0, z )," & "683 (BC_8, DDR1_DQ_62, bidir, x, 489, 0, z )," & "684 (BC_2, DDR1_DQS_DN_7, output3, x, 489, 0, z )," & "685 (BC_2, DDR1_DQS_DP_7, output3, x, 489, 0, z )," & "686 (BC_8, DDR1_DQ_59, bidir, x, 489, 0, z )," & "687 (BC_8, DDR1_DQ_58, bidir, x, 489, 0, z )," & "688 (BC_8, DDR1_DQ_57, bidir, x, 489, 0, z )," & "689 (BC_8, DDR1_DQ_56, bidir, x, 489, 0, z )," & "690 (BC_2, DDR1_DQS_DN_14, output3, x, 489, 0, z )," & "691 (BC_2, DDR1_DQS_DP_14, output3, x, 489, 0, z )," & "692 (BC_8, DDR1_DQ_45, bidir, x, 489, 0, z )," & "693 (BC_8, DDR1_DQ_44, bidir, x, 489, 0, z )," & "694 (BC_8, DDR1_DQ_47, bidir, x, 489, 0, z )," & "695 (BC_8, DDR1_DQ_46, bidir, x, 489, 0, z )," & "696 (BC_2, DDR1_DQS_DN_5, output3, x, 489, 0, z )," & "697 (BC_2, DDR1_DQS_DP_5, output3, x, 489, 0, z )," & "698 (BC_8, DDR1_DQ_43, bidir, x, 489, 0, z )," & "699 (BC_8, DDR1_DQ_42, bidir, x, 489, 0, z )," & "700 (BC_8, DDR1_DQ_41, bidir, x, 489, 0, z )," & "701 (BC_8, DDR1_DQ_40, bidir, x, 489, 0, z )," & "702 (BC_2, DDR1_CS_N_3, output3, x, 489, 0, z )," & "703 (BC_2, DDR1_CS_N_2, output3, x, 489, 0, z )," & "704 (BC_2, DDR1_CS_N_1, output3, x, 489, 0, z )," & "705 (BC_8, DDR1_ODT_1, bidir, x, 489, 0, z )," & "706 (BC_2, DDR1_CS_N_0, output3, x, 489, 0, z )," & "707 (BC_2, DDR1_ODT_0, output3, x, 489, 0, z )," & "708 (BC_2, DDR1_CS_N_7, output3, x, 489, 0, z )," & "709 (BC_2, DDR1_CS_N_6, output3, x, 489, 0, z )," & "710 (BC_2, DDR1_MA_17, output3, x, 489, 0, z )," & "711 (BC_2, DDR1_C_2, output3, x, 489, 0, z )," & "712 (BC_2, DDR1_CS_N_5, output3, x, 489, 0, z )," & "713 (BC_8, DDR1_ODT_3, bidir, x, 489, 0, z )," & "714 (BC_2, DDR1_MA_8, output3, x, 489, 0, z )," & "715 (BC_2, DDR1_MA_7, output3, x, 489, 0, z )," & "716 (BC_2, DDR1_MA_5, output3, x, 489, 0, z )," & "717 (BC_2, DDR1_MA_6, output3, x, 489, 0, z )," & "718 (BC_2, DDR1_MA_2, output3, x, 489, 0, z )," & "719 (BC_2, DDR1_MA_4, output3, x, 489, 0, z )," & "720 (BC_2, DDR1_MA_1, output3, x, 489, 0, z )," & "721 (BC_2, DDR1_MA_3, output3, x, 489, 0, z )," & "722 (BC_2, DDR1_PAR, output3, x, 489, 0, z )," & "723 (BC_0, *, internal, x )," & "724 (BC_2, DDR1_DQS_DN_17, output3, x, 489, 0, z )," & "725 (BC_2, DDR1_DQS_DP_17, output3, x, 489, 0, z )," & "726 (BC_8, DDR1_ECC_5, bidir, x, 489, 0, z )," & "727 (BC_8, DDR1_ECC_4, bidir, x, 489, 0, z )," & "728 (BC_8, DDR1_ECC_7, bidir, x, 489, 0, z )," & "729 (BC_8, DDR1_ECC_6, bidir, x, 489, 0, z )," & "730 (BC_2, DDR1_DQS_DN_8, output3, x, 489, 0, z )," & "731 (BC_2, DDR1_DQS_DP_8, output3, x, 489, 0, z )," & "732 (BC_8, DDR1_ECC_3, bidir, x, 489, 0, z )," & "733 (BC_8, DDR1_ECC_2, bidir, x, 489, 0, z )," & "734 (BC_8, DDR1_ECC_1, bidir, x, 489, 0, z )," & "735 (BC_8, DDR1_ECC_0, bidir, x, 489, 0, z )," & "736 (BC_2, DDR1_DQS_DN_11, output3, x, 489, 0, z )," & "737 (BC_2, DDR1_DQS_DP_11, output3, x, 489, 0, z )," & "738 (BC_8, DDR1_DQ_21, bidir, x, 489, 0, z )," & "739 (BC_8, DDR1_DQ_20, bidir, x, 489, 0, z )," & "740 (BC_8, DDR1_DQ_23, bidir, x, 489, 0, z )," & "741 (BC_8, DDR1_DQ_22, bidir, x, 489, 0, z )," & "742 (BC_2, DDR1_DQS_DN_2, output3, x, 489, 0, z )," & "743 (BC_2, DDR1_DQS_DP_2, output3, x, 489, 0, z )," & "744 (BC_8, DDR1_DQ_19, bidir, x, 489, 0, z )," & "745 (BC_8, DDR1_DQ_18, bidir, x, 489, 0, z )," & "746 (BC_8, DDR1_DQ_17, bidir, x, 489, 0, z )," & "747 (BC_8, DDR1_DQ_16, bidir, x, 489, 0, z )," & "748 (BC_2, DDR1_DQS_DN_9, output3, x, 489, 0, z )," & "749 (BC_2, DDR1_DQS_DP_9, output3, x, 489, 0, z )," & "750 (BC_8, DDR1_DQ_5, bidir, x, 489, 0, z )," & "751 (BC_8, DDR1_DQ_4, bidir, x, 489, 0, z )," & "752 (BC_8, DDR1_DQ_7, bidir, x, 489, 0, z )," & "753 (BC_8, DDR1_DQ_6, bidir, x, 489, 0, z )," & "754 (BC_2, DDR1_DQS_DN_0, output3, x, 489, 0, z )," & "755 (BC_2, DDR1_DQS_DP_0, output3, x, 489, 0, z )," & "756 (BC_8, DDR1_DQ_3, bidir, x, 489, 0, z )," & "757 (BC_8, DDR1_DQ_2, bidir, x, 489, 0, z )," & "758 (BC_8, DDR1_DQ_1, bidir, x, 489, 0, z )," & "759 (BC_8, DDR1_DQ_0, bidir, x, 489, 0, z )," & "760 (BC_2, DDR1_DQS_DN_1, output3, x, 489, 0, z )," & "761 (BC_2, DDR1_DQS_DP_1, output3, x, 489, 0, z )," & "762 (BC_8, DDR1_DQ_11, bidir, x, 489, 0, z )," & "763 (BC_8, DDR1_DQ_10, bidir, x, 489, 0, z )," & "764 (BC_8, DDR1_DQ_9, bidir, x, 489, 0, z )," & "765 (BC_8, DDR1_DQ_8, bidir, x, 489, 0, z )," & "766 (BC_2, DDR1_DQS_DN_10, output3, x, 489, 0, z )," & "767 (BC_2, DDR1_DQS_DP_10, output3, x, 489, 0, z )," & "768 (BC_8, DDR1_DQ_13, bidir, x, 489, 0, z )," & "769 (BC_8, DDR1_DQ_12, bidir, x, 489, 0, z )," & "770 (BC_8, DDR1_DQ_15, bidir, x, 489, 0, z )," & "771 (BC_8, DDR1_DQ_14, bidir, x, 489, 0, z )," & "772 (BC_2, DDR1_DQS_DN_3, output3, x, 489, 0, z )," & "773 (BC_2, DDR1_DQS_DP_3, output3, x, 489, 0, z )," & "774 (BC_8, DDR1_DQ_27, bidir, x, 489, 0, z )," & "775 (BC_8, DDR1_DQ_26, bidir, x, 489, 0, z )," & "776 (BC_8, DDR1_DQ_25, bidir, x, 489, 0, z )," & "777 (BC_8, DDR1_DQ_24, bidir, x, 489, 0, z )," & "778 (BC_2, DDR1_DQS_DN_12, output3, x, 489, 0, z )," & "779 (BC_2, DDR1_DQS_DP_12, output3, x, 489, 0, z )," & "780 (BC_8, DDR1_DQ_29, bidir, x, 489, 0, z )," & "781 (BC_8, DDR1_DQ_28, bidir, x, 489, 0, z )," & "782 (BC_8, DDR1_DQ_31, bidir, x, 489, 0, z )," & "783 (BC_8, DDR1_DQ_30, bidir, x, 489, 0, z )," & "784 (BC_8, DDR1_CKE_1, bidir, x, 489, 0, z )," & "785 (BC_2, DDR1_CKE_0, output3, x, 489, 0, z )," & "786 (BC_2, DDR1_CKE_2, output3, x, 489, 0, z )," & "787 (BC_0, *, internal, x )," & "788 (BC_8, DDR1_CKE_3, bidir, x, 489, 0, z )," & "789 (BC_1, DDR1_ALERT_N, input, x )," & "790 (BC_2, DDR1_ACT_N, output3, x, 489, 0, z )," & "791 (BC_2, DDR1_BG_0, output3, x, 489, 0, z )," & "792 (BC_2, DDR1_BG_1, output3, x, 489, 0, z )," & "793 (BC_2, DDR1_MA_11, output3, x, 489, 0, z )," & "794 (BC_2, DDR1_MA_9, output3, x, 489, 0, z )," & "795 (BC_2, DDR1_MA_12, output3, x, 489, 0, z )," & "796 (BC_2, DDR0_MA_8, output3, x, 489, 0, z )," & "797 (BC_2, DDR0_MA_7, output3, x, 489, 0, z )," & "798 (BC_2, DDR0_MA_5, output3, x, 489, 0, z )," & "799 (BC_2, DDR0_MA_6, output3, x, 489, 0, z )," & "800 (BC_2, DDR0_MA_2, output3, x, 489, 0, z )," & "801 (BC_2, DDR0_MA_4, output3, x, 489, 0, z )," & "802 (BC_2, DDR0_MA_1, output3, x, 489, 0, z )," & "803 (BC_2, DDR0_MA_3, output3, x, 489, 0, z )," & "804 (BC_2, DDR0_PAR, output3, x, 489, 0, z )," & "805 (BC_0, *, internal, x )," & "806 (BC_2, DDR0_DQS_DN_17, output3, x, 489, 0, z )," & "807 (BC_2, DDR0_DQS_DP_17, output3, x, 489, 0, z )," & "808 (BC_8, DDR0_ECC_5, bidir, x, 489, 0, z )," & "809 (BC_8, DDR0_ECC_4, bidir, x, 489, 0, z )," & "810 (BC_8, DDR0_ECC_7, bidir, x, 489, 0, z )," & "811 (BC_8, DDR0_ECC_6, bidir, x, 489, 0, z )," & "812 (BC_2, DDR0_DQS_DN_8, output3, x, 489, 0, z )," & "813 (BC_2, DDR0_DQS_DP_8, output3, x, 489, 0, z )," & "814 (BC_8, DDR0_ECC_3, bidir, x, 489, 0, z )," & "815 (BC_8, DDR0_ECC_2, bidir, x, 489, 0, z )," & "816 (BC_8, DDR0_ECC_1, bidir, x, 489, 0, z )," & "817 (BC_8, DDR0_ECC_0, bidir, x, 489, 0, z )," & "818 (BC_2, DDR0_DQS_DN_11, output3, x, 489, 0, z )," & "819 (BC_2, DDR0_DQS_DP_11, output3, x, 489, 0, z )," & "820 (BC_8, DDR0_DQ_21, bidir, x, 489, 0, z )," & "821 (BC_8, DDR0_DQ_20, bidir, x, 489, 0, z )," & "822 (BC_8, DDR0_DQ_23, bidir, x, 489, 0, z )," & "823 (BC_8, DDR0_DQ_22, bidir, x, 489, 0, z )," & "824 (BC_2, DDR0_DQS_DN_2, output3, x, 489, 0, z )," & "825 (BC_2, DDR0_DQS_DP_2, output3, x, 489, 0, z )," & "826 (BC_8, DDR0_DQ_19, bidir, x, 489, 0, z )," & "827 (BC_8, DDR0_DQ_18, bidir, x, 489, 0, z )," & "828 (BC_8, DDR0_DQ_17, bidir, x, 489, 0, z )," & "829 (BC_8, DDR0_DQ_16, bidir, x, 489, 0, z )," & "830 (BC_2, DDR0_DQS_DN_9, output3, x, 489, 0, z )," & "831 (BC_2, DDR0_DQS_DP_9, output3, x, 489, 0, z )," & "832 (BC_8, DDR0_DQ_5, bidir, x, 489, 0, z )," & "833 (BC_8, DDR0_DQ_4, bidir, x, 489, 0, z )," & "834 (BC_8, DDR0_DQ_7, bidir, x, 489, 0, z )," & "835 (BC_8, DDR0_DQ_6, bidir, x, 489, 0, z )," & "836 (BC_2, DDR0_DQS_DN_0, output3, x, 489, 0, z )," & "837 (BC_2, DDR0_DQS_DP_0, output3, x, 489, 0, z )," & "838 (BC_8, DDR0_DQ_3, bidir, x, 489, 0, z )," & "839 (BC_8, DDR0_DQ_2, bidir, x, 489, 0, z )," & "840 (BC_8, DDR0_DQ_1, bidir, x, 489, 0, z )," & "841 (BC_8, DDR0_DQ_0, bidir, x, 489, 0, z )," & "842 (BC_2, DDR0_DQS_DN_1, output3, x, 489, 0, z )," & "843 (BC_2, DDR0_DQS_DP_1, output3, x, 489, 0, z )," & "844 (BC_8, DDR0_DQ_11, bidir, x, 489, 0, z )," & "845 (BC_8, DDR0_DQ_10, bidir, x, 489, 0, z )," & "846 (BC_8, DDR0_DQ_9, bidir, x, 489, 0, z )," & "847 (BC_8, DDR0_DQ_8, bidir, x, 489, 0, z )," & "848 (BC_2, DDR0_DQS_DN_10, output3, x, 489, 0, z )," & "849 (BC_2, DDR0_DQS_DP_10, output3, x, 489, 0, z )," & "850 (BC_8, DDR0_DQ_13, bidir, x, 489, 0, z )," & "851 (BC_8, DDR0_DQ_12, bidir, x, 489, 0, z )," & "852 (BC_8, DDR0_DQ_15, bidir, x, 489, 0, z )," & "853 (BC_8, DDR0_DQ_14, bidir, x, 489, 0, z )," & "854 (BC_2, DDR0_DQS_DN_3, output3, x, 489, 0, z )," & "855 (BC_2, DDR0_DQS_DP_3, output3, x, 489, 0, z )," & "856 (BC_8, DDR0_DQ_27, bidir, x, 489, 0, z )," & "857 (BC_8, DDR0_DQ_26, bidir, x, 489, 0, z )," & "858 (BC_8, DDR0_DQ_25, bidir, x, 489, 0, z )," & "859 (BC_8, DDR0_DQ_24, bidir, x, 489, 0, z )," & "860 (BC_2, DDR0_DQS_DN_12, output3, x, 489, 0, z )," & "861 (BC_2, DDR0_DQS_DP_12, output3, x, 489, 0, z )," & "862 (BC_8, DDR0_DQ_29, bidir, x, 489, 0, z )," & "863 (BC_8, DDR0_DQ_28, bidir, x, 489, 0, z )," & "864 (BC_8, DDR0_DQ_31, bidir, x, 489, 0, z )," & "865 (BC_8, DDR0_DQ_30, bidir, x, 489, 0, z )," & "866 (BC_8, DDR0_CKE_1, bidir, x, 489, 0, z )," & "867 (BC_2, DDR0_CKE_0, output3, x, 489, 0, z )," & "868 (BC_2, DDR0_CKE_2, output3, x, 489, 0, z )," & "869 (BC_0, *, internal, x )," & "870 (BC_8, DDR0_CKE_3, bidir, x, 489, 0, z )," & "871 (BC_1, DDR0_ALERT_N, input, x )," & "872 (BC_2, DDR0_ACT_N, output3, x, 489, 0, z )," & "873 (BC_2, DDR0_BG_0, output3, x, 489, 0, z )," & "874 (BC_2, DDR0_BG_1, output3, x, 489, 0, z )," & "875 (BC_2, DDR0_MA_11, output3, x, 489, 0, z )," & "876 (BC_2, DDR0_MA_9, output3, x, 489, 0, z )," & "877 (BC_2, DDR0_MA_12, output3, x, 489, 0, z )," & "878 (BC_2, DDR0_CS_N_4, output3, x, 489, 0, z )," & "879 (BC_2, DDR0_ODT_2, output3, x, 489, 0, z )," & "880 (BC_2, DDR0_MA_15, output3, x, 489, 0, z )," & "881 (BC_2, DDR0_MA_13, output3, x, 489, 0, z )," & "882 (BC_2, DDR0_MA_16, output3, x, 489, 0, z )," & "883 (BC_2, DDR0_MA_14, output3, x, 489, 0, z )," & "884 (BC_2, DDR0_MA_10, output3, x, 489, 0, z )," & "885 (BC_2, DDR0_BA_1, output3, x, 489, 0, z )," & "886 (BC_2, DDR0_MA_0, output3, x, 489, 0, z )," & "887 (BC_2, DDR0_BA_0, output3, x, 489, 0, z )," & "888 (BC_2, DDR0_DQS_DN_4, output3, x, 489, 0, z )," & "889 (BC_2, DDR0_DQS_DP_4, output3, x, 489, 0, z )," & "890 (BC_8, DDR0_DQ_35, bidir, x, 489, 0, z )," & "891 (BC_8, DDR0_DQ_34, bidir, x, 489, 0, z )," & "892 (BC_8, DDR0_DQ_33, bidir, x, 489, 0, z )," & "893 (BC_8, DDR0_DQ_32, bidir, x, 489, 0, z )," & "894 (BC_2, DDR0_DQS_DN_13, output3, x, 489, 0, z )," & "895 (BC_2, DDR0_DQS_DP_13, output3, x, 489, 0, z )," & "896 (BC_8, DDR0_DQ_37, bidir, x, 489, 0, z )," & "897 (BC_8, DDR0_DQ_36, bidir, x, 489, 0, z )," & "898 (BC_8, DDR0_DQ_39, bidir, x, 489, 0, z )," & "899 (BC_8, DDR0_DQ_38, bidir, x, 489, 0, z )," & "900 (BC_2, DDR0_DQS_DN_6, output3, x, 489, 0, z )," & "901 (BC_2, DDR0_DQS_DP_6, output3, x, 489, 0, z )," & "902 (BC_8, DDR0_DQ_51, bidir, x, 489, 0, z )," & "903 (BC_8, DDR0_DQ_50, bidir, x, 489, 0, z )," & "904 (BC_8, DDR0_DQ_49, bidir, x, 489, 0, z )," & "905 (BC_8, DDR0_DQ_48, bidir, x, 489, 0, z )," & "906 (BC_2, DDR0_DQS_DN_15, output3, x, 489, 0, z )," & "907 (BC_2, DDR0_DQS_DP_15, output3, x, 489, 0, z )," & "908 (BC_8, DDR0_DQ_53, bidir, x, 489, 0, z )," & "909 (BC_8, DDR0_DQ_52, bidir, x, 489, 0, z )," & "910 (BC_8, DDR0_DQ_55, bidir, x, 489, 0, z )," & "911 (BC_8, DDR0_DQ_54, bidir, x, 489, 0, z )," & "912 (BC_2, DDR0_DQS_DN_16, output3, x, 489, 0, z )," & "913 (BC_2, DDR0_DQS_DP_16, output3, x, 489, 0, z )," & "914 (BC_8, DDR0_DQ_61, bidir, x, 489, 0, z )," & "915 (BC_8, DDR0_DQ_60, bidir, x, 489, 0, z )," & "916 (BC_8, DDR0_DQ_63, bidir, x, 489, 0, z )," & "917 (BC_8, DDR0_DQ_62, bidir, x, 489, 0, z )," & "918 (BC_2, DDR0_DQS_DN_7, output3, x, 489, 0, z )," & "919 (BC_2, DDR0_DQS_DP_7, output3, x, 489, 0, z )," & "920 (BC_8, DDR0_DQ_59, bidir, x, 489, 0, z )," & "921 (BC_8, DDR0_DQ_58, bidir, x, 489, 0, z )," & "922 (BC_8, DDR0_DQ_57, bidir, x, 489, 0, z )," & "923 (BC_8, DDR0_DQ_56, bidir, x, 489, 0, z )," & "924 (BC_2, DDR0_DQS_DN_14, output3, x, 489, 0, z )," & "925 (BC_2, DDR0_DQS_DP_14, output3, x, 489, 0, z )," & "926 (BC_8, DDR0_DQ_45, bidir, x, 489, 0, z )," & "927 (BC_8, DDR0_DQ_44, bidir, x, 489, 0, z )," & "928 (BC_8, DDR0_DQ_47, bidir, x, 489, 0, z )," & "929 (BC_8, DDR0_DQ_46, bidir, x, 489, 0, z )," & "930 (BC_2, DDR0_DQS_DN_5, output3, x, 489, 0, z )," & "931 (BC_2, DDR0_DQS_DP_5, output3, x, 489, 0, z )," & "932 (BC_8, DDR0_DQ_43, bidir, x, 489, 0, z )," & "933 (BC_8, DDR0_DQ_42, bidir, x, 489, 0, z )," & "934 (BC_8, DDR0_DQ_41, bidir, x, 489, 0, z )," & "935 (BC_8, DDR0_DQ_40, bidir, x, 489, 0, z )," & "936 (BC_2, DDR0_CS_N_3, output3, x, 489, 0, z )," & "937 (BC_2, DDR0_CS_N_2, output3, x, 489, 0, z )," & "938 (BC_2, DDR0_CS_N_1, output3, x, 489, 0, z )," & "939 (BC_8, DDR0_ODT_1, bidir, x, 489, 0, z )," & "940 (BC_2, DDR0_CS_N_0, output3, x, 489, 0, z )," & "941 (BC_2, DDR0_ODT_0, output3, x, 489, 0, z )," & "942 (BC_2, DDR0_CS_N_7, output3, x, 489, 0, z )," & "943 (BC_2, DDR0_CS_N_6, output3, x, 489, 0, z )," & "944 (BC_2, DDR0_MA_17, output3, x, 489, 0, z )," & "945 (BC_2, DDR0_C_2, output3, x, 489, 0, z )," & "946 (BC_2, DDR0_CS_N_5, output3, x, 489, 0, z )," & "947 (BC_8, DDR0_ODT_3, bidir, x, 489, 0, z )," & "948 (BC_8, DDR0_CLK_DN_2, bidir, x, 489, 0, z )," & "949 (BC_8, DDR0_CLK_DN_0, bidir, x, 489, 0, z )," & "950 (BC_8, DDR0_CLK_DP_0, bidir, x, 489, 0, z )," & "951 (BC_8, DDR0_CLK_DP_2, bidir, x, 489, 0, z )," & "952 (BC_8, DDR0_CLK_DN_3, bidir, x, 489, 0, z )," & "953 (BC_8, DDR0_CLK_DN_1, bidir, x, 489, 0, z )," & "954 (BC_8, DDR0_CLK_DP_1, bidir, x, 489, 0, z )," & "955 (BC_8, DDR0_CLK_DP_3, bidir, x, 489, 0, z )," & "956 (BC_8, DDR1_CLK_DN_2, bidir, x, 489, 0, z )," & "957 (BC_8, DDR1_CLK_DN_0, bidir, x, 489, 0, z )," & "958 (BC_8, DDR1_CLK_DP_0, bidir, x, 489, 0, z )," & "959 (BC_8, DDR1_CLK_DP_2, bidir, x, 489, 0, z )," & "960 (BC_8, DDR1_CLK_DN_3, bidir, x, 489, 0, z )," & "961 (BC_8, DDR1_CLK_DN_1, bidir, x, 489, 0, z )," & "962 (BC_8, DDR1_CLK_DP_1, bidir, x, 489, 0, z )," & "963 (BC_8, DDR1_CLK_DP_3, bidir, x, 489, 0, z )," & "964 (BC_8, DDR2_CLK_DN_2, bidir, x, 489, 0, z )," & "965 (BC_8, DDR2_CLK_DN_0, bidir, x, 489, 0, z )," & "966 (BC_8, DDR2_CLK_DP_0, bidir, x, 489, 0, z )," & "967 (BC_8, DDR2_CLK_DP_2, bidir, x, 489, 0, z )," & "968 (BC_8, DDR2_CLK_DN_3, bidir, x, 489, 0, z )," & "969 (BC_8, DDR2_CLK_DN_1, bidir, x, 489, 0, z )," & "970 (BC_8, DDR2_CLK_DP_1, bidir, x, 489, 0, z )," & "971 (BC_8, DDR2_CLK_DP_3, bidir, x, 489, 0, z )," & "972 (BC_0, *, internal, x )," & "973 (BC_0, *, internal, x )," & "974 (BC_0, *, internal, x )," & "975 (BC_0, *, internal, x )," & "976 (BC_1, PE3_RX_DN_1, input, x )," & "977 (BC_1, PE3_RX_DP_1, input, x )," & "978 (BC_1, PE3_RX_DN_0, input, x )," & "979 (BC_1, PE3_RX_DP_0, input, x )," & "980 (BC_1, PE3_RX_DN_3, input, x )," & "981 (BC_1, PE3_RX_DP_3, input, x )," & "982 (BC_1, PE3_RX_DN_2, input, x )," & "983 (BC_1, PE3_RX_DP_2, input, x )," & "984 (BC_1, PE3_RX_DN_5, input, x )," & "985 (BC_1, PE3_RX_DP_5, input, x )," & "986 (BC_1, PE3_RX_DN_4, input, x )," & "987 (BC_1, PE3_RX_DP_4, input, x )," & "988 (BC_1, PE3_RX_DN_7, input, x )," & "989 (BC_1, PE3_RX_DP_7, input, x )," & "990 (BC_1, PE3_RX_DN_6, input, x )," & "991 (BC_1, PE3_RX_DP_6, input, x )," & "992 (BC_1, PE3_RX_DN_9, input, x )," & "993 (BC_1, PE3_RX_DP_9, input, x )," & "994 (BC_1, PE3_RX_DN_8, input, x )," & "995 (BC_1, PE3_RX_DP_8, input, x )," & "996 (BC_1, PE3_RX_DN_11, input, x )," & "997 (BC_1, PE3_RX_DP_11, input, x )," & "998 (BC_1, PE3_RX_DN_10, input, x )," & "999 (BC_1, PE3_RX_DP_10, input, x )," & "1000 (BC_1, PE3_RX_DN_13, input, x )," & "1001 (BC_1, PE3_RX_DP_13, input, x )," & "1002 (BC_1, PE3_RX_DN_12, input, x )," & "1003 (BC_1, PE3_RX_DP_12, input, x )," & "1004 (BC_1, PE3_RX_DN_15, input, x )," & "1005 (BC_1, PE3_RX_DP_15, input, x )," & "1006 (BC_1, PE3_RX_DN_14, input, x )," & "1007 (BC_1, PE3_RX_DP_14, input, x )," & "1008 (BC_1, *, internal, x )," & "1009 (AC_1, PE3_TX_DP_14, output2, x )," & "1010 (BC_1, *, internal, x )," & "1011 (AC_1, PE3_TX_DP_15, output2, x )," & "1012 (BC_1, *, internal, x )," & "1013 (AC_1, PE3_TX_DP_12, output2, x )," & "1014 (BC_1, *, internal, x )," & "1015 (AC_1, PE3_TX_DP_13, output2, x )," & "1016 (BC_1, *, internal, x )," & "1017 (AC_1, PE3_TX_DP_10, output2, x )," & "1018 (BC_1, *, internal, x )," & "1019 (AC_1, PE3_TX_DP_11, output2, x )," & "1020 (BC_1, *, internal, x )," & "1021 (AC_1, PE3_TX_DP_8, output2, x )," & "1022 (BC_1, *, internal, x )," & "1023 (AC_1, PE3_TX_DP_9, output2, x )," & "1024 (BC_1, *, internal, x )," & "1025 (AC_1, PE3_TX_DP_6, output2, x )," & "1026 (BC_1, *, internal, x )," & "1027 (AC_1, PE3_TX_DP_7, output2, x )," & "1028 (BC_1, *, internal, x )," & "1029 (AC_1, PE3_TX_DP_4, output2, x )," & "1030 (BC_1, *, internal, x )," & "1031 (AC_1, PE3_TX_DP_5, output2, x )," & "1032 (BC_1, *, internal, x )," & "1033 (AC_1, PE3_TX_DP_2, output2, x )," & "1034 (BC_1, *, internal, x )," & "1035 (AC_1, PE3_TX_DP_3, output2, x )," & "1036 (BC_1, *, internal, x )," & "1037 (AC_1, PE3_TX_DP_0, output2, x )," & "1038 (BC_1, *, internal, x )," & "1039 (AC_1, PE3_TX_DP_1, output2, x )," & "1040 (BC_0, *, internal, x )," & "1041 (BC_0, *, internal, x )," & "1042 (BC_0, *, internal, x )," & "1043 (BC_0, *, internal, x )," & "1044 (BC_1, PE2_RX_DN_1, input, x )," & "1045 (BC_1, PE2_RX_DP_1, input, x )," & "1046 (BC_1, PE2_RX_DN_0, input, x )," & "1047 (BC_1, PE2_RX_DP_0, input, x )," & "1048 (BC_1, PE2_RX_DN_3, input, x )," & "1049 (BC_1, PE2_RX_DP_3, input, x )," & "1050 (BC_1, PE2_RX_DN_2, input, x )," & "1051 (BC_1, PE2_RX_DP_2, input, x )," & "1052 (BC_1, PE2_RX_DN_5, input, x )," & "1053 (BC_1, PE2_RX_DP_5, input, x )," & "1054 (BC_1, PE2_RX_DN_4, input, x )," & "1055 (BC_1, PE2_RX_DP_4, input, x )," & "1056 (BC_1, PE2_RX_DN_7, input, x )," & "1057 (BC_1, PE2_RX_DP_7, input, x )," & "1058 (BC_1, PE2_RX_DN_6, input, x )," & "1059 (BC_1, PE2_RX_DP_6, input, x )," & "1060 (BC_1, PE2_RX_DN_9, input, x )," & "1061 (BC_1, PE2_RX_DP_9, input, x )," & "1062 (BC_1, PE2_RX_DN_8, input, x )," & "1063 (BC_1, PE2_RX_DP_8, input, x )," & "1064 (BC_1, PE2_RX_DN_11, input, x )," & "1065 (BC_1, PE2_RX_DP_11, input, x )," & "1066 (BC_1, PE2_RX_DN_10, input, x )," & "1067 (BC_1, PE2_RX_DP_10, input, x )," & "1068 (BC_1, PE2_RX_DN_13, input, x )," & "1069 (BC_1, PE2_RX_DP_13, input, x )," & "1070 (BC_1, PE2_RX_DN_12, input, x )," & "1071 (BC_1, PE2_RX_DP_12, input, x )," & "1072 (BC_1, PE2_RX_DN_15, input, x )," & "1073 (BC_1, PE2_RX_DP_15, input, x )," & "1074 (BC_1, PE2_RX_DN_14, input, x )," & "1075 (BC_1, PE2_RX_DP_14, input, x )," & "1076 (BC_1, *, internal, x )," & "1077 (AC_1, PE2_TX_DP_14, output2, x )," & "1078 (BC_1, *, internal, x )," & "1079 (AC_1, PE2_TX_DP_15, output2, x )," & "1080 (BC_1, *, internal, x )," & "1081 (AC_1, PE2_TX_DP_12, output2, x )," & "1082 (BC_1, *, internal, x )," & "1083 (AC_1, PE2_TX_DP_13, output2, x )," & "1084 (BC_1, *, internal, x )," & "1085 (AC_1, PE2_TX_DP_10, output2, x )," & "1086 (BC_1, *, internal, x )," & "1087 (AC_1, PE2_TX_DP_11, output2, x )," & "1088 (BC_1, *, internal, x )," & "1089 (AC_1, PE2_TX_DP_8, output2, x )," & "1090 (BC_1, *, internal, x )," & "1091 (AC_1, PE2_TX_DP_9, output2, x )," & "1092 (BC_1, *, internal, x )," & "1093 (AC_1, PE2_TX_DP_6, output2, x )," & "1094 (BC_1, *, internal, x )," & "1095 (AC_1, PE2_TX_DP_7, output2, x )," & "1096 (BC_1, *, internal, x )," & "1097 (AC_1, PE2_TX_DP_4, output2, x )," & "1098 (BC_1, *, internal, x )," & "1099 (AC_1, PE2_TX_DP_5, output2, x )," & "1100 (BC_1, *, internal, x )," & "1101 (AC_1, PE2_TX_DP_2, output2, x )," & "1102 (BC_1, *, internal, x )," & "1103 (AC_1, PE2_TX_DP_3, output2, x )," & "1104 (BC_1, *, internal, x )," & "1105 (AC_1, PE2_TX_DP_0, output2, x )," & "1106 (BC_1, *, internal, x )," & "1107 (AC_1, PE2_TX_DP_1, output2, x )," & "1108 (BC_1, PE1_RX_DN_1, input, x )," & "1109 (BC_1, PE1_RX_DP_1, input, x )," & "1110 (BC_1, PE1_RX_DN_0, input, x )," & "1111 (BC_1, PE1_RX_DP_0, input, x )," & "1112 (BC_1, PE1_RX_DN_3, input, x )," & "1113 (BC_1, PE1_RX_DP_3, input, x )," & "1114 (BC_1, PE1_RX_DN_2, input, x )," & "1115 (BC_1, PE1_RX_DP_2, input, x )," & "1116 (BC_1, PE1_RX_DN_5, input, x )," & "1117 (BC_1, PE1_RX_DP_5, input, x )," & "1118 (BC_1, PE1_RX_DN_4, input, x )," & "1119 (BC_1, PE1_RX_DP_4, input, x )," & "1120 (BC_1, PE1_RX_DN_7, input, x )," & "1121 (BC_1, PE1_RX_DP_7, input, x )," & "1122 (BC_1, PE1_RX_DN_6, input, x )," & "1123 (BC_1, PE1_RX_DP_6, input, x )," & "1124 (BC_1, PE1_RX_DN_9, input, x )," & "1125 (BC_1, PE1_RX_DP_9, input, x )," & "1126 (BC_1, PE1_RX_DN_8, input, x )," & "1127 (BC_1, PE1_RX_DP_8, input, x )," & "1128 (BC_1, PE1_RX_DN_11, input, x )," & "1129 (BC_1, PE1_RX_DP_11, input, x )," & "1130 (BC_1, PE1_RX_DN_10, input, x )," & "1131 (BC_1, PE1_RX_DP_10, input, x )," & "1132 (BC_1, PE1_RX_DN_13, input, x )," & "1133 (BC_1, PE1_RX_DP_13, input, x )," & "1134 (BC_1, PE1_RX_DN_12, input, x )," & "1135 (BC_1, PE1_RX_DP_12, input, x )," & "1136 (BC_1, PE1_RX_DN_15, input, x )," & "1137 (BC_1, PE1_RX_DP_15, input, x )," & "1138 (BC_1, PE1_RX_DN_14, input, x )," & "1139 (BC_1, PE1_RX_DP_14, input, x )," & "1140 (BC_1, DMI_RX_DN_1, input, x )," & "1141 (BC_1, DMI_RX_DP_1, input, x )," & "1142 (BC_1, DMI_RX_DN_0, input, x )," & "1143 (BC_1, DMI_RX_DP_0, input, x )," & "1144 (BC_1, DMI_RX_DN_3, input, x )," & "1145 (BC_1, DMI_RX_DP_3, input, x )," & "1146 (BC_1, DMI_RX_DN_2, input, x )," & "1147 (BC_1, DMI_RX_DP_2, input, x )," & "1148 (BC_1, *, internal, x )," & "1149 (AC_1, DMI_TX_DP_2, output2, x )," & "1150 (BC_1, *, internal, x )," & "1151 (AC_1, DMI_TX_DP_3, output2, x )," & "1152 (BC_1, *, internal, x )," & "1153 (AC_1, DMI_TX_DP_0, output2, x )," & "1154 (BC_1, *, internal, x )," & "1155 (AC_1, DMI_TX_DP_1, output2, x )," & "1156 (BC_1, *, internal, x )," & "1157 (AC_1, PE1_TX_DP_14, output2, x )," & "1158 (BC_1, *, internal, x )," & "1159 (AC_1, PE1_TX_DP_15, output2, x )," & "1160 (BC_1, *, internal, x )," & "1161 (AC_1, PE1_TX_DP_12, output2, x )," & "1162 (BC_1, *, internal, x )," & "1163 (AC_1, PE1_TX_DP_13, output2, x )," & "1164 (BC_1, *, internal, x )," & "1165 (AC_1, PE1_TX_DP_10, output2, x )," & "1166 (BC_1, *, internal, x )," & "1167 (AC_1, PE1_TX_DP_11, output2, x )," & "1168 (BC_1, *, internal, x )," & "1169 (AC_1, PE1_TX_DP_8, output2, x )," & "1170 (BC_1, *, internal, x )," & "1171 (AC_1, PE1_TX_DP_9, output2, x )," & "1172 (BC_1, *, internal, x )," & "1173 (AC_1, PE1_TX_DP_6, output2, x )," & "1174 (BC_1, *, internal, x )," & "1175 (AC_1, PE1_TX_DP_7, output2, x )," & "1176 (BC_1, *, internal, x )," & "1177 (AC_1, PE1_TX_DP_4, output2, x )," & "1178 (BC_1, *, internal, x )," & "1179 (AC_1, PE1_TX_DP_5, output2, x )," & "1180 (BC_1, *, internal, x )," & "1181 (AC_1, PE1_TX_DP_2, output2, x )," & "1182 (BC_1, *, internal, x )," & "1183 (AC_1, PE1_TX_DP_3, output2, x )," & "1184 (BC_1, *, internal, x )," & "1185 (AC_1, PE1_TX_DP_0, output2, x )," & "1186 (BC_1, *, internal, x )," & "1187 (AC_1, PE1_TX_DP_1, output2, x )," & "1188 (BC_0, *, internal, x )," & "1189 (BC_0, *, internal, x )," & "1190 (BC_0, *, internal, x )," & "1191 (BC_0, *, internal, x )," & "1192 (BC_1, KTI2_RX_DN_1, input, x )," & "1193 (BC_1, KTI2_RX_DP_1, input, x )," & "1194 (BC_1, KTI2_RX_DN_0, input, x )," & "1195 (BC_1, KTI2_RX_DP_0, input, x )," & "1196 (BC_1, KTI2_RX_DN_3, input, x )," & "1197 (BC_1, KTI2_RX_DP_3, input, x )," & "1198 (BC_1, KTI2_RX_DN_2, input, x )," & "1199 (BC_1, KTI2_RX_DP_2, input, x )," & "1200 (BC_1, KTI2_RX_DN_5, input, x )," & "1201 (BC_1, KTI2_RX_DP_5, input, x )," & "1202 (BC_1, KTI2_RX_DN_4, input, x )," & "1203 (BC_1, KTI2_RX_DP_4, input, x )," & "1204 (BC_1, KTI2_RX_DN_7, input, x )," & "1205 (BC_1, KTI2_RX_DP_7, input, x )," & "1206 (BC_1, KTI2_RX_DN_6, input, x )," & "1207 (BC_1, KTI2_RX_DP_6, input, x )," & "1208 (BC_1, KTI2_RX_DN_9, input, x )," & "1209 (BC_1, KTI2_RX_DP_9, input, x )," & "1210 (BC_1, KTI2_RX_DN_8, input, x )," & "1211 (BC_1, KTI2_RX_DP_8, input, x )," & "1212 (BC_1, KTI2_RX_DN_11, input, x )," & "1213 (BC_1, KTI2_RX_DP_11, input, x )," & "1214 (BC_1, KTI2_RX_DN_10, input, x )," & "1215 (BC_1, KTI2_RX_DP_10, input, x )," & "1216 (BC_1, KTI2_RX_DN_13, input, x )," & "1217 (BC_1, KTI2_RX_DP_13, input, x )," & "1218 (BC_1, KTI2_RX_DN_12, input, x )," & "1219 (BC_1, KTI2_RX_DP_12, input, x )," & "1220 (BC_1, KTI2_RX_DN_15, input, x )," & "1221 (BC_1, KTI2_RX_DP_15, input, x )," & "1222 (BC_1, KTI2_RX_DN_14, input, x )," & "1223 (BC_1, KTI2_RX_DP_14, input, x )," & "1224 (BC_1, KTI2_RX_DN_17, input, x )," & "1225 (BC_1, KTI2_RX_DP_17, input, x )," & "1226 (BC_1, KTI2_RX_DN_16, input, x )," & "1227 (BC_1, KTI2_RX_DP_16, input, x )," & "1228 (BC_1, KTI2_RX_DN_19, input, x )," & "1229 (BC_1, KTI2_RX_DP_19, input, x )," & "1230 (BC_1, KTI2_RX_DN_18, input, x )," & "1231 (BC_1, KTI2_RX_DP_18, input, x )," & "1232 (BC_1, *, internal, x )," & "1233 (AC_1, KTI2_TX_DP_18, output2, x )," & "1234 (BC_1, *, internal, x )," & "1235 (AC_1, KTI2_TX_DP_19, output2, x )," & "1236 (BC_1, *, internal, x )," & "1237 (AC_1, KTI2_TX_DP_16, output2, x )," & "1238 (BC_1, *, internal, x )," & "1239 (AC_1, KTI2_TX_DP_17, output2, x )," & "1240 (BC_1, *, internal, x )," & "1241 (AC_1, KTI2_TX_DP_14, output2, x )," & "1242 (BC_1, *, internal, x )," & "1243 (AC_1, KTI2_TX_DP_15, output2, x )," & "1244 (BC_1, *, internal, x )," & "1245 (AC_1, KTI2_TX_DP_12, output2, x )," & "1246 (BC_1, *, internal, x )," & "1247 (AC_1, KTI2_TX_DP_13, output2, x )," & "1248 (BC_1, *, internal, x )," & "1249 (AC_1, KTI2_TX_DP_10, output2, x )," & "1250 (BC_1, *, internal, x )," & "1251 (AC_1, KTI2_TX_DP_11, output2, x )," & "1252 (BC_1, *, internal, x )," & "1253 (AC_1, KTI2_TX_DP_8, output2, x )," & "1254 (BC_1, *, internal, x )," & "1255 (AC_1, KTI2_TX_DP_9, output2, x )," & "1256 (BC_1, *, internal, x )," & "1257 (AC_1, KTI2_TX_DP_6, output2, x )," & "1258 (BC_1, *, internal, x )," & "1259 (AC_1, KTI2_TX_DP_7, output2, x )," & "1260 (BC_1, *, internal, x )," & "1261 (AC_1, KTI2_TX_DP_4, output2, x )," & "1262 (BC_1, *, internal, x )," & "1263 (AC_1, KTI2_TX_DP_5, output2, x )," & "1264 (BC_1, *, internal, x )," & "1265 (AC_1, KTI2_TX_DP_2, output2, x )," & "1266 (BC_1, *, internal, x )," & "1267 (AC_1, KTI2_TX_DP_3, output2, x )," & "1268 (BC_1, *, internal, x )," & "1269 (AC_1, KTI2_TX_DP_0, output2, x )," & "1270 (BC_1, *, internal, x )," & "1271 (AC_1, KTI2_TX_DP_1, output2, x )," & "1272 (BC_0, *, internal, x )," & "1273 (BC_0, *, internal, x )," & "1274 (BC_1, KTI1_RX_DN_1, input, x )," & "1275 (BC_1, KTI1_RX_DP_1, input, x )," & "1276 (BC_1, KTI1_RX_DN_0, input, x )," & "1277 (BC_1, KTI1_RX_DP_0, input, x )," & "1278 (BC_1, KTI1_RX_DN_3, input, x )," & "1279 (BC_1, KTI1_RX_DP_3, input, x )," & "1280 (BC_1, KTI1_RX_DN_2, input, x )," & "1281 (BC_1, KTI1_RX_DP_2, input, x )," & "1282 (BC_1, KTI1_RX_DN_5, input, x )," & "1283 (BC_1, KTI1_RX_DP_5, input, x )," & "1284 (BC_1, KTI1_RX_DN_4, input, x )," & "1285 (BC_1, KTI1_RX_DP_4, input, x )," & "1286 (BC_1, KTI1_RX_DN_7, input, x )," & "1287 (BC_1, KTI1_RX_DP_7, input, x )," & "1288 (BC_1, KTI1_RX_DN_6, input, x )," & "1289 (BC_1, KTI1_RX_DP_6, input, x )," & "1290 (BC_1, KTI1_RX_DN_9, input, x )," & "1291 (BC_1, KTI1_RX_DP_9, input, x )," & "1292 (BC_1, KTI1_RX_DN_8, input, x )," & "1293 (BC_1, KTI1_RX_DP_8, input, x )," & "1294 (BC_1, KTI1_RX_DN_11, input, x )," & "1295 (BC_1, KTI1_RX_DP_11, input, x )," & "1296 (BC_1, KTI1_RX_DN_10, input, x )," & "1297 (BC_1, KTI1_RX_DP_10, input, x )," & "1298 (BC_1, KTI1_RX_DN_13, input, x )," & "1299 (BC_1, KTI1_RX_DP_13, input, x )," & "1300 (BC_1, KTI1_RX_DN_12, input, x )," & "1301 (BC_1, KTI1_RX_DP_12, input, x )," & "1302 (BC_1, KTI1_RX_DN_15, input, x )," & "1303 (BC_1, KTI1_RX_DP_15, input, x )," & "1304 (BC_1, KTI1_RX_DN_14, input, x )," & "1305 (BC_1, KTI1_RX_DP_14, input, x )," & "1306 (BC_1, KTI1_RX_DN_17, input, x )," & "1307 (BC_1, KTI1_RX_DP_17, input, x )," & "1308 (BC_1, KTI1_RX_DN_16, input, x )," & "1309 (BC_1, KTI1_RX_DP_16, input, x )," & "1310 (BC_1, KTI1_RX_DN_19, input, x )," & "1311 (BC_1, KTI1_RX_DP_19, input, x )," & "1312 (BC_1, KTI1_RX_DN_18, input, x )," & "1313 (BC_1, KTI1_RX_DP_18, input, x )," & "1314 (BC_1, *, internal, x )," & "1315 (AC_1, KTI1_TX_DP_18, output2, x )," & "1316 (BC_1, *, internal, x )," & "1317 (AC_1, KTI1_TX_DP_19, output2, x )," & "1318 (BC_1, *, internal, x )," & "1319 (AC_1, KTI1_TX_DP_16, output2, x )," & "1320 (BC_1, *, internal, x )," & "1321 (AC_1, KTI1_TX_DP_17, output2, x )," & "1322 (BC_1, *, internal, x )," & "1323 (AC_1, KTI1_TX_DP_14, output2, x )," & "1324 (BC_1, *, internal, x )," & "1325 (AC_1, KTI1_TX_DP_15, output2, x )," & "1326 (BC_1, *, internal, x )," & "1327 (AC_1, KTI1_TX_DP_12, output2, x )," & "1328 (BC_1, *, internal, x )," & "1329 (AC_1, KTI1_TX_DP_13, output2, x )," & "1330 (BC_1, *, internal, x )," & "1331 (AC_1, KTI1_TX_DP_10, output2, x )," & "1332 (BC_1, *, internal, x )," & "1333 (AC_1, KTI1_TX_DP_11, output2, x )," & "1334 (BC_1, *, internal, x )," & "1335 (AC_1, KTI1_TX_DP_8, output2, x )," & "1336 (BC_1, *, internal, x )," & "1337 (AC_1, KTI1_TX_DP_9, output2, x )," & "1338 (BC_1, *, internal, x )," & "1339 (AC_1, KTI1_TX_DP_6, output2, x )," & "1340 (BC_1, *, internal, x )," & "1341 (AC_1, KTI1_TX_DP_7, output2, x )," & "1342 (BC_1, *, internal, x )," & "1343 (AC_1, KTI1_TX_DP_4, output2, x )," & "1344 (BC_1, *, internal, x )," & "1345 (AC_1, KTI1_TX_DP_5, output2, x )," & "1346 (BC_1, *, internal, x )," & "1347 (AC_1, KTI1_TX_DP_2, output2, x )," & "1348 (BC_1, *, internal, x )," & "1349 (AC_1, KTI1_TX_DP_3, output2, x )," & "1350 (BC_1, *, internal, x )," & "1351 (AC_1, KTI1_TX_DP_0, output2, x )," & "1352 (BC_1, *, internal, x )," & "1353 (AC_1, KTI1_TX_DP_1, output2, x )," & "1354 (BC_1, KTI0_RX_DN_1, input, x )," & "1355 (BC_1, KTI0_RX_DP_1, input, x )," & "1356 (BC_1, KTI0_RX_DN_0, input, x )," & "1357 (BC_1, KTI0_RX_DP_0, input, x )," & "1358 (BC_1, KTI0_RX_DN_3, input, x )," & "1359 (BC_1, KTI0_RX_DP_3, input, x )," & "1360 (BC_1, KTI0_RX_DN_2, input, x )," & "1361 (BC_1, KTI0_RX_DP_2, input, x )," & "1362 (BC_1, KTI0_RX_DN_5, input, x )," & "1363 (BC_1, KTI0_RX_DP_5, input, x )," & "1364 (BC_1, KTI0_RX_DN_4, input, x )," & "1365 (BC_1, KTI0_RX_DP_4, input, x )," & "1366 (BC_1, KTI0_RX_DN_7, input, x )," & "1367 (BC_1, KTI0_RX_DP_7, input, x )," & "1368 (BC_1, KTI0_RX_DN_6, input, x )," & "1369 (BC_1, KTI0_RX_DP_6, input, x )," & "1370 (BC_1, KTI0_RX_DN_9, input, x )," & "1371 (BC_1, KTI0_RX_DP_9, input, x )," & "1372 (BC_1, KTI0_RX_DN_8, input, x )," & "1373 (BC_1, KTI0_RX_DP_8, input, x )," & "1374 (BC_1, KTI0_RX_DN_11, input, x )," & "1375 (BC_1, KTI0_RX_DP_11, input, x )," & "1376 (BC_1, KTI0_RX_DN_10, input, x )," & "1377 (BC_1, KTI0_RX_DP_10, input, x )," & "1378 (BC_1, KTI0_RX_DN_13, input, x )," & "1379 (BC_1, KTI0_RX_DP_13, input, x )," & "1380 (BC_1, KTI0_RX_DN_12, input, x )," & "1381 (BC_1, KTI0_RX_DP_12, input, x )," & "1382 (BC_1, KTI0_RX_DN_15, input, x )," & "1383 (BC_1, KTI0_RX_DP_15, input, x )," & "1384 (BC_1, KTI0_RX_DN_14, input, x )," & "1385 (BC_1, KTI0_RX_DP_14, input, x )," & "1386 (BC_1, KTI0_RX_DN_17, input, x )," & "1387 (BC_1, KTI0_RX_DP_17, input, x )," & "1388 (BC_1, KTI0_RX_DN_16, input, x )," & "1389 (BC_1, KTI0_RX_DP_16, input, x )," & "1390 (BC_1, KTI0_RX_DN_19, input, x )," & "1391 (BC_1, KTI0_RX_DP_19, input, x )," & "1392 (BC_1, KTI0_RX_DN_18, input, x )," & "1393 (BC_1, KTI0_RX_DP_18, input, x )," & "1394 (BC_1, *, internal, x )," & "1395 (AC_1, KTI0_TX_DP_18, output2, x )," & "1396 (BC_1, *, internal, x )," & "1397 (AC_1, KTI0_TX_DP_19, output2, x )," & "1398 (BC_1, *, internal, x )," & "1399 (AC_1, KTI0_TX_DP_16, output2, x )," & "1400 (BC_1, *, internal, x )," & "1401 (AC_1, KTI0_TX_DP_17, output2, x )," & "1402 (BC_1, *, internal, x )," & "1403 (AC_1, KTI0_TX_DP_14, output2, x )," & "1404 (BC_1, *, internal, x )," & "1405 (AC_1, KTI0_TX_DP_15, output2, x )," & "1406 (BC_1, *, internal, x )," & "1407 (AC_1, KTI0_TX_DP_12, output2, x )," & "1408 (BC_1, *, internal, x )," & "1409 (AC_1, KTI0_TX_DP_13, output2, x )," & "1410 (BC_1, *, internal, x )," & "1411 (AC_1, KTI0_TX_DP_10, output2, x )," & "1412 (BC_1, *, internal, x )," & "1413 (AC_1, KTI0_TX_DP_11, output2, x )," & "1414 (BC_1, *, internal, x )," & "1415 (AC_1, KTI0_TX_DP_8, output2, x )," & "1416 (BC_1, *, internal, x )," & "1417 (AC_1, KTI0_TX_DP_9, output2, x )," & "1418 (BC_1, *, internal, x )," & "1419 (AC_1, KTI0_TX_DP_6, output2, x )," & "1420 (BC_1, *, internal, x )," & "1421 (AC_1, KTI0_TX_DP_7, output2, x )," & "1422 (BC_1, *, internal, x )," & "1423 (AC_1, KTI0_TX_DP_4, output2, x )," & "1424 (BC_1, *, internal, x )," & "1425 (AC_1, KTI0_TX_DP_5, output2, x )," & "1426 (BC_1, *, internal, x )," & "1427 (AC_1, KTI0_TX_DP_2, output2, x )," & "1428 (BC_1, *, internal, x )," & "1429 (AC_1, KTI0_TX_DP_3, output2, x )," & "1430 (BC_1, *, internal, x )," & "1431 (AC_1, KTI0_TX_DP_0, output2, x )," & "1432 (BC_1, *, internal, x )," & "1433 (AC_1, KTI0_TX_DP_1, output2, x )," & "1434 (BC_0, *, internal, x )," & "1435 (BC_1, MCI_NOA_AVRB_15, input, x )," & "1436 (BC_1, MCI_NOA_AVRB_14, input, x )," & "1437 (BC_1, MCI_NOA_AVRB_13, input, x )," & "1438 (BC_1, MCI_NOA_AVRB_12, input, x )," & "1439 (BC_1, MCI_NOA_AVRB_11, input, x )," & "1440 (BC_1, MCI_NOA_AVRB_10, input, x )," & "1441 (BC_1, MCI_NOA_AVRB_9, input, x )," & "1442 (BC_1, MCI_NOA_AVRB_8, input, x )," & "1443 (BC_1, MCI_NOA_AVRB_7, input, x )," & "1444 (BC_1, MCI_NOA_AVRB_6, input, x )," & "1445 (BC_1, MCI_NOA_AVRB_5, input, x )," & "1446 (BC_1, MCI_NOA_AVRB_4, input, x )," & "1447 (BC_1, MCI_NOA_AVRB_3, input, x )," & "1448 (BC_1, MCI_NOA_AVRB_2, input, x )," & "1449 (BC_1, MCI_NOA_AVRB_1, input, x )," & "1450 (BC_1, MCI_NOA_AVRB_0, input, x )," & "1451 (BC_1, MCI_NOA_AVRB_STB_DN_1, input, x )," & "1452 (BC_1, MCI_NOA_AVRB_STB_DN_0, input, x )," & "1453 (BC_1, MCI_NOA_AVRB_STB_DP_1, input, x )," & "1454 (BC_1, MCI_NOA_AVRB_STB_DP_0, input, x )," & "1455 (BC_1, MCI_TXT_AGENT, input, x )," & "1456 (BC_1, MCI_BIST_ENABLE, input, x )," & "1457 (BC_8, MCI_LGSPARE_6, bidir, x, 1527, 0, PULL1 )," & "1458 (BC_8, MCI_LGSPARE_5, bidir, x, 1527, 0, PULL1 )," & "1459 (BC_8, MCI_LGSPARE_4, bidir, x, 1527, 0, PULL1 )," & "1460 (BC_8, MCI_LGSPARE_3, bidir, x, 1527, 0, PULL1 )," & "1461 (BC_8, MCI_LGSPARE_2, bidir, x, 1527, 0, PULL1 )," & "1462 (BC_8, MCI_KSFC_DIS, bidir, x, 1527, 0, PULL1 )," & "1463 (BC_8, MCI_DMIMODE_OVERRIDE, bidir, x, 1527, 0, PULL1 )," & "1464 (BC_1, MCI_DEBUG_EN_N, input, x )," & "1465 (BC_1, MCI_FRMAGENT, input, x )," & "1466 (BC_1, MCI_TXT_PLTEN, input, x )," & "1467 (BC_1, PMSYNC, input, x )," & "1468 (BC_1, LEGACY_SKT, input, x )," & "1469 (BC_8, PECI, bidir, x, 1527, 0, WEAK0 )," & "1470 (BC_0, *, internal, x )," & "1471 (BC_1, RESET_N, input, 1 )," & "1472 (BC_0, *, internal, x )," & "1473 (BC_1, PWR_DEBUG_N, input, x )," & "1474 (BC_1, OVERCLK_2, input, x )," & "1475 (BC_1, OVERCLK_1, input, x )," & "1476 (BC_1, OVERCLK_0, input, x )," & "1477 (BC_1, NMI, input, x )," & "1478 (BC_1, PMSYNC_CLK, input, x )," & "1479 (BC_1, BMCINIT, input, x )," & "1480 (BC_1, PREQ_N, input, x )," & "1481 (BC_0, FIVR_PROBE_DIG_1, output3, x, 1527, 0, z )," & "1482 (BC_0, FIVR_FAULT, output3, x, 1527, 0, z )," & "1483 (BC_1, FIVR_CLKREF, input, x )," & "1484 (BC_1, SOCKET_ID2, input, x )," & "1485 (BC_1, MCI_SOCKET_ID_1, input, x )," & "1486 (BC_1, MCI_SOCKET_ID_0, input, x )," & "1487 (BC_1, MCI_SAFE_MODE_BOOT, input, x )," & "1488 (BC_8, DDR345_SPDSCL, bidir, x, 1527, 0, WEAK1 )," & "1489 (BC_8, DDR012_SPDSCL, bidir, x, 1527, 0, WEAK1 )," & "1490 (BC_8, DDR345_SPDSDA, bidir, x, 1527, 0, WEAK1 )," & "1491 (BC_8, DDR012_SPDSDA, bidir, x, 1527, 0, WEAK1 )," & "1492 (BC_8, DDR012_MEMHOT_N, bidir, x, 1527, 0, WEAK1 )," & "1493 (BC_8, DDR345_MEMHOT_N, bidir, x, 1527, 0, WEAK1 )," & "1494 (BC_0, ERROR_N_2, output3, x, 1527, 0, WEAK1 )," & "1495 (BC_0, ERROR_N_1, output3, x, 1527, 0, WEAK1 )," & "1496 (BC_0, ERROR_N_0, output3, x, 1527, 0, WEAK1 )," & "1497 (BC_8, MSMI_N, bidir, x, 1527, 0, PULL1 )," & "1498 (BC_8, PE_HP_SCL, bidir, x, 1527, 0, WEAK1 )," & "1499 (BC_8, PE_HP_SDA, bidir, x, 1527, 0, WEAK1 )," & "1500 (BC_0, CATERR_N, output3, x, 1527, 0, z )," & "1501 (BC_8, TSC_SYNC, bidir, x, 1527, 0, WEAK1 )," & "1502 (BC_8, MBP_N_7, bidir, x, 1527, 0, WEAK1 )," & "1503 (BC_8, MBP_N_6, bidir, x, 1527, 0, WEAK1 )," & "1504 (BC_8, MBP_N_5, bidir, x, 1527, 0, WEAK1 )," & "1505 (BC_8, MBP_N_4, bidir, x, 1527, 0, WEAK1 )," & "1506 (BC_8, MBP_N_3, bidir, x, 1527, 0, WEAK1 )," & "1507 (BC_8, MBP_N_2, bidir, x, 1527, 0, WEAK1 )," & "1508 (BC_8, MBP_N_1, bidir, x, 1527, 0, WEAK1 )," & "1509 (BC_8, MBP_N_0, bidir, x, 1527, 0, WEAK1 )," & "1510 (BC_1, EAR_N, input, x )," & "1511 (BC_0, SVIDCLK_1, output3, x, 1527, 0, WEAK1 )," & "1512 (BC_0, SVIDCLK_0, output3, x, 1527, 0, WEAK1 )," & "1513 (BC_8, SVIDDATA_1, bidir, x, 1527, 0, WEAK1 )," & "1514 (BC_8, SVIDDATA_0, bidir, x, 1527, 0, WEAK1 )," & "1515 (BC_0, *, internal, x )," & "1516 (BC_0, *, internal, x )," & "1517 (BC_0, *, internal, x )," & "1518 (BC_0, *, internal, x )," & "1519 (BC_1, SVIDALERT_N_1, input, x )," & "1520 (BC_1, SVIDALERT_N_0, input, x )," & "1521 (BC_0, *, internal, x )," & "1522 (BC_0, THERMTRIP_N, output3, x, 1527, 0, WEAK1 )," & "1523 (BC_8, PM_FAST_WAKE_N, bidir, x, 1527, 0, PULL1 )," & "1524 (BC_0, PRDY_N, output3, x, 1527, 0, WEAK1 )," & "1525 (BC_1, PROCHOT_N, input, 1 )," & "1526 (BC_1, PROCDIS_N, input, x )," & "1527 (BC_0, *, control, 0 )," & "1528 (BC_0, *, internal, x )"; -- Advanced I/O Description for 1149.6 AC-coupled and differential pin attribute AIO_COMPONENT_CONFORMANCE of SKX_XCC : entity is "STD_1149_6_2003" ; -- 1149.6 7.5.2 Define optional Pulse width timing requirements for EXTEST_PULSE -- (specify minimum wait time in RUTI, in seconds) attribute AIO_EXTEST_Pulse_Execution of SKX_XCC : entity is "wait_duration 1.0e-5" ; -- 1149.6 7.5.3 Define optional requirements for EXTEST_TRAIN -- (5.4.2 permission: specify min # of pulses produced during extest_train) attribute AIO_EXTEST_Train_Execution of SKX_XCC : entity is "train 2" ; -- Define charactistics of any AC pins attribute AIO_Pin_Behavior of SKX_XCC : entity is "PE3_RX_DN_15 : HP_time=8.0e-9 ; " & "PE3_RX_DP_15 : HP_time=8.0e-9 ; " & "PE3_TX_DP_15 ; " & "PE3_RX_DN_14 : HP_time=8.0e-9 ; " & "PE3_RX_DP_14 : HP_time=8.0e-9 ; " & "PE3_TX_DP_14 ; " & "PE3_RX_DN_13 : HP_time=8.0e-9 ; " & "PE3_RX_DP_13 : HP_time=8.0e-9 ; " & "PE3_TX_DP_13 ; " & "PE3_RX_DN_12 : HP_time=8.0e-9 ; " & "PE3_RX_DP_12 : HP_time=8.0e-9 ; " & "PE3_TX_DP_12 ; " & "PE3_RX_DN_11 : HP_time=8.0e-9 ; " & "PE3_RX_DP_11 : HP_time=8.0e-9 ; " & "PE3_TX_DP_11 ; " & "PE3_RX_DN_10 : HP_time=8.0e-9 ; " & "PE3_RX_DP_10 : HP_time=8.0e-9 ; " & "PE3_TX_DP_10 ; " & "PE3_RX_DN_9 : HP_time=8.0e-9 ; " & "PE3_RX_DP_9 : HP_time=8.0e-9 ; " & "PE3_TX_DP_9 ; " & "PE3_RX_DN_8 : HP_time=8.0e-9 ; " & "PE3_RX_DP_8 : HP_time=8.0e-9 ; " & "PE3_TX_DP_8 ; " & "PE3_RX_DN_7 : HP_time=8.0e-9 ; " & "PE3_RX_DP_7 : HP_time=8.0e-9 ; " & "PE3_TX_DP_7 ; " & "PE3_RX_DN_6 : HP_time=8.0e-9 ; " & "PE3_RX_DP_6 : HP_time=8.0e-9 ; " & "PE3_TX_DP_6 ; " & "PE3_RX_DN_5 : HP_time=8.0e-9 ; " & "PE3_RX_DP_5 : HP_time=8.0e-9 ; " & "PE3_TX_DP_5 ; " & "PE3_RX_DN_4 : HP_time=8.0e-9 ; " & "PE3_RX_DP_4 : HP_time=8.0e-9 ; " & "PE3_TX_DP_4 ; " & "PE3_RX_DN_3 : HP_time=8.0e-9 ; " & "PE3_RX_DP_3 : HP_time=8.0e-9 ; " & "PE3_TX_DP_3 ; " & "PE3_RX_DN_2 : HP_time=8.0e-9 ; " & "PE3_RX_DP_2 : HP_time=8.0e-9 ; " & "PE3_TX_DP_2 ; " & "PE3_RX_DN_1 : HP_time=8.0e-9 ; " & "PE3_RX_DP_1 : HP_time=8.0e-9 ; " & "PE3_TX_DP_1 ; " & "PE3_RX_DN_0 : HP_time=8.0e-9 ; " & "PE3_RX_DP_0 : HP_time=8.0e-9 ; " & "PE3_TX_DP_0 ; " & "PE2_RX_DN_15 : HP_time=8.0e-9 ; " & "PE2_RX_DP_15 : HP_time=8.0e-9 ; " & "PE2_TX_DP_15 ; " & "PE2_RX_DN_14 : HP_time=8.0e-9 ; " & "PE2_RX_DP_14 : HP_time=8.0e-9 ; " & "PE2_TX_DP_14 ; " & "PE2_RX_DN_13 : HP_time=8.0e-9 ; " & "PE2_RX_DP_13 : HP_time=8.0e-9 ; " & "PE2_TX_DP_13 ; " & "PE2_RX_DN_12 : HP_time=8.0e-9 ; " & "PE2_RX_DP_12 : HP_time=8.0e-9 ; " & "PE2_TX_DP_12 ; " & "PE2_RX_DN_11 : HP_time=8.0e-9 ; " & "PE2_RX_DP_11 : HP_time=8.0e-9 ; " & "PE2_TX_DP_11 ; " & "PE2_RX_DN_10 : HP_time=8.0e-9 ; " & "PE2_RX_DP_10 : HP_time=8.0e-9 ; " & "PE2_TX_DP_10 ; " & "PE2_RX_DN_9 : HP_time=8.0e-9 ; " & "PE2_RX_DP_9 : HP_time=8.0e-9 ; " & "PE2_TX_DP_9 ; " & "PE2_RX_DN_8 : HP_time=8.0e-9 ; " & "PE2_RX_DP_8 : HP_time=8.0e-9 ; " & "PE2_TX_DP_8 ; " & "PE2_RX_DN_7 : HP_time=8.0e-9 ; " & "PE2_RX_DP_7 : HP_time=8.0e-9 ; " & "PE2_TX_DP_7 ; " & "PE2_RX_DN_6 : HP_time=8.0e-9 ; " & "PE2_RX_DP_6 : HP_time=8.0e-9 ; " & "PE2_TX_DP_6 ; " & "PE2_RX_DN_5 : HP_time=8.0e-9 ; " & "PE2_RX_DP_5 : HP_time=8.0e-9 ; " & "PE2_TX_DP_5 ; " & "PE2_RX_DN_4 : HP_time=8.0e-9 ; " & "PE2_RX_DP_4 : HP_time=8.0e-9 ; " & "PE2_TX_DP_4 ; " & "PE2_RX_DN_3 : HP_time=8.0e-9 ; " & "PE2_RX_DP_3 : HP_time=8.0e-9 ; " & "PE2_TX_DP_3 ; " & "PE2_RX_DN_2 : HP_time=8.0e-9 ; " & "PE2_RX_DP_2 : HP_time=8.0e-9 ; " & "PE2_TX_DP_2 ; " & "PE2_RX_DN_1 : HP_time=8.0e-9 ; " & "PE2_RX_DP_1 : HP_time=8.0e-9 ; " & "PE2_TX_DP_1 ; " & "PE2_RX_DN_0 : HP_time=8.0e-9 ; " & "PE2_RX_DP_0 : HP_time=8.0e-9 ; " & "PE2_TX_DP_0 ; " & "PE1_RX_DN_15 : HP_time=8.0e-9 ; " & "PE1_RX_DP_15 : HP_time=8.0e-9 ; " & "PE1_TX_DP_15 ; " & "PE1_RX_DN_14 : HP_time=8.0e-9 ; " & "PE1_RX_DP_14 : HP_time=8.0e-9 ; " & "PE1_TX_DP_14 ; " & "PE1_RX_DN_13 : HP_time=8.0e-9 ; " & "PE1_RX_DP_13 : HP_time=8.0e-9 ; " & "PE1_TX_DP_13 ; " & "PE1_RX_DN_12 : HP_time=8.0e-9 ; " & "PE1_RX_DP_12 : HP_time=8.0e-9 ; " & "PE1_TX_DP_12 ; " & "PE1_RX_DN_11 : HP_time=8.0e-9 ; " & "PE1_RX_DP_11 : HP_time=8.0e-9 ; " & "PE1_TX_DP_11 ; " & "PE1_RX_DN_10 : HP_time=8.0e-9 ; " & "PE1_RX_DP_10 : HP_time=8.0e-9 ; " & "PE1_TX_DP_10 ; " & "PE1_RX_DN_9 : HP_time=8.0e-9 ; " & "PE1_RX_DP_9 : HP_time=8.0e-9 ; " & "PE1_TX_DP_9 ; " & "PE1_RX_DN_8 : HP_time=8.0e-9 ; " & "PE1_RX_DP_8 : HP_time=8.0e-9 ; " & "PE1_TX_DP_8 ; " & "PE1_RX_DN_7 : HP_time=8.0e-9 ; " & "PE1_RX_DP_7 : HP_time=8.0e-9 ; " & "PE1_TX_DP_7 ; " & "PE1_RX_DN_6 : HP_time=8.0e-9 ; " & "PE1_RX_DP_6 : HP_time=8.0e-9 ; " & "PE1_TX_DP_6 ; " & "PE1_RX_DN_5 : HP_time=8.0e-9 ; " & "PE1_RX_DP_5 : HP_time=8.0e-9 ; " & "PE1_TX_DP_5 ; " & "PE1_RX_DN_4 : HP_time=8.0e-9 ; " & "PE1_RX_DP_4 : HP_time=8.0e-9 ; " & "PE1_TX_DP_4 ; " & "PE1_RX_DN_3 : HP_time=8.0e-9 ; " & "PE1_RX_DP_3 : HP_time=8.0e-9 ; " & "PE1_TX_DP_3 ; " & "PE1_RX_DN_2 : HP_time=8.0e-9 ; " & "PE1_RX_DP_2 : HP_time=8.0e-9 ; " & "PE1_TX_DP_2 ; " & "PE1_RX_DN_1 : HP_time=8.0e-9 ; " & "PE1_RX_DP_1 : HP_time=8.0e-9 ; " & "PE1_TX_DP_1 ; " & "PE1_RX_DN_0 : HP_time=8.0e-9 ; " & "PE1_RX_DP_0 : HP_time=8.0e-9 ; " & "PE1_TX_DP_0 ; " & "DMI_RX_DN_3 : HP_time=8.0e-9 ; " & "DMI_RX_DP_3 : HP_time=8.0e-9 ; " & "DMI_TX_DP_3 ; " & "DMI_RX_DN_2 : HP_time=8.0e-9 ; " & "DMI_RX_DP_2 : HP_time=8.0e-9 ; " & "DMI_TX_DP_2 ; " & "DMI_RX_DN_1 : HP_time=8.0e-9 ; " & "DMI_RX_DP_1 : HP_time=8.0e-9 ; " & "DMI_TX_DP_1 ; " & "DMI_RX_DN_0 : HP_time=8.0e-9 ; " & "DMI_RX_DP_0 : HP_time=8.0e-9 ; " & "DMI_TX_DP_0 "; -- "xxMCP1_RX_DN_15 : HP_time=8.0e-9 ; " & -- "xxMCP1_RX_DP_15 : HP_time=8.0e-9 ; " & -- "xxMCP1_TX_DP_15 ; " & -- "xxMCP1_RX_DN_14 : HP_time=8.0e-9 ; " & -- "xxMCP1_RX_DP_14 : HP_time=8.0e-9 ; " & -- "xxMCP1_TX_DP_14 ; " & -- "xxMCP1_RX_DN_13 : HP_time=8.0e-9 ; " & -- "xxMCP1_RX_DP_13 : HP_time=8.0e-9 ; " & -- "xxMCP1_TX_DP_13 ; " & -- "xxMCP1_RX_DN_12 : HP_time=8.0e-9 ; " & -- "xxMCP1_RX_DP_12 : HP_time=8.0e-9 ; " & -- "xxMCP1_TX_DP_12 ; " & -- "xxMCP1_RX_DN_11 : HP_time=8.0e-9 ; " & -- "xxMCP1_RX_DP_11 : HP_time=8.0e-9 ; " & -- "xxMCP1_TX_DP_11 ; " & -- "xxMCP1_RX_DN_10 : HP_time=8.0e-9 ; " & -- "xxMCP1_RX_DP_10 : HP_time=8.0e-9 ; " & -- "xxMCP1_TX_DP_10 ; " & -- "xxMCP1_RX_DN_9 : HP_time=8.0e-9 ; " & -- "xxMCP1_RX_DP_9 : HP_time=8.0e-9 ; " & -- "xxMCP1_TX_DP_9 ; " & -- "xxMCP1_RX_DN_8 : HP_time=8.0e-9 ; " & -- "xxMCP1_RX_DP_8 : HP_time=8.0e-9 ; " & -- "xxMCP1_TX_DP_8 ; " & -- "xxMCP1_RX_DN_7 : HP_time=8.0e-9 ; " & -- "xxMCP1_RX_DP_7 : HP_time=8.0e-9 ; " & -- "xxMCP1_TX_DP_7 ; " & -- "xxMCP1_RX_DN_6 : HP_time=8.0e-9 ; " & -- "xxMCP1_RX_DP_6 : HP_time=8.0e-9 ; " & -- "xxMCP1_TX_DP_6 ; " & -- "xxMCP1_RX_DN_5 : HP_time=8.0e-9 ; " & -- "xxMCP1_RX_DP_5 : HP_time=8.0e-9 ; " & -- "xxMCP1_TX_DP_5 ; " & -- "xxMCP1_RX_DN_4 : HP_time=8.0e-9 ; " & -- "xxMCP1_RX_DP_4 : HP_time=8.0e-9 ; " & -- "xxMCP1_TX_DP_4 ; " & -- "xxMCP1_RX_DN_3 : HP_time=8.0e-9 ; " & -- "xxMCP1_RX_DP_3 : HP_time=8.0e-9 ; " & -- "xxMCP1_TX_DP_3 ; " & -- "xxMCP1_RX_DN_2 : HP_time=8.0e-9 ; " & -- "xxMCP1_RX_DP_2 : HP_time=8.0e-9 ; " & -- "xxMCP1_TX_DP_2 ; " & -- "xxMCP1_RX_DN_1 : HP_time=8.0e-9 ; " & -- "xxMCP1_RX_DP_1 : HP_time=8.0e-9 ; " & -- "xxMCP1_TX_DP_1 ; " & -- "xxMCP1_RX_DN_0 : HP_time=8.0e-9 ; " & -- "xxMCP1_RX_DP_0 : HP_time=8.0e-9 ; " & -- "xxMCP1_TX_DP_0 "; attribute EXTEST_TOGGLE_CELLS : BSDL_EXTENSION; ----Extest Toggle Extension---- -- Tcell: -- The boundary register cell number that allows the associated "Signal"(s) -- output(s) to toggle at � the TCK frequency when the "Tcell" contains the -- "Tval" value, the EXTEST_TOGGLE command is active and the TAP state machine -- is in Run-Test-Idle. -- Tval: -- The value required in the "Tcell" of the boundary register that allows the -- associated "Signal"(s) output(s) to toggle at � the TCK frequency when the -- "Tcell" contains the "Tval" value, the EXTEST_TOGGLE command is active and -- The TAP state machine is in Run-Test-Idle. -- Options: 0 = Output toggles when "Tcell" is set to zero -- 1 = Output toggles when "Tcell" is set to one -- DI/PS/SE: -- Differential/Pseudo Single Ended/Single Ended. "Tcell" will enable toggling -- one output if Pseudo Single Ended or Single Ended, and enable toggling two -- outputs if differential. -- Note: Pseudo Single Ended is one output leg of a Differential pair output -- that will be configured to toggle. "PS" looks much like "SE" mode -- other than there could be more "Treq" parameters for proper operation. -- Options: DI = Differential (two differential output legs toggle -- simultaneously) -- PS = Pseudo Single Ended (one leg of a differential can toggle -- independent of the other) -- SE = Single Ended (one output will Toggle) -- Signal: -- Associates the signal name to the "Tcell" number for the EXTEST_TOGGLE -- instruction and also represents The positive output of a Differential pair. -- a Signal name defined in The PHYSICAL_PIN_MAP area of The BSDL file is -- required for this field. -- DiffNeg: -- When both legs of the differential pair are controlled by the same "Tcell", -- "DiffNeg" identifies the negative leg of the differential pair. A signal -- name defined in The PHYSICAL_PIN_MAP area of The BSDL file is required for -- this field. -- DiffMode: -- Describes if The Differential pair outputs are simultaneously driven to The -- same logic state or to opposite logic states. -- Options: OPPO = Simultaneous 1/0 or 0/1 logic levels. -- SAME = Simultaneous 1/1 or 0/0 logic levels. -- Treq: -- The field contains values required in other boundary register cells that -- enable the described "Signal" to toggle. The field originated to support -- pseudo single ended but is not limited to that use. 'cell# = value' -- Example: '510=1, 511=0' -- Single quotes Define The field with commas defining each entry. there is no -- limit to The number of entries. -- The following would typically follow what has already been defined through IEEE 1149.1 and -- 1149.6 syntax in the BSDL file. -- Ccell: -- The control cell number that enables The output Signal(s) to Drive out. -- Disval: -- The logic value placed into The control cell that disables The Signal(s) -- output(s) from driving. -- Options: 0 = Output(s) not driven when zero -- 1 = output(s) not driven when one -- Rslt: -- The resulting state The output(s) maintains when disabled. -- Options: Z = High Impedance -- WEAK0 = External pull down -- WEAK1 = External pull up -- PULL0 = internal pull down -- PULL1 = internal pull up attribute EXTEST_TOGGLE_CELLS of SKX_XCC : entity is -- "{Tcell, Tval, DI/DP/SE, Signal, DiffNeg, DiffMode, Treq, Ccell, Disval, Rslt)," & "{5, 1, SE, DDR345_RESET_N, , , , 3, 0, z )," & "{6, 1, SE, DDR5_MA_8, , , , 3, 0, z )," & "{7, 1, SE, DDR5_MA_7, , , , 3, 0, z )," & "{8, 1, SE, DDR5_MA_5, , , , 3, 0, z )," & "{9, 1, SE, DDR5_MA_6, , , , 3, 0, z )," & "{10, 1, SE, DDR5_MA_2, , , , 3, 0, z )," & "{11, 1, SE, DDR5_MA_4, , , , 3, 0, z )," & "{12, 1, SE, DDR5_MA_1, , , , 3, 0, z )," & "{13, 1, SE, DDR5_MA_3, , , , 3, 0, z )," & "{14, 1, SE, DDR5_PAR, , , , 3, 0, z )," & "{16, 1, SE, DDR5_DQS_DN_17, , , , 3, 0, z )," & "{17, 1, SE, DDR5_DQS_DP_17, , , , 3, 0, z )," & "{18, 1, SE, DDR5_ECC_5, , , , 3, 0, z )," & "{19, 1, SE, DDR5_ECC_4, , , , 3, 0, z )," & "{20, 1, SE, DDR5_ECC_7, , , , 3, 0, z )," & "{21, 1, SE, DDR5_ECC_6, , , , 3, 0, z )," & "{22, 1, SE, DDR5_DQS_DN_8, , , , 3, 0, z )," & "{23, 1, SE, DDR5_DQS_DP_8, , , , 3, 0, z )," & "{24, 1, SE, DDR5_ECC_3, , , , 3, 0, z )," & "{25, 1, SE, DDR5_ECC_2, , , , 3, 0, z )," & "{26, 1, SE, DDR5_ECC_1, , , , 3, 0, z )," & "{27, 1, SE, DDR5_ECC_0, , , , 3, 0, z )," & "{28, 1, SE, DDR5_DQS_DN_11, , , , 3, 0, z )," & "{29, 1, SE, DDR5_DQS_DP_11, , , , 3, 0, z )," & "{30, 1, SE, DDR5_DQ_21, , , , 3, 0, z )," & "{31, 1, SE, DDR5_DQ_20, , , , 3, 0, z )," & "{32, 1, SE, DDR5_DQ_23, , , , 3, 0, z )," & "{33, 1, SE, DDR5_DQ_22, , , , 3, 0, z )," & "{34, 1, SE, DDR5_DQS_DN_2, , , , 3, 0, z )," & "{35, 1, SE, DDR5_DQS_DP_2, , , , 3, 0, z )," & "{36, 1, SE, DDR5_DQ_19, , , , 3, 0, z )," & "{37, 1, SE, DDR5_DQ_18, , , , 3, 0, z )," & "{38, 1, SE, DDR5_DQ_17, , , , 3, 0, z )," & "{39, 1, SE, DDR5_DQ_16, , , , 3, 0, z )," & "{40, 1, SE, DDR5_DQS_DN_9, , , , 3, 0, z )," & "{41, 1, SE, DDR5_DQS_DP_9, , , , 3, 0, z )," & "{42, 1, SE, DDR5_DQ_5, , , , 3, 0, z )," & "{43, 1, SE, DDR5_DQ_4, , , , 3, 0, z )," & "{44, 1, SE, DDR5_DQ_7, , , , 3, 0, z )," & "{45, 1, SE, DDR5_DQ_6, , , , 3, 0, z )," & "{46, 1, SE, DDR5_DQS_DN_0, , , , 3, 0, z )," & "{47, 1, SE, DDR5_DQS_DP_0, , , , 3, 0, z )," & "{48, 1, SE, DDR5_DQ_3, , , , 3, 0, z )," & "{49, 1, SE, DDR5_DQ_2, , , , 3, 0, z )," & "{50, 1, SE, DDR5_DQ_1, , , , 3, 0, z )," & "{51, 1, SE, DDR5_DQ_0, , , , 3, 0, z )," & "{52, 1, SE, DDR5_DQS_DN_1, , , , 3, 0, z )," & "{53, 1, SE, DDR5_DQS_DP_1, , , , 3, 0, z )," & "{54, 1, SE, DDR5_DQ_11, , , , 3, 0, z )," & "{55, 1, SE, DDR5_DQ_10, , , , 3, 0, z )," & "{56, 1, SE, DDR5_DQ_9, , , , 3, 0, z )," & "{57, 1, SE, DDR5_DQ_8, , , , 3, 0, z )," & "{58, 1, SE, DDR5_DQS_DN_10, , , , 3, 0, z )," & "{59, 1, SE, DDR5_DQS_DP_10, , , , 3, 0, z )," & "{60, 1, SE, DDR5_DQ_13, , , , 3, 0, z )," & "{61, 1, SE, DDR5_DQ_12, , , , 3, 0, z )," & "{62, 1, SE, DDR5_DQ_15, , , , 3, 0, z )," & "{63, 1, SE, DDR5_DQ_14, , , , 3, 0, z )," & "{64, 1, SE, DDR5_DQS_DN_3, , , , 3, 0, z )," & "{65, 1, SE, DDR5_DQS_DP_3, , , , 3, 0, z )," & "{66, 1, SE, DDR5_DQ_27, , , , 3, 0, z )," & "{67, 1, SE, DDR5_DQ_26, , , , 3, 0, z )," & "{68, 1, SE, DDR5_DQ_25, , , , 3, 0, z )," & "{69, 1, SE, DDR5_DQ_24, , , , 3, 0, z )," & "{70, 1, SE, DDR5_DQS_DN_12, , , , 3, 0, z )," & "{71, 1, SE, DDR5_DQS_DP_12, , , , 3, 0, z )," & "{72, 1, SE, DDR5_DQ_29, , , , 3, 0, z )," & "{73, 1, SE, DDR5_DQ_28, , , , 3, 0, z )," & "{74, 1, SE, DDR5_DQ_31, , , , 3, 0, z )," & "{75, 1, SE, DDR5_DQ_30, , , , 3, 0, z )," & "{76, 1, SE, DDR5_CKE_1, , , , 3, 0, z )," & "{77, 1, SE, DDR5_CKE_0, , , , 3, 0, z )," & "{78, 1, SE, DDR5_CKE_2, , , , 3, 0, z )," & "{80, 1, SE, DDR5_CKE_3, , , , 3, 0, z )," & "{82, 1, SE, DDR5_ACT_N, , , , 3, 0, z )," & "{83, 1, SE, DDR5_BG_0, , , , 3, 0, z )," & "{84, 1, SE, DDR5_BG_1, , , , 3, 0, z )," & "{85, 1, SE, DDR5_MA_11, , , , 3, 0, z )," & "{86, 1, SE, DDR5_MA_9, , , , 3, 0, z )," & "{87, 1, SE, DDR5_MA_12, , , , 3, 0, z )," & "{88, 1, SE, DDR5_CS_N_4, , , , 3, 0, z )," & "{89, 1, SE, DDR5_ODT_2, , , , 3, 0, z )," & "{90, 1, SE, DDR5_MA_15, , , , 3, 0, z )," & "{91, 1, SE, DDR5_MA_13, , , , 3, 0, z )," & "{92, 1, SE, DDR5_MA_16, , , , 3, 0, z )," & "{93, 1, SE, DDR5_MA_14, , , , 3, 0, z )," & "{94, 1, SE, DDR5_MA_10, , , , 3, 0, z )," & "{95, 1, SE, DDR5_BA_1, , , , 3, 0, z )," & "{96, 1, SE, DDR5_MA_0, , , , 3, 0, z )," & "{97, 1, SE, DDR5_BA_0, , , , 3, 0, z )," & "{98, 1, SE, DDR5_DQS_DN_4, , , , 3, 0, z )," & "{99, 1, SE, DDR5_DQS_DP_4, , , , 3, 0, z )," & "{100, 1, SE, DDR5_DQ_35, , , , 3, 0, z )," & "{101, 1, SE, DDR5_DQ_34, , , , 3, 0, z )," & "{102, 1, SE, DDR5_DQ_33, , , , 3, 0, z )," & "{103, 1, SE, DDR5_DQ_32, , , , 3, 0, z )," & "{104, 1, SE, DDR5_DQS_DN_13, , , , 3, 0, z )," & "{105, 1, SE, DDR5_DQS_DP_13, , , , 3, 0, z )," & "{106, 1, SE, DDR5_DQ_37, , , , 3, 0, z )," & "{107, 1, SE, DDR5_DQ_36, , , , 3, 0, z )," & "{108, 1, SE, DDR5_DQ_39, , , , 3, 0, z )," & "{109, 1, SE, DDR5_DQ_38, , , , 3, 0, z )," & "{110, 1, SE, DDR5_DQS_DN_6, , , , 3, 0, z )," & "{111, 1, SE, DDR5_DQS_DP_6, , , , 3, 0, z )," & "{112, 1, SE, DDR5_DQ_51, , , , 3, 0, z )," & "{113, 1, SE, DDR5_DQ_50, , , , 3, 0, z )," & "{114, 1, SE, DDR5_DQ_49, , , , 3, 0, z )," & "{115, 1, SE, DDR5_DQ_48, , , , 3, 0, z )," & "{116, 1, SE, DDR5_DQS_DN_15, , , , 3, 0, z )," & "{117, 1, SE, DDR5_DQS_DP_15, , , , 3, 0, z )," & "{118, 1, SE, DDR5_DQ_53, , , , 3, 0, z )," & "{119, 1, SE, DDR5_DQ_52, , , , 3, 0, z )," & "{120, 1, SE, DDR5_DQ_55, , , , 3, 0, z )," & "{121, 1, SE, DDR5_DQ_54, , , , 3, 0, z )," & "{122, 1, SE, DDR5_DQS_DN_16, , , , 3, 0, z )," & "{123, 1, SE, DDR5_DQS_DP_16, , , , 3, 0, z )," & "{124, 1, SE, DDR5_DQ_61, , , , 3, 0, z )," & "{125, 1, SE, DDR5_DQ_60, , , , 3, 0, z )," & "{126, 1, SE, DDR5_DQ_63, , , , 3, 0, z )," & "{127, 1, SE, DDR5_DQ_62, , , , 3, 0, z )," & "{128, 1, SE, DDR5_DQS_DN_7, , , , 3, 0, z )," & "{129, 1, SE, DDR5_DQS_DP_7, , , , 3, 0, z )," & "{130, 1, SE, DDR5_DQ_59, , , , 3, 0, z )," & "{131, 1, SE, DDR5_DQ_58, , , , 3, 0, z )," & "{132, 1, SE, DDR5_DQ_57, , , , 3, 0, z )," & "{133, 1, SE, DDR5_DQ_56, , , , 3, 0, z )," & "{134, 1, SE, DDR5_DQS_DN_14, , , , 3, 0, z )," & "{135, 1, SE, DDR5_DQS_DP_14, , , , 3, 0, z )," & "{136, 1, SE, DDR5_DQ_45, , , , 3, 0, z )," & "{137, 1, SE, DDR5_DQ_44, , , , 3, 0, z )," & "{138, 1, SE, DDR5_DQ_47, , , , 3, 0, z )," & "{139, 1, SE, DDR5_DQ_46, , , , 3, 0, z )," & "{140, 1, SE, DDR5_DQS_DN_5, , , , 3, 0, z )," & "{141, 1, SE, DDR5_DQS_DP_5, , , , 3, 0, z )," & "{142, 1, SE, DDR5_DQ_43, , , , 3, 0, z )," & "{143, 1, SE, DDR5_DQ_42, , , , 3, 0, z )," & "{144, 1, SE, DDR5_DQ_41, , , , 3, 0, z )," & "{145, 1, SE, DDR5_DQ_40, , , , 3, 0, z )," & "{146, 1, SE, DDR5_CS_N_3, , , , 3, 0, z )," & "{147, 1, SE, DDR5_CS_N_2, , , , 3, 0, z )," & "{148, 1, SE, DDR5_CS_N_1, , , , 3, 0, z )," & "{149, 1, SE, DDR5_ODT_1, , , , 3, 0, z )," & "{150, 1, SE, DDR5_CS_N_0, , , , 3, 0, z )," & "{151, 1, SE, DDR5_ODT_0, , , , 3, 0, z )," & "{152, 1, SE, DDR5_CS_N_7, , , , 3, 0, z )," & "{153, 1, SE, DDR5_CS_N_6, , , , 3, 0, z )," & "{155, 1, SE, DDR5_C_2, , , , 3, 0, z )," & "{156, 1, SE, DDR5_CS_N_5, , , , 3, 0, z )," & "{157, 1, SE, DDR5_ODT_3, , , , 3, 0, z )," & "{158, 1, SE, DDR4_CS_N_4, , , , 3, 0, z )," & "{159, 1, SE, DDR4_ODT_2, , , , 3, 0, z )," & "{160, 1, SE, DDR4_MA_15, , , , 3, 0, z )," & "{161, 1, SE, DDR4_MA_13, , , , 3, 0, z )," & "{162, 1, SE, DDR4_MA_16, , , , 3, 0, z )," & "{163, 1, SE, DDR4_MA_14, , , , 3, 0, z )," & "{164, 1, SE, DDR4_MA_10, , , , 3, 0, z )," & "{165, 1, SE, DDR4_BA_1, , , , 3, 0, z )," & "{166, 1, SE, DDR4_MA_0, , , , 3, 0, z )," & "{167, 1, SE, DDR4_BA_0, , , , 3, 0, z )," & "{168, 1, SE, DDR4_DQS_DN_4, , , , 3, 0, z )," & "{169, 1, SE, DDR4_DQS_DP_4, , , , 3, 0, z )," & "{170, 1, SE, DDR4_DQ_35, , , , 3, 0, z )," & "{171, 1, SE, DDR4_DQ_34, , , , 3, 0, z )," & "{172, 1, SE, DDR4_DQ_33, , , , 3, 0, z )," & "{173, 1, SE, DDR4_DQ_32, , , , 3, 0, z )," & "{174, 1, SE, DDR4_DQS_DN_13, , , , 3, 0, z )," & "{175, 1, SE, DDR4_DQS_DP_13, , , , 3, 0, z )," & "{176, 1, SE, DDR4_DQ_37, , , , 3, 0, z )," & "{177, 1, SE, DDR4_DQ_36, , , , 3, 0, z )," & "{178, 1, SE, DDR4_DQ_39, , , , 3, 0, z )," & "{179, 1, SE, DDR4_DQ_38, , , , 3, 0, z )," & "{180, 1, SE, DDR4_DQS_DN_6, , , , 3, 0, z )," & "{181, 1, SE, DDR4_DQS_DP_6, , , , 3, 0, z )," & "{182, 1, SE, DDR4_DQ_51, , , , 3, 0, z )," & "{183, 1, SE, DDR4_DQ_50, , , , 3, 0, z )," & "{184, 1, SE, DDR4_DQ_49, , , , 3, 0, z )," & "{185, 1, SE, DDR4_DQ_48, , , , 3, 0, z )," & "{186, 1, SE, DDR4_DQS_DN_15, , , , 3, 0, z )," & "{187, 1, SE, DDR4_DQS_DP_15, , , , 3, 0, z )," & "{188, 1, SE, DDR4_DQ_53, , , , 3, 0, z )," & "{189, 1, SE, DDR4_DQ_52, , , , 3, 0, z )," & "{190, 1, SE, DDR4_DQ_55, , , , 3, 0, z )," & "{191, 1, SE, DDR4_DQ_54, , , , 3, 0, z )," & "{192, 1, SE, DDR4_DQS_DN_16, , , , 3, 0, z )," & "{193, 1, SE, DDR4_DQS_DP_16, , , , 3, 0, z )," & "{194, 1, SE, DDR4_DQ_61, , , , 3, 0, z )," & "{195, 1, SE, DDR4_DQ_60, , , , 3, 0, z )," & "{196, 1, SE, DDR4_DQ_63, , , , 3, 0, z )," & "{197, 1, SE, DDR4_DQ_62, , , , 3, 0, z )," & "{198, 1, SE, DDR4_DQS_DN_7, , , , 3, 0, z )," & "{199, 1, SE, DDR4_DQS_DP_7, , , , 3, 0, z )," & "{200, 1, SE, DDR4_DQ_59, , , , 3, 0, z )," & "{201, 1, SE, DDR4_DQ_58, , , , 3, 0, z )," & "{202, 1, SE, DDR4_DQ_57, , , , 3, 0, z )," & "{203, 1, SE, DDR4_DQ_56, , , , 3, 0, z )," & "{204, 1, SE, DDR4_DQS_DN_14, , , , 3, 0, z )," & "{205, 1, SE, DDR4_DQS_DP_14, , , , 3, 0, z )," & "{206, 1, SE, DDR4_DQ_45, , , , 3, 0, z )," & "{207, 1, SE, DDR4_DQ_44, , , , 3, 0, z )," & "{208, 1, SE, DDR4_DQ_47, , , , 3, 0, z )," & "{209, 1, SE, DDR4_DQ_46, , , , 3, 0, z )," & "{210, 1, SE, DDR4_DQS_DN_5, , , , 3, 0, z )," & "{211, 1, SE, DDR4_DQS_DP_5, , , , 3, 0, z )," & "{212, 1, SE, DDR4_DQ_43, , , , 3, 0, z )," & "{213, 1, SE, DDR4_DQ_42, , , , 3, 0, z )," & "{214, 1, SE, DDR4_DQ_41, , , , 3, 0, z )," & "{215, 1, SE, DDR4_DQ_40, , , , 3, 0, z )," & "{216, 1, SE, DDR4_CS_N_3, , , , 3, 0, z )," & "{217, 1, SE, DDR4_CS_N_2, , , , 3, 0, z )," & "{218, 1, SE, DDR4_CS_N_1, , , , 3, 0, z )," & "{219, 1, SE, DDR4_ODT_1, , , , 3, 0, z )," & "{220, 1, SE, DDR4_CS_N_0, , , , 3, 0, z )," & "{221, 1, SE, DDR4_ODT_0, , , , 3, 0, z )," & "{222, 1, SE, DDR4_CS_N_7, , , , 3, 0, z )," & "{223, 1, SE, DDR4_CS_N_6, , , , 3, 0, z )," & "{225, 1, SE, DDR4_C_2, , , , 3, 0, z )," & "{226, 1, SE, DDR4_CS_N_5, , , , 3, 0, z )," & "{227, 1, SE, DDR4_ODT_3, , , , 3, 0, z )," & "{228, 1, SE, DDR4_MA_8, , , , 3, 0, z )," & "{229, 1, SE, DDR4_MA_7, , , , 3, 0, z )," & "{230, 1, SE, DDR4_MA_5, , , , 3, 0, z )," & "{231, 1, SE, DDR4_MA_6, , , , 3, 0, z )," & "{232, 1, SE, DDR4_MA_2, , , , 3, 0, z )," & "{233, 1, SE, DDR4_MA_4, , , , 3, 0, z )," & "{234, 1, SE, DDR4_MA_1, , , , 3, 0, z )," & "{235, 1, SE, DDR4_MA_3, , , , 3, 0, z )," & "{236, 1, SE, DDR4_PAR, , , , 3, 0, z )," & "{238, 1, SE, DDR4_DQS_DN_17, , , , 3, 0, z )," & "{239, 1, SE, DDR4_DQS_DP_17, , , , 3, 0, z )," & "{240, 1, SE, DDR4_ECC_5, , , , 3, 0, z )," & "{241, 1, SE, DDR4_ECC_4, , , , 3, 0, z )," & "{242, 1, SE, DDR4_ECC_7, , , , 3, 0, z )," & "{243, 1, SE, DDR4_ECC_6, , , , 3, 0, z )," & "{244, 1, SE, DDR4_DQS_DN_8, , , , 3, 0, z )," & "{245, 1, SE, DDR4_DQS_DP_8, , , , 3, 0, z )," & "{246, 1, SE, DDR4_ECC_3, , , , 3, 0, z )," & "{247, 1, SE, DDR4_ECC_2, , , , 3, 0, z )," & "{248, 1, SE, DDR4_ECC_1, , , , 3, 0, z )," & "{249, 1, SE, DDR4_ECC_0, , , , 3, 0, z )," & "{250, 1, SE, DDR4_DQS_DN_11, , , , 3, 0, z )," & "{251, 1, SE, DDR4_DQS_DP_11, , , , 3, 0, z )," & "{252, 1, SE, DDR4_DQ_21, , , , 3, 0, z )," & "{253, 1, SE, DDR4_DQ_20, , , , 3, 0, z )," & "{254, 1, SE, DDR4_DQ_23, , , , 3, 0, z )," & "{255, 1, SE, DDR4_DQ_22, , , , 3, 0, z )," & "{256, 1, SE, DDR4_DQS_DN_2, , , , 3, 0, z )," & "{257, 1, SE, DDR4_DQS_DP_2, , , , 3, 0, z )," & "{258, 1, SE, DDR4_DQ_19, , , , 3, 0, z )," & "{259, 1, SE, DDR4_DQ_18, , , , 3, 0, z )," & "{260, 1, SE, DDR4_DQ_17, , , , 3, 0, z )," & "{261, 1, SE, DDR4_DQ_16, , , , 3, 0, z )," & "{262, 1, SE, DDR4_DQS_DN_9, , , , 3, 0, z )," & "{263, 1, SE, DDR4_DQS_DP_9, , , , 3, 0, z )," & "{264, 1, SE, DDR4_DQ_5, , , , 3, 0, z )," & "{265, 1, SE, DDR4_DQ_4, , , , 3, 0, z )," & "{266, 1, SE, DDR4_DQ_7, , , , 3, 0, z )," & "{267, 1, SE, DDR4_DQ_6, , , , 3, 0, z )," & "{268, 1, SE, DDR4_DQS_DN_0, , , , 3, 0, z )," & "{269, 1, SE, DDR4_DQS_DP_0, , , , 3, 0, z )," & "{270, 1, SE, DDR4_DQ_3, , , , 3, 0, z )," & "{271, 1, SE, DDR4_DQ_2, , , , 3, 0, z )," & "{272, 1, SE, DDR4_DQ_1, , , , 3, 0, z )," & "{273, 1, SE, DDR4_DQ_0, , , , 3, 0, z )," & "{274, 1, SE, DDR4_DQS_DN_1, , , , 3, 0, z )," & "{275, 1, SE, DDR4_DQS_DP_1, , , , 3, 0, z )," & "{276, 1, SE, DDR4_DQ_11, , , , 3, 0, z )," & "{277, 1, SE, DDR4_DQ_10, , , , 3, 0, z )," & "{278, 1, SE, DDR4_DQ_9, , , , 3, 0, z )," & "{279, 1, SE, DDR4_DQ_8, , , , 3, 0, z )," & "{280, 1, SE, DDR4_DQS_DN_10, , , , 3, 0, z )," & "{281, 1, SE, DDR4_DQS_DP_10, , , , 3, 0, z )," & "{282, 1, SE, DDR4_DQ_13, , , , 3, 0, z )," & "{283, 1, SE, DDR4_DQ_12, , , , 3, 0, z )," & "{284, 1, SE, DDR4_DQ_15, , , , 3, 0, z )," & "{285, 1, SE, DDR4_DQ_14, , , , 3, 0, z )," & "{286, 1, SE, DDR4_DQS_DN_3, , , , 3, 0, z )," & "{287, 1, SE, DDR4_DQS_DP_3, , , , 3, 0, z )," & "{288, 1, SE, DDR4_DQ_27, , , , 3, 0, z )," & "{289, 1, SE, DDR4_DQ_26, , , , 3, 0, z )," & "{290, 1, SE, DDR4_DQ_25, , , , 3, 0, z )," & "{291, 1, SE, DDR4_DQ_24, , , , 3, 0, z )," & "{292, 1, SE, DDR4_DQS_DN_12, , , , 3, 0, z )," & "{293, 1, SE, DDR4_DQS_DP_12, , , , 3, 0, z )," & "{294, 1, SE, DDR4_DQ_29, , , , 3, 0, z )," & "{295, 1, SE, DDR4_DQ_28, , , , 3, 0, z )," & "{296, 1, SE, DDR4_DQ_31, , , , 3, 0, z )," & "{297, 1, SE, DDR4_DQ_30, , , , 3, 0, z )," & "{298, 1, SE, DDR4_CKE_1, , , , 3, 0, z )," & "{299, 1, SE, DDR4_CKE_0, , , , 3, 0, z )," & "{300, 1, SE, DDR4_CKE_2, , , , 3, 0, z )," & "{302, 1, SE, DDR4_CKE_3, , , , 3, 0, z )," & "{304, 1, SE, DDR4_ACT_N, , , , 3, 0, z )," & "{305, 1, SE, DDR4_BG_0, , , , 3, 0, z )," & "{306, 1, SE, DDR4_BG_1, , , , 3, 0, z )," & "{307, 1, SE, DDR4_MA_11, , , , 3, 0, z )," & "{308, 1, SE, DDR4_MA_9, , , , 3, 0, z )," & "{309, 1, SE, DDR4_MA_12, , , , 3, 0, z )," & "{310, 1, SE, DDR3_MA_8, , , , 3, 0, z )," & "{311, 1, SE, DDR3_MA_7, , , , 3, 0, z )," & "{312, 1, SE, DDR3_MA_5, , , , 3, 0, z )," & "{313, 1, SE, DDR3_MA_6, , , , 3, 0, z )," & "{314, 1, SE, DDR3_MA_2, , , , 3, 0, z )," & "{315, 1, SE, DDR3_MA_4, , , , 3, 0, z )," & "{316, 1, SE, DDR3_MA_1, , , , 3, 0, z )," & "{317, 1, SE, DDR3_MA_3, , , , 3, 0, z )," & "{318, 1, SE, DDR3_PAR, , , , 3, 0, z )," & "{320, 1, SE, DDR3_DQS_DN_17, , , , 3, 0, z )," & "{321, 1, SE, DDR3_DQS_DP_17, , , , 3, 0, z )," & "{322, 1, SE, DDR3_ECC_5, , , , 3, 0, z )," & "{323, 1, SE, DDR3_ECC_4, , , , 3, 0, z )," & "{324, 1, SE, DDR3_ECC_7, , , , 3, 0, z )," & "{325, 1, SE, DDR3_ECC_6, , , , 3, 0, z )," & "{326, 1, SE, DDR3_DQS_DN_8, , , , 3, 0, z )," & "{327, 1, SE, DDR3_DQS_DP_8, , , , 3, 0, z )," & "{328, 1, SE, DDR3_ECC_3, , , , 3, 0, z )," & "{329, 1, SE, DDR3_ECC_2, , , , 3, 0, z )," & "{330, 1, SE, DDR3_ECC_1, , , , 3, 0, z )," & "{331, 1, SE, DDR3_ECC_0, , , , 3, 0, z )," & "{332, 1, SE, DDR3_DQS_DN_11, , , , 3, 0, z )," & "{333, 1, SE, DDR3_DQS_DP_11, , , , 3, 0, z )," & "{334, 1, SE, DDR3_DQ_21, , , , 3, 0, z )," & "{335, 1, SE, DDR3_DQ_20, , , , 3, 0, z )," & "{336, 1, SE, DDR3_DQ_23, , , , 3, 0, z )," & "{337, 1, SE, DDR3_DQ_22, , , , 3, 0, z )," & "{338, 1, SE, DDR3_DQS_DN_2, , , , 3, 0, z )," & "{339, 1, SE, DDR3_DQS_DP_2, , , , 3, 0, z )," & "{340, 1, SE, DDR3_DQ_19, , , , 3, 0, z )," & "{341, 1, SE, DDR3_DQ_18, , , , 3, 0, z )," & "{342, 1, SE, DDR3_DQ_17, , , , 3, 0, z )," & "{343, 1, SE, DDR3_DQ_16, , , , 3, 0, z )," & "{344, 1, SE, DDR3_DQS_DN_9, , , , 3, 0, z )," & "{345, 1, SE, DDR3_DQS_DP_9, , , , 3, 0, z )," & "{346, 1, SE, DDR3_DQ_5, , , , 3, 0, z )," & "{347, 1, SE, DDR3_DQ_4, , , , 3, 0, z )," & "{348, 1, SE, DDR3_DQ_7, , , , 3, 0, z )," & "{349, 1, SE, DDR3_DQ_6, , , , 3, 0, z )," & "{350, 1, SE, DDR3_DQS_DN_0, , , , 3, 0, z )," & "{351, 1, SE, DDR3_DQS_DP_0, , , , 3, 0, z )," & "{352, 1, SE, DDR3_DQ_3, , , , 3, 0, z )," & "{353, 1, SE, DDR3_DQ_2, , , , 3, 0, z )," & "{354, 1, SE, DDR3_DQ_1, , , , 3, 0, z )," & "{355, 1, SE, DDR3_DQ_0, , , , 3, 0, z )," & "{356, 1, SE, DDR3_DQS_DN_1, , , , 3, 0, z )," & "{357, 1, SE, DDR3_DQS_DP_1, , , , 3, 0, z )," & "{358, 1, SE, DDR3_DQ_11, , , , 3, 0, z )," & "{359, 1, SE, DDR3_DQ_10, , , , 3, 0, z )," & "{360, 1, SE, DDR3_DQ_9, , , , 3, 0, z )," & "{361, 1, SE, DDR3_DQ_8, , , , 3, 0, z )," & "{362, 1, SE, DDR3_DQS_DN_10, , , , 3, 0, z )," & "{363, 1, SE, DDR3_DQS_DP_10, , , , 3, 0, z )," & "{364, 1, SE, DDR3_DQ_13, , , , 3, 0, z )," & "{365, 1, SE, DDR3_DQ_12, , , , 3, 0, z )," & "{366, 1, SE, DDR3_DQ_15, , , , 3, 0, z )," & "{367, 1, SE, DDR3_DQ_14, , , , 3, 0, z )," & "{368, 1, SE, DDR3_DQS_DN_3, , , , 3, 0, z )," & "{369, 1, SE, DDR3_DQS_DP_3, , , , 3, 0, z )," & "{370, 1, SE, DDR3_DQ_27, , , , 3, 0, z )," & "{371, 1, SE, DDR3_DQ_26, , , , 3, 0, z )," & "{372, 1, SE, DDR3_DQ_25, , , , 3, 0, z )," & "{373, 1, SE, DDR3_DQ_24, , , , 3, 0, z )," & "{374, 1, SE, DDR3_DQS_DN_12, , , , 3, 0, z )," & "{375, 1, SE, DDR3_DQS_DP_12, , , , 3, 0, z )," & "{376, 1, SE, DDR3_DQ_29, , , , 3, 0, z )," & "{377, 1, SE, DDR3_DQ_28, , , , 3, 0, z )," & "{378, 1, SE, DDR3_DQ_31, , , , 3, 0, z )," & "{379, 1, SE, DDR3_DQ_30, , , , 3, 0, z )," & "{380, 1, SE, DDR3_CKE_1, , , , 3, 0, z )," & "{381, 1, SE, DDR3_CKE_0, , , , 3, 0, z )," & "{382, 1, SE, DDR3_CKE_2, , , , 3, 0, z )," & "{384, 1, SE, DDR3_CKE_3, , , , 3, 0, z )," & "{386, 1, SE, DDR3_ACT_N, , , , 3, 0, z )," & "{387, 1, SE, DDR3_BG_0, , , , 3, 0, z )," & "{388, 1, SE, DDR3_BG_1, , , , 3, 0, z )," & "{389, 1, SE, DDR3_MA_11, , , , 3, 0, z )," & "{390, 1, SE, DDR3_MA_9, , , , 3, 0, z )," & "{391, 1, SE, DDR3_MA_12, , , , 3, 0, z )," & "{392, 1, SE, DDR3_CS_N_4, , , , 3, 0, z )," & "{393, 1, SE, DDR3_ODT_2, , , , 3, 0, z )," & "{394, 1, SE, DDR3_MA_15, , , , 3, 0, z )," & "{395, 1, SE, DDR3_MA_13, , , , 3, 0, z )," & "{396, 1, SE, DDR3_MA_16, , , , 3, 0, z )," & "{397, 1, SE, DDR3_MA_14, , , , 3, 0, z )," & "{398, 1, SE, DDR3_MA_10, , , , 3, 0, z )," & "{399, 1, SE, DDR3_BA_1, , , , 3, 0, z )," & "{400, 1, SE, DDR3_MA_0, , , , 3, 0, z )," & "{401, 1, SE, DDR3_BA_0, , , , 3, 0, z )," & "{402, 1, SE, DDR3_DQS_DN_4, , , , 3, 0, z )," & "{403, 1, SE, DDR3_DQS_DP_4, , , , 3, 0, z )," & "{404, 1, SE, DDR3_DQ_35, , , , 3, 0, z )," & "{405, 1, SE, DDR3_DQ_34, , , , 3, 0, z )," & "{406, 1, SE, DDR3_DQ_33, , , , 3, 0, z )," & "{407, 1, SE, DDR3_DQ_32, , , , 3, 0, z )," & "{408, 1, SE, DDR3_DQS_DN_13, , , , 3, 0, z )," & "{409, 1, SE, DDR3_DQS_DP_13, , , , 3, 0, z )," & "{410, 1, SE, DDR3_DQ_37, , , , 3, 0, z )," & "{411, 1, SE, DDR3_DQ_36, , , , 3, 0, z )," & "{412, 1, SE, DDR3_DQ_39, , , , 3, 0, z )," & "{413, 1, SE, DDR3_DQ_38, , , , 3, 0, z )," & "{414, 1, SE, DDR3_DQS_DN_6, , , , 3, 0, z )," & "{415, 1, SE, DDR3_DQS_DP_6, , , , 3, 0, z )," & "{416, 1, SE, DDR3_DQ_51, , , , 3, 0, z )," & "{417, 1, SE, DDR3_DQ_50, , , , 3, 0, z )," & "{418, 1, SE, DDR3_DQ_49, , , , 3, 0, z )," & "{419, 1, SE, DDR3_DQ_48, , , , 3, 0, z )," & "{420, 1, SE, DDR3_DQS_DN_15, , , , 3, 0, z )," & "{421, 1, SE, DDR3_DQS_DP_15, , , , 3, 0, z )," & "{422, 1, SE, DDR3_DQ_53, , , , 3, 0, z )," & "{423, 1, SE, DDR3_DQ_52, , , , 3, 0, z )," & "{424, 1, SE, DDR3_DQ_55, , , , 3, 0, z )," & "{425, 1, SE, DDR3_DQ_54, , , , 3, 0, z )," & "{426, 1, SE, DDR3_DQS_DN_16, , , , 3, 0, z )," & "{427, 1, SE, DDR3_DQS_DP_16, , , , 3, 0, z )," & "{428, 1, SE, DDR3_DQ_61, , , , 3, 0, z )," & "{429, 1, SE, DDR3_DQ_60, , , , 3, 0, z )," & "{430, 1, SE, DDR3_DQ_63, , , , 3, 0, z )," & "{431, 1, SE, DDR3_DQ_62, , , , 3, 0, z )," & "{432, 1, SE, DDR3_DQS_DN_7, , , , 3, 0, z )," & "{433, 1, SE, DDR3_DQS_DP_7, , , , 3, 0, z )," & "{434, 1, SE, DDR3_DQ_59, , , , 3, 0, z )," & "{435, 1, SE, DDR3_DQ_58, , , , 3, 0, z )," & "{436, 1, SE, DDR3_DQ_57, , , , 3, 0, z )," & "{437, 1, SE, DDR3_DQ_56, , , , 3, 0, z )," & "{438, 1, SE, DDR3_DQS_DN_14, , , , 3, 0, z )," & "{439, 1, SE, DDR3_DQS_DP_14, , , , 3, 0, z )," & "{440, 1, SE, DDR3_DQ_45, , , , 3, 0, z )," & "{441, 1, SE, DDR3_DQ_44, , , , 3, 0, z )," & "{442, 1, SE, DDR3_DQ_47, , , , 3, 0, z )," & "{443, 1, SE, DDR3_DQ_46, , , , 3, 0, z )," & "{444, 1, SE, DDR3_DQS_DN_5, , , , 3, 0, z )," & "{445, 1, SE, DDR3_DQS_DP_5, , , , 3, 0, z )," & "{446, 1, SE, DDR3_DQ_43, , , , 3, 0, z )," & "{447, 1, SE, DDR3_DQ_42, , , , 3, 0, z )," & "{448, 1, SE, DDR3_DQ_41, , , , 3, 0, z )," & "{449, 1, SE, DDR3_DQ_40, , , , 3, 0, z )," & "{450, 1, SE, DDR3_CS_N_3, , , , 3, 0, z )," & "{451, 1, SE, DDR3_CS_N_2, , , , 3, 0, z )," & "{452, 1, SE, DDR3_CS_N_1, , , , 3, 0, z )," & "{453, 1, SE, DDR3_ODT_1, , , , 3, 0, z )," & "{454, 1, SE, DDR3_CS_N_0, , , , 3, 0, z )," & "{455, 1, SE, DDR3_ODT_0, , , , 3, 0, z )," & "{456, 1, SE, DDR3_CS_N_7, , , , 3, 0, z )," & "{457, 1, SE, DDR3_CS_N_6, , , , 3, 0, z )," & "{459, 1, SE, DDR3_C_2, , , , 3, 0, z )," & "{460, 1, SE, DDR3_CS_N_5, , , , 3, 0, z )," & "{461, 1, SE, DDR3_ODT_3, , , , 3, 0, z )," & "{462, 1, SE, DDR3_CLK_DN_2, , , , 3, 0, z )," & "{463, 1, SE, DDR3_CLK_DN_0, , , , 3, 0, z )," & "{464, 1, SE, DDR3_CLK_DP_0, , , , 3, 0, z )," & "{465, 1, SE, DDR3_CLK_DP_2, , , , 3, 0, z )," & "{466, 1, SE, DDR3_CLK_DN_3, , , , 3, 0, z )," & "{467, 1, SE, DDR3_CLK_DN_1, , , , 3, 0, z )," & "{468, 1, SE, DDR3_CLK_DP_1, , , , 3, 0, z )," & "{469, 1, SE, DDR3_CLK_DP_3, , , , 3, 0, z )," & "{470, 1, SE, DDR4_CLK_DN_2, , , , 3, 0, z )," & "{471, 1, SE, DDR4_CLK_DN_0, , , , 3, 0, z )," & "{472, 1, SE, DDR4_CLK_DP_0, , , , 3, 0, z )," & "{473, 1, SE, DDR4_CLK_DP_2, , , , 3, 0, z )," & "{474, 1, SE, DDR4_CLK_DN_3, , , , 3, 0, z )," & "{475, 1, SE, DDR4_CLK_DN_1, , , , 3, 0, z )," & "{476, 1, SE, DDR4_CLK_DP_1, , , , 3, 0, z )," & "{477, 1, SE, DDR4_CLK_DP_3, , , , 3, 0, z )," & "{478, 1, SE, DDR5_CLK_DN_2, , , , 3, 0, z )," & "{479, 1, SE, DDR5_CLK_DN_0, , , , 3, 0, z )," & "{480, 1, SE, DDR5_CLK_DP_0, , , , 3, 0, z )," & "{481, 1, SE, DDR5_CLK_DP_2, , , , 3, 0, z )," & "{482, 1, SE, DDR5_CLK_DN_3, , , , 3, 0, z )," & "{483, 1, SE, DDR5_CLK_DN_1, , , , 3, 0, z )," & "{484, 1, SE, DDR5_CLK_DP_1, , , , 3, 0, z )," & "{485, 1, SE, DDR5_CLK_DP_3, , , , 3, 0, z )," & "{491, 1, SE, DDR012_RESET_N, , , , 489, 0, z )," & "{492, 1, SE, DDR2_MA_8, , , , 489, 0, z )," & "{493, 1, SE, DDR2_MA_7, , , , 489, 0, z )," & "{494, 1, SE, DDR2_MA_5, , , , 489, 0, z )," & "{495, 1, SE, DDR2_MA_6, , , , 489, 0, z )," & "{496, 1, SE, DDR2_MA_2, , , , 489, 0, z )," & "{497, 1, SE, DDR2_MA_4, , , , 489, 0, z )," & "{498, 1, SE, DDR2_MA_1, , , , 489, 0, z )," & "{499, 1, SE, DDR2_MA_3, , , , 489, 0, z )," & "{500, 1, SE, DDR2_PAR, , , , 489, 0, z )," & "{502, 1, SE, DDR2_DQS_DN_17, , , , 489, 0, z )," & "{503, 1, SE, DDR2_DQS_DP_17, , , , 489, 0, z )," & "{504, 1, SE, DDR2_ECC_5, , , , 489, 0, z )," & "{505, 1, SE, DDR2_ECC_4, , , , 489, 0, z )," & "{506, 1, SE, DDR2_ECC_7, , , , 489, 0, z )," & "{507, 1, SE, DDR2_ECC_6, , , , 489, 0, z )," & "{508, 1, SE, DDR2_DQS_DN_8, , , , 489, 0, z )," & "{509, 1, SE, DDR2_DQS_DP_8, , , , 489, 0, z )," & "{510, 1, SE, DDR2_ECC_3, , , , 489, 0, z )," & "{511, 1, SE, DDR2_ECC_2, , , , 489, 0, z )," & "{512, 1, SE, DDR2_ECC_1, , , , 489, 0, z )," & "{513, 1, SE, DDR2_ECC_0, , , , 489, 0, z )," & "{514, 1, SE, DDR2_DQS_DN_11, , , , 489, 0, z )," & "{515, 1, SE, DDR2_DQS_DP_11, , , , 489, 0, z )," & "{516, 1, SE, DDR2_DQ_21, , , , 489, 0, z )," & "{517, 1, SE, DDR2_DQ_20, , , , 489, 0, z )," & "{518, 1, SE, DDR2_DQ_23, , , , 489, 0, z )," & "{519, 1, SE, DDR2_DQ_22, , , , 489, 0, z )," & "{520, 1, SE, DDR2_DQS_DN_2, , , , 489, 0, z )," & "{521, 1, SE, DDR2_DQS_DP_2, , , , 489, 0, z )," & "{522, 1, SE, DDR2_DQ_19, , , , 489, 0, z )," & "{523, 1, SE, DDR2_DQ_18, , , , 489, 0, z )," & "{524, 1, SE, DDR2_DQ_17, , , , 489, 0, z )," & "{525, 1, SE, DDR2_DQ_16, , , , 489, 0, z )," & "{526, 1, SE, DDR2_DQS_DN_9, , , , 489, 0, z )," & "{527, 1, SE, DDR2_DQS_DP_9, , , , 489, 0, z )," & "{528, 1, SE, DDR2_DQ_5, , , , 489, 0, z )," & "{529, 1, SE, DDR2_DQ_4, , , , 489, 0, z )," & "{530, 1, SE, DDR2_DQ_7, , , , 489, 0, z )," & "{531, 1, SE, DDR2_DQ_6, , , , 489, 0, z )," & "{532, 1, SE, DDR2_DQS_DN_0, , , , 489, 0, z )," & "{533, 1, SE, DDR2_DQS_DP_0, , , , 489, 0, z )," & "{534, 1, SE, DDR2_DQ_3, , , , 489, 0, z )," & "{535, 1, SE, DDR2_DQ_2, , , , 489, 0, z )," & "{536, 1, SE, DDR2_DQ_1, , , , 489, 0, z )," & "{537, 1, SE, DDR2_DQ_0, , , , 489, 0, z )," & "{538, 1, SE, DDR2_DQS_DN_1, , , , 489, 0, z )," & "{539, 1, SE, DDR2_DQS_DP_1, , , , 489, 0, z )," & "{540, 1, SE, DDR2_DQ_11, , , , 489, 0, z )," & "{541, 1, SE, DDR2_DQ_10, , , , 489, 0, z )," & "{542, 1, SE, DDR2_DQ_9, , , , 489, 0, z )," & "{543, 1, SE, DDR2_DQ_8, , , , 489, 0, z )," & "{544, 1, SE, DDR2_DQS_DN_10, , , , 489, 0, z )," & "{545, 1, SE, DDR2_DQS_DP_10, , , , 489, 0, z )," & "{546, 1, SE, DDR2_DQ_13, , , , 489, 0, z )," & "{547, 1, SE, DDR2_DQ_12, , , , 489, 0, z )," & "{548, 1, SE, DDR2_DQ_15, , , , 489, 0, z )," & "{549, 1, SE, DDR2_DQ_14, , , , 489, 0, z )," & "{550, 1, SE, DDR2_DQS_DN_3, , , , 489, 0, z )," & "{551, 1, SE, DDR2_DQS_DP_3, , , , 489, 0, z )," & "{552, 1, SE, DDR2_DQ_27, , , , 489, 0, z )," & "{553, 1, SE, DDR2_DQ_26, , , , 489, 0, z )," & "{554, 1, SE, DDR2_DQ_25, , , , 489, 0, z )," & "{555, 1, SE, DDR2_DQ_24, , , , 489, 0, z )," & "{556, 1, SE, DDR2_DQS_DN_12, , , , 489, 0, z )," & "{557, 1, SE, DDR2_DQS_DP_12, , , , 489, 0, z )," & "{558, 1, SE, DDR2_DQ_29, , , , 489, 0, z )," & "{559, 1, SE, DDR2_DQ_28, , , , 489, 0, z )," & "{560, 1, SE, DDR2_DQ_31, , , , 489, 0, z )," & "{561, 1, SE, DDR2_DQ_30, , , , 489, 0, z )," & "{562, 1, SE, DDR2_CKE_1, , , , 489, 0, z )," & "{563, 1, SE, DDR2_CKE_0, , , , 489, 0, z )," & "{564, 1, SE, DDR2_CKE_2, , , , 489, 0, z )," & "{566, 1, SE, DDR2_CKE_3, , , , 489, 0, z )," & "{568, 1, SE, DDR2_ACT_N, , , , 489, 0, z )," & "{569, 1, SE, DDR2_BG_0, , , , 489, 0, z )," & "{570, 1, SE, DDR2_BG_1, , , , 489, 0, z )," & "{571, 1, SE, DDR2_MA_11, , , , 489, 0, z )," & "{572, 1, SE, DDR2_MA_9, , , , 489, 0, z )," & "{573, 1, SE, DDR2_MA_12, , , , 489, 0, z )," & "{574, 1, SE, DDR2_CS_N_4, , , , 489, 0, z )," & "{575, 1, SE, DDR2_ODT_2, , , , 489, 0, z )," & "{576, 1, SE, DDR2_MA_15, , , , 489, 0, z )," & "{577, 1, SE, DDR2_MA_13, , , , 489, 0, z )," & "{578, 1, SE, DDR2_MA_16, , , , 489, 0, z )," & "{579, 1, SE, DDR2_MA_14, , , , 489, 0, z )," & "{580, 1, SE, DDR2_MA_10, , , , 489, 0, z )," & "{581, 1, SE, DDR2_BA_1, , , , 489, 0, z )," & "{582, 1, SE, DDR2_MA_0, , , , 489, 0, z )," & "{583, 1, SE, DDR2_BA_0, , , , 489, 0, z )," & "{584, 1, SE, DDR2_DQS_DN_4, , , , 489, 0, z )," & "{585, 1, SE, DDR2_DQS_DP_4, , , , 489, 0, z )," & "{586, 1, SE, DDR2_DQ_35, , , , 489, 0, z )," & "{587, 1, SE, DDR2_DQ_34, , , , 489, 0, z )," & "{588, 1, SE, DDR2_DQ_33, , , , 489, 0, z )," & "{589, 1, SE, DDR2_DQ_32, , , , 489, 0, z )," & "{590, 1, SE, DDR2_DQS_DN_13, , , , 489, 0, z )," & "{591, 1, SE, DDR2_DQS_DP_13, , , , 489, 0, z )," & "{592, 1, SE, DDR2_DQ_37, , , , 489, 0, z )," & "{593, 1, SE, DDR2_DQ_36, , , , 489, 0, z )," & "{594, 1, SE, DDR2_DQ_39, , , , 489, 0, z )," & "{595, 1, SE, DDR2_DQ_38, , , , 489, 0, z )," & "{596, 1, SE, DDR2_DQS_DN_6, , , , 489, 0, z )," & "{597, 1, SE, DDR2_DQS_DP_6, , , , 489, 0, z )," & "{598, 1, SE, DDR2_DQ_51, , , , 489, 0, z )," & "{599, 1, SE, DDR2_DQ_50, , , , 489, 0, z )," & "{600, 1, SE, DDR2_DQ_49, , , , 489, 0, z )," & "{601, 1, SE, DDR2_DQ_48, , , , 489, 0, z )," & "{602, 1, SE, DDR2_DQS_DN_15, , , , 489, 0, z )," & "{603, 1, SE, DDR2_DQS_DP_15, , , , 489, 0, z )," & "{604, 1, SE, DDR2_DQ_53, , , , 489, 0, z )," & "{605, 1, SE, DDR2_DQ_52, , , , 489, 0, z )," & "{606, 1, SE, DDR2_DQ_55, , , , 489, 0, z )," & "{607, 1, SE, DDR2_DQ_54, , , , 489, 0, z )," & "{608, 1, SE, DDR2_DQS_DN_16, , , , 489, 0, z )," & "{609, 1, SE, DDR2_DQS_DP_16, , , , 489, 0, z )," & "{610, 1, SE, DDR2_DQ_61, , , , 489, 0, z )," & "{611, 1, SE, DDR2_DQ_60, , , , 489, 0, z )," & "{612, 1, SE, DDR2_DQ_63, , , , 489, 0, z )," & "{613, 1, SE, DDR2_DQ_62, , , , 489, 0, z )," & "{614, 1, SE, DDR2_DQS_DN_7, , , , 489, 0, z )," & "{615, 1, SE, DDR2_DQS_DP_7, , , , 489, 0, z )," & "{616, 1, SE, DDR2_DQ_59, , , , 489, 0, z )," & "{617, 1, SE, DDR2_DQ_58, , , , 489, 0, z )," & "{618, 1, SE, DDR2_DQ_57, , , , 489, 0, z )," & "{619, 1, SE, DDR2_DQ_56, , , , 489, 0, z )," & "{620, 1, SE, DDR2_DQS_DN_14, , , , 489, 0, z )," & "{621, 1, SE, DDR2_DQS_DP_14, , , , 489, 0, z )," & "{622, 1, SE, DDR2_DQ_45, , , , 489, 0, z )," & "{623, 1, SE, DDR2_DQ_44, , , , 489, 0, z )," & "{624, 1, SE, DDR2_DQ_47, , , , 489, 0, z )," & "{625, 1, SE, DDR2_DQ_46, , , , 489, 0, z )," & "{626, 1, SE, DDR2_DQS_DN_5, , , , 489, 0, z )," & "{627, 1, SE, DDR2_DQS_DP_5, , , , 489, 0, z )," & "{628, 1, SE, DDR2_DQ_43, , , , 489, 0, z )," & "{629, 1, SE, DDR2_DQ_42, , , , 489, 0, z )," & "{630, 1, SE, DDR2_DQ_41, , , , 489, 0, z )," & "{631, 1, SE, DDR2_DQ_40, , , , 489, 0, z )," & "{632, 1, SE, DDR2_CS_N_3, , , , 489, 0, z )," & "{633, 1, SE, DDR2_CS_N_2, , , , 489, 0, z )," & "{634, 1, SE, DDR2_CS_N_1, , , , 489, 0, z )," & "{635, 1, SE, DDR2_ODT_1, , , , 489, 0, z )," & "{636, 1, SE, DDR2_CS_N_0, , , , 489, 0, z )," & "{637, 1, SE, DDR2_ODT_0, , , , 489, 0, z )," & "{638, 1, SE, DDR2_CS_N_7, , , , 489, 0, z )," & "{639, 1, SE, DDR2_CS_N_6, , , , 489, 0, z )," & "{641, 1, SE, DDR2_C_2, , , , 489, 0, z )," & "{642, 1, SE, DDR2_CS_N_5, , , , 489, 0, z )," & "{643, 1, SE, DDR2_ODT_3, , , , 489, 0, z )," & "{644, 1, SE, DDR1_CS_N_4, , , , 489, 0, z )," & "{645, 1, SE, DDR1_ODT_2, , , , 489, 0, z )," & "{646, 1, SE, DDR1_MA_15, , , , 489, 0, z )," & "{647, 1, SE, DDR1_MA_13, , , , 489, 0, z )," & "{648, 1, SE, DDR1_MA_16, , , , 489, 0, z )," & "{649, 1, SE, DDR1_MA_14, , , , 489, 0, z )," & "{650, 1, SE, DDR1_MA_10, , , , 489, 0, z )," & "{651, 1, SE, DDR1_BA_1, , , , 489, 0, z )," & "{652, 1, SE, DDR1_MA_0, , , , 489, 0, z )," & "{653, 1, SE, DDR1_BA_0, , , , 489, 0, z )," & "{654, 1, SE, DDR1_DQS_DN_4, , , , 489, 0, z )," & "{655, 1, SE, DDR1_DQS_DP_4, , , , 489, 0, z )," & "{656, 1, SE, DDR1_DQ_35, , , , 489, 0, z )," & "{657, 1, SE, DDR1_DQ_34, , , , 489, 0, z )," & "{658, 1, SE, DDR1_DQ_33, , , , 489, 0, z )," & "{659, 1, SE, DDR1_DQ_32, , , , 489, 0, z )," & "{660, 1, SE, DDR1_DQS_DN_13, , , , 489, 0, z )," & "{661, 1, SE, DDR1_DQS_DP_13, , , , 489, 0, z )," & "{662, 1, SE, DDR1_DQ_37, , , , 489, 0, z )," & "{663, 1, SE, DDR1_DQ_36, , , , 489, 0, z )," & "{664, 1, SE, DDR1_DQ_39, , , , 489, 0, z )," & "{665, 1, SE, DDR1_DQ_38, , , , 489, 0, z )," & "{666, 1, SE, DDR1_DQS_DN_6, , , , 489, 0, z )," & "{667, 1, SE, DDR1_DQS_DP_6, , , , 489, 0, z )," & "{668, 1, SE, DDR1_DQ_51, , , , 489, 0, z )," & "{669, 1, SE, DDR1_DQ_50, , , , 489, 0, z )," & "{670, 1, SE, DDR1_DQ_49, , , , 489, 0, z )," & "{671, 1, SE, DDR1_DQ_48, , , , 489, 0, z )," & "{672, 1, SE, DDR1_DQS_DN_15, , , , 489, 0, z )," & "{673, 1, SE, DDR1_DQS_DP_15, , , , 489, 0, z )," & "{674, 1, SE, DDR1_DQ_53, , , , 489, 0, z )," & "{675, 1, SE, DDR1_DQ_52, , , , 489, 0, z )," & "{676, 1, SE, DDR1_DQ_55, , , , 489, 0, z )," & "{677, 1, SE, DDR1_DQ_54, , , , 489, 0, z )," & "{678, 1, SE, DDR1_DQS_DN_16, , , , 489, 0, z )," & "{679, 1, SE, DDR1_DQS_DP_16, , , , 489, 0, z )," & "{680, 1, SE, DDR1_DQ_61, , , , 489, 0, z )," & "{681, 1, SE, DDR1_DQ_60, , , , 489, 0, z )," & "{682, 1, SE, DDR1_DQ_63, , , , 489, 0, z )," & "{683, 1, SE, DDR1_DQ_62, , , , 489, 0, z )," & "{684, 1, SE, DDR1_DQS_DN_7, , , , 489, 0, z )," & "{685, 1, SE, DDR1_DQS_DP_7, , , , 489, 0, z )," & "{686, 1, SE, DDR1_DQ_59, , , , 489, 0, z )," & "{687, 1, SE, DDR1_DQ_58, , , , 489, 0, z )," & "{688, 1, SE, DDR1_DQ_57, , , , 489, 0, z )," & "{689, 1, SE, DDR1_DQ_56, , , , 489, 0, z )," & "{690, 1, SE, DDR1_DQS_DN_14, , , , 489, 0, z )," & "{691, 1, SE, DDR1_DQS_DP_14, , , , 489, 0, z )," & "{692, 1, SE, DDR1_DQ_45, , , , 489, 0, z )," & "{693, 1, SE, DDR1_DQ_44, , , , 489, 0, z )," & "{694, 1, SE, DDR1_DQ_47, , , , 489, 0, z )," & "{695, 1, SE, DDR1_DQ_46, , , , 489, 0, z )," & "{696, 1, SE, DDR1_DQS_DN_5, , , , 489, 0, z )," & "{697, 1, SE, DDR1_DQS_DP_5, , , , 489, 0, z )," & "{698, 1, SE, DDR1_DQ_43, , , , 489, 0, z )," & "{699, 1, SE, DDR1_DQ_42, , , , 489, 0, z )," & "{700, 1, SE, DDR1_DQ_41, , , , 489, 0, z )," & "{701, 1, SE, DDR1_DQ_40, , , , 489, 0, z )," & "{702, 1, SE, DDR1_CS_N_3, , , , 489, 0, z )," & "{703, 1, SE, DDR1_CS_N_2, , , , 489, 0, z )," & "{704, 1, SE, DDR1_CS_N_1, , , , 489, 0, z )," & "{705, 1, SE, DDR1_ODT_1, , , , 489, 0, z )," & "{706, 1, SE, DDR1_CS_N_0, , , , 489, 0, z )," & "{707, 1, SE, DDR1_ODT_0, , , , 489, 0, z )," & "{708, 1, SE, DDR1_CS_N_7, , , , 489, 0, z )," & "{709, 1, SE, DDR1_CS_N_6, , , , 489, 0, z )," & "{711, 1, SE, DDR1_C_2, , , , 489, 0, z )," & "{712, 1, SE, DDR1_CS_N_5, , , , 489, 0, z )," & "{713, 1, SE, DDR1_ODT_3, , , , 489, 0, z )," & "{714, 1, SE, DDR1_MA_8, , , , 489, 0, z )," & "{715, 1, SE, DDR1_MA_7, , , , 489, 0, z )," & "{716, 1, SE, DDR1_MA_5, , , , 489, 0, z )," & "{717, 1, SE, DDR1_MA_6, , , , 489, 0, z )," & "{718, 1, SE, DDR1_MA_2, , , , 489, 0, z )," & "{719, 1, SE, DDR1_MA_4, , , , 489, 0, z )," & "{720, 1, SE, DDR1_MA_1, , , , 489, 0, z )," & "{721, 1, SE, DDR1_MA_3, , , , 489, 0, z )," & "{722, 1, SE, DDR1_PAR, , , , 489, 0, z )," & "{724, 1, SE, DDR1_DQS_DN_17, , , , 489, 0, z )," & "{725, 1, SE, DDR1_DQS_DP_17, , , , 489, 0, z )," & "{726, 1, SE, DDR1_ECC_5, , , , 489, 0, z )," & "{727, 1, SE, DDR1_ECC_4, , , , 489, 0, z )," & "{728, 1, SE, DDR1_ECC_7, , , , 489, 0, z )," & "{729, 1, SE, DDR1_ECC_6, , , , 489, 0, z )," & "{730, 1, SE, DDR1_DQS_DN_8, , , , 489, 0, z )," & "{731, 1, SE, DDR1_DQS_DP_8, , , , 489, 0, z )," & "{732, 1, SE, DDR1_ECC_3, , , , 489, 0, z )," & "{733, 1, SE, DDR1_ECC_2, , , , 489, 0, z )," & "{734, 1, SE, DDR1_ECC_1, , , , 489, 0, z )," & "{735, 1, SE, DDR1_ECC_0, , , , 489, 0, z )," & "{736, 1, SE, DDR1_DQS_DN_11, , , , 489, 0, z )," & "{737, 1, SE, DDR1_DQS_DP_11, , , , 489, 0, z )," & "{738, 1, SE, DDR1_DQ_21, , , , 489, 0, z )," & "{739, 1, SE, DDR1_DQ_20, , , , 489, 0, z )," & "{740, 1, SE, DDR1_DQ_23, , , , 489, 0, z )," & "{741, 1, SE, DDR1_DQ_22, , , , 489, 0, z )," & "{742, 1, SE, DDR1_DQS_DN_2, , , , 489, 0, z )," & "{743, 1, SE, DDR1_DQS_DP_2, , , , 489, 0, z )," & "{744, 1, SE, DDR1_DQ_19, , , , 489, 0, z )," & "{745, 1, SE, DDR1_DQ_18, , , , 489, 0, z )," & "{746, 1, SE, DDR1_DQ_17, , , , 489, 0, z )," & "{747, 1, SE, DDR1_DQ_16, , , , 489, 0, z )," & "{748, 1, SE, DDR1_DQS_DN_9, , , , 489, 0, z )," & "{749, 1, SE, DDR1_DQS_DP_9, , , , 489, 0, z )," & "{750, 1, SE, DDR1_DQ_5, , , , 489, 0, z )," & "{751, 1, SE, DDR1_DQ_4, , , , 489, 0, z )," & "{752, 1, SE, DDR1_DQ_7, , , , 489, 0, z )," & "{753, 1, SE, DDR1_DQ_6, , , , 489, 0, z )," & "{754, 1, SE, DDR1_DQS_DN_0, , , , 489, 0, z )," & "{755, 1, SE, DDR1_DQS_DP_0, , , , 489, 0, z )," & "{756, 1, SE, DDR1_DQ_3, , , , 489, 0, z )," & "{757, 1, SE, DDR1_DQ_2, , , , 489, 0, z )," & "{758, 1, SE, DDR1_DQ_1, , , , 489, 0, z )," & "{759, 1, SE, DDR1_DQ_0, , , , 489, 0, z )," & "{760, 1, SE, DDR1_DQS_DN_1, , , , 489, 0, z )," & "{761, 1, SE, DDR1_DQS_DP_1, , , , 489, 0, z )," & "{762, 1, SE, DDR1_DQ_11, , , , 489, 0, z )," & "{763, 1, SE, DDR1_DQ_10, , , , 489, 0, z )," & "{764, 1, SE, DDR1_DQ_9, , , , 489, 0, z )," & "{765, 1, SE, DDR1_DQ_8, , , , 489, 0, z )," & "{766, 1, SE, DDR1_DQS_DN_10, , , , 489, 0, z )," & "{767, 1, SE, DDR1_DQS_DP_10, , , , 489, 0, z )," & "{768, 1, SE, DDR1_DQ_13, , , , 489, 0, z )," & "{769, 1, SE, DDR1_DQ_12, , , , 489, 0, z )," & "{770, 1, SE, DDR1_DQ_15, , , , 489, 0, z )," & "{771, 1, SE, DDR1_DQ_14, , , , 489, 0, z )," & "{772, 1, SE, DDR1_DQS_DN_3, , , , 489, 0, z )," & "{773, 1, SE, DDR1_DQS_DP_3, , , , 489, 0, z )," & "{774, 1, SE, DDR1_DQ_27, , , , 489, 0, z )," & "{775, 1, SE, DDR1_DQ_26, , , , 489, 0, z )," & "{776, 1, SE, DDR1_DQ_25, , , , 489, 0, z )," & "{777, 1, SE, DDR1_DQ_24, , , , 489, 0, z )," & "{778, 1, SE, DDR1_DQS_DN_12, , , , 489, 0, z )," & "{779, 1, SE, DDR1_DQS_DP_12, , , , 489, 0, z )," & "{780, 1, SE, DDR1_DQ_29, , , , 489, 0, z )," & "{781, 1, SE, DDR1_DQ_28, , , , 489, 0, z )," & "{782, 1, SE, DDR1_DQ_31, , , , 489, 0, z )," & "{783, 1, SE, DDR1_DQ_30, , , , 489, 0, z )," & "{784, 1, SE, DDR1_CKE_1, , , , 489, 0, z )," & "{785, 1, SE, DDR1_CKE_0, , , , 489, 0, z )," & "{786, 1, SE, DDR1_CKE_2, , , , 489, 0, z )," & "{788, 1, SE, DDR1_CKE_3, , , , 489, 0, z )," & "{790, 1, SE, DDR1_ACT_N, , , , 489, 0, z )," & "{791, 1, SE, DDR1_BG_0, , , , 489, 0, z )," & "{792, 1, SE, DDR1_BG_1, , , , 489, 0, z )," & "{793, 1, SE, DDR1_MA_11, , , , 489, 0, z )," & "{794, 1, SE, DDR1_MA_9, , , , 489, 0, z )," & "{795, 1, SE, DDR1_MA_12, , , , 489, 0, z )," & "{796, 1, SE, DDR0_MA_8, , , , 489, 0, z )," & "{797, 1, SE, DDR0_MA_7, , , , 489, 0, z )," & "{798, 1, SE, DDR0_MA_5, , , , 489, 0, z )," & "{799, 1, SE, DDR0_MA_6, , , , 489, 0, z )," & "{800, 1, SE, DDR0_MA_2, , , , 489, 0, z )," & "{801, 1, SE, DDR0_MA_4, , , , 489, 0, z )," & "{802, 1, SE, DDR0_MA_1, , , , 489, 0, z )," & "{803, 1, SE, DDR0_MA_3, , , , 489, 0, z )," & "{804, 1, SE, DDR0_PAR, , , , 489, 0, z )," & "{806, 1, SE, DDR0_DQS_DN_17, , , , 489, 0, z )," & "{807, 1, SE, DDR0_DQS_DP_17, , , , 489, 0, z )," & "{808, 1, SE, DDR0_ECC_5, , , , 489, 0, z )," & "{809, 1, SE, DDR0_ECC_4, , , , 489, 0, z )," & "{810, 1, SE, DDR0_ECC_7, , , , 489, 0, z )," & "{811, 1, SE, DDR0_ECC_6, , , , 489, 0, z )," & "{812, 1, SE, DDR0_DQS_DN_8, , , , 489, 0, z )," & "{813, 1, SE, DDR0_DQS_DP_8, , , , 489, 0, z )," & "{814, 1, SE, DDR0_ECC_3, , , , 489, 0, z )," & "{815, 1, SE, DDR0_ECC_2, , , , 489, 0, z )," & "{816, 1, SE, DDR0_ECC_1, , , , 489, 0, z )," & "{817, 1, SE, DDR0_ECC_0, , , , 489, 0, z )," & "{818, 1, SE, DDR0_DQS_DN_11, , , , 489, 0, z )," & "{819, 1, SE, DDR0_DQS_DP_11, , , , 489, 0, z )," & "{820, 1, SE, DDR0_DQ_21, , , , 489, 0, z )," & "{821, 1, SE, DDR0_DQ_20, , , , 489, 0, z )," & "{822, 1, SE, DDR0_DQ_23, , , , 489, 0, z )," & "{823, 1, SE, DDR0_DQ_22, , , , 489, 0, z )," & "{824, 1, SE, DDR0_DQS_DN_2, , , , 489, 0, z )," & "{825, 1, SE, DDR0_DQS_DP_2, , , , 489, 0, z )," & "{826, 1, SE, DDR0_DQ_19, , , , 489, 0, z )," & "{827, 1, SE, DDR0_DQ_18, , , , 489, 0, z )," & "{828, 1, SE, DDR0_DQ_17, , , , 489, 0, z )," & "{829, 1, SE, DDR0_DQ_16, , , , 489, 0, z )," & "{830, 1, SE, DDR0_DQS_DN_9, , , , 489, 0, z )," & "{831, 1, SE, DDR0_DQS_DP_9, , , , 489, 0, z )," & "{832, 1, SE, DDR0_DQ_5, , , , 489, 0, z )," & "{833, 1, SE, DDR0_DQ_4, , , , 489, 0, z )," & "{834, 1, SE, DDR0_DQ_7, , , , 489, 0, z )," & "{835, 1, SE, DDR0_DQ_6, , , , 489, 0, z )," & "{836, 1, SE, DDR0_DQS_DN_0, , , , 489, 0, z )," & "{837, 1, SE, DDR0_DQS_DP_0, , , , 489, 0, z )," & "{838, 1, SE, DDR0_DQ_3, , , , 489, 0, z )," & "{839, 1, SE, DDR0_DQ_2, , , , 489, 0, z )," & "{840, 1, SE, DDR0_DQ_1, , , , 489, 0, z )," & "{841, 1, SE, DDR0_DQ_0, , , , 489, 0, z )," & "{842, 1, SE, DDR0_DQS_DN_1, , , , 489, 0, z )," & "{843, 1, SE, DDR0_DQS_DP_1, , , , 489, 0, z )," & "{844, 1, SE, DDR0_DQ_11, , , , 489, 0, z )," & "{845, 1, SE, DDR0_DQ_10, , , , 489, 0, z )," & "{846, 1, SE, DDR0_DQ_9, , , , 489, 0, z )," & "{847, 1, SE, DDR0_DQ_8, , , , 489, 0, z )," & "{848, 1, SE, DDR0_DQS_DN_10, , , , 489, 0, z )," & "{849, 1, SE, DDR0_DQS_DP_10, , , , 489, 0, z )," & "{850, 1, SE, DDR0_DQ_13, , , , 489, 0, z )," & "{851, 1, SE, DDR0_DQ_12, , , , 489, 0, z )," & "{852, 1, SE, DDR0_DQ_15, , , , 489, 0, z )," & "{853, 1, SE, DDR0_DQ_14, , , , 489, 0, z )," & "{854, 1, SE, DDR0_DQS_DN_3, , , , 489, 0, z )," & "{855, 1, SE, DDR0_DQS_DP_3, , , , 489, 0, z )," & "{856, 1, SE, DDR0_DQ_27, , , , 489, 0, z )," & "{857, 1, SE, DDR0_DQ_26, , , , 489, 0, z )," & "{858, 1, SE, DDR0_DQ_25, , , , 489, 0, z )," & "{859, 1, SE, DDR0_DQ_24, , , , 489, 0, z )," & "{860, 1, SE, DDR0_DQS_DN_12, , , , 489, 0, z )," & "{861, 1, SE, DDR0_DQS_DP_12, , , , 489, 0, z )," & "{862, 1, SE, DDR0_DQ_29, , , , 489, 0, z )," & "{863, 1, SE, DDR0_DQ_28, , , , 489, 0, z )," & "{864, 1, SE, DDR0_DQ_31, , , , 489, 0, z )," & "{865, 1, SE, DDR0_DQ_30, , , , 489, 0, z )," & "{866, 1, SE, DDR0_CKE_1, , , , 489, 0, z )," & "{867, 1, SE, DDR0_CKE_0, , , , 489, 0, z )," & "{868, 1, SE, DDR0_CKE_2, , , , 489, 0, z )," & "{870, 1, SE, DDR0_CKE_3, , , , 489, 0, z )," & "{872, 1, SE, DDR0_ACT_N, , , , 489, 0, z )," & "{873, 1, SE, DDR0_BG_0, , , , 489, 0, z )," & "{874, 1, SE, DDR0_BG_1, , , , 489, 0, z )," & "{875, 1, SE, DDR0_MA_11, , , , 489, 0, z )," & "{876, 1, SE, DDR0_MA_9, , , , 489, 0, z )," & "{877, 1, SE, DDR0_MA_12, , , , 489, 0, z )," & "{878, 1, SE, DDR0_CS_N_4, , , , 489, 0, z )," & "{879, 1, SE, DDR0_ODT_2, , , , 489, 0, z )," & "{880, 1, SE, DDR0_MA_15, , , , 489, 0, z )," & "{881, 1, SE, DDR0_MA_13, , , , 489, 0, z )," & "{882, 1, SE, DDR0_MA_16, , , , 489, 0, z )," & "{883, 1, SE, DDR0_MA_14, , , , 489, 0, z )," & "{884, 1, SE, DDR0_MA_10, , , , 489, 0, z )," & "{885, 1, SE, DDR0_BA_1, , , , 489, 0, z )," & "{886, 1, SE, DDR0_MA_0, , , , 489, 0, z )," & "{887, 1, SE, DDR0_BA_0, , , , 489, 0, z )," & "{888, 1, SE, DDR0_DQS_DN_4, , , , 489, 0, z )," & "{889, 1, SE, DDR0_DQS_DP_4, , , , 489, 0, z )," & "{890, 1, SE, DDR0_DQ_35, , , , 489, 0, z )," & "{891, 1, SE, DDR0_DQ_34, , , , 489, 0, z )," & "{892, 1, SE, DDR0_DQ_33, , , , 489, 0, z )," & "{893, 1, SE, DDR0_DQ_32, , , , 489, 0, z )," & "{894, 1, SE, DDR0_DQS_DN_13, , , , 489, 0, z )," & "{895, 1, SE, DDR0_DQS_DP_13, , , , 489, 0, z )," & "{896, 1, SE, DDR0_DQ_37, , , , 489, 0, z )," & "{897, 1, SE, DDR0_DQ_36, , , , 489, 0, z )," & "{898, 1, SE, DDR0_DQ_39, , , , 489, 0, z )," & "{899, 1, SE, DDR0_DQ_38, , , , 489, 0, z )," & "{900, 1, SE, DDR0_DQS_DN_6, , , , 489, 0, z )," & "{901, 1, SE, DDR0_DQS_DP_6, , , , 489, 0, z )," & "{902, 1, SE, DDR0_DQ_51, , , , 489, 0, z )," & "{903, 1, SE, DDR0_DQ_50, , , , 489, 0, z )," & "{904, 1, SE, DDR0_DQ_49, , , , 489, 0, z )," & "{905, 1, SE, DDR0_DQ_48, , , , 489, 0, z )," & "{906, 1, SE, DDR0_DQS_DN_15, , , , 489, 0, z )," & "{907, 1, SE, DDR0_DQS_DP_15, , , , 489, 0, z )," & "{908, 1, SE, DDR0_DQ_53, , , , 489, 0, z )," & "{909, 1, SE, DDR0_DQ_52, , , , 489, 0, z )," & "{910, 1, SE, DDR0_DQ_55, , , , 489, 0, z )," & "{911, 1, SE, DDR0_DQ_54, , , , 489, 0, z )," & "{912, 1, SE, DDR0_DQS_DN_16, , , , 489, 0, z )," & "{913, 1, SE, DDR0_DQS_DP_16, , , , 489, 0, z )," & "{914, 1, SE, DDR0_DQ_61, , , , 489, 0, z )," & "{915, 1, SE, DDR0_DQ_60, , , , 489, 0, z )," & "{916, 1, SE, DDR0_DQ_63, , , , 489, 0, z )," & "{917, 1, SE, DDR0_DQ_62, , , , 489, 0, z )," & "{918, 1, SE, DDR0_DQS_DN_7, , , , 489, 0, z )," & "{919, 1, SE, DDR0_DQS_DP_7, , , , 489, 0, z )," & "{920, 1, SE, DDR0_DQ_59, , , , 489, 0, z )," & "{921, 1, SE, DDR0_DQ_58, , , , 489, 0, z )," & "{922, 1, SE, DDR0_DQ_57, , , , 489, 0, z )," & "{923, 1, SE, DDR0_DQ_56, , , , 489, 0, z )," & "{924, 1, SE, DDR0_DQS_DN_14, , , , 489, 0, z )," & "{925, 1, SE, DDR0_DQS_DP_14, , , , 489, 0, z )," & "{926, 1, SE, DDR0_DQ_45, , , , 489, 0, z )," & "{927, 1, SE, DDR0_DQ_44, , , , 489, 0, z )," & "{928, 1, SE, DDR0_DQ_47, , , , 489, 0, z )," & "{929, 1, SE, DDR0_DQ_46, , , , 489, 0, z )," & "{930, 1, SE, DDR0_DQS_DN_5, , , , 489, 0, z )," & "{931, 1, SE, DDR0_DQS_DP_5, , , , 489, 0, z )," & "{932, 1, SE, DDR0_DQ_43, , , , 489, 0, z )," & "{933, 1, SE, DDR0_DQ_42, , , , 489, 0, z )," & "{934, 1, SE, DDR0_DQ_41, , , , 489, 0, z )," & "{935, 1, SE, DDR0_DQ_40, , , , 489, 0, z )," & "{936, 1, SE, DDR0_CS_N_3, , , , 489, 0, z )," & "{937, 1, SE, DDR0_CS_N_2, , , , 489, 0, z )," & "{938, 1, SE, DDR0_CS_N_1, , , , 489, 0, z )," & "{939, 1, SE, DDR0_ODT_1, , , , 489, 0, z )," & "{940, 1, SE, DDR0_CS_N_0, , , , 489, 0, z )," & "{941, 1, SE, DDR0_ODT_0, , , , 489, 0, z )," & "{942, 1, SE, DDR0_CS_N_7, , , , 489, 0, z )," & "{943, 1, SE, DDR0_CS_N_6, , , , 489, 0, z )," & "{945, 1, SE, DDR0_C_2, , , , 489, 0, z )," & "{946, 1, SE, DDR0_CS_N_5, , , , 489, 0, z )," & "{947, 1, SE, DDR0_ODT_3, , , , 489, 0, z )," & "{948, 1, SE, DDR0_CLK_DN_2, , , , 489, 0, z )," & "{949, 1, SE, DDR0_CLK_DN_0, , , , 489, 0, z )," & "{950, 1, SE, DDR0_CLK_DP_0, , , , 489, 0, z )," & "{951, 1, SE, DDR0_CLK_DP_2, , , , 489, 0, z )," & "{952, 1, SE, DDR0_CLK_DN_3, , , , 489, 0, z )," & "{953, 1, SE, DDR0_CLK_DN_1, , , , 489, 0, z )," & "{954, 1, SE, DDR0_CLK_DP_1, , , , 489, 0, z )," & "{955, 1, SE, DDR0_CLK_DP_3, , , , 489, 0, z )," & "{956, 1, SE, DDR1_CLK_DN_2, , , , 489, 0, z )," & "{957, 1, SE, DDR1_CLK_DN_0, , , , 489, 0, z )," & "{958, 1, SE, DDR1_CLK_DP_0, , , , 489, 0, z )," & "{959, 1, SE, DDR1_CLK_DP_2, , , , 489, 0, z )," & "{960, 1, SE, DDR1_CLK_DN_3, , , , 489, 0, z )," & "{961, 1, SE, DDR1_CLK_DN_1, , , , 489, 0, z )," & "{962, 1, SE, DDR1_CLK_DP_1, , , , 489, 0, z )," & "{963, 1, SE, DDR1_CLK_DP_3, , , , 489, 0, z )," & "{964, 1, SE, DDR2_CLK_DN_2, , , , 489, 0, z )," & "{965, 1, SE, DDR2_CLK_DN_0, , , , 489, 0, z )," & "{966, 1, SE, DDR2_CLK_DP_0, , , , 489, 0, z )," & "{967, 1, SE, DDR2_CLK_DP_2, , , , 489, 0, z )," & "{968, 1, SE, DDR2_CLK_DN_3, , , , 489, 0, z )," & "{969, 1, SE, DDR2_CLK_DN_1, , , , 489, 0, z )," & "{970, 1, SE, DDR2_CLK_DP_1, , , , 489, 0, z )," & "{971, 1, SE, DDR2_CLK_DP_3, , , , 489, 0, z )"; attribute DESIGN_WARNING of SKX_XCC : entity is " ---- DESIGN WARNING ---- " & " 1. Boundary-scan initialization requirement: " & " After applying voltage to power pins, the following initialization sequence " & " must be completed PRIOR to first TAP accesses during application of the " & " boundary-scan test patterns: " & " " & " a. BCLK[2:0]_D[P/N] toggling at 100MHz. " & " b. DDR[012/345]_DRAM_PWR_OK pin must be driven HIGH and remain driven HIGH during " & " the boundary-scan test patterns execution " & " c. PWRGOOD pin must be driven HIGH and remain driven HIGH during " & " the boundary-scan test patterns execution " & " " & " 2. Other Notes: " & " a. Following pins are open-drain and must have " & " pullup for it to read as weak 1. " & " CATERR_N " & " CPU_ONLY_RESET " & " DDR012_MEMHOT_N " & " DDR345_MEMHOT_N " & " SPDSCL " & " SPDSDA " & " ERROR_N " & " MBP_N " & " MCP_MBP_N " & " MCP_SMBCLK " & " MCP_SMBDATA " & " MSMI_N " & " PE_HP_SCL " & " PE_HP_SDA " & " PM_FAST_WAKE_N " & " PRDY_N " & " PROCHOT_N " & " SVIDCLK " & " SVIDDATA " & " THERMTRIP_N " & " b. Data captured into Boundary-scan during SAMPLE may be invalid for some " & " pins. " & " " & " 3. After entry into EXTEST*, SAMPLE-PRELOAD, CLAMP, or HIGHZ, full " & " power-cycle of component is required before returning to Functional mode of " & " operation. " & " " & " 4. 1149.6 Test Receiver parameters, documented per 1149.6 Rule 7.2.1(e). " & " --------------------------------------------------------------------- " & " Nominal values (applies to all test receivers): " & " 1) DeltaVMin 160 mV " & " 2) Ttrans 62.5 ps " & " 3) DeltaVMax 250 mV " & " 4) Vthreshold 250 mV " & " 5) VHyst_Level 60 mV " & " 6) Thyst 337 ps " & " 7) VHyst_Edge 100 mV " & " 8) THP 22 us " & " 9) TLP N/A " & " " & " ************************************** " & " ***** ISSUES WITH THIS COMPONENT: **** " & " ************************************** " & " 5. BCLK[2:0]_D[P/N], DDR[012/345]_DRAM_PWR_OK, PWRGOOD are not connected to a " & " bscan cell and may result in syntax warnings. " & " " & " " ; end SKX_XCC;