Assembler report for T4
Wed Jun 29 08:29:13 2022
Quartus Prime Version 17.1.0 Build 590 10/25/2017 SJ Lite Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Assembler Summary
  3. Assembler Settings
  4. Assembler Encrypted IP Cores Summary
  5. Assembler Generated Files
  6. Assembler Device Options: C:/Quasonix/projects/transmitter/T4V2_Q17/fpga/T4/par/T4_time_limited.sof
  7. Assembler Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 2017  Intel Corporation. All rights reserved.
Your use of Intel Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Intel Program License 
Subscription Agreement, the Intel Quartus Prime License Agreement,
the Intel FPGA IP License Agreement, or other applicable license
agreement, including, without limitation, that your use is for
the sole purpose of programming logic devices manufactured by
Intel and sold by Intel or its authorized distributors.  Please
refer to the applicable agreement for further details.



+---------------------------------------------------------------+
; Assembler Summary                                             ;
+-----------------------+---------------------------------------+
; Assembler Status      ; Successful - Wed Jun 29 08:29:13 2022 ;
; Revision Name         ; T4                                    ;
; Top-level Entity Name ; top                                   ;
; Family                ; Cyclone V                             ;
; Device                ; 5CEBA4U15I7                           ;
+-----------------------+---------------------------------------+


+----------------------------------+
; Assembler Settings               ;
+--------+---------+---------------+
; Option ; Setting ; Default Value ;
+--------+---------+---------------+


+--------------------------------------------------------+
; Assembler Encrypted IP Cores Summary                   ;
+--------+-------------------------------+---------------+
; Vendor ; IP Core Name                  ; License Type  ;
+--------+-------------------------------+---------------+
; Altera ; Nios II Processor (6AF7 00A2) ; OpenCore Plus ;
; Altera ; Signal Tap (6AF7 BCE1)        ; Licensed      ;
; Altera ; Signal Tap (6AF7 BCEC)        ; Licensed      ;
+--------+-------------------------------+---------------+


+---------------------------------------------------------------------------+
; Assembler Generated Files                                                 ;
+---------------------------------------------------------------------------+
; File Name                                                                 ;
+---------------------------------------------------------------------------+
; C:/Quasonix/projects/transmitter/T4V2_Q17/fpga/T4/par/T4_time_limited.sof ;
+---------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------+
; Assembler Device Options: C:/Quasonix/projects/transmitter/T4V2_Q17/fpga/T4/par/T4_time_limited.sof ;
+----------------+------------------------------------------------------------------------------------+
; Option         ; Setting                                                                            ;
+----------------+------------------------------------------------------------------------------------+
; JTAG usercode  ; 0x033AC0B9                                                                         ;
; Checksum       ; 0x033AC0B9                                                                         ;
+----------------+------------------------------------------------------------------------------------+


+--------------------+
; Assembler Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus Prime Assembler
    Info: Version 17.1.0 Build 590 10/25/2017 SJ Lite Edition
    Info: Processing started: Wed Jun 29 08:29:05 2022
Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off T4 -c T4
Info (115030): Assembler is generating device programming files
Info (115017): Design contains a time-limited core -- only a single, time-limited programming file can be generated
Warning (210042): Can't convert time-limited SOF into POF, HEX File, TTF, or RBF
Info: Quartus Prime Assembler was successful. 0 errors, 1 warning
    Info: Peak virtual memory: 5031 megabytes
    Info: Processing ended: Wed Jun 29 08:29:13 2022
    Info: Elapsed time: 00:00:08
    Info: Total CPU time (on all processors): 00:00:08