-- alt_usxgmii_mac.vhd

-- Generated using ACDS version 19.4 64

library IEEE;
library alt_em10g32_1930;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

entity alt_usxgmii_mac is
	port (
		csr_read                        : in  std_logic                     := '0';             --                        csr.read
		csr_write                       : in  std_logic                     := '0';             --                           .write
		csr_writedata                   : in  std_logic_vector(31 downto 0) := (others => '0'); --                           .writedata
		csr_readdata                    : out std_logic_vector(31 downto 0);                    --                           .readdata
		csr_waitrequest                 : out std_logic;                                        --                           .waitrequest
		csr_address                     : in  std_logic_vector(9 downto 0)  := (others => '0'); --                           .address
		tx_312_5_clk                    : in  std_logic                     := '0';             --               tx_312_5_clk.clk
		tx_156_25_clk                   : in  std_logic                     := '0';             --              tx_156_25_clk.clk
		rx_312_5_clk                    : in  std_logic                     := '0';             --               rx_312_5_clk.clk
		rx_156_25_clk                   : in  std_logic                     := '0';             --              rx_156_25_clk.clk
		csr_clk                         : in  std_logic                     := '0';             --                    csr_clk.clk
		csr_rst_n                       : in  std_logic                     := '0';             --                  csr_rst_n.reset_n
		tx_rst_n                        : in  std_logic                     := '0';             --                   tx_rst_n.reset_n
		rx_rst_n                        : in  std_logic                     := '0';             --                   rx_rst_n.reset_n
		xgmii_tx_valid                  : out std_logic;                                        --             xgmii_tx_valid.out
		xgmii_rx_valid                  : in  std_logic                     := '0';             --             xgmii_rx_valid.in
		speed_sel                       : in  std_logic_vector(2 downto 0)  := (others => '0'); --                  speed_sel.export
		avalon_st_tx_startofpacket      : in  std_logic                     := '0';             --               avalon_st_tx.startofpacket
		avalon_st_tx_endofpacket        : in  std_logic                     := '0';             --                           .endofpacket
		avalon_st_tx_valid              : in  std_logic                     := '0';             --                           .valid
		avalon_st_tx_data               : in  std_logic_vector(63 downto 0) := (others => '0'); --                           .data
		avalon_st_tx_empty              : in  std_logic_vector(2 downto 0)  := (others => '0'); --                           .empty
		avalon_st_tx_error              : in  std_logic                     := '0';             --                           .error
		avalon_st_tx_ready              : out std_logic;                                        --                           .ready
		avalon_st_pause_data            : in  std_logic_vector(1 downto 0)  := (others => '0'); --            avalon_st_pause.data
		xgmii_tx_data                   : out std_logic_vector(31 downto 0);                    --              xgmii_tx_data.export
		xgmii_tx_control                : out std_logic_vector(3 downto 0);                     --           xgmii_tx_control.export
		avalon_st_txstatus_valid        : out std_logic;                                        --         avalon_st_txstatus.valid
		avalon_st_txstatus_data         : out std_logic_vector(39 downto 0);                    --                           .data
		avalon_st_txstatus_error        : out std_logic_vector(6 downto 0);                     --                           .error
		xgmii_rx_data                   : in  std_logic_vector(31 downto 0) := (others => '0'); --              xgmii_rx_data.export
		xgmii_rx_control                : in  std_logic_vector(3 downto 0)  := (others => '0'); --           xgmii_rx_control.export
		link_fault_status_xgmii_rx_data : out std_logic_vector(1 downto 0);                     -- link_fault_status_xgmii_rx.data
		avalon_st_rx_data               : out std_logic_vector(63 downto 0);                    --               avalon_st_rx.data
		avalon_st_rx_startofpacket      : out std_logic;                                        --                           .startofpacket
		avalon_st_rx_valid              : out std_logic;                                        --                           .valid
		avalon_st_rx_empty              : out std_logic_vector(2 downto 0);                     --                           .empty
		avalon_st_rx_error              : out std_logic_vector(5 downto 0);                     --                           .error
		avalon_st_rx_ready              : in  std_logic                     := '0';             --                           .ready
		avalon_st_rx_endofpacket        : out std_logic;                                        --                           .endofpacket
		avalon_st_rxstatus_valid        : out std_logic;                                        --         avalon_st_rxstatus.valid
		avalon_st_rxstatus_data         : out std_logic_vector(39 downto 0);                    --                           .data
		avalon_st_rxstatus_error        : out std_logic_vector(6 downto 0)                      --                           .error
	);
end entity alt_usxgmii_mac;

architecture rtl of alt_usxgmii_mac is
	component alt_em10g32_cmp is
		generic (
			DEVICE_FAMILY             : string  := "Stratix V";
			INSERT_ST_ADAPTOR         : integer := 0;
			INSERT_CSR_ADAPTOR        : integer := 0;
			INSERT_XGMII_ADAPTOR      : integer := 1;
			USE_ASYNC_ADAPTOR         : integer := 1;
			DATAPATH_OPTION           : integer := 3;
			ENABLE_SUPP_ADDR          : integer := 1;
			ENABLE_PFC                : integer := 0;
			PFC_PRIORITY_NUMBER       : integer := 8;
			INSTANTIATE_STATISTICS    : integer := 1;
			REGISTER_BASED_STATISTICS : integer := 0;
			PREAMBLE_PASSTHROUGH      : integer := 0;
			ENABLE_TIMESTAMPING       : integer := 0;
			ENABLE_PTP_1STEP          : integer := 0;
			ENABLE_ASYMMETRY          : integer := 0;
			ENABLE_P2P                : integer := 0;
			TSTAMP_FP_WIDTH           : integer := 4;
			TIME_OF_DAY_FORMAT        : integer := 2;
			ENABLE_1G10G_MAC          : integer := 0;
			ENABLE_MEM_ECC            : integer := 0;
			ENABLE_UNIDIRECTIONAL     : integer := 0;
			ENABLE_10GBASER_REG_MODE  : integer := 0;
			ENABLE_TXRX_DATAPATH      : integer := 1
		);
		port (
			csr_read                                       : in  std_logic                     := 'X';             -- read
			csr_write                                      : in  std_logic                     := 'X';             -- write
			csr_writedata                                  : in  std_logic_vector(31 downto 0) := (others => 'X'); -- writedata
			csr_readdata                                   : out std_logic_vector(31 downto 0);                    -- readdata
			csr_waitrequest                                : out std_logic;                                        -- waitrequest
			csr_address                                    : in  std_logic_vector(9 downto 0)  := (others => 'X'); -- address
			tx_312_5_clk                                   : in  std_logic                     := 'X';             -- clk
			tx_156_25_clk                                  : in  std_logic                     := 'X';             -- clk
			rx_312_5_clk                                   : in  std_logic                     := 'X';             -- clk
			rx_156_25_clk                                  : in  std_logic                     := 'X';             -- clk
			csr_clk                                        : in  std_logic                     := 'X';             -- clk
			csr_rst_n                                      : in  std_logic                     := 'X';             -- reset_n
			tx_rst_n                                       : in  std_logic                     := 'X';             -- reset_n
			rx_rst_n                                       : in  std_logic                     := 'X';             -- reset_n
			xgmii_tx_valid                                 : out std_logic;                                        -- out
			xgmii_rx_valid                                 : in  std_logic                     := 'X';             -- in
			speed_sel                                      : in  std_logic_vector(2 downto 0)  := (others => 'X'); -- export
			avalon_st_tx_startofpacket                     : in  std_logic                     := 'X';             -- startofpacket
			avalon_st_tx_endofpacket                       : in  std_logic                     := 'X';             -- endofpacket
			avalon_st_tx_valid                             : in  std_logic                     := 'X';             -- valid
			avalon_st_tx_data                              : in  std_logic_vector(63 downto 0) := (others => 'X'); -- data
			avalon_st_tx_empty                             : in  std_logic_vector(2 downto 0)  := (others => 'X'); -- empty
			avalon_st_tx_error                             : in  std_logic                     := 'X';             -- error
			avalon_st_tx_ready                             : out std_logic;                                        -- ready
			avalon_st_pause_data                           : in  std_logic_vector(1 downto 0)  := (others => 'X'); -- data
			xgmii_tx_data                                  : out std_logic_vector(31 downto 0);                    -- export
			xgmii_tx_control                               : out std_logic_vector(3 downto 0);                     -- export
			avalon_st_txstatus_valid                       : out std_logic;                                        -- valid
			avalon_st_txstatus_data                        : out std_logic_vector(39 downto 0);                    -- data
			avalon_st_txstatus_error                       : out std_logic_vector(6 downto 0);                     -- error
			xgmii_rx_data                                  : in  std_logic_vector(31 downto 0) := (others => 'X'); -- export
			xgmii_rx_control                               : in  std_logic_vector(3 downto 0)  := (others => 'X'); -- export
			link_fault_status_xgmii_rx_data                : out std_logic_vector(1 downto 0);                     -- data
			avalon_st_rx_data                              : out std_logic_vector(63 downto 0);                    -- data
			avalon_st_rx_startofpacket                     : out std_logic;                                        -- startofpacket
			avalon_st_rx_valid                             : out std_logic;                                        -- valid
			avalon_st_rx_empty                             : out std_logic_vector(2 downto 0);                     -- empty
			avalon_st_rx_error                             : out std_logic_vector(5 downto 0);                     -- error
			avalon_st_rx_ready                             : in  std_logic                     := 'X';             -- ready
			avalon_st_rx_endofpacket                       : out std_logic;                                        -- endofpacket
			avalon_st_rxstatus_valid                       : out std_logic;                                        -- valid
			avalon_st_rxstatus_data                        : out std_logic_vector(39 downto 0);                    -- data
			avalon_st_rxstatus_error                       : out std_logic_vector(6 downto 0);                     -- error
			avalon_st_tx_pfc_gen_data                      : in  std_logic_vector(15 downto 0) := (others => 'X'); -- export
			xgmii_tx                                       : out std_logic_vector(71 downto 0);                    -- data
			avalon_st_tx_pfc_status_valid                  : out std_logic;                                        -- valid
			avalon_st_tx_pfc_status_data                   : out std_logic_vector(15 downto 0);                    -- data
			xgmii_rx                                       : in  std_logic_vector(71 downto 0) := (others => 'X'); -- data
			avalon_st_rx_pfc_status_valid                  : out std_logic;                                        -- valid
			avalon_st_rx_pfc_status_data                   : out std_logic_vector(15 downto 0);                    -- data
			avalon_st_rx_pfc_pause_data                    : out std_logic_vector(7 downto 0);                     -- data
			tx_path_delay_10g_data                         : in  std_logic_vector(23 downto 0) := (others => 'X'); -- data
			tx_time_of_day_96b_10g_data                    : in  std_logic_vector(95 downto 0) := (others => 'X'); -- data
			tx_time_of_day_64b_10g_data                    : in  std_logic_vector(63 downto 0) := (others => 'X'); -- data
			rx_path_delay_10g_data                         : in  std_logic_vector(23 downto 0) := (others => 'X'); -- data
			rx_time_of_day_96b_10g_data                    : in  std_logic_vector(95 downto 0) := (others => 'X'); -- data
			rx_time_of_day_64b_10g_data                    : in  std_logic_vector(63 downto 0) := (others => 'X'); -- data
			tx_egress_timestamp_96b_valid                  : out std_logic;                                        -- valid
			tx_egress_timestamp_96b_data                   : out std_logic_vector(95 downto 0);                    -- data
			tx_egress_timestamp_96b_fingerprint            : out std_logic_vector(3 downto 0);                     -- fingerprint
			tx_egress_timestamp_64b_valid                  : out std_logic;                                        -- valid
			tx_egress_timestamp_64b_data                   : out std_logic_vector(63 downto 0);                    -- data
			tx_egress_timestamp_64b_fingerprint            : out std_logic_vector(3 downto 0);                     -- fingerprint
			rx_ingress_timestamp_96b_valid                 : out std_logic;                                        -- valid
			rx_ingress_timestamp_96b_data                  : out std_logic_vector(95 downto 0);                    -- data
			rx_ingress_timestamp_64b_valid                 : out std_logic;                                        -- valid
			rx_ingress_timestamp_64b_data                  : out std_logic_vector(63 downto 0);                    -- data
			tx_egress_timestamp_request_valid              : in  std_logic                     := 'X';             -- valid
			tx_egress_timestamp_request_fingerprint        : in  std_logic_vector(3 downto 0)  := (others => 'X'); -- fingerprint
			latency_measure_sampling_clk                   : in  std_logic                     := 'X';             -- clk
			unidirectional_en                              : out std_logic;                                        -- en
			unidirectional_remote_fault_dis                : out std_logic;                                        -- remote_fault_dis
			unidirectional_force_remote_fault              : out std_logic;                                        -- force_remote_fault
			rx_xcvr_clk                                    : in  std_logic                     := 'X';             -- clk
			tx_xcvr_clk                                    : in  std_logic                     := 'X';             -- clk
			link_fault_status_xgmii_tx_data                : in  std_logic_vector(1 downto 0)  := (others => 'X'); -- data
			gmii_tx_clk                                    : in  std_logic                     := 'X';             -- clk
			gmii_tx_d                                      : out std_logic_vector(7 downto 0);                     -- export
			gmii_tx_en                                     : out std_logic;                                        -- export
			gmii_tx_err                                    : out std_logic;                                        -- export
			tx_clkena_half_rate                            : in  std_logic                     := 'X';             -- export
			gmii16b_tx_clk                                 : in  std_logic                     := 'X';             -- clk
			gmii16b_tx_d                                   : out std_logic_vector(15 downto 0);                    -- export
			gmii16b_tx_en                                  : out std_logic_vector(1 downto 0);                     -- export
			gmii16b_tx_err                                 : out std_logic_vector(1 downto 0);                     -- export
			mii_tx_d                                       : out std_logic_vector(3 downto 0);                     -- export
			mii_tx_en                                      : out std_logic;                                        -- export
			mii_tx_err                                     : out std_logic;                                        -- export
			avalon_st_tx_pause_length_valid                : in  std_logic                     := 'X';             -- valid
			avalon_st_tx_pause_length_data                 : in  std_logic_vector(15 downto 0) := (others => 'X'); -- data
			gmii_rx_clk                                    : in  std_logic                     := 'X';             -- clk
			gmii_rx_d                                      : in  std_logic_vector(7 downto 0)  := (others => 'X'); -- export
			gmii_rx_dv                                     : in  std_logic                     := 'X';             -- export
			gmii_rx_err                                    : in  std_logic                     := 'X';             -- export
			rx_clkena                                      : in  std_logic                     := 'X';             -- export
			rx_clkena_half_rate                            : in  std_logic                     := 'X';             -- export
			gmii16b_rx_clk                                 : in  std_logic                     := 'X';             -- clk
			gmii16b_rx_d                                   : in  std_logic_vector(15 downto 0) := (others => 'X'); -- export
			gmii16b_rx_dv                                  : in  std_logic_vector(1 downto 0)  := (others => 'X'); -- export
			gmii16b_rx_err                                 : in  std_logic_vector(1 downto 0)  := (others => 'X'); -- export
			mii_rx_d                                       : in  std_logic_vector(3 downto 0)  := (others => 'X'); -- export
			mii_rx_dv                                      : in  std_logic                     := 'X';             -- export
			mii_rx_err                                     : in  std_logic                     := 'X';             -- export
			avalon_st_rx_pause_length_valid                : out std_logic;                                        -- valid
			avalon_st_rx_pause_length_data                 : out std_logic_vector(15 downto 0);                    -- data
			tx_clkena                                      : in  std_logic                     := 'X';             -- export
			tx_path_delay_1g_data                          : in  std_logic_vector(21 downto 0) := (others => 'X'); -- data
			tx_time_of_day_96b_1g_data                     : in  std_logic_vector(95 downto 0) := (others => 'X'); -- data
			tx_time_of_day_64b_1g_data                     : in  std_logic_vector(63 downto 0) := (others => 'X'); -- data
			rx_path_delay_1g_data                          : in  std_logic_vector(21 downto 0) := (others => 'X'); -- data
			rx_time_of_day_96b_1g_data                     : in  std_logic_vector(95 downto 0) := (others => 'X'); -- data
			rx_time_of_day_64b_1g_data                     : in  std_logic_vector(63 downto 0) := (others => 'X'); -- data
			tx_etstamp_ins_ctrl_timestamp_insert           : in  std_logic                     := 'X';             -- timestamp_insert
			tx_etstamp_ins_ctrl_timestamp_format           : in  std_logic                     := 'X';             -- timestamp_format
			tx_etstamp_ins_ctrl_residence_time_update      : in  std_logic                     := 'X';             -- residence_time_update
			tx_etstamp_ins_ctrl_ingress_timestamp_96b      : in  std_logic_vector(95 downto 0) := (others => 'X'); -- ingress_timestamp_96b
			tx_etstamp_ins_ctrl_ingress_timestamp_64b      : in  std_logic_vector(63 downto 0) := (others => 'X'); -- ingress_timestamp_64b
			tx_etstamp_ins_ctrl_residence_time_calc_format : in  std_logic                     := 'X';             -- residence_time_calc_format
			tx_etstamp_ins_ctrl_checksum_zero              : in  std_logic                     := 'X';             -- checksum_zero
			tx_etstamp_ins_ctrl_checksum_correct           : in  std_logic                     := 'X';             -- checksum_correct
			tx_etstamp_ins_ctrl_offset_timestamp           : in  std_logic_vector(15 downto 0) := (others => 'X'); -- offset_timestamp
			tx_etstamp_ins_ctrl_offset_correction_field    : in  std_logic_vector(15 downto 0) := (others => 'X'); -- offset_correction_field
			tx_etstamp_ins_ctrl_offset_checksum_field      : in  std_logic_vector(15 downto 0) := (others => 'X'); -- offset_checksum_field
			tx_etstamp_ins_ctrl_offset_checksum_correction : in  std_logic_vector(15 downto 0) := (others => 'X'); -- offset_checksum_correction
			tx_egress_asymmetry_update                     : in  std_logic                     := 'X';             -- update
			tx_egress_p2p_update                           : in  std_logic                     := 'X';             -- update
			tx_egress_p2p_val                              : in  std_logic_vector(45 downto 0) := (others => 'X'); -- data
			rx_ingress_p2p_val_valid                       : out std_logic;                                        -- valid
			rx_ingress_p2p_val                             : out std_logic_vector(45 downto 0);                    -- data
			ecc_err_det_corr                               : out std_logic;                                        -- corr
			ecc_err_det_uncorr                             : out std_logic                                         -- uncorr
		);
	end component alt_em10g32_cmp;

	for alt_em10g32_0 : alt_em10g32_cmp
		use entity alt_em10g32_1930.alt_em10g32;
begin

	alt_em10g32_0 : component alt_em10g32_cmp
		generic map (
			DEVICE_FAMILY             => "Stratix 10",
			INSERT_ST_ADAPTOR         => 1,
			INSERT_CSR_ADAPTOR        => 0,
			INSERT_XGMII_ADAPTOR      => 0,
			USE_ASYNC_ADAPTOR         => 0,
			DATAPATH_OPTION           => 3,
			ENABLE_SUPP_ADDR          => 1,
			ENABLE_PFC                => 0,
			PFC_PRIORITY_NUMBER       => 8,
			INSTANTIATE_STATISTICS    => 1,
			REGISTER_BASED_STATISTICS => 0,
			PREAMBLE_PASSTHROUGH      => 0,
			ENABLE_TIMESTAMPING       => 0,
			ENABLE_PTP_1STEP          => 0,
			ENABLE_ASYMMETRY          => 0,
			ENABLE_P2P                => 0,
			TSTAMP_FP_WIDTH           => 4,
			TIME_OF_DAY_FORMAT        => 2,
			ENABLE_1G10G_MAC          => 5,
			ENABLE_MEM_ECC            => 0,
			ENABLE_UNIDIRECTIONAL     => 0,
			ENABLE_10GBASER_REG_MODE  => 0,
			ENABLE_TXRX_DATAPATH      => 1
		)
		port map (
			csr_read                                       => csr_read,                                                                                           --                        csr.read
			csr_write                                      => csr_write,                                                                                          --                           .write
			csr_writedata                                  => csr_writedata,                                                                                      --                           .writedata
			csr_readdata                                   => csr_readdata,                                                                                       --                           .readdata
			csr_waitrequest                                => csr_waitrequest,                                                                                    --                           .waitrequest
			csr_address                                    => csr_address,                                                                                        --                           .address
			tx_312_5_clk                                   => tx_312_5_clk,                                                                                       --               tx_312_5_clk.clk
			tx_156_25_clk                                  => tx_156_25_clk,                                                                                      --              tx_156_25_clk.clk
			rx_312_5_clk                                   => rx_312_5_clk,                                                                                       --               rx_312_5_clk.clk
			rx_156_25_clk                                  => rx_156_25_clk,                                                                                      --              rx_156_25_clk.clk
			csr_clk                                        => csr_clk,                                                                                            --                    csr_clk.clk
			csr_rst_n                                      => csr_rst_n,                                                                                          --                  csr_rst_n.reset_n
			tx_rst_n                                       => tx_rst_n,                                                                                           --                   tx_rst_n.reset_n
			rx_rst_n                                       => rx_rst_n,                                                                                           --                   rx_rst_n.reset_n
			xgmii_tx_valid                                 => xgmii_tx_valid,                                                                                     --             xgmii_tx_valid.out
			xgmii_rx_valid                                 => xgmii_rx_valid,                                                                                     --             xgmii_rx_valid.in
			speed_sel                                      => speed_sel,                                                                                          --                  speed_sel.export
			avalon_st_tx_startofpacket                     => avalon_st_tx_startofpacket,                                                                         --               avalon_st_tx.startofpacket
			avalon_st_tx_endofpacket                       => avalon_st_tx_endofpacket,                                                                           --                           .endofpacket
			avalon_st_tx_valid                             => avalon_st_tx_valid,                                                                                 --                           .valid
			avalon_st_tx_data                              => avalon_st_tx_data,                                                                                  --                           .data
			avalon_st_tx_empty                             => avalon_st_tx_empty,                                                                                 --                           .empty
			avalon_st_tx_error                             => avalon_st_tx_error,                                                                                 --                           .error
			avalon_st_tx_ready                             => avalon_st_tx_ready,                                                                                 --                           .ready
			avalon_st_pause_data                           => avalon_st_pause_data,                                                                               --            avalon_st_pause.data
			xgmii_tx_data                                  => xgmii_tx_data,                                                                                      --              xgmii_tx_data.export
			xgmii_tx_control                               => xgmii_tx_control,                                                                                   --           xgmii_tx_control.export
			avalon_st_txstatus_valid                       => avalon_st_txstatus_valid,                                                                           --         avalon_st_txstatus.valid
			avalon_st_txstatus_data                        => avalon_st_txstatus_data,                                                                            --                           .data
			avalon_st_txstatus_error                       => avalon_st_txstatus_error,                                                                           --                           .error
			xgmii_rx_data                                  => xgmii_rx_data,                                                                                      --              xgmii_rx_data.export
			xgmii_rx_control                               => xgmii_rx_control,                                                                                   --           xgmii_rx_control.export
			link_fault_status_xgmii_rx_data                => link_fault_status_xgmii_rx_data,                                                                    -- link_fault_status_xgmii_rx.data
			avalon_st_rx_data                              => avalon_st_rx_data,                                                                                  --               avalon_st_rx.data
			avalon_st_rx_startofpacket                     => avalon_st_rx_startofpacket,                                                                         --                           .startofpacket
			avalon_st_rx_valid                             => avalon_st_rx_valid,                                                                                 --                           .valid
			avalon_st_rx_empty                             => avalon_st_rx_empty,                                                                                 --                           .empty
			avalon_st_rx_error                             => avalon_st_rx_error,                                                                                 --                           .error
			avalon_st_rx_ready                             => avalon_st_rx_ready,                                                                                 --                           .ready
			avalon_st_rx_endofpacket                       => avalon_st_rx_endofpacket,                                                                           --                           .endofpacket
			avalon_st_rxstatus_valid                       => avalon_st_rxstatus_valid,                                                                           --         avalon_st_rxstatus.valid
			avalon_st_rxstatus_data                        => avalon_st_rxstatus_data,                                                                            --                           .data
			avalon_st_rxstatus_error                       => avalon_st_rxstatus_error,                                                                           --                           .error
			avalon_st_tx_pfc_gen_data                      => "0000000000000000",                                                                                 --                (terminated)
			xgmii_tx                                       => open,                                                                                               --                (terminated)
			avalon_st_tx_pfc_status_valid                  => open,                                                                                               --                (terminated)
			avalon_st_tx_pfc_status_data                   => open,                                                                                               --                (terminated)
			xgmii_rx                                       => "000000000000000000000000000000000000000000000000000000000000000000000000",                         --                (terminated)
			avalon_st_rx_pfc_status_valid                  => open,                                                                                               --                (terminated)
			avalon_st_rx_pfc_status_data                   => open,                                                                                               --                (terminated)
			avalon_st_rx_pfc_pause_data                    => open,                                                                                               --                (terminated)
			tx_path_delay_10g_data                         => "000000000000000000000000",                                                                         --                (terminated)
			tx_time_of_day_96b_10g_data                    => "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", --                (terminated)
			tx_time_of_day_64b_10g_data                    => "0000000000000000000000000000000000000000000000000000000000000000",                                 --                (terminated)
			rx_path_delay_10g_data                         => "000000000000000000000000",                                                                         --                (terminated)
			rx_time_of_day_96b_10g_data                    => "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", --                (terminated)
			rx_time_of_day_64b_10g_data                    => "0000000000000000000000000000000000000000000000000000000000000000",                                 --                (terminated)
			tx_egress_timestamp_96b_valid                  => open,                                                                                               --                (terminated)
			tx_egress_timestamp_96b_data                   => open,                                                                                               --                (terminated)
			tx_egress_timestamp_96b_fingerprint            => open,                                                                                               --                (terminated)
			tx_egress_timestamp_64b_valid                  => open,                                                                                               --                (terminated)
			tx_egress_timestamp_64b_data                   => open,                                                                                               --                (terminated)
			tx_egress_timestamp_64b_fingerprint            => open,                                                                                               --                (terminated)
			rx_ingress_timestamp_96b_valid                 => open,                                                                                               --                (terminated)
			rx_ingress_timestamp_96b_data                  => open,                                                                                               --                (terminated)
			rx_ingress_timestamp_64b_valid                 => open,                                                                                               --                (terminated)
			rx_ingress_timestamp_64b_data                  => open,                                                                                               --                (terminated)
			tx_egress_timestamp_request_valid              => '0',                                                                                                --                (terminated)
			tx_egress_timestamp_request_fingerprint        => "0000",                                                                                             --                (terminated)
			latency_measure_sampling_clk                   => '0',                                                                                                --                (terminated)
			unidirectional_en                              => open,                                                                                               --                (terminated)
			unidirectional_remote_fault_dis                => open,                                                                                               --                (terminated)
			unidirectional_force_remote_fault              => open,                                                                                               --                (terminated)
			rx_xcvr_clk                                    => '0',                                                                                                --                (terminated)
			tx_xcvr_clk                                    => '0',                                                                                                --                (terminated)
			link_fault_status_xgmii_tx_data                => "00",                                                                                               --                (terminated)
			gmii_tx_clk                                    => '0',                                                                                                --                (terminated)
			gmii_tx_d                                      => open,                                                                                               --                (terminated)
			gmii_tx_en                                     => open,                                                                                               --                (terminated)
			gmii_tx_err                                    => open,                                                                                               --                (terminated)
			tx_clkena_half_rate                            => '0',                                                                                                --                (terminated)
			gmii16b_tx_clk                                 => '0',                                                                                                --                (terminated)
			gmii16b_tx_d                                   => open,                                                                                               --                (terminated)
			gmii16b_tx_en                                  => open,                                                                                               --                (terminated)
			gmii16b_tx_err                                 => open,                                                                                               --                (terminated)
			mii_tx_d                                       => open,                                                                                               --                (terminated)
			mii_tx_en                                      => open,                                                                                               --                (terminated)
			mii_tx_err                                     => open,                                                                                               --                (terminated)
			avalon_st_tx_pause_length_valid                => '0',                                                                                                --                (terminated)
			avalon_st_tx_pause_length_data                 => "0000000000000000",                                                                                 --                (terminated)
			gmii_rx_clk                                    => '0',                                                                                                --                (terminated)
			gmii_rx_d                                      => "00000000",                                                                                         --                (terminated)
			gmii_rx_dv                                     => '0',                                                                                                --                (terminated)
			gmii_rx_err                                    => '0',                                                                                                --                (terminated)
			rx_clkena                                      => '0',                                                                                                --                (terminated)
			rx_clkena_half_rate                            => '0',                                                                                                --                (terminated)
			gmii16b_rx_clk                                 => '0',                                                                                                --                (terminated)
			gmii16b_rx_d                                   => "0000000000000000",                                                                                 --                (terminated)
			gmii16b_rx_dv                                  => "00",                                                                                               --                (terminated)
			gmii16b_rx_err                                 => "00",                                                                                               --                (terminated)
			mii_rx_d                                       => "0000",                                                                                             --                (terminated)
			mii_rx_dv                                      => '0',                                                                                                --                (terminated)
			mii_rx_err                                     => '0',                                                                                                --                (terminated)
			avalon_st_rx_pause_length_valid                => open,                                                                                               --                (terminated)
			avalon_st_rx_pause_length_data                 => open,                                                                                               --                (terminated)
			tx_clkena                                      => '0',                                                                                                --                (terminated)
			tx_path_delay_1g_data                          => "0000000000000000000000",                                                                           --                (terminated)
			tx_time_of_day_96b_1g_data                     => "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", --                (terminated)
			tx_time_of_day_64b_1g_data                     => "0000000000000000000000000000000000000000000000000000000000000000",                                 --                (terminated)
			rx_path_delay_1g_data                          => "0000000000000000000000",                                                                           --                (terminated)
			rx_time_of_day_96b_1g_data                     => "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", --                (terminated)
			rx_time_of_day_64b_1g_data                     => "0000000000000000000000000000000000000000000000000000000000000000",                                 --                (terminated)
			tx_etstamp_ins_ctrl_timestamp_insert           => '0',                                                                                                --                (terminated)
			tx_etstamp_ins_ctrl_timestamp_format           => '0',                                                                                                --                (terminated)
			tx_etstamp_ins_ctrl_residence_time_update      => '0',                                                                                                --                (terminated)
			tx_etstamp_ins_ctrl_ingress_timestamp_96b      => "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", --                (terminated)
			tx_etstamp_ins_ctrl_ingress_timestamp_64b      => "0000000000000000000000000000000000000000000000000000000000000000",                                 --                (terminated)
			tx_etstamp_ins_ctrl_residence_time_calc_format => '0',                                                                                                --                (terminated)
			tx_etstamp_ins_ctrl_checksum_zero              => '0',                                                                                                --                (terminated)
			tx_etstamp_ins_ctrl_checksum_correct           => '0',                                                                                                --                (terminated)
			tx_etstamp_ins_ctrl_offset_timestamp           => "0000000000000000",                                                                                 --                (terminated)
			tx_etstamp_ins_ctrl_offset_correction_field    => "0000000000000000",                                                                                 --                (terminated)
			tx_etstamp_ins_ctrl_offset_checksum_field      => "0000000000000000",                                                                                 --                (terminated)
			tx_etstamp_ins_ctrl_offset_checksum_correction => "0000000000000000",                                                                                 --                (terminated)
			tx_egress_asymmetry_update                     => '0',                                                                                                --                (terminated)
			tx_egress_p2p_update                           => '0',                                                                                                --                (terminated)
			tx_egress_p2p_val                              => "0000000000000000000000000000000000000000000000",                                                   --                (terminated)
			rx_ingress_p2p_val_valid                       => open,                                                                                               --                (terminated)
			rx_ingress_p2p_val                             => open,                                                                                               --                (terminated)
			ecc_err_det_corr                               => open,                                                                                               --                (terminated)
			ecc_err_det_uncorr                             => open                                                                                                --                (terminated)
		);

end architecture rtl; -- of alt_usxgmii_mac
