// address_decoder_top_master.v

// Generated using ACDS version 19.4 64

`timescale 1 ps / 1 ps
module address_decoder_top_master #(
		parameter AV_ADDRESS_W                = 32,
		parameter AV_DATA_W                   = 32,
		parameter AV_BURSTCOUNT_W             = 3,
		parameter AV_BYTEENABLE_W             = 4,
		parameter UAV_ADDRESS_W               = 32,
		parameter UAV_BURSTCOUNT_W            = 3,
		parameter USE_READ                    = 1,
		parameter USE_WRITE                   = 1,
		parameter USE_BEGINBURSTTRANSFER      = 0,
		parameter USE_BEGINTRANSFER           = 0,
		parameter USE_CHIPSELECT              = 0,
		parameter USE_BURSTCOUNT              = 0,
		parameter USE_READDATAVALID           = 1,
		parameter USE_WAITREQUEST             = 1,
		parameter USE_READRESPONSE            = 0,
		parameter USE_WRITERESPONSE           = 0,
		parameter AV_SYMBOLS_PER_WORD         = 4,
		parameter AV_ADDRESS_SYMBOLS          = 1,
		parameter AV_BURSTCOUNT_SYMBOLS       = 1,
		parameter AV_CONSTANT_BURST_BEHAVIOR  = 0,
		parameter UAV_CONSTANT_BURST_BEHAVIOR = 0,
		parameter AV_LINEWRAPBURSTS           = 0,
		parameter AV_REGISTERINCOMINGSIGNALS  = 0,
		parameter SYNC_RESET                  = 0
	) (
		input  wire        clk,               //                       clk.clk
		input  wire        reset,             //                     reset.reset
		output wire [31:0] uav_address,       // avalon_universal_master_0.address
		output wire [2:0]  uav_burstcount,    //                          .burstcount
		output wire        uav_read,          //                          .read
		output wire        uav_write,         //                          .write
		input  wire        uav_waitrequest,   //                          .waitrequest
		input  wire        uav_readdatavalid, //                          .readdatavalid
		output wire [3:0]  uav_byteenable,    //                          .byteenable
		input  wire [31:0] uav_readdata,      //                          .readdata
		output wire [31:0] uav_writedata,     //                          .writedata
		output wire        uav_lock,          //                          .lock
		output wire        uav_debugaccess,   //                          .debugaccess
		input  wire [31:0] av_address,        //      avalon_anti_master_0.address
		output wire        av_waitrequest,    //                          .waitrequest
		input  wire        av_read,           //                          .read
		output wire [31:0] av_readdata,       //                          .readdata
		output wire        av_readdatavalid,  //                          .readdatavalid
		input  wire        av_write,          //                          .write
		input  wire [31:0] av_writedata       //                          .writedata
	);

	address_decoder_top_master_altera_merlin_master_translator_191_g7h47bq #(
		.AV_ADDRESS_W                (AV_ADDRESS_W),
		.AV_DATA_W                   (AV_DATA_W),
		.AV_BURSTCOUNT_W             (AV_BURSTCOUNT_W),
		.AV_BYTEENABLE_W             (AV_BYTEENABLE_W),
		.UAV_ADDRESS_W               (UAV_ADDRESS_W),
		.UAV_BURSTCOUNT_W            (UAV_BURSTCOUNT_W),
		.USE_READ                    (USE_READ),
		.USE_WRITE                   (USE_WRITE),
		.USE_BEGINBURSTTRANSFER      (USE_BEGINBURSTTRANSFER),
		.USE_BEGINTRANSFER           (USE_BEGINTRANSFER),
		.USE_CHIPSELECT              (USE_CHIPSELECT),
		.USE_BURSTCOUNT              (USE_BURSTCOUNT),
		.USE_READDATAVALID           (USE_READDATAVALID),
		.USE_WAITREQUEST             (USE_WAITREQUEST),
		.USE_READRESPONSE            (USE_READRESPONSE),
		.USE_WRITERESPONSE           (USE_WRITERESPONSE),
		.AV_SYMBOLS_PER_WORD         (AV_SYMBOLS_PER_WORD),
		.AV_ADDRESS_SYMBOLS          (AV_ADDRESS_SYMBOLS),
		.AV_BURSTCOUNT_SYMBOLS       (AV_BURSTCOUNT_SYMBOLS),
		.AV_CONSTANT_BURST_BEHAVIOR  (AV_CONSTANT_BURST_BEHAVIOR),
		.UAV_CONSTANT_BURST_BEHAVIOR (UAV_CONSTANT_BURST_BEHAVIOR),
		.AV_LINEWRAPBURSTS           (AV_LINEWRAPBURSTS),
		.AV_REGISTERINCOMINGSIGNALS  (AV_REGISTERINCOMINGSIGNALS),
		.SYNC_RESET                  (SYNC_RESET),
		.WAITREQUEST_ALLOWANCE       (0)
	) master (
		.clk                    (clk),               //   input,   width = 1,                       clk.clk
		.reset                  (reset),             //   input,   width = 1,                     reset.reset
		.uav_address            (uav_address),       //  output,  width = 32, avalon_universal_master_0.address
		.uav_burstcount         (uav_burstcount),    //  output,   width = 3,                          .burstcount
		.uav_read               (uav_read),          //  output,   width = 1,                          .read
		.uav_write              (uav_write),         //  output,   width = 1,                          .write
		.uav_waitrequest        (uav_waitrequest),   //   input,   width = 1,                          .waitrequest
		.uav_readdatavalid      (uav_readdatavalid), //   input,   width = 1,                          .readdatavalid
		.uav_byteenable         (uav_byteenable),    //  output,   width = 4,                          .byteenable
		.uav_readdata           (uav_readdata),      //   input,  width = 32,                          .readdata
		.uav_writedata          (uav_writedata),     //  output,  width = 32,                          .writedata
		.uav_lock               (uav_lock),          //  output,   width = 1,                          .lock
		.uav_debugaccess        (uav_debugaccess),   //  output,   width = 1,                          .debugaccess
		.av_address             (av_address),        //   input,  width = 32,      avalon_anti_master_0.address
		.av_waitrequest         (av_waitrequest),    //  output,   width = 1,                          .waitrequest
		.av_read                (av_read),           //   input,   width = 1,                          .read
		.av_readdata            (av_readdata),       //  output,  width = 32,                          .readdata
		.av_readdatavalid       (av_readdatavalid),  //  output,   width = 1,                          .readdatavalid
		.av_write               (av_write),          //   input,   width = 1,                          .write
		.av_writedata           (av_writedata),      //   input,  width = 32,                          .writedata
		.av_burstcount          (3'b001),            // (terminated),                                        
		.av_byteenable          (4'b1111),           // (terminated),                                        
		.av_beginbursttransfer  (1'b0),              // (terminated),                                        
		.av_begintransfer       (1'b0),              // (terminated),                                        
		.av_chipselect          (1'b0),              // (terminated),                                        
		.av_lock                (1'b0),              // (terminated),                                        
		.av_debugaccess         (1'b0),              // (terminated),                                        
		.uav_clken              (),                  // (terminated),                                        
		.av_clken               (1'b1),              // (terminated),                                        
		.uav_response           (2'b00),             // (terminated),                                        
		.av_response            (),                  // (terminated),                                        
		.uav_writeresponsevalid (1'b0),              // (terminated),                                        
		.av_writeresponsevalid  ()                   // (terminated),                                        
	);

endmodule
