<?xml version="1.0" encoding="UTF-8"?>
<deploy
 date="2020.01.29.11:21:39"
 outputDirectory="C:/Users/mklee/AppData/Local/Temp/alt8290_6148029088922141087.dir/0002_alt_em10g32_0_gen/rtl/address_decoder/address_decoder_top/">
 <perimeter>
  <parameter
     name="AUTO_GENERATION_ID"
     type="Integer"
     defaultValue="0"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_UNIQUE_ID"
     type="String"
     defaultValue=""
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_DEVICE_FAMILY"
     type="String"
     defaultValue="Stratix 10"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_DEVICE"
     type="String"
     defaultValue="1SG165HU2F50E2VG"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_DEVICE_SPEEDGRADE"
     type="String"
     defaultValue="2"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_CSR_CLK_CLOCK_RATE"
     type="Long"
     defaultValue="-1"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_CSR_CLK_CLOCK_DOMAIN"
     type="Integer"
     defaultValue="-1"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_CSR_CLK_RESET_DOMAIN"
     type="Integer"
     defaultValue="-1"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_MAC_CLK_CLOCK_RATE"
     type="Long"
     defaultValue="-1"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_MAC_CLK_CLOCK_DOMAIN"
     type="Integer"
     defaultValue="-1"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_MAC_CLK_RESET_DOMAIN"
     type="Integer"
     defaultValue="-1"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_MULTI_CHANNEL_ADDRESS_MAP"
     type="AddressMap"
     defaultValue=""
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_MULTI_CHANNEL_ADDRESS_WIDTH"
     type="AddressWidthType"
     defaultValue="-1"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_TRAFFIC_CONTROLLER_CH_0_1_ADDRESS_MAP"
     type="AddressMap"
     defaultValue=""
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_TRAFFIC_CONTROLLER_CH_0_1_ADDRESS_WIDTH"
     type="AddressWidthType"
     defaultValue="-1"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_TRAFFIC_CONTROLLER_CH_10_11_ADDRESS_MAP"
     type="AddressMap"
     defaultValue=""
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_TRAFFIC_CONTROLLER_CH_10_11_ADDRESS_WIDTH"
     type="AddressWidthType"
     defaultValue="-1"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_TRAFFIC_CONTROLLER_CH_2_3_ADDRESS_MAP"
     type="AddressMap"
     defaultValue=""
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_TRAFFIC_CONTROLLER_CH_2_3_ADDRESS_WIDTH"
     type="AddressWidthType"
     defaultValue="-1"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_TRAFFIC_CONTROLLER_CH_4_5_ADDRESS_MAP"
     type="AddressMap"
     defaultValue=""
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_TRAFFIC_CONTROLLER_CH_4_5_ADDRESS_WIDTH"
     type="AddressWidthType"
     defaultValue="-1"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_TRAFFIC_CONTROLLER_CH_6_7_ADDRESS_MAP"
     type="AddressMap"
     defaultValue=""
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_TRAFFIC_CONTROLLER_CH_6_7_ADDRESS_WIDTH"
     type="AddressWidthType"
     defaultValue="-1"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_TRAFFIC_CONTROLLER_CH_8_9_ADDRESS_MAP"
     type="AddressMap"
     defaultValue=""
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_TRAFFIC_CONTROLLER_CH_8_9_ADDRESS_WIDTH"
     type="AddressWidthType"
     defaultValue="-1"
     onHdl="0"
     affectsHdl="1" />
  <interface name="csr_clk" kind="clock" start="0">
   <property name="clockRate" value="125000000" />
   <property name="externallyDriven" value="false" />
   <property name="ptfSchematicName" value="" />
   <port name="csr_clk_clk" direction="input" role="clk" width="1" />
  </interface>
  <interface name="csr_clk_reset" kind="reset" start="0">
   <property name="associatedClock" value="" />
   <property name="synchronousEdges" value="NONE" />
   <port
       name="csr_clk_reset_reset_n"
       direction="input"
       role="reset_n"
       width="1" />
  </interface>
  <interface name="mac_clk" kind="clock" start="0">
   <property name="clockRate" value="156250000" />
   <property name="externallyDriven" value="false" />
   <property name="ptfSchematicName" value="" />
   <port name="mac_clk_clk" direction="input" role="clk" width="1" />
  </interface>
  <interface name="mac_clk_reset" kind="reset" start="0">
   <property name="associatedClock" value="" />
   <property name="synchronousEdges" value="NONE" />
   <port
       name="mac_clk_reset_reset_n"
       direction="input"
       role="reset_n"
       width="1" />
  </interface>
  <interface name="slave" kind="avalon" start="0">
   <property name="addressAlignment" value="DYNAMIC" />
   <property name="addressGroup" value="0" />
   <property name="addressSpan" value="4294967296" />
   <property name="addressUnits" value="SYMBOLS" />
   <property name="alwaysBurstMaxBurst" value="false" />
   <property name="associatedClock" value="csr_clk" />
   <property name="associatedReset" value="csr_clk_reset" />
   <property name="bitsPerSymbol" value="8" />
   <property name="bridgedAddressOffset" value="0" />
   <property name="bridgesToMaster" value="" />
   <property name="burstOnBurstBoundariesOnly" value="false" />
   <property name="burstcountUnits" value="SYMBOLS" />
   <property name="constantBurstBehavior" value="false" />
   <property name="explicitAddressSpan" value="0" />
   <property name="holdTime" value="0" />
   <property name="interleaveBursts" value="false" />
   <property name="isBigEndian" value="false" />
   <property name="isFlash" value="false" />
   <property name="isMemoryDevice" value="false" />
   <property name="isNonVolatileStorage" value="false" />
   <property name="linewrapBursts" value="false" />
   <property name="maximumPendingReadTransactions" value="1" />
   <property name="maximumPendingWriteTransactions" value="0" />
   <property name="minimumReadLatency" value="1" />
   <property name="minimumResponseLatency" value="1" />
   <property name="minimumUninterruptedRunLength" value="1" />
   <property name="prSafe" value="false" />
   <property name="printableDevice" value="false" />
   <property name="readLatency" value="0" />
   <property name="readWaitStates" value="0" />
   <property name="readWaitTime" value="0" />
   <property name="registerIncomingSignals" value="false" />
   <property name="registerOutgoingSignals" value="false" />
   <property name="setupTime" value="0" />
   <property name="timingUnits" value="Cycles" />
   <property name="transparentBridge" value="false" />
   <property name="waitrequestAllowance" value="0" />
   <property name="wellBehavedWaitrequest" value="false" />
   <property name="writeLatency" value="0" />
   <property name="writeWaitStates" value="0" />
   <property name="writeWaitTime" value="0" />
   <port name="slave_address" direction="input" role="address" width="32" />
   <port
       name="slave_waitrequest"
       direction="output"
       role="waitrequest"
       width="1" />
   <port name="slave_read" direction="input" role="read" width="1" />
   <port name="slave_readdata" direction="output" role="readdata" width="32" />
   <port
       name="slave_readdatavalid"
       direction="output"
       role="readdatavalid"
       width="1" />
   <port name="slave_write" direction="input" role="write" width="1" />
   <port name="slave_writedata" direction="input" role="writedata" width="32" />
  </interface>
  <interface name="multi_channel" kind="avalon" start="1">
   <property name="adaptsTo" value="" />
   <property name="addressGroup" value="0" />
   <property name="addressUnits" value="SYMBOLS" />
   <property name="alwaysBurstMaxBurst" value="false" />
   <property name="associatedClock" value="csr_clk" />
   <property name="associatedReset" value="csr_clk_reset" />
   <property name="bitsPerSymbol" value="8" />
   <property name="burstOnBurstBoundariesOnly" value="false" />
   <property name="burstcountUnits" value="SYMBOLS" />
   <property name="constantBurstBehavior" value="false" />
   <property name="dBSBigEndian" value="false" />
   <property name="doStreamReads" value="false" />
   <property name="doStreamWrites" value="false" />
   <property name="holdTime" value="0" />
   <property name="interleaveBursts" value="false" />
   <property name="isAsynchronous" value="false" />
   <property name="isBigEndian" value="false" />
   <property name="isReadable" value="false" />
   <property name="isWriteable" value="false" />
   <property name="linewrapBursts" value="false" />
   <property name="maxAddressWidth" value="32" />
   <property name="maximumPendingReadTransactions" value="0" />
   <property name="maximumPendingWriteTransactions" value="0" />
   <property name="minimumReadLatency" value="1" />
   <property name="minimumResponseLatency" value="1" />
   <property name="prSafe" value="false" />
   <property name="readLatency" value="0" />
   <property name="readWaitTime" value="0" />
   <property name="registerIncomingSignals" value="false" />
   <property name="registerOutgoingSignals" value="false" />
   <property name="setupTime" value="0" />
   <property name="timingUnits" value="Cycles" />
   <property name="waitrequestAllowance" value="0" />
   <property name="writeWaitTime" value="0" />
   <port
       name="multi_channel_address"
       direction="output"
       role="address"
       width="20" />
   <port name="multi_channel_write" direction="output" role="write" width="1" />
   <port name="multi_channel_read" direction="output" role="read" width="1" />
   <port
       name="multi_channel_readdata"
       direction="input"
       role="readdata"
       width="32" />
   <port
       name="multi_channel_writedata"
       direction="output"
       role="writedata"
       width="32" />
   <port
       name="multi_channel_waitrequest"
       direction="input"
       role="waitrequest"
       width="1" />
  </interface>
  <interface name="traffic_controller_ch_0_1" kind="avalon" start="1">
   <property name="adaptsTo" value="" />
   <property name="addressGroup" value="0" />
   <property name="addressUnits" value="SYMBOLS" />
   <property name="alwaysBurstMaxBurst" value="false" />
   <property name="associatedClock" value="mac_clk" />
   <property name="associatedReset" value="mac_clk_reset" />
   <property name="bitsPerSymbol" value="8" />
   <property name="burstOnBurstBoundariesOnly" value="false" />
   <property name="burstcountUnits" value="SYMBOLS" />
   <property name="constantBurstBehavior" value="false" />
   <property name="dBSBigEndian" value="false" />
   <property name="doStreamReads" value="false" />
   <property name="doStreamWrites" value="false" />
   <property name="holdTime" value="0" />
   <property name="interleaveBursts" value="false" />
   <property name="isAsynchronous" value="false" />
   <property name="isBigEndian" value="false" />
   <property name="isReadable" value="false" />
   <property name="isWriteable" value="false" />
   <property name="linewrapBursts" value="false" />
   <property name="maxAddressWidth" value="32" />
   <property name="maximumPendingReadTransactions" value="0" />
   <property name="maximumPendingWriteTransactions" value="0" />
   <property name="minimumReadLatency" value="1" />
   <property name="minimumResponseLatency" value="1" />
   <property name="prSafe" value="false" />
   <property name="readLatency" value="0" />
   <property name="readWaitTime" value="0" />
   <property name="registerIncomingSignals" value="false" />
   <property name="registerOutgoingSignals" value="false" />
   <property name="setupTime" value="0" />
   <property name="timingUnits" value="Cycles" />
   <property name="waitrequestAllowance" value="0" />
   <property name="writeWaitTime" value="0" />
   <port
       name="traffic_controller_ch_0_1_address"
       direction="output"
       role="address"
       width="14" />
   <port
       name="traffic_controller_ch_0_1_write"
       direction="output"
       role="write"
       width="1" />
   <port
       name="traffic_controller_ch_0_1_read"
       direction="output"
       role="read"
       width="1" />
   <port
       name="traffic_controller_ch_0_1_readdata"
       direction="input"
       role="readdata"
       width="32" />
   <port
       name="traffic_controller_ch_0_1_writedata"
       direction="output"
       role="writedata"
       width="32" />
   <port
       name="traffic_controller_ch_0_1_waitrequest"
       direction="input"
       role="waitrequest"
       width="1" />
  </interface>
  <interface name="traffic_controller_ch_10_11" kind="avalon" start="1">
   <property name="adaptsTo" value="" />
   <property name="addressGroup" value="0" />
   <property name="addressUnits" value="SYMBOLS" />
   <property name="alwaysBurstMaxBurst" value="false" />
   <property name="associatedClock" value="mac_clk" />
   <property name="associatedReset" value="mac_clk_reset" />
   <property name="bitsPerSymbol" value="8" />
   <property name="burstOnBurstBoundariesOnly" value="false" />
   <property name="burstcountUnits" value="SYMBOLS" />
   <property name="constantBurstBehavior" value="false" />
   <property name="dBSBigEndian" value="false" />
   <property name="doStreamReads" value="false" />
   <property name="doStreamWrites" value="false" />
   <property name="holdTime" value="0" />
   <property name="interleaveBursts" value="false" />
   <property name="isAsynchronous" value="false" />
   <property name="isBigEndian" value="false" />
   <property name="isReadable" value="false" />
   <property name="isWriteable" value="false" />
   <property name="linewrapBursts" value="false" />
   <property name="maxAddressWidth" value="32" />
   <property name="maximumPendingReadTransactions" value="0" />
   <property name="maximumPendingWriteTransactions" value="0" />
   <property name="minimumReadLatency" value="1" />
   <property name="minimumResponseLatency" value="1" />
   <property name="prSafe" value="false" />
   <property name="readLatency" value="0" />
   <property name="readWaitTime" value="0" />
   <property name="registerIncomingSignals" value="false" />
   <property name="registerOutgoingSignals" value="false" />
   <property name="setupTime" value="0" />
   <property name="timingUnits" value="Cycles" />
   <property name="waitrequestAllowance" value="0" />
   <property name="writeWaitTime" value="0" />
   <port
       name="traffic_controller_ch_10_11_address"
       direction="output"
       role="address"
       width="14" />
   <port
       name="traffic_controller_ch_10_11_write"
       direction="output"
       role="write"
       width="1" />
   <port
       name="traffic_controller_ch_10_11_read"
       direction="output"
       role="read"
       width="1" />
   <port
       name="traffic_controller_ch_10_11_readdata"
       direction="input"
       role="readdata"
       width="32" />
   <port
       name="traffic_controller_ch_10_11_writedata"
       direction="output"
       role="writedata"
       width="32" />
   <port
       name="traffic_controller_ch_10_11_waitrequest"
       direction="input"
       role="waitrequest"
       width="1" />
  </interface>
  <interface name="traffic_controller_ch_2_3" kind="avalon" start="1">
   <property name="adaptsTo" value="" />
   <property name="addressGroup" value="0" />
   <property name="addressUnits" value="SYMBOLS" />
   <property name="alwaysBurstMaxBurst" value="false" />
   <property name="associatedClock" value="mac_clk" />
   <property name="associatedReset" value="mac_clk_reset" />
   <property name="bitsPerSymbol" value="8" />
   <property name="burstOnBurstBoundariesOnly" value="false" />
   <property name="burstcountUnits" value="SYMBOLS" />
   <property name="constantBurstBehavior" value="false" />
   <property name="dBSBigEndian" value="false" />
   <property name="doStreamReads" value="false" />
   <property name="doStreamWrites" value="false" />
   <property name="holdTime" value="0" />
   <property name="interleaveBursts" value="false" />
   <property name="isAsynchronous" value="false" />
   <property name="isBigEndian" value="false" />
   <property name="isReadable" value="false" />
   <property name="isWriteable" value="false" />
   <property name="linewrapBursts" value="false" />
   <property name="maxAddressWidth" value="32" />
   <property name="maximumPendingReadTransactions" value="0" />
   <property name="maximumPendingWriteTransactions" value="0" />
   <property name="minimumReadLatency" value="1" />
   <property name="minimumResponseLatency" value="1" />
   <property name="prSafe" value="false" />
   <property name="readLatency" value="0" />
   <property name="readWaitTime" value="0" />
   <property name="registerIncomingSignals" value="false" />
   <property name="registerOutgoingSignals" value="false" />
   <property name="setupTime" value="0" />
   <property name="timingUnits" value="Cycles" />
   <property name="waitrequestAllowance" value="0" />
   <property name="writeWaitTime" value="0" />
   <port
       name="traffic_controller_ch_2_3_address"
       direction="output"
       role="address"
       width="14" />
   <port
       name="traffic_controller_ch_2_3_write"
       direction="output"
       role="write"
       width="1" />
   <port
       name="traffic_controller_ch_2_3_read"
       direction="output"
       role="read"
       width="1" />
   <port
       name="traffic_controller_ch_2_3_readdata"
       direction="input"
       role="readdata"
       width="32" />
   <port
       name="traffic_controller_ch_2_3_writedata"
       direction="output"
       role="writedata"
       width="32" />
   <port
       name="traffic_controller_ch_2_3_waitrequest"
       direction="input"
       role="waitrequest"
       width="1" />
  </interface>
  <interface name="traffic_controller_ch_4_5" kind="avalon" start="1">
   <property name="adaptsTo" value="" />
   <property name="addressGroup" value="0" />
   <property name="addressUnits" value="SYMBOLS" />
   <property name="alwaysBurstMaxBurst" value="false" />
   <property name="associatedClock" value="mac_clk" />
   <property name="associatedReset" value="mac_clk_reset" />
   <property name="bitsPerSymbol" value="8" />
   <property name="burstOnBurstBoundariesOnly" value="false" />
   <property name="burstcountUnits" value="SYMBOLS" />
   <property name="constantBurstBehavior" value="false" />
   <property name="dBSBigEndian" value="false" />
   <property name="doStreamReads" value="false" />
   <property name="doStreamWrites" value="false" />
   <property name="holdTime" value="0" />
   <property name="interleaveBursts" value="false" />
   <property name="isAsynchronous" value="false" />
   <property name="isBigEndian" value="false" />
   <property name="isReadable" value="false" />
   <property name="isWriteable" value="false" />
   <property name="linewrapBursts" value="false" />
   <property name="maxAddressWidth" value="32" />
   <property name="maximumPendingReadTransactions" value="0" />
   <property name="maximumPendingWriteTransactions" value="0" />
   <property name="minimumReadLatency" value="1" />
   <property name="minimumResponseLatency" value="1" />
   <property name="prSafe" value="false" />
   <property name="readLatency" value="0" />
   <property name="readWaitTime" value="0" />
   <property name="registerIncomingSignals" value="false" />
   <property name="registerOutgoingSignals" value="false" />
   <property name="setupTime" value="0" />
   <property name="timingUnits" value="Cycles" />
   <property name="waitrequestAllowance" value="0" />
   <property name="writeWaitTime" value="0" />
   <port
       name="traffic_controller_ch_4_5_address"
       direction="output"
       role="address"
       width="14" />
   <port
       name="traffic_controller_ch_4_5_write"
       direction="output"
       role="write"
       width="1" />
   <port
       name="traffic_controller_ch_4_5_read"
       direction="output"
       role="read"
       width="1" />
   <port
       name="traffic_controller_ch_4_5_readdata"
       direction="input"
       role="readdata"
       width="32" />
   <port
       name="traffic_controller_ch_4_5_writedata"
       direction="output"
       role="writedata"
       width="32" />
   <port
       name="traffic_controller_ch_4_5_waitrequest"
       direction="input"
       role="waitrequest"
       width="1" />
  </interface>
  <interface name="traffic_controller_ch_6_7" kind="avalon" start="1">
   <property name="adaptsTo" value="" />
   <property name="addressGroup" value="0" />
   <property name="addressUnits" value="SYMBOLS" />
   <property name="alwaysBurstMaxBurst" value="false" />
   <property name="associatedClock" value="mac_clk" />
   <property name="associatedReset" value="mac_clk_reset" />
   <property name="bitsPerSymbol" value="8" />
   <property name="burstOnBurstBoundariesOnly" value="false" />
   <property name="burstcountUnits" value="SYMBOLS" />
   <property name="constantBurstBehavior" value="false" />
   <property name="dBSBigEndian" value="false" />
   <property name="doStreamReads" value="false" />
   <property name="doStreamWrites" value="false" />
   <property name="holdTime" value="0" />
   <property name="interleaveBursts" value="false" />
   <property name="isAsynchronous" value="false" />
   <property name="isBigEndian" value="false" />
   <property name="isReadable" value="false" />
   <property name="isWriteable" value="false" />
   <property name="linewrapBursts" value="false" />
   <property name="maxAddressWidth" value="32" />
   <property name="maximumPendingReadTransactions" value="0" />
   <property name="maximumPendingWriteTransactions" value="0" />
   <property name="minimumReadLatency" value="1" />
   <property name="minimumResponseLatency" value="1" />
   <property name="prSafe" value="false" />
   <property name="readLatency" value="0" />
   <property name="readWaitTime" value="0" />
   <property name="registerIncomingSignals" value="false" />
   <property name="registerOutgoingSignals" value="false" />
   <property name="setupTime" value="0" />
   <property name="timingUnits" value="Cycles" />
   <property name="waitrequestAllowance" value="0" />
   <property name="writeWaitTime" value="0" />
   <port
       name="traffic_controller_ch_6_7_address"
       direction="output"
       role="address"
       width="14" />
   <port
       name="traffic_controller_ch_6_7_write"
       direction="output"
       role="write"
       width="1" />
   <port
       name="traffic_controller_ch_6_7_read"
       direction="output"
       role="read"
       width="1" />
   <port
       name="traffic_controller_ch_6_7_readdata"
       direction="input"
       role="readdata"
       width="32" />
   <port
       name="traffic_controller_ch_6_7_writedata"
       direction="output"
       role="writedata"
       width="32" />
   <port
       name="traffic_controller_ch_6_7_waitrequest"
       direction="input"
       role="waitrequest"
       width="1" />
  </interface>
  <interface name="traffic_controller_ch_8_9" kind="avalon" start="1">
   <property name="adaptsTo" value="" />
   <property name="addressGroup" value="0" />
   <property name="addressUnits" value="SYMBOLS" />
   <property name="alwaysBurstMaxBurst" value="false" />
   <property name="associatedClock" value="mac_clk" />
   <property name="associatedReset" value="mac_clk_reset" />
   <property name="bitsPerSymbol" value="8" />
   <property name="burstOnBurstBoundariesOnly" value="false" />
   <property name="burstcountUnits" value="SYMBOLS" />
   <property name="constantBurstBehavior" value="false" />
   <property name="dBSBigEndian" value="false" />
   <property name="doStreamReads" value="false" />
   <property name="doStreamWrites" value="false" />
   <property name="holdTime" value="0" />
   <property name="interleaveBursts" value="false" />
   <property name="isAsynchronous" value="false" />
   <property name="isBigEndian" value="false" />
   <property name="isReadable" value="false" />
   <property name="isWriteable" value="false" />
   <property name="linewrapBursts" value="false" />
   <property name="maxAddressWidth" value="32" />
   <property name="maximumPendingReadTransactions" value="0" />
   <property name="maximumPendingWriteTransactions" value="0" />
   <property name="minimumReadLatency" value="1" />
   <property name="minimumResponseLatency" value="1" />
   <property name="prSafe" value="false" />
   <property name="readLatency" value="0" />
   <property name="readWaitTime" value="0" />
   <property name="registerIncomingSignals" value="false" />
   <property name="registerOutgoingSignals" value="false" />
   <property name="setupTime" value="0" />
   <property name="timingUnits" value="Cycles" />
   <property name="waitrequestAllowance" value="0" />
   <property name="writeWaitTime" value="0" />
   <port
       name="traffic_controller_ch_8_9_address"
       direction="output"
       role="address"
       width="14" />
   <port
       name="traffic_controller_ch_8_9_write"
       direction="output"
       role="write"
       width="1" />
   <port
       name="traffic_controller_ch_8_9_read"
       direction="output"
       role="read"
       width="1" />
   <port
       name="traffic_controller_ch_8_9_readdata"
       direction="input"
       role="readdata"
       width="32" />
   <port
       name="traffic_controller_ch_8_9_writedata"
       direction="output"
       role="writedata"
       width="32" />
   <port
       name="traffic_controller_ch_8_9_waitrequest"
       direction="input"
       role="waitrequest"
       width="1" />
  </interface>
 </perimeter>
 <entity kind="address_decoder_top" version="1.0" name="address_decoder_top">
  <parameter name="AUTO_TRAFFIC_CONTROLLER_CH_0_1_ADDRESS_MAP" value="" />
  <parameter name="AUTO_UNIQUE_ID" value="" />
  <parameter name="AUTO_TRAFFIC_CONTROLLER_CH_10_11_ADDRESS_MAP" value="" />
  <parameter name="AUTO_TRAFFIC_CONTROLLER_CH_0_1_ADDRESS_WIDTH" value="-1" />
  <parameter name="AUTO_MULTI_CHANNEL_ADDRESS_MAP" value="" />
  <parameter name="AUTO_TRAFFIC_CONTROLLER_CH_10_11_ADDRESS_WIDTH" value="-1" />
  <parameter name="AUTO_TRAFFIC_CONTROLLER_CH_6_7_ADDRESS_WIDTH" value="-1" />
  <parameter name="AUTO_CSR_CLK_CLOCK_DOMAIN" value="-1" />
  <parameter name="AUTO_MULTI_CHANNEL_ADDRESS_WIDTH" value="-1" />
  <parameter name="AUTO_MAC_CLK_RESET_DOMAIN" value="-1" />
  <parameter name="AUTO_TRAFFIC_CONTROLLER_CH_8_9_ADDRESS_WIDTH" value="-1" />
  <parameter name="AUTO_GENERATION_ID" value="0" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Stratix 10" />
  <parameter name="AUTO_TRAFFIC_CONTROLLER_CH_4_5_ADDRESS_MAP" value="" />
  <parameter name="AUTO_TRAFFIC_CONTROLLER_CH_4_5_ADDRESS_WIDTH" value="-1" />
  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="2" />
  <parameter name="AUTO_TRAFFIC_CONTROLLER_CH_8_9_ADDRESS_MAP" value="" />
  <parameter name="AUTO_TRAFFIC_CONTROLLER_CH_6_7_ADDRESS_MAP" value="" />
  <parameter name="AUTO_TRAFFIC_CONTROLLER_CH_2_3_ADDRESS_MAP" value="" />
  <parameter name="AUTO_DEVICE" value="1SG165HU2F50E2VG" />
  <parameter name="AUTO_MAC_CLK_CLOCK_RATE" value="-1" />
  <parameter name="AUTO_CSR_CLK_CLOCK_RATE" value="-1" />
  <parameter name="AUTO_CSR_CLK_RESET_DOMAIN" value="-1" />
  <parameter name="AUTO_TRAFFIC_CONTROLLER_CH_2_3_ADDRESS_WIDTH" value="-1" />
  <parameter name="AUTO_MAC_CLK_CLOCK_DOMAIN" value="-1" />
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\synth\address_decoder_top.vhd"
       attributes="CONTAINS_INLINE_CONFIGURATION" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\synth\address_decoder_top.vhd"
       attributes="CONTAINS_INLINE_CONFIGURATION" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="C:/Users/mklee/AppData/Local/Temp/alt8290_6148029088922141087.dir/0002_alt_em10g32_0_gen/rtl/address_decoder/address_decoder_top.qsys" />
  </sourceFiles>
  <childSourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_master_agent/altera_merlin_master_agent_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_master_agent/altera_merlin_master_agent_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_traffic_limiter/altera_merlin_traffic_limiter_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/iconnect/alt_hiconnect_sc_fifo/alt_hiconnect_sc_fifo_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_reset_controller/altera_reset_controller_hw.tcl" />
  </childSourceFiles>
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_csr_clk"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_mac_clk"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_master"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_mm_clock_crossing_bridge"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_multi_channel"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_traffic_controller_ch_0_1"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_traffic_controller_ch_10_11"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_traffic_controller_ch_2_3"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_traffic_controller_ch_4_5"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_traffic_controller_ch_6_7"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_traffic_controller_ch_8_9"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_mm_interconnect_191_3kbf4ri"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_master_translator_191_g7h47bq"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_slave_translator_191_x56fcki"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_master_agent_191_mpbm6tq"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_slave_agent_191_ncfkfri"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_avalon_sc_fifo_191_e5eqkcq"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_router_191_fwgsesi"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_router_191_eo734fy"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_demultiplexer_191_cvl73xa"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_multiplexer_191_mbb35ky"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_demultiplexer_191_6ywz4pa"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_multiplexer_191_drzivnq"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_mm_interconnect_191_fv6bu5i"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_master_translator_191_g7h47bq"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_slave_translator_191_x56fcki"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_master_agent_191_mpbm6tq"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_slave_agent_191_ncfkfri"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_avalon_sc_fifo_191_e5eqkcq"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_router_191_oyu3via"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_router_191_eyt5dgy"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_traffic_limiter_191_kcba44q"</message>
   <message level="Info" culprit="my_altera_avalon_sc_fifo_dest_id_fifo">"Generating: my_altera_avalon_sc_fifo_dest_id_fifo"</message>
   <message level="Info" culprit="my_alt_hiconnect_sc_fifo_dest_id_fifo">"Generating: my_alt_hiconnect_sc_fifo_dest_id_fifo"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_traffic_limiter_altera_avalon_sc_fifo_191_zonrf6q"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_avalon_sc_fifo_191_e5eqkcq"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_traffic_limiter_alt_hiconnect_sc_fifo_191_5pm2ohi"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_alt_hiconnect_sc_fifo_191_7qtmpqq"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_demultiplexer_191_mkj5isy"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_multiplexer_191_hdlfwfy"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_demultiplexer_191_s3vmtaa"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_multiplexer_191_hkbv22i"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: altera_reset_controller"</message>
  </messages>
 </entity>
 <entity
   kind="altera_generic_component"
   version="1.0"
   name="address_decoder_top_csr_clk">
  <parameter name="hlsFile" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="inputClockFrequency" value="0" />
  <parameter name="AUTO_DEVICE" value="1SG165HU2F50E2VG" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Stratix 10" />
  <parameter name="defaultBoundary" value="" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;clk_out&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedDirectClock&lt;/key&gt;
                            &lt;value&gt;clk_in&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;125000000&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRateKnown&lt;/key&gt;
                            &lt;value&gt;true&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;true&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;clk_in&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;in_clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;qsys.ui.export_name&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;125000000&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;clk_in_reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset_n&lt;/name&gt;
                        &lt;role&gt;reset_n&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;qsys.ui.export_name&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;NONE&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;clk_reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset_n_out&lt;/name&gt;
                        &lt;role&gt;reset_n&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedDirectReset&lt;/key&gt;
                            &lt;value&gt;clk_in_reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedResetSinks&lt;/key&gt;
                            &lt;value&gt;clk_in_reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;NONE&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;clock_source&lt;/className&gt;
        &lt;displayName&gt;Clock Source&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;0&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;inputClockFrequency&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Long&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;clk_in&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CLOCK_RATE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;clk&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;clk&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_RATE&lt;/key&gt;
                            &lt;value&gt;125000000&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;clk_in&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;clk_in&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_RATE&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;address_decoder_top_csr_clk&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_csr_clk&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_csr_clk&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_csr_clk&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_csr_clk&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_csr_clk&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_csr_clk&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter
     name="logicalView"
     value="ip/address_decoder_top/address_decoder_top_csr_clk.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap/&gt;
&lt;/assignmentDefinition&gt;" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="address_decoder_top" as="csr_clk" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_csr_clk"</message>
  </messages>
 </entity>
 <entity
   kind="altera_generic_component"
   version="1.0"
   name="address_decoder_top_mac_clk">
  <parameter name="hlsFile" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="inputClockFrequency" value="0" />
  <parameter name="AUTO_DEVICE" value="1SG165HU2F50E2VG" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Stratix 10" />
  <parameter name="defaultBoundary" value="" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;clk_out&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedDirectClock&lt;/key&gt;
                            &lt;value&gt;clk_in&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;156250000&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRateKnown&lt;/key&gt;
                            &lt;value&gt;true&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;true&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;clk_in&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;in_clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;qsys.ui.export_name&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;156250000&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;clk_in_reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset_n&lt;/name&gt;
                        &lt;role&gt;reset_n&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;qsys.ui.export_name&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;NONE&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;clk_reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset_n_out&lt;/name&gt;
                        &lt;role&gt;reset_n&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedDirectReset&lt;/key&gt;
                            &lt;value&gt;clk_in_reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedResetSinks&lt;/key&gt;
                            &lt;value&gt;clk_in_reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;NONE&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;clock_source&lt;/className&gt;
        &lt;displayName&gt;Clock Source&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;0&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;inputClockFrequency&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Long&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;clk_in&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CLOCK_RATE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;clk&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;clk&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_RATE&lt;/key&gt;
                            &lt;value&gt;156250000&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;clk_in&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;clk_in&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_RATE&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;address_decoder_top_mac_clk&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_mac_clk&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_mac_clk&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_mac_clk&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_mac_clk&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_mac_clk&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_mac_clk&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter
     name="logicalView"
     value="ip/address_decoder_top/address_decoder_top_mac_clk.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap/&gt;
&lt;/assignmentDefinition&gt;" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="address_decoder_top" as="mac_clk" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_mac_clk"</message>
  </messages>
 </entity>
 <entity
   kind="altera_generic_component"
   version="1.0"
   name="address_decoder_top_master">
  <parameter name="hlsFile" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="AUTO_DEVICE" value="1SG165HU2F50E2VG" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Stratix 10" />
  <parameter name="defaultBoundary" value="" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;avalon_anti_master_0&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_readdatavalid&lt;/name&gt;
                        &lt;role&gt;readdatavalid&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;merlin.flow.avalon_universal_master_0&lt;/key&gt;
                            &lt;value&gt;avalon_universal_master_0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressAlignment&lt;/key&gt;
                            &lt;value&gt;DYNAMIC&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressSpan&lt;/key&gt;
                            &lt;value&gt;4294967296&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToMaster&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isFlash&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;printableDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;transparentBridge&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;avalon_universal_master_0&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_burstcount&lt;/name&gt;
                        &lt;role&gt;burstcount&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;3&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_readdatavalid&lt;/name&gt;
                        &lt;role&gt;readdatavalid&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_byteenable&lt;/name&gt;
                        &lt;role&gt;byteenable&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;4&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_lock&lt;/name&gt;
                        &lt;role&gt;lock&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_debugaccess&lt;/name&gt;
                        &lt;role&gt;debugaccess&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;merlin.flow.avalon_anti_master_0&lt;/key&gt;
                            &lt;value&gt;avalon_anti_master_0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;adaptsTo&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dBSBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamReads&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamWrites&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isAsynchronous&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isReadable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isWriteable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maxAddressWidth&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset&lt;/name&gt;
                        &lt;role&gt;reset&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;DEASSERT&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;altera_merlin_master_translator&lt;/className&gt;
        &lt;version&gt;17.1&lt;/version&gt;
        &lt;displayName&gt;Avalon MM Master Translator&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors/&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;avalon_anti_master_0&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;avalon_anti_master_0&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_MAP&lt;/key&gt;
                            &lt;value&gt;&amp;lt;address-map&amp;gt;&amp;lt;slave name=&apos;avalon_anti_master_0&apos; start=&apos;0x0&apos; end=&apos;0x100000000&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;/address-map&amp;gt;&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;MAX_SLAVE_DATA_WIDTH&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;address_decoder_top_master&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_master&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_master&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_master&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_master&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_master&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_master&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter
     name="logicalView"
     value="ip/address_decoder_top/address_decoder_top_master.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap/&gt;
&lt;/assignmentDefinition&gt;" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="address_decoder_top" as="master" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_master"</message>
  </messages>
 </entity>
 <entity
   kind="altera_generic_component"
   version="1.0"
   name="address_decoder_top_mm_clock_crossing_bridge">
  <parameter name="hlsFile" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="SYSINFO_ADDR_WIDTH" value="17" />
  <parameter name="AUTO_DEVICE" value="1SG165HU2F50E2VG" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Stratix 10" />
  <parameter name="defaultBoundary" value="" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;m0&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_readdatavalid&lt;/name&gt;
                        &lt;role&gt;readdatavalid&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_burstcount&lt;/name&gt;
                        &lt;role&gt;burstcount&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;17&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_byteenable&lt;/name&gt;
                        &lt;role&gt;byteenable&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;4&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_debugaccess&lt;/name&gt;
                        &lt;role&gt;debugaccess&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;adaptsTo&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;m0_clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;m0_reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dBSBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamReads&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamWrites&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isAsynchronous&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isReadable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isWriteable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maxAddressWidth&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;m0_clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;m0_reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_reset&lt;/name&gt;
                        &lt;role&gt;reset&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;m0_clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;DEASSERT&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;s0&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_readdatavalid&lt;/name&gt;
                        &lt;role&gt;readdatavalid&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_burstcount&lt;/name&gt;
                        &lt;role&gt;burstcount&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;17&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_byteenable&lt;/name&gt;
                        &lt;role&gt;byteenable&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;4&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_debugaccess&lt;/name&gt;
                        &lt;role&gt;debugaccess&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressAlignment&lt;/key&gt;
                            &lt;value&gt;DYNAMIC&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressSpan&lt;/key&gt;
                            &lt;value&gt;131072&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;s0_clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;s0_reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToMaster&lt;/key&gt;
                            &lt;value&gt;mm_clock_crossing_bridge.m0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isFlash&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;printableDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;transparentBridge&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;s0_clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;s0_reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_reset&lt;/name&gt;
                        &lt;role&gt;reset&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;s0_clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;DEASSERT&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;altera_avalon_mm_clock_crossing_bridge&lt;/className&gt;
        &lt;version&gt;17.1&lt;/version&gt;
        &lt;displayName&gt;Avalon-MM Clock Crossing Bridge&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;10&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;SYSINFO_ADDR_WIDTH&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;m0&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_WIDTH&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;m0&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;m0&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                            &lt;value&gt;17&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;s0&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;s0&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_MAP&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;MAX_SLAVE_DATA_WIDTH&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;address_decoder_top_mm_clock_crossing_bridge&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_mm_clock_crossing_bridge&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_mm_clock_crossing_bridge&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_mm_clock_crossing_bridge&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_mm_clock_crossing_bridge&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_mm_clock_crossing_bridge&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_mm_clock_crossing_bridge&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter
     name="logicalView"
     value="ip/address_decoder_top/address_decoder_top_mm_clock_crossing_bridge.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap/&gt;
&lt;/assignmentDefinition&gt;" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="address_decoder_top" as="mm_clock_crossing_bridge" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_mm_clock_crossing_bridge"</message>
  </messages>
 </entity>
 <entity
   kind="altera_generic_component"
   version="1.0"
   name="address_decoder_top_multi_channel">
  <parameter name="hlsFile" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="CLOCK_RATE" value="125000000" />
  <parameter name="AUTO_DEVICE" value="1SG165HU2F50E2VG" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Stratix 10" />
  <parameter name="defaultBoundary" value="" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;avalon_anti_slave_0&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;20&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;adaptsTo&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dBSBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamReads&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamWrites&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isAsynchronous&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isReadable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isWriteable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maxAddressWidth&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;avalon_universal_slave_0&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;20&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_burstcount&lt;/name&gt;
                        &lt;role&gt;burstcount&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;3&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_readdatavalid&lt;/name&gt;
                        &lt;role&gt;readdatavalid&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_byteenable&lt;/name&gt;
                        &lt;role&gt;byteenable&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;4&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_lock&lt;/name&gt;
                        &lt;role&gt;lock&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_debugaccess&lt;/name&gt;
                        &lt;role&gt;debugaccess&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;merlin.flow.avalon_anti_slave_0&lt;/key&gt;
                            &lt;value&gt;avalon_anti_slave_0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressAlignment&lt;/key&gt;
                            &lt;value&gt;DYNAMIC&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressSpan&lt;/key&gt;
                            &lt;value&gt;1048576&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToMaster&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                            &lt;value&gt;1048576&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isFlash&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;printableDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;transparentBridge&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset&lt;/name&gt;
                        &lt;role&gt;reset&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;DEASSERT&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;altera_merlin_slave_translator&lt;/className&gt;
        &lt;version&gt;17.1&lt;/version&gt;
        &lt;displayName&gt;Avalon MM Slave Translator&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;CLOCK_RATE&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Long&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;clk&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CLOCK_RATE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;avalon_universal_slave_0&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;avalon_universal_slave_0&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_MAP&lt;/key&gt;
                            &lt;value&gt;&amp;lt;address-map&amp;gt;&amp;lt;slave name=&apos;avalon_universal_slave_0&apos; start=&apos;0x0&apos; end=&apos;0x100000&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;/address-map&amp;gt;&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                            &lt;value&gt;20&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;MAX_SLAVE_DATA_WIDTH&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;clk&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;clk&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_RATE&lt;/key&gt;
                            &lt;value&gt;125000000&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;address_decoder_top_multi_channel&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_multi_channel&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_multi_channel&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_multi_channel&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_multi_channel&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_multi_channel&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_multi_channel&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter
     name="logicalView"
     value="ip/address_decoder_top/address_decoder_top_multi_channel.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap/&gt;
&lt;/assignmentDefinition&gt;" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="address_decoder_top" as="multi_channel" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_multi_channel"</message>
  </messages>
 </entity>
 <entity
   kind="altera_generic_component"
   version="1.0"
   name="address_decoder_top_traffic_controller_ch_0_1">
  <parameter name="hlsFile" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="CLOCK_RATE" value="156250000" />
  <parameter name="AUTO_DEVICE" value="1SG165HU2F50E2VG" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Stratix 10" />
  <parameter name="defaultBoundary" value="" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;avalon_anti_slave_0&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;14&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;adaptsTo&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dBSBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamReads&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamWrites&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isAsynchronous&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isReadable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isWriteable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maxAddressWidth&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;avalon_universal_slave_0&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;14&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_burstcount&lt;/name&gt;
                        &lt;role&gt;burstcount&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;3&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_readdatavalid&lt;/name&gt;
                        &lt;role&gt;readdatavalid&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_byteenable&lt;/name&gt;
                        &lt;role&gt;byteenable&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;4&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_lock&lt;/name&gt;
                        &lt;role&gt;lock&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_debugaccess&lt;/name&gt;
                        &lt;role&gt;debugaccess&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;merlin.flow.avalon_anti_slave_0&lt;/key&gt;
                            &lt;value&gt;avalon_anti_slave_0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressAlignment&lt;/key&gt;
                            &lt;value&gt;DYNAMIC&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressSpan&lt;/key&gt;
                            &lt;value&gt;16384&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToMaster&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                            &lt;value&gt;16384&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isFlash&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;printableDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;transparentBridge&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset&lt;/name&gt;
                        &lt;role&gt;reset&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;DEASSERT&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;altera_merlin_slave_translator&lt;/className&gt;
        &lt;version&gt;17.1&lt;/version&gt;
        &lt;displayName&gt;Avalon MM Slave Translator&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;CLOCK_RATE&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Long&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;clk&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CLOCK_RATE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;avalon_universal_slave_0&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;avalon_universal_slave_0&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_MAP&lt;/key&gt;
                            &lt;value&gt;&amp;lt;address-map&amp;gt;&amp;lt;slave name=&apos;avalon_universal_slave_0&apos; start=&apos;0x0&apos; end=&apos;0x4000&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;/address-map&amp;gt;&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                            &lt;value&gt;14&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;MAX_SLAVE_DATA_WIDTH&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;clk&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;clk&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_RATE&lt;/key&gt;
                            &lt;value&gt;156250000&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;address_decoder_top_traffic_controller_ch_0_1&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_traffic_controller_ch_0_1&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_traffic_controller_ch_0_1&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_traffic_controller_ch_0_1&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_traffic_controller_ch_0_1&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_traffic_controller_ch_0_1&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_traffic_controller_ch_0_1&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter
     name="logicalView"
     value="ip/address_decoder_top/address_decoder_top_traffic_controller_ch_0_1.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap/&gt;
&lt;/assignmentDefinition&gt;" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="address_decoder_top" as="traffic_controller_ch_0_1" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_traffic_controller_ch_0_1"</message>
  </messages>
 </entity>
 <entity
   kind="altera_generic_component"
   version="1.0"
   name="address_decoder_top_traffic_controller_ch_10_11">
  <parameter name="hlsFile" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="CLOCK_RATE" value="156250000" />
  <parameter name="AUTO_DEVICE" value="1SG165HU2F50E2VG" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Stratix 10" />
  <parameter name="defaultBoundary" value="" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;avalon_anti_slave_0&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;14&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;adaptsTo&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dBSBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamReads&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamWrites&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isAsynchronous&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isReadable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isWriteable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maxAddressWidth&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;avalon_universal_slave_0&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;14&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_burstcount&lt;/name&gt;
                        &lt;role&gt;burstcount&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;3&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_readdatavalid&lt;/name&gt;
                        &lt;role&gt;readdatavalid&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_byteenable&lt;/name&gt;
                        &lt;role&gt;byteenable&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;4&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_lock&lt;/name&gt;
                        &lt;role&gt;lock&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_debugaccess&lt;/name&gt;
                        &lt;role&gt;debugaccess&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;merlin.flow.avalon_anti_slave_0&lt;/key&gt;
                            &lt;value&gt;avalon_anti_slave_0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressAlignment&lt;/key&gt;
                            &lt;value&gt;DYNAMIC&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressSpan&lt;/key&gt;
                            &lt;value&gt;16384&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToMaster&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                            &lt;value&gt;16384&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isFlash&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;printableDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;transparentBridge&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset&lt;/name&gt;
                        &lt;role&gt;reset&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;DEASSERT&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;altera_merlin_slave_translator&lt;/className&gt;
        &lt;version&gt;17.1&lt;/version&gt;
        &lt;displayName&gt;Avalon MM Slave Translator&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;CLOCK_RATE&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Long&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;clk&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CLOCK_RATE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;avalon_universal_slave_0&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;avalon_universal_slave_0&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_MAP&lt;/key&gt;
                            &lt;value&gt;&amp;lt;address-map&amp;gt;&amp;lt;slave name=&apos;avalon_universal_slave_0&apos; start=&apos;0x0&apos; end=&apos;0x4000&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;/address-map&amp;gt;&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                            &lt;value&gt;14&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;MAX_SLAVE_DATA_WIDTH&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;clk&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;clk&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_RATE&lt;/key&gt;
                            &lt;value&gt;156250000&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;address_decoder_top_traffic_controller_ch_10_11&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_traffic_controller_ch_10_11&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_traffic_controller_ch_10_11&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_traffic_controller_ch_10_11&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_traffic_controller_ch_10_11&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_traffic_controller_ch_10_11&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_traffic_controller_ch_10_11&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter
     name="logicalView"
     value="ip/address_decoder_top/address_decoder_top_traffic_controller_ch_10_11.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap/&gt;
&lt;/assignmentDefinition&gt;" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="address_decoder_top" as="traffic_controller_ch_10_11" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_traffic_controller_ch_10_11"</message>
  </messages>
 </entity>
 <entity
   kind="altera_generic_component"
   version="1.0"
   name="address_decoder_top_traffic_controller_ch_2_3">
  <parameter name="hlsFile" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="CLOCK_RATE" value="156250000" />
  <parameter name="AUTO_DEVICE" value="1SG165HU2F50E2VG" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Stratix 10" />
  <parameter name="defaultBoundary" value="" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;avalon_anti_slave_0&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;14&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;adaptsTo&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dBSBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamReads&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamWrites&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isAsynchronous&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isReadable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isWriteable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maxAddressWidth&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;avalon_universal_slave_0&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;14&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_burstcount&lt;/name&gt;
                        &lt;role&gt;burstcount&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;3&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_readdatavalid&lt;/name&gt;
                        &lt;role&gt;readdatavalid&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_byteenable&lt;/name&gt;
                        &lt;role&gt;byteenable&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;4&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_lock&lt;/name&gt;
                        &lt;role&gt;lock&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_debugaccess&lt;/name&gt;
                        &lt;role&gt;debugaccess&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;merlin.flow.avalon_anti_slave_0&lt;/key&gt;
                            &lt;value&gt;avalon_anti_slave_0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressAlignment&lt;/key&gt;
                            &lt;value&gt;DYNAMIC&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressSpan&lt;/key&gt;
                            &lt;value&gt;16384&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToMaster&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                            &lt;value&gt;16384&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isFlash&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;printableDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;transparentBridge&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset&lt;/name&gt;
                        &lt;role&gt;reset&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;DEASSERT&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;altera_merlin_slave_translator&lt;/className&gt;
        &lt;version&gt;17.1&lt;/version&gt;
        &lt;displayName&gt;Avalon MM Slave Translator&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;CLOCK_RATE&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Long&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;clk&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CLOCK_RATE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;avalon_universal_slave_0&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;avalon_universal_slave_0&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_MAP&lt;/key&gt;
                            &lt;value&gt;&amp;lt;address-map&amp;gt;&amp;lt;slave name=&apos;avalon_universal_slave_0&apos; start=&apos;0x0&apos; end=&apos;0x4000&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;/address-map&amp;gt;&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                            &lt;value&gt;14&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;MAX_SLAVE_DATA_WIDTH&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;clk&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;clk&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_RATE&lt;/key&gt;
                            &lt;value&gt;156250000&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;address_decoder_top_traffic_controller_ch_2_3&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_traffic_controller_ch_2_3&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_traffic_controller_ch_2_3&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_traffic_controller_ch_2_3&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_traffic_controller_ch_2_3&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_traffic_controller_ch_2_3&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_traffic_controller_ch_2_3&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter
     name="logicalView"
     value="ip/address_decoder_top/address_decoder_top_traffic_controller_ch_2_3.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap/&gt;
&lt;/assignmentDefinition&gt;" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="address_decoder_top" as="traffic_controller_ch_2_3" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_traffic_controller_ch_2_3"</message>
  </messages>
 </entity>
 <entity
   kind="altera_generic_component"
   version="1.0"
   name="address_decoder_top_traffic_controller_ch_4_5">
  <parameter name="hlsFile" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="CLOCK_RATE" value="156250000" />
  <parameter name="AUTO_DEVICE" value="1SG165HU2F50E2VG" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Stratix 10" />
  <parameter name="defaultBoundary" value="" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;avalon_anti_slave_0&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;14&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;adaptsTo&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dBSBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamReads&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamWrites&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isAsynchronous&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isReadable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isWriteable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maxAddressWidth&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;avalon_universal_slave_0&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;14&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_burstcount&lt;/name&gt;
                        &lt;role&gt;burstcount&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;3&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_readdatavalid&lt;/name&gt;
                        &lt;role&gt;readdatavalid&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_byteenable&lt;/name&gt;
                        &lt;role&gt;byteenable&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;4&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_lock&lt;/name&gt;
                        &lt;role&gt;lock&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_debugaccess&lt;/name&gt;
                        &lt;role&gt;debugaccess&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;merlin.flow.avalon_anti_slave_0&lt;/key&gt;
                            &lt;value&gt;avalon_anti_slave_0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressAlignment&lt;/key&gt;
                            &lt;value&gt;DYNAMIC&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressSpan&lt;/key&gt;
                            &lt;value&gt;16384&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToMaster&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                            &lt;value&gt;16384&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isFlash&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;printableDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;transparentBridge&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset&lt;/name&gt;
                        &lt;role&gt;reset&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;DEASSERT&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;altera_merlin_slave_translator&lt;/className&gt;
        &lt;version&gt;17.1&lt;/version&gt;
        &lt;displayName&gt;Avalon MM Slave Translator&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;CLOCK_RATE&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Long&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;clk&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CLOCK_RATE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;avalon_universal_slave_0&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;avalon_universal_slave_0&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_MAP&lt;/key&gt;
                            &lt;value&gt;&amp;lt;address-map&amp;gt;&amp;lt;slave name=&apos;avalon_universal_slave_0&apos; start=&apos;0x0&apos; end=&apos;0x4000&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;/address-map&amp;gt;&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                            &lt;value&gt;14&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;MAX_SLAVE_DATA_WIDTH&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;clk&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;clk&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_RATE&lt;/key&gt;
                            &lt;value&gt;156250000&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;address_decoder_top_traffic_controller_ch_4_5&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_traffic_controller_ch_4_5&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_traffic_controller_ch_4_5&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_traffic_controller_ch_4_5&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_traffic_controller_ch_4_5&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_traffic_controller_ch_4_5&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_traffic_controller_ch_4_5&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter
     name="logicalView"
     value="ip/address_decoder_top/address_decoder_top_traffic_controller_ch_4_5.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap/&gt;
&lt;/assignmentDefinition&gt;" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="address_decoder_top" as="traffic_controller_ch_4_5" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_traffic_controller_ch_4_5"</message>
  </messages>
 </entity>
 <entity
   kind="altera_generic_component"
   version="1.0"
   name="address_decoder_top_traffic_controller_ch_6_7">
  <parameter name="hlsFile" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="CLOCK_RATE" value="156250000" />
  <parameter name="AUTO_DEVICE" value="1SG165HU2F50E2VG" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Stratix 10" />
  <parameter name="defaultBoundary" value="" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;avalon_anti_slave_0&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;14&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;adaptsTo&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dBSBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamReads&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamWrites&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isAsynchronous&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isReadable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isWriteable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maxAddressWidth&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;avalon_universal_slave_0&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;14&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_burstcount&lt;/name&gt;
                        &lt;role&gt;burstcount&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;3&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_readdatavalid&lt;/name&gt;
                        &lt;role&gt;readdatavalid&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_byteenable&lt;/name&gt;
                        &lt;role&gt;byteenable&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;4&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_lock&lt;/name&gt;
                        &lt;role&gt;lock&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_debugaccess&lt;/name&gt;
                        &lt;role&gt;debugaccess&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;merlin.flow.avalon_anti_slave_0&lt;/key&gt;
                            &lt;value&gt;avalon_anti_slave_0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressAlignment&lt;/key&gt;
                            &lt;value&gt;DYNAMIC&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressSpan&lt;/key&gt;
                            &lt;value&gt;16384&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToMaster&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                            &lt;value&gt;16384&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isFlash&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;printableDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;transparentBridge&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset&lt;/name&gt;
                        &lt;role&gt;reset&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;DEASSERT&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;altera_merlin_slave_translator&lt;/className&gt;
        &lt;version&gt;17.1&lt;/version&gt;
        &lt;displayName&gt;Avalon MM Slave Translator&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;CLOCK_RATE&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Long&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;clk&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CLOCK_RATE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;avalon_universal_slave_0&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;avalon_universal_slave_0&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_MAP&lt;/key&gt;
                            &lt;value&gt;&amp;lt;address-map&amp;gt;&amp;lt;slave name=&apos;avalon_universal_slave_0&apos; start=&apos;0x0&apos; end=&apos;0x4000&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;/address-map&amp;gt;&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                            &lt;value&gt;14&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;MAX_SLAVE_DATA_WIDTH&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;clk&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;clk&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_RATE&lt;/key&gt;
                            &lt;value&gt;156250000&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;address_decoder_top_traffic_controller_ch_6_7&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_traffic_controller_ch_6_7&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_traffic_controller_ch_6_7&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_traffic_controller_ch_6_7&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_traffic_controller_ch_6_7&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_traffic_controller_ch_6_7&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_traffic_controller_ch_6_7&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter
     name="logicalView"
     value="ip/address_decoder_top/address_decoder_top_traffic_controller_ch_6_7.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap/&gt;
&lt;/assignmentDefinition&gt;" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="address_decoder_top" as="traffic_controller_ch_6_7" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_traffic_controller_ch_6_7"</message>
  </messages>
 </entity>
 <entity
   kind="altera_generic_component"
   version="1.0"
   name="address_decoder_top_traffic_controller_ch_8_9">
  <parameter name="hlsFile" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="CLOCK_RATE" value="156250000" />
  <parameter name="AUTO_DEVICE" value="1SG165HU2F50E2VG" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Stratix 10" />
  <parameter name="defaultBoundary" value="" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;avalon_anti_slave_0&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;14&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;adaptsTo&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dBSBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamReads&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamWrites&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isAsynchronous&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isReadable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isWriteable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maxAddressWidth&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;avalon_universal_slave_0&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;14&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_burstcount&lt;/name&gt;
                        &lt;role&gt;burstcount&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;3&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_readdatavalid&lt;/name&gt;
                        &lt;role&gt;readdatavalid&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_byteenable&lt;/name&gt;
                        &lt;role&gt;byteenable&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;4&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_lock&lt;/name&gt;
                        &lt;role&gt;lock&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;uav_debugaccess&lt;/name&gt;
                        &lt;role&gt;debugaccess&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;merlin.flow.avalon_anti_slave_0&lt;/key&gt;
                            &lt;value&gt;avalon_anti_slave_0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressAlignment&lt;/key&gt;
                            &lt;value&gt;DYNAMIC&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressSpan&lt;/key&gt;
                            &lt;value&gt;16384&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToMaster&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                            &lt;value&gt;16384&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isFlash&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;printableDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;transparentBridge&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset&lt;/name&gt;
                        &lt;role&gt;reset&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;DEASSERT&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;altera_merlin_slave_translator&lt;/className&gt;
        &lt;version&gt;17.1&lt;/version&gt;
        &lt;displayName&gt;Avalon MM Slave Translator&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;CLOCK_RATE&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Long&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;clk&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CLOCK_RATE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;avalon_universal_slave_0&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;avalon_universal_slave_0&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_MAP&lt;/key&gt;
                            &lt;value&gt;&amp;lt;address-map&amp;gt;&amp;lt;slave name=&apos;avalon_universal_slave_0&apos; start=&apos;0x0&apos; end=&apos;0x4000&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;/address-map&amp;gt;&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                            &lt;value&gt;14&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;MAX_SLAVE_DATA_WIDTH&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;clk&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;clk&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_RATE&lt;/key&gt;
                            &lt;value&gt;156250000&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;address_decoder_top_traffic_controller_ch_8_9&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_traffic_controller_ch_8_9&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_traffic_controller_ch_8_9&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_traffic_controller_ch_8_9&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_traffic_controller_ch_8_9&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;address_decoder_top_traffic_controller_ch_8_9&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;address_decoder_top_traffic_controller_ch_8_9&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter
     name="logicalView"
     value="ip/address_decoder_top/address_decoder_top_traffic_controller_ch_8_9.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap/&gt;
&lt;/assignmentDefinition&gt;" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="address_decoder_top" as="traffic_controller_ch_8_9" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_traffic_controller_ch_8_9"</message>
  </messages>
 </entity>
 <entity
   kind="altera_mm_interconnect"
   version="19.1"
   name="address_decoder_top_altera_mm_interconnect_191_3kbf4ri">
  <parameter name="AUTO_DEVICE" value="1SG165HU2F50E2VG" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Stratix 10" />
  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="" />
  <parameter
     name="COMPOSE_CONTENTS"
     value="add_instance {master_avalon_universal_master_0_translator} {altera_merlin_master_translator};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_ADDRESS_W} {32};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_DATA_W} {32};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {master_avalon_universal_master_0_translator} {UAV_ADDRESS_W} {32};set_instance_parameter_value {master_avalon_universal_master_0_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_READLATENCY} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_READ_WAIT} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {USE_READDATA} {1};set_instance_parameter_value {master_avalon_universal_master_0_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {master_avalon_universal_master_0_translator} {USE_READ} {1};set_instance_parameter_value {master_avalon_universal_master_0_translator} {USE_WRITE} {1};set_instance_parameter_value {master_avalon_universal_master_0_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {master_avalon_universal_master_0_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {USE_ADDRESS} {1};set_instance_parameter_value {master_avalon_universal_master_0_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {master_avalon_universal_master_0_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {master_avalon_universal_master_0_translator} {USE_CLKEN} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {master_avalon_universal_master_0_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {master_avalon_universal_master_0_translator} {USE_LOCK} {1};set_instance_parameter_value {master_avalon_universal_master_0_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_BURSTCOUNT_SYMBOLS} {1};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {SYNC_RESET} {0};set_instance_parameter_value {master_avalon_universal_master_0_translator} {WAITREQUEST_ALLOWANCE} {0};add_instance {multi_channel_avalon_universal_slave_0_translator} {altera_merlin_slave_translator};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_ADDRESS_W} {20};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_DATA_W} {32};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {UAV_DATA_W} {32};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {UAV_ADDRESS_W} {32};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_READLATENCY} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_READ_WAIT} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {USE_READDATA} {1};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {USE_READ} {1};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {USE_WRITE} {1};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {USE_ADDRESS} {1};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {USE_LOCK} {1};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_BURSTCOUNT_SYMBOLS} {1};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {WAITREQUEST_ALLOWANCE} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_translator} {SYNC_RESET} {0};add_instance {mm_clock_crossing_bridge_s0_translator} {altera_merlin_slave_translator};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_ADDRESS_W} {17};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_DATA_W} {32};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {UAV_DATA_W} {32};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {UAV_ADDRESS_W} {32};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_READLATENCY} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_READ_WAIT} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {USE_READDATA} {1};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {USE_READ} {1};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {USE_WRITE} {1};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {USE_ADDRESS} {1};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {USE_LOCK} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {8};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {WAITREQUEST_ALLOWANCE} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_translator} {SYNC_RESET} {0};add_instance {master_avalon_universal_master_0_agent} {altera_merlin_master_agent};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_WUNIQUE} {110};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_DOMAIN_H} {109};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_DOMAIN_L} {108};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_SNOOP_H} {107};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_SNOOP_L} {104};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_BARRIER_H} {103};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_BARRIER_L} {102};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_ORI_BURST_SIZE_H} {101};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_ORI_BURST_SIZE_L} {99};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_RESPONSE_STATUS_H} {98};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_RESPONSE_STATUS_L} {97};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_QOS_H} {86};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_QOS_L} {86};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_DATA_SIDEBAND_H} {84};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_DATA_SIDEBAND_L} {84};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_ADDR_SIDEBAND_H} {83};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_ADDR_SIDEBAND_L} {83};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_BURST_TYPE_H} {82};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_BURST_TYPE_L} {81};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_CACHE_H} {96};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_CACHE_L} {93};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_THREAD_ID_H} {89};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_THREAD_ID_L} {89};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_BURST_SIZE_H} {80};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_BURST_SIZE_L} {78};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_TRANS_EXCLUSIVE} {73};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_TRANS_LOCK} {72};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_BEGIN_BURST} {85};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_PROTECTION_H} {92};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_PROTECTION_L} {90};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_BURSTWRAP_H} {77};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_BURSTWRAP_L} {77};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_BYTE_CNT_H} {76};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_BYTE_CNT_L} {74};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_ADDR_H} {67};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_TRANS_COMPRESSED_READ} {68};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_TRANS_POSTED} {69};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_TRANS_WRITE} {70};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_TRANS_READ} {71};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_DATA_H} {31};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_DATA_L} {0};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_SRC_ID_H} {87};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_SRC_ID_L} {87};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_DEST_ID_H} {88};set_instance_parameter_value {master_avalon_universal_master_0_agent} {PKT_DEST_ID_L} {88};set_instance_parameter_value {master_avalon_universal_master_0_agent} {ST_DATA_W} {111};set_instance_parameter_value {master_avalon_universal_master_0_agent} {ST_CHANNEL_W} {2};set_instance_parameter_value {master_avalon_universal_master_0_agent} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {master_avalon_universal_master_0_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {master_avalon_universal_master_0_agent} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {master_avalon_universal_master_0_agent} {MERLIN_PACKET_FORMAT} {wunique(110) domain(109:108) snoop(107:104) barrier(103:102) ori_burst_size(101:99) response_status(98:97) cache(96:93) protection(92:90) thread_id(89) dest_id(88) src_id(87) qos(86) begin_burst(85) data_sideband(84) addr_sideband(83) burst_type(82:81) burst_size(80:78) burstwrap(77) byte_cnt(76:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {master_avalon_universal_master_0_agent} {ADDR_MAP} {&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?&gt;
&lt;address_map&gt;
 &lt;slave
   id=&quot;1&quot;
   name=&quot;multi_channel_avalon_universal_slave_0_translator.avalon_universal_slave_0&quot;
   start=&quot;0x0000000000000000&quot;
   end=&quot;0x00000000000100000&quot;
   responds=&quot;1&quot;
   user_default=&quot;0&quot; /&gt;
 &lt;slave
   id=&quot;0&quot;
   name=&quot;mm_clock_crossing_bridge_s0_translator.avalon_universal_slave_0&quot;
   start=&quot;0x0000000000100000&quot;
   end=&quot;0x00000000000120000&quot;
   responds=&quot;1&quot;
   user_default=&quot;0&quot; /&gt;
&lt;/address_map&gt;
};set_instance_parameter_value {master_avalon_universal_master_0_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {master_avalon_universal_master_0_agent} {ID} {0};set_instance_parameter_value {master_avalon_universal_master_0_agent} {BURSTWRAP_VALUE} {1};set_instance_parameter_value {master_avalon_universal_master_0_agent} {CACHE_VALUE} {0};set_instance_parameter_value {master_avalon_universal_master_0_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {master_avalon_universal_master_0_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {master_avalon_universal_master_0_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {master_avalon_universal_master_0_agent} {DOMAIN_VALUE} {3};set_instance_parameter_value {master_avalon_universal_master_0_agent} {BARRIER_VALUE} {0};set_instance_parameter_value {master_avalon_universal_master_0_agent} {SNOOP_VALUE} {0};set_instance_parameter_value {master_avalon_universal_master_0_agent} {WUNIQUE_VALUE} {0};set_instance_parameter_value {master_avalon_universal_master_0_agent} {SYNC_RESET} {0};add_instance {multi_channel_avalon_universal_slave_0_agent} {altera_merlin_slave_agent};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_ORI_BURST_SIZE_H} {101};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_ORI_BURST_SIZE_L} {99};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_RESPONSE_STATUS_H} {98};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_RESPONSE_STATUS_L} {97};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_BURST_SIZE_H} {80};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_BURST_SIZE_L} {78};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_TRANS_LOCK} {72};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_BEGIN_BURST} {85};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_PROTECTION_H} {92};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_PROTECTION_L} {90};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_BURSTWRAP_H} {77};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_BURSTWRAP_L} {77};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_BYTE_CNT_H} {76};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_BYTE_CNT_L} {74};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_ADDR_H} {67};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_TRANS_COMPRESSED_READ} {68};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_TRANS_POSTED} {69};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_TRANS_WRITE} {70};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_TRANS_READ} {71};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_DATA_H} {31};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_DATA_L} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_SRC_ID_H} {87};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_SRC_ID_L} {87};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_DEST_ID_H} {88};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_DEST_ID_L} {88};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {ST_CHANNEL_W} {2};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {ST_DATA_W} {111};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {MERLIN_PACKET_FORMAT} {wunique(110) domain(109:108) snoop(107:104) barrier(103:102) ori_burst_size(101:99) response_status(98:97) cache(96:93) protection(92:90) thread_id(89) dest_id(88) src_id(87) qos(86) begin_burst(85) data_sideband(84) addr_sideband(83) burst_type(82:81) burst_size(80:78) burstwrap(77) byte_cnt(76:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {MAX_BURSTWRAP} {1};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {ID} {1};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {ECC_ENABLE} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent} {SYNC_RESET} {0};add_instance {multi_channel_avalon_universal_slave_0_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent_rsp_fifo} {BITS_PER_SYMBOL} {112};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};set_instance_parameter_value {multi_channel_avalon_universal_slave_0_agent_rsp_fifo} {SYNC_RESET} {0};add_instance {mm_clock_crossing_bridge_s0_agent} {altera_merlin_slave_agent};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_ORI_BURST_SIZE_H} {101};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_ORI_BURST_SIZE_L} {99};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_RESPONSE_STATUS_H} {98};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_RESPONSE_STATUS_L} {97};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_BURST_SIZE_H} {80};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_BURST_SIZE_L} {78};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_TRANS_LOCK} {72};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_BEGIN_BURST} {85};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_PROTECTION_H} {92};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_PROTECTION_L} {90};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_BURSTWRAP_H} {77};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_BURSTWRAP_L} {77};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_BYTE_CNT_H} {76};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_BYTE_CNT_L} {74};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_ADDR_H} {67};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_TRANS_COMPRESSED_READ} {68};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_TRANS_POSTED} {69};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_TRANS_WRITE} {70};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_TRANS_READ} {71};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_DATA_H} {31};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_DATA_L} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_SRC_ID_H} {87};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_SRC_ID_L} {87};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_DEST_ID_H} {88};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_DEST_ID_L} {88};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {ST_CHANNEL_W} {2};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {ST_DATA_W} {111};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {MERLIN_PACKET_FORMAT} {wunique(110) domain(109:108) snoop(107:104) barrier(103:102) ori_burst_size(101:99) response_status(98:97) cache(96:93) protection(92:90) thread_id(89) dest_id(88) src_id(87) qos(86) begin_burst(85) data_sideband(84) addr_sideband(83) burst_type(82:81) burst_size(80:78) burstwrap(77) byte_cnt(76:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {MAX_BURSTWRAP} {1};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {ID} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {ECC_ENABLE} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent} {SYNC_RESET} {0};add_instance {mm_clock_crossing_bridge_s0_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent_rsp_fifo} {BITS_PER_SYMBOL} {112};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent_rsp_fifo} {FIFO_DEPTH} {9};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};set_instance_parameter_value {mm_clock_crossing_bridge_s0_agent_rsp_fifo} {SYNC_RESET} {0};add_instance {router} {altera_merlin_router};set_instance_parameter_value {router} {DESTINATION_ID} {1 0 };set_instance_parameter_value {router} {CHANNEL_ID} {01 10 };set_instance_parameter_value {router} {TYPE_OF_TRANSACTION} {both both };set_instance_parameter_value {router} {START_ADDRESS} {0x0 0x100000 };set_instance_parameter_value {router} {END_ADDRESS} {0x100000 0x120000 };set_instance_parameter_value {router} {NON_SECURED_TAG} {1 1 };set_instance_parameter_value {router} {SECURED_RANGE_PAIRS} {0 0 };set_instance_parameter_value {router} {SECURED_RANGE_LIST} {0 0 };set_instance_parameter_value {router} {SPAN_OFFSET} {};set_instance_parameter_value {router} {PKT_ADDR_H} {67};set_instance_parameter_value {router} {PKT_ADDR_L} {36};set_instance_parameter_value {router} {PKT_PROTECTION_H} {92};set_instance_parameter_value {router} {PKT_PROTECTION_L} {90};set_instance_parameter_value {router} {PKT_DEST_ID_H} {88};set_instance_parameter_value {router} {PKT_DEST_ID_L} {88};set_instance_parameter_value {router} {PKT_TRANS_WRITE} {70};set_instance_parameter_value {router} {PKT_TRANS_READ} {71};set_instance_parameter_value {router} {ST_DATA_W} {111};set_instance_parameter_value {router} {ST_CHANNEL_W} {2};set_instance_parameter_value {router} {DECODER_TYPE} {0};set_instance_parameter_value {router} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_DESTID} {1};set_instance_parameter_value {router} {MERLIN_PACKET_FORMAT} {wunique(110) domain(109:108) snoop(107:104) barrier(103:102) ori_burst_size(101:99) response_status(98:97) cache(96:93) protection(92:90) thread_id(89) dest_id(88) src_id(87) qos(86) begin_burst(85) data_sideband(84) addr_sideband(83) burst_type(82:81) burst_size(80:78) burstwrap(77) byte_cnt(76:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router} {SYNC_RESET} {0};add_instance {router_001} {altera_merlin_router};set_instance_parameter_value {router_001} {DESTINATION_ID} {0 };set_instance_parameter_value {router_001} {CHANNEL_ID} {1 };set_instance_parameter_value {router_001} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_001} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_001} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_001} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_001} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_001} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_001} {SPAN_OFFSET} {};set_instance_parameter_value {router_001} {PKT_ADDR_H} {67};set_instance_parameter_value {router_001} {PKT_ADDR_L} {36};set_instance_parameter_value {router_001} {PKT_PROTECTION_H} {92};set_instance_parameter_value {router_001} {PKT_PROTECTION_L} {90};set_instance_parameter_value {router_001} {PKT_DEST_ID_H} {88};set_instance_parameter_value {router_001} {PKT_DEST_ID_L} {88};set_instance_parameter_value {router_001} {PKT_TRANS_WRITE} {70};set_instance_parameter_value {router_001} {PKT_TRANS_READ} {71};set_instance_parameter_value {router_001} {ST_DATA_W} {111};set_instance_parameter_value {router_001} {ST_CHANNEL_W} {2};set_instance_parameter_value {router_001} {DECODER_TYPE} {1};set_instance_parameter_value {router_001} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_001} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_001} {MERLIN_PACKET_FORMAT} {wunique(110) domain(109:108) snoop(107:104) barrier(103:102) ori_burst_size(101:99) response_status(98:97) cache(96:93) protection(92:90) thread_id(89) dest_id(88) src_id(87) qos(86) begin_burst(85) data_sideband(84) addr_sideband(83) burst_type(82:81) burst_size(80:78) burstwrap(77) byte_cnt(76:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_001} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router_001} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router_001} {SYNC_RESET} {0};add_instance {router_002} {altera_merlin_router};set_instance_parameter_value {router_002} {DESTINATION_ID} {0 };set_instance_parameter_value {router_002} {CHANNEL_ID} {1 };set_instance_parameter_value {router_002} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_002} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_002} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_002} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_002} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_002} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_002} {SPAN_OFFSET} {};set_instance_parameter_value {router_002} {PKT_ADDR_H} {67};set_instance_parameter_value {router_002} {PKT_ADDR_L} {36};set_instance_parameter_value {router_002} {PKT_PROTECTION_H} {92};set_instance_parameter_value {router_002} {PKT_PROTECTION_L} {90};set_instance_parameter_value {router_002} {PKT_DEST_ID_H} {88};set_instance_parameter_value {router_002} {PKT_DEST_ID_L} {88};set_instance_parameter_value {router_002} {PKT_TRANS_WRITE} {70};set_instance_parameter_value {router_002} {PKT_TRANS_READ} {71};set_instance_parameter_value {router_002} {ST_DATA_W} {111};set_instance_parameter_value {router_002} {ST_CHANNEL_W} {2};set_instance_parameter_value {router_002} {DECODER_TYPE} {1};set_instance_parameter_value {router_002} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_002} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_002} {MERLIN_PACKET_FORMAT} {wunique(110) domain(109:108) snoop(107:104) barrier(103:102) ori_burst_size(101:99) response_status(98:97) cache(96:93) protection(92:90) thread_id(89) dest_id(88) src_id(87) qos(86) begin_burst(85) data_sideband(84) addr_sideband(83) burst_type(82:81) burst_size(80:78) burstwrap(77) byte_cnt(76:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_002} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router_002} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router_002} {SYNC_RESET} {0};add_instance {cmd_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {cmd_demux} {ST_DATA_W} {111};set_instance_parameter_value {cmd_demux} {ST_CHANNEL_W} {2};set_instance_parameter_value {cmd_demux} {NUM_OUTPUTS} {2};set_instance_parameter_value {cmd_demux} {VALID_WIDTH} {1};set_instance_parameter_value {cmd_demux} {MERLIN_PACKET_FORMAT} {wunique(110) domain(109:108) snoop(107:104) barrier(103:102) ori_burst_size(101:99) response_status(98:97) cache(96:93) protection(92:90) thread_id(89) dest_id(88) src_id(87) qos(86) begin_burst(85) data_sideband(84) addr_sideband(83) burst_type(82:81) burst_size(80:78) burstwrap(77) byte_cnt(76:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_demux} {SYNC_RESET} {0};add_instance {cmd_mux} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux} {ST_DATA_W} {111};set_instance_parameter_value {cmd_mux} {ST_CHANNEL_W} {2};set_instance_parameter_value {cmd_mux} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux} {PKT_TRANS_LOCK} {72};set_instance_parameter_value {cmd_mux} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux} {MERLIN_PACKET_FORMAT} {wunique(110) domain(109:108) snoop(107:104) barrier(103:102) ori_burst_size(101:99) response_status(98:97) cache(96:93) protection(92:90) thread_id(89) dest_id(88) src_id(87) qos(86) begin_burst(85) data_sideband(84) addr_sideband(83) burst_type(82:81) burst_size(80:78) burstwrap(77) byte_cnt(76:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_mux} {SYNC_RESET} {0};add_instance {cmd_mux_001} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_001} {ST_DATA_W} {111};set_instance_parameter_value {cmd_mux_001} {ST_CHANNEL_W} {2};set_instance_parameter_value {cmd_mux_001} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_001} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_001} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_001} {PKT_TRANS_LOCK} {72};set_instance_parameter_value {cmd_mux_001} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_001} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_001} {MERLIN_PACKET_FORMAT} {wunique(110) domain(109:108) snoop(107:104) barrier(103:102) ori_burst_size(101:99) response_status(98:97) cache(96:93) protection(92:90) thread_id(89) dest_id(88) src_id(87) qos(86) begin_burst(85) data_sideband(84) addr_sideband(83) burst_type(82:81) burst_size(80:78) burstwrap(77) byte_cnt(76:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_mux_001} {SYNC_RESET} {0};add_instance {rsp_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux} {ST_DATA_W} {111};set_instance_parameter_value {rsp_demux} {ST_CHANNEL_W} {2};set_instance_parameter_value {rsp_demux} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux} {MERLIN_PACKET_FORMAT} {wunique(110) domain(109:108) snoop(107:104) barrier(103:102) ori_burst_size(101:99) response_status(98:97) cache(96:93) protection(92:90) thread_id(89) dest_id(88) src_id(87) qos(86) begin_burst(85) data_sideband(84) addr_sideband(83) burst_type(82:81) burst_size(80:78) burstwrap(77) byte_cnt(76:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_demux} {SYNC_RESET} {0};add_instance {rsp_demux_001} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_001} {ST_DATA_W} {111};set_instance_parameter_value {rsp_demux_001} {ST_CHANNEL_W} {2};set_instance_parameter_value {rsp_demux_001} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_001} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_001} {MERLIN_PACKET_FORMAT} {wunique(110) domain(109:108) snoop(107:104) barrier(103:102) ori_burst_size(101:99) response_status(98:97) cache(96:93) protection(92:90) thread_id(89) dest_id(88) src_id(87) qos(86) begin_burst(85) data_sideband(84) addr_sideband(83) burst_type(82:81) burst_size(80:78) burstwrap(77) byte_cnt(76:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_demux_001} {SYNC_RESET} {0};add_instance {rsp_mux} {altera_merlin_multiplexer};set_instance_parameter_value {rsp_mux} {ST_DATA_W} {111};set_instance_parameter_value {rsp_mux} {ST_CHANNEL_W} {2};set_instance_parameter_value {rsp_mux} {NUM_INPUTS} {2};set_instance_parameter_value {rsp_mux} {PIPELINE_ARB} {0};set_instance_parameter_value {rsp_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {rsp_mux} {PKT_TRANS_LOCK} {72};set_instance_parameter_value {rsp_mux} {ARBITRATION_SCHEME} {no-arb};set_instance_parameter_value {rsp_mux} {ARBITRATION_SHARES} {1 1 };set_instance_parameter_value {rsp_mux} {MERLIN_PACKET_FORMAT} {wunique(110) domain(109:108) snoop(107:104) barrier(103:102) ori_burst_size(101:99) response_status(98:97) cache(96:93) protection(92:90) thread_id(89) dest_id(88) src_id(87) qos(86) begin_burst(85) data_sideband(84) addr_sideband(83) burst_type(82:81) burst_size(80:78) burstwrap(77) byte_cnt(76:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_mux} {SYNC_RESET} {0};add_instance {master_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {master_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {master_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {master_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {master_reset_reset_bridge} {USE_RESET_REQUEST} {0};set_instance_parameter_value {master_reset_reset_bridge} {SYNC_RESET} {0};add_instance {csr_clk_clk_clock_bridge} {altera_clock_bridge};set_instance_parameter_value {csr_clk_clk_clock_bridge} {EXPLICIT_CLOCK_RATE} {125000000};set_instance_parameter_value {csr_clk_clk_clock_bridge} {NUM_CLOCK_OUTPUTS} {1};add_connection {master_avalon_universal_master_0_translator.avalon_universal_master_0} {master_avalon_universal_master_0_agent.av} {avalon};set_connection_parameter_value {master_avalon_universal_master_0_translator.avalon_universal_master_0/master_avalon_universal_master_0_agent.av} {arbitrationPriority} {1};set_connection_parameter_value {master_avalon_universal_master_0_translator.avalon_universal_master_0/master_avalon_universal_master_0_agent.av} {baseAddress} {0x0000};set_connection_parameter_value {master_avalon_universal_master_0_translator.avalon_universal_master_0/master_avalon_universal_master_0_agent.av} {defaultConnection} {false};set_connection_parameter_value {master_avalon_universal_master_0_translator.avalon_universal_master_0/master_avalon_universal_master_0_agent.av} {domainAlias} {};set_connection_parameter_value {master_avalon_universal_master_0_translator.avalon_universal_master_0/master_avalon_universal_master_0_agent.av} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {master_avalon_universal_master_0_translator.avalon_universal_master_0/master_avalon_universal_master_0_agent.av} {qsys_mm.clockCrossingAdapter} {HANDSHAKE};set_connection_parameter_value {master_avalon_universal_master_0_translator.avalon_universal_master_0/master_avalon_universal_master_0_agent.av} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {master_avalon_universal_master_0_translator.avalon_universal_master_0/master_avalon_universal_master_0_agent.av} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {master_avalon_universal_master_0_translator.avalon_universal_master_0/master_avalon_universal_master_0_agent.av} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {master_avalon_universal_master_0_translator.avalon_universal_master_0/master_avalon_universal_master_0_agent.av} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {master_avalon_universal_master_0_translator.avalon_universal_master_0/master_avalon_universal_master_0_agent.av} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {master_avalon_universal_master_0_translator.avalon_universal_master_0/master_avalon_universal_master_0_agent.av} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {master_avalon_universal_master_0_translator.avalon_universal_master_0/master_avalon_universal_master_0_agent.av} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {master_avalon_universal_master_0_translator.avalon_universal_master_0/master_avalon_universal_master_0_agent.av} {qsys_mm.syncResets} {FALSE};add_connection {rsp_mux.src} {master_avalon_universal_master_0_agent.rp} {avalon_streaming};preview_set_connection_tag {rsp_mux.src/master_avalon_universal_master_0_agent.rp} {qsys_mm.response};add_connection {multi_channel_avalon_universal_slave_0_agent.m0} {multi_channel_avalon_universal_slave_0_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {multi_channel_avalon_universal_slave_0_agent.m0/multi_channel_avalon_universal_slave_0_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {multi_channel_avalon_universal_slave_0_agent.m0/multi_channel_avalon_universal_slave_0_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {multi_channel_avalon_universal_slave_0_agent.m0/multi_channel_avalon_universal_slave_0_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {multi_channel_avalon_universal_slave_0_agent.m0/multi_channel_avalon_universal_slave_0_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {multi_channel_avalon_universal_slave_0_agent.m0/multi_channel_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {multi_channel_avalon_universal_slave_0_agent.m0/multi_channel_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.clockCrossingAdapter} {HANDSHAKE};set_connection_parameter_value {multi_channel_avalon_universal_slave_0_agent.m0/multi_channel_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {multi_channel_avalon_universal_slave_0_agent.m0/multi_channel_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {multi_channel_avalon_universal_slave_0_agent.m0/multi_channel_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {multi_channel_avalon_universal_slave_0_agent.m0/multi_channel_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {multi_channel_avalon_universal_slave_0_agent.m0/multi_channel_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {multi_channel_avalon_universal_slave_0_agent.m0/multi_channel_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {multi_channel_avalon_universal_slave_0_agent.m0/multi_channel_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {multi_channel_avalon_universal_slave_0_agent.m0/multi_channel_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.syncResets} {FALSE};add_connection {multi_channel_avalon_universal_slave_0_agent.rf_source} {multi_channel_avalon_universal_slave_0_agent_rsp_fifo.in} {avalon_streaming};add_connection {multi_channel_avalon_universal_slave_0_agent_rsp_fifo.out} {multi_channel_avalon_universal_slave_0_agent.rf_sink} {avalon_streaming};add_connection {multi_channel_avalon_universal_slave_0_agent.rdata_fifo_src} {multi_channel_avalon_universal_slave_0_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux.src} {multi_channel_avalon_universal_slave_0_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux.src/multi_channel_avalon_universal_slave_0_agent.cp} {qsys_mm.command};add_connection {mm_clock_crossing_bridge_s0_agent.m0} {mm_clock_crossing_bridge_s0_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {mm_clock_crossing_bridge_s0_agent.m0/mm_clock_crossing_bridge_s0_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {mm_clock_crossing_bridge_s0_agent.m0/mm_clock_crossing_bridge_s0_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {mm_clock_crossing_bridge_s0_agent.m0/mm_clock_crossing_bridge_s0_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {mm_clock_crossing_bridge_s0_agent.m0/mm_clock_crossing_bridge_s0_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {mm_clock_crossing_bridge_s0_agent.m0/mm_clock_crossing_bridge_s0_translator.avalon_universal_slave_0} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {mm_clock_crossing_bridge_s0_agent.m0/mm_clock_crossing_bridge_s0_translator.avalon_universal_slave_0} {qsys_mm.clockCrossingAdapter} {HANDSHAKE};set_connection_parameter_value {mm_clock_crossing_bridge_s0_agent.m0/mm_clock_crossing_bridge_s0_translator.avalon_universal_slave_0} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {mm_clock_crossing_bridge_s0_agent.m0/mm_clock_crossing_bridge_s0_translator.avalon_universal_slave_0} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {mm_clock_crossing_bridge_s0_agent.m0/mm_clock_crossing_bridge_s0_translator.avalon_universal_slave_0} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {mm_clock_crossing_bridge_s0_agent.m0/mm_clock_crossing_bridge_s0_translator.avalon_universal_slave_0} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {mm_clock_crossing_bridge_s0_agent.m0/mm_clock_crossing_bridge_s0_translator.avalon_universal_slave_0} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {mm_clock_crossing_bridge_s0_agent.m0/mm_clock_crossing_bridge_s0_translator.avalon_universal_slave_0} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {mm_clock_crossing_bridge_s0_agent.m0/mm_clock_crossing_bridge_s0_translator.avalon_universal_slave_0} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {mm_clock_crossing_bridge_s0_agent.m0/mm_clock_crossing_bridge_s0_translator.avalon_universal_slave_0} {qsys_mm.syncResets} {FALSE};add_connection {mm_clock_crossing_bridge_s0_agent.rf_source} {mm_clock_crossing_bridge_s0_agent_rsp_fifo.in} {avalon_streaming};add_connection {mm_clock_crossing_bridge_s0_agent_rsp_fifo.out} {mm_clock_crossing_bridge_s0_agent.rf_sink} {avalon_streaming};add_connection {mm_clock_crossing_bridge_s0_agent.rdata_fifo_src} {mm_clock_crossing_bridge_s0_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_001.src} {mm_clock_crossing_bridge_s0_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_001.src/mm_clock_crossing_bridge_s0_agent.cp} {qsys_mm.command};add_connection {master_avalon_universal_master_0_agent.cp} {router.sink} {avalon_streaming};preview_set_connection_tag {master_avalon_universal_master_0_agent.cp/router.sink} {qsys_mm.command};add_connection {router.src} {cmd_demux.sink} {avalon_streaming};preview_set_connection_tag {router.src/cmd_demux.sink} {qsys_mm.command};add_connection {multi_channel_avalon_universal_slave_0_agent.rp} {router_001.sink} {avalon_streaming};preview_set_connection_tag {multi_channel_avalon_universal_slave_0_agent.rp/router_001.sink} {qsys_mm.response};add_connection {router_001.src} {rsp_demux.sink} {avalon_streaming};preview_set_connection_tag {router_001.src/rsp_demux.sink} {qsys_mm.response};add_connection {mm_clock_crossing_bridge_s0_agent.rp} {router_002.sink} {avalon_streaming};preview_set_connection_tag {mm_clock_crossing_bridge_s0_agent.rp/router_002.sink} {qsys_mm.response};add_connection {router_002.src} {rsp_demux_001.sink} {avalon_streaming};preview_set_connection_tag {router_002.src/rsp_demux_001.sink} {qsys_mm.response};add_connection {cmd_demux.src0} {cmd_mux.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.command};add_connection {cmd_demux.src1} {cmd_mux_001.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.command};add_connection {rsp_demux.src0} {rsp_mux.sink0} {avalon_streaming};preview_set_connection_tag {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.response};add_connection {rsp_demux_001.src0} {rsp_mux.sink1} {avalon_streaming};preview_set_connection_tag {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.response};add_connection {master_reset_reset_bridge.out_reset} {master_avalon_universal_master_0_translator.reset} {reset};add_connection {master_reset_reset_bridge.out_reset} {multi_channel_avalon_universal_slave_0_translator.reset} {reset};add_connection {master_reset_reset_bridge.out_reset} {mm_clock_crossing_bridge_s0_translator.reset} {reset};add_connection {master_reset_reset_bridge.out_reset} {master_avalon_universal_master_0_agent.clk_reset} {reset};add_connection {master_reset_reset_bridge.out_reset} {multi_channel_avalon_universal_slave_0_agent.clk_reset} {reset};add_connection {master_reset_reset_bridge.out_reset} {multi_channel_avalon_universal_slave_0_agent_rsp_fifo.clk_reset} {reset};add_connection {master_reset_reset_bridge.out_reset} {mm_clock_crossing_bridge_s0_agent.clk_reset} {reset};add_connection {master_reset_reset_bridge.out_reset} {mm_clock_crossing_bridge_s0_agent_rsp_fifo.clk_reset} {reset};add_connection {master_reset_reset_bridge.out_reset} {router.clk_reset} {reset};add_connection {master_reset_reset_bridge.out_reset} {router_001.clk_reset} {reset};add_connection {master_reset_reset_bridge.out_reset} {router_002.clk_reset} {reset};add_connection {master_reset_reset_bridge.out_reset} {cmd_demux.clk_reset} {reset};add_connection {master_reset_reset_bridge.out_reset} {cmd_mux.clk_reset} {reset};add_connection {master_reset_reset_bridge.out_reset} {cmd_mux_001.clk_reset} {reset};add_connection {master_reset_reset_bridge.out_reset} {rsp_demux.clk_reset} {reset};add_connection {master_reset_reset_bridge.out_reset} {rsp_demux_001.clk_reset} {reset};add_connection {master_reset_reset_bridge.out_reset} {rsp_mux.clk_reset} {reset};add_connection {csr_clk_clk_clock_bridge.out_clk} {master_avalon_universal_master_0_translator.clk} {clock};add_connection {csr_clk_clk_clock_bridge.out_clk} {multi_channel_avalon_universal_slave_0_translator.clk} {clock};add_connection {csr_clk_clk_clock_bridge.out_clk} {mm_clock_crossing_bridge_s0_translator.clk} {clock};add_connection {csr_clk_clk_clock_bridge.out_clk} {master_avalon_universal_master_0_agent.clk} {clock};add_connection {csr_clk_clk_clock_bridge.out_clk} {multi_channel_avalon_universal_slave_0_agent.clk} {clock};add_connection {csr_clk_clk_clock_bridge.out_clk} {multi_channel_avalon_universal_slave_0_agent_rsp_fifo.clk} {clock};add_connection {csr_clk_clk_clock_bridge.out_clk} {mm_clock_crossing_bridge_s0_agent.clk} {clock};add_connection {csr_clk_clk_clock_bridge.out_clk} {mm_clock_crossing_bridge_s0_agent_rsp_fifo.clk} {clock};add_connection {csr_clk_clk_clock_bridge.out_clk} {router.clk} {clock};add_connection {csr_clk_clk_clock_bridge.out_clk} {router_001.clk} {clock};add_connection {csr_clk_clk_clock_bridge.out_clk} {router_002.clk} {clock};add_connection {csr_clk_clk_clock_bridge.out_clk} {cmd_demux.clk} {clock};add_connection {csr_clk_clk_clock_bridge.out_clk} {rsp_mux.clk} {clock};add_connection {csr_clk_clk_clock_bridge.out_clk} {cmd_mux.clk} {clock};add_connection {csr_clk_clk_clock_bridge.out_clk} {rsp_demux.clk} {clock};add_connection {csr_clk_clk_clock_bridge.out_clk} {cmd_mux_001.clk} {clock};add_connection {csr_clk_clk_clock_bridge.out_clk} {rsp_demux_001.clk} {clock};add_connection {csr_clk_clk_clock_bridge.out_clk} {master_reset_reset_bridge.clk} {clock};add_interface {master_avalon_universal_master_0} {avalon} {slave};set_interface_property {master_avalon_universal_master_0} {EXPORT_OF} {master_avalon_universal_master_0_translator.avalon_anti_master_0};add_interface {multi_channel_avalon_universal_slave_0} {avalon} {master};set_interface_property {multi_channel_avalon_universal_slave_0} {EXPORT_OF} {multi_channel_avalon_universal_slave_0_translator.avalon_anti_slave_0};add_interface {mm_clock_crossing_bridge_s0} {avalon} {master};set_interface_property {mm_clock_crossing_bridge_s0} {EXPORT_OF} {mm_clock_crossing_bridge_s0_translator.avalon_anti_slave_0};add_interface {master_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {master_reset_reset_bridge_in_reset} {EXPORT_OF} {master_reset_reset_bridge.in_reset};add_interface {csr_clk_clk} {clock} {slave};set_interface_property {csr_clk_clk} {EXPORT_OF} {csr_clk_clk_clock_bridge.in_clk};set_module_assignment {interconnect_id.master.avalon_universal_master_0} {0};set_module_assignment {interconnect_id.mm_clock_crossing_bridge.s0} {0};set_module_assignment {interconnect_id.multi_channel.avalon_universal_slave_0} {1};" />
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_mm_interconnect_191\synth\address_decoder_top_altera_mm_interconnect_191_3kbf4ri.v"
       attributes="CONTAINS_INLINE_CONFIGURATION" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_mm_interconnect_191\synth\address_decoder_top_altera_mm_interconnect_191_3kbf4ri.v"
       attributes="CONTAINS_INLINE_CONFIGURATION" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
  </sourceFiles>
  <childSourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_master_agent/altera_merlin_master_agent_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
  </childSourceFiles>
  <instantiator instantiator="address_decoder_top" as="mm_interconnect_0" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_mm_interconnect_191_3kbf4ri"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_master_translator_191_g7h47bq"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_slave_translator_191_x56fcki"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_master_agent_191_mpbm6tq"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_slave_agent_191_ncfkfri"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_avalon_sc_fifo_191_e5eqkcq"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_router_191_fwgsesi"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_router_191_eo734fy"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_demultiplexer_191_cvl73xa"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_multiplexer_191_mbb35ky"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_demultiplexer_191_6ywz4pa"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_multiplexer_191_drzivnq"</message>
  </messages>
 </entity>
 <entity
   kind="altera_mm_interconnect"
   version="19.1"
   name="address_decoder_top_altera_mm_interconnect_191_fv6bu5i">
  <parameter name="AUTO_DEVICE" value="1SG165HU2F50E2VG" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Stratix 10" />
  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="" />
  <parameter
     name="COMPOSE_CONTENTS"
     value="add_instance {mm_clock_crossing_bridge_m0_translator} {altera_merlin_master_translator};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_ADDRESS_W} {17};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_DATA_W} {32};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {UAV_ADDRESS_W} {17};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_READLATENCY} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {USE_READDATA} {1};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {USE_READ} {1};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {USE_WRITE} {1};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {USE_ADDRESS} {1};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {USE_CLKEN} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {USE_LOCK} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {SYNC_RESET} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_translator} {WAITREQUEST_ALLOWANCE} {0};add_instance {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {altera_merlin_slave_translator};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_ADDRESS_W} {14};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_DATA_W} {32};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {UAV_DATA_W} {32};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {UAV_ADDRESS_W} {17};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_READLATENCY} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_READ_WAIT} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {USE_READDATA} {1};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {USE_READ} {1};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {USE_WRITE} {1};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {USE_ADDRESS} {1};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {USE_LOCK} {1};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_BURSTCOUNT_SYMBOLS} {1};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {WAITREQUEST_ALLOWANCE} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_translator} {SYNC_RESET} {0};add_instance {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {altera_merlin_slave_translator};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_ADDRESS_W} {14};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_DATA_W} {32};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {UAV_DATA_W} {32};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {UAV_ADDRESS_W} {17};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_READLATENCY} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_READ_WAIT} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {USE_READDATA} {1};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {USE_READ} {1};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {USE_WRITE} {1};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {USE_ADDRESS} {1};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {USE_LOCK} {1};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_BURSTCOUNT_SYMBOLS} {1};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {WAITREQUEST_ALLOWANCE} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_translator} {SYNC_RESET} {0};add_instance {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {altera_merlin_slave_translator};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_ADDRESS_W} {14};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_DATA_W} {32};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {UAV_DATA_W} {32};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {UAV_ADDRESS_W} {17};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_READLATENCY} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_READ_WAIT} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {USE_READDATA} {1};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {USE_READ} {1};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {USE_WRITE} {1};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {USE_ADDRESS} {1};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {USE_LOCK} {1};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_BURSTCOUNT_SYMBOLS} {1};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {WAITREQUEST_ALLOWANCE} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_translator} {SYNC_RESET} {0};add_instance {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {altera_merlin_slave_translator};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_ADDRESS_W} {14};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_DATA_W} {32};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {UAV_DATA_W} {32};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {UAV_ADDRESS_W} {17};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_READLATENCY} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_READ_WAIT} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {USE_READDATA} {1};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {USE_READ} {1};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {USE_WRITE} {1};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {USE_ADDRESS} {1};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {USE_LOCK} {1};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_BURSTCOUNT_SYMBOLS} {1};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {WAITREQUEST_ALLOWANCE} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_translator} {SYNC_RESET} {0};add_instance {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {altera_merlin_slave_translator};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_ADDRESS_W} {14};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_DATA_W} {32};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {UAV_DATA_W} {32};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {UAV_ADDRESS_W} {17};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_READLATENCY} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_READ_WAIT} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {USE_READDATA} {1};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {USE_READ} {1};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {USE_WRITE} {1};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {USE_ADDRESS} {1};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {USE_LOCK} {1};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_BURSTCOUNT_SYMBOLS} {1};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {WAITREQUEST_ALLOWANCE} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_translator} {SYNC_RESET} {0};add_instance {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {altera_merlin_slave_translator};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_ADDRESS_W} {14};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_DATA_W} {32};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {UAV_DATA_W} {32};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {UAV_ADDRESS_W} {17};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_READLATENCY} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_READ_WAIT} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {USE_READDATA} {1};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {USE_READ} {1};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {USE_WRITE} {1};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {USE_ADDRESS} {1};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {USE_LOCK} {1};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_BURSTCOUNT_SYMBOLS} {1};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {WAITREQUEST_ALLOWANCE} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_translator} {SYNC_RESET} {0};add_instance {mm_clock_crossing_bridge_m0_agent} {altera_merlin_master_agent};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_WUNIQUE} {99};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_DOMAIN_H} {98};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_DOMAIN_L} {97};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_SNOOP_H} {96};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_SNOOP_L} {93};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_BARRIER_H} {92};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_BARRIER_L} {91};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_ORI_BURST_SIZE_H} {90};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_ORI_BURST_SIZE_L} {88};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_RESPONSE_STATUS_H} {87};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_RESPONSE_STATUS_L} {86};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_QOS_H} {71};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_QOS_L} {71};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_DATA_SIDEBAND_H} {69};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_DATA_SIDEBAND_L} {69};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_ADDR_SIDEBAND_H} {68};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_ADDR_SIDEBAND_L} {68};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_BURST_TYPE_H} {67};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_BURST_TYPE_L} {66};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_CACHE_H} {85};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_CACHE_L} {82};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_THREAD_ID_H} {78};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_THREAD_ID_L} {78};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_BURST_SIZE_H} {65};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_BURST_SIZE_L} {63};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_TRANS_EXCLUSIVE} {58};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_BEGIN_BURST} {70};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_PROTECTION_H} {81};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_PROTECTION_L} {79};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_BURSTWRAP_H} {62};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_BURSTWRAP_L} {62};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_BYTE_CNT_H} {61};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_BYTE_CNT_L} {59};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_ADDR_H} {52};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_TRANS_COMPRESSED_READ} {53};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_TRANS_POSTED} {54};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_TRANS_READ} {56};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_DATA_H} {31};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_DATA_L} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_SRC_ID_H} {74};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_SRC_ID_L} {72};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_DEST_ID_H} {77};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {PKT_DEST_ID_L} {75};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {ST_DATA_W} {100};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {ST_CHANNEL_W} {6};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {ADDR_MAP} {&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?&gt;
&lt;address_map&gt;
 &lt;slave
   id=&quot;0&quot;
   name=&quot;traffic_controller_ch_0_1_avalon_universal_slave_0_translator.avalon_universal_slave_0&quot;
   start=&quot;0x0000000000000000&quot;
   end=&quot;0x00000000000004000&quot;
   responds=&quot;1&quot;
   user_default=&quot;0&quot; /&gt;
 &lt;slave
   id=&quot;2&quot;
   name=&quot;traffic_controller_ch_2_3_avalon_universal_slave_0_translator.avalon_universal_slave_0&quot;
   start=&quot;0x0000000000004000&quot;
   end=&quot;0x00000000000008000&quot;
   responds=&quot;1&quot;
   user_default=&quot;0&quot; /&gt;
 &lt;slave
   id=&quot;3&quot;
   name=&quot;traffic_controller_ch_4_5_avalon_universal_slave_0_translator.avalon_universal_slave_0&quot;
   start=&quot;0x0000000000008000&quot;
   end=&quot;0x0000000000000c000&quot;
   responds=&quot;1&quot;
   user_default=&quot;0&quot; /&gt;
 &lt;slave
   id=&quot;4&quot;
   name=&quot;traffic_controller_ch_6_7_avalon_universal_slave_0_translator.avalon_universal_slave_0&quot;
   start=&quot;0x000000000000c000&quot;
   end=&quot;0x00000000000010000&quot;
   responds=&quot;1&quot;
   user_default=&quot;0&quot; /&gt;
 &lt;slave
   id=&quot;5&quot;
   name=&quot;traffic_controller_ch_8_9_avalon_universal_slave_0_translator.avalon_universal_slave_0&quot;
   start=&quot;0x0000000000010000&quot;
   end=&quot;0x00000000000014000&quot;
   responds=&quot;1&quot;
   user_default=&quot;0&quot; /&gt;
 &lt;slave
   id=&quot;1&quot;
   name=&quot;traffic_controller_ch_10_11_avalon_universal_slave_0_translator.avalon_universal_slave_0&quot;
   start=&quot;0x0000000000014000&quot;
   end=&quot;0x00000000000018000&quot;
   responds=&quot;1&quot;
   user_default=&quot;0&quot; /&gt;
&lt;/address_map&gt;
};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {ID} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {BURSTWRAP_VALUE} {1};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {CACHE_VALUE} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {DOMAIN_VALUE} {3};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {BARRIER_VALUE} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {SNOOP_VALUE} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {WUNIQUE_VALUE} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_agent} {SYNC_RESET} {0};add_instance {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {altera_merlin_slave_agent};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_ORI_BURST_SIZE_H} {90};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_ORI_BURST_SIZE_L} {88};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_RESPONSE_STATUS_H} {87};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_RESPONSE_STATUS_L} {86};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_BURST_SIZE_H} {65};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_BURST_SIZE_L} {63};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_BEGIN_BURST} {70};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_PROTECTION_H} {81};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_PROTECTION_L} {79};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_BURSTWRAP_H} {62};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_BURSTWRAP_L} {62};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_BYTE_CNT_H} {61};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_BYTE_CNT_L} {59};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_ADDR_H} {52};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_TRANS_COMPRESSED_READ} {53};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_TRANS_POSTED} {54};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_TRANS_READ} {56};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_DATA_H} {31};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_DATA_L} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_SRC_ID_H} {74};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_SRC_ID_L} {72};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_DEST_ID_H} {77};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_DEST_ID_L} {75};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {ST_CHANNEL_W} {6};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {ST_DATA_W} {100};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {MAX_BURSTWRAP} {1};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {ID} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {ECC_ENABLE} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent} {SYNC_RESET} {0};add_instance {traffic_controller_ch_0_1_avalon_universal_slave_0_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent_rsp_fifo} {BITS_PER_SYMBOL} {101};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};set_instance_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent_rsp_fifo} {SYNC_RESET} {0};add_instance {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {altera_merlin_slave_agent};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_ORI_BURST_SIZE_H} {90};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_ORI_BURST_SIZE_L} {88};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_RESPONSE_STATUS_H} {87};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_RESPONSE_STATUS_L} {86};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_BURST_SIZE_H} {65};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_BURST_SIZE_L} {63};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_BEGIN_BURST} {70};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_PROTECTION_H} {81};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_PROTECTION_L} {79};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_BURSTWRAP_H} {62};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_BURSTWRAP_L} {62};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_BYTE_CNT_H} {61};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_BYTE_CNT_L} {59};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_ADDR_H} {52};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_TRANS_COMPRESSED_READ} {53};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_TRANS_POSTED} {54};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_TRANS_READ} {56};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_DATA_H} {31};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_DATA_L} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_SRC_ID_H} {74};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_SRC_ID_L} {72};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_DEST_ID_H} {77};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_DEST_ID_L} {75};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {ST_CHANNEL_W} {6};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {ST_DATA_W} {100};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {MAX_BURSTWRAP} {1};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {ID} {2};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {ECC_ENABLE} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent} {SYNC_RESET} {0};add_instance {traffic_controller_ch_2_3_avalon_universal_slave_0_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent_rsp_fifo} {BITS_PER_SYMBOL} {101};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};set_instance_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent_rsp_fifo} {SYNC_RESET} {0};add_instance {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {altera_merlin_slave_agent};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_ORI_BURST_SIZE_H} {90};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_ORI_BURST_SIZE_L} {88};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_RESPONSE_STATUS_H} {87};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_RESPONSE_STATUS_L} {86};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_BURST_SIZE_H} {65};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_BURST_SIZE_L} {63};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_BEGIN_BURST} {70};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_PROTECTION_H} {81};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_PROTECTION_L} {79};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_BURSTWRAP_H} {62};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_BURSTWRAP_L} {62};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_BYTE_CNT_H} {61};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_BYTE_CNT_L} {59};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_ADDR_H} {52};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_TRANS_COMPRESSED_READ} {53};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_TRANS_POSTED} {54};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_TRANS_READ} {56};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_DATA_H} {31};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_DATA_L} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_SRC_ID_H} {74};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_SRC_ID_L} {72};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_DEST_ID_H} {77};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_DEST_ID_L} {75};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {ST_CHANNEL_W} {6};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {ST_DATA_W} {100};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {MAX_BURSTWRAP} {1};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {ID} {3};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {ECC_ENABLE} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent} {SYNC_RESET} {0};add_instance {traffic_controller_ch_4_5_avalon_universal_slave_0_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent_rsp_fifo} {BITS_PER_SYMBOL} {101};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};set_instance_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent_rsp_fifo} {SYNC_RESET} {0};add_instance {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {altera_merlin_slave_agent};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_ORI_BURST_SIZE_H} {90};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_ORI_BURST_SIZE_L} {88};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_RESPONSE_STATUS_H} {87};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_RESPONSE_STATUS_L} {86};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_BURST_SIZE_H} {65};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_BURST_SIZE_L} {63};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_BEGIN_BURST} {70};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_PROTECTION_H} {81};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_PROTECTION_L} {79};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_BURSTWRAP_H} {62};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_BURSTWRAP_L} {62};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_BYTE_CNT_H} {61};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_BYTE_CNT_L} {59};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_ADDR_H} {52};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_TRANS_COMPRESSED_READ} {53};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_TRANS_POSTED} {54};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_TRANS_READ} {56};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_DATA_H} {31};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_DATA_L} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_SRC_ID_H} {74};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_SRC_ID_L} {72};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_DEST_ID_H} {77};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_DEST_ID_L} {75};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {ST_CHANNEL_W} {6};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {ST_DATA_W} {100};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {MAX_BURSTWRAP} {1};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {ID} {4};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {ECC_ENABLE} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent} {SYNC_RESET} {0};add_instance {traffic_controller_ch_6_7_avalon_universal_slave_0_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent_rsp_fifo} {BITS_PER_SYMBOL} {101};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};set_instance_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent_rsp_fifo} {SYNC_RESET} {0};add_instance {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {altera_merlin_slave_agent};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_ORI_BURST_SIZE_H} {90};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_ORI_BURST_SIZE_L} {88};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_RESPONSE_STATUS_H} {87};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_RESPONSE_STATUS_L} {86};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_BURST_SIZE_H} {65};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_BURST_SIZE_L} {63};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_BEGIN_BURST} {70};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_PROTECTION_H} {81};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_PROTECTION_L} {79};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_BURSTWRAP_H} {62};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_BURSTWRAP_L} {62};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_BYTE_CNT_H} {61};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_BYTE_CNT_L} {59};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_ADDR_H} {52};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_TRANS_COMPRESSED_READ} {53};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_TRANS_POSTED} {54};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_TRANS_READ} {56};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_DATA_H} {31};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_DATA_L} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_SRC_ID_H} {74};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_SRC_ID_L} {72};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_DEST_ID_H} {77};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_DEST_ID_L} {75};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {ST_CHANNEL_W} {6};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {ST_DATA_W} {100};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {MAX_BURSTWRAP} {1};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {ID} {5};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {ECC_ENABLE} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent} {SYNC_RESET} {0};add_instance {traffic_controller_ch_8_9_avalon_universal_slave_0_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent_rsp_fifo} {BITS_PER_SYMBOL} {101};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};set_instance_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent_rsp_fifo} {SYNC_RESET} {0};add_instance {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {altera_merlin_slave_agent};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_ORI_BURST_SIZE_H} {90};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_ORI_BURST_SIZE_L} {88};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_RESPONSE_STATUS_H} {87};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_RESPONSE_STATUS_L} {86};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_BURST_SIZE_H} {65};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_BURST_SIZE_L} {63};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_BEGIN_BURST} {70};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_PROTECTION_H} {81};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_PROTECTION_L} {79};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_BURSTWRAP_H} {62};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_BURSTWRAP_L} {62};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_BYTE_CNT_H} {61};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_BYTE_CNT_L} {59};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_ADDR_H} {52};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_TRANS_COMPRESSED_READ} {53};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_TRANS_POSTED} {54};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_TRANS_READ} {56};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_DATA_H} {31};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_DATA_L} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_SRC_ID_H} {74};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_SRC_ID_L} {72};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_DEST_ID_H} {77};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_DEST_ID_L} {75};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {ST_CHANNEL_W} {6};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {ST_DATA_W} {100};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {MAX_BURSTWRAP} {1};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {ID} {1};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {ECC_ENABLE} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent} {SYNC_RESET} {0};add_instance {traffic_controller_ch_10_11_avalon_universal_slave_0_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent_rsp_fifo} {BITS_PER_SYMBOL} {101};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};set_instance_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent_rsp_fifo} {SYNC_RESET} {0};add_instance {router} {altera_merlin_router};set_instance_parameter_value {router} {DESTINATION_ID} {0 2 3 4 5 1 };set_instance_parameter_value {router} {CHANNEL_ID} {000001 000010 000100 001000 010000 100000 };set_instance_parameter_value {router} {TYPE_OF_TRANSACTION} {both both both both both both };set_instance_parameter_value {router} {START_ADDRESS} {0x0 0x4000 0x8000 0xc000 0x10000 0x14000 };set_instance_parameter_value {router} {END_ADDRESS} {0x4000 0x8000 0xc000 0x10000 0x14000 0x18000 };set_instance_parameter_value {router} {NON_SECURED_TAG} {1 1 1 1 1 1 };set_instance_parameter_value {router} {SECURED_RANGE_PAIRS} {0 0 0 0 0 0 };set_instance_parameter_value {router} {SECURED_RANGE_LIST} {0 0 0 0 0 0 };set_instance_parameter_value {router} {SPAN_OFFSET} {};set_instance_parameter_value {router} {PKT_ADDR_H} {52};set_instance_parameter_value {router} {PKT_ADDR_L} {36};set_instance_parameter_value {router} {PKT_PROTECTION_H} {81};set_instance_parameter_value {router} {PKT_PROTECTION_L} {79};set_instance_parameter_value {router} {PKT_DEST_ID_H} {77};set_instance_parameter_value {router} {PKT_DEST_ID_L} {75};set_instance_parameter_value {router} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {router} {PKT_TRANS_READ} {56};set_instance_parameter_value {router} {ST_DATA_W} {100};set_instance_parameter_value {router} {ST_CHANNEL_W} {6};set_instance_parameter_value {router} {DECODER_TYPE} {0};set_instance_parameter_value {router} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_DESTID} {0};set_instance_parameter_value {router} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router} {SYNC_RESET} {0};add_instance {router_001} {altera_merlin_router};set_instance_parameter_value {router_001} {DESTINATION_ID} {0 };set_instance_parameter_value {router_001} {CHANNEL_ID} {1 };set_instance_parameter_value {router_001} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_001} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_001} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_001} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_001} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_001} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_001} {SPAN_OFFSET} {};set_instance_parameter_value {router_001} {PKT_ADDR_H} {52};set_instance_parameter_value {router_001} {PKT_ADDR_L} {36};set_instance_parameter_value {router_001} {PKT_PROTECTION_H} {81};set_instance_parameter_value {router_001} {PKT_PROTECTION_L} {79};set_instance_parameter_value {router_001} {PKT_DEST_ID_H} {77};set_instance_parameter_value {router_001} {PKT_DEST_ID_L} {75};set_instance_parameter_value {router_001} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {router_001} {PKT_TRANS_READ} {56};set_instance_parameter_value {router_001} {ST_DATA_W} {100};set_instance_parameter_value {router_001} {ST_CHANNEL_W} {6};set_instance_parameter_value {router_001} {DECODER_TYPE} {1};set_instance_parameter_value {router_001} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_001} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_001} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_001} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router_001} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router_001} {SYNC_RESET} {0};add_instance {router_002} {altera_merlin_router};set_instance_parameter_value {router_002} {DESTINATION_ID} {0 };set_instance_parameter_value {router_002} {CHANNEL_ID} {1 };set_instance_parameter_value {router_002} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_002} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_002} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_002} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_002} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_002} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_002} {SPAN_OFFSET} {};set_instance_parameter_value {router_002} {PKT_ADDR_H} {52};set_instance_parameter_value {router_002} {PKT_ADDR_L} {36};set_instance_parameter_value {router_002} {PKT_PROTECTION_H} {81};set_instance_parameter_value {router_002} {PKT_PROTECTION_L} {79};set_instance_parameter_value {router_002} {PKT_DEST_ID_H} {77};set_instance_parameter_value {router_002} {PKT_DEST_ID_L} {75};set_instance_parameter_value {router_002} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {router_002} {PKT_TRANS_READ} {56};set_instance_parameter_value {router_002} {ST_DATA_W} {100};set_instance_parameter_value {router_002} {ST_CHANNEL_W} {6};set_instance_parameter_value {router_002} {DECODER_TYPE} {1};set_instance_parameter_value {router_002} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_002} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_002} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_002} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router_002} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router_002} {SYNC_RESET} {0};add_instance {router_003} {altera_merlin_router};set_instance_parameter_value {router_003} {DESTINATION_ID} {0 };set_instance_parameter_value {router_003} {CHANNEL_ID} {1 };set_instance_parameter_value {router_003} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_003} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_003} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_003} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_003} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_003} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_003} {SPAN_OFFSET} {};set_instance_parameter_value {router_003} {PKT_ADDR_H} {52};set_instance_parameter_value {router_003} {PKT_ADDR_L} {36};set_instance_parameter_value {router_003} {PKT_PROTECTION_H} {81};set_instance_parameter_value {router_003} {PKT_PROTECTION_L} {79};set_instance_parameter_value {router_003} {PKT_DEST_ID_H} {77};set_instance_parameter_value {router_003} {PKT_DEST_ID_L} {75};set_instance_parameter_value {router_003} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {router_003} {PKT_TRANS_READ} {56};set_instance_parameter_value {router_003} {ST_DATA_W} {100};set_instance_parameter_value {router_003} {ST_CHANNEL_W} {6};set_instance_parameter_value {router_003} {DECODER_TYPE} {1};set_instance_parameter_value {router_003} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_003} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_003} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_003} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_003} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_003} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router_003} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router_003} {SYNC_RESET} {0};add_instance {router_004} {altera_merlin_router};set_instance_parameter_value {router_004} {DESTINATION_ID} {0 };set_instance_parameter_value {router_004} {CHANNEL_ID} {1 };set_instance_parameter_value {router_004} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_004} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_004} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_004} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_004} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_004} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_004} {SPAN_OFFSET} {};set_instance_parameter_value {router_004} {PKT_ADDR_H} {52};set_instance_parameter_value {router_004} {PKT_ADDR_L} {36};set_instance_parameter_value {router_004} {PKT_PROTECTION_H} {81};set_instance_parameter_value {router_004} {PKT_PROTECTION_L} {79};set_instance_parameter_value {router_004} {PKT_DEST_ID_H} {77};set_instance_parameter_value {router_004} {PKT_DEST_ID_L} {75};set_instance_parameter_value {router_004} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {router_004} {PKT_TRANS_READ} {56};set_instance_parameter_value {router_004} {ST_DATA_W} {100};set_instance_parameter_value {router_004} {ST_CHANNEL_W} {6};set_instance_parameter_value {router_004} {DECODER_TYPE} {1};set_instance_parameter_value {router_004} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_004} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_004} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_004} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_004} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_004} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router_004} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router_004} {SYNC_RESET} {0};add_instance {router_005} {altera_merlin_router};set_instance_parameter_value {router_005} {DESTINATION_ID} {0 };set_instance_parameter_value {router_005} {CHANNEL_ID} {1 };set_instance_parameter_value {router_005} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_005} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_005} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_005} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_005} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_005} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_005} {SPAN_OFFSET} {};set_instance_parameter_value {router_005} {PKT_ADDR_H} {52};set_instance_parameter_value {router_005} {PKT_ADDR_L} {36};set_instance_parameter_value {router_005} {PKT_PROTECTION_H} {81};set_instance_parameter_value {router_005} {PKT_PROTECTION_L} {79};set_instance_parameter_value {router_005} {PKT_DEST_ID_H} {77};set_instance_parameter_value {router_005} {PKT_DEST_ID_L} {75};set_instance_parameter_value {router_005} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {router_005} {PKT_TRANS_READ} {56};set_instance_parameter_value {router_005} {ST_DATA_W} {100};set_instance_parameter_value {router_005} {ST_CHANNEL_W} {6};set_instance_parameter_value {router_005} {DECODER_TYPE} {1};set_instance_parameter_value {router_005} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_005} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_005} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_005} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_005} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_005} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router_005} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router_005} {SYNC_RESET} {0};add_instance {router_006} {altera_merlin_router};set_instance_parameter_value {router_006} {DESTINATION_ID} {0 };set_instance_parameter_value {router_006} {CHANNEL_ID} {1 };set_instance_parameter_value {router_006} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_006} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_006} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_006} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_006} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_006} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_006} {SPAN_OFFSET} {};set_instance_parameter_value {router_006} {PKT_ADDR_H} {52};set_instance_parameter_value {router_006} {PKT_ADDR_L} {36};set_instance_parameter_value {router_006} {PKT_PROTECTION_H} {81};set_instance_parameter_value {router_006} {PKT_PROTECTION_L} {79};set_instance_parameter_value {router_006} {PKT_DEST_ID_H} {77};set_instance_parameter_value {router_006} {PKT_DEST_ID_L} {75};set_instance_parameter_value {router_006} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {router_006} {PKT_TRANS_READ} {56};set_instance_parameter_value {router_006} {ST_DATA_W} {100};set_instance_parameter_value {router_006} {ST_CHANNEL_W} {6};set_instance_parameter_value {router_006} {DECODER_TYPE} {1};set_instance_parameter_value {router_006} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_006} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_006} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_006} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_006} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_006} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router_006} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router_006} {SYNC_RESET} {0};add_instance {mm_clock_crossing_bridge_m0_limiter} {altera_merlin_traffic_limiter};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {SYNC_RESET} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {PKT_DEST_ID_H} {77};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {PKT_DEST_ID_L} {75};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {PKT_SRC_ID_H} {74};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {PKT_SRC_ID_L} {72};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {PKT_BYTE_CNT_H} {61};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {PKT_BYTE_CNT_L} {59};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {PKT_BYTEEN_H} {35};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {PKT_BYTEEN_L} {32};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {PKT_TRANS_POSTED} {54};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {PKT_THREAD_ID_H} {78};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {PKT_THREAD_ID_L} {78};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {MAX_BURST_LENGTH} {1};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {MAX_OUTSTANDING_RESPONSES} {2};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {PIPELINED} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {ST_DATA_W} {100};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {ST_CHANNEL_W} {6};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {VALID_WIDTH} {6};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {ENFORCE_ORDER} {1};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {PREVENT_HAZARDS} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {SUPPORTS_POSTED_WRITES} {1};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {SUPPORTS_NONPOSTED_WRITES} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {mm_clock_crossing_bridge_m0_limiter} {REORDER} {0};add_instance {cmd_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {cmd_demux} {ST_DATA_W} {100};set_instance_parameter_value {cmd_demux} {ST_CHANNEL_W} {6};set_instance_parameter_value {cmd_demux} {NUM_OUTPUTS} {6};set_instance_parameter_value {cmd_demux} {VALID_WIDTH} {6};set_instance_parameter_value {cmd_demux} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_demux} {SYNC_RESET} {0};add_instance {cmd_mux} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux} {ST_DATA_W} {100};set_instance_parameter_value {cmd_mux} {ST_CHANNEL_W} {6};set_instance_parameter_value {cmd_mux} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {cmd_mux} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_mux} {SYNC_RESET} {0};add_instance {cmd_mux_001} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_001} {ST_DATA_W} {100};set_instance_parameter_value {cmd_mux_001} {ST_CHANNEL_W} {6};set_instance_parameter_value {cmd_mux_001} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_001} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_001} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_001} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {cmd_mux_001} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_001} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_001} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_mux_001} {SYNC_RESET} {0};add_instance {cmd_mux_002} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_002} {ST_DATA_W} {100};set_instance_parameter_value {cmd_mux_002} {ST_CHANNEL_W} {6};set_instance_parameter_value {cmd_mux_002} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_002} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_002} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_002} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {cmd_mux_002} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_002} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_002} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_mux_002} {SYNC_RESET} {0};add_instance {cmd_mux_003} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_003} {ST_DATA_W} {100};set_instance_parameter_value {cmd_mux_003} {ST_CHANNEL_W} {6};set_instance_parameter_value {cmd_mux_003} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_003} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_003} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_003} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {cmd_mux_003} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_003} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_003} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_mux_003} {SYNC_RESET} {0};add_instance {cmd_mux_004} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_004} {ST_DATA_W} {100};set_instance_parameter_value {cmd_mux_004} {ST_CHANNEL_W} {6};set_instance_parameter_value {cmd_mux_004} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_004} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_004} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_004} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {cmd_mux_004} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_004} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_004} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_mux_004} {SYNC_RESET} {0};add_instance {cmd_mux_005} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_005} {ST_DATA_W} {100};set_instance_parameter_value {cmd_mux_005} {ST_CHANNEL_W} {6};set_instance_parameter_value {cmd_mux_005} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_005} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_005} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_005} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {cmd_mux_005} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_005} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_005} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_mux_005} {SYNC_RESET} {0};add_instance {rsp_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux} {ST_DATA_W} {100};set_instance_parameter_value {rsp_demux} {ST_CHANNEL_W} {6};set_instance_parameter_value {rsp_demux} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_demux} {SYNC_RESET} {0};add_instance {rsp_demux_001} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_001} {ST_DATA_W} {100};set_instance_parameter_value {rsp_demux_001} {ST_CHANNEL_W} {6};set_instance_parameter_value {rsp_demux_001} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_001} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_001} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_demux_001} {SYNC_RESET} {0};add_instance {rsp_demux_002} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_002} {ST_DATA_W} {100};set_instance_parameter_value {rsp_demux_002} {ST_CHANNEL_W} {6};set_instance_parameter_value {rsp_demux_002} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_002} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_002} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_demux_002} {SYNC_RESET} {0};add_instance {rsp_demux_003} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_003} {ST_DATA_W} {100};set_instance_parameter_value {rsp_demux_003} {ST_CHANNEL_W} {6};set_instance_parameter_value {rsp_demux_003} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_003} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_003} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_demux_003} {SYNC_RESET} {0};add_instance {rsp_demux_004} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_004} {ST_DATA_W} {100};set_instance_parameter_value {rsp_demux_004} {ST_CHANNEL_W} {6};set_instance_parameter_value {rsp_demux_004} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_004} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_004} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_demux_004} {SYNC_RESET} {0};add_instance {rsp_demux_005} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_005} {ST_DATA_W} {100};set_instance_parameter_value {rsp_demux_005} {ST_CHANNEL_W} {6};set_instance_parameter_value {rsp_demux_005} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_005} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_005} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_demux_005} {SYNC_RESET} {0};add_instance {rsp_mux} {altera_merlin_multiplexer};set_instance_parameter_value {rsp_mux} {ST_DATA_W} {100};set_instance_parameter_value {rsp_mux} {ST_CHANNEL_W} {6};set_instance_parameter_value {rsp_mux} {NUM_INPUTS} {6};set_instance_parameter_value {rsp_mux} {PIPELINE_ARB} {0};set_instance_parameter_value {rsp_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {rsp_mux} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {rsp_mux} {ARBITRATION_SCHEME} {no-arb};set_instance_parameter_value {rsp_mux} {ARBITRATION_SHARES} {1 1 1 1 1 1 };set_instance_parameter_value {rsp_mux} {MERLIN_PACKET_FORMAT} {wunique(99) domain(98:97) snoop(96:93) barrier(92:91) ori_burst_size(90:88) response_status(87:86) cache(85:82) protection(81:79) thread_id(78) dest_id(77:75) src_id(74:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_mux} {SYNC_RESET} {0};add_instance {mm_clock_crossing_bridge_m0_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {mm_clock_crossing_bridge_m0_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {mm_clock_crossing_bridge_m0_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {mm_clock_crossing_bridge_m0_reset_reset_bridge} {USE_RESET_REQUEST} {0};set_instance_parameter_value {mm_clock_crossing_bridge_m0_reset_reset_bridge} {SYNC_RESET} {0};add_instance {mac_clk_clk_clock_bridge} {altera_clock_bridge};set_instance_parameter_value {mac_clk_clk_clock_bridge} {EXPLICIT_CLOCK_RATE} {156250000};set_instance_parameter_value {mac_clk_clk_clock_bridge} {NUM_CLOCK_OUTPUTS} {1};add_connection {mm_clock_crossing_bridge_m0_translator.avalon_universal_master_0} {mm_clock_crossing_bridge_m0_agent.av} {avalon};set_connection_parameter_value {mm_clock_crossing_bridge_m0_translator.avalon_universal_master_0/mm_clock_crossing_bridge_m0_agent.av} {arbitrationPriority} {1};set_connection_parameter_value {mm_clock_crossing_bridge_m0_translator.avalon_universal_master_0/mm_clock_crossing_bridge_m0_agent.av} {baseAddress} {0x0000};set_connection_parameter_value {mm_clock_crossing_bridge_m0_translator.avalon_universal_master_0/mm_clock_crossing_bridge_m0_agent.av} {defaultConnection} {false};set_connection_parameter_value {mm_clock_crossing_bridge_m0_translator.avalon_universal_master_0/mm_clock_crossing_bridge_m0_agent.av} {domainAlias} {};set_connection_parameter_value {mm_clock_crossing_bridge_m0_translator.avalon_universal_master_0/mm_clock_crossing_bridge_m0_agent.av} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {mm_clock_crossing_bridge_m0_translator.avalon_universal_master_0/mm_clock_crossing_bridge_m0_agent.av} {qsys_mm.clockCrossingAdapter} {HANDSHAKE};set_connection_parameter_value {mm_clock_crossing_bridge_m0_translator.avalon_universal_master_0/mm_clock_crossing_bridge_m0_agent.av} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {mm_clock_crossing_bridge_m0_translator.avalon_universal_master_0/mm_clock_crossing_bridge_m0_agent.av} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {mm_clock_crossing_bridge_m0_translator.avalon_universal_master_0/mm_clock_crossing_bridge_m0_agent.av} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {mm_clock_crossing_bridge_m0_translator.avalon_universal_master_0/mm_clock_crossing_bridge_m0_agent.av} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {mm_clock_crossing_bridge_m0_translator.avalon_universal_master_0/mm_clock_crossing_bridge_m0_agent.av} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {mm_clock_crossing_bridge_m0_translator.avalon_universal_master_0/mm_clock_crossing_bridge_m0_agent.av} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {mm_clock_crossing_bridge_m0_translator.avalon_universal_master_0/mm_clock_crossing_bridge_m0_agent.av} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {mm_clock_crossing_bridge_m0_translator.avalon_universal_master_0/mm_clock_crossing_bridge_m0_agent.av} {qsys_mm.syncResets} {FALSE};add_connection {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.m0} {traffic_controller_ch_0_1_avalon_universal_slave_0_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.m0/traffic_controller_ch_0_1_avalon_universal_slave_0_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.m0/traffic_controller_ch_0_1_avalon_universal_slave_0_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.m0/traffic_controller_ch_0_1_avalon_universal_slave_0_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.m0/traffic_controller_ch_0_1_avalon_universal_slave_0_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.m0/traffic_controller_ch_0_1_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.m0/traffic_controller_ch_0_1_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.clockCrossingAdapter} {HANDSHAKE};set_connection_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.m0/traffic_controller_ch_0_1_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.m0/traffic_controller_ch_0_1_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.m0/traffic_controller_ch_0_1_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.m0/traffic_controller_ch_0_1_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.m0/traffic_controller_ch_0_1_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.m0/traffic_controller_ch_0_1_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.m0/traffic_controller_ch_0_1_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.m0/traffic_controller_ch_0_1_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.syncResets} {FALSE};add_connection {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.rf_source} {traffic_controller_ch_0_1_avalon_universal_slave_0_agent_rsp_fifo.in} {avalon_streaming};add_connection {traffic_controller_ch_0_1_avalon_universal_slave_0_agent_rsp_fifo.out} {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.rf_sink} {avalon_streaming};add_connection {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.rdata_fifo_src} {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux.src} {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux.src/traffic_controller_ch_0_1_avalon_universal_slave_0_agent.cp} {qsys_mm.command};add_connection {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.m0} {traffic_controller_ch_2_3_avalon_universal_slave_0_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.m0/traffic_controller_ch_2_3_avalon_universal_slave_0_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.m0/traffic_controller_ch_2_3_avalon_universal_slave_0_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.m0/traffic_controller_ch_2_3_avalon_universal_slave_0_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.m0/traffic_controller_ch_2_3_avalon_universal_slave_0_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.m0/traffic_controller_ch_2_3_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.m0/traffic_controller_ch_2_3_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.clockCrossingAdapter} {HANDSHAKE};set_connection_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.m0/traffic_controller_ch_2_3_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.m0/traffic_controller_ch_2_3_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.m0/traffic_controller_ch_2_3_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.m0/traffic_controller_ch_2_3_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.m0/traffic_controller_ch_2_3_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.m0/traffic_controller_ch_2_3_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.m0/traffic_controller_ch_2_3_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.m0/traffic_controller_ch_2_3_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.syncResets} {FALSE};add_connection {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.rf_source} {traffic_controller_ch_2_3_avalon_universal_slave_0_agent_rsp_fifo.in} {avalon_streaming};add_connection {traffic_controller_ch_2_3_avalon_universal_slave_0_agent_rsp_fifo.out} {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.rf_sink} {avalon_streaming};add_connection {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.rdata_fifo_src} {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_001.src} {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_001.src/traffic_controller_ch_2_3_avalon_universal_slave_0_agent.cp} {qsys_mm.command};add_connection {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.m0} {traffic_controller_ch_4_5_avalon_universal_slave_0_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.m0/traffic_controller_ch_4_5_avalon_universal_slave_0_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.m0/traffic_controller_ch_4_5_avalon_universal_slave_0_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.m0/traffic_controller_ch_4_5_avalon_universal_slave_0_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.m0/traffic_controller_ch_4_5_avalon_universal_slave_0_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.m0/traffic_controller_ch_4_5_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.m0/traffic_controller_ch_4_5_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.clockCrossingAdapter} {HANDSHAKE};set_connection_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.m0/traffic_controller_ch_4_5_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.m0/traffic_controller_ch_4_5_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.m0/traffic_controller_ch_4_5_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.m0/traffic_controller_ch_4_5_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.m0/traffic_controller_ch_4_5_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.m0/traffic_controller_ch_4_5_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.m0/traffic_controller_ch_4_5_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.m0/traffic_controller_ch_4_5_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.syncResets} {FALSE};add_connection {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.rf_source} {traffic_controller_ch_4_5_avalon_universal_slave_0_agent_rsp_fifo.in} {avalon_streaming};add_connection {traffic_controller_ch_4_5_avalon_universal_slave_0_agent_rsp_fifo.out} {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.rf_sink} {avalon_streaming};add_connection {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.rdata_fifo_src} {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_002.src} {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_002.src/traffic_controller_ch_4_5_avalon_universal_slave_0_agent.cp} {qsys_mm.command};add_connection {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.m0} {traffic_controller_ch_6_7_avalon_universal_slave_0_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.m0/traffic_controller_ch_6_7_avalon_universal_slave_0_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.m0/traffic_controller_ch_6_7_avalon_universal_slave_0_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.m0/traffic_controller_ch_6_7_avalon_universal_slave_0_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.m0/traffic_controller_ch_6_7_avalon_universal_slave_0_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.m0/traffic_controller_ch_6_7_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.m0/traffic_controller_ch_6_7_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.clockCrossingAdapter} {HANDSHAKE};set_connection_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.m0/traffic_controller_ch_6_7_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.m0/traffic_controller_ch_6_7_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.m0/traffic_controller_ch_6_7_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.m0/traffic_controller_ch_6_7_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.m0/traffic_controller_ch_6_7_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.m0/traffic_controller_ch_6_7_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.m0/traffic_controller_ch_6_7_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.m0/traffic_controller_ch_6_7_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.syncResets} {FALSE};add_connection {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.rf_source} {traffic_controller_ch_6_7_avalon_universal_slave_0_agent_rsp_fifo.in} {avalon_streaming};add_connection {traffic_controller_ch_6_7_avalon_universal_slave_0_agent_rsp_fifo.out} {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.rf_sink} {avalon_streaming};add_connection {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.rdata_fifo_src} {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_003.src} {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_003.src/traffic_controller_ch_6_7_avalon_universal_slave_0_agent.cp} {qsys_mm.command};add_connection {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.m0} {traffic_controller_ch_8_9_avalon_universal_slave_0_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.m0/traffic_controller_ch_8_9_avalon_universal_slave_0_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.m0/traffic_controller_ch_8_9_avalon_universal_slave_0_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.m0/traffic_controller_ch_8_9_avalon_universal_slave_0_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.m0/traffic_controller_ch_8_9_avalon_universal_slave_0_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.m0/traffic_controller_ch_8_9_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.m0/traffic_controller_ch_8_9_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.clockCrossingAdapter} {HANDSHAKE};set_connection_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.m0/traffic_controller_ch_8_9_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.m0/traffic_controller_ch_8_9_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.m0/traffic_controller_ch_8_9_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.m0/traffic_controller_ch_8_9_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.m0/traffic_controller_ch_8_9_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.m0/traffic_controller_ch_8_9_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.m0/traffic_controller_ch_8_9_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.m0/traffic_controller_ch_8_9_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.syncResets} {FALSE};add_connection {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.rf_source} {traffic_controller_ch_8_9_avalon_universal_slave_0_agent_rsp_fifo.in} {avalon_streaming};add_connection {traffic_controller_ch_8_9_avalon_universal_slave_0_agent_rsp_fifo.out} {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.rf_sink} {avalon_streaming};add_connection {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.rdata_fifo_src} {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_004.src} {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_004.src/traffic_controller_ch_8_9_avalon_universal_slave_0_agent.cp} {qsys_mm.command};add_connection {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.m0} {traffic_controller_ch_10_11_avalon_universal_slave_0_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.m0/traffic_controller_ch_10_11_avalon_universal_slave_0_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.m0/traffic_controller_ch_10_11_avalon_universal_slave_0_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.m0/traffic_controller_ch_10_11_avalon_universal_slave_0_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.m0/traffic_controller_ch_10_11_avalon_universal_slave_0_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.m0/traffic_controller_ch_10_11_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.m0/traffic_controller_ch_10_11_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.clockCrossingAdapter} {HANDSHAKE};set_connection_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.m0/traffic_controller_ch_10_11_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.m0/traffic_controller_ch_10_11_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.m0/traffic_controller_ch_10_11_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.m0/traffic_controller_ch_10_11_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.m0/traffic_controller_ch_10_11_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.m0/traffic_controller_ch_10_11_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.m0/traffic_controller_ch_10_11_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.m0/traffic_controller_ch_10_11_avalon_universal_slave_0_translator.avalon_universal_slave_0} {qsys_mm.syncResets} {FALSE};add_connection {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.rf_source} {traffic_controller_ch_10_11_avalon_universal_slave_0_agent_rsp_fifo.in} {avalon_streaming};add_connection {traffic_controller_ch_10_11_avalon_universal_slave_0_agent_rsp_fifo.out} {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.rf_sink} {avalon_streaming};add_connection {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.rdata_fifo_src} {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_005.src} {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_005.src/traffic_controller_ch_10_11_avalon_universal_slave_0_agent.cp} {qsys_mm.command};add_connection {mm_clock_crossing_bridge_m0_agent.cp} {router.sink} {avalon_streaming};preview_set_connection_tag {mm_clock_crossing_bridge_m0_agent.cp/router.sink} {qsys_mm.command};add_connection {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.rp} {router_001.sink} {avalon_streaming};preview_set_connection_tag {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.rp/router_001.sink} {qsys_mm.response};add_connection {router_001.src} {rsp_demux.sink} {avalon_streaming};preview_set_connection_tag {router_001.src/rsp_demux.sink} {qsys_mm.response};add_connection {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.rp} {router_002.sink} {avalon_streaming};preview_set_connection_tag {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.rp/router_002.sink} {qsys_mm.response};add_connection {router_002.src} {rsp_demux_001.sink} {avalon_streaming};preview_set_connection_tag {router_002.src/rsp_demux_001.sink} {qsys_mm.response};add_connection {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.rp} {router_003.sink} {avalon_streaming};preview_set_connection_tag {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.rp/router_003.sink} {qsys_mm.response};add_connection {router_003.src} {rsp_demux_002.sink} {avalon_streaming};preview_set_connection_tag {router_003.src/rsp_demux_002.sink} {qsys_mm.response};add_connection {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.rp} {router_004.sink} {avalon_streaming};preview_set_connection_tag {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.rp/router_004.sink} {qsys_mm.response};add_connection {router_004.src} {rsp_demux_003.sink} {avalon_streaming};preview_set_connection_tag {router_004.src/rsp_demux_003.sink} {qsys_mm.response};add_connection {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.rp} {router_005.sink} {avalon_streaming};preview_set_connection_tag {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.rp/router_005.sink} {qsys_mm.response};add_connection {router_005.src} {rsp_demux_004.sink} {avalon_streaming};preview_set_connection_tag {router_005.src/rsp_demux_004.sink} {qsys_mm.response};add_connection {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.rp} {router_006.sink} {avalon_streaming};preview_set_connection_tag {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.rp/router_006.sink} {qsys_mm.response};add_connection {router_006.src} {rsp_demux_005.sink} {avalon_streaming};preview_set_connection_tag {router_006.src/rsp_demux_005.sink} {qsys_mm.response};add_connection {router.src} {mm_clock_crossing_bridge_m0_limiter.cmd_sink} {avalon_streaming};preview_set_connection_tag {router.src/mm_clock_crossing_bridge_m0_limiter.cmd_sink} {qsys_mm.command};add_connection {mm_clock_crossing_bridge_m0_limiter.cmd_src} {cmd_demux.sink} {avalon_streaming};preview_set_connection_tag {mm_clock_crossing_bridge_m0_limiter.cmd_src/cmd_demux.sink} {qsys_mm.command};add_connection {rsp_mux.src} {mm_clock_crossing_bridge_m0_limiter.rsp_sink} {avalon_streaming};preview_set_connection_tag {rsp_mux.src/mm_clock_crossing_bridge_m0_limiter.rsp_sink} {qsys_mm.response};add_connection {mm_clock_crossing_bridge_m0_limiter.rsp_src} {mm_clock_crossing_bridge_m0_agent.rp} {avalon_streaming};preview_set_connection_tag {mm_clock_crossing_bridge_m0_limiter.rsp_src/mm_clock_crossing_bridge_m0_agent.rp} {qsys_mm.response};add_connection {cmd_demux.src0} {cmd_mux.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.command};add_connection {cmd_demux.src1} {cmd_mux_001.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.command};add_connection {cmd_demux.src2} {cmd_mux_002.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.command};add_connection {cmd_demux.src3} {cmd_mux_003.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.command};add_connection {cmd_demux.src4} {cmd_mux_004.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src4/cmd_mux_004.sink0} {qsys_mm.command};add_connection {cmd_demux.src5} {cmd_mux_005.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src5/cmd_mux_005.sink0} {qsys_mm.command};add_connection {rsp_demux.src0} {rsp_mux.sink0} {avalon_streaming};preview_set_connection_tag {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.response};add_connection {rsp_demux_001.src0} {rsp_mux.sink1} {avalon_streaming};preview_set_connection_tag {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.response};add_connection {rsp_demux_002.src0} {rsp_mux.sink2} {avalon_streaming};preview_set_connection_tag {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.response};add_connection {rsp_demux_003.src0} {rsp_mux.sink3} {avalon_streaming};preview_set_connection_tag {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.response};add_connection {rsp_demux_004.src0} {rsp_mux.sink4} {avalon_streaming};preview_set_connection_tag {rsp_demux_004.src0/rsp_mux.sink4} {qsys_mm.response};add_connection {rsp_demux_005.src0} {rsp_mux.sink5} {avalon_streaming};preview_set_connection_tag {rsp_demux_005.src0/rsp_mux.sink5} {qsys_mm.response};add_connection {mm_clock_crossing_bridge_m0_limiter.cmd_valid} {cmd_demux.sink_valid} {avalon_streaming};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {mm_clock_crossing_bridge_m0_translator.reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {traffic_controller_ch_0_1_avalon_universal_slave_0_translator.reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {traffic_controller_ch_2_3_avalon_universal_slave_0_translator.reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {traffic_controller_ch_4_5_avalon_universal_slave_0_translator.reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {traffic_controller_ch_6_7_avalon_universal_slave_0_translator.reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {traffic_controller_ch_8_9_avalon_universal_slave_0_translator.reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {traffic_controller_ch_10_11_avalon_universal_slave_0_translator.reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {mm_clock_crossing_bridge_m0_agent.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {traffic_controller_ch_0_1_avalon_universal_slave_0_agent_rsp_fifo.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {traffic_controller_ch_2_3_avalon_universal_slave_0_agent_rsp_fifo.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {traffic_controller_ch_4_5_avalon_universal_slave_0_agent_rsp_fifo.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {traffic_controller_ch_6_7_avalon_universal_slave_0_agent_rsp_fifo.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {traffic_controller_ch_8_9_avalon_universal_slave_0_agent_rsp_fifo.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {traffic_controller_ch_10_11_avalon_universal_slave_0_agent_rsp_fifo.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {router.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {router_001.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {router_002.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {router_003.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {router_004.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {router_005.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {router_006.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {mm_clock_crossing_bridge_m0_limiter.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {cmd_demux.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {cmd_mux.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {cmd_mux_001.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {cmd_mux_002.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {cmd_mux_003.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {cmd_mux_004.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {cmd_mux_005.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {rsp_demux.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {rsp_demux_001.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {rsp_demux_002.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {rsp_demux_003.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {rsp_demux_004.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {rsp_demux_005.clk_reset} {reset};add_connection {mm_clock_crossing_bridge_m0_reset_reset_bridge.out_reset} {rsp_mux.clk_reset} {reset};add_connection {mac_clk_clk_clock_bridge.out_clk} {mm_clock_crossing_bridge_m0_translator.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {traffic_controller_ch_0_1_avalon_universal_slave_0_translator.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {traffic_controller_ch_2_3_avalon_universal_slave_0_translator.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {traffic_controller_ch_4_5_avalon_universal_slave_0_translator.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {traffic_controller_ch_6_7_avalon_universal_slave_0_translator.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {traffic_controller_ch_8_9_avalon_universal_slave_0_translator.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {traffic_controller_ch_10_11_avalon_universal_slave_0_translator.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {mm_clock_crossing_bridge_m0_agent.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {traffic_controller_ch_0_1_avalon_universal_slave_0_agent.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {traffic_controller_ch_0_1_avalon_universal_slave_0_agent_rsp_fifo.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {traffic_controller_ch_2_3_avalon_universal_slave_0_agent.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {traffic_controller_ch_2_3_avalon_universal_slave_0_agent_rsp_fifo.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {traffic_controller_ch_4_5_avalon_universal_slave_0_agent.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {traffic_controller_ch_4_5_avalon_universal_slave_0_agent_rsp_fifo.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {traffic_controller_ch_6_7_avalon_universal_slave_0_agent.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {traffic_controller_ch_6_7_avalon_universal_slave_0_agent_rsp_fifo.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {traffic_controller_ch_8_9_avalon_universal_slave_0_agent.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {traffic_controller_ch_8_9_avalon_universal_slave_0_agent_rsp_fifo.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {traffic_controller_ch_10_11_avalon_universal_slave_0_agent.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {traffic_controller_ch_10_11_avalon_universal_slave_0_agent_rsp_fifo.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {router.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {router_001.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {router_002.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {router_003.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {router_004.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {router_005.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {router_006.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {mm_clock_crossing_bridge_m0_limiter.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {cmd_demux.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {rsp_mux.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {cmd_mux.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {rsp_demux.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {cmd_mux_001.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {rsp_demux_001.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {cmd_mux_002.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {rsp_demux_002.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {cmd_mux_003.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {rsp_demux_003.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {cmd_mux_004.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {rsp_demux_004.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {cmd_mux_005.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {rsp_demux_005.clk} {clock};add_connection {mac_clk_clk_clock_bridge.out_clk} {mm_clock_crossing_bridge_m0_reset_reset_bridge.clk} {clock};add_interface {mm_clock_crossing_bridge_m0} {avalon} {slave};set_interface_property {mm_clock_crossing_bridge_m0} {EXPORT_OF} {mm_clock_crossing_bridge_m0_translator.avalon_anti_master_0};add_interface {traffic_controller_ch_0_1_avalon_universal_slave_0} {avalon} {master};set_interface_property {traffic_controller_ch_0_1_avalon_universal_slave_0} {EXPORT_OF} {traffic_controller_ch_0_1_avalon_universal_slave_0_translator.avalon_anti_slave_0};add_interface {traffic_controller_ch_2_3_avalon_universal_slave_0} {avalon} {master};set_interface_property {traffic_controller_ch_2_3_avalon_universal_slave_0} {EXPORT_OF} {traffic_controller_ch_2_3_avalon_universal_slave_0_translator.avalon_anti_slave_0};add_interface {traffic_controller_ch_4_5_avalon_universal_slave_0} {avalon} {master};set_interface_property {traffic_controller_ch_4_5_avalon_universal_slave_0} {EXPORT_OF} {traffic_controller_ch_4_5_avalon_universal_slave_0_translator.avalon_anti_slave_0};add_interface {traffic_controller_ch_6_7_avalon_universal_slave_0} {avalon} {master};set_interface_property {traffic_controller_ch_6_7_avalon_universal_slave_0} {EXPORT_OF} {traffic_controller_ch_6_7_avalon_universal_slave_0_translator.avalon_anti_slave_0};add_interface {traffic_controller_ch_8_9_avalon_universal_slave_0} {avalon} {master};set_interface_property {traffic_controller_ch_8_9_avalon_universal_slave_0} {EXPORT_OF} {traffic_controller_ch_8_9_avalon_universal_slave_0_translator.avalon_anti_slave_0};add_interface {traffic_controller_ch_10_11_avalon_universal_slave_0} {avalon} {master};set_interface_property {traffic_controller_ch_10_11_avalon_universal_slave_0} {EXPORT_OF} {traffic_controller_ch_10_11_avalon_universal_slave_0_translator.avalon_anti_slave_0};add_interface {mm_clock_crossing_bridge_m0_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {mm_clock_crossing_bridge_m0_reset_reset_bridge_in_reset} {EXPORT_OF} {mm_clock_crossing_bridge_m0_reset_reset_bridge.in_reset};add_interface {mac_clk_clk} {clock} {slave};set_interface_property {mac_clk_clk} {EXPORT_OF} {mac_clk_clk_clock_bridge.in_clk};set_module_assignment {interconnect_id.mm_clock_crossing_bridge.m0} {0};set_module_assignment {interconnect_id.traffic_controller_ch_0_1.avalon_universal_slave_0} {0};set_module_assignment {interconnect_id.traffic_controller_ch_10_11.avalon_universal_slave_0} {1};set_module_assignment {interconnect_id.traffic_controller_ch_2_3.avalon_universal_slave_0} {2};set_module_assignment {interconnect_id.traffic_controller_ch_4_5.avalon_universal_slave_0} {3};set_module_assignment {interconnect_id.traffic_controller_ch_6_7.avalon_universal_slave_0} {4};set_module_assignment {interconnect_id.traffic_controller_ch_8_9.avalon_universal_slave_0} {5};" />
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_mm_interconnect_191\synth\address_decoder_top_altera_mm_interconnect_191_fv6bu5i.v"
       attributes="CONTAINS_INLINE_CONFIGURATION" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_mm_interconnect_191\synth\address_decoder_top_altera_mm_interconnect_191_fv6bu5i.v"
       attributes="CONTAINS_INLINE_CONFIGURATION" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
  </sourceFiles>
  <childSourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_master_agent/altera_merlin_master_agent_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_traffic_limiter/altera_merlin_traffic_limiter_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/iconnect/alt_hiconnect_sc_fifo/alt_hiconnect_sc_fifo_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
  </childSourceFiles>
  <instantiator instantiator="address_decoder_top" as="mm_interconnect_1" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_mm_interconnect_191_fv6bu5i"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_master_translator_191_g7h47bq"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_slave_translator_191_x56fcki"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_master_agent_191_mpbm6tq"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_slave_agent_191_ncfkfri"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_avalon_sc_fifo_191_e5eqkcq"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_router_191_oyu3via"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_router_191_eyt5dgy"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_traffic_limiter_191_kcba44q"</message>
   <message level="Info" culprit="my_altera_avalon_sc_fifo_dest_id_fifo">"Generating: my_altera_avalon_sc_fifo_dest_id_fifo"</message>
   <message level="Info" culprit="my_alt_hiconnect_sc_fifo_dest_id_fifo">"Generating: my_alt_hiconnect_sc_fifo_dest_id_fifo"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_traffic_limiter_altera_avalon_sc_fifo_191_zonrf6q"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_avalon_sc_fifo_191_e5eqkcq"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_traffic_limiter_alt_hiconnect_sc_fifo_191_5pm2ohi"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_alt_hiconnect_sc_fifo_191_7qtmpqq"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_demultiplexer_191_mkj5isy"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_multiplexer_191_hdlfwfy"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_demultiplexer_191_s3vmtaa"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_multiplexer_191_hkbv22i"</message>
  </messages>
 </entity>
 <entity
   kind="altera_reset_controller"
   version="19.1"
   name="altera_reset_controller">
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_reset_controller_191\synth\altera_reset_controller.v"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_reset_controller_191\synth\altera_reset_synchronizer.v"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_reset_controller_191\synth\altera_reset_controller.sdc"
       attributes="NO_AUTO_INSTANCE_DISCOVERY NO_SDC_PROMOTION" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_reset_controller_191\synth\altera_reset_controller.v"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_reset_controller_191\synth\altera_reset_synchronizer.v"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_reset_controller_191\synth\altera_reset_controller.sdc"
       attributes="NO_AUTO_INSTANCE_DISCOVERY NO_SDC_PROMOTION" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_reset_controller/altera_reset_controller_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="address_decoder_top"
     as="rst_controller,rst_controller_001" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: altera_reset_controller"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_master_translator"
   version="19.1"
   name="address_decoder_top_altera_merlin_master_translator_191_g7h47bq">
  <parameter name="WAITREQUEST_ALLOWANCE" value="0" />
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_master_translator_191\synth\address_decoder_top_altera_merlin_master_translator_191_g7h47bq.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_master_translator_191\synth\address_decoder_top_altera_merlin_master_translator_191_g7h47bq.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_3kbf4ri"
     as="master_avalon_universal_master_0_translator" />
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_fv6bu5i"
     as="mm_clock_crossing_bridge_m0_translator" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_master_translator_191_g7h47bq"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_slave_translator"
   version="19.1"
   name="address_decoder_top_altera_merlin_slave_translator_191_x56fcki">
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_slave_translator_191\synth\address_decoder_top_altera_merlin_slave_translator_191_x56fcki.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_slave_translator_191\synth\address_decoder_top_altera_merlin_slave_translator_191_x56fcki.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_3kbf4ri"
     as="multi_channel_avalon_universal_slave_0_translator,mm_clock_crossing_bridge_s0_translator" />
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_fv6bu5i"
     as="traffic_controller_ch_0_1_avalon_universal_slave_0_translator,traffic_controller_ch_2_3_avalon_universal_slave_0_translator,traffic_controller_ch_4_5_avalon_universal_slave_0_translator,traffic_controller_ch_6_7_avalon_universal_slave_0_translator,traffic_controller_ch_8_9_avalon_universal_slave_0_translator,traffic_controller_ch_10_11_avalon_universal_slave_0_translator" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_slave_translator_191_x56fcki"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_master_agent"
   version="19.1"
   name="address_decoder_top_altera_merlin_master_agent_191_mpbm6tq">
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_master_agent_191\synth\address_decoder_top_altera_merlin_master_agent_191_mpbm6tq.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_master_agent_191\synth\address_decoder_top_altera_merlin_master_agent_191_mpbm6tq.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_master_agent/altera_merlin_master_agent_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_3kbf4ri"
     as="master_avalon_universal_master_0_agent" />
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_fv6bu5i"
     as="mm_clock_crossing_bridge_m0_agent" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_master_agent_191_mpbm6tq"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_slave_agent"
   version="19.1"
   name="address_decoder_top_altera_merlin_slave_agent_191_ncfkfri">
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_slave_agent_191\synth\address_decoder_top_altera_merlin_slave_agent_191_ncfkfri.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_slave_agent_191\synth\altera_merlin_burst_uncompressor.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_slave_agent_191\synth\address_decoder_top_altera_merlin_slave_agent_191_ncfkfri.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_slave_agent_191\synth\altera_merlin_burst_uncompressor.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_3kbf4ri"
     as="multi_channel_avalon_universal_slave_0_agent,mm_clock_crossing_bridge_s0_agent" />
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_fv6bu5i"
     as="traffic_controller_ch_0_1_avalon_universal_slave_0_agent,traffic_controller_ch_2_3_avalon_universal_slave_0_agent,traffic_controller_ch_4_5_avalon_universal_slave_0_agent,traffic_controller_ch_6_7_avalon_universal_slave_0_agent,traffic_controller_ch_8_9_avalon_universal_slave_0_agent,traffic_controller_ch_10_11_avalon_universal_slave_0_agent" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_slave_agent_191_ncfkfri"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_router"
   version="19.1"
   name="address_decoder_top_altera_merlin_router_191_fwgsesi">
  <parameter name="ST_CHANNEL_W" value="2" />
  <parameter name="DEFAULT_WR_CHANNEL" value="-1" />
  <parameter name="PKT_TRANS_READ" value="71" />
  <parameter name="START_ADDRESS" value="0x0,0x100000" />
  <parameter name="DEFAULT_CHANNEL" value="0" />
  <parameter name="MEMORY_ALIASING_DECODE" value="0" />
  <parameter name="HAS_USER_DEFAULT_SLAVE" value="0" />
  <parameter
     name="SLAVES_INFO"
     value="1:01:0x0:0x100000:both:1:0:0:1,0:10:0x100000:0x120000:both:1:0:0:1" />
  <parameter name="DEFAULT_RD_CHANNEL" value="-1" />
  <parameter name="PKT_ADDR_H" value="67" />
  <parameter name="PKT_DEST_ID_H" value="88" />
  <parameter name="PKT_ADDR_L" value="36" />
  <parameter name="PKT_DEST_ID_L" value="88" />
  <parameter name="CHANNEL_ID" value="01,10" />
  <parameter name="TYPE_OF_TRANSACTION" value="both,both" />
  <parameter name="SECURED_RANGE_PAIRS" value="0,0" />
  <parameter name="SPAN_OFFSET" value="" />
  <parameter name="ST_DATA_W" value="111" />
  <parameter name="SECURED_RANGE_LIST" value="0,0" />
  <parameter name="DECODER_TYPE" value="0" />
  <parameter name="PKT_PROTECTION_H" value="92" />
  <parameter name="END_ADDRESS" value="0x100000,0x120000" />
  <parameter name="PKT_PROTECTION_L" value="90" />
  <parameter name="PKT_TRANS_WRITE" value="70" />
  <parameter name="DEFAULT_DESTID" value="1" />
  <parameter name="DESTINATION_ID" value="1,0" />
  <parameter name="NON_SECURED_TAG" value="1,1" />
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_router_191\synth\address_decoder_top_altera_merlin_router_191_fwgsesi.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_router_191\synth\address_decoder_top_altera_merlin_router_191_fwgsesi.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_3kbf4ri"
     as="router" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_router_191_fwgsesi"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_router"
   version="19.1"
   name="address_decoder_top_altera_merlin_router_191_eo734fy">
  <parameter name="ST_CHANNEL_W" value="2" />
  <parameter name="DEFAULT_WR_CHANNEL" value="-1" />
  <parameter name="PKT_TRANS_READ" value="71" />
  <parameter name="START_ADDRESS" value="0x0" />
  <parameter name="DEFAULT_CHANNEL" value="0" />
  <parameter name="MEMORY_ALIASING_DECODE" value="0" />
  <parameter name="HAS_USER_DEFAULT_SLAVE" value="0" />
  <parameter name="SLAVES_INFO" value="0:1:0x0:0x0:both:1:0:0:1" />
  <parameter name="DEFAULT_RD_CHANNEL" value="-1" />
  <parameter name="PKT_ADDR_H" value="67" />
  <parameter name="PKT_DEST_ID_H" value="88" />
  <parameter name="PKT_ADDR_L" value="36" />
  <parameter name="PKT_DEST_ID_L" value="88" />
  <parameter name="CHANNEL_ID" value="1" />
  <parameter name="TYPE_OF_TRANSACTION" value="both" />
  <parameter name="SECURED_RANGE_PAIRS" value="0" />
  <parameter name="SPAN_OFFSET" value="" />
  <parameter name="ST_DATA_W" value="111" />
  <parameter name="SECURED_RANGE_LIST" value="0" />
  <parameter name="DECODER_TYPE" value="1" />
  <parameter name="PKT_PROTECTION_H" value="92" />
  <parameter name="END_ADDRESS" value="0x0" />
  <parameter name="PKT_PROTECTION_L" value="90" />
  <parameter name="PKT_TRANS_WRITE" value="70" />
  <parameter name="DEFAULT_DESTID" value="0" />
  <parameter name="DESTINATION_ID" value="0" />
  <parameter name="NON_SECURED_TAG" value="1" />
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_router_191\synth\address_decoder_top_altera_merlin_router_191_eo734fy.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_router_191\synth\address_decoder_top_altera_merlin_router_191_eo734fy.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_3kbf4ri"
     as="router_001,router_002" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_router_191_eo734fy"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_demultiplexer"
   version="19.1"
   name="address_decoder_top_altera_merlin_demultiplexer_191_cvl73xa">
  <parameter name="ST_CHANNEL_W" value="2" />
  <parameter name="AUTO_CLK_CLOCK_RATE" value="125000000" />
  <parameter name="VALID_WIDTH" value="1" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Stratix 10" />
  <parameter name="ST_DATA_W" value="111" />
  <parameter name="NUM_OUTPUTS" value="2" />
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_demultiplexer_191\synth\address_decoder_top_altera_merlin_demultiplexer_191_cvl73xa.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_demultiplexer_191\synth\address_decoder_top_altera_merlin_demultiplexer_191_cvl73xa.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_3kbf4ri"
     as="cmd_demux" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_demultiplexer_191_cvl73xa"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_multiplexer"
   version="19.1"
   name="address_decoder_top_altera_merlin_multiplexer_191_mbb35ky">
  <parameter name="ST_CHANNEL_W" value="2" />
  <parameter name="ARBITRATION_SHARES" value="1" />
  <parameter name="NUM_INPUTS" value="1" />
  <parameter name="PIPELINE_ARB" value="1" />
  <parameter name="ARBITRATION_SCHEME" value="round-robin" />
  <parameter name="ST_DATA_W" value="111" />
  <parameter name="USE_EXTERNAL_ARB" value="0" />
  <parameter name="PKT_TRANS_LOCK" value="72" />
  <parameter name="SYNC_RESET" value="0" />
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_multiplexer_191\synth\address_decoder_top_altera_merlin_multiplexer_191_mbb35ky.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_multiplexer_191\synth\altera_merlin_arbitrator.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_multiplexer_191\synth\address_decoder_top_altera_merlin_multiplexer_191_mbb35ky.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_multiplexer_191\synth\altera_merlin_arbitrator.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_3kbf4ri"
     as="cmd_mux,cmd_mux_001" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_multiplexer_191_mbb35ky"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_demultiplexer"
   version="19.1"
   name="address_decoder_top_altera_merlin_demultiplexer_191_6ywz4pa">
  <parameter name="ST_CHANNEL_W" value="2" />
  <parameter name="AUTO_CLK_CLOCK_RATE" value="125000000" />
  <parameter name="VALID_WIDTH" value="1" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Stratix 10" />
  <parameter name="ST_DATA_W" value="111" />
  <parameter name="NUM_OUTPUTS" value="1" />
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_demultiplexer_191\synth\address_decoder_top_altera_merlin_demultiplexer_191_6ywz4pa.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_demultiplexer_191\synth\address_decoder_top_altera_merlin_demultiplexer_191_6ywz4pa.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_3kbf4ri"
     as="rsp_demux,rsp_demux_001" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_demultiplexer_191_6ywz4pa"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_multiplexer"
   version="19.1"
   name="address_decoder_top_altera_merlin_multiplexer_191_drzivnq">
  <parameter name="ST_CHANNEL_W" value="2" />
  <parameter name="ARBITRATION_SHARES" value="1,1" />
  <parameter name="NUM_INPUTS" value="2" />
  <parameter name="PIPELINE_ARB" value="0" />
  <parameter name="ARBITRATION_SCHEME" value="no-arb" />
  <parameter name="ST_DATA_W" value="111" />
  <parameter name="USE_EXTERNAL_ARB" value="0" />
  <parameter name="PKT_TRANS_LOCK" value="72" />
  <parameter name="SYNC_RESET" value="0" />
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_multiplexer_191\synth\address_decoder_top_altera_merlin_multiplexer_191_drzivnq.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_multiplexer_191\synth\altera_merlin_arbitrator.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_multiplexer_191\synth\address_decoder_top_altera_merlin_multiplexer_191_drzivnq.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_multiplexer_191\synth\altera_merlin_arbitrator.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_3kbf4ri"
     as="rsp_mux" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_multiplexer_191_drzivnq"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_router"
   version="19.1"
   name="address_decoder_top_altera_merlin_router_191_oyu3via">
  <parameter name="ST_CHANNEL_W" value="6" />
  <parameter name="DEFAULT_WR_CHANNEL" value="-1" />
  <parameter name="PKT_TRANS_READ" value="56" />
  <parameter name="START_ADDRESS" value="0x0,0x4000,0x8000,0xc000,0x10000,0x14000" />
  <parameter name="DEFAULT_CHANNEL" value="0" />
  <parameter name="MEMORY_ALIASING_DECODE" value="0" />
  <parameter name="HAS_USER_DEFAULT_SLAVE" value="0" />
  <parameter
     name="SLAVES_INFO"
     value="0:000001:0x0:0x4000:both:1:0:0:1,2:000010:0x4000:0x8000:both:1:0:0:1,3:000100:0x8000:0xc000:both:1:0:0:1,4:001000:0xc000:0x10000:both:1:0:0:1,5:010000:0x10000:0x14000:both:1:0:0:1,1:100000:0x14000:0x18000:both:1:0:0:1" />
  <parameter name="DEFAULT_RD_CHANNEL" value="-1" />
  <parameter name="PKT_ADDR_H" value="52" />
  <parameter name="PKT_DEST_ID_H" value="77" />
  <parameter name="PKT_ADDR_L" value="36" />
  <parameter name="PKT_DEST_ID_L" value="75" />
  <parameter name="CHANNEL_ID" value="000001,000010,000100,001000,010000,100000" />
  <parameter name="TYPE_OF_TRANSACTION" value="both,both,both,both,both,both" />
  <parameter name="SECURED_RANGE_PAIRS" value="0,0,0,0,0,0" />
  <parameter name="SPAN_OFFSET" value="" />
  <parameter name="ST_DATA_W" value="100" />
  <parameter name="SECURED_RANGE_LIST" value="0,0,0,0,0,0" />
  <parameter name="DECODER_TYPE" value="0" />
  <parameter name="PKT_PROTECTION_H" value="81" />
  <parameter
     name="END_ADDRESS"
     value="0x4000,0x8000,0xc000,0x10000,0x14000,0x18000" />
  <parameter name="PKT_PROTECTION_L" value="79" />
  <parameter name="PKT_TRANS_WRITE" value="55" />
  <parameter name="DEFAULT_DESTID" value="0" />
  <parameter name="DESTINATION_ID" value="0,2,3,4,5,1" />
  <parameter name="NON_SECURED_TAG" value="1,1,1,1,1,1" />
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_router_191\synth\address_decoder_top_altera_merlin_router_191_oyu3via.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_router_191\synth\address_decoder_top_altera_merlin_router_191_oyu3via.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_fv6bu5i"
     as="router" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_router_191_oyu3via"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_router"
   version="19.1"
   name="address_decoder_top_altera_merlin_router_191_eyt5dgy">
  <parameter name="ST_CHANNEL_W" value="6" />
  <parameter name="DEFAULT_WR_CHANNEL" value="-1" />
  <parameter name="PKT_TRANS_READ" value="56" />
  <parameter name="START_ADDRESS" value="0x0" />
  <parameter name="DEFAULT_CHANNEL" value="0" />
  <parameter name="MEMORY_ALIASING_DECODE" value="0" />
  <parameter name="HAS_USER_DEFAULT_SLAVE" value="0" />
  <parameter name="SLAVES_INFO" value="0:1:0x0:0x0:both:1:0:0:1" />
  <parameter name="DEFAULT_RD_CHANNEL" value="-1" />
  <parameter name="PKT_ADDR_H" value="52" />
  <parameter name="PKT_DEST_ID_H" value="77" />
  <parameter name="PKT_ADDR_L" value="36" />
  <parameter name="PKT_DEST_ID_L" value="75" />
  <parameter name="CHANNEL_ID" value="1" />
  <parameter name="TYPE_OF_TRANSACTION" value="both" />
  <parameter name="SECURED_RANGE_PAIRS" value="0" />
  <parameter name="SPAN_OFFSET" value="" />
  <parameter name="ST_DATA_W" value="100" />
  <parameter name="SECURED_RANGE_LIST" value="0" />
  <parameter name="DECODER_TYPE" value="1" />
  <parameter name="PKT_PROTECTION_H" value="81" />
  <parameter name="END_ADDRESS" value="0x0" />
  <parameter name="PKT_PROTECTION_L" value="79" />
  <parameter name="PKT_TRANS_WRITE" value="55" />
  <parameter name="DEFAULT_DESTID" value="0" />
  <parameter name="DESTINATION_ID" value="0" />
  <parameter name="NON_SECURED_TAG" value="1" />
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_router_191\synth\address_decoder_top_altera_merlin_router_191_eyt5dgy.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_router_191\synth\address_decoder_top_altera_merlin_router_191_eyt5dgy.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_fv6bu5i"
     as="router_001,router_002,router_003,router_004,router_005,router_006" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_router_191_eyt5dgy"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_traffic_limiter"
   version="19.1"
   name="address_decoder_top_altera_merlin_traffic_limiter_191_kcba44q">
  <parameter name="SYNC_RESET" value="0" />
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_traffic_limiter_191\synth\altera_merlin_reorder_memory.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_traffic_limiter_191\synth\altera_avalon_st_pipeline_base.v"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_traffic_limiter_191\synth\address_decoder_top_altera_merlin_traffic_limiter_191_kcba44q.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_traffic_limiter_191\synth\altera_merlin_reorder_memory.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_traffic_limiter_191\synth\altera_avalon_st_pipeline_base.v"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_traffic_limiter_191\synth\address_decoder_top_altera_merlin_traffic_limiter_191_kcba44q.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_traffic_limiter/altera_merlin_traffic_limiter_hw.tcl" />
  </sourceFiles>
  <childSourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
   <file
       path="J:/programme/quartus/ip/altera/iconnect/alt_hiconnect_sc_fifo/alt_hiconnect_sc_fifo_hw.tcl" />
  </childSourceFiles>
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_fv6bu5i"
     as="mm_clock_crossing_bridge_m0_limiter" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_traffic_limiter_191_kcba44q"</message>
   <message level="Info" culprit="my_altera_avalon_sc_fifo_dest_id_fifo">"Generating: my_altera_avalon_sc_fifo_dest_id_fifo"</message>
   <message level="Info" culprit="my_alt_hiconnect_sc_fifo_dest_id_fifo">"Generating: my_alt_hiconnect_sc_fifo_dest_id_fifo"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_traffic_limiter_altera_avalon_sc_fifo_191_zonrf6q"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_avalon_sc_fifo_191_e5eqkcq"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_traffic_limiter_alt_hiconnect_sc_fifo_191_5pm2ohi"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_alt_hiconnect_sc_fifo_191_7qtmpqq"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_demultiplexer"
   version="19.1"
   name="address_decoder_top_altera_merlin_demultiplexer_191_mkj5isy">
  <parameter name="ST_CHANNEL_W" value="6" />
  <parameter name="AUTO_CLK_CLOCK_RATE" value="156250000" />
  <parameter name="VALID_WIDTH" value="6" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Stratix 10" />
  <parameter name="ST_DATA_W" value="100" />
  <parameter name="NUM_OUTPUTS" value="6" />
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_demultiplexer_191\synth\address_decoder_top_altera_merlin_demultiplexer_191_mkj5isy.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_demultiplexer_191\synth\address_decoder_top_altera_merlin_demultiplexer_191_mkj5isy.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_fv6bu5i"
     as="cmd_demux" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_demultiplexer_191_mkj5isy"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_multiplexer"
   version="19.1"
   name="address_decoder_top_altera_merlin_multiplexer_191_hdlfwfy">
  <parameter name="ST_CHANNEL_W" value="6" />
  <parameter name="ARBITRATION_SHARES" value="1" />
  <parameter name="NUM_INPUTS" value="1" />
  <parameter name="PIPELINE_ARB" value="1" />
  <parameter name="ARBITRATION_SCHEME" value="round-robin" />
  <parameter name="ST_DATA_W" value="100" />
  <parameter name="USE_EXTERNAL_ARB" value="0" />
  <parameter name="PKT_TRANS_LOCK" value="57" />
  <parameter name="SYNC_RESET" value="0" />
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_multiplexer_191\synth\address_decoder_top_altera_merlin_multiplexer_191_hdlfwfy.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_multiplexer_191\synth\altera_merlin_arbitrator.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_multiplexer_191\synth\address_decoder_top_altera_merlin_multiplexer_191_hdlfwfy.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_multiplexer_191\synth\altera_merlin_arbitrator.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_fv6bu5i"
     as="cmd_mux,cmd_mux_001,cmd_mux_002,cmd_mux_003,cmd_mux_004,cmd_mux_005" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_multiplexer_191_hdlfwfy"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_demultiplexer"
   version="19.1"
   name="address_decoder_top_altera_merlin_demultiplexer_191_s3vmtaa">
  <parameter name="ST_CHANNEL_W" value="6" />
  <parameter name="AUTO_CLK_CLOCK_RATE" value="156250000" />
  <parameter name="VALID_WIDTH" value="1" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Stratix 10" />
  <parameter name="ST_DATA_W" value="100" />
  <parameter name="NUM_OUTPUTS" value="1" />
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_demultiplexer_191\synth\address_decoder_top_altera_merlin_demultiplexer_191_s3vmtaa.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_demultiplexer_191\synth\address_decoder_top_altera_merlin_demultiplexer_191_s3vmtaa.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_fv6bu5i"
     as="rsp_demux,rsp_demux_001,rsp_demux_002,rsp_demux_003,rsp_demux_004,rsp_demux_005" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_demultiplexer_191_s3vmtaa"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_multiplexer"
   version="19.1"
   name="address_decoder_top_altera_merlin_multiplexer_191_hkbv22i">
  <parameter name="ST_CHANNEL_W" value="6" />
  <parameter name="ARBITRATION_SHARES" value="1,1,1,1,1,1" />
  <parameter name="NUM_INPUTS" value="6" />
  <parameter name="PIPELINE_ARB" value="0" />
  <parameter name="ARBITRATION_SCHEME" value="no-arb" />
  <parameter name="ST_DATA_W" value="100" />
  <parameter name="USE_EXTERNAL_ARB" value="0" />
  <parameter name="PKT_TRANS_LOCK" value="57" />
  <parameter name="SYNC_RESET" value="0" />
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_multiplexer_191\synth\address_decoder_top_altera_merlin_multiplexer_191_hkbv22i.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_multiplexer_191\synth\altera_merlin_arbitrator.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_multiplexer_191\synth\address_decoder_top_altera_merlin_multiplexer_191_hkbv22i.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_multiplexer_191\synth\altera_merlin_arbitrator.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_fv6bu5i"
     as="rsp_mux" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_multiplexer_191_hkbv22i"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_traffic_limiter_altera_avalon_sc_fifo"
   version="19.1"
   name="address_decoder_top_altera_merlin_traffic_limiter_altera_avalon_sc_fifo_191_zonrf6q">
  <parameter name="FIFO_DEPTH" value="2" />
  <parameter name="USE_PACKETS" value="0" />
  <parameter name="EMPTY_LATENCY" value="1" />
  <parameter name="EXPLICIT_MAXCHANNEL" value="0" />
  <parameter name="EMPTY_WIDTH" value="1" />
  <parameter name="CHANNEL_WIDTH" value="0" />
  <parameter name="USE_ALMOST_FULL_IF" value="0" />
  <parameter name="ENABLE_EXPLICIT_MAXCHANNEL" value="false" />
  <parameter name="SYMBOLS_PER_BEAT" value="1" />
  <parameter name="BITS_PER_SYMBOL" value="3" />
  <parameter name="ERROR_WIDTH" value="0" />
  <parameter name="USE_MEMORY_BLOCKS" value="0" />
  <parameter name="USE_FILL_LEVEL" value="0" />
  <parameter name="USE_ALMOST_EMPTY_IF" value="0" />
  <parameter name="SYNC_RESET" value="0" />
  <parameter name="USE_STORE_FORWARD" value="0" />
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_traffic_limiter_191\synth\address_decoder_top_altera_merlin_traffic_limiter_altera_avalon_sc_fifo_191_zonrf6q.vhd"
       attributes="CONTAINS_INLINE_CONFIGURATION" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_traffic_limiter_191\synth\address_decoder_top_altera_merlin_traffic_limiter_altera_avalon_sc_fifo_191_zonrf6q.vhd"
       attributes="CONTAINS_INLINE_CONFIGURATION" />
  </childGeneratedFiles>
  <sourceFiles/>
  <childSourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
  </childSourceFiles>
  <instantiator
     instantiator="address_decoder_top_altera_merlin_traffic_limiter_191_kcba44q"
     as="my_altera_avalon_sc_fifo_dest_id_fifo" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_traffic_limiter_altera_avalon_sc_fifo_191_zonrf6q"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_avalon_sc_fifo_191_e5eqkcq"</message>
  </messages>
 </entity>
 <entity
   kind="altera_avalon_sc_fifo"
   version="19.1"
   name="address_decoder_top_altera_avalon_sc_fifo_191_e5eqkcq">
  <parameter name="EXPLICIT_MAXCHANNEL" value="0" />
  <parameter name="EMPTY_WIDTH" value="1" />
  <parameter name="SYNC_RESET" value="0" />
  <parameter name="ENABLE_EXPLICIT_MAXCHANNEL" value="false" />
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_avalon_sc_fifo_191\synth\address_decoder_top_altera_avalon_sc_fifo_191_e5eqkcq.v"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_avalon_sc_fifo_191\synth\address_decoder_top_altera_avalon_sc_fifo_191_e5eqkcq.v"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_3kbf4ri"
     as="multi_channel_avalon_universal_slave_0_agent_rsp_fifo,mm_clock_crossing_bridge_s0_agent_rsp_fifo" />
  <instantiator
     instantiator="address_decoder_top_altera_mm_interconnect_191_fv6bu5i"
     as="traffic_controller_ch_0_1_avalon_universal_slave_0_agent_rsp_fifo,traffic_controller_ch_2_3_avalon_universal_slave_0_agent_rsp_fifo,traffic_controller_ch_4_5_avalon_universal_slave_0_agent_rsp_fifo,traffic_controller_ch_6_7_avalon_universal_slave_0_agent_rsp_fifo,traffic_controller_ch_8_9_avalon_universal_slave_0_agent_rsp_fifo,traffic_controller_ch_10_11_avalon_universal_slave_0_agent_rsp_fifo" />
  <instantiator
     instantiator="address_decoder_top_altera_merlin_traffic_limiter_altera_avalon_sc_fifo_191_zonrf6q"
     as="my_altera_avalon_sc_fifo_dest_id_fifo" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_avalon_sc_fifo_191_e5eqkcq"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_traffic_limiter_alt_hiconnect_sc_fifo"
   version="19.1"
   name="address_decoder_top_altera_merlin_traffic_limiter_alt_hiconnect_sc_fifo_191_5pm2ohi">
  <parameter name="IMPL" value="reg" />
  <parameter name="FIFO_DEPTH" value="2" />
  <parameter name="USE_PACKETS" value="0" />
  <parameter name="EMPTY_LATENCY" value="1" />
  <parameter name="ENABLE_POP" value="false" />
  <parameter name="EXPLICIT_MAXCHANNEL" value="0" />
  <parameter name="ALMOST_FULL_THRESHOLD" value="2" />
  <parameter name="CHANNEL_WIDTH" value="0" />
  <parameter name="ENABLE_EXPLICIT_MAXCHANNEL" value="false" />
  <parameter name="ENABLE_STOP" value="false" />
  <parameter name="SYMBOLS_PER_BEAT" value="1" />
  <parameter name="BITS_PER_SYMBOL" value="3" />
  <parameter name="ERROR_WIDTH" value="0" />
  <parameter name="SHOWAHEAD" value="1" />
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_traffic_limiter_191\synth\address_decoder_top_altera_merlin_traffic_limiter_alt_hiconnect_sc_fifo_191_5pm2ohi.vhd"
       attributes="CONTAINS_INLINE_CONFIGURATION" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\altera_merlin_traffic_limiter_191\synth\address_decoder_top_altera_merlin_traffic_limiter_alt_hiconnect_sc_fifo_191_5pm2ohi.vhd"
       attributes="CONTAINS_INLINE_CONFIGURATION" />
  </childGeneratedFiles>
  <sourceFiles/>
  <childSourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/iconnect/alt_hiconnect_sc_fifo/alt_hiconnect_sc_fifo_hw.tcl" />
  </childSourceFiles>
  <instantiator
     instantiator="address_decoder_top_altera_merlin_traffic_limiter_191_kcba44q"
     as="my_alt_hiconnect_sc_fifo_dest_id_fifo" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_altera_merlin_traffic_limiter_alt_hiconnect_sc_fifo_191_5pm2ohi"</message>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_alt_hiconnect_sc_fifo_191_7qtmpqq"</message>
  </messages>
 </entity>
 <entity
   kind="alt_hiconnect_sc_fifo"
   version="19.1"
   name="address_decoder_top_alt_hiconnect_sc_fifo_191_7qtmpqq">
  <parameter name="ENABLE_STOP" value="false" />
  <parameter name="ENABLE_POP" value="false" />
  <parameter name="EXPLICIT_MAXCHANNEL" value="0" />
  <parameter name="ENABLE_EXPLICIT_MAXCHANNEL" value="false" />
  <generatedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\alt_hiconnect_sc_fifo_191\synth\address_decoder_top_alt_hiconnect_sc_fifo_191_7qtmpqq.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\alt_hiconnect_sc_fifo_191\synth\alt_st_infer_scfifo.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\alt_hiconnect_sc_fifo_191\synth\alt_st_mlab_scfifo.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\alt_hiconnect_sc_fifo_191\synth\alt_st_fifo_empty.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\alt_hiconnect_sc_fifo_191\synth\alt_st_mlab_scfifo_a6.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\alt_hiconnect_sc_fifo_191\synth\alt_st_mlab_scfifo_a7.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\alt_hiconnect_sc_fifo_191\synth\alt_st_reg_scfifo.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\alt_hiconnect_sc_fifo_191\synth\address_decoder_top_alt_hiconnect_sc_fifo_191_7qtmpqq.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\alt_hiconnect_sc_fifo_191\synth\alt_st_infer_scfifo.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\alt_hiconnect_sc_fifo_191\synth\alt_st_mlab_scfifo.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\alt_hiconnect_sc_fifo_191\synth\alt_st_fifo_empty.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\alt_hiconnect_sc_fifo_191\synth\alt_st_mlab_scfifo_a6.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\alt_hiconnect_sc_fifo_191\synth\alt_st_mlab_scfifo_a7.sv"
       attributes="" />
   <file
       path="C:\Users\mklee\AppData\Local\Temp\alt8290_6148029088922141087.dir\0002_alt_em10g32_0_gen\rtl\address_decoder\address_decoder_top\alt_hiconnect_sc_fifo_191\synth\alt_st_reg_scfifo.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="J:/programme/quartus/ip/altera/iconnect/alt_hiconnect_sc_fifo/alt_hiconnect_sc_fifo_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="address_decoder_top_altera_merlin_traffic_limiter_alt_hiconnect_sc_fifo_191_5pm2ohi"
     as="my_alt_hiconnect_sc_fifo_dest_id_fifo" />
  <messages>
   <message level="Info" culprit="address_decoder_top">"Generating: address_decoder_top_alt_hiconnect_sc_fifo_191_7qtmpqq"</message>
  </messages>
 </entity>
</deploy>
