package alt_mge_phy_reconfig_parameters_CFG0;

localparam ram_depth = 287;
function [26:0] get_ram_data;
  input integer index;
  automatic reg [0:286][26:0] ram_data = {
    27'h006DF03, // [26:16]-DPRIO address=0x006; [15:8]-bit mask=0xDF; [7:7]-hssi_tx_pcs_pma_interface_sqwgen_clken=sqwgen_clk_dis(1'h0); [6:6]-hssi_tx_pcs_pma_interface_prbs_clken=prbs_clk_dis(1'h0); [4:4]-hssi_tx_pcs_pma_interface_master_clk_sel=master_tx_pma_clk(1'h0); [3:3]-hssi_tx_pcs_pma_interface_prbs9_dwidth=prbs9_64b(1'h0); [2:0]-hssi_tx_pcs_pma_interface_tx_pma_data_sel=ten_g_pcs(3'h3);
    27'h007FF01, // [26:16]-DPRIO address=0x007; [15:8]-bit mask=0xFF; [7:4]-hssi_tx_pcs_pma_interface_prbs_gen_pat=prbs_gen_dis(4'h0); [3:3]-hssi_tx_pcs_pma_interface_tx_dyn_polarity_inversion=tx_dyn_polinv_dis(1'h0); [2:2]-hssi_tx_pcs_pma_interface_tx_static_polarity_inversion=tx_stat_polinv_dis(1'h0); [1:1]-hssi_tx_pcs_pma_interface_pmagate_en=pmagate_dis(1'h0); [0:0]-hssi_tx_pcs_pma_interface_bypass_pma_txelecidle=true(1'h1);
    27'h008FF04, // [26:16]-DPRIO address=0x008; [15:8]-bit mask=0xFF; [7:7]-hssi_tx_pcs_pma_interface_pldif_datawidth_mode=pldif_data_10bit(1'h0); [6:5]-hssi_tx_pcs_pma_interface_tx_pma_data_sel=ten_g_pcs(2'h0); [4:4]-hssi_tx_pcs_pma_interface_prbs_gen_pat=prbs_gen_dis(1'h0); [3:0]-hssi_tx_pcs_pma_interface_sq_wave_num=sq_wave_default(4'h4);
    27'h00AFF02, // [26:16]-DPRIO address=0x00A; [15:8]-bit mask=0xFF; [7:7]-hssi_rx_pcs_pma_interface_prbs_clken=prbs_clk_dis(1'h0); [6:5]-hssi_rx_pcs_pma_interface_master_clk_sel=master_rx_pma_clk(2'h0); [4:4]-hssi_rx_pcs_pma_interface_rx_static_polarity_inversion=rx_stat_polinv_dis(1'h0); [3:3]-hssi_rx_pcs_pma_interface_rx_lpbk_en=lpbk_dis(1'h0); [2:2]-hssi_rx_pcs_pma_interface_clkslip_sel=pld(1'h0); [1:0]-hssi_rx_pcs_pma_interface_block_sel=ten_g_pcs(2'h2);
    27'h00BFF02, // [26:16]-DPRIO address=0x00B; [15:8]-bit mask=0xFF; [7:4]-hssi_rx_pcs_pma_interface_prbs_ver=prbs_off(4'h0); [3:2]-hssi_rx_pcs_pma_interface_rx_prbs_mask=prbsmask128(2'h0); [1:1]-hssi_rx_pcs_pma_interface_rx_prbs_mode=teng_mode(1'h1); [0:0]-hssi_rx_pcs_pma_interface_rx_dyn_polarity_inversion=rx_dyn_polinv_dis(1'h0);
    27'h00C0F02, // [26:16]-DPRIO address=0x00C; [15:8]-bit mask=0x0F; [3:3]-hssi_rx_pcs_pma_interface_prbs9_dwidth=prbs9_64b(1'h0); [2:2]-hssi_rx_pcs_pma_interface_rx_signalok_signaldet_sel=sel_sig_det(1'h0); [1:1]-hssi_rx_pcs_pma_interface_rx_prbs_force_signal_ok=force_sig_ok(1'h1); [0:0]-hssi_rx_pcs_pma_interface_prbs_ver=prbs_off(1'h0);
    27'h00DFD00, // [26:16]-DPRIO address=0x00D; [15:8]-bit mask=0xFD; [7:7]-hssi_common_pcs_pma_interface_ppm_deassert_early=deassert_early_dis(1'h0); [6:6]-hssi_common_pcs_pma_interface_ppm_cnt_rst=ppm_cnt_rst_dis(1'h0); [5:5]-hssi_common_pcs_pma_interface_asn_enable=dis_asn(1'h0); [4:4]-hssi_common_pcs_pma_interface_ppm_gen1_2_cnt=cnt_32k(1'h0); [3:3]-hssi_common_pcs_pma_interface_ppm_post_eidle_delay=cnt_200_cycles(1'h0); [2:2]-hssi_common_pcs_pma_interface_pipe_if_g3pcs=pipe_if_8gpcs(1'h0); [0:0]-hssi_common_pcs_pma_interface_block_sel=eight_g_pcs(1'h0);
    27'h00EFF04, // [26:16]-DPRIO address=0x00E; [15:8]-bit mask=0xFF; [7:2]-hssi_common_pcs_pma_interface_ppmsel=ppmsel_100(6'h1); [1:0]-hssi_common_pcs_pma_interface_force_freqdet=force_freqdet_dis(2'h0);
    27'h00F9F00, // [26:16]-DPRIO address=0x00F; [15:8]-bit mask=0x9F; [7:7]-hssi_rx_pcs_pma_interface_pldif_datawidth_mode=pldif_data_10bit(1'h0); [4:4]-hssi_tx_pcs_pma_interface_pma_if_dft_en=dft_dis(1'h0); [3:3]-hssi_rx_pcs_pma_interface_pma_if_dft_val=dft_0(1'h0); [2:2]-hssi_rx_pcs_pma_interface_pma_if_dft_en=dft_dis(1'h0); [1:1]-hssi_common_pcs_pma_interface_pma_if_dft_val=dft_0(1'h0); [0:0]-hssi_common_pcs_pma_interface_pma_if_dft_en=dft_dis(1'h0);
    27'h010FF00, // [26:16]-DPRIO address=0x010; [15:8]-bit mask=0xFF; [7:0]-hssi_common_pcs_pma_interface_pma_done_counter=0(8'h0);
    27'h011FF00, // [26:16]-DPRIO address=0x011; [15:8]-bit mask=0xFF; [7:0]-hssi_common_pcs_pma_interface_pma_done_counter=0(8'h0);
    27'h012FF00, // [26:16]-DPRIO address=0x012; [15:8]-bit mask=0xFF; [7:2]-hssi_common_pcs_pma_interface_phfifo_flush_wait=0(6'h0); [1:0]-hssi_common_pcs_pma_interface_pma_done_counter=0(2'h0);
    27'h013FF00, // [26:16]-DPRIO address=0x013; [15:8]-bit mask=0xFF; [7:7]-hssi_common_pcs_pma_interface_ph_fifo_reg_mode=phfifo_reg_mode_dis(1'h0); [6:0]-hssi_common_pcs_pma_interface_pc_en_counter=0(7'h0);
    27'h0141F00, // [26:16]-DPRIO address=0x014; [15:8]-bit mask=0x1F; [4:0]-hssi_common_pcs_pma_interface_pc_rst_counter=0(5'h0);
    27'h015F404, // [26:16]-DPRIO address=0x015; [15:8]-bit mask=0xF4; [7:4]-hssi_common_pcs_pma_interface_testout_sel=ppm_det_test(4'h0); [2:2]-hssi_common_pcs_pma_interface_bypass_send_syncp_fbkp=true(1'h1);
    27'h016FF00, // [26:16]-DPRIO address=0x016; [15:8]-bit mask=0xFF; [7:0]-hssi_common_pcs_pma_interface_wait_send_syncp_fbkp=0(8'h0);
    27'h017F700, // [26:16]-DPRIO address=0x017; [15:8]-bit mask=0xF7; [7:4]-hssi_common_pcs_pma_interface_wait_clk_on_off_timer=0(4'h0); [2:0]-hssi_common_pcs_pma_interface_wait_send_syncp_fbkp=0(3'h0);
    27'h018DF00, // [26:16]-DPRIO address=0x018; [15:8]-bit mask=0xDF; [7:7]-hssi_common_pcs_pma_interface_free_run_clk_enable=false(1'h0); [6:6]-hssi_common_pcs_pma_interface_asn_clk_enable=false(1'h0); [4:0]-hssi_common_pcs_pma_interface_wait_pipe_synchronizing=0(5'h0);
    27'h019FF17, // [26:16]-DPRIO address=0x019; [15:8]-bit mask=0xFF; [7:7]-hssi_common_pcs_pma_interface_rxvalid_mask=rxvalid_mask_dis(1'h0); [6:6]-hssi_common_pcs_pma_interface_cid_enable=dis_cid_mode(1'h0); [5:5]-hssi_common_pcs_pma_interface_cdr_control=dis_cdr_ctrl(1'h0); [4:4]-hssi_common_pcs_pma_interface_bypass_pma_ltr=true(1'h1); [3:3]-hssi_common_pcs_pma_interface_bypass_ppm_lock=false(1'h0); [2:2]-hssi_common_pcs_pma_interface_bypass_txdetectrx=true(1'h1); [1:1]-hssi_common_pcs_pma_interface_bypass_early_eios=true(1'h1); [0:0]-hssi_common_pcs_pma_interface_bypass_pcie_switch=true(1'h1);
    27'h01AFF00, // [26:16]-DPRIO address=0x01A; [15:8]-bit mask=0xFF; [7:0]-hssi_common_pcs_pma_interface_sigdet_wait_counter=0(8'h0);
    27'h01BFF00, // [26:16]-DPRIO address=0x01B; [15:8]-bit mask=0xFF; [7:4]-hssi_common_pcs_pma_interface_dft_observation_clock_selection=dft_clk_obsrv_tx0(4'h0); [3:0]-hssi_common_pcs_pma_interface_sigdet_wait_counter=0(4'h0);
    27'h01CFF00, // [26:16]-DPRIO address=0x01C; [15:8]-bit mask=0xFF; [7:0]-hssi_common_pcs_pma_interface_data_mask_count=0(8'h0);
    27'h01DFF00, // [26:16]-DPRIO address=0x01D; [15:8]-bit mask=0xFF; [7:0]-hssi_common_pcs_pma_interface_data_mask_count=0(8'h0);
    27'h01EFF00, // [26:16]-DPRIO address=0x01E; [15:8]-bit mask=0xFF; [7:7]-hssi_common_pcs_pma_interface_ignore_sigdet_g23=false(1'h0); [6:6]-hssi_common_pcs_pma_interface_spd_chg_rst_wait_cnt_en=false(1'h0); [5:3]-hssi_common_pcs_pma_interface_data_mask_count_multi=0(3'h0); [2:0]-hssi_common_pcs_pma_interface_sigdet_wait_counter_multi=0(3'h0);
    27'h01FFF00, // [26:16]-DPRIO address=0x01F; [15:8]-bit mask=0xFF; [7:0]-hssi_common_pcs_pma_interface_early_eios_counter=0(8'h0);
    27'h0207E04, // [26:16]-DPRIO address=0x020; [15:8]-bit mask=0x7E; [6:6]-hssi_tx_pld_pcs_interface_pcs_tx_delay2_clk_en=delay2_clk_disable(1'h0); [5:5]-hssi_tx_pld_pcs_interface_pcs_tx_delay1_clk_en=delay1_clk_disable(1'h0); [4:4]-hssi_tx_pld_pcs_interface_pcs_tx_delay1_data_sel=one_ff_delay(1'h0); [3:3]-hssi_tx_pld_pcs_interface_pcs_tx_output_sel=teng_output(1'h0); [2:2]-hssi_tx_pld_pcs_interface_pcs_tx_delay1_clk_sel=pcs_tx_clk(1'h1); [1:1]-hssi_tx_pld_pcs_interface_pcs_tx_data_source=hip_disable(1'h0);
    27'h021FF00, // [26:16]-DPRIO address=0x021; [15:8]-bit mask=0xFF; [7:4]-hssi_tx_pld_pcs_interface_pcs_tx_delay2_ctrl=delay2_path0(4'h0); [3:0]-hssi_tx_pld_pcs_interface_pcs_tx_delay1_ctrl=delay1_path0(4'h0);
    27'h0220F05, // [26:16]-DPRIO address=0x022; [15:8]-bit mask=0x0F; [3:2]-hssi_tx_pld_pcs_interface_pcs_tx_clk_source=teng(2'h1); [1:0]-hssi_tx_pld_pcs_interface_pcs_tx_clk_out_sel=teng_clk_out(2'h1);
    27'h024EF41, // [26:16]-DPRIO address=0x024; [15:8]-bit mask=0xEF; [7:6]-hssi_rx_pld_pcs_interface_pcs_rx_clk_out_sel=teng_clk_out(2'h1); [5:5]-hssi_rx_pld_pcs_interface_pcs_rx_hip_clk_en=hip_rx_disable(1'h0); [3:3]-hssi_rx_pld_pcs_interface_pcs_rx_output_sel=teng_output(1'h0); [2:2]-hssi_rx_pld_pcs_interface_pcs_rx_clk_sel=pcs_rx_clk(1'h0); [1:0]-hssi_rx_pld_pcs_interface_pcs_rx_block_sel=teng(2'h1);
    27'h028F704, // [26:16]-DPRIO address=0x028; [15:8]-bit mask=0xF7; [7:5]-hssi_common_pld_pcs_interface_dft_clk_out_sel=teng_rx_dft_clk(3'h0); [4:4]-hssi_common_pld_pcs_interface_hrdrstctrl_en=hrst_dis(1'h0); [2:0]-hssi_common_pld_pcs_interface_pcs_testbus_block_sel=pma_if(3'h4);
    27'h0290100, // [26:16]-DPRIO address=0x029; [15:8]-bit mask=0x01; [0:0]-hssi_common_pld_pcs_interface_dft_clk_out_en=dft_clk_out_disable(1'h0);
    27'h070FFC0, // [26:16]-DPRIO address=0x070; [15:8]-bit mask=0xFF; [7:6]-hssi_10g_tx_pcs_txfifo_pfull=11(2'h3); [5:4]-hssi_10g_tx_pcs_wr_clk_sel=wr_tx_pma_clk(2'h0); [3:3]-hssi_10g_tx_pcs_scrm_bypass=scrm_bypass_dis(1'h0); [2:2]-hssi_10g_tx_pcs_tx_sm_bypass=tx_sm_bypass_dis(1'h0); [1:1]-hssi_10g_tx_pcs_enc_64b66b_txsm_bypass=enc_64b66b_txsm_bypass_dis(1'h0); [0:0]-hssi_10g_tx_pcs_fec_enable=fec_dis(1'h0);
    27'h0717B12, // [26:16]-DPRIO address=0x071; [15:8]-bit mask=0x7B; [6:3]-hssi_10g_tx_pcs_txfifo_pempty=2(4'h2); [1:0]-hssi_10g_tx_pcs_txfifo_pfull=11(2'h2);
    27'h0793C00, // [26:16]-DPRIO address=0x079; [15:8]-bit mask=0x3C; [5:2]-hssi_10g_tx_pcs_txfifo_empty=empty_default(4'h0);
    27'h07AFFFF, // [26:16]-DPRIO address=0x07A; [15:8]-bit mask=0xFF; [7:0]-hssi_10g_tx_pcs_pseudo_seed_b=288230376151711743(8'hFF);
    27'h07BFFFF, // [26:16]-DPRIO address=0x07B; [15:8]-bit mask=0xFF; [7:0]-hssi_10g_tx_pcs_pseudo_seed_b=288230376151711743(8'hFF);
    27'h07CFFFF, // [26:16]-DPRIO address=0x07C; [15:8]-bit mask=0xFF; [7:0]-hssi_10g_tx_pcs_pseudo_seed_b=288230376151711743(8'hFF);
    27'h07DFFFF, // [26:16]-DPRIO address=0x07D; [15:8]-bit mask=0xFF; [7:0]-hssi_10g_tx_pcs_pseudo_seed_b=288230376151711743(8'hFF);
    27'h07EFFFF, // [26:16]-DPRIO address=0x07E; [15:8]-bit mask=0xFF; [7:0]-hssi_10g_tx_pcs_pseudo_seed_b=288230376151711743(8'hFF);
    27'h07FFFFF, // [26:16]-DPRIO address=0x07F; [15:8]-bit mask=0xFF; [7:0]-hssi_10g_tx_pcs_pseudo_seed_b=288230376151711743(8'hFF);
    27'h080FFFF, // [26:16]-DPRIO address=0x080; [15:8]-bit mask=0xFF; [7:0]-hssi_10g_tx_pcs_pseudo_seed_b=288230376151711743(8'hFF);
    27'h0813F3F, // [26:16]-DPRIO address=0x081; [15:8]-bit mask=0x3F; [5:2]-hssi_10g_tx_pcs_txfifo_full=full_default(4'hF); [1:0]-hssi_10g_tx_pcs_pseudo_seed_b=288230376151711743(2'h3);
    27'h0827B01, // [26:16]-DPRIO address=0x082; [15:8]-bit mask=0x7B; [6:6]-hssi_10g_tx_pcs_sop_mark=sop_mark_dis(1'h0); [5:5]-hssi_10g_tx_pcs_random_disp=disable(1'h0); [4:4]-hssi_10g_tx_pcs_fifo_reg_fast=fifo_reg_fast_dis(1'h0); [3:3]-hssi_10g_tx_pcs_test_mode=test_off(1'h0); [1:1]-hssi_10g_tx_pcs_test_mode=test_off(1'h0); [0:0]-hssi_10g_tx_pcs_pseudo_random=all_0(1'h1);
    27'h084B784, // [26:16]-DPRIO address=0x084; [15:8]-bit mask=0xB7; [7:7]-hssi_10g_tx_pcs_scrm_pipeln=enable(1'h1); [5:5]-hssi_10g_tx_pcs_frmgen_burst=frmgen_burst_dis(1'h0); [4:4]-hssi_10g_tx_pcs_frmgen_wordslip=frmgen_wordslip_dis(1'h0); [2:2]-hssi_10g_tx_pcs_tx_sm_pipeln=tx_sm_pipeln_en(1'h1); [1:1]-hssi_10g_tx_pcs_gb_pipeln_bypass=disable(1'h0); [0:0]-hssi_10g_tx_pcs_dispgen_pipeln=dispgen_pipeln_dis(1'h0);
    27'h085FBD9, // [26:16]-DPRIO address=0x085; [15:8]-bit mask=0xFB; [7:7]-hssi_10g_tx_pcs_dv_bond=dv_bond_dis(1'h1); [6:6]-hssi_10g_tx_pcs_indv=indv_en(1'h1); [5:3]-hssi_10g_tx_pcs_txfifo_mode=register_mode(3'h3); [1:1]-hssi_10g_tx_pcs_master_clk_sel=master_tx_pma_clk(1'h0); [0:0]-hssi_10g_tx_pcs_frmgen_pipeln=frmgen_pipeln_en(1'h1);
    27'h086FB31, // [26:16]-DPRIO address=0x086; [15:8]-bit mask=0xFB; [7:7]-hssi_10g_tx_pcs_frmgen_clken=frmgen_clk_dis(1'h0); [6:6]-hssi_10g_tx_pcs_crcgen_clken=crcgen_clk_dis(1'h0); [5:5]-hssi_10g_tx_pcs_enc64b66b_txsm_clken=enc64b66b_txsm_clk_en(1'h1); [4:4]-hssi_10g_tx_pcs_scrm_clken=scrm_clk_en(1'h1); [3:3]-hssi_10g_tx_pcs_dispgen_clken=dispgen_clk_dis(1'h0); [1:1]-hssi_10g_tx_pcs_fec_clken=fec_clk_dis(1'h0); [0:0]-hssi_10g_tx_pcs_gbred_clken=gbred_clk_en(1'h1);
    27'h087E747, // [26:16]-DPRIO address=0x087; [15:8]-bit mask=0xE7; [7:5]-hssi_10g_tx_pcs_phcomp_rd_del=phcomp_rd_del2(3'h2); [2:2]-hssi_10g_tx_pcs_ctrl_bit_reverse=ctrl_bit_reverse_en(1'h1); [1:1]-hssi_10g_tx_pcs_wrfifo_clken=wrfifo_clk_en(1'h1); [0:0]-hssi_10g_tx_pcs_rdfifo_clken=rdfifo_clk_en(1'h1);
    27'h088FFE0, // [26:16]-DPRIO address=0x088; [15:8]-bit mask=0xFF; [7:7]-hssi_10g_tx_pcs_dispgen_bypass=dispgen_bypass_en(1'h1); [6:6]-hssi_10g_tx_pcs_crcgen_bypass=crcgen_bypass_en(1'h1); [5:5]-hssi_10g_tx_pcs_frmgen_bypass=frmgen_bypass_en(1'h1); [4:3]-hssi_10g_tx_pcs_gb_tx_odwidth=odwidth_32(2'h0); [2:0]-hssi_10g_tx_pcs_gb_tx_idwidth=idwidth_66(3'h0);
    27'h089FE30, // [26:16]-DPRIO address=0x089; [15:8]-bit mask=0xFE; [7:7]-hssi_10g_tx_pcs_crcgen_err=crcgen_err_dis(1'h0); [6:6]-hssi_10g_tx_pcs_dispgen_err=dispgen_err_dis(1'h0); [5:5]-hssi_10g_tx_pcs_sh_err=sh_err_en(1'h1); [4:4]-hssi_10g_tx_pcs_crcgen_inv=crcgen_inv_en(1'h1); [3:3]-hssi_10g_tx_pcs_scrm_mode=async(1'h0); [2:2]-hssi_10g_tx_pcs_frmgen_pyld_ins=frmgen_pyld_ins_dis(1'h0); [1:1]-hssi_10g_tx_pcs_data_bit_reverse=data_bit_reverse_dis(1'h0);
    27'h08AFF00, // [26:16]-DPRIO address=0x08A; [15:8]-bit mask=0xFF; [7:0]-hssi_10g_tx_pcs_frmgen_mfrm_length=2048(8'h0);
    27'h08BFF08, // [26:16]-DPRIO address=0x08B; [15:8]-bit mask=0xFF; [7:0]-hssi_10g_tx_pcs_frmgen_mfrm_length=2048(8'h8);
    27'h08C0F00, // [26:16]-DPRIO address=0x08C; [15:8]-bit mask=0x0F; [3:0]-hssi_10g_tx_pcs_dft_clk_out_sel=tx_master_clk(4'h0);
    27'h08DF440, // [26:16]-DPRIO address=0x08D; [15:8]-bit mask=0xF4; [7:6]-hssi_10g_tx_pcs_stretch_num_stages=one_stage(2'h1); [5:5]-hssi_10g_tx_pcs_fifo_double_write=fifo_double_write_dis(1'h0); [4:4]-hssi_10g_tx_pcs_bitslip_en=bitslip_dis(1'h0); [2:2]-hssi_10g_tx_pcs_fastpath=fastpath_dis(1'h0);
    27'h08E0C00, // [26:16]-DPRIO address=0x08E; [15:8]-bit mask=0x0C; [3:3]-hssi_10g_tx_pcs_distup_bypass_pipeln=distup_bypass_pipeln_dis(1'h0); [2:2]-hssi_10g_tx_pcs_distdwn_bypass_pipeln=distdwn_bypass_pipeln_dis(1'h0);
    27'h08FC000, // [26:16]-DPRIO address=0x08F; [15:8]-bit mask=0xC0; [7:7]-hssi_10g_tx_pcs_bonding_dft_val=dft_0(1'h0); [6:6]-hssi_10g_tx_pcs_bonding_dft_en=dft_dis(1'h0);
    27'h090FEC0, // [26:16]-DPRIO address=0x090; [15:8]-bit mask=0xFE; [7:5]-hssi_10g_tx_pcs_tx_testbus_sel=tx_fifo_testbus1(3'h6); [4:3]-hssi_10g_tx_pcs_tx_scrm_width=bit64(2'h0); [2:2]-hssi_10g_tx_pcs_tx_scrm_err=scrm_err_dis(1'h0); [1:1]-hssi_10g_tx_pcs_tx_sh_location=lsb(1'h0);
    27'h091FBCB, // [26:16]-DPRIO address=0x091; [15:8]-bit mask=0xFB; [7:7]-hssi_10g_tx_pcs_full_flag_type=full_wr_side(1'h1); [6:6]-hssi_10g_tx_pcs_pfull_flag_type=pfull_wr_side(1'h1); [5:5]-hssi_10g_tx_pcs_pempty_flag_type=pempty_rd_side(1'h0); [4:4]-hssi_10g_tx_pcs_empty_flag_type=empty_rd_side(1'h0); [3:3]-hssi_10g_tx_pcs_fifo_stop_wr=n_wr_full(1'h1); [1:1]-hssi_10g_tx_pcs_fifo_stop_rd=n_rd_empty(1'h1); [0:0]-hssi_10g_tx_pcs_tx_testbus_sel=tx_fifo_testbus1(1'h1);
    27'h096EF80, // [26:16]-DPRIO address=0x096; [15:8]-bit mask=0xEF; [7:7]-hssi_10g_rx_pcs_clr_errblk_cnt_en=enable(1'h1); [6:6]-hssi_10g_rx_pcs_blksync_bypass=blksync_bypass_dis(1'h0); [5:5]-hssi_10g_rx_pcs_bitslip_mode=bitslip_dis(1'h0); [3:3]-hssi_10g_rx_pcs_descrm_bypass=descrm_bypass_dis(1'h0); [2:2]-hssi_10g_rx_pcs_rx_sm_bypass=rx_sm_bypass_dis(1'h0); [1:1]-hssi_10g_rx_pcs_dec_64b66b_rxsm_bypass=dec_64b66b_rxsm_bypass_dis(1'h0); [0:0]-hssi_10g_rx_pcs_fec_enable=fec_dis(1'h0);
    27'h0970700, // [26:16]-DPRIO address=0x097; [15:8]-bit mask=0x07; [2:2]-hssi_10g_rx_pcs_test_mode=test_off(1'h0); [1:0]-hssi_10g_rx_pcs_rd_clk_sel=rd_rx_pma_clk(2'h0);
    27'h098FF0F, // [26:16]-DPRIO address=0x098; [15:8]-bit mask=0xFF; [7:7]-hssi_10g_rx_pcs_ber_bit_err_total_cnt=bit_err_total_cnt_10g(1'h0); [6:0]-hssi_10g_rx_pcs_blksync_enum_invalid_sh_cnt=enum_invalid_sh_cnt_10g(7'hF);
    27'h0993F08, // [26:16]-DPRIO address=0x099; [15:8]-bit mask=0x3F; [5:0]-hssi_10g_rx_pcs_ber_bit_err_total_cnt=bit_err_total_cnt_10g(6'h8);
    27'h09AFF4A, // [26:16]-DPRIO address=0x09A; [15:8]-bit mask=0xFF; [7:0]-hssi_10g_rx_pcs_ber_xus_timer_window=19530(8'h4A);
    27'h09BFF4C, // [26:16]-DPRIO address=0x09B; [15:8]-bit mask=0xFF; [7:0]-hssi_10g_rx_pcs_ber_xus_timer_window=19530(8'h4C);
    27'h09CFFE0, // [26:16]-DPRIO address=0x09C; [15:8]-bit mask=0xFF; [7:5]-hssi_10g_rx_pcs_blksync_knum_sh_cnt_postlock=knum_sh_cnt_postlock_10g(3'h7); [4:0]-hssi_10g_rx_pcs_ber_xus_timer_window=19530(5'h0);
    27'h09DFF07, // [26:16]-DPRIO address=0x09D; [15:8]-bit mask=0xFF; [7:0]-hssi_10g_rx_pcs_blksync_knum_sh_cnt_postlock=knum_sh_cnt_postlock_10g(8'h7);
    27'h09E7F3F, // [26:16]-DPRIO address=0x09E; [15:8]-bit mask=0x7F; [6:0]-hssi_10g_rx_pcs_blksync_knum_sh_cnt_prelock=knum_sh_cnt_prelock_10g(7'h3F);
    27'h0A0FFE0, // [26:16]-DPRIO address=0x0A0; [15:8]-bit mask=0xFF; [7:7]-hssi_10g_rx_pcs_dispchk_bypass=dispchk_bypass_en(1'h1); [6:6]-hssi_10g_rx_pcs_crcchk_bypass=crcchk_bypass_en(1'h1); [5:5]-hssi_10g_rx_pcs_frmsync_bypass=frmsync_bypass_en(1'h1); [4:3]-hssi_10g_rx_pcs_gb_rx_idwidth=idwidth_32(2'h0); [2:0]-hssi_10g_rx_pcs_gb_rx_odwidth=odwidth_66(3'h0);
    27'h0A2FFBB, // [26:16]-DPRIO address=0x0A2; [15:8]-bit mask=0xFF; [7:7]-hssi_10g_rx_pcs_descrm_clken=descrm_clk_en(1'h1); [6:6]-hssi_10g_rx_pcs_frmsync_clken=frmsync_clk_dis(1'h0); [5:5]-hssi_10g_rx_pcs_dec64b66b_clken=dec64b66b_clk_en(1'h1); [4:4]-hssi_10g_rx_pcs_ber_clken=ber_clk_en(1'h1); [3:3]-hssi_10g_rx_pcs_rand_clken=rand_clk_en(1'h1); [2:2]-hssi_10g_rx_pcs_crcchk_clken=crcchk_clk_dis(1'h0); [1:1]-hssi_10g_rx_pcs_wrfifo_clken=wrfifo_clk_en(1'h1); [0:0]-hssi_10g_rx_pcs_rdfifo_clken=rdfifo_clk_en(1'h1);
    27'h0A30B0A, // [26:16]-DPRIO address=0x0A3; [15:8]-bit mask=0x0B; [3:3]-hssi_10g_rx_pcs_gbexp_clken=gbexp_clk_en(1'h1); [1:1]-hssi_10g_rx_pcs_blksync_clken=blksync_clk_en(1'h1); [0:0]-hssi_10g_rx_pcs_fec_clken=fec_clk_dis(1'h0);
    27'h0A4FF8C, // [26:16]-DPRIO address=0x0A4; [15:8]-bit mask=0xFF; [7:5]-hssi_10g_rx_pcs_frmsync_enum_sync=enum_sync_default(3'h4); [4:2]-hssi_10g_rx_pcs_frmsync_enum_scrm=enum_scrm_default(3'h3); [1:1]-hssi_10g_rx_pcs_force_align=force_align_dis(1'h0); [0:0]-hssi_10g_rx_pcs_align_del=align_del_dis(1'h0);
    27'h0A50704, // [26:16]-DPRIO address=0x0A5; [15:8]-bit mask=0x07; [2:0]-hssi_10g_rx_pcs_frmsync_knum_sync=knum_sync_default(3'h4);
    27'h0A6FF00, // [26:16]-DPRIO address=0x0A6; [15:8]-bit mask=0xFF; [7:0]-hssi_10g_rx_pcs_control_del=control_del_none(8'h0);
    27'h0A71F17, // [26:16]-DPRIO address=0x0A7; [15:8]-bit mask=0x1F; [4:0]-hssi_10g_rx_pcs_rxfifo_pfull=23(5'h17);
    27'h0A8FFE2, // [26:16]-DPRIO address=0x0A8; [15:8]-bit mask=0xFF; [7:5]-hssi_10g_rx_pcs_rxfifo_full=full_default(3'h7); [4:0]-hssi_10g_rx_pcs_rxfifo_pempty=2(5'h2);
    27'h0A9FF03, // [26:16]-DPRIO address=0x0A9; [15:8]-bit mask=0xFF; [7:7]-hssi_10g_rx_pcs_fast_path=fast_path_dis(1'h0); [6:2]-hssi_10g_rx_pcs_rxfifo_empty=empty_default(5'h0); [1:0]-hssi_10g_rx_pcs_rxfifo_full=full_default(2'h3);
    27'h0AADFDC, // [26:16]-DPRIO address=0x0AA; [15:8]-bit mask=0xDF; [7:7]-hssi_10g_rx_pcs_descrm_pipeln=enable(1'h1); [6:6]-hssi_10g_rx_pcs_frmsync_pipeln=frmsync_pipeln_en(1'h1); [4:4]-hssi_10g_rx_pcs_rx_sm_pipeln=rx_sm_pipeln_en(1'h1); [3:3]-hssi_10g_rx_pcs_crcchk_pipeln=crcchk_pipeln_en(1'h1); [2:2]-hssi_10g_rx_pcs_crcflag_pipeln=crcflag_pipeln_en(1'h1); [1:0]-hssi_10g_rx_pcs_master_clk_sel=master_rx_pma_clk(2'h0);
    27'h0AB0302, // [26:16]-DPRIO address=0x0AB; [15:8]-bit mask=0x03; [1:1]-hssi_10g_rx_pcs_dis_signal_ok=dis_signal_ok_dis(1'h1); [0:0]-hssi_10g_rx_pcs_blksync_pipeln=blksync_pipeln_dis(1'h0);
    27'h0ACEF62, // [26:16]-DPRIO address=0x0AC; [15:8]-bit mask=0xEF; [7:5]-hssi_10g_rx_pcs_rxfifo_mode=register_mode(3'h3); [3:3]-hssi_10g_rx_pcs_data_bit_reverse=data_bit_reverse_dis(1'h0); [2:2]-hssi_10g_rx_pcs_descrm_mode=async(1'h0); [1:1]-hssi_10g_rx_pcs_ctrl_bit_reverse=ctrl_bit_reverse_en(1'h1); [0:0]-hssi_10g_rx_pcs_test_mode=test_off(1'h0);
    27'h0ADFF2D, // [26:16]-DPRIO address=0x0AD; [15:8]-bit mask=0xFF; [7:5]-hssi_10g_rx_pcs_blksync_bitslip_wait_cnt=1(3'h1); [4:4]-hssi_10g_rx_pcs_blksync_bitslip_type=bitslip_comb(1'h0); [3:3]-hssi_10g_rx_pcs_blksync_bitslip_wait_type=bitslip_cnt(1'h1); [2:2]-hssi_10g_rx_pcs_rx_sm_hiber=rx_sm_hiber_en(1'h1); [1:1]-hssi_10g_rx_pcs_frmsync_flag_type=location_only(1'h0); [0:0]-hssi_10g_rx_pcs_crcchk_inv=crcchk_inv_en(1'h1);
    27'h0AEFF00, // [26:16]-DPRIO address=0x0AE; [15:8]-bit mask=0xFF; [7:0]-hssi_10g_rx_pcs_frmsync_mfrm_length=2048(8'h0);
    27'h0AFFF08, // [26:16]-DPRIO address=0x0AF; [15:8]-bit mask=0xFF; [7:0]-hssi_10g_rx_pcs_frmsync_mfrm_length=2048(8'h8);
    27'h0B0FB80, // [26:16]-DPRIO address=0x0B0; [15:8]-bit mask=0xFB; [7:3]-hssi_10g_rx_pcs_rx_testbus_sel=rx_fifo_testbus1(5'h10); [1:1]-hssi_10g_rx_pcs_rx_sh_location=lsb(1'h0); [0:0]-hssi_10g_rx_pcs_rx_signal_ok_sel=synchronized_ver(1'h0);
    27'h0B15E42, // [26:16]-DPRIO address=0x0B1; [15:8]-bit mask=0x5E; [6:6]-hssi_10g_rx_pcs_rx_true_b2b=b2b(1'h1); [4:3]-hssi_10g_rx_pcs_rx_scrm_width=bit64(2'h0); [2:1]-hssi_10g_rx_pcs_stretch_num_stages=one_stage(2'h1);
    27'h0B2FF78, // [26:16]-DPRIO address=0x0B2; [15:8]-bit mask=0xFF; [7:7]-hssi_10g_rx_pcs_fifo_double_read=fifo_double_read_dis(1'h0); [6:6]-hssi_10g_rx_pcs_fifo_stop_wr=n_wr_full(1'h1); [5:5]-hssi_10g_rx_pcs_fifo_stop_rd=n_rd_empty(1'h1); [4:4]-hssi_10g_rx_pcs_full_flag_type=full_wr_side(1'h1); [3:3]-hssi_10g_rx_pcs_pfull_flag_type=pfull_wr_side(1'h1); [2:2]-hssi_10g_rx_pcs_pempty_flag_type=pempty_rd_side(1'h0); [1:1]-hssi_10g_rx_pcs_empty_flag_type=empty_rd_side(1'h0); [0:0]-hssi_10g_rx_pcs_rx_fifo_write_ctrl=blklock_stops(1'h0);
    27'h0B37F02, // [26:16]-DPRIO address=0x0B3; [15:8]-bit mask=0x7F; [6:3]-hssi_10g_rx_pcs_dft_clk_out_sel=rx_master_clk(4'h0); [2:0]-hssi_10g_rx_pcs_phcomp_rd_del=phcomp_rd_del2(3'h2);
    27'h0B80100, // [26:16]-DPRIO address=0x0B8; [15:8]-bit mask=0x01; [0:0]-hssi_rx_pld_pcs_interface_hd_pcs10g_test_bus_mode=rx(1'h0);
    27'h0BCDF10, // [26:16]-DPRIO address=0x0BC; [15:8]-bit mask=0xDF; [7:7]-hssi_krfec_tx_pcs_enc_frame_query=enc_query_dis(1'h0); [6:6]-hssi_krfec_tx_pcs_transmit_order=transmit_lsb(1'h0); [4:4]-hssi_krfec_tx_pcs_ctrl_bit_reverse=ctrl_bit_reverse_en(1'h1); [3:3]-hssi_krfec_tx_pcs_data_bit_reverse=data_bit_reverse_dis(1'h0); [2:0]-hssi_krfec_tx_pcs_tx_testbus_sel=overall(3'h0);
    27'h0BDFF0C, // [26:16]-DPRIO address=0x0BD; [15:8]-bit mask=0xFF; [7:4]-hssi_krfec_tx_pcs_burst_err_len=burst_err_len1(4'h0); [3:3]-hssi_krfec_tx_pcs_pipeln_encoder=enable(1'h1); [2:2]-hssi_krfec_tx_pcs_pipeln_scrambler=enable(1'h1); [1:1]-hssi_krfec_tx_pcs_burst_err=burst_err_dis(1'h0); [0:0]-hssi_krfec_tx_pcs_transcode_err=trans_err_dis(1'h0);
    27'h0BF7F20, // [26:16]-DPRIO address=0x0BF; [15:8]-bit mask=0x7F; [6:6]-hssi_krfec_rx_pcs_pipeln_descrm=disable(1'h0); [5:5]-hssi_krfec_rx_pcs_pipeln_blksync=enable(1'h1); [4:0]-hssi_krfec_rx_pcs_rx_testbus_sel=overall(5'h0);
    27'h0C0F747, // [26:16]-DPRIO address=0x0C0; [15:8]-bit mask=0xF7; [7:7]-hssi_krfec_rx_pcs_receive_order=receive_lsb(1'h0); [6:6]-hssi_krfec_rx_pcs_ctrl_bit_reverse=ctrl_bit_reverse_en(1'h1); [5:5]-hssi_krfec_rx_pcs_data_bit_reverse=data_bit_reverse_dis(1'h0); [4:4]-hssi_krfec_rx_pcs_blksync_cor_en=detect(1'h0); [2:2]-hssi_krfec_rx_pcs_dv_start=with_blklock(1'h1); [1:0]-hssi_krfec_rx_pcs_clr_ctrl=both_enabled(2'h3);
    27'h0C1FF08, // [26:16]-DPRIO address=0x0C1; [15:8]-bit mask=0xFF; [7:0]-hssi_krfec_rx_pcs_parity_invalid_enum=8(8'h8);
    27'h0C2FF84, // [26:16]-DPRIO address=0x0C2; [15:8]-bit mask=0xFF; [7:7]-hssi_krfec_rx_pcs_signal_ok_en=sig_ok_en(1'h1); [6:6]-hssi_krfec_rx_pcs_err_mark_type=err_mark_10g(1'h0); [5:5]-hssi_krfec_rx_pcs_error_marking_en=err_mark_dis(1'h0); [4:4]-hssi_krfec_rx_pcs_bypass_gb=bypass_dis(1'h0); [3:0]-hssi_krfec_rx_pcs_parity_valid_num=4(4'h4);
    27'h0C3FF45, // [26:16]-DPRIO address=0x0C3; [15:8]-bit mask=0xFF; [7:7]-hssi_krfec_rx_pcs_pipeln_trans_dec=disable(1'h0); [6:6]-hssi_krfec_rx_pcs_pipeln_gearbox=enable(1'h1); [5:5]-hssi_krfec_rx_pcs_pipeln_errcorrect=disable(1'h0); [4:4]-hssi_krfec_rx_pcs_pipeln_errtrap_pat=disable(1'h0); [3:3]-hssi_krfec_rx_pcs_pipeln_errtrap_loc=disable(1'h0); [2:2]-hssi_krfec_rx_pcs_pipeln_errtrap_ind=enable(1'h1); [1:1]-hssi_krfec_rx_pcs_pipeln_errtrap_lfsr=disable(1'h0); [0:0]-hssi_krfec_rx_pcs_pipeln_syndrm=enable(1'h1);
    27'h0C40101, // [26:16]-DPRIO address=0x0C4; [15:8]-bit mask=0x01; [0:0]-hssi_rx_pld_pcs_interface_hd_krfec_test_bus_mode=tx(1'h1);
    27'h0C50301, // [26:16]-DPRIO address=0x0C5; [15:8]-bit mask=0x03; [1:1]-hssi_fifo_tx_pcs_double_write_mode=double_write_dis(1'h0); [0:0]-hssi_fifo_tx_pcs_prot_mode=teng_mode(1'h1);
    27'h0C70301, // [26:16]-DPRIO address=0x0C7; [15:8]-bit mask=0x03; [1:1]-hssi_fifo_rx_pcs_double_read_mode=double_read_dis(1'h0); [0:0]-hssi_fifo_rx_pcs_prot_mode=teng_mode(1'h1);
    27'h1020400, // [26:16]-DPRIO address=0x102; [15:8]-bit mask=0x04; [2:2]-cdr_pll_rstb=cdr_lf_reset_off(1'h0);
    27'h103C000, // [26:16]-DPRIO address=0x103; [15:8]-bit mask=0xC0; [7:7]-pma_tx_buf_chgpmp_up_trim_double=normal_up_trim_current(1'h0); [6:6]-pma_tx_buf_chgpmp_dn_trim_double=normal_dn_trim_current(1'h0);
    27'h105FF40, // [26:16]-DPRIO address=0x105; [15:8]-bit mask=0xFF; [7:7]-pma_tx_buf_user_fir_coeff_ctrl_sel=ram_ctl(1'h0); [6:6]-pma_tx_buf_pre_emp_sign_1st_post_tap=fir_post_1t_neg(1'h1); [5:5]-pma_tx_buf_compensation_posttap_en=disable(1'h0); [4:0]-pma_tx_buf_pre_emp_switching_ctrl_1st_post_tap=0(5'h0);
    27'h106DDC1, // [26:16]-DPRIO address=0x106; [15:8]-bit mask=0xDD; [7:6]-pma_tx_buf_term_p_tune=rterm_p7(2'h3); [4:4]-pma_tx_buf_dcd_detection_en=disable(1'h0); [3:3]-pma_tx_buf_dcc_finestep_enin=disable(1'h0); [2:2]-pma_cgb_vreg_sel_ref=sel_vccer_4ref(1'h0); [0:0]-pma_tx_buf_tx_rst_enable=enable(1'h1);
    27'h107FF60, // [26:16]-DPRIO address=0x107; [15:8]-bit mask=0xFF; [7:6]-pma_tx_buf_term_p_tune=rterm_p7(2'h1); [5:5]-pma_tx_buf_pre_emp_sign_pre_tap_1t=fir_pre_1t_neg(1'h1); [4:0]-pma_tx_buf_pre_emp_switching_ctrl_pre_tap_1t=0(5'h0);
    27'h1083020, // [26:16]-DPRIO address=0x108; [15:8]-bit mask=0x30; [5:5]-pma_tx_buf_term_sel=r_r1(1'h1); [4:4]-pma_tx_buf_low_power_en=disable(1'h0);
    27'h109FF7F, // [26:16]-DPRIO address=0x109; [15:8]-bit mask=0xFF; [7:7]-pma_tx_buf_duty_cycle_correction_reset_n=reset(1'h0); [6:6]-pma_tx_buf_tx_powerdown=normal_tx_on(1'h1); [5:5]-pma_tx_buf_compensation_en=enable(1'h1); [4:0]-pma_tx_buf_vod_output_swing_ctrl=31(5'h1F);
    27'h10AFF20, // [26:16]-DPRIO address=0x10A; [15:8]-bit mask=0xFF; [7:6]-pma_tx_ser_duty_cycle_correction_mode_ctrl=dcc_disable(2'h0); [5:0]-pma_tx_buf_duty_cycle_setting=dcc_t32(6'h20);
    27'h10BFF20, // [26:16]-DPRIO address=0x10B; [15:8]-bit mask=0xFF; [7:6]-pma_tx_ser_ser_clk_mon=disable_clk_mon(2'h0); [5:0]-pma_tx_buf_duty_cycle_setting_aux=dcc2_t32(6'h20);
    27'h10CFF05, // [26:16]-DPRIO address=0x10C; [15:8]-bit mask=0xFF; [7:7]-pma_tx_buf_duty_cycle_cp_comp_en=cp_comp_off(1'h0); [6:6]-pma_tx_buf_duty_cycle_detector_sa_cal=dcd_sa_cal_disable(1'h0); [5:4]-pma_tx_buf_jtag_drv_sel=drv1(2'h0); [3:3]-pma_tx_buf_jtag_lp=lp_off(1'h0); [2:0]-pma_tx_buf_slew_rate_ctrl=slew_r5(3'h5);
    27'h10DFF80, // [26:16]-DPRIO address=0x10D; [15:8]-bit mask=0xFF; [7:7]-pma_tx_buf_cpen_ctrl=cp_l1(1'h1); [6:3]-pma_tx_buf_rx_det=mode_0(4'h0); [2:2]-pma_tx_buf_rx_det_pdb=rx_det_off(1'h0); [1:1]-pma_tx_buf_rx_det_output_sel=rx_det_pcie_out(1'h0); [0:0]-pma_tx_buf_res_cal_local=non_local(1'h0);
    27'h10EFFF0, // [26:16]-DPRIO address=0x10E; [15:8]-bit mask=0xFF; [7:4]-pma_tx_buf_dft_sel=dft_disabled(4'hF); [3:0]-pma_tx_buf_lst=atb_disabled(4'h0);
    27'h10F8703, // [26:16]-DPRIO address=0x10F; [15:8]-bit mask=0x87; [7:7]-pma_tx_buf_cdr_cp_calibration_en=cdr_cp_cal_disable(1'h0); [2:1]-pma_tx_ser_control_clks_divtx_aibtx=no_dft_control_clkdivtx_clkaibtx(2'h1); [0:0]-pma_tx_ser_ser_powerdown=normal_poweron_ser(1'h1);
    27'h110FF02, // [26:16]-DPRIO address=0x110; [15:8]-bit mask=0xFF; [7:7]-pma_tx_buf_chgpmp_current_up_trim=cp_current_trimming_up_setting0(1'h0); [6:6]-pma_tx_buf_chgpmp_current_dn_trim=cp_current_trimming_dn_setting0(1'h0); [5:3]-pma_tx_ser_ser_clk_divtx_user_sel=divtx_user_off(3'h0); [2:0]-pma_cgb_ser_mode=thirty_two_bit(3'h2);
    27'h112DD01, // [26:16]-DPRIO address=0x112; [15:8]-bit mask=0xDD; [7:6]-pma_tx_buf_vreg_output=vccdreg_nominal(2'h0); [4:3]-pma_cgb_observe_cgb_clocks=observe_nothing(2'h0); [2:2]-pma_cgb_bitslip_enable=disable_bitslip(1'h0); [0:0]-pma_cgb_cgb_power_down=normal_cgb(1'h1);
    27'h113FF00, // [26:16]-DPRIO address=0x113; [15:8]-bit mask=0xFF; [7:5]-pma_tx_buf_vreg_output=vccdreg_nominal(3'h0); [4:0]-pma_cgb_vccdreg_output=vccdreg_nominal(5'h0);
    27'h114F702, // [26:16]-DPRIO address=0x114; [15:8]-bit mask=0xF7; [7:5]-pma_tx_buf_chgpmp_current_dn_trim=cp_current_trimming_dn_setting0(3'h0); [4:4]-pma_tx_buf_duty_cycle_input_polarity=dcc_input_pos(1'h0); [2:2]-pma_tx_buf_idle_ctrl=id_cpen_on(1'h0); [1:0]-pma_tx_buf_duty_cycle_correction_bandwidth=dcc_bw_2(2'h2);
    27'h115F070, // [26:16]-DPRIO address=0x115; [15:8]-bit mask=0xF0; [7:4]-pma_tx_buf_term_n_tune=rterm_n7(4'h7);
    27'h119EF00, // [26:16]-DPRIO address=0x119; [15:8]-bit mask=0xEF; [7:5]-pma_tx_buf_chgpmp_current_up_trim=cp_current_trimming_up_setting0(3'h0); [3:2]-pma_cgb_x1_div_m_sel=divbypass(2'h0); [1:1]-pma_cgb_pcie_gen3_bitwidth=pciegen3_wide(1'h0); [0:0]-pma_tx_ser_pcie_gen=non_pcie(1'h0);
    27'h11AFF00, // [26:16]-DPRIO address=0x11A; [15:8]-bit mask=0xFF; [7:4]-pma_rx_buf_ctle_ac_gain=0(4'h0); [3:0]-pma_rx_buf_vga_dc_gain=0(4'h0);
    27'h11BDF49, // [26:16]-DPRIO address=0x11B; [15:8]-bit mask=0xDF; [7:7]-pma_rx_buf_bodybias_select=bodybias_sel1(1'h0); [6:6]-pma_rx_buf_bodybias_enable=bodybias_en(1'h1); [4:3]-pma_rx_buf_vcm_sel=vcm_l1(2'h1); [2:2]-pma_rx_buf_ctle_oc_sign=add_i_2_p_eq(1'h0); [1:1]-pma_rx_buf_qpi_enable=non_qpi_mode(1'h0); [0:0]-pma_rx_buf_pdb_rx=normal_rx_on(1'h1);
    27'h11CFF80, // [26:16]-DPRIO address=0x11C; [15:8]-bit mask=0xFF; [7:5]-pma_rx_buf_term_sel=r_r4(3'h4); [4:0]-pma_rx_buf_ctle_eq_gain=0(5'h0);
    27'h11D8100, // [26:16]-DPRIO address=0x11D; [15:8]-bit mask=0x81; [7:7]-pma_tx_buf_calibration_resistor_value=res_setting0(1'h0); [0:0]-pma_rx_buf_xrx_path_xcdr_deser_xcdr_loopback_mode=loopback_disabled(1'h0);
    27'h11EFF7B, // [26:16]-DPRIO address=0x11E; [15:8]-bit mask=0xFF; [7:7]-pma_rx_buf_ctle_eq_gain=0(1'h0); [6:6]-pma_rx_buf_tia_sel=tia_sel_1(1'h1); [5:5]-pma_rx_buf_vga_halfbw_en=vga_half_bw_enabled(1'h1); [4:3]-pma_rx_buf_ctle_oc_ib_sel=ib_oc_bw3(2'h3); [2:0]-pma_rx_buf_ctle_rf_cal=3(3'h3);
    27'h11F7B10, // [26:16]-DPRIO address=0x11F; [15:8]-bit mask=0x7B; [6:6]-pma_rx_buf_rx_lfeq_enable=rx_lfeq_disable(1'h0); [5:4]-pma_rx_buf_eq_bw_sel=eq_bw_1(2'h1); [3:3]-pma_rx_buf_clk_divrx_en=normal_clk(1'h0); [1:1]-pma_rx_buf_bypass_ctle_rf_cal=use_dprio_rfcal(1'h0); [0:0]-pma_rx_buf_vga_dc_gain=0(1'h0);
    27'h120FF34, // [26:16]-DPRIO address=0x120; [15:8]-bit mask=0xFF; [7:7]-pma_tx_buf_tri_driver=tri_driver_disable(1'h0); [6:6]-pma_tx_buf_duty_cycle_correction_reference1=dcc_ref1_4(1'h0); [5:4]-pma_rx_buf_vcm_current_add=vcm_current_3(2'h3); [3:0]-pma_rx_buf_vcm_cal_i=4(4'h4);
    27'h121BF30, // [26:16]-DPRIO address=0x121; [15:8]-bit mask=0xBF; [7:7]-pma_rx_buf_term_tri_enable=disable_tri(1'h0); [5:4]-pma_rx_buf_const_gm_en=cgm_en_3(2'h3); [3:3]-pma_rx_buf_refclk_en=disable(1'h0); [2:0]-pma_rx_buf_offset_cancellation_coarse=coarse_setting_0(3'h0);
    27'h122FF03, // [26:16]-DPRIO address=0x122; [15:8]-bit mask=0xFF; [7:2]-pma_rx_buf_rx_atb_select=atb_disable(6'h0); [1:1]-pma_rx_dfe_pdb=dfe_enable(1'h1); [0:0]-pma_rx_buf_sel_vcm_tia=vocm_tia_fixed(1'h1);
    27'h123FF00, // [26:16]-DPRIO address=0x123; [15:8]-bit mask=0xFF; [7:6]-pma_rx_dfe_oc_sa_vrefe=0(2'h0); [5:5]-pma_rx_dfe_oc_sa_vrefo_sgn=oc_sa_vrefo_sgn_0(1'h0); [4:0]-pma_rx_dfe_oc_sa_vrefo=0(5'h0);
    27'h124FF00, // [26:16]-DPRIO address=0x124; [15:8]-bit mask=0xFF; [7:7]-pma_rx_dfe_oc_sa_dpo_sgn=oc_sa_dpo_sgn_0(1'h0); [6:4]-pma_rx_dfe_oc_sa_dpo=0(3'h0); [3:3]-pma_rx_dfe_oc_sa_vrefe_sgn=oc_sa_vrefe_sgn_0(1'h0); [2:0]-pma_rx_dfe_oc_sa_vrefe=0(3'h0);
    27'h125FF00, // [26:16]-DPRIO address=0x125; [15:8]-bit mask=0xFF; [7:7]-pma_rx_dfe_oc_sa_dno_sgn=oc_sa_dno_sgn_0(1'h0); [6:2]-pma_rx_dfe_oc_sa_dno=0(5'h0); [1:0]-pma_rx_dfe_oc_sa_dpo=0(2'h0);
    27'h126FF00, // [26:16]-DPRIO address=0x126; [15:8]-bit mask=0xFF; [7:6]-pma_rx_dfe_oc_sa_dne=0(2'h0); [5:5]-pma_rx_dfe_oc_sa_dpe_sgn=oc_sa_dpe_sgn_0(1'h0); [4:0]-pma_rx_dfe_oc_sa_dpe=0(5'h0);
    27'h127FF00, // [26:16]-DPRIO address=0x127; [15:8]-bit mask=0xFF; [7:7]-pma_rx_dfe_oc_sa_cdrpo_sgn=oc_sa_cdrpo_sgn_0(1'h0); [6:4]-pma_rx_dfe_oc_sa_cdrpo=0(3'h0); [3:3]-pma_rx_dfe_oc_sa_dne_sgn=oc_sa_dne_sgn_0(1'h0); [2:0]-pma_rx_dfe_oc_sa_dne=0(3'h0);
    27'h128FF00, // [26:16]-DPRIO address=0x128; [15:8]-bit mask=0xFF; [7:7]-pma_rx_dfe_oc_sa_cdrno_sgn=oc_sa_cdrno_sgn_0(1'h0); [6:2]-pma_rx_dfe_oc_sa_cdrno=0(5'h0); [1:0]-pma_rx_dfe_oc_sa_cdrpo=0(2'h0);
    27'h129FF00, // [26:16]-DPRIO address=0x129; [15:8]-bit mask=0xFF; [7:6]-pma_rx_dfe_oc_sa_cdrne=0(2'h0); [5:5]-pma_rx_dfe_oc_sa_cdrpe_sgn=oc_sa_cdrpe_sgn_0(1'h0); [4:0]-pma_rx_dfe_oc_sa_cdrpe=0(5'h0);
    27'h12AFF00, // [26:16]-DPRIO address=0x12A; [15:8]-bit mask=0xFF; [7:7]-pma_rx_dfe_oc_sa_cdr0o_sgn=oc_sa_cdr0o_sgn_0(1'h0); [6:4]-pma_rx_dfe_oc_sa_cdr0o=0(3'h0); [3:3]-pma_rx_dfe_oc_sa_cdrne_sgn=oc_sa_cdrne_sgn_0(1'h0); [2:0]-pma_rx_dfe_oc_sa_cdrne=0(3'h0);
    27'h12BFF00, // [26:16]-DPRIO address=0x12B; [15:8]-bit mask=0xFF; [7:7]-pma_rx_dfe_oc_sa_cdr0e_sgn=oc_sa_cdr0e_sgn_0(1'h0); [6:2]-pma_rx_dfe_oc_sa_cdr0e=0(5'h0); [1:0]-pma_rx_dfe_oc_sa_cdr0o=0(2'h0);
    27'h12CFF00, // [26:16]-DPRIO address=0x12C; [15:8]-bit mask=0xFF; [7:6]-pma_rx_dfe_oc_sa_odie=0(2'h0); [5:5]-pma_rx_dfe_oc_sa_odio_sgn=oc_sa_odio_sgn_0(1'h0); [4:0]-pma_rx_dfe_oc_sa_odio=0(5'h0);
    27'h12DFF00, // [26:16]-DPRIO address=0x12D; [15:8]-bit mask=0xFF; [7:7]-pma_rx_dfe_dft_osc_sel=dft_osc_even(1'h0); [6:6]-pma_rx_dfe_tap1_sgn=tap1_sign_0(1'h0); [5:5]-pma_rx_dfe_latch_xcouple_disable=latch_xcouple_enable(1'h0); [4:4]-pma_rx_dfe_sel_oc_en=off_canc_disable(1'h0); [3:3]-pma_rx_dfe_oc_sa_odie_sgn=oc_sa_odie_sgn_0(1'h0); [2:0]-pma_rx_dfe_oc_sa_odie=0(3'h0);
    27'h12EFF50, // [26:16]-DPRIO address=0x12E; [15:8]-bit mask=0xFF; [7:6]-pma_rx_buf_eq_sel=eq_sel_1(2'h1); [5:4]-pma_rx_buf_ctle_tia_isel=ib_tia_bw1(2'h1); [3:0]-pma_rx_dfe_sel_probe_tstmx=probe_tstmx_none(4'h0);
    27'h12FFF00, // [26:16]-DPRIO address=0x12F; [15:8]-bit mask=0xFF; [7:7]-pma_rx_dfe_pdb_tap_10t15=tap10t15_dfe_powerdown(1'h0); [6:6]-pma_rx_dfe_pdb_tap_4t9=tap4t9_dfe_powerdown(1'h0); [5:0]-pma_rx_dfe_tap1_coeff=0(6'h0);
    27'h130FF40, // [26:16]-DPRIO address=0x130; [15:8]-bit mask=0xFF; [7:6]-pma_rx_dfe_tapsum_bw_sel=tapsum_medbw(2'h1); [5:5]-pma_rx_dfe_tap2_sgn=tap2_sign_0(1'h0); [4:0]-pma_rx_dfe_tap2_coeff=0(5'h0);
    27'h131FF40, // [26:16]-DPRIO address=0x131; [15:8]-bit mask=0xFF; [7:7]-pma_rx_dfe_pdb_edge_pst_h1=cdr_pst_h1_disable(1'h0); [6:6]-pma_rx_dfe_pdb_edge_pre_h1=cdr_pre_h1_enable(1'h1); [5:5]-pma_rx_dfe_tap3_sgn=tap3_sign_0(1'h0); [4:0]-pma_rx_dfe_tap3_coeff=0(5'h0);
    27'h132FF85, // [26:16]-DPRIO address=0x132; [15:8]-bit mask=0xFF; [7:7]-cdr_pll_cdr_powerdown_mode=power_up(1'h1); [6:6]-cdr_pll_cdr_phaselock_mode=no_ignore_lock(1'h0); [5:4]-cdr_pll_reverse_serial_loopback=no_loopback(2'h0); [3:0]-cdr_pll_set_cdr_vco_speed_fix=92(4'h5);
    27'h133EF60, // [26:16]-DPRIO address=0x133; [15:8]-bit mask=0xEF; [7:5]-cdr_pll_chgpmp_current_up_pd=cp_current_pd_up_setting3(3'h3); [3:1]-cdr_pll_chgpmp_vccreg=vreg_fw0(3'h0); [0:0]-cdr_pll_gpon_lck2ref_control=gpon_lck2ref_off(1'h0);
    27'h134FF0A, // [26:16]-DPRIO address=0x134; [15:8]-bit mask=0xFF; [7:7]-cdr_pll_txpll_hclk_driver_enable=hclk_off(1'h0); [6:6]-pma_rx_buf_vcm_sel_vccref=5(1'h0); [5:4]-cdr_pll_bbpd_data_pattern_filter_select=bbpd_data_pat_off(2'h0); [3:3]-pma_rx_buf_vcm_sel_vccref=5(1'h1); [2:0]-cdr_pll_lck2ref_delay_control=lck2ref_delay_2(3'h2);
    27'h135FF4E, // [26:16]-DPRIO address=0x135; [15:8]-bit mask=0xFF; [7:7]-cdr_pll_txpll_hclk_driver_enable=hclk_off(1'h0); [6:6]-pma_rx_buf_vcm_sel_vccref=5(1'h1); [5:5]-cdr_pll_chgpmp_current_up_trim=cp_current_trimming_up_setting0(1'h0); [4:4]-cdr_pll_lf_ripple_cap=lf_no_ripple(1'h0); [3:2]-cdr_pll_lf_resistor_pd=lf_pd_setting3(2'h3); [1:0]-cdr_pll_lf_resistor_pfd=lf_pfd_setting2(2'h2);
    27'h136FF0C, // [26:16]-DPRIO address=0x136; [15:8]-bit mask=0xFF; [7:6]-cdr_pll_vco_underrange_voltage=vco_underange_off(2'h0); [5:4]-cdr_pll_vco_overrange_voltage=vco_overrange_off(2'h0); [3:0]-cdr_pll_set_cdr_vco_speed_fix=92(4'hC);
    27'h137FF0B, // [26:16]-DPRIO address=0x137; [15:8]-bit mask=0xFF; [7:7]-cdr_pll_diag_loopback_enable=no_diag_rev_loopback(1'h0); [6:6]-cdr_pll_cdr_d2a_enb=bti_d2a_disable(1'h0); [5:2]-cdr_pll_set_cdr_vco_speed=2(4'h2); [1:1]-cdr_pll_set_cdr_v2i_enable=enable_v2i_bias(1'h1); [0:0]-cdr_pll_set_cdr_vco_reset=vco_normal(1'h1);
    27'h138FF82, // [26:16]-DPRIO address=0x138; [15:8]-bit mask=0xFF; [7:7]-cdr_pll_direct_fb=direct_fb(1'h1); [6:6]-cdr_pll_cdr_odi_select=sel_cdr(1'h0); [5:5]-cdr_pll_auto_reset_on=auto_reset_off(1'h0); [4:0]-cdr_pll_set_cdr_vco_speed_pciegen3=cdr_vco_max_speedbin_pciegen3(5'h2);
    27'h139FF1A, // [26:16]-DPRIO address=0x139; [15:8]-bit mask=0xFF; [7:7]-cdr_pll_pd_fastlock_mode=fast_lock_disable(1'h0); [6:6]-cdr_pll_chgpmp_replicate=disable_replica_bias_ctrl(1'h0); [5:3]-cdr_pll_chgpmp_current_dn_pd=cp_current_pd_dn_setting3(3'h3); [2:0]-cdr_pll_chgpmp_current_pfd=cp_current_pfd_setting2(3'h2);
    27'h13AFF5B, // [26:16]-DPRIO address=0x13A; [15:8]-bit mask=0xFF; [7:6]-cdr_pll_fref_clklow_div=2(2'h1); [5:3]-cdr_pll_pd_l_counter=2(3'h3); [2:0]-cdr_pll_pfd_l_counter=2(3'h3);
    27'h13BFF10, // [26:16]-DPRIO address=0x13B; [15:8]-bit mask=0xFF; [7:0]-cdr_pll_mcnt_div=16(8'h10);
    27'h13CFF25, // [26:16]-DPRIO address=0x13C; [15:8]-bit mask=0xFF; [7:4]-cdr_pll_set_cdr_vco_speed_pciegen3=cdr_vco_max_speedbin_pciegen3(4'h2); [3:2]-cdr_pll_ncnt_div=2(2'h1); [1:1]-pma_tx_buf_calibration_resistor_value=res_setting0(1'h0); [0:0]-pma_rx_deser_rst_n_adapt_odi=no_rst_adapt_odi(1'h1);
    27'h13DFF00, // [26:16]-DPRIO address=0x13D; [15:8]-bit mask=0xFF; [7:6]-cdr_pll_atb_select_control=atb_off(2'h0); [5:3]-cdr_pll_fref_mux_select=fref_mux_cdr_refclk(3'h0); [2:0]-cdr_pll_clklow_mux_select=clklow_mux_cdr_fbclk(3'h0);
    27'h13EFF80, // [26:16]-DPRIO address=0x13E; [15:8]-bit mask=0xFF; [7:7]-pma_cdr_refclk_receiver_detect_src=iqclk_src(1'h1); [6:3]-cdr_pll_atb_select_control=atb_off(4'h0); [2:0]-cdr_pll_chgpmp_testmode=cp_test_disable(3'h0);
    27'h13FFF86, // [26:16]-DPRIO address=0x13F; [15:8]-bit mask=0xFF; [7:7]-pma_rx_deser_deser_powerdown=deser_power_up(1'h1); [6:6]-pma_rx_deser_sd_clk=sd_clk_disabled(1'h0); [5:4]-pma_rx_deser_clkdiv_source=vco_bypass_normal(2'h0); [3:0]-pma_rx_deser_deser_factor=deser_32b(4'h6);
    27'h140FF06, // [26:16]-DPRIO address=0x140; [15:8]-bit mask=0xFF; [7:6]-pma_rx_deser_force_clkdiv_for_testing=normal_clkdiv(2'h0); [5:3]-pma_rx_deser_force_adaptation_outputs=normal_outputs(3'h0); [2:0]-pma_rx_deser_clkdivrx_user_mode=clkdivrx_user_div33(3'h6);
    27'h1421F0F, // [26:16]-DPRIO address=0x142; [15:8]-bit mask=0x1F; [4:4]-pma_rx_buf_xrx_path_xcdr_deser_xcdr_loopback_mode=loopback_disabled(1'h0); [3:1]-cdr_pll_loop_filter_bias_select=lpflt_bias_7(3'h7); [0:0]-pma_rx_deser_bitslip_bypass=bs_bypass_yes(1'h1);
    27'h143FF00, // [26:16]-DPRIO address=0x143; [15:8]-bit mask=0xFF; [7:2]-pma_rx_odi_vert_threshold=vert_0(6'h0); [1:1]-pma_rx_dfe_dft_hilospeed_sel=dft_osc_lospeed_path(1'h0); [0:0]-pma_rx_odi_enable_cdr_lpbk=disable_lpbk(1'h0);
    27'h144FFA0, // [26:16]-DPRIO address=0x144; [15:8]-bit mask=0xFF; [7:7]-pma_rx_odi_monitor_bw_sel=bw_4(1'h1); [6:6]-pma_rx_odi_step_ctrl_sel=dprio_mode(1'h0); [5:5]-pma_rx_odi_phase_steps_64_vs_128=phase_steps_64(1'h1); [4:4]-pma_rx_odi_step_ctrl_sel=dprio_mode(1'h0); [3:3]-cdr_pll_cal_vco_count_length=sel_8b_count(1'h0); [2:2]-pma_adapt_adp_odi_dlev_sel=radp_odi_dlev_sel_0(1'h0); [1:1]-pma_rx_buf_xrx_path_xcdr_deser_xcdr_loopback_mode=loopback_disabled(1'h0); [0:0]-pma_rx_buf_vcm_sel_vccref=5(1'h0);
    27'h145FFC0, // [26:16]-DPRIO address=0x145; [15:8]-bit mask=0xFF; [7:7]-pma_rx_odi_monitor_bw_sel=bw_4(1'h1); [6:0]-pma_rx_odi_phase_steps_sel=step33(7'h40);
    27'h146FF00, // [26:16]-DPRIO address=0x146; [15:8]-bit mask=0xFF; [7:4]-pma_rx_dfe_tap5_coeff=0(4'h0); [3:0]-pma_rx_dfe_tap4_coeff=0(4'h0);
    27'h147FF00, // [26:16]-DPRIO address=0x147; [15:8]-bit mask=0xFF; [7:7]-pma_rx_buf_sel_vcm_ctle=vocm_eq_gndref(1'h0); [6:6]-pma_rx_dfe_tap6_sgn=tap6_sign_0(1'h0); [5:2]-pma_rx_dfe_tap6_coeff=0(4'h0); [1:1]-pma_rx_dfe_tap5_sgn=tap5_sign_0(1'h0); [0:0]-pma_rx_dfe_tap4_sgn=tap4_sign_0(1'h0);
    27'h148FF01, // [26:16]-DPRIO address=0x148; [15:8]-bit mask=0xFF; [7:7]-pma_adapt_adp_force_freqlock=radp_force_freqlock_use(1'h0); [6:6]-pma_adapt_adp_tx_adp_accumulate=radp_tx_adp_accumulate_0(1'h0); [5:5]-pma_adapt_adp_dc_ctle_en=radp_dc_ctle_en_disable(1'h0); [4:4]-pma_adapt_adp_vga_en=radp_vga_en_disable(1'h0); [3:3]-pma_adapt_adp_dlev_en=radp_dlev_en_disable(1'h0); [2:2]-pma_rx_buf_eq_cdgen_sel=eq_cdgen_2(1'h0); [1:1]-pma_adapt_adp_dfe_en=radp_dfe_en_disable(1'h0); [0:0]-pma_adapt_adp_rstn=radp_rstn_1(1'h1);
    27'h149FF80, // [26:16]-DPRIO address=0x149; [15:8]-bit mask=0xFF; [7:7]-pma_adapt_adp_vga_bypass=radp_vga_bypass_bypass(1'h1); [6:6]-pma_adapt_adp_load_sig_sel=radp_load_sig_sel_from_interanl(1'h0); [5:0]-pma_adapt_adp_status_sel=radp_status_sel_0(6'h0);
    27'h14AFF00, // [26:16]-DPRIO address=0x14A; [15:8]-bit mask=0xFF; [7:7]-pma_adapt_adp_pat_spec_sign_value=radp_pat_spec_sign_value_0(1'h0); [6:6]-pma_adapt_adp_ac_ctle_cocurrent_mode_sel=radp_ac_ctle_cocurrent_mode_sel_mode_1(1'h0); [5:5]-pma_adapt_adp_dlev_hold_en=radp_dlev_hold_en_not_hold(1'h0); [4:1]-pma_adapt_adp_pcie_hold_sel=0(4'h0); [0:0]-pma_adapt_adp_pcs_option=radp_pcs_option_0(1'h0);
    27'h14BFFBB, // [26:16]-DPRIO address=0x14B; [15:8]-bit mask=0xFF; [7:6]-pma_adapt_adp_po_actslp_ratio=radp_po_actslp_ratio_10_percent(2'h2); [5:4]-pma_adapt_adp_bist_mode_sel=radp_bist_mode_sel_prbs31(2'h3); [3:0]-pma_adapt_adp_oc_accum_depth=11(4'hB);
    27'h14CFF0C, // [26:16]-DPRIO address=0x14C; [15:8]-bit mask=0xFF; [7:7]-pma_adapt_adp_dfe_hold_en=radp_dfe_hold_en_not_hold(1'h0); [6:5]-pma_adapt_adp_dfe_tap_sel_en=radp_dfe_tap_sel_en_no(2'h0); [4:3]-pma_adapt_adp_ac_ctle_ph1_win=radp_ac_ctle_ph1_win_2p19(2'h1); [2:1]-pma_adapt_adp_po_sleep_win=radp_po_sleep_win_2_sec(2'h2); [0:0]-pma_adapt_adp_adapt_start=radp_adapt_start_0(1'h0);
    27'h14DFF04, // [26:16]-DPRIO address=0x14D; [15:8]-bit mask=0xFF; [7:7]-pma_adapt_adp_tx_adp_en=radp_tx_adp_en_0(1'h0); [6:6]-pma_adapt_adp_dc_ctle_hold_en=radp_dc_ctle_hold_en_not_hold(1'h0); [5:5]-pma_adapt_adp_dlev_onetime=radp_dlev_onetime_disable(1'h0); [4:4]-pma_adapt_adp_vga_hold_en=radp_vga_hold_en_not_hold(1'h0); [3:3]-pma_adapt_adp_po_en=radp_po_en_disable(1'h0); [2:1]-pma_adapt_adp_dlev_initial_value=radp_dlev_initial_value_38(2'h2); [0:0]-pma_adapt_adp_odi_spec_sel=radp_odi_spec_sel_0(1'h0);
    27'h14E7F68, // [26:16]-DPRIO address=0x14E; [15:8]-bit mask=0x7F; [6:4]-pma_adapt_adp_dfe_onetime_threshold=radp_dfe_onetime_threshold_2048(3'h6); [3:0]-pma_adapt_adp_dc_ctle_accum_depth=8(4'h8);
    27'h14FFF00, // [26:16]-DPRIO address=0x14F; [15:8]-bit mask=0xFF; [7:5]-pma_rx_dfe_tap8_coeff=0(3'h0); [4:4]-pma_rx_dfe_tap7_sgn=tap7_sign_0(1'h0); [3:0]-pma_rx_dfe_tap7_coeff=0(4'h0);
    27'h150FF00, // [26:16]-DPRIO address=0x150; [15:8]-bit mask=0xFF; [7:7]-pma_rx_dfe_tap11_sgn=tap11_sign_0(1'h0); [6:6]-pma_rx_dfe_tap10_sgn=tap10_sign_0(1'h0); [5:5]-pma_rx_dfe_pdb_tapsum=tapsum_disable(1'h0); [4:4]-pma_rx_dfe_tap9_sgn=tap9_sign_0(1'h0); [3:1]-pma_rx_dfe_tap9_coeff=0(3'h0); [0:0]-pma_rx_dfe_tap8_sgn=tap8_sign_0(1'h0);
    27'h151FF80, // [26:16]-DPRIO address=0x151; [15:8]-bit mask=0xFF; [7:7]-pma_rx_buf_eq_cdgen_sel=eq_cdgen_2(1'h1); [6:6]-pma_rx_dfe_tap12_sgn=tap12_sign_0(1'h0); [5:3]-pma_rx_dfe_tap11_coeff=0(3'h0); [2:0]-pma_rx_dfe_tap10_coeff=0(3'h0);
    27'h152FF00, // [26:16]-DPRIO address=0x152; [15:8]-bit mask=0xFF; [7:7]-pma_rx_dfe_dft_en=dft_disable(1'h0); [6:6]-pma_rx_dfe_tap13_sgn=tap13_sign_0(1'h0); [5:3]-pma_rx_dfe_tap13_coeff=0(3'h0); [2:0]-pma_rx_dfe_tap12_coeff=0(3'h0);
    27'h153FF00, // [26:16]-DPRIO address=0x153; [15:8]-bit mask=0xFF; [7:7]-pma_rx_dfe_tap15_sgn=tap15_sign_0(1'h0); [6:4]-pma_rx_dfe_tap15_coeff=0(3'h0); [3:3]-pma_rx_dfe_tap14_sgn=tap14_sign_0(1'h0); [2:0]-pma_rx_dfe_tap14_coeff=0(3'h0);
    27'h154FF00, // [26:16]-DPRIO address=0x154; [15:8]-bit mask=0xFF; [7:6]-pma_rx_odi_vreg_voltage_sel=vreg0(2'h0); [5:0]-pma_rx_dfe_vref_coeff=0(6'h0);
    27'h155FF40, // [26:16]-DPRIO address=0x155; [15:8]-bit mask=0xFF; [7:7]-pma_tx_buf_dcd_clk_div_ctrl=dcd_ck_div128(1'h0); [6:5]-pma_tx_buf_duty_cycle_correction_bandwidth_dn=dcd_bw_dn_2(2'h2); [4:0]-pma_rx_dfe_atb_select=atb_disable(5'h0);
    27'h1567F10, // [26:16]-DPRIO address=0x156; [15:8]-bit mask=0x7F; [6:6]-pma_adapt_adp_frame_out_sel=radp_frame_out_sel_select_a(1'h0); [5:5]-pma_adapt_adp_frame_en=radp_frame_en_disable(1'h0); [4:4]-pma_adapt_adp_adapt_control_sel=radp_adapt_control_sel_from_cram(1'h1); [3:3]-pma_rx_buf_dfe_h1_sw_togg=dfe_h1_tog_neg(1'h0); [2:2]-pma_rx_buf_dfe_h1_cal_en=dfe_h1_cal_disable(1'h0); [1:1]-pma_rx_dfe_odi_h1_sign=odi_h1_pos(1'h0); [0:0]-pma_rx_dfe_odi_dlev_sign=odi_dlev_pos(1'h0);
    27'h157FF02, // [26:16]-DPRIO address=0x157; [15:8]-bit mask=0xFF; [7:7]-pma_adapt_adp_dc_ctle_initial_load=radp_dc_ctle_initial_load_0(1'h0); [6:6]-pma_adapt_adp_vga_initial_load=radp_vga_initial_load_0(1'h0); [5:5]-pma_adapt_adp_dlev_initial_load=radp_dlev_initial_load_0(1'h0); [4:4]-pma_adapt_adp_ac_ctle_hold_en=radp_ac_ctle_hold_en_not_hold(1'h0); [3:2]-pma_adapt_adp_odi_bit_sel=radp_odi_bit_sel_all_bits(2'h0); [1:0]-pma_adapt_adp_po_initwait=radp_po_initwait_10sec(2'h2);
    27'h158F920, // [26:16]-DPRIO address=0x158; [15:8]-bit mask=0xF9; [7:7]-pma_adapt_adp_oc_hold_en=radp_oc_hold_en_not_hold(1'h0); [6:6]-pma_adapt_adp_vga_ctle_low_limit=radp_vga_ctle_low_limit_0(1'h0); [5:5]-pma_adapt_adp_odi_control_sel=radp_odi_control_sel_from_cram(1'h1); [4:4]-pma_adapt_adp_bist_errcount_rstn=radp_bist_errcount_rstn_0(1'h0); [3:3]-pma_adapt_adp_oc_onetime=radp_oc_onetime_disable(1'h0); [0:0]-pma_adapt_adp_ac_ctle_initial_load=radp_ac_ctle_initial_load_0(1'h0);
    27'h159FF95, // [26:16]-DPRIO address=0x159; [15:8]-bit mask=0xFF; [7:0]-cdr_pll_set_cdr_input_freq_range=149(8'h95);
    27'h15AE180, // [26:16]-DPRIO address=0x15A; [15:8]-bit mask=0xE1; [7:7]-pma_tx_ser_ser_dftppm_clkselect=aib_dftppm(1'h1); [6:6]-pma_rx_deser_tdr_mode=select_bbpd_data(1'h0); [5:5]-cdr_pll_vreg_output=vccdreg_nominal(1'h0); [0:0]-pma_adapt_adp_tx_up_dn_flip=radp_tx_up_dn_flip_0(1'h0);
    27'h15BFFC6, // [26:16]-DPRIO address=0x15B; [15:8]-bit mask=0xFF; [7:7]-pma_rx_deser_deser_aibck_en=enable(1'h1); [6:4]-pma_adapt_adp_vga_onetime_threshold=radp_vga_onetime_threshold_512(3'h4); [3:1]-pma_adapt_adp_dc_ctle_onetime_threshold=radp_dc_ctle_onetime_threshold_256(3'h3); [0:0]-pma_adapt_adp_pcie_eqz=radp_pcie_eqz_non_pcie_mode(1'h0);
    27'h15CFFD6, // [26:16]-DPRIO address=0x15C; [15:8]-bit mask=0xFF; [7:7]-pma_adapt_adp_ctle_bypass_dc=radp_ctle_bypass_dc_bypass(1'h1); [6:6]-pma_tx_ser_ser_aibck_enable=enable(1'h1); [5:5]-pma_rx_deser_pcie_g3_hclk_en=disable_hclk_div2(1'h0); [4:4]-pma_adapt_adp_vga_accum_depth=9(1'h1); [3:0]-pma_adapt_adp_dlev_accum_depth=6(4'h6);
    27'h15DFE00, // [26:16]-DPRIO address=0x15D; [15:8]-bit mask=0xFE; [7:6]-cdr_pll_vreg_output=vccdreg_nominal(2'h0); [5:5]-pma_adapt_adp_oc_initial_load=radp_oc_initial_load_0(1'h0); [4:4]-pma_adapt_adp_oc_en=radp_oc_en_disable(1'h0); [3:1]-pma_adapt_adp_dfe_hold_sel=radp_dfe_hold_sel_no(3'h0);
    27'h15EFF63, // [26:16]-DPRIO address=0x15E; [15:8]-bit mask=0xFF; [7:5]-pma_adapt_adp_pat_spec_sign_avg_win=radp_pat_spec_sign_avg_win_256(3'h3); [4:4]-pma_adapt_adp_dfe_onetime=radp_dfe_onetime_disable(1'h0); [3:3]-pma_adapt_adp_bist_datapath_en=radp_bist_datapath_en_disable(1'h0); [2:2]-pma_adapt_adp_pat_spec_sign_force=radp_pat_spec_sign_force_generated_internally(1'h0); [1:1]-pma_adapt_adp_pat_dlev_sign_value=radp_pat_dlev_sign_value_1(1'h1); [0:0]-pma_adapt_adp_pat_dlev_sign_force=radp_pat_dlev_sign_force_determined_by_cram(1'h1);
    27'h15FCF0F, // [26:16]-DPRIO address=0x15F; [15:8]-bit mask=0xCF; [7:7]-pma_adapt_adp_vga_onetime=radp_vga_onetime_disable(1'h0); [6:6]-pma_adapt_adp_clkout_div_sel=radp_clkout_div_sel_div2_4cycle(1'h0); [3:3]-pma_adapt_adp_ctle_bypass_ac=radp_ctle_bypass_ac_bypass(1'h1); [2:1]-pma_adapt_adp_pat_trans_filter=radp_pat_trans_filter_5(2'h3); [0:0]-pma_adapt_adp_ac_ctle_mode_sel=radp_ac_ctle_mode_sel_concurrent(1'h1);
    27'h160FF0B, // [26:16]-DPRIO address=0x160; [15:8]-bit mask=0xFF; [7:7]-pma_rx_deser_deser_aib_dftppm_en=disable(1'h0); [6:6]-pma_tx_ser_ser_aibck_x1_override=normal(1'h0); [5:5]-pma_adapt_adp_clkgate_enb=radp_clkgate_enb_disable(1'h0); [4:4]-pma_adapt_adp_dfe_tap1_initial_load=radp_dfe_tap1_initial_load_0(1'h0); [3:2]-pma_adapt_adp_dc_ctle_initial_value=radp_dc_ctle_initial_value_16(2'h2); [1:0]-pma_adapt_adp_ac_ctle_initial_value=radp_ac_ctle_initial_value_8(2'h3);
    27'h161FF71, // [26:16]-DPRIO address=0x161; [15:8]-bit mask=0xFF; [7:7]-pma_adapt_adp_ac_ctle_en=radp_ac_ctle_en_disable(1'h0); [6:6]-pma_adapt_adp_dfe_fxtap_bypass=radp_dfe_fxtap_bypass_bypass(1'h1); [5:5]-pma_adapt_adp_dlev_bypass=radp_dlev_bypass_bypass(1'h1); [4:3]-pma_adapt_adp_ac_ctle_cal_win=radp_ac_ctle_cal_win_4(2'h2); [2:1]-pma_adapt_adp_dlev_sel=radp_dlev_sel_mux(2'h0); [0:0]-pma_adapt_adp_pat_trans_only_en=radp_pat_trans_only_en_enable(1'h1);
    27'h162FF48, // [26:16]-DPRIO address=0x162; [15:8]-bit mask=0xFF; [7:6]-pma_adapt_adp_pat_dlev_sign_avg_win=radp_pat_dlev_sign_avg_win_2x(2'h1); [5:4]-pma_adapt_adp_dfe_tap1_initial_value=radp_dfe_tap1_initial_value_0(2'h0); [3:2]-pma_adapt_adp_dc_ctle_mode_sel=radp_dc_ctle_mode_sel_mode_2(2'h2); [1:0]-pma_adapt_adp_dc_ctle_mode0_win_size=radp_dc_ctle_mode0_win_size_4_taps(2'h0);
    27'h163FF45, // [26:16]-DPRIO address=0x163; [15:8]-bit mask=0xFF; [7:7]-pma_adapt_adp_frame_odi_sel=radp_frame_odi_sel_deser_err(1'h0); [6:3]-pma_adapt_adp_dfe_accum_depth=8(4'h8); [2:0]-pma_adapt_adp_oc_onetime_threshold=radp_oc_onetime_threshold_1024(3'h5);
    27'h164FF78, // [26:16]-DPRIO address=0x164; [15:8]-bit mask=0xFF; [7:7]-pma_rx_deser_deser_aibck_x1=normal(1'h0); [6:4]-pma_adapt_adp_dlev_onetime_threshold=radp_dlev_onetime_threshold_4096(3'h7); [3:0]-pma_adapt_adp_dc_ctle_mode1_h1_ratio=8(4'h8);
    27'h165FF2E, // [26:16]-DPRIO address=0x165; [15:8]-bit mask=0xFF; [7:5]-pma_adapt_adp_vga_accum_depth=9(3'h1); [4:1]-pma_adapt_adp_dc_ctle_mode2_h2_limit=7(4'h7); [0:0]-pma_adapt_adp_pcie_adp_bypass=radp_pcie_adp_bypass_no(1'h0);
    27'h166FF8F, // [26:16]-DPRIO address=0x166; [15:8]-bit mask=0xFF; [7:5]-pma_adapt_adp_vga_dlev_offset=4(3'h4); [4:0]-pma_adapt_adp_vga_dlev_target=15(5'hF);
    27'h167FF01, // [26:16]-DPRIO address=0x167; [15:8]-bit mask=0xFF; [7:7]-pma_adapt_adp_frame_capture=radp_frame_capture_0(1'h0); [6:3]-pma_adapt_adp_dc_ctle_mode0_win_start=0(4'h0); [2:2]-pma_adapt_adp_dc_ctle_onetime=radp_dc_ctle_onetime_disable(1'h0); [1:0]-pma_adapt_adp_vga_initial_value=radp_vga_initial_value_4(2'h1);
    27'h168F722, // [26:16]-DPRIO address=0x168; [15:8]-bit mask=0xF7; [7:6]-cdr_pll_vreg_output=vccdreg_nominal(2'h0); [5:5]-pma_adapt_adp_odi_count_threshold=radp_odi_count_threshold_1e6(1'h1); [4:4]-pma_rx_buf_ctle_hires_bypass=ctle_hires_en(1'h0); [2:2]-pma_adapt_adp_odi_start=radp_odi_start_0(1'h0); [1:1]-pma_adapt_adp_odi_rstn=radp_odi_rstn_1(1'h1); [0:0]-pma_adapt_adp_odi_en=radp_odi_en_disable(1'h0);
    27'h169FFE4, // [26:16]-DPRIO address=0x169; [15:8]-bit mask=0xFF; [7:7]-pma_adapt_adp_oc_bypass=radp_oc_bypass_bypass(1'h1); [6:6]-pma_adapt_adp_odi_mode=radp_odi_mode_detect_errdata(1'h1); [5:3]-pma_adapt_adp_tx_accum_depth=4(3'h4); [2:2]-pma_adapt_adp_odi_dfe_spec_en=radp_odi_dfe_spec_en_enable(1'h1); [1:0]-pma_adapt_adp_odi_count_threshold=radp_odi_count_threshold_1e6(2'h0);
    27'h16FFE00, // [26:16]-DPRIO address=0x16F; [15:8]-bit mask=0xFE; [7:7]-cdr_pll_chgpmp_up_pd_trim_double=normal_up_trim_current(1'h0); [6:6]-cdr_pll_chgpmp_dn_pd_trim_double=normal_dn_trim_current(1'h0); [5:2]-pma_tx_buf_pm_cr2_tx_rx_mcgb_location_for_pcie=0(4'h0); [1:1]-pma_rx_buf_pm_cr2_rx_path_jtag_hys=hys_increase_disable(1'h0);
    27'h170FF00, // [26:16]-DPRIO address=0x170; [15:8]-bit mask=0xFF; [7:4]-cdr_pll_chgpmp_current_dn_trim=cp_current_trimming_dn_setting0(4'h0); [3:1]-cdr_pll_chgpmp_current_up_trim=cp_current_trimming_up_setting0(3'h0); [0:0]-pma_tx_ser_pcie_gen=non_pcie(1'h0);
    27'h171FF80, // [26:16]-DPRIO address=0x171; [15:8]-bit mask=0xFF; [7:5]-pma_tx_buf_duty_cycle_correction_reference1=dcc_ref1_4(3'h4); [4:1]-pma_rx_buf_pm_cr2_tx_rx_testmux_select=setting0(4'h0); [0:0]-pma_rx_buf_pm_cr2_tx_rx_cvp_mode=cvp_off(1'h0);
    27'h172F050, // [26:16]-DPRIO address=0x172; [15:8]-bit mask=0xF0; [7:5]-pma_tx_buf_duty_cycle_correction_reference2=dcc_ref2_2(3'h2); [4:4]-pma_rx_buf_eq_isel=eq_isel_1(1'h1);
    27'h173FF31, // [26:16]-DPRIO address=0x173; [15:8]-bit mask=0xFF; [7:4]-pma_rx_sd_sd_output_off=clk_divrx_2(4'h3); [3:0]-pma_rx_sd_sd_output_on=force_sd_output_on(4'h1);
    27'h174FF2C, // [26:16]-DPRIO address=0x174; [15:8]-bit mask=0xFF; [7:7]-pma_rx_buf_vga_ib_max_en=vga_ib_max_disable(1'h0); [6:6]-pma_rx_sd_sd_pdb=sd_off(1'h0); [5:5]-pma_rx_sd_sd_output_on=force_sd_output_on(1'h1); [4:0]-pma_rx_sd_sd_output_off=clk_divrx_2(5'hC);
    27'h175FF43, // [26:16]-DPRIO address=0x175; [15:8]-bit mask=0xFF; [7:4]-cdr_pll_set_cdr_vco_speed_pciegen3=cdr_vco_max_speedbin_pciegen3(4'h4); [3:0]-pma_rx_sd_sd_threshold=sdlv_3(4'h3);
    27'h176FF00, // [26:16]-DPRIO address=0x176; [15:8]-bit mask=0xFF; [7:6]-cdr_pll_clk90_dfe_trise_adj=clk90_dfe_tr0(2'h0); [5:3]-cdr_pll_clk270_dfe_tfall_adj=clk270_dfe_tf0(3'h0); [2:0]-cdr_pll_clk270_dfe_trise_adj=clk270_dfe_tr0(3'h0);
    27'h177FF00, // [26:16]-DPRIO address=0x177; [15:8]-bit mask=0xFF; [7:7]-cdr_pll_clk180_dfe_tfall_adj=clk180_dfe_tf0(1'h0); [6:4]-cdr_pll_clk180_dfe_trise_adj=clk180_dfe_tr0(3'h0); [3:1]-cdr_pll_clk90_dfe_tfall_adj=clk90_dfe_tf0(3'h0); [0:0]-cdr_pll_clk90_dfe_trise_adj=clk90_dfe_tr0(1'h0);
    27'h178FF00, // [26:16]-DPRIO address=0x178; [15:8]-bit mask=0xFF; [7:5]-cdr_pll_clk0_dfe_tfall_adj=clk0_dfe_tf0(3'h0); [4:2]-cdr_pll_clk0_dfe_trise_adj=clk0_dfe_tr0(3'h0); [1:0]-cdr_pll_clk180_dfe_tfall_adj=clk180_dfe_tf0(2'h0);
    27'h1797A02, // [26:16]-DPRIO address=0x179; [15:8]-bit mask=0x7A; [6:5]-pma_adapt_adp_po_gb_act2slp=radp_po_gb_act2slp_288ns(2'h0); [4:3]-pma_adapt_adp_po_gb_slp2act=radp_po_gb_slp2act_288ns(2'h0); [1:1]-pma_rx_odi_xrx_path_x119_rx_path_rstn_overrideb=use_sequencer(1'h1);
    27'h17A1F00, // [26:16]-DPRIO address=0x17A; [15:8]-bit mask=0x1F; [4:4]-pma_rx_deser_odi_adapt_bti_en=deser_bti_disable(1'h0); [3:3]-pma_rx_dfe_h1edge_bti_en=h1edge_bti_disable(1'h0); [2:2]-pma_rx_dfe_odi_bti_en=odi_bti_disable(1'h0); [1:1]-pma_rx_dfe_dfe_bti_en=dfe_bti_disable(1'h0); [0:0]-pma_rx_dfe_adapt_bti_en=adapt_bti_disable(1'h0);
    27'h17D8000, // [26:16]-DPRIO address=0x17D; [15:8]-bit mask=0x80; [7:7]-pma_tx_buf_pm_cr2_tx_rx_mcgb_location_for_pcie=0(1'h0);
    27'h200FF07, // [26:16]-DPRIO address=0x200; [15:8]-bit mask=0xFF; [7:7]-hssi_adapt_tx_txqpi_pullup_rst_val=reset_to_zero_txqpiu(1'h0); [6:6]-hssi_adapt_tx_rxqpi_pullup_rst_val=reset_to_zero_rxqpi(1'h0); [5:5]-hssi_adapt_tx_tx_qpi_mode_en=disable(1'h0); [4:0]-hssi_adapt_tx_datapath_mapping_mode=map_10g_2x2x_2x1x_fifo(5'h7);
    27'h2010706, // [26:16]-DPRIO address=0x201; [15:8]-bit mask=0x07; [2:2]-hssi_adapt_tx_qpi_sr_enable=enable(1'h1); [1:1]-hssi_adapt_tx_tx_usertest_sel=enable(1'h1); [0:0]-hssi_adapt_tx_txqpi_pulldn_rst_val=reset_to_zero_txqpid(1'h0);
    27'h202FF80, // [26:16]-DPRIO address=0x202; [15:8]-bit mask=0xFF; [7:7]-hssi_adapt_tx_indv=indv_en(1'h1); [6:5]-hssi_adapt_tx_txfifo_mode=txphase_comp(2'h0); [4:0]-hssi_adapt_tx_txfifo_empty=empty_default(5'h0);
    27'h203FF4F, // [26:16]-DPRIO address=0x203; [15:8]-bit mask=0xFF; [7:5]-hssi_adapt_tx_phcomp_rd_del=phcomp_rd_del2(3'h2); [4:0]-hssi_adapt_tx_txfifo_full=full_dw(5'hF);
    27'h204FF11, // [26:16]-DPRIO address=0x204; [15:8]-bit mask=0xFF; [7:3]-hssi_adapt_tx_txfifo_pempty=2(5'h2); [2:2]-hssi_adapt_tx_fifo_stop_wr=wr_full(1'h0); [1:1]-hssi_adapt_tx_fifo_stop_rd=rd_empty(1'h0); [0:0]-hssi_adapt_tx_fifo_double_read=fifo_double_read_en(1'h1);
    27'h2057F05, // [26:16]-DPRIO address=0x205; [15:8]-bit mask=0x7F; [6:6]-hssi_adapt_tx_tx_rev_lpbk=disable(1'h0); [5:5]-hssi_adapt_tx_dv_gating=disable(1'h0); [4:0]-hssi_adapt_tx_txfifo_pfull=5(5'h5);
    27'h207CC00, // [26:16]-DPRIO address=0x207; [15:8]-bit mask=0xCC; [7:7]-hssi_adapt_tx_bonding_dft_val=dft_0(1'h0); [6:6]-hssi_adapt_tx_bonding_dft_en=dft_dis(1'h0); [3:3]-hssi_adapt_tx_ds_bypass_pipeln=ds_bypass_pipeln_dis(1'h0); [2:2]-hssi_adapt_tx_fifo_ready_bypass=disable(1'h0);
    27'h208FF07, // [26:16]-DPRIO address=0x208; [15:8]-bit mask=0xFF; [7:3]-hssi_adapt_tx_tx_fastbond_wren=wren_ds_del2_us_del2(5'h0); [2:1]-hssi_adapt_tx_tx_fifo_power_mode=full_width_full_depth(2'h3); [0:0]-hssi_adapt_tx_word_align=wa_en(1'h1);
    27'h209FF1F, // [26:16]-DPRIO address=0x209; [15:8]-bit mask=0xFF; [7:7]-hssi_adapt_tx_tx_fifo_read_latency_adjust=disable(1'h0); [6:6]-hssi_adapt_tx_tx_fifo_write_latency_adjust=disable(1'h0); [5:3]-hssi_adapt_tx_tx_datapath_tb_sel=cp_bond(3'h3); [2:0]-hssi_adapt_tx_stretch_num_stages=seven_stage(3'h7);
    27'h20AFFCE, // [26:16]-DPRIO address=0x20A; [15:8]-bit mask=0xFF; [7:7]-hssi_adapt_tx_fsr_hip_fsr_out_bit1_rst_val=reset_to_one_hfsrout1(1'h1); [6:6]-hssi_adapt_tx_fsr_hip_fsr_out_bit0_rst_val=reset_to_one_hfsrout0(1'h1); [5:5]-hssi_adapt_tx_fsr_mask_tx_pll_rst_val=reset_to_zero_maskpll(1'h0); [4:4]-hssi_adapt_tx_fsr_hip_fsr_in_bit3_rst_val=reset_to_zero_hfsrin3(1'h0); [3:3]-hssi_adapt_tx_fsr_hip_fsr_in_bit2_rst_val=reset_to_one_hfsrin2(1'h1); [2:2]-hssi_adapt_tx_fsr_hip_fsr_in_bit1_rst_val=reset_to_one_hfsrin1(1'h1); [1:1]-hssi_adapt_tx_fsr_hip_fsr_in_bit0_rst_val=reset_to_one_hfsrin0(1'h1); [0:0]-hssi_adapt_tx_fsr_pld_txelecidle_rst_val=reset_to_zero_txelec(1'h0);
    27'h20B0300, // [26:16]-DPRIO address=0x20B; [15:8]-bit mask=0x03; [1:1]-hssi_adapt_tx_fsr_hip_fsr_out_bit3_rst_val=reset_to_zero_hfsrout3(1'h0); [0:0]-hssi_adapt_tx_fsr_hip_fsr_out_bit2_rst_val=reset_to_zero_hfsrout2(1'h0);
    27'h20CFF00, // [26:16]-DPRIO address=0x20C; [15:8]-bit mask=0xFF; [7:7]-hssi_adapt_tx_osc_clk_scg_en=disable(1'h0); [6:6]-hssi_adapt_tx_fifo_rd_clk_scg_en=disable(1'h0); [5:5]-hssi_adapt_tx_fifo_wr_clk_scg_en=disable(1'h0); [4:3]-hssi_adapt_tx_aib_clk_sel=aib_clk_pma_aib_tx_clk(2'h0); [2:2]-hssi_adapt_tx_dyn_clk_sw_en=disable(1'h0); [1:0]-hssi_adapt_tx_fifo_rd_clk_sel=fifo_rd_pld_pcs_tx_clk_out(2'h0);
    27'h20D0302, // [26:16]-DPRIO address=0x20D; [15:8]-bit mask=0x03; [1:1]-hssi_adapt_tx_hip_osc_clk_scg_en=enable(1'h1); [0:0]-hssi_adapt_tx_hrdrst_rx_osc_clk_scg_en=disable(1'h0);
    27'h20E7D30, // [26:16]-DPRIO address=0x20E; [15:8]-bit mask=0x7D; [6:6]-hssi_adapt_tx_hrdrst_user_ctl_en=disable(1'h0); [5:5]-hssi_adapt_tx_presethint_bypass=enable(1'h1); [4:4]-hssi_adapt_tx_hrdrst_align_bypass=enable(1'h1); [3:3]-hssi_adapt_tx_hrdrst_dll_lock_bypass=disable(1'h0); [2:2]-hssi_adapt_tx_hrdrst_dcd_cal_done_bypass=disable(1'h0); [0:0]-hssi_adapt_tx_free_run_div_clk=out_of_reset_sync(1'h0);
    27'h210FF07, // [26:16]-DPRIO address=0x210; [15:8]-bit mask=0xFF; [7:5]-hssi_adapt_rx_rx_pcs_testbus_sel=direct_tr_tb_bit0_sel(3'h0); [4:0]-hssi_adapt_rx_datapath_mapping_mode=map_10g_2x2x_2x1x_fifo(5'h7);
    27'h211FF80, // [26:16]-DPRIO address=0x211; [15:8]-bit mask=0xFF; [7:7]-hssi_adapt_rx_rx_pcspma_testbus_sel=enable(1'h1); [6:6]-hssi_adapt_rx_rx_pld_8g_wa_boundary_polling_bypass=disable(1'h0); [5:5]-hssi_adapt_rx_rx_pld_test_data_polling_bypass=disable(1'h0); [4:4]-hssi_adapt_rx_rx_pld_pma_testbus_polling_bypass=disable(1'h0); [3:3]-hssi_adapt_rx_rx_pld_pma_reser_in_polling_bypass=disable(1'h0); [2:2]-hssi_adapt_rx_rx_pld_pma_pcie_sw_done_polling_bypass=disable(1'h0); [1:1]-hssi_adapt_rx_rx_10g_krfec_rx_diag_data_status_polling_bypass=disable(1'h0); [0:0]-hssi_adapt_rx_rx_pld_8g_a1a2_k1k2_flag_polling_bypass=disable(1'h0);
    27'h212FF80, // [26:16]-DPRIO address=0x212; [15:8]-bit mask=0xFF; [7:7]-hssi_adapt_rx_word_mark=wm_en(1'h1); [6:5]-hssi_adapt_rx_rxfifo_mode=rxphase_comp(2'h0); [4:0]-hssi_adapt_rx_rxfifo_empty=empty_default(5'h0);
    27'h213FF6E, // [26:16]-DPRIO address=0x213; [15:8]-bit mask=0xFF; [7:5]-hssi_adapt_rx_phcomp_rd_del=phcomp_rd_del3(3'h3); [4:0]-hssi_adapt_rx_rxfifo_full=full_dw(5'hE);
    27'h214FF15, // [26:16]-DPRIO address=0x214; [15:8]-bit mask=0xFF; [7:3]-hssi_adapt_rx_rxfifo_pempty=2(5'h2); [2:2]-hssi_adapt_rx_fifo_stop_wr=n_wr_full(1'h1); [1:1]-hssi_adapt_rx_fifo_stop_rd=rd_empty(1'h0); [0:0]-hssi_adapt_rx_fifo_double_write=fifo_double_write_en(1'h1);
    27'h215FF40, // [26:16]-DPRIO address=0x215; [15:8]-bit mask=0xFF; [7:7]-hssi_adapt_rx_aib_lpbk_mode=disable(1'h0); [6:6]-hssi_adapt_rx_indv=indv_en(1'h1); [5:5]-hssi_adapt_rx_align_del=align_del_dis(1'h0); [4:4]-hssi_adapt_rx_force_align=force_align_dis(1'h0); [3:0]-hssi_adapt_rx_control_del=control_del_none(4'h0);
    27'h217CC00, // [26:16]-DPRIO address=0x217; [15:8]-bit mask=0xCC; [7:7]-hssi_adapt_rx_bonding_dft_val=dft_0(1'h0); [6:6]-hssi_adapt_rx_bonding_dft_en=dft_dis(1'h0); [3:3]-hssi_adapt_rx_ds_bypass_pipeln=ds_bypass_pipeln_dis(1'h0); [2:2]-hssi_adapt_rx_us_bypass_pipeln=us_bypass_pipeln_dis(1'h0);
    27'h218FFCA, // [26:16]-DPRIO address=0x218; [15:8]-bit mask=0xFF; [7:6]-hssi_adapt_rx_rx_fifo_power_mode=full_width_full_depth(2'h3); [5:1]-hssi_adapt_rx_rxfifo_pfull=5(5'h5); [0:0]-hssi_adapt_rx_adapter_lpbk_mode=disable(1'h0);
    27'h219CEC0, // [26:16]-DPRIO address=0x219; [15:8]-bit mask=0xCE; [7:6]-hssi_adapt_rx_rx_usertest_sel=direct_tr_usertest3_sel(2'h3); [3:3]-hssi_adapt_rx_hrdrst_user_ctl_en=disable(1'h0); [2:2]-hssi_adapt_rx_asn_bypass_pma_pcie_sw_done=disable(1'h0); [1:1]-hssi_adapt_rx_asn_bypass_clock_gate=disable(1'h0);
    27'h21AFF20, // [26:16]-DPRIO address=0x21A; [15:8]-bit mask=0xFF; [7:7]-hssi_adapt_rx_rx_fifo_write_latency_adjust=disable(1'h0); [6:0]-hssi_adapt_rx_asn_wait_for_fifo_flush_cnt=32(7'h20);
    27'h21BFF20, // [26:16]-DPRIO address=0x21B; [15:8]-bit mask=0xFF; [7:7]-hssi_adapt_rx_rx_pma_rstn_cycles=four_cycles(1'h0); [6:0]-hssi_adapt_rx_asn_wait_for_dll_reset_cnt=32(7'h20);
    27'h21CFF20, // [26:16]-DPRIO address=0x21C; [15:8]-bit mask=0xFF; [7:7]-hssi_adapt_rx_rx_pma_rstn_en=disable(1'h0); [6:0]-hssi_adapt_rx_asn_wait_for_clock_gate_cnt=32(7'h20);
    27'h21DFF20, // [26:16]-DPRIO address=0x21D; [15:8]-bit mask=0xFF; [7:7]-hssi_adapt_rx_rx_use_rxvalid_for_rxeq=rxvalid(1'h0); [6:0]-hssi_adapt_rx_asn_wait_for_pma_pcie_sw_done_cnt=32(7'h20);
    27'h21EFF84, // [26:16]-DPRIO address=0x21E; [15:8]-bit mask=0xFF; [7:7]-hssi_adapt_rx_rx_adp_go_b4txeq_en=enable(1'h1); [6:6]-hssi_adapt_rx_rx_invalid_no_change=disable(1'h0); [5:5]-hssi_adapt_rx_rx_post_cursor_en=disable(1'h0); [4:4]-hssi_adapt_rx_rx_pre_cursor_en=disable(1'h0); [3:2]-hssi_adapt_rx_rx_eq_iteration=cycles_32(2'h1); [1:1]-hssi_adapt_rx_rx_rxeq_en=disable(1'h0); [0:0]-hssi_adapt_rx_rx_txeq_en=disable(1'h0);
    27'h21FFF40, // [26:16]-DPRIO address=0x21F; [15:8]-bit mask=0xFF; [7:0]-hssi_adapt_rx_rx_txeq_time=64(8'h40);
    27'h220FF02, // [26:16]-DPRIO address=0x220; [15:8]-bit mask=0xFF; [7:6]-hssi_adapt_rx_rx_parity_sel=func_sel(2'h0); [5:5]-hssi_adapt_rx_async_direct_hip_en=disable(1'h0); [4:4]-hssi_adapt_rx_fsr_pld_rx_fifo_align_clr_rst_val=reset_to_zero_alignclr(1'h0); [3:3]-hssi_adapt_rx_fsr_pld_10g_rx_crc32_err_rst_val=reset_to_zero_crc32(1'h0); [2:2]-hssi_adapt_rx_fsr_pld_8g_sigdet_out_rst_val=reset_to_zero_sigdet(1'h0); [1:1]-hssi_adapt_rx_fsr_pld_ltd_b_rst_val=reset_to_one_ltdb(1'h1); [0:0]-hssi_adapt_rx_fsr_pld_ltr_rst_val=reset_to_zero_ltr(1'h0);
    27'h221FF17, // [26:16]-DPRIO address=0x221; [15:8]-bit mask=0xFF; [7:7]-hssi_adapt_rx_rx_fifo_read_latency_adjust=disable(1'h0); [6:3]-hssi_adapt_rx_rx_datapath_tb_sel=cp_bond(4'h2); [2:0]-hssi_adapt_rx_stretch_num_stages=seven_stage(3'h7);
    27'h222FF00, // [26:16]-DPRIO address=0x222; [15:8]-bit mask=0xFF; [7:7]-hssi_adapt_rx_txfifowr_from_aib_sel=txfifowr_sclk_from_aib(1'h0); [6:6]-hssi_adapt_rx_internal_clk1_sel0=pma_clks_or_txfifowr_post_ct_or_txfiford_pre_or_post_ct_mux_clk1_mux0(1'h0); [5:5]-hssi_adapt_rx_txfifowr_post_ct_sel=txfifowr_sclk_post_ct(1'h0); [4:4]-hssi_adapt_rx_txfiford_post_ct_sel=txfiford_sclk_post_ct(1'h0); [3:3]-hssi_adapt_rx_txfiford_pre_ct_sel=txfiford_sclk_pre_ct(1'h0); [2:2]-hssi_adapt_rx_internal_clk1_sel3=pma_clks_clk1_mux3(1'h0); [1:1]-hssi_adapt_rx_internal_clk1_sel2=pma_clks_or_txfiford_pre_ct_mux_clk1_mux2(1'h0); [0:0]-hssi_adapt_rx_internal_clk1_sel1=pma_clks_or_txfiford_pre_or_post_ct_mux_clk1_mux1(1'h0);
    27'h223FF00, // [26:16]-DPRIO address=0x223; [15:8]-bit mask=0xFF; [7:7]-hssi_adapt_rx_rxfiford_to_aib_sel=rxfiford_sclk_to_aib(1'h0); [6:6]-hssi_adapt_rx_internal_clk2_sel0=pma_clks_or_rxfiford_post_ct_or_rxfifowr_pre_or_post_ct_mux_clk2_mux0(1'h0); [5:5]-hssi_adapt_rx_dyn_clk_sw_en=disable(1'h0); [4:2]-hssi_adapt_rx_fifo_rd_clk_sel=fifo_rd_pma_aib_rx_clk(3'h0); [1:0]-hssi_adapt_rx_fifo_wr_clk_sel=fifo_wr_pld_pcs_rx_clk_out(2'h0);
    27'h224FF00, // [26:16]-DPRIO address=0x224; [15:8]-bit mask=0xFF; [7:4]-hssi_adapt_rx_internal_clk2_sel=pld_pma_tx_clk_out_clk2(4'h0); [3:0]-hssi_adapt_rx_internal_clk1_sel=pld_pma_tx_clk_out_clk1(4'h0);
    27'h225FF98, // [26:16]-DPRIO address=0x225; [15:8]-bit mask=0xFF; [7:7]-hssi_adapt_rx_pma_coreclkin_sel=pma_coreclkin_pld_sel(1'h1); [6:6]-hssi_adapt_rx_hrdrst_rx_osc_clk_scg_en=disable(1'h0); [5:5]-hssi_adapt_rx_osc_clk_scg_en=disable(1'h0); [4:4]-hssi_adapt_rx_pma_hclk_scg_en=enable(1'h1); [3:3]-hssi_adapt_rx_txeq_clk_scg_en=enable(1'h1); [2:2]-hssi_adapt_rx_fifo_rd_clk_scg_en=disable(1'h0); [1:1]-hssi_adapt_rx_fifo_wr_clk_scg_en=disable(1'h0); [0:0]-hssi_adapt_rx_txeq_clk_sel=txeq_pld_pcs_rx_clk_out(1'h0);
    27'h2267B20, // [26:16]-DPRIO address=0x226; [15:8]-bit mask=0x7B; [6:4]-hssi_adapt_rx_rx_rmfflag_stretch_num_stages=rmfflag_two_stage(3'h2); [3:3]-hssi_adapt_rx_hrdrst_dcd_cal_done_bypass=disable(1'h0); [1:1]-hssi_adapt_rx_txeq_rst_sel=txeq_pcs_rx_pld_rst_n(1'h0); [0:0]-hssi_adapt_rx_free_run_div_clk=out_of_reset_sync(1'h0);
    27'h227FE80, // [26:16]-DPRIO address=0x227; [15:8]-bit mask=0xFE; [7:7]-hssi_adapt_rx_rx_rmfflag_stretch_enable=enable(1'h1); [6:6]-hssi_adapt_rx_rxfiford_post_ct_sel=rxfiford_sclk_post_ct(1'h0); [5:5]-hssi_adapt_rx_rxfifowr_post_ct_sel=rxfifowr_sclk_post_ct(1'h0); [4:4]-hssi_adapt_rx_rxfifowr_pre_ct_sel=rxfifowr_sclk_pre_ct(1'h0); [3:3]-hssi_adapt_rx_internal_clk2_sel3=pma_clks_clk2_mux3(1'h0); [2:2]-hssi_adapt_rx_internal_clk2_sel2=pma_clks_or_rxfifowr_pre_ct_mux_clk2_mux2(1'h0); [1:1]-hssi_adapt_rx_internal_clk2_sel1=pma_clks_or_rxfifowr_pre_or_post_ct_mux_clk2_mux1(1'h0);
    27'h22DFF7B, // [26:16]-DPRIO address=0x22D; [15:8]-bit mask=0xFF; [7:0]-hssi_aibcr_tx_aib_dllstr_align_dy_ctl_static=aib_dllstr_align_dy_ctl_static_setting1(8'h7B);
    27'h22E0700, // [26:16]-DPRIO address=0x22E; [15:8]-bit mask=0x07; [2:2]-hssi_aibcr_tx_aib_dllstr_align_dy_ctlsel=aib_dllstr_align_dy_ctlsel_setting0(1'h0); [1:0]-hssi_aibcr_tx_aib_dllstr_align_dy_ctl_static=aib_dllstr_align_dy_ctl_static_setting1(2'h0);
    27'h22FFFF6, // [26:16]-DPRIO address=0x22F; [15:8]-bit mask=0xFF; [7:1]-hssi_aibcr_rx_aib_rx_dcc_dy_ctl_static=aib_rx_dcc_dy_ctl_static_setting1(7'h7B); [0:0]-hssi_aibcr_rx_aib_rx_dcc_dy_ctlsel=aib_rx_dcc_dy_ctlsel_setting0(1'h0);
    27'h2303F38, // [26:16]-DPRIO address=0x230; [15:8]-bit mask=0x3F; [5:5]-hssi_aibcr_rx_aib_rx_dcc_cont_cal=aib_rx_dcc_cal_cont(1'h1); [4:4]-hssi_aibcr_rx_aib_rx_dcc_en=aib_rx_dcc_enable(1'h1); [3:3]-hssi_aibcr_rx_aib_rx_dcc_byp=aib_rx_dcc_byp_disable(1'h1); [2:0]-hssi_aibcr_rx_aib_rx_dcc_dy_ctl_static=aib_rx_dcc_dy_ctl_static_setting1(3'h0);
    27'h300FF00, // [26:16]-DPRIO address=0x300; [15:8]-bit mask=0xFF; [7:5]-hssi_pldadapt_tx_txfifo_mode=txphase_comp(3'h0); [4:0]-hssi_pldadapt_tx_txfifo_empty=empty_default(5'h0);
    27'h301FF6E, // [26:16]-DPRIO address=0x301; [15:8]-bit mask=0xFF; [7:5]-hssi_pldadapt_tx_phcomp_rd_del=phcomp_rd_del3(3'h3); [4:0]-hssi_pldadapt_tx_txfifo_full=full_pc_dw(5'hE);
    27'h302FF22, // [26:16]-DPRIO address=0x302; [15:8]-bit mask=0xFF; [7:7]-hssi_pldadapt_tx_fifo_stop_wr=wr_full(1'h0); [6:6]-hssi_pldadapt_tx_fifo_stop_rd=rd_empty(1'h0); [5:5]-hssi_pldadapt_tx_indv=indv_en(1'h1); [4:0]-hssi_pldadapt_tx_txfifo_pempty=2(5'h2);
    27'h303FF6A, // [26:16]-DPRIO address=0x303; [15:8]-bit mask=0xFF; [7:5]-hssi_pldadapt_tx_tx_fifo_power_mode=full_width_ps_dw(3'h3); [4:0]-hssi_pldadapt_tx_txfifo_pfull=10(5'hA);
    27'h305CC00, // [26:16]-DPRIO address=0x305; [15:8]-bit mask=0xCC; [7:7]-hssi_pldadapt_tx_bonding_dft_val=dft_0(1'h0); [6:6]-hssi_pldadapt_tx_bonding_dft_en=dft_dis(1'h0); [3:3]-hssi_pldadapt_tx_ds_bypass_pipeln=ds_bypass_pipeln_dis(1'h0); [2:2]-hssi_pldadapt_tx_us_bypass_pipeln=us_bypass_pipeln_dis(1'h0);
    27'h306FF81, // [26:16]-DPRIO address=0x306; [15:8]-bit mask=0xFF; [7:7]-hssi_pldadapt_tx_fifo_double_write=fifo_double_write_en(1'h1); [6:6]-hssi_pldadapt_tx_dv_gen=dv_gen_dis(1'h0); [5:4]-hssi_pldadapt_tx_gb_tx_odwidth=odwidth_32(2'h0); [3:1]-hssi_pldadapt_tx_gb_tx_idwidth=idwidth_66(3'h0); [0:0]-hssi_pldadapt_tx_dv_bond=dv_bond_dis(1'h1);
    27'h307FF00, // [26:16]-DPRIO address=0x307; [15:8]-bit mask=0xFF; [7:0]-hssi_pldadapt_tx_frmgen_mfrm_length=2048(8'h0);
    27'h308FF08, // [26:16]-DPRIO address=0x308; [15:8]-bit mask=0xFF; [7:0]-hssi_pldadapt_tx_frmgen_mfrm_length=2048(8'h8);
    27'h309FF23, // [26:16]-DPRIO address=0x309; [15:8]-bit mask=0xFF; [7:7]-hssi_pldadapt_tx_tx_pld_pma_fpll_num_phase_shifts_polling_bypass=disable(1'h0); [6:6]-hssi_pldadapt_tx_frmgen_wordslip=frmgen_wordslip_dis(1'h0); [5:5]-hssi_pldadapt_tx_word_mark=wm_en(1'h1); [4:4]-hssi_pldadapt_tx_frmgen_burst=frmgen_burst_dis(1'h0); [3:3]-hssi_pldadapt_tx_sh_err=sh_err_dis(1'h0); [2:2]-hssi_pldadapt_tx_frmgen_pyld_ins=frmgen_pyld_ins_dis(1'h0); [1:1]-hssi_pldadapt_tx_frmgen_pipeln=frmgen_pipeln_en(1'h1); [0:0]-hssi_pldadapt_tx_frmgen_bypass=frmgen_bypass_en(1'h1);
    27'h30AFFCE, // [26:16]-DPRIO address=0x30A; [15:8]-bit mask=0xFF; [7:7]-hssi_pldadapt_tx_fsr_hip_fsr_out_bit1_rst_val=reset_to_one_hfsrout1(1'h1); [6:6]-hssi_pldadapt_tx_fsr_hip_fsr_out_bit0_rst_val=reset_to_one_hfsrout0(1'h1); [5:5]-hssi_pldadapt_tx_fsr_mask_tx_pll_rst_val=reset_to_zero_maskpll(1'h0); [4:4]-hssi_pldadapt_tx_fsr_hip_fsr_in_bit3_rst_val=reset_to_zero_hfsrin3(1'h0); [3:3]-hssi_pldadapt_tx_fsr_hip_fsr_in_bit2_rst_val=reset_to_one_hfsrin2(1'h1); [2:2]-hssi_pldadapt_tx_fsr_hip_fsr_in_bit1_rst_val=reset_to_one_hfsrin1(1'h1); [1:1]-hssi_pldadapt_tx_fsr_hip_fsr_in_bit0_rst_val=reset_to_one_hfsrin0(1'h1); [0:0]-hssi_pldadapt_tx_fsr_pld_txelecidle_rst_val=reset_to_zero_txelec(1'h0);
    27'h30BFF00, // [26:16]-DPRIO address=0x30B; [15:8]-bit mask=0xFF; [7:4]-hssi_pldadapt_tx_tx_hip_aib_ssr_in_polling_bypass=disable(4'h0); [3:3]-hssi_pldadapt_tx_tx_pld_10g_tx_bitslip_polling_bypass=disable(1'h0); [2:2]-hssi_pldadapt_tx_tx_pld_8g_tx_boundary_sel_polling_bypass=disable(1'h0); [1:1]-hssi_pldadapt_tx_fsr_hip_fsr_out_bit3_rst_val=reset_to_zero_hfsrout3(1'h0); [0:0]-hssi_pldadapt_tx_fsr_hip_fsr_out_bit2_rst_val=reset_to_zero_hfsrout2(1'h0);
    27'h30CFFDF, // [26:16]-DPRIO address=0x30C; [15:8]-bit mask=0xFF; [7:6]-hssi_pldadapt_tx_tx_fastbond_wren=wren_ds_fast_us_fast(2'h3); [5:5]-hssi_pldadapt_tx_pld_clk1_inv_en=disable(1'h0); [4:1]-hssi_pldadapt_tx_pld_clk1_delay_sel=delay_path15(4'hF); [0:0]-hssi_pldadapt_tx_pld_clk1_delay_en=enable(1'h1);
    27'h30DFF01, // [26:16]-DPRIO address=0x30D; [15:8]-bit mask=0xFF; [7:6]-hssi_pldadapt_tx_fifo_rd_clk_sel=fifo_rd_pma_aib_tx_clk(2'h0); [5:4]-hssi_pldadapt_tx_aib_clk2_sel=aib_clk2_pld_pcs_tx_clk_out(2'h0); [3:2]-hssi_pldadapt_tx_aib_clk1_sel=aib_clk1_pld_pcs_tx_clk_out(2'h0); [1:1]-hssi_pldadapt_tx_fpll_shared_direct_async_in_sel=fpll_shared_direct_async_in_rowclk(1'h0); [0:0]-hssi_pldadapt_tx_fifo_rd_clk_frm_gen_scg_en=enable(1'h1);
    27'h30EF980, // [26:16]-DPRIO address=0x30E; [15:8]-bit mask=0xF9; [7:7]-hssi_pldadapt_tx_hip_osc_clk_scg_en=enable(1'h1); [6:6]-hssi_pldadapt_tx_hrdrst_rx_osc_clk_scg_en=disable(1'h0); [5:5]-hssi_pldadapt_tx_osc_clk_scg_en=disable(1'h0); [4:4]-hssi_pldadapt_tx_fifo_wr_clk_scg_en=disable(1'h0); [3:3]-hssi_pldadapt_tx_fifo_rd_clk_scg_en=disable(1'h0); [0:0]-hssi_pldadapt_tx_tx_pld_pma_fpll_cnt_sel_polling_bypass=disable(1'h0);
    27'h30F9E98, // [26:16]-DPRIO address=0x30F; [15:8]-bit mask=0x9E; [7:7]-hssi_pldadapt_tx_tx_usertest_sel=enable(1'h1); [4:3]-hssi_pldadapt_tx_tx_fastbond_rden=rden_ds_fast_us_fast(2'h3); [2:2]-hssi_pldadapt_tx_hrdrst_user_ctl_en=disable(1'h0); [1:1]-hssi_pldadapt_tx_hrdrst_dcd_cal_done_bypass=disable(1'h0);
    27'h310FF1C, // [26:16]-DPRIO address=0x310; [15:8]-bit mask=0xFF; [7:7]-hssi_pldadapt_tx_tx_fifo_read_latency_adjust=disable(1'h0); [6:6]-hssi_pldadapt_tx_tx_fifo_write_latency_adjust=disable(1'h0); [5:3]-hssi_pldadapt_tx_tx_datapath_tb_sel=cp_bond(3'h3); [2:0]-hssi_pldadapt_tx_stretch_num_stages=four_stage(3'h4);
    27'h311FF01, // [26:16]-DPRIO address=0x311; [15:8]-bit mask=0xFF; [7:6]-hssi_pldadapt_rx_rx_fastbond_wren=wren_ds_del_us_del(2'h0); [5:0]-hssi_pldadapt_rx_rxfifo_empty=empty_dw(6'h1);
    27'h312FF4F, // [26:16]-DPRIO address=0x312; [15:8]-bit mask=0xFF; [7:7]-hssi_pldadapt_rx_dv_mode=dv_mode_dis(1'h0); [6:6]-hssi_pldadapt_rx_fifo_double_read=fifo_double_read_en(1'h1); [5:0]-hssi_pldadapt_rx_rxfifo_full=full_pc_dw(6'hF);
    27'h313FF82, // [26:16]-DPRIO address=0x313; [15:8]-bit mask=0xFF; [7:7]-hssi_pldadapt_rx_fifo_stop_wr=n_wr_full(1'h1); [6:6]-hssi_pldadapt_rx_fifo_stop_rd=rd_empty(1'h0); [5:0]-hssi_pldadapt_rx_rxfifo_pempty=2(6'h2);
    27'h314FFCA, // [26:16]-DPRIO address=0x314; [15:8]-bit mask=0xFF; [7:7]-hssi_pldadapt_rx_rx_true_b2b=b2b(1'h1); [6:6]-hssi_pldadapt_rx_indv=indv_en(1'h1); [5:0]-hssi_pldadapt_rx_rxfifo_pfull=10(6'hA);
    27'h315FF10, // [26:16]-DPRIO address=0x315; [15:8]-bit mask=0xFF; [7:7]-hssi_pldadapt_rx_rx_fifo_write_latency_adjust=disable(1'h0); [6:6]-hssi_pldadapt_rx_lpbk_mode=disable(1'h0); [5:3]-hssi_pldadapt_rx_phcomp_rd_del=phcomp_rd_del2(3'h2); [2:0]-hssi_pldadapt_rx_rxfifo_mode=rxphase_comp(3'h0);
    27'h317CC00, // [26:16]-DPRIO address=0x317; [15:8]-bit mask=0xCC; [7:7]-hssi_pldadapt_rx_bonding_dft_val=dft_0(1'h0); [6:6]-hssi_pldadapt_rx_bonding_dft_en=dft_dis(1'h0); [3:3]-hssi_pldadapt_rx_ds_bypass_pipeln=ds_bypass_pipeln_dis(1'h0); [2:2]-hssi_pldadapt_rx_us_bypass_pipeln=us_bypass_pipeln_dis(1'h0);
    27'h3180303, // [26:16]-DPRIO address=0x318; [15:8]-bit mask=0x03; [1:1]-hssi_pldadapt_rx_rx_fifo_write_ctrl=blklock_ignore(1'h1); [0:0]-hssi_pldadapt_rx_word_align=wa_en(1'h1);
    27'h31AFE6C, // [26:16]-DPRIO address=0x31A; [15:8]-bit mask=0xFE; [7:7]-hssi_pldadapt_rx_pipe_enable=disable(1'h0); [6:5]-hssi_pldadapt_rx_rx_fastbond_rden=rden_ds_fast_us_fast(2'h3); [4:2]-hssi_pldadapt_rx_rx_fifo_power_mode=full_width_ps_dw(3'h3); [1:1]-hssi_pldadapt_rx_asn_bypass_pma_pcie_sw_done=disable(1'h0);
    27'h31BFF40, // [26:16]-DPRIO address=0x31B; [15:8]-bit mask=0xFF; [7:0]-hssi_pldadapt_rx_asn_wait_for_fifo_flush_cnt=64(8'h40);
    27'h31CFF40, // [26:16]-DPRIO address=0x31C; [15:8]-bit mask=0xFF; [7:0]-hssi_pldadapt_rx_asn_wait_for_dll_reset_cnt=64(8'h40);
    27'h31DFF40, // [26:16]-DPRIO address=0x31D; [15:8]-bit mask=0xFF; [7:0]-hssi_pldadapt_rx_asn_wait_for_pma_pcie_sw_done_cnt=64(8'h40);
    27'h31EF000, // [26:16]-DPRIO address=0x31E; [15:8]-bit mask=0xF0; [7:7]-hssi_pldadapt_rx_rx_pld_pma_reser_out_polling_bypass=disable(1'h0); [6:6]-hssi_pldadapt_rx_rx_pld_pma_pcie_switch_polling_bypass=disable(1'h0); [5:5]-hssi_pldadapt_rx_rx_pld_pma_eye_monitor_polling_bypass=disable(1'h0); [4:4]-hssi_pldadapt_rx_rx_pld_8g_eidleinfersel_polling_bypass=disable(1'h0);
    27'h31F7F42, // [26:16]-DPRIO address=0x31F; [15:8]-bit mask=0x7F; [6:6]-hssi_pldadapt_rx_rx_usertest_sel=enable(1'h1); [5:5]-hssi_pldadapt_rx_rx_prbs_flags_sr_enable=disable(1'h0); [4:4]-hssi_pldadapt_rx_fsr_pld_rx_fifo_align_clr_rst_val=reset_to_zero_alignclr(1'h0); [3:3]-hssi_pldadapt_rx_fsr_pld_10g_rx_crc32_err_rst_val=reset_to_zero_crc32(1'h0); [2:2]-hssi_pldadapt_rx_fsr_pld_8g_sigdet_out_rst_val=reset_to_zero_sigdet(1'h0); [1:1]-hssi_pldadapt_rx_fsr_pld_ltd_b_rst_val=reset_to_one_ltdb(1'h1); [0:0]-hssi_pldadapt_rx_fsr_pld_ltr_rst_val=reset_to_zero_ltr(1'h0);
    27'h320FF14, // [26:16]-DPRIO address=0x320; [15:8]-bit mask=0xFF; [7:7]-hssi_pldadapt_rx_rx_fifo_read_latency_adjust=disable(1'h0); [6:3]-hssi_pldadapt_rx_rx_datapath_tb_sel=cp_bond(4'h2); [2:0]-hssi_pldadapt_rx_stretch_num_stages=four_stage(3'h4);
    27'h3213F1B, // [26:16]-DPRIO address=0x321; [15:8]-bit mask=0x3F; [5:5]-hssi_pldadapt_rx_pld_clk1_inv_en=disable(1'h0); [4:1]-hssi_pldadapt_rx_pld_clk1_delay_sel=delay_path13(4'hD); [0:0]-hssi_pldadapt_rx_pld_clk1_delay_en=enable(1'h1);
    27'h3227F49, // [26:16]-DPRIO address=0x322; [15:8]-bit mask=0x7F; [6:5]-hssi_pldadapt_rx_fifo_rd_clk_sel=fifo_rd_clk_pld_rx_clk1(2'h2); [4:4]-hssi_pldadapt_rx_fifo_wr_clk_sel=fifo_wr_clk_rx_transfer_clk(1'h0); [3:2]-hssi_pldadapt_rx_aib_clk2_sel=aib_clk2_pld_pma_clkdiv_rx_user(2'h2); [1:0]-hssi_pldadapt_rx_aib_clk1_sel=aib_clk1_pld_pcs_rx_clk_out(2'h1);
    27'h323FFC8, // [26:16]-DPRIO address=0x323; [15:8]-bit mask=0xFF; [7:7]-hssi_pldadapt_rx_fifo_rd_clk_ins_sm_scg_en=enable(1'h1); [6:6]-hssi_pldadapt_rx_fifo_wr_clk_del_sm_scg_en=enable(1'h1); [5:5]-hssi_pldadapt_rx_hrdrst_rx_osc_clk_scg_en=disable(1'h0); [4:4]-hssi_pldadapt_rx_osc_clk_scg_en=disable(1'h0); [3:3]-hssi_pldadapt_rx_pma_hclk_scg_en=enable(1'h1); [2:2]-hssi_pldadapt_rx_fifo_rd_clk_scg_en=disable(1'h0); [1:1]-hssi_pldadapt_rx_fifo_wr_clk_scg_en=disable(1'h0); [0:0]-hssi_pldadapt_rx_sclk_sel=sclk1_rowclk(1'h0);
    27'h324FF00, // [26:16]-DPRIO address=0x324; [15:8]-bit mask=0xFF; [7:7]-hssi_pldadapt_rx_rxfiford_post_ct_sel=rxfiford_sclk_post_ct(1'h0); [6:6]-hssi_pldadapt_rx_rxfifowr_post_ct_sel=rxfifowr_sclk_post_ct(1'h0); [5:5]-hssi_pldadapt_rx_internal_clk2_sel2=pma_clks_clk2_mux2(1'h0); [4:4]-hssi_pldadapt_rx_internal_clk2_sel1=pma_clks_or_rxfifowr_post_ct_mux_clk2_mux1(1'h0); [3:3]-hssi_pldadapt_rx_txfifowr_post_ct_sel=txfifowr_sclk_post_ct(1'h0); [2:2]-hssi_pldadapt_rx_txfiford_post_ct_sel=txfiford_sclk_post_ct(1'h0); [1:1]-hssi_pldadapt_rx_internal_clk1_sel2=pma_clks_clk1_mux2(1'h0); [0:0]-hssi_pldadapt_rx_internal_clk1_sel1=pma_clks_or_txfiford_post_ct_mux_clk1_mux1(1'h0);
    27'h3251D08, // [26:16]-DPRIO address=0x325; [15:8]-bit mask=0x1D; [4:4]-hssi_pldadapt_rx_hrdrst_user_ctl_en=disable(1'h0); [3:3]-hssi_pldadapt_rx_hrdrst_align_bypass=enable(1'h1); [2:2]-hssi_pldadapt_rx_hrdrst_dll_lock_bypass=disable(1'h0); [0:0]-hssi_pldadapt_rx_free_run_div_clk=out_of_reset_sync(1'h0);
    27'h32BFF7B, // [26:16]-DPRIO address=0x32B; [15:8]-bit mask=0xFF; [7:0]-hssi_aibnd_rx_aib_dllstr_align_dy_ctl_static=aib_dllstr_align_dy_ctl_static_setting1(8'h7B);
    27'h32C0700, // [26:16]-DPRIO address=0x32C; [15:8]-bit mask=0x07; [2:2]-hssi_aibnd_rx_aib_dllstr_align_dy_ctlsel=aib_dllstr_align_dy_ctlsel_setting0(1'h0); [1:0]-hssi_aibnd_rx_aib_dllstr_align_dy_ctl_static=aib_dllstr_align_dy_ctl_static_setting1(2'h0);
    27'h32DFFF6, // [26:16]-DPRIO address=0x32D; [15:8]-bit mask=0xFF; [7:1]-hssi_aibnd_tx_aib_tx_dcc_dy_ctl_static=aib_tx_dcc_dy_ctl_static_setting1(7'h7B); [0:0]-hssi_aibnd_tx_aib_tx_dcc_dy_ctlsel=aib_tx_dcc_dy_ctlsel_setting0(1'h0);
    27'h32E3F38  // [26:16]-DPRIO address=0x32E; [15:8]-bit mask=0x3F; [5:5]-hssi_aibnd_tx_aib_tx_dcc_cont_cal=aib_tx_dcc_cal_cont(1'h1); [4:4]-hssi_aibnd_tx_aib_tx_dcc_en=aib_tx_dcc_enable(1'h1); [3:3]-hssi_aibnd_tx_aib_tx_dcc_byp=aib_tx_dcc_byp_disable(1'h1); [2:0]-hssi_aibnd_tx_aib_tx_dcc_dy_ctl_static=aib_tx_dcc_dy_ctl_static_setting1(3'h0);
};

  begin
  get_ram_data = ram_data[index];
  end
endfunction

localparam PLL_SELECT_VALUE = 0;

localparam CDR_REFCLK_SELECT_VALUE = 0;

localparam HSSI_10G_RX_PCS_ADVANCED_USER_MODE_VALUE = "disable";

localparam HSSI_10G_RX_PCS_ALIGN_DEL_VALUE = "align_del_dis";
localparam HSSI_10G_RX_PCS_ALIGN_DEL_ADDR_OFST = 164;
localparam HSSI_10G_RX_PCS_ALIGN_DEL_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_ALIGN_DEL_ADDR_FIELD_HIGH = 0;
localparam HSSI_10G_RX_PCS_ALIGN_DEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_ALIGN_DEL_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_10G_RX_PCS_ALIGN_DEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_ALIGN_DEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_BER_BIT_ERR_TOTAL_CNT_VALUE = "bit_err_total_cnt_10g";
localparam HSSI_10G_RX_PCS_BER_BIT_ERR_TOTAL_CNT_ADDR0_OFST = 152;
localparam HSSI_10G_RX_PCS_BER_BIT_ERR_TOTAL_CNT_ADDR0_FIELD_OFST = 7;
localparam HSSI_10G_RX_PCS_BER_BIT_ERR_TOTAL_CNT_ADDR0_FIELD_HIGH = 7;
localparam HSSI_10G_RX_PCS_BER_BIT_ERR_TOTAL_CNT_ADDR0_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_BER_BIT_ERR_TOTAL_CNT_ADDR0_FIELD_BITMASK = 32'h00000080;
localparam HSSI_10G_RX_PCS_BER_BIT_ERR_TOTAL_CNT_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_BER_BIT_ERR_TOTAL_CNT_ADDR0_FIELD_VALUE = 1'h0;
localparam HSSI_10G_RX_PCS_BER_BIT_ERR_TOTAL_CNT_ADDR1_OFST = 153;
localparam HSSI_10G_RX_PCS_BER_BIT_ERR_TOTAL_CNT_ADDR1_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_BER_BIT_ERR_TOTAL_CNT_ADDR1_FIELD_HIGH = 5;
localparam HSSI_10G_RX_PCS_BER_BIT_ERR_TOTAL_CNT_ADDR1_FIELD_SIZE = 6;
localparam HSSI_10G_RX_PCS_BER_BIT_ERR_TOTAL_CNT_ADDR1_FIELD_BITMASK = 32'h0000003F;
localparam HSSI_10G_RX_PCS_BER_BIT_ERR_TOTAL_CNT_ADDR1_FIELD_VALMASK = 32'h00000008;
localparam HSSI_10G_RX_PCS_BER_BIT_ERR_TOTAL_CNT_ADDR1_FIELD_VALUE = 6'h8;

localparam HSSI_10G_RX_PCS_BER_CLKEN_VALUE = "ber_clk_en";
localparam HSSI_10G_RX_PCS_BER_CLKEN_ADDR_OFST = 162;
localparam HSSI_10G_RX_PCS_BER_CLKEN_ADDR_FIELD_OFST = 4;
localparam HSSI_10G_RX_PCS_BER_CLKEN_ADDR_FIELD_HIGH = 4;
localparam HSSI_10G_RX_PCS_BER_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_BER_CLKEN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_10G_RX_PCS_BER_CLKEN_ADDR_FIELD_VALMASK = 32'h00000010;
localparam HSSI_10G_RX_PCS_BER_CLKEN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_VALUE = 21'd19530;
localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_ADDR0_OFST = 154;
localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_ADDR0_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_ADDR0_FIELD_HIGH = 7;
localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_ADDR0_FIELD_SIZE = 8;
localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_ADDR0_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_ADDR0_FIELD_VALMASK = 32'h0000004A;
localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_ADDR0_FIELD_VALUE = 8'h4A;
localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_ADDR1_OFST = 155;
localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_ADDR1_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_ADDR1_FIELD_HIGH = 7;
localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_ADDR1_FIELD_SIZE = 8;
localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_ADDR1_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_ADDR1_FIELD_VALMASK = 32'h0000004C;
localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_ADDR1_FIELD_VALUE = 8'h4C;
localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_ADDR2_OFST = 156;
localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_ADDR2_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_ADDR2_FIELD_HIGH = 4;
localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_ADDR2_FIELD_SIZE = 5;
localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_ADDR2_FIELD_BITMASK = 32'h0000001F;
localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_ADDR2_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_BER_XUS_TIMER_WINDOW_ADDR2_FIELD_VALUE = 5'h0;

localparam HSSI_10G_RX_PCS_BITSLIP_MODE_VALUE = "bitslip_dis";
localparam HSSI_10G_RX_PCS_BITSLIP_MODE_ADDR_OFST = 150;
localparam HSSI_10G_RX_PCS_BITSLIP_MODE_ADDR_FIELD_OFST = 5;
localparam HSSI_10G_RX_PCS_BITSLIP_MODE_ADDR_FIELD_HIGH = 5;
localparam HSSI_10G_RX_PCS_BITSLIP_MODE_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_BITSLIP_MODE_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_10G_RX_PCS_BITSLIP_MODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_BITSLIP_MODE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_TYPE_VALUE = "bitslip_comb";
localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_TYPE_ADDR_OFST = 173;
localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_TYPE_ADDR_FIELD_OFST = 4;
localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_TYPE_ADDR_FIELD_HIGH = 4;
localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_TYPE_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_TYPE_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_TYPE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_TYPE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_WAIT_CNT_VALUE = 3'd1;
localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_WAIT_CNT_ADDR_OFST = 173;
localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_WAIT_CNT_ADDR_FIELD_OFST = 5;
localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_WAIT_CNT_ADDR_FIELD_HIGH = 7;
localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_WAIT_CNT_ADDR_FIELD_SIZE = 3;
localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_WAIT_CNT_ADDR_FIELD_BITMASK = 32'h000000E0;
localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_WAIT_CNT_ADDR_FIELD_VALMASK = 32'h00000020;
localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_WAIT_CNT_ADDR_FIELD_VALUE = 3'h1;

localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_WAIT_TYPE_VALUE = "bitslip_cnt";
localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_WAIT_TYPE_ADDR_OFST = 173;
localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_WAIT_TYPE_ADDR_FIELD_OFST = 3;
localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_WAIT_TYPE_ADDR_FIELD_HIGH = 3;
localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_WAIT_TYPE_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_WAIT_TYPE_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_WAIT_TYPE_ADDR_FIELD_VALMASK = 32'h00000008;
localparam HSSI_10G_RX_PCS_BLKSYNC_BITSLIP_WAIT_TYPE_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_BLKSYNC_BYPASS_VALUE = "blksync_bypass_dis";
localparam HSSI_10G_RX_PCS_BLKSYNC_BYPASS_ADDR_OFST = 150;
localparam HSSI_10G_RX_PCS_BLKSYNC_BYPASS_ADDR_FIELD_OFST = 6;
localparam HSSI_10G_RX_PCS_BLKSYNC_BYPASS_ADDR_FIELD_HIGH = 6;
localparam HSSI_10G_RX_PCS_BLKSYNC_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_BLKSYNC_BYPASS_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_10G_RX_PCS_BLKSYNC_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_BLKSYNC_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_BLKSYNC_CLKEN_VALUE = "blksync_clk_en";
localparam HSSI_10G_RX_PCS_BLKSYNC_CLKEN_ADDR_OFST = 163;
localparam HSSI_10G_RX_PCS_BLKSYNC_CLKEN_ADDR_FIELD_OFST = 1;
localparam HSSI_10G_RX_PCS_BLKSYNC_CLKEN_ADDR_FIELD_HIGH = 1;
localparam HSSI_10G_RX_PCS_BLKSYNC_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_BLKSYNC_CLKEN_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_10G_RX_PCS_BLKSYNC_CLKEN_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_10G_RX_PCS_BLKSYNC_CLKEN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_BLKSYNC_ENUM_INVALID_SH_CNT_VALUE = "enum_invalid_sh_cnt_10g";
localparam HSSI_10G_RX_PCS_BLKSYNC_ENUM_INVALID_SH_CNT_ADDR_OFST = 152;
localparam HSSI_10G_RX_PCS_BLKSYNC_ENUM_INVALID_SH_CNT_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_BLKSYNC_ENUM_INVALID_SH_CNT_ADDR_FIELD_HIGH = 6;
localparam HSSI_10G_RX_PCS_BLKSYNC_ENUM_INVALID_SH_CNT_ADDR_FIELD_SIZE = 7;
localparam HSSI_10G_RX_PCS_BLKSYNC_ENUM_INVALID_SH_CNT_ADDR_FIELD_BITMASK = 32'h0000007F;
localparam HSSI_10G_RX_PCS_BLKSYNC_ENUM_INVALID_SH_CNT_ADDR_FIELD_VALMASK = 32'h0000000F;
localparam HSSI_10G_RX_PCS_BLKSYNC_ENUM_INVALID_SH_CNT_ADDR_FIELD_VALUE = 7'hF;

localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_POSTLOCK_VALUE = "knum_sh_cnt_postlock_10g";
localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_POSTLOCK_ADDR0_OFST = 156;
localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_POSTLOCK_ADDR0_FIELD_OFST = 5;
localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_POSTLOCK_ADDR0_FIELD_HIGH = 7;
localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_POSTLOCK_ADDR0_FIELD_SIZE = 3;
localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_POSTLOCK_ADDR0_FIELD_BITMASK = 32'h000000E0;
localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_POSTLOCK_ADDR0_FIELD_VALMASK = 32'h000000E0;
localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_POSTLOCK_ADDR0_FIELD_VALUE = 3'h7;
localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_POSTLOCK_ADDR1_OFST = 157;
localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_POSTLOCK_ADDR1_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_POSTLOCK_ADDR1_FIELD_HIGH = 7;
localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_POSTLOCK_ADDR1_FIELD_SIZE = 8;
localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_POSTLOCK_ADDR1_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_POSTLOCK_ADDR1_FIELD_VALMASK = 32'h00000007;
localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_POSTLOCK_ADDR1_FIELD_VALUE = 8'h7;

localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_PRELOCK_VALUE = "knum_sh_cnt_prelock_10g";
localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_PRELOCK_ADDR_OFST = 158;
localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_PRELOCK_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_PRELOCK_ADDR_FIELD_HIGH = 6;
localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_PRELOCK_ADDR_FIELD_SIZE = 7;
localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_PRELOCK_ADDR_FIELD_BITMASK = 32'h0000007F;
localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_PRELOCK_ADDR_FIELD_VALMASK = 32'h0000003F;
localparam HSSI_10G_RX_PCS_BLKSYNC_KNUM_SH_CNT_PRELOCK_ADDR_FIELD_VALUE = 7'h3F;

localparam HSSI_10G_RX_PCS_BLKSYNC_PIPELN_VALUE = "blksync_pipeln_dis";
localparam HSSI_10G_RX_PCS_BLKSYNC_PIPELN_ADDR_OFST = 171;
localparam HSSI_10G_RX_PCS_BLKSYNC_PIPELN_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_BLKSYNC_PIPELN_ADDR_FIELD_HIGH = 0;
localparam HSSI_10G_RX_PCS_BLKSYNC_PIPELN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_BLKSYNC_PIPELN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_10G_RX_PCS_BLKSYNC_PIPELN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_BLKSYNC_PIPELN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_CLR_ERRBLK_CNT_EN_VALUE = "enable";
localparam HSSI_10G_RX_PCS_CLR_ERRBLK_CNT_EN_ADDR_OFST = 150;
localparam HSSI_10G_RX_PCS_CLR_ERRBLK_CNT_EN_ADDR_FIELD_OFST = 7;
localparam HSSI_10G_RX_PCS_CLR_ERRBLK_CNT_EN_ADDR_FIELD_HIGH = 7;
localparam HSSI_10G_RX_PCS_CLR_ERRBLK_CNT_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_CLR_ERRBLK_CNT_EN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_10G_RX_PCS_CLR_ERRBLK_CNT_EN_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_10G_RX_PCS_CLR_ERRBLK_CNT_EN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_CONTROL_DEL_VALUE = "control_del_none";
localparam HSSI_10G_RX_PCS_CONTROL_DEL_ADDR_OFST = 166;
localparam HSSI_10G_RX_PCS_CONTROL_DEL_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_CONTROL_DEL_ADDR_FIELD_HIGH = 7;
localparam HSSI_10G_RX_PCS_CONTROL_DEL_ADDR_FIELD_SIZE = 8;
localparam HSSI_10G_RX_PCS_CONTROL_DEL_ADDR_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_10G_RX_PCS_CONTROL_DEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_CONTROL_DEL_ADDR_FIELD_VALUE = 8'h0;

localparam HSSI_10G_RX_PCS_CRCCHK_BYPASS_VALUE = "crcchk_bypass_en";
localparam HSSI_10G_RX_PCS_CRCCHK_BYPASS_ADDR_OFST = 160;
localparam HSSI_10G_RX_PCS_CRCCHK_BYPASS_ADDR_FIELD_OFST = 6;
localparam HSSI_10G_RX_PCS_CRCCHK_BYPASS_ADDR_FIELD_HIGH = 6;
localparam HSSI_10G_RX_PCS_CRCCHK_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_CRCCHK_BYPASS_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_10G_RX_PCS_CRCCHK_BYPASS_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_10G_RX_PCS_CRCCHK_BYPASS_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_CRCCHK_CLKEN_VALUE = "crcchk_clk_dis";
localparam HSSI_10G_RX_PCS_CRCCHK_CLKEN_ADDR_OFST = 162;
localparam HSSI_10G_RX_PCS_CRCCHK_CLKEN_ADDR_FIELD_OFST = 2;
localparam HSSI_10G_RX_PCS_CRCCHK_CLKEN_ADDR_FIELD_HIGH = 2;
localparam HSSI_10G_RX_PCS_CRCCHK_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_CRCCHK_CLKEN_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_10G_RX_PCS_CRCCHK_CLKEN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_CRCCHK_CLKEN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_CRCCHK_INV_VALUE = "crcchk_inv_en";
localparam HSSI_10G_RX_PCS_CRCCHK_INV_ADDR_OFST = 173;
localparam HSSI_10G_RX_PCS_CRCCHK_INV_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_CRCCHK_INV_ADDR_FIELD_HIGH = 0;
localparam HSSI_10G_RX_PCS_CRCCHK_INV_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_CRCCHK_INV_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_10G_RX_PCS_CRCCHK_INV_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_10G_RX_PCS_CRCCHK_INV_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_CRCCHK_PIPELN_VALUE = "crcchk_pipeln_en";
localparam HSSI_10G_RX_PCS_CRCCHK_PIPELN_ADDR_OFST = 170;
localparam HSSI_10G_RX_PCS_CRCCHK_PIPELN_ADDR_FIELD_OFST = 3;
localparam HSSI_10G_RX_PCS_CRCCHK_PIPELN_ADDR_FIELD_HIGH = 3;
localparam HSSI_10G_RX_PCS_CRCCHK_PIPELN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_CRCCHK_PIPELN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_10G_RX_PCS_CRCCHK_PIPELN_ADDR_FIELD_VALMASK = 32'h00000008;
localparam HSSI_10G_RX_PCS_CRCCHK_PIPELN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_CRCFLAG_PIPELN_VALUE = "crcflag_pipeln_en";
localparam HSSI_10G_RX_PCS_CRCFLAG_PIPELN_ADDR_OFST = 170;
localparam HSSI_10G_RX_PCS_CRCFLAG_PIPELN_ADDR_FIELD_OFST = 2;
localparam HSSI_10G_RX_PCS_CRCFLAG_PIPELN_ADDR_FIELD_HIGH = 2;
localparam HSSI_10G_RX_PCS_CRCFLAG_PIPELN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_CRCFLAG_PIPELN_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_10G_RX_PCS_CRCFLAG_PIPELN_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_10G_RX_PCS_CRCFLAG_PIPELN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_CTRL_BIT_REVERSE_VALUE = "ctrl_bit_reverse_en";
localparam HSSI_10G_RX_PCS_CTRL_BIT_REVERSE_ADDR_OFST = 172;
localparam HSSI_10G_RX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_OFST = 1;
localparam HSSI_10G_RX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_HIGH = 1;
localparam HSSI_10G_RX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_10G_RX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_10G_RX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_DATA_BIT_REVERSE_VALUE = "data_bit_reverse_dis";
localparam HSSI_10G_RX_PCS_DATA_BIT_REVERSE_ADDR_OFST = 172;
localparam HSSI_10G_RX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_OFST = 3;
localparam HSSI_10G_RX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_HIGH = 3;
localparam HSSI_10G_RX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_10G_RX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_DEC64B66B_CLKEN_VALUE = "dec64b66b_clk_en";
localparam HSSI_10G_RX_PCS_DEC64B66B_CLKEN_ADDR_OFST = 162;
localparam HSSI_10G_RX_PCS_DEC64B66B_CLKEN_ADDR_FIELD_OFST = 5;
localparam HSSI_10G_RX_PCS_DEC64B66B_CLKEN_ADDR_FIELD_HIGH = 5;
localparam HSSI_10G_RX_PCS_DEC64B66B_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_DEC64B66B_CLKEN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_10G_RX_PCS_DEC64B66B_CLKEN_ADDR_FIELD_VALMASK = 32'h00000020;
localparam HSSI_10G_RX_PCS_DEC64B66B_CLKEN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_DEC_64B66B_RXSM_BYPASS_VALUE = "dec_64b66b_rxsm_bypass_dis";
localparam HSSI_10G_RX_PCS_DEC_64B66B_RXSM_BYPASS_ADDR_OFST = 150;
localparam HSSI_10G_RX_PCS_DEC_64B66B_RXSM_BYPASS_ADDR_FIELD_OFST = 1;
localparam HSSI_10G_RX_PCS_DEC_64B66B_RXSM_BYPASS_ADDR_FIELD_HIGH = 1;
localparam HSSI_10G_RX_PCS_DEC_64B66B_RXSM_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_DEC_64B66B_RXSM_BYPASS_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_10G_RX_PCS_DEC_64B66B_RXSM_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_DEC_64B66B_RXSM_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_DESCRM_BYPASS_VALUE = "descrm_bypass_dis";
localparam HSSI_10G_RX_PCS_DESCRM_BYPASS_ADDR_OFST = 150;
localparam HSSI_10G_RX_PCS_DESCRM_BYPASS_ADDR_FIELD_OFST = 3;
localparam HSSI_10G_RX_PCS_DESCRM_BYPASS_ADDR_FIELD_HIGH = 3;
localparam HSSI_10G_RX_PCS_DESCRM_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_DESCRM_BYPASS_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_10G_RX_PCS_DESCRM_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_DESCRM_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_DESCRM_CLKEN_VALUE = "descrm_clk_en";
localparam HSSI_10G_RX_PCS_DESCRM_CLKEN_ADDR_OFST = 162;
localparam HSSI_10G_RX_PCS_DESCRM_CLKEN_ADDR_FIELD_OFST = 7;
localparam HSSI_10G_RX_PCS_DESCRM_CLKEN_ADDR_FIELD_HIGH = 7;
localparam HSSI_10G_RX_PCS_DESCRM_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_DESCRM_CLKEN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_10G_RX_PCS_DESCRM_CLKEN_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_10G_RX_PCS_DESCRM_CLKEN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_DESCRM_MODE_VALUE = "async";
localparam HSSI_10G_RX_PCS_DESCRM_MODE_ADDR_OFST = 172;
localparam HSSI_10G_RX_PCS_DESCRM_MODE_ADDR_FIELD_OFST = 2;
localparam HSSI_10G_RX_PCS_DESCRM_MODE_ADDR_FIELD_HIGH = 2;
localparam HSSI_10G_RX_PCS_DESCRM_MODE_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_DESCRM_MODE_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_10G_RX_PCS_DESCRM_MODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_DESCRM_MODE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_DESCRM_PIPELN_VALUE = "enable";
localparam HSSI_10G_RX_PCS_DESCRM_PIPELN_ADDR_OFST = 170;
localparam HSSI_10G_RX_PCS_DESCRM_PIPELN_ADDR_FIELD_OFST = 7;
localparam HSSI_10G_RX_PCS_DESCRM_PIPELN_ADDR_FIELD_HIGH = 7;
localparam HSSI_10G_RX_PCS_DESCRM_PIPELN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_DESCRM_PIPELN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_10G_RX_PCS_DESCRM_PIPELN_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_10G_RX_PCS_DESCRM_PIPELN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_DFT_CLK_OUT_SEL_VALUE = "rx_master_clk";
localparam HSSI_10G_RX_PCS_DFT_CLK_OUT_SEL_ADDR_OFST = 179;
localparam HSSI_10G_RX_PCS_DFT_CLK_OUT_SEL_ADDR_FIELD_OFST = 3;
localparam HSSI_10G_RX_PCS_DFT_CLK_OUT_SEL_ADDR_FIELD_HIGH = 6;
localparam HSSI_10G_RX_PCS_DFT_CLK_OUT_SEL_ADDR_FIELD_SIZE = 4;
localparam HSSI_10G_RX_PCS_DFT_CLK_OUT_SEL_ADDR_FIELD_BITMASK = 32'h00000078;
localparam HSSI_10G_RX_PCS_DFT_CLK_OUT_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_DFT_CLK_OUT_SEL_ADDR_FIELD_VALUE = 4'h0;

localparam HSSI_10G_RX_PCS_DIS_SIGNAL_OK_VALUE = "dis_signal_ok_dis";
localparam HSSI_10G_RX_PCS_DIS_SIGNAL_OK_ADDR_OFST = 171;
localparam HSSI_10G_RX_PCS_DIS_SIGNAL_OK_ADDR_FIELD_OFST = 1;
localparam HSSI_10G_RX_PCS_DIS_SIGNAL_OK_ADDR_FIELD_HIGH = 1;
localparam HSSI_10G_RX_PCS_DIS_SIGNAL_OK_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_DIS_SIGNAL_OK_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_10G_RX_PCS_DIS_SIGNAL_OK_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_10G_RX_PCS_DIS_SIGNAL_OK_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_DISPCHK_BYPASS_VALUE = "dispchk_bypass_en";
localparam HSSI_10G_RX_PCS_DISPCHK_BYPASS_ADDR_OFST = 160;
localparam HSSI_10G_RX_PCS_DISPCHK_BYPASS_ADDR_FIELD_OFST = 7;
localparam HSSI_10G_RX_PCS_DISPCHK_BYPASS_ADDR_FIELD_HIGH = 7;
localparam HSSI_10G_RX_PCS_DISPCHK_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_DISPCHK_BYPASS_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_10G_RX_PCS_DISPCHK_BYPASS_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_10G_RX_PCS_DISPCHK_BYPASS_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_EMPTY_FLAG_TYPE_VALUE = "empty_rd_side";
localparam HSSI_10G_RX_PCS_EMPTY_FLAG_TYPE_ADDR_OFST = 178;
localparam HSSI_10G_RX_PCS_EMPTY_FLAG_TYPE_ADDR_FIELD_OFST = 1;
localparam HSSI_10G_RX_PCS_EMPTY_FLAG_TYPE_ADDR_FIELD_HIGH = 1;
localparam HSSI_10G_RX_PCS_EMPTY_FLAG_TYPE_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_EMPTY_FLAG_TYPE_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_10G_RX_PCS_EMPTY_FLAG_TYPE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_EMPTY_FLAG_TYPE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_FAST_PATH_VALUE = "fast_path_dis";
localparam HSSI_10G_RX_PCS_FAST_PATH_ADDR_OFST = 169;
localparam HSSI_10G_RX_PCS_FAST_PATH_ADDR_FIELD_OFST = 7;
localparam HSSI_10G_RX_PCS_FAST_PATH_ADDR_FIELD_HIGH = 7;
localparam HSSI_10G_RX_PCS_FAST_PATH_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_FAST_PATH_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_10G_RX_PCS_FAST_PATH_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_FAST_PATH_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_FEC_CLKEN_VALUE = "fec_clk_dis";
localparam HSSI_10G_RX_PCS_FEC_CLKEN_ADDR_OFST = 163;
localparam HSSI_10G_RX_PCS_FEC_CLKEN_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_FEC_CLKEN_ADDR_FIELD_HIGH = 0;
localparam HSSI_10G_RX_PCS_FEC_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_FEC_CLKEN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_10G_RX_PCS_FEC_CLKEN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_FEC_CLKEN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_FEC_ENABLE_VALUE = "fec_dis";
localparam HSSI_10G_RX_PCS_FEC_ENABLE_ADDR_OFST = 150;
localparam HSSI_10G_RX_PCS_FEC_ENABLE_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_FEC_ENABLE_ADDR_FIELD_HIGH = 0;
localparam HSSI_10G_RX_PCS_FEC_ENABLE_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_FEC_ENABLE_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_10G_RX_PCS_FEC_ENABLE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_FEC_ENABLE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_FIFO_DOUBLE_READ_VALUE = "fifo_double_read_dis";
localparam HSSI_10G_RX_PCS_FIFO_DOUBLE_READ_ADDR_OFST = 178;
localparam HSSI_10G_RX_PCS_FIFO_DOUBLE_READ_ADDR_FIELD_OFST = 7;
localparam HSSI_10G_RX_PCS_FIFO_DOUBLE_READ_ADDR_FIELD_HIGH = 7;
localparam HSSI_10G_RX_PCS_FIFO_DOUBLE_READ_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_FIFO_DOUBLE_READ_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_10G_RX_PCS_FIFO_DOUBLE_READ_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_FIFO_DOUBLE_READ_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_FIFO_STOP_RD_VALUE = "n_rd_empty";
localparam HSSI_10G_RX_PCS_FIFO_STOP_RD_ADDR_OFST = 178;
localparam HSSI_10G_RX_PCS_FIFO_STOP_RD_ADDR_FIELD_OFST = 5;
localparam HSSI_10G_RX_PCS_FIFO_STOP_RD_ADDR_FIELD_HIGH = 5;
localparam HSSI_10G_RX_PCS_FIFO_STOP_RD_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_FIFO_STOP_RD_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_10G_RX_PCS_FIFO_STOP_RD_ADDR_FIELD_VALMASK = 32'h00000020;
localparam HSSI_10G_RX_PCS_FIFO_STOP_RD_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_FIFO_STOP_WR_VALUE = "n_wr_full";
localparam HSSI_10G_RX_PCS_FIFO_STOP_WR_ADDR_OFST = 178;
localparam HSSI_10G_RX_PCS_FIFO_STOP_WR_ADDR_FIELD_OFST = 6;
localparam HSSI_10G_RX_PCS_FIFO_STOP_WR_ADDR_FIELD_HIGH = 6;
localparam HSSI_10G_RX_PCS_FIFO_STOP_WR_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_FIFO_STOP_WR_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_10G_RX_PCS_FIFO_STOP_WR_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_10G_RX_PCS_FIFO_STOP_WR_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_FORCE_ALIGN_VALUE = "force_align_dis";
localparam HSSI_10G_RX_PCS_FORCE_ALIGN_ADDR_OFST = 164;
localparam HSSI_10G_RX_PCS_FORCE_ALIGN_ADDR_FIELD_OFST = 1;
localparam HSSI_10G_RX_PCS_FORCE_ALIGN_ADDR_FIELD_HIGH = 1;
localparam HSSI_10G_RX_PCS_FORCE_ALIGN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_FORCE_ALIGN_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_10G_RX_PCS_FORCE_ALIGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_FORCE_ALIGN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_FRMSYNC_BYPASS_VALUE = "frmsync_bypass_en";
localparam HSSI_10G_RX_PCS_FRMSYNC_BYPASS_ADDR_OFST = 160;
localparam HSSI_10G_RX_PCS_FRMSYNC_BYPASS_ADDR_FIELD_OFST = 5;
localparam HSSI_10G_RX_PCS_FRMSYNC_BYPASS_ADDR_FIELD_HIGH = 5;
localparam HSSI_10G_RX_PCS_FRMSYNC_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_FRMSYNC_BYPASS_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_10G_RX_PCS_FRMSYNC_BYPASS_ADDR_FIELD_VALMASK = 32'h00000020;
localparam HSSI_10G_RX_PCS_FRMSYNC_BYPASS_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_FRMSYNC_CLKEN_VALUE = "frmsync_clk_dis";
localparam HSSI_10G_RX_PCS_FRMSYNC_CLKEN_ADDR_OFST = 162;
localparam HSSI_10G_RX_PCS_FRMSYNC_CLKEN_ADDR_FIELD_OFST = 6;
localparam HSSI_10G_RX_PCS_FRMSYNC_CLKEN_ADDR_FIELD_HIGH = 6;
localparam HSSI_10G_RX_PCS_FRMSYNC_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_FRMSYNC_CLKEN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_10G_RX_PCS_FRMSYNC_CLKEN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_FRMSYNC_CLKEN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_FRMSYNC_ENUM_SCRM_VALUE = "enum_scrm_default";
localparam HSSI_10G_RX_PCS_FRMSYNC_ENUM_SCRM_ADDR_OFST = 164;
localparam HSSI_10G_RX_PCS_FRMSYNC_ENUM_SCRM_ADDR_FIELD_OFST = 2;
localparam HSSI_10G_RX_PCS_FRMSYNC_ENUM_SCRM_ADDR_FIELD_HIGH = 4;
localparam HSSI_10G_RX_PCS_FRMSYNC_ENUM_SCRM_ADDR_FIELD_SIZE = 3;
localparam HSSI_10G_RX_PCS_FRMSYNC_ENUM_SCRM_ADDR_FIELD_BITMASK = 32'h0000001C;
localparam HSSI_10G_RX_PCS_FRMSYNC_ENUM_SCRM_ADDR_FIELD_VALMASK = 32'h0000000C;
localparam HSSI_10G_RX_PCS_FRMSYNC_ENUM_SCRM_ADDR_FIELD_VALUE = 3'h3;

localparam HSSI_10G_RX_PCS_FRMSYNC_ENUM_SYNC_VALUE = "enum_sync_default";
localparam HSSI_10G_RX_PCS_FRMSYNC_ENUM_SYNC_ADDR_OFST = 164;
localparam HSSI_10G_RX_PCS_FRMSYNC_ENUM_SYNC_ADDR_FIELD_OFST = 5;
localparam HSSI_10G_RX_PCS_FRMSYNC_ENUM_SYNC_ADDR_FIELD_HIGH = 7;
localparam HSSI_10G_RX_PCS_FRMSYNC_ENUM_SYNC_ADDR_FIELD_SIZE = 3;
localparam HSSI_10G_RX_PCS_FRMSYNC_ENUM_SYNC_ADDR_FIELD_BITMASK = 32'h000000E0;
localparam HSSI_10G_RX_PCS_FRMSYNC_ENUM_SYNC_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_10G_RX_PCS_FRMSYNC_ENUM_SYNC_ADDR_FIELD_VALUE = 3'h4;

localparam HSSI_10G_RX_PCS_FRMSYNC_FLAG_TYPE_VALUE = "location_only";
localparam HSSI_10G_RX_PCS_FRMSYNC_FLAG_TYPE_ADDR_OFST = 173;
localparam HSSI_10G_RX_PCS_FRMSYNC_FLAG_TYPE_ADDR_FIELD_OFST = 1;
localparam HSSI_10G_RX_PCS_FRMSYNC_FLAG_TYPE_ADDR_FIELD_HIGH = 1;
localparam HSSI_10G_RX_PCS_FRMSYNC_FLAG_TYPE_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_FRMSYNC_FLAG_TYPE_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_10G_RX_PCS_FRMSYNC_FLAG_TYPE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_FRMSYNC_FLAG_TYPE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_FRMSYNC_KNUM_SYNC_VALUE = "knum_sync_default";
localparam HSSI_10G_RX_PCS_FRMSYNC_KNUM_SYNC_ADDR_OFST = 165;
localparam HSSI_10G_RX_PCS_FRMSYNC_KNUM_SYNC_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_FRMSYNC_KNUM_SYNC_ADDR_FIELD_HIGH = 2;
localparam HSSI_10G_RX_PCS_FRMSYNC_KNUM_SYNC_ADDR_FIELD_SIZE = 3;
localparam HSSI_10G_RX_PCS_FRMSYNC_KNUM_SYNC_ADDR_FIELD_BITMASK = 32'h00000007;
localparam HSSI_10G_RX_PCS_FRMSYNC_KNUM_SYNC_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_10G_RX_PCS_FRMSYNC_KNUM_SYNC_ADDR_FIELD_VALUE = 3'h4;

localparam HSSI_10G_RX_PCS_FRMSYNC_MFRM_LENGTH_VALUE = 16'd2048;
localparam HSSI_10G_RX_PCS_FRMSYNC_MFRM_LENGTH_ADDR0_OFST = 174;
localparam HSSI_10G_RX_PCS_FRMSYNC_MFRM_LENGTH_ADDR0_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_FRMSYNC_MFRM_LENGTH_ADDR0_FIELD_HIGH = 7;
localparam HSSI_10G_RX_PCS_FRMSYNC_MFRM_LENGTH_ADDR0_FIELD_SIZE = 8;
localparam HSSI_10G_RX_PCS_FRMSYNC_MFRM_LENGTH_ADDR0_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_10G_RX_PCS_FRMSYNC_MFRM_LENGTH_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_FRMSYNC_MFRM_LENGTH_ADDR0_FIELD_VALUE = 8'h0;
localparam HSSI_10G_RX_PCS_FRMSYNC_MFRM_LENGTH_ADDR1_OFST = 175;
localparam HSSI_10G_RX_PCS_FRMSYNC_MFRM_LENGTH_ADDR1_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_FRMSYNC_MFRM_LENGTH_ADDR1_FIELD_HIGH = 7;
localparam HSSI_10G_RX_PCS_FRMSYNC_MFRM_LENGTH_ADDR1_FIELD_SIZE = 8;
localparam HSSI_10G_RX_PCS_FRMSYNC_MFRM_LENGTH_ADDR1_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_10G_RX_PCS_FRMSYNC_MFRM_LENGTH_ADDR1_FIELD_VALMASK = 32'h00000008;
localparam HSSI_10G_RX_PCS_FRMSYNC_MFRM_LENGTH_ADDR1_FIELD_VALUE = 8'h8;

localparam HSSI_10G_RX_PCS_FRMSYNC_PIPELN_VALUE = "frmsync_pipeln_en";
localparam HSSI_10G_RX_PCS_FRMSYNC_PIPELN_ADDR_OFST = 170;
localparam HSSI_10G_RX_PCS_FRMSYNC_PIPELN_ADDR_FIELD_OFST = 6;
localparam HSSI_10G_RX_PCS_FRMSYNC_PIPELN_ADDR_FIELD_HIGH = 6;
localparam HSSI_10G_RX_PCS_FRMSYNC_PIPELN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_FRMSYNC_PIPELN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_10G_RX_PCS_FRMSYNC_PIPELN_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_10G_RX_PCS_FRMSYNC_PIPELN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_FULL_FLAG_TYPE_VALUE = "full_wr_side";
localparam HSSI_10G_RX_PCS_FULL_FLAG_TYPE_ADDR_OFST = 178;
localparam HSSI_10G_RX_PCS_FULL_FLAG_TYPE_ADDR_FIELD_OFST = 4;
localparam HSSI_10G_RX_PCS_FULL_FLAG_TYPE_ADDR_FIELD_HIGH = 4;
localparam HSSI_10G_RX_PCS_FULL_FLAG_TYPE_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_FULL_FLAG_TYPE_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_10G_RX_PCS_FULL_FLAG_TYPE_ADDR_FIELD_VALMASK = 32'h00000010;
localparam HSSI_10G_RX_PCS_FULL_FLAG_TYPE_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_GB_RX_IDWIDTH_VALUE = "idwidth_32";
localparam HSSI_10G_RX_PCS_GB_RX_IDWIDTH_ADDR_OFST = 160;
localparam HSSI_10G_RX_PCS_GB_RX_IDWIDTH_ADDR_FIELD_OFST = 3;
localparam HSSI_10G_RX_PCS_GB_RX_IDWIDTH_ADDR_FIELD_HIGH = 4;
localparam HSSI_10G_RX_PCS_GB_RX_IDWIDTH_ADDR_FIELD_SIZE = 2;
localparam HSSI_10G_RX_PCS_GB_RX_IDWIDTH_ADDR_FIELD_BITMASK = 32'h00000018;
localparam HSSI_10G_RX_PCS_GB_RX_IDWIDTH_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_GB_RX_IDWIDTH_ADDR_FIELD_VALUE = 2'h0;

localparam HSSI_10G_RX_PCS_GB_RX_ODWIDTH_VALUE = "odwidth_66";
localparam HSSI_10G_RX_PCS_GB_RX_ODWIDTH_ADDR_OFST = 160;
localparam HSSI_10G_RX_PCS_GB_RX_ODWIDTH_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_GB_RX_ODWIDTH_ADDR_FIELD_HIGH = 2;
localparam HSSI_10G_RX_PCS_GB_RX_ODWIDTH_ADDR_FIELD_SIZE = 3;
localparam HSSI_10G_RX_PCS_GB_RX_ODWIDTH_ADDR_FIELD_BITMASK = 32'h00000007;
localparam HSSI_10G_RX_PCS_GB_RX_ODWIDTH_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_GB_RX_ODWIDTH_ADDR_FIELD_VALUE = 3'h0;

localparam HSSI_10G_RX_PCS_GBEXP_CLKEN_VALUE = "gbexp_clk_en";
localparam HSSI_10G_RX_PCS_GBEXP_CLKEN_ADDR_OFST = 163;
localparam HSSI_10G_RX_PCS_GBEXP_CLKEN_ADDR_FIELD_OFST = 3;
localparam HSSI_10G_RX_PCS_GBEXP_CLKEN_ADDR_FIELD_HIGH = 3;
localparam HSSI_10G_RX_PCS_GBEXP_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_GBEXP_CLKEN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_10G_RX_PCS_GBEXP_CLKEN_ADDR_FIELD_VALMASK = 32'h00000008;
localparam HSSI_10G_RX_PCS_GBEXP_CLKEN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_LOW_LATENCY_EN_VALUE = "disable";

localparam HSSI_10G_RX_PCS_LPBK_MODE_VALUE = "lpbk_dis";

localparam HSSI_10G_RX_PCS_MASTER_CLK_SEL_VALUE = "master_rx_pma_clk";
localparam HSSI_10G_RX_PCS_MASTER_CLK_SEL_ADDR_OFST = 170;
localparam HSSI_10G_RX_PCS_MASTER_CLK_SEL_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_MASTER_CLK_SEL_ADDR_FIELD_HIGH = 1;
localparam HSSI_10G_RX_PCS_MASTER_CLK_SEL_ADDR_FIELD_SIZE = 2;
localparam HSSI_10G_RX_PCS_MASTER_CLK_SEL_ADDR_FIELD_BITMASK = 32'h00000003;
localparam HSSI_10G_RX_PCS_MASTER_CLK_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_MASTER_CLK_SEL_ADDR_FIELD_VALUE = 2'h0;

localparam HSSI_10G_RX_PCS_PEMPTY_FLAG_TYPE_VALUE = "pempty_rd_side";
localparam HSSI_10G_RX_PCS_PEMPTY_FLAG_TYPE_ADDR_OFST = 178;
localparam HSSI_10G_RX_PCS_PEMPTY_FLAG_TYPE_ADDR_FIELD_OFST = 2;
localparam HSSI_10G_RX_PCS_PEMPTY_FLAG_TYPE_ADDR_FIELD_HIGH = 2;
localparam HSSI_10G_RX_PCS_PEMPTY_FLAG_TYPE_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_PEMPTY_FLAG_TYPE_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_10G_RX_PCS_PEMPTY_FLAG_TYPE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_PEMPTY_FLAG_TYPE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_PFULL_FLAG_TYPE_VALUE = "pfull_wr_side";
localparam HSSI_10G_RX_PCS_PFULL_FLAG_TYPE_ADDR_OFST = 178;
localparam HSSI_10G_RX_PCS_PFULL_FLAG_TYPE_ADDR_FIELD_OFST = 3;
localparam HSSI_10G_RX_PCS_PFULL_FLAG_TYPE_ADDR_FIELD_HIGH = 3;
localparam HSSI_10G_RX_PCS_PFULL_FLAG_TYPE_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_PFULL_FLAG_TYPE_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_10G_RX_PCS_PFULL_FLAG_TYPE_ADDR_FIELD_VALMASK = 32'h00000008;
localparam HSSI_10G_RX_PCS_PFULL_FLAG_TYPE_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_PHCOMP_RD_DEL_VALUE = "phcomp_rd_del2";
localparam HSSI_10G_RX_PCS_PHCOMP_RD_DEL_ADDR_OFST = 179;
localparam HSSI_10G_RX_PCS_PHCOMP_RD_DEL_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_PHCOMP_RD_DEL_ADDR_FIELD_HIGH = 2;
localparam HSSI_10G_RX_PCS_PHCOMP_RD_DEL_ADDR_FIELD_SIZE = 3;
localparam HSSI_10G_RX_PCS_PHCOMP_RD_DEL_ADDR_FIELD_BITMASK = 32'h00000007;
localparam HSSI_10G_RX_PCS_PHCOMP_RD_DEL_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_10G_RX_PCS_PHCOMP_RD_DEL_ADDR_FIELD_VALUE = 3'h2;

localparam HSSI_10G_RX_PCS_PLD_IF_TYPE_VALUE = "reg";

localparam HSSI_10G_RX_PCS_PROT_MODE_VALUE = "teng_1588_mode";

localparam HSSI_10G_RX_PCS_RAND_CLKEN_VALUE = "rand_clk_en";
localparam HSSI_10G_RX_PCS_RAND_CLKEN_ADDR_OFST = 162;
localparam HSSI_10G_RX_PCS_RAND_CLKEN_ADDR_FIELD_OFST = 3;
localparam HSSI_10G_RX_PCS_RAND_CLKEN_ADDR_FIELD_HIGH = 3;
localparam HSSI_10G_RX_PCS_RAND_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_RAND_CLKEN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_10G_RX_PCS_RAND_CLKEN_ADDR_FIELD_VALMASK = 32'h00000008;
localparam HSSI_10G_RX_PCS_RAND_CLKEN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_RD_CLK_SEL_VALUE = "rd_rx_pma_clk";
localparam HSSI_10G_RX_PCS_RD_CLK_SEL_ADDR_OFST = 151;
localparam HSSI_10G_RX_PCS_RD_CLK_SEL_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_RD_CLK_SEL_ADDR_FIELD_HIGH = 1;
localparam HSSI_10G_RX_PCS_RD_CLK_SEL_ADDR_FIELD_SIZE = 2;
localparam HSSI_10G_RX_PCS_RD_CLK_SEL_ADDR_FIELD_BITMASK = 32'h00000003;
localparam HSSI_10G_RX_PCS_RD_CLK_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_RD_CLK_SEL_ADDR_FIELD_VALUE = 2'h0;

localparam HSSI_10G_RX_PCS_RDFIFO_CLKEN_VALUE = "rdfifo_clk_en";
localparam HSSI_10G_RX_PCS_RDFIFO_CLKEN_ADDR_OFST = 162;
localparam HSSI_10G_RX_PCS_RDFIFO_CLKEN_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_RDFIFO_CLKEN_ADDR_FIELD_HIGH = 0;
localparam HSSI_10G_RX_PCS_RDFIFO_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_RDFIFO_CLKEN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_10G_RX_PCS_RDFIFO_CLKEN_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_10G_RX_PCS_RDFIFO_CLKEN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_RX_FIFO_WRITE_CTRL_VALUE = "blklock_stops";
localparam HSSI_10G_RX_PCS_RX_FIFO_WRITE_CTRL_ADDR_OFST = 178;
localparam HSSI_10G_RX_PCS_RX_FIFO_WRITE_CTRL_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_RX_FIFO_WRITE_CTRL_ADDR_FIELD_HIGH = 0;
localparam HSSI_10G_RX_PCS_RX_FIFO_WRITE_CTRL_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_RX_FIFO_WRITE_CTRL_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_10G_RX_PCS_RX_FIFO_WRITE_CTRL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_RX_FIFO_WRITE_CTRL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_RX_SCRM_WIDTH_VALUE = "bit64";
localparam HSSI_10G_RX_PCS_RX_SCRM_WIDTH_ADDR_OFST = 177;
localparam HSSI_10G_RX_PCS_RX_SCRM_WIDTH_ADDR_FIELD_OFST = 3;
localparam HSSI_10G_RX_PCS_RX_SCRM_WIDTH_ADDR_FIELD_HIGH = 4;
localparam HSSI_10G_RX_PCS_RX_SCRM_WIDTH_ADDR_FIELD_SIZE = 2;
localparam HSSI_10G_RX_PCS_RX_SCRM_WIDTH_ADDR_FIELD_BITMASK = 32'h00000018;
localparam HSSI_10G_RX_PCS_RX_SCRM_WIDTH_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_RX_SCRM_WIDTH_ADDR_FIELD_VALUE = 2'h0;

localparam HSSI_10G_RX_PCS_RX_SH_LOCATION_VALUE = "lsb";
localparam HSSI_10G_RX_PCS_RX_SH_LOCATION_ADDR_OFST = 176;
localparam HSSI_10G_RX_PCS_RX_SH_LOCATION_ADDR_FIELD_OFST = 1;
localparam HSSI_10G_RX_PCS_RX_SH_LOCATION_ADDR_FIELD_HIGH = 1;
localparam HSSI_10G_RX_PCS_RX_SH_LOCATION_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_RX_SH_LOCATION_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_10G_RX_PCS_RX_SH_LOCATION_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_RX_SH_LOCATION_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_RX_SIGNAL_OK_SEL_VALUE = "synchronized_ver";
localparam HSSI_10G_RX_PCS_RX_SIGNAL_OK_SEL_ADDR_OFST = 176;
localparam HSSI_10G_RX_PCS_RX_SIGNAL_OK_SEL_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_RX_SIGNAL_OK_SEL_ADDR_FIELD_HIGH = 0;
localparam HSSI_10G_RX_PCS_RX_SIGNAL_OK_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_RX_SIGNAL_OK_SEL_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_10G_RX_PCS_RX_SIGNAL_OK_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_RX_SIGNAL_OK_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_RX_SM_BYPASS_VALUE = "rx_sm_bypass_dis";
localparam HSSI_10G_RX_PCS_RX_SM_BYPASS_ADDR_OFST = 150;
localparam HSSI_10G_RX_PCS_RX_SM_BYPASS_ADDR_FIELD_OFST = 2;
localparam HSSI_10G_RX_PCS_RX_SM_BYPASS_ADDR_FIELD_HIGH = 2;
localparam HSSI_10G_RX_PCS_RX_SM_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_RX_SM_BYPASS_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_10G_RX_PCS_RX_SM_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_RX_SM_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_RX_SM_HIBER_VALUE = "rx_sm_hiber_en";
localparam HSSI_10G_RX_PCS_RX_SM_HIBER_ADDR_OFST = 173;
localparam HSSI_10G_RX_PCS_RX_SM_HIBER_ADDR_FIELD_OFST = 2;
localparam HSSI_10G_RX_PCS_RX_SM_HIBER_ADDR_FIELD_HIGH = 2;
localparam HSSI_10G_RX_PCS_RX_SM_HIBER_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_RX_SM_HIBER_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_10G_RX_PCS_RX_SM_HIBER_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_10G_RX_PCS_RX_SM_HIBER_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_RX_SM_PIPELN_VALUE = "rx_sm_pipeln_en";
localparam HSSI_10G_RX_PCS_RX_SM_PIPELN_ADDR_OFST = 170;
localparam HSSI_10G_RX_PCS_RX_SM_PIPELN_ADDR_FIELD_OFST = 4;
localparam HSSI_10G_RX_PCS_RX_SM_PIPELN_ADDR_FIELD_HIGH = 4;
localparam HSSI_10G_RX_PCS_RX_SM_PIPELN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_RX_SM_PIPELN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_10G_RX_PCS_RX_SM_PIPELN_ADDR_FIELD_VALMASK = 32'h00000010;
localparam HSSI_10G_RX_PCS_RX_SM_PIPELN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_RX_TESTBUS_SEL_VALUE = "rx_fifo_testbus1";
localparam HSSI_10G_RX_PCS_RX_TESTBUS_SEL_ADDR_OFST = 176;
localparam HSSI_10G_RX_PCS_RX_TESTBUS_SEL_ADDR_FIELD_OFST = 3;
localparam HSSI_10G_RX_PCS_RX_TESTBUS_SEL_ADDR_FIELD_HIGH = 7;
localparam HSSI_10G_RX_PCS_RX_TESTBUS_SEL_ADDR_FIELD_SIZE = 5;
localparam HSSI_10G_RX_PCS_RX_TESTBUS_SEL_ADDR_FIELD_BITMASK = 32'h000000F8;
localparam HSSI_10G_RX_PCS_RX_TESTBUS_SEL_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_10G_RX_PCS_RX_TESTBUS_SEL_ADDR_FIELD_VALUE = 5'h10;

localparam HSSI_10G_RX_PCS_RX_TRUE_B2B_VALUE = "b2b";
localparam HSSI_10G_RX_PCS_RX_TRUE_B2B_ADDR_OFST = 177;
localparam HSSI_10G_RX_PCS_RX_TRUE_B2B_ADDR_FIELD_OFST = 6;
localparam HSSI_10G_RX_PCS_RX_TRUE_B2B_ADDR_FIELD_HIGH = 6;
localparam HSSI_10G_RX_PCS_RX_TRUE_B2B_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_RX_TRUE_B2B_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_10G_RX_PCS_RX_TRUE_B2B_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_10G_RX_PCS_RX_TRUE_B2B_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_RXFIFO_EMPTY_VALUE = "empty_default";
localparam HSSI_10G_RX_PCS_RXFIFO_EMPTY_ADDR_OFST = 169;
localparam HSSI_10G_RX_PCS_RXFIFO_EMPTY_ADDR_FIELD_OFST = 2;
localparam HSSI_10G_RX_PCS_RXFIFO_EMPTY_ADDR_FIELD_HIGH = 6;
localparam HSSI_10G_RX_PCS_RXFIFO_EMPTY_ADDR_FIELD_SIZE = 5;
localparam HSSI_10G_RX_PCS_RXFIFO_EMPTY_ADDR_FIELD_BITMASK = 32'h0000007C;
localparam HSSI_10G_RX_PCS_RXFIFO_EMPTY_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_RXFIFO_EMPTY_ADDR_FIELD_VALUE = 5'h0;

localparam HSSI_10G_RX_PCS_RXFIFO_FULL_VALUE = "full_default";
localparam HSSI_10G_RX_PCS_RXFIFO_FULL_ADDR0_OFST = 168;
localparam HSSI_10G_RX_PCS_RXFIFO_FULL_ADDR0_FIELD_OFST = 5;
localparam HSSI_10G_RX_PCS_RXFIFO_FULL_ADDR0_FIELD_HIGH = 7;
localparam HSSI_10G_RX_PCS_RXFIFO_FULL_ADDR0_FIELD_SIZE = 3;
localparam HSSI_10G_RX_PCS_RXFIFO_FULL_ADDR0_FIELD_BITMASK = 32'h000000E0;
localparam HSSI_10G_RX_PCS_RXFIFO_FULL_ADDR0_FIELD_VALMASK = 32'h000000E0;
localparam HSSI_10G_RX_PCS_RXFIFO_FULL_ADDR0_FIELD_VALUE = 3'h7;
localparam HSSI_10G_RX_PCS_RXFIFO_FULL_ADDR1_OFST = 169;
localparam HSSI_10G_RX_PCS_RXFIFO_FULL_ADDR1_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_RXFIFO_FULL_ADDR1_FIELD_HIGH = 1;
localparam HSSI_10G_RX_PCS_RXFIFO_FULL_ADDR1_FIELD_SIZE = 2;
localparam HSSI_10G_RX_PCS_RXFIFO_FULL_ADDR1_FIELD_BITMASK = 32'h00000003;
localparam HSSI_10G_RX_PCS_RXFIFO_FULL_ADDR1_FIELD_VALMASK = 32'h00000003;
localparam HSSI_10G_RX_PCS_RXFIFO_FULL_ADDR1_FIELD_VALUE = 2'h3;

localparam HSSI_10G_RX_PCS_RXFIFO_MODE_VALUE = "register_mode";
localparam HSSI_10G_RX_PCS_RXFIFO_MODE_ADDR_OFST = 172;
localparam HSSI_10G_RX_PCS_RXFIFO_MODE_ADDR_FIELD_OFST = 5;
localparam HSSI_10G_RX_PCS_RXFIFO_MODE_ADDR_FIELD_HIGH = 7;
localparam HSSI_10G_RX_PCS_RXFIFO_MODE_ADDR_FIELD_SIZE = 3;
localparam HSSI_10G_RX_PCS_RXFIFO_MODE_ADDR_FIELD_BITMASK = 32'h000000E0;
localparam HSSI_10G_RX_PCS_RXFIFO_MODE_ADDR_FIELD_VALMASK = 32'h00000060;
localparam HSSI_10G_RX_PCS_RXFIFO_MODE_ADDR_FIELD_VALUE = 3'h3;

localparam HSSI_10G_RX_PCS_RXFIFO_PEMPTY_VALUE = 5'd2;
localparam HSSI_10G_RX_PCS_RXFIFO_PEMPTY_ADDR_OFST = 168;
localparam HSSI_10G_RX_PCS_RXFIFO_PEMPTY_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_RXFIFO_PEMPTY_ADDR_FIELD_HIGH = 4;
localparam HSSI_10G_RX_PCS_RXFIFO_PEMPTY_ADDR_FIELD_SIZE = 5;
localparam HSSI_10G_RX_PCS_RXFIFO_PEMPTY_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam HSSI_10G_RX_PCS_RXFIFO_PEMPTY_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_10G_RX_PCS_RXFIFO_PEMPTY_ADDR_FIELD_VALUE = 5'h2;

localparam HSSI_10G_RX_PCS_RXFIFO_PFULL_VALUE = 5'd23;
localparam HSSI_10G_RX_PCS_RXFIFO_PFULL_ADDR_OFST = 167;
localparam HSSI_10G_RX_PCS_RXFIFO_PFULL_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_RXFIFO_PFULL_ADDR_FIELD_HIGH = 4;
localparam HSSI_10G_RX_PCS_RXFIFO_PFULL_ADDR_FIELD_SIZE = 5;
localparam HSSI_10G_RX_PCS_RXFIFO_PFULL_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam HSSI_10G_RX_PCS_RXFIFO_PFULL_ADDR_FIELD_VALMASK = 32'h00000017;
localparam HSSI_10G_RX_PCS_RXFIFO_PFULL_ADDR_FIELD_VALUE = 5'h17;

localparam HSSI_10G_RX_PCS_STRETCH_NUM_STAGES_VALUE = "one_stage";
localparam HSSI_10G_RX_PCS_STRETCH_NUM_STAGES_ADDR_OFST = 177;
localparam HSSI_10G_RX_PCS_STRETCH_NUM_STAGES_ADDR_FIELD_OFST = 1;
localparam HSSI_10G_RX_PCS_STRETCH_NUM_STAGES_ADDR_FIELD_HIGH = 2;
localparam HSSI_10G_RX_PCS_STRETCH_NUM_STAGES_ADDR_FIELD_SIZE = 2;
localparam HSSI_10G_RX_PCS_STRETCH_NUM_STAGES_ADDR_FIELD_BITMASK = 32'h00000006;
localparam HSSI_10G_RX_PCS_STRETCH_NUM_STAGES_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_10G_RX_PCS_STRETCH_NUM_STAGES_ADDR_FIELD_VALUE = 2'h1;

localparam HSSI_10G_RX_PCS_SUP_MODE_VALUE = "user_mode";

localparam HSSI_10G_RX_PCS_TEST_MODE_VALUE = "test_off";
localparam HSSI_10G_RX_PCS_TEST_MODE_ADDR0_OFST = 151;
localparam HSSI_10G_RX_PCS_TEST_MODE_ADDR0_FIELD_OFST = 2;
localparam HSSI_10G_RX_PCS_TEST_MODE_ADDR0_FIELD_HIGH = 2;
localparam HSSI_10G_RX_PCS_TEST_MODE_ADDR0_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_TEST_MODE_ADDR0_FIELD_BITMASK = 32'h00000004;
localparam HSSI_10G_RX_PCS_TEST_MODE_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_TEST_MODE_ADDR0_FIELD_VALUE = 1'h0;
localparam HSSI_10G_RX_PCS_TEST_MODE_ADDR1_OFST = 172;
localparam HSSI_10G_RX_PCS_TEST_MODE_ADDR1_FIELD_OFST = 0;
localparam HSSI_10G_RX_PCS_TEST_MODE_ADDR1_FIELD_HIGH = 0;
localparam HSSI_10G_RX_PCS_TEST_MODE_ADDR1_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_TEST_MODE_ADDR1_FIELD_BITMASK = 32'h00000001;
localparam HSSI_10G_RX_PCS_TEST_MODE_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_RX_PCS_TEST_MODE_ADDR1_FIELD_VALUE = 1'h0;

localparam HSSI_10G_RX_PCS_WRFIFO_CLKEN_VALUE = "wrfifo_clk_en";
localparam HSSI_10G_RX_PCS_WRFIFO_CLKEN_ADDR_OFST = 162;
localparam HSSI_10G_RX_PCS_WRFIFO_CLKEN_ADDR_FIELD_OFST = 1;
localparam HSSI_10G_RX_PCS_WRFIFO_CLKEN_ADDR_FIELD_HIGH = 1;
localparam HSSI_10G_RX_PCS_WRFIFO_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_RX_PCS_WRFIFO_CLKEN_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_10G_RX_PCS_WRFIFO_CLKEN_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_10G_RX_PCS_WRFIFO_CLKEN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_RX_PCS_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam HSSI_10G_TX_PCS_ADVANCED_USER_MODE_VALUE = "disable";

localparam HSSI_10G_TX_PCS_BITSLIP_EN_VALUE = "bitslip_dis";
localparam HSSI_10G_TX_PCS_BITSLIP_EN_ADDR_OFST = 141;
localparam HSSI_10G_TX_PCS_BITSLIP_EN_ADDR_FIELD_OFST = 4;
localparam HSSI_10G_TX_PCS_BITSLIP_EN_ADDR_FIELD_HIGH = 4;
localparam HSSI_10G_TX_PCS_BITSLIP_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_BITSLIP_EN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_10G_TX_PCS_BITSLIP_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_BITSLIP_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_BONDING_DFT_EN_VALUE = "dft_dis";
localparam HSSI_10G_TX_PCS_BONDING_DFT_EN_ADDR_OFST = 143;
localparam HSSI_10G_TX_PCS_BONDING_DFT_EN_ADDR_FIELD_OFST = 6;
localparam HSSI_10G_TX_PCS_BONDING_DFT_EN_ADDR_FIELD_HIGH = 6;
localparam HSSI_10G_TX_PCS_BONDING_DFT_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_BONDING_DFT_EN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_10G_TX_PCS_BONDING_DFT_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_BONDING_DFT_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_BONDING_DFT_VAL_VALUE = "dft_0";
localparam HSSI_10G_TX_PCS_BONDING_DFT_VAL_ADDR_OFST = 143;
localparam HSSI_10G_TX_PCS_BONDING_DFT_VAL_ADDR_FIELD_OFST = 7;
localparam HSSI_10G_TX_PCS_BONDING_DFT_VAL_ADDR_FIELD_HIGH = 7;
localparam HSSI_10G_TX_PCS_BONDING_DFT_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_BONDING_DFT_VAL_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_10G_TX_PCS_BONDING_DFT_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_BONDING_DFT_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_CRCGEN_BYPASS_VALUE = "crcgen_bypass_en";
localparam HSSI_10G_TX_PCS_CRCGEN_BYPASS_ADDR_OFST = 136;
localparam HSSI_10G_TX_PCS_CRCGEN_BYPASS_ADDR_FIELD_OFST = 6;
localparam HSSI_10G_TX_PCS_CRCGEN_BYPASS_ADDR_FIELD_HIGH = 6;
localparam HSSI_10G_TX_PCS_CRCGEN_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_CRCGEN_BYPASS_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_10G_TX_PCS_CRCGEN_BYPASS_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_10G_TX_PCS_CRCGEN_BYPASS_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_CRCGEN_CLKEN_VALUE = "crcgen_clk_dis";
localparam HSSI_10G_TX_PCS_CRCGEN_CLKEN_ADDR_OFST = 134;
localparam HSSI_10G_TX_PCS_CRCGEN_CLKEN_ADDR_FIELD_OFST = 6;
localparam HSSI_10G_TX_PCS_CRCGEN_CLKEN_ADDR_FIELD_HIGH = 6;
localparam HSSI_10G_TX_PCS_CRCGEN_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_CRCGEN_CLKEN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_10G_TX_PCS_CRCGEN_CLKEN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_CRCGEN_CLKEN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_CRCGEN_ERR_VALUE = "crcgen_err_dis";
localparam HSSI_10G_TX_PCS_CRCGEN_ERR_ADDR_OFST = 137;
localparam HSSI_10G_TX_PCS_CRCGEN_ERR_ADDR_FIELD_OFST = 7;
localparam HSSI_10G_TX_PCS_CRCGEN_ERR_ADDR_FIELD_HIGH = 7;
localparam HSSI_10G_TX_PCS_CRCGEN_ERR_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_CRCGEN_ERR_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_10G_TX_PCS_CRCGEN_ERR_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_CRCGEN_ERR_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_CRCGEN_INV_VALUE = "crcgen_inv_en";
localparam HSSI_10G_TX_PCS_CRCGEN_INV_ADDR_OFST = 137;
localparam HSSI_10G_TX_PCS_CRCGEN_INV_ADDR_FIELD_OFST = 4;
localparam HSSI_10G_TX_PCS_CRCGEN_INV_ADDR_FIELD_HIGH = 4;
localparam HSSI_10G_TX_PCS_CRCGEN_INV_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_CRCGEN_INV_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_10G_TX_PCS_CRCGEN_INV_ADDR_FIELD_VALMASK = 32'h00000010;
localparam HSSI_10G_TX_PCS_CRCGEN_INV_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_CTRL_BIT_REVERSE_VALUE = "ctrl_bit_reverse_en";
localparam HSSI_10G_TX_PCS_CTRL_BIT_REVERSE_ADDR_OFST = 135;
localparam HSSI_10G_TX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_OFST = 2;
localparam HSSI_10G_TX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_HIGH = 2;
localparam HSSI_10G_TX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_10G_TX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_10G_TX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_DATA_BIT_REVERSE_VALUE = "data_bit_reverse_dis";
localparam HSSI_10G_TX_PCS_DATA_BIT_REVERSE_ADDR_OFST = 137;
localparam HSSI_10G_TX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_OFST = 1;
localparam HSSI_10G_TX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_HIGH = 1;
localparam HSSI_10G_TX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_10G_TX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_DFT_CLK_OUT_SEL_VALUE = "tx_master_clk";
localparam HSSI_10G_TX_PCS_DFT_CLK_OUT_SEL_ADDR_OFST = 140;
localparam HSSI_10G_TX_PCS_DFT_CLK_OUT_SEL_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_TX_PCS_DFT_CLK_OUT_SEL_ADDR_FIELD_HIGH = 3;
localparam HSSI_10G_TX_PCS_DFT_CLK_OUT_SEL_ADDR_FIELD_SIZE = 4;
localparam HSSI_10G_TX_PCS_DFT_CLK_OUT_SEL_ADDR_FIELD_BITMASK = 32'h0000000F;
localparam HSSI_10G_TX_PCS_DFT_CLK_OUT_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_DFT_CLK_OUT_SEL_ADDR_FIELD_VALUE = 4'h0;

localparam HSSI_10G_TX_PCS_DISPGEN_BYPASS_VALUE = "dispgen_bypass_en";
localparam HSSI_10G_TX_PCS_DISPGEN_BYPASS_ADDR_OFST = 136;
localparam HSSI_10G_TX_PCS_DISPGEN_BYPASS_ADDR_FIELD_OFST = 7;
localparam HSSI_10G_TX_PCS_DISPGEN_BYPASS_ADDR_FIELD_HIGH = 7;
localparam HSSI_10G_TX_PCS_DISPGEN_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_DISPGEN_BYPASS_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_10G_TX_PCS_DISPGEN_BYPASS_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_10G_TX_PCS_DISPGEN_BYPASS_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_DISPGEN_CLKEN_VALUE = "dispgen_clk_dis";
localparam HSSI_10G_TX_PCS_DISPGEN_CLKEN_ADDR_OFST = 134;
localparam HSSI_10G_TX_PCS_DISPGEN_CLKEN_ADDR_FIELD_OFST = 3;
localparam HSSI_10G_TX_PCS_DISPGEN_CLKEN_ADDR_FIELD_HIGH = 3;
localparam HSSI_10G_TX_PCS_DISPGEN_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_DISPGEN_CLKEN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_10G_TX_PCS_DISPGEN_CLKEN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_DISPGEN_CLKEN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_DISPGEN_ERR_VALUE = "dispgen_err_dis";
localparam HSSI_10G_TX_PCS_DISPGEN_ERR_ADDR_OFST = 137;
localparam HSSI_10G_TX_PCS_DISPGEN_ERR_ADDR_FIELD_OFST = 6;
localparam HSSI_10G_TX_PCS_DISPGEN_ERR_ADDR_FIELD_HIGH = 6;
localparam HSSI_10G_TX_PCS_DISPGEN_ERR_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_DISPGEN_ERR_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_10G_TX_PCS_DISPGEN_ERR_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_DISPGEN_ERR_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_DISPGEN_PIPELN_VALUE = "dispgen_pipeln_dis";
localparam HSSI_10G_TX_PCS_DISPGEN_PIPELN_ADDR_OFST = 132;
localparam HSSI_10G_TX_PCS_DISPGEN_PIPELN_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_TX_PCS_DISPGEN_PIPELN_ADDR_FIELD_HIGH = 0;
localparam HSSI_10G_TX_PCS_DISPGEN_PIPELN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_DISPGEN_PIPELN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_10G_TX_PCS_DISPGEN_PIPELN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_DISPGEN_PIPELN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_DISTDWN_BYPASS_PIPELN_VALUE = "distdwn_bypass_pipeln_dis";
localparam HSSI_10G_TX_PCS_DISTDWN_BYPASS_PIPELN_ADDR_OFST = 142;
localparam HSSI_10G_TX_PCS_DISTDWN_BYPASS_PIPELN_ADDR_FIELD_OFST = 2;
localparam HSSI_10G_TX_PCS_DISTDWN_BYPASS_PIPELN_ADDR_FIELD_HIGH = 2;
localparam HSSI_10G_TX_PCS_DISTDWN_BYPASS_PIPELN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_DISTDWN_BYPASS_PIPELN_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_10G_TX_PCS_DISTDWN_BYPASS_PIPELN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_DISTDWN_BYPASS_PIPELN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_DISTUP_BYPASS_PIPELN_VALUE = "distup_bypass_pipeln_dis";
localparam HSSI_10G_TX_PCS_DISTUP_BYPASS_PIPELN_ADDR_OFST = 142;
localparam HSSI_10G_TX_PCS_DISTUP_BYPASS_PIPELN_ADDR_FIELD_OFST = 3;
localparam HSSI_10G_TX_PCS_DISTUP_BYPASS_PIPELN_ADDR_FIELD_HIGH = 3;
localparam HSSI_10G_TX_PCS_DISTUP_BYPASS_PIPELN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_DISTUP_BYPASS_PIPELN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_10G_TX_PCS_DISTUP_BYPASS_PIPELN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_DISTUP_BYPASS_PIPELN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_DV_BOND_VALUE = "dv_bond_dis";
localparam HSSI_10G_TX_PCS_DV_BOND_ADDR_OFST = 133;
localparam HSSI_10G_TX_PCS_DV_BOND_ADDR_FIELD_OFST = 7;
localparam HSSI_10G_TX_PCS_DV_BOND_ADDR_FIELD_HIGH = 7;
localparam HSSI_10G_TX_PCS_DV_BOND_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_DV_BOND_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_10G_TX_PCS_DV_BOND_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_10G_TX_PCS_DV_BOND_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_EMPTY_FLAG_TYPE_VALUE = "empty_rd_side";
localparam HSSI_10G_TX_PCS_EMPTY_FLAG_TYPE_ADDR_OFST = 145;
localparam HSSI_10G_TX_PCS_EMPTY_FLAG_TYPE_ADDR_FIELD_OFST = 4;
localparam HSSI_10G_TX_PCS_EMPTY_FLAG_TYPE_ADDR_FIELD_HIGH = 4;
localparam HSSI_10G_TX_PCS_EMPTY_FLAG_TYPE_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_EMPTY_FLAG_TYPE_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_10G_TX_PCS_EMPTY_FLAG_TYPE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_EMPTY_FLAG_TYPE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_ENC64B66B_TXSM_CLKEN_VALUE = "enc64b66b_txsm_clk_en";
localparam HSSI_10G_TX_PCS_ENC64B66B_TXSM_CLKEN_ADDR_OFST = 134;
localparam HSSI_10G_TX_PCS_ENC64B66B_TXSM_CLKEN_ADDR_FIELD_OFST = 5;
localparam HSSI_10G_TX_PCS_ENC64B66B_TXSM_CLKEN_ADDR_FIELD_HIGH = 5;
localparam HSSI_10G_TX_PCS_ENC64B66B_TXSM_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_ENC64B66B_TXSM_CLKEN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_10G_TX_PCS_ENC64B66B_TXSM_CLKEN_ADDR_FIELD_VALMASK = 32'h00000020;
localparam HSSI_10G_TX_PCS_ENC64B66B_TXSM_CLKEN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_ENC_64B66B_TXSM_BYPASS_VALUE = "enc_64b66b_txsm_bypass_dis";
localparam HSSI_10G_TX_PCS_ENC_64B66B_TXSM_BYPASS_ADDR_OFST = 112;
localparam HSSI_10G_TX_PCS_ENC_64B66B_TXSM_BYPASS_ADDR_FIELD_OFST = 1;
localparam HSSI_10G_TX_PCS_ENC_64B66B_TXSM_BYPASS_ADDR_FIELD_HIGH = 1;
localparam HSSI_10G_TX_PCS_ENC_64B66B_TXSM_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_ENC_64B66B_TXSM_BYPASS_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_10G_TX_PCS_ENC_64B66B_TXSM_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_ENC_64B66B_TXSM_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_FASTPATH_VALUE = "fastpath_dis";
localparam HSSI_10G_TX_PCS_FASTPATH_ADDR_OFST = 141;
localparam HSSI_10G_TX_PCS_FASTPATH_ADDR_FIELD_OFST = 2;
localparam HSSI_10G_TX_PCS_FASTPATH_ADDR_FIELD_HIGH = 2;
localparam HSSI_10G_TX_PCS_FASTPATH_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_FASTPATH_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_10G_TX_PCS_FASTPATH_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_FASTPATH_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_FEC_CLKEN_VALUE = "fec_clk_dis";
localparam HSSI_10G_TX_PCS_FEC_CLKEN_ADDR_OFST = 134;
localparam HSSI_10G_TX_PCS_FEC_CLKEN_ADDR_FIELD_OFST = 1;
localparam HSSI_10G_TX_PCS_FEC_CLKEN_ADDR_FIELD_HIGH = 1;
localparam HSSI_10G_TX_PCS_FEC_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_FEC_CLKEN_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_10G_TX_PCS_FEC_CLKEN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_FEC_CLKEN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_FEC_ENABLE_VALUE = "fec_dis";
localparam HSSI_10G_TX_PCS_FEC_ENABLE_ADDR_OFST = 112;
localparam HSSI_10G_TX_PCS_FEC_ENABLE_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_TX_PCS_FEC_ENABLE_ADDR_FIELD_HIGH = 0;
localparam HSSI_10G_TX_PCS_FEC_ENABLE_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_FEC_ENABLE_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_10G_TX_PCS_FEC_ENABLE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_FEC_ENABLE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_FIFO_DOUBLE_WRITE_VALUE = "fifo_double_write_dis";
localparam HSSI_10G_TX_PCS_FIFO_DOUBLE_WRITE_ADDR_OFST = 141;
localparam HSSI_10G_TX_PCS_FIFO_DOUBLE_WRITE_ADDR_FIELD_OFST = 5;
localparam HSSI_10G_TX_PCS_FIFO_DOUBLE_WRITE_ADDR_FIELD_HIGH = 5;
localparam HSSI_10G_TX_PCS_FIFO_DOUBLE_WRITE_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_FIFO_DOUBLE_WRITE_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_10G_TX_PCS_FIFO_DOUBLE_WRITE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_FIFO_DOUBLE_WRITE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_FIFO_REG_FAST_VALUE = "fifo_reg_fast_dis";
localparam HSSI_10G_TX_PCS_FIFO_REG_FAST_ADDR_OFST = 130;
localparam HSSI_10G_TX_PCS_FIFO_REG_FAST_ADDR_FIELD_OFST = 4;
localparam HSSI_10G_TX_PCS_FIFO_REG_FAST_ADDR_FIELD_HIGH = 4;
localparam HSSI_10G_TX_PCS_FIFO_REG_FAST_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_FIFO_REG_FAST_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_10G_TX_PCS_FIFO_REG_FAST_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_FIFO_REG_FAST_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_FIFO_STOP_RD_VALUE = "n_rd_empty";
localparam HSSI_10G_TX_PCS_FIFO_STOP_RD_ADDR_OFST = 145;
localparam HSSI_10G_TX_PCS_FIFO_STOP_RD_ADDR_FIELD_OFST = 1;
localparam HSSI_10G_TX_PCS_FIFO_STOP_RD_ADDR_FIELD_HIGH = 1;
localparam HSSI_10G_TX_PCS_FIFO_STOP_RD_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_FIFO_STOP_RD_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_10G_TX_PCS_FIFO_STOP_RD_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_10G_TX_PCS_FIFO_STOP_RD_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_FIFO_STOP_WR_VALUE = "n_wr_full";
localparam HSSI_10G_TX_PCS_FIFO_STOP_WR_ADDR_OFST = 145;
localparam HSSI_10G_TX_PCS_FIFO_STOP_WR_ADDR_FIELD_OFST = 3;
localparam HSSI_10G_TX_PCS_FIFO_STOP_WR_ADDR_FIELD_HIGH = 3;
localparam HSSI_10G_TX_PCS_FIFO_STOP_WR_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_FIFO_STOP_WR_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_10G_TX_PCS_FIFO_STOP_WR_ADDR_FIELD_VALMASK = 32'h00000008;
localparam HSSI_10G_TX_PCS_FIFO_STOP_WR_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_FRMGEN_BURST_VALUE = "frmgen_burst_dis";
localparam HSSI_10G_TX_PCS_FRMGEN_BURST_ADDR_OFST = 132;
localparam HSSI_10G_TX_PCS_FRMGEN_BURST_ADDR_FIELD_OFST = 5;
localparam HSSI_10G_TX_PCS_FRMGEN_BURST_ADDR_FIELD_HIGH = 5;
localparam HSSI_10G_TX_PCS_FRMGEN_BURST_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_FRMGEN_BURST_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_10G_TX_PCS_FRMGEN_BURST_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_FRMGEN_BURST_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_FRMGEN_BYPASS_VALUE = "frmgen_bypass_en";
localparam HSSI_10G_TX_PCS_FRMGEN_BYPASS_ADDR_OFST = 136;
localparam HSSI_10G_TX_PCS_FRMGEN_BYPASS_ADDR_FIELD_OFST = 5;
localparam HSSI_10G_TX_PCS_FRMGEN_BYPASS_ADDR_FIELD_HIGH = 5;
localparam HSSI_10G_TX_PCS_FRMGEN_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_FRMGEN_BYPASS_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_10G_TX_PCS_FRMGEN_BYPASS_ADDR_FIELD_VALMASK = 32'h00000020;
localparam HSSI_10G_TX_PCS_FRMGEN_BYPASS_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_FRMGEN_CLKEN_VALUE = "frmgen_clk_dis";
localparam HSSI_10G_TX_PCS_FRMGEN_CLKEN_ADDR_OFST = 134;
localparam HSSI_10G_TX_PCS_FRMGEN_CLKEN_ADDR_FIELD_OFST = 7;
localparam HSSI_10G_TX_PCS_FRMGEN_CLKEN_ADDR_FIELD_HIGH = 7;
localparam HSSI_10G_TX_PCS_FRMGEN_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_FRMGEN_CLKEN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_10G_TX_PCS_FRMGEN_CLKEN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_FRMGEN_CLKEN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_FRMGEN_MFRM_LENGTH_VALUE = 16'd2048;
localparam HSSI_10G_TX_PCS_FRMGEN_MFRM_LENGTH_ADDR0_OFST = 138;
localparam HSSI_10G_TX_PCS_FRMGEN_MFRM_LENGTH_ADDR0_FIELD_OFST = 0;
localparam HSSI_10G_TX_PCS_FRMGEN_MFRM_LENGTH_ADDR0_FIELD_HIGH = 7;
localparam HSSI_10G_TX_PCS_FRMGEN_MFRM_LENGTH_ADDR0_FIELD_SIZE = 8;
localparam HSSI_10G_TX_PCS_FRMGEN_MFRM_LENGTH_ADDR0_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_10G_TX_PCS_FRMGEN_MFRM_LENGTH_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_FRMGEN_MFRM_LENGTH_ADDR0_FIELD_VALUE = 8'h0;
localparam HSSI_10G_TX_PCS_FRMGEN_MFRM_LENGTH_ADDR1_OFST = 139;
localparam HSSI_10G_TX_PCS_FRMGEN_MFRM_LENGTH_ADDR1_FIELD_OFST = 0;
localparam HSSI_10G_TX_PCS_FRMGEN_MFRM_LENGTH_ADDR1_FIELD_HIGH = 7;
localparam HSSI_10G_TX_PCS_FRMGEN_MFRM_LENGTH_ADDR1_FIELD_SIZE = 8;
localparam HSSI_10G_TX_PCS_FRMGEN_MFRM_LENGTH_ADDR1_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_10G_TX_PCS_FRMGEN_MFRM_LENGTH_ADDR1_FIELD_VALMASK = 32'h00000008;
localparam HSSI_10G_TX_PCS_FRMGEN_MFRM_LENGTH_ADDR1_FIELD_VALUE = 8'h8;

localparam HSSI_10G_TX_PCS_FRMGEN_PIPELN_VALUE = "frmgen_pipeln_en";
localparam HSSI_10G_TX_PCS_FRMGEN_PIPELN_ADDR_OFST = 133;
localparam HSSI_10G_TX_PCS_FRMGEN_PIPELN_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_TX_PCS_FRMGEN_PIPELN_ADDR_FIELD_HIGH = 0;
localparam HSSI_10G_TX_PCS_FRMGEN_PIPELN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_FRMGEN_PIPELN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_10G_TX_PCS_FRMGEN_PIPELN_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_10G_TX_PCS_FRMGEN_PIPELN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_FRMGEN_PYLD_INS_VALUE = "frmgen_pyld_ins_dis";
localparam HSSI_10G_TX_PCS_FRMGEN_PYLD_INS_ADDR_OFST = 137;
localparam HSSI_10G_TX_PCS_FRMGEN_PYLD_INS_ADDR_FIELD_OFST = 2;
localparam HSSI_10G_TX_PCS_FRMGEN_PYLD_INS_ADDR_FIELD_HIGH = 2;
localparam HSSI_10G_TX_PCS_FRMGEN_PYLD_INS_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_FRMGEN_PYLD_INS_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_10G_TX_PCS_FRMGEN_PYLD_INS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_FRMGEN_PYLD_INS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_FRMGEN_WORDSLIP_VALUE = "frmgen_wordslip_dis";
localparam HSSI_10G_TX_PCS_FRMGEN_WORDSLIP_ADDR_OFST = 132;
localparam HSSI_10G_TX_PCS_FRMGEN_WORDSLIP_ADDR_FIELD_OFST = 4;
localparam HSSI_10G_TX_PCS_FRMGEN_WORDSLIP_ADDR_FIELD_HIGH = 4;
localparam HSSI_10G_TX_PCS_FRMGEN_WORDSLIP_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_FRMGEN_WORDSLIP_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_10G_TX_PCS_FRMGEN_WORDSLIP_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_FRMGEN_WORDSLIP_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_FULL_FLAG_TYPE_VALUE = "full_wr_side";
localparam HSSI_10G_TX_PCS_FULL_FLAG_TYPE_ADDR_OFST = 145;
localparam HSSI_10G_TX_PCS_FULL_FLAG_TYPE_ADDR_FIELD_OFST = 7;
localparam HSSI_10G_TX_PCS_FULL_FLAG_TYPE_ADDR_FIELD_HIGH = 7;
localparam HSSI_10G_TX_PCS_FULL_FLAG_TYPE_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_FULL_FLAG_TYPE_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_10G_TX_PCS_FULL_FLAG_TYPE_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_10G_TX_PCS_FULL_FLAG_TYPE_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_GB_PIPELN_BYPASS_VALUE = "disable";
localparam HSSI_10G_TX_PCS_GB_PIPELN_BYPASS_ADDR_OFST = 132;
localparam HSSI_10G_TX_PCS_GB_PIPELN_BYPASS_ADDR_FIELD_OFST = 1;
localparam HSSI_10G_TX_PCS_GB_PIPELN_BYPASS_ADDR_FIELD_HIGH = 1;
localparam HSSI_10G_TX_PCS_GB_PIPELN_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_GB_PIPELN_BYPASS_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_10G_TX_PCS_GB_PIPELN_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_GB_PIPELN_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_GB_TX_IDWIDTH_VALUE = "idwidth_66";
localparam HSSI_10G_TX_PCS_GB_TX_IDWIDTH_ADDR_OFST = 136;
localparam HSSI_10G_TX_PCS_GB_TX_IDWIDTH_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_TX_PCS_GB_TX_IDWIDTH_ADDR_FIELD_HIGH = 2;
localparam HSSI_10G_TX_PCS_GB_TX_IDWIDTH_ADDR_FIELD_SIZE = 3;
localparam HSSI_10G_TX_PCS_GB_TX_IDWIDTH_ADDR_FIELD_BITMASK = 32'h00000007;
localparam HSSI_10G_TX_PCS_GB_TX_IDWIDTH_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_GB_TX_IDWIDTH_ADDR_FIELD_VALUE = 3'h0;

localparam HSSI_10G_TX_PCS_GB_TX_ODWIDTH_VALUE = "odwidth_32";
localparam HSSI_10G_TX_PCS_GB_TX_ODWIDTH_ADDR_OFST = 136;
localparam HSSI_10G_TX_PCS_GB_TX_ODWIDTH_ADDR_FIELD_OFST = 3;
localparam HSSI_10G_TX_PCS_GB_TX_ODWIDTH_ADDR_FIELD_HIGH = 4;
localparam HSSI_10G_TX_PCS_GB_TX_ODWIDTH_ADDR_FIELD_SIZE = 2;
localparam HSSI_10G_TX_PCS_GB_TX_ODWIDTH_ADDR_FIELD_BITMASK = 32'h00000018;
localparam HSSI_10G_TX_PCS_GB_TX_ODWIDTH_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_GB_TX_ODWIDTH_ADDR_FIELD_VALUE = 2'h0;

localparam HSSI_10G_TX_PCS_GBRED_CLKEN_VALUE = "gbred_clk_en";
localparam HSSI_10G_TX_PCS_GBRED_CLKEN_ADDR_OFST = 134;
localparam HSSI_10G_TX_PCS_GBRED_CLKEN_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_TX_PCS_GBRED_CLKEN_ADDR_FIELD_HIGH = 0;
localparam HSSI_10G_TX_PCS_GBRED_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_GBRED_CLKEN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_10G_TX_PCS_GBRED_CLKEN_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_10G_TX_PCS_GBRED_CLKEN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_INDV_VALUE = "indv_en";
localparam HSSI_10G_TX_PCS_INDV_ADDR_OFST = 133;
localparam HSSI_10G_TX_PCS_INDV_ADDR_FIELD_OFST = 6;
localparam HSSI_10G_TX_PCS_INDV_ADDR_FIELD_HIGH = 6;
localparam HSSI_10G_TX_PCS_INDV_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_INDV_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_10G_TX_PCS_INDV_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_10G_TX_PCS_INDV_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_LOW_LATENCY_EN_VALUE = "disable";

localparam HSSI_10G_TX_PCS_MASTER_CLK_SEL_VALUE = "master_tx_pma_clk";
localparam HSSI_10G_TX_PCS_MASTER_CLK_SEL_ADDR_OFST = 133;
localparam HSSI_10G_TX_PCS_MASTER_CLK_SEL_ADDR_FIELD_OFST = 1;
localparam HSSI_10G_TX_PCS_MASTER_CLK_SEL_ADDR_FIELD_HIGH = 1;
localparam HSSI_10G_TX_PCS_MASTER_CLK_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_MASTER_CLK_SEL_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_10G_TX_PCS_MASTER_CLK_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_MASTER_CLK_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_PEMPTY_FLAG_TYPE_VALUE = "pempty_rd_side";
localparam HSSI_10G_TX_PCS_PEMPTY_FLAG_TYPE_ADDR_OFST = 145;
localparam HSSI_10G_TX_PCS_PEMPTY_FLAG_TYPE_ADDR_FIELD_OFST = 5;
localparam HSSI_10G_TX_PCS_PEMPTY_FLAG_TYPE_ADDR_FIELD_HIGH = 5;
localparam HSSI_10G_TX_PCS_PEMPTY_FLAG_TYPE_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_PEMPTY_FLAG_TYPE_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_10G_TX_PCS_PEMPTY_FLAG_TYPE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_PEMPTY_FLAG_TYPE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_PFULL_FLAG_TYPE_VALUE = "pfull_wr_side";
localparam HSSI_10G_TX_PCS_PFULL_FLAG_TYPE_ADDR_OFST = 145;
localparam HSSI_10G_TX_PCS_PFULL_FLAG_TYPE_ADDR_FIELD_OFST = 6;
localparam HSSI_10G_TX_PCS_PFULL_FLAG_TYPE_ADDR_FIELD_HIGH = 6;
localparam HSSI_10G_TX_PCS_PFULL_FLAG_TYPE_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_PFULL_FLAG_TYPE_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_10G_TX_PCS_PFULL_FLAG_TYPE_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_10G_TX_PCS_PFULL_FLAG_TYPE_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_PHCOMP_RD_DEL_VALUE = "phcomp_rd_del2";
localparam HSSI_10G_TX_PCS_PHCOMP_RD_DEL_ADDR_OFST = 135;
localparam HSSI_10G_TX_PCS_PHCOMP_RD_DEL_ADDR_FIELD_OFST = 5;
localparam HSSI_10G_TX_PCS_PHCOMP_RD_DEL_ADDR_FIELD_HIGH = 7;
localparam HSSI_10G_TX_PCS_PHCOMP_RD_DEL_ADDR_FIELD_SIZE = 3;
localparam HSSI_10G_TX_PCS_PHCOMP_RD_DEL_ADDR_FIELD_BITMASK = 32'h000000E0;
localparam HSSI_10G_TX_PCS_PHCOMP_RD_DEL_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_10G_TX_PCS_PHCOMP_RD_DEL_ADDR_FIELD_VALUE = 3'h2;

localparam HSSI_10G_TX_PCS_PLD_IF_TYPE_VALUE = "reg";

localparam HSSI_10G_TX_PCS_PROT_MODE_VALUE = "teng_1588_mode";

localparam HSSI_10G_TX_PCS_PSEUDO_RANDOM_VALUE = "all_0";
localparam HSSI_10G_TX_PCS_PSEUDO_RANDOM_ADDR_OFST = 130;
localparam HSSI_10G_TX_PCS_PSEUDO_RANDOM_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_TX_PCS_PSEUDO_RANDOM_ADDR_FIELD_HIGH = 0;
localparam HSSI_10G_TX_PCS_PSEUDO_RANDOM_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_PSEUDO_RANDOM_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_10G_TX_PCS_PSEUDO_RANDOM_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_10G_TX_PCS_PSEUDO_RANDOM_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_VALUE = "288230376151711743";
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR0_OFST = 122;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR0_FIELD_OFST = 0;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR0_FIELD_HIGH = 7;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR0_FIELD_SIZE = 8;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR0_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR0_FIELD_VALMASK = 32'h000000FF;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR0_FIELD_VALUE = 8'hFF;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR1_OFST = 123;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR1_FIELD_OFST = 0;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR1_FIELD_HIGH = 7;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR1_FIELD_SIZE = 8;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR1_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR1_FIELD_VALMASK = 32'h000000FF;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR1_FIELD_VALUE = 8'hFF;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR2_OFST = 124;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR2_FIELD_OFST = 0;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR2_FIELD_HIGH = 7;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR2_FIELD_SIZE = 8;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR2_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR2_FIELD_VALMASK = 32'h000000FF;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR2_FIELD_VALUE = 8'hFF;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR3_OFST = 125;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR3_FIELD_OFST = 0;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR3_FIELD_HIGH = 7;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR3_FIELD_SIZE = 8;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR3_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR3_FIELD_VALMASK = 32'h000000FF;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR3_FIELD_VALUE = 8'hFF;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR4_OFST = 126;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR4_FIELD_OFST = 0;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR4_FIELD_HIGH = 7;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR4_FIELD_SIZE = 8;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR4_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR4_FIELD_VALMASK = 32'h000000FF;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR4_FIELD_VALUE = 8'hFF;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR5_OFST = 127;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR5_FIELD_OFST = 0;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR5_FIELD_HIGH = 7;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR5_FIELD_SIZE = 8;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR5_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR5_FIELD_VALMASK = 32'h000000FF;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR5_FIELD_VALUE = 8'hFF;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR6_OFST = 128;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR6_FIELD_OFST = 0;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR6_FIELD_HIGH = 7;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR6_FIELD_SIZE = 8;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR6_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR6_FIELD_VALMASK = 32'h000000FF;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR6_FIELD_VALUE = 8'hFF;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR7_OFST = 129;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR7_FIELD_OFST = 0;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR7_FIELD_HIGH = 1;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR7_FIELD_SIZE = 2;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR7_FIELD_BITMASK = 32'h00000003;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR7_FIELD_VALMASK = 32'h00000003;
localparam HSSI_10G_TX_PCS_PSEUDO_SEED_B_ADDR7_FIELD_VALUE = 2'h3;

localparam HSSI_10G_TX_PCS_RANDOM_DISP_VALUE = "disable";
localparam HSSI_10G_TX_PCS_RANDOM_DISP_ADDR_OFST = 130;
localparam HSSI_10G_TX_PCS_RANDOM_DISP_ADDR_FIELD_OFST = 5;
localparam HSSI_10G_TX_PCS_RANDOM_DISP_ADDR_FIELD_HIGH = 5;
localparam HSSI_10G_TX_PCS_RANDOM_DISP_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_RANDOM_DISP_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_10G_TX_PCS_RANDOM_DISP_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_RANDOM_DISP_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_RDFIFO_CLKEN_VALUE = "rdfifo_clk_en";
localparam HSSI_10G_TX_PCS_RDFIFO_CLKEN_ADDR_OFST = 135;
localparam HSSI_10G_TX_PCS_RDFIFO_CLKEN_ADDR_FIELD_OFST = 0;
localparam HSSI_10G_TX_PCS_RDFIFO_CLKEN_ADDR_FIELD_HIGH = 0;
localparam HSSI_10G_TX_PCS_RDFIFO_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_RDFIFO_CLKEN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_10G_TX_PCS_RDFIFO_CLKEN_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_10G_TX_PCS_RDFIFO_CLKEN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_SCRM_BYPASS_VALUE = "scrm_bypass_dis";
localparam HSSI_10G_TX_PCS_SCRM_BYPASS_ADDR_OFST = 112;
localparam HSSI_10G_TX_PCS_SCRM_BYPASS_ADDR_FIELD_OFST = 3;
localparam HSSI_10G_TX_PCS_SCRM_BYPASS_ADDR_FIELD_HIGH = 3;
localparam HSSI_10G_TX_PCS_SCRM_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_SCRM_BYPASS_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_10G_TX_PCS_SCRM_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_SCRM_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_SCRM_CLKEN_VALUE = "scrm_clk_en";
localparam HSSI_10G_TX_PCS_SCRM_CLKEN_ADDR_OFST = 134;
localparam HSSI_10G_TX_PCS_SCRM_CLKEN_ADDR_FIELD_OFST = 4;
localparam HSSI_10G_TX_PCS_SCRM_CLKEN_ADDR_FIELD_HIGH = 4;
localparam HSSI_10G_TX_PCS_SCRM_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_SCRM_CLKEN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_10G_TX_PCS_SCRM_CLKEN_ADDR_FIELD_VALMASK = 32'h00000010;
localparam HSSI_10G_TX_PCS_SCRM_CLKEN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_SCRM_MODE_VALUE = "async";
localparam HSSI_10G_TX_PCS_SCRM_MODE_ADDR_OFST = 137;
localparam HSSI_10G_TX_PCS_SCRM_MODE_ADDR_FIELD_OFST = 3;
localparam HSSI_10G_TX_PCS_SCRM_MODE_ADDR_FIELD_HIGH = 3;
localparam HSSI_10G_TX_PCS_SCRM_MODE_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_SCRM_MODE_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_10G_TX_PCS_SCRM_MODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_SCRM_MODE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_SCRM_PIPELN_VALUE = "enable";
localparam HSSI_10G_TX_PCS_SCRM_PIPELN_ADDR_OFST = 132;
localparam HSSI_10G_TX_PCS_SCRM_PIPELN_ADDR_FIELD_OFST = 7;
localparam HSSI_10G_TX_PCS_SCRM_PIPELN_ADDR_FIELD_HIGH = 7;
localparam HSSI_10G_TX_PCS_SCRM_PIPELN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_SCRM_PIPELN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_10G_TX_PCS_SCRM_PIPELN_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_10G_TX_PCS_SCRM_PIPELN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_SH_ERR_VALUE = "sh_err_en";
localparam HSSI_10G_TX_PCS_SH_ERR_ADDR_OFST = 137;
localparam HSSI_10G_TX_PCS_SH_ERR_ADDR_FIELD_OFST = 5;
localparam HSSI_10G_TX_PCS_SH_ERR_ADDR_FIELD_HIGH = 5;
localparam HSSI_10G_TX_PCS_SH_ERR_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_SH_ERR_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_10G_TX_PCS_SH_ERR_ADDR_FIELD_VALMASK = 32'h00000020;
localparam HSSI_10G_TX_PCS_SH_ERR_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_SOP_MARK_VALUE = "sop_mark_dis";
localparam HSSI_10G_TX_PCS_SOP_MARK_ADDR_OFST = 130;
localparam HSSI_10G_TX_PCS_SOP_MARK_ADDR_FIELD_OFST = 6;
localparam HSSI_10G_TX_PCS_SOP_MARK_ADDR_FIELD_HIGH = 6;
localparam HSSI_10G_TX_PCS_SOP_MARK_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_SOP_MARK_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_10G_TX_PCS_SOP_MARK_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_SOP_MARK_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_STRETCH_NUM_STAGES_VALUE = "one_stage";
localparam HSSI_10G_TX_PCS_STRETCH_NUM_STAGES_ADDR_OFST = 141;
localparam HSSI_10G_TX_PCS_STRETCH_NUM_STAGES_ADDR_FIELD_OFST = 6;
localparam HSSI_10G_TX_PCS_STRETCH_NUM_STAGES_ADDR_FIELD_HIGH = 7;
localparam HSSI_10G_TX_PCS_STRETCH_NUM_STAGES_ADDR_FIELD_SIZE = 2;
localparam HSSI_10G_TX_PCS_STRETCH_NUM_STAGES_ADDR_FIELD_BITMASK = 32'h000000C0;
localparam HSSI_10G_TX_PCS_STRETCH_NUM_STAGES_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_10G_TX_PCS_STRETCH_NUM_STAGES_ADDR_FIELD_VALUE = 2'h1;

localparam HSSI_10G_TX_PCS_SUP_MODE_VALUE = "user_mode";

localparam HSSI_10G_TX_PCS_TEST_MODE_VALUE = "test_off";
localparam HSSI_10G_TX_PCS_TEST_MODE_ADDR_OFST = 130;
localparam HSSI_10G_TX_PCS_TEST_MODE_ADDR_FIELD0_OFST = 1;
localparam HSSI_10G_TX_PCS_TEST_MODE_ADDR_FIELD0_HIGH = 1;
localparam HSSI_10G_TX_PCS_TEST_MODE_ADDR_FIELD0_SIZE = 1;
localparam HSSI_10G_TX_PCS_TEST_MODE_ADDR_FIELD0_BITMASK = 32'h00000002;
localparam HSSI_10G_TX_PCS_TEST_MODE_ADDR_FIELD0_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_TEST_MODE_ADDR_FIELD0_VALUE = 1'h0;
localparam HSSI_10G_TX_PCS_TEST_MODE_ADDR_FIELD1_OFST = 3;
localparam HSSI_10G_TX_PCS_TEST_MODE_ADDR_FIELD1_HIGH = 3;
localparam HSSI_10G_TX_PCS_TEST_MODE_ADDR_FIELD1_SIZE = 1;
localparam HSSI_10G_TX_PCS_TEST_MODE_ADDR_FIELD1_BITMASK = 32'h00000008;
localparam HSSI_10G_TX_PCS_TEST_MODE_ADDR_FIELD1_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_TEST_MODE_ADDR_FIELD1_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_TX_SCRM_ERR_VALUE = "scrm_err_dis";
localparam HSSI_10G_TX_PCS_TX_SCRM_ERR_ADDR_OFST = 144;
localparam HSSI_10G_TX_PCS_TX_SCRM_ERR_ADDR_FIELD_OFST = 2;
localparam HSSI_10G_TX_PCS_TX_SCRM_ERR_ADDR_FIELD_HIGH = 2;
localparam HSSI_10G_TX_PCS_TX_SCRM_ERR_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_TX_SCRM_ERR_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_10G_TX_PCS_TX_SCRM_ERR_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_TX_SCRM_ERR_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_TX_SCRM_WIDTH_VALUE = "bit64";
localparam HSSI_10G_TX_PCS_TX_SCRM_WIDTH_ADDR_OFST = 144;
localparam HSSI_10G_TX_PCS_TX_SCRM_WIDTH_ADDR_FIELD_OFST = 3;
localparam HSSI_10G_TX_PCS_TX_SCRM_WIDTH_ADDR_FIELD_HIGH = 4;
localparam HSSI_10G_TX_PCS_TX_SCRM_WIDTH_ADDR_FIELD_SIZE = 2;
localparam HSSI_10G_TX_PCS_TX_SCRM_WIDTH_ADDR_FIELD_BITMASK = 32'h00000018;
localparam HSSI_10G_TX_PCS_TX_SCRM_WIDTH_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_TX_SCRM_WIDTH_ADDR_FIELD_VALUE = 2'h0;

localparam HSSI_10G_TX_PCS_TX_SH_LOCATION_VALUE = "lsb";
localparam HSSI_10G_TX_PCS_TX_SH_LOCATION_ADDR_OFST = 144;
localparam HSSI_10G_TX_PCS_TX_SH_LOCATION_ADDR_FIELD_OFST = 1;
localparam HSSI_10G_TX_PCS_TX_SH_LOCATION_ADDR_FIELD_HIGH = 1;
localparam HSSI_10G_TX_PCS_TX_SH_LOCATION_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_TX_SH_LOCATION_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_10G_TX_PCS_TX_SH_LOCATION_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_TX_SH_LOCATION_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_TX_SM_BYPASS_VALUE = "tx_sm_bypass_dis";
localparam HSSI_10G_TX_PCS_TX_SM_BYPASS_ADDR_OFST = 112;
localparam HSSI_10G_TX_PCS_TX_SM_BYPASS_ADDR_FIELD_OFST = 2;
localparam HSSI_10G_TX_PCS_TX_SM_BYPASS_ADDR_FIELD_HIGH = 2;
localparam HSSI_10G_TX_PCS_TX_SM_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_TX_SM_BYPASS_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_10G_TX_PCS_TX_SM_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_TX_SM_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_10G_TX_PCS_TX_SM_PIPELN_VALUE = "tx_sm_pipeln_en";
localparam HSSI_10G_TX_PCS_TX_SM_PIPELN_ADDR_OFST = 132;
localparam HSSI_10G_TX_PCS_TX_SM_PIPELN_ADDR_FIELD_OFST = 2;
localparam HSSI_10G_TX_PCS_TX_SM_PIPELN_ADDR_FIELD_HIGH = 2;
localparam HSSI_10G_TX_PCS_TX_SM_PIPELN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_TX_SM_PIPELN_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_10G_TX_PCS_TX_SM_PIPELN_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_10G_TX_PCS_TX_SM_PIPELN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_TX_TESTBUS_SEL_VALUE = "tx_fifo_testbus1";
localparam HSSI_10G_TX_PCS_TX_TESTBUS_SEL_ADDR0_OFST = 144;
localparam HSSI_10G_TX_PCS_TX_TESTBUS_SEL_ADDR0_FIELD_OFST = 5;
localparam HSSI_10G_TX_PCS_TX_TESTBUS_SEL_ADDR0_FIELD_HIGH = 7;
localparam HSSI_10G_TX_PCS_TX_TESTBUS_SEL_ADDR0_FIELD_SIZE = 3;
localparam HSSI_10G_TX_PCS_TX_TESTBUS_SEL_ADDR0_FIELD_BITMASK = 32'h000000E0;
localparam HSSI_10G_TX_PCS_TX_TESTBUS_SEL_ADDR0_FIELD_VALMASK = 32'h000000C0;
localparam HSSI_10G_TX_PCS_TX_TESTBUS_SEL_ADDR0_FIELD_VALUE = 3'h6;
localparam HSSI_10G_TX_PCS_TX_TESTBUS_SEL_ADDR1_OFST = 145;
localparam HSSI_10G_TX_PCS_TX_TESTBUS_SEL_ADDR1_FIELD_OFST = 0;
localparam HSSI_10G_TX_PCS_TX_TESTBUS_SEL_ADDR1_FIELD_HIGH = 0;
localparam HSSI_10G_TX_PCS_TX_TESTBUS_SEL_ADDR1_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_TX_TESTBUS_SEL_ADDR1_FIELD_BITMASK = 32'h00000001;
localparam HSSI_10G_TX_PCS_TX_TESTBUS_SEL_ADDR1_FIELD_VALMASK = 32'h00000001;
localparam HSSI_10G_TX_PCS_TX_TESTBUS_SEL_ADDR1_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_TXFIFO_EMPTY_VALUE = "empty_default";
localparam HSSI_10G_TX_PCS_TXFIFO_EMPTY_ADDR_OFST = 121;
localparam HSSI_10G_TX_PCS_TXFIFO_EMPTY_ADDR_FIELD_OFST = 2;
localparam HSSI_10G_TX_PCS_TXFIFO_EMPTY_ADDR_FIELD_HIGH = 5;
localparam HSSI_10G_TX_PCS_TXFIFO_EMPTY_ADDR_FIELD_SIZE = 4;
localparam HSSI_10G_TX_PCS_TXFIFO_EMPTY_ADDR_FIELD_BITMASK = 32'h0000003C;
localparam HSSI_10G_TX_PCS_TXFIFO_EMPTY_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_TXFIFO_EMPTY_ADDR_FIELD_VALUE = 4'h0;

localparam HSSI_10G_TX_PCS_TXFIFO_FULL_VALUE = "full_default";
localparam HSSI_10G_TX_PCS_TXFIFO_FULL_ADDR_OFST = 129;
localparam HSSI_10G_TX_PCS_TXFIFO_FULL_ADDR_FIELD_OFST = 2;
localparam HSSI_10G_TX_PCS_TXFIFO_FULL_ADDR_FIELD_HIGH = 5;
localparam HSSI_10G_TX_PCS_TXFIFO_FULL_ADDR_FIELD_SIZE = 4;
localparam HSSI_10G_TX_PCS_TXFIFO_FULL_ADDR_FIELD_BITMASK = 32'h0000003C;
localparam HSSI_10G_TX_PCS_TXFIFO_FULL_ADDR_FIELD_VALMASK = 32'h0000003C;
localparam HSSI_10G_TX_PCS_TXFIFO_FULL_ADDR_FIELD_VALUE = 4'hF;

localparam HSSI_10G_TX_PCS_TXFIFO_MODE_VALUE = "register_mode";
localparam HSSI_10G_TX_PCS_TXFIFO_MODE_ADDR_OFST = 133;
localparam HSSI_10G_TX_PCS_TXFIFO_MODE_ADDR_FIELD_OFST = 3;
localparam HSSI_10G_TX_PCS_TXFIFO_MODE_ADDR_FIELD_HIGH = 5;
localparam HSSI_10G_TX_PCS_TXFIFO_MODE_ADDR_FIELD_SIZE = 3;
localparam HSSI_10G_TX_PCS_TXFIFO_MODE_ADDR_FIELD_BITMASK = 32'h00000038;
localparam HSSI_10G_TX_PCS_TXFIFO_MODE_ADDR_FIELD_VALMASK = 32'h00000018;
localparam HSSI_10G_TX_PCS_TXFIFO_MODE_ADDR_FIELD_VALUE = 3'h3;

localparam HSSI_10G_TX_PCS_TXFIFO_PEMPTY_VALUE = 4'd2;
localparam HSSI_10G_TX_PCS_TXFIFO_PEMPTY_ADDR_OFST = 113;
localparam HSSI_10G_TX_PCS_TXFIFO_PEMPTY_ADDR_FIELD_OFST = 3;
localparam HSSI_10G_TX_PCS_TXFIFO_PEMPTY_ADDR_FIELD_HIGH = 6;
localparam HSSI_10G_TX_PCS_TXFIFO_PEMPTY_ADDR_FIELD_SIZE = 4;
localparam HSSI_10G_TX_PCS_TXFIFO_PEMPTY_ADDR_FIELD_BITMASK = 32'h00000078;
localparam HSSI_10G_TX_PCS_TXFIFO_PEMPTY_ADDR_FIELD_VALMASK = 32'h00000010;
localparam HSSI_10G_TX_PCS_TXFIFO_PEMPTY_ADDR_FIELD_VALUE = 4'h2;

localparam HSSI_10G_TX_PCS_TXFIFO_PFULL_VALUE = 4'd11;
localparam HSSI_10G_TX_PCS_TXFIFO_PFULL_ADDR0_OFST = 112;
localparam HSSI_10G_TX_PCS_TXFIFO_PFULL_ADDR0_FIELD_OFST = 6;
localparam HSSI_10G_TX_PCS_TXFIFO_PFULL_ADDR0_FIELD_HIGH = 7;
localparam HSSI_10G_TX_PCS_TXFIFO_PFULL_ADDR0_FIELD_SIZE = 2;
localparam HSSI_10G_TX_PCS_TXFIFO_PFULL_ADDR0_FIELD_BITMASK = 32'h000000C0;
localparam HSSI_10G_TX_PCS_TXFIFO_PFULL_ADDR0_FIELD_VALMASK = 32'h000000C0;
localparam HSSI_10G_TX_PCS_TXFIFO_PFULL_ADDR0_FIELD_VALUE = 2'h3;
localparam HSSI_10G_TX_PCS_TXFIFO_PFULL_ADDR1_OFST = 113;
localparam HSSI_10G_TX_PCS_TXFIFO_PFULL_ADDR1_FIELD_OFST = 0;
localparam HSSI_10G_TX_PCS_TXFIFO_PFULL_ADDR1_FIELD_HIGH = 1;
localparam HSSI_10G_TX_PCS_TXFIFO_PFULL_ADDR1_FIELD_SIZE = 2;
localparam HSSI_10G_TX_PCS_TXFIFO_PFULL_ADDR1_FIELD_BITMASK = 32'h00000003;
localparam HSSI_10G_TX_PCS_TXFIFO_PFULL_ADDR1_FIELD_VALMASK = 32'h00000002;
localparam HSSI_10G_TX_PCS_TXFIFO_PFULL_ADDR1_FIELD_VALUE = 2'h2;

localparam HSSI_10G_TX_PCS_WR_CLK_SEL_VALUE = "wr_tx_pma_clk";
localparam HSSI_10G_TX_PCS_WR_CLK_SEL_ADDR_OFST = 112;
localparam HSSI_10G_TX_PCS_WR_CLK_SEL_ADDR_FIELD_OFST = 4;
localparam HSSI_10G_TX_PCS_WR_CLK_SEL_ADDR_FIELD_HIGH = 5;
localparam HSSI_10G_TX_PCS_WR_CLK_SEL_ADDR_FIELD_SIZE = 2;
localparam HSSI_10G_TX_PCS_WR_CLK_SEL_ADDR_FIELD_BITMASK = 32'h00000030;
localparam HSSI_10G_TX_PCS_WR_CLK_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_10G_TX_PCS_WR_CLK_SEL_ADDR_FIELD_VALUE = 2'h0;

localparam HSSI_10G_TX_PCS_WRFIFO_CLKEN_VALUE = "wrfifo_clk_en";
localparam HSSI_10G_TX_PCS_WRFIFO_CLKEN_ADDR_OFST = 135;
localparam HSSI_10G_TX_PCS_WRFIFO_CLKEN_ADDR_FIELD_OFST = 1;
localparam HSSI_10G_TX_PCS_WRFIFO_CLKEN_ADDR_FIELD_HIGH = 1;
localparam HSSI_10G_TX_PCS_WRFIFO_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_10G_TX_PCS_WRFIFO_CLKEN_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_10G_TX_PCS_WRFIFO_CLKEN_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_10G_TX_PCS_WRFIFO_CLKEN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_10G_TX_PCS_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam HSSI_ADAPT_RX_ADAPTER_LPBK_MODE_VALUE = "disable";
localparam HSSI_ADAPT_RX_ADAPTER_LPBK_MODE_ADDR_OFST = 536;
localparam HSSI_ADAPT_RX_ADAPTER_LPBK_MODE_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_RX_ADAPTER_LPBK_MODE_ADDR_FIELD_HIGH = 0;
localparam HSSI_ADAPT_RX_ADAPTER_LPBK_MODE_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_ADAPTER_LPBK_MODE_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_ADAPT_RX_ADAPTER_LPBK_MODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_ADAPTER_LPBK_MODE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_HD_HSSIADAPT_AIB_HSSI_PLD_SCLK_HZ_VALUE = 31'd0;

localparam HSSI_ADAPT_RX_AIB_LPBK_MODE_VALUE = "disable";
localparam HSSI_ADAPT_RX_AIB_LPBK_MODE_ADDR_OFST = 533;
localparam HSSI_ADAPT_RX_AIB_LPBK_MODE_ADDR_FIELD_OFST = 7;
localparam HSSI_ADAPT_RX_AIB_LPBK_MODE_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_AIB_LPBK_MODE_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_AIB_LPBK_MODE_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_ADAPT_RX_AIB_LPBK_MODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_AIB_LPBK_MODE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_ALIGN_DEL_VALUE = "align_del_dis";
localparam HSSI_ADAPT_RX_ALIGN_DEL_ADDR_OFST = 533;
localparam HSSI_ADAPT_RX_ALIGN_DEL_ADDR_FIELD_OFST = 5;
localparam HSSI_ADAPT_RX_ALIGN_DEL_ADDR_FIELD_HIGH = 5;
localparam HSSI_ADAPT_RX_ALIGN_DEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_ALIGN_DEL_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_ADAPT_RX_ALIGN_DEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_ALIGN_DEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_ASN_BYPASS_CLOCK_GATE_VALUE = "disable";
localparam HSSI_ADAPT_RX_ASN_BYPASS_CLOCK_GATE_ADDR_OFST = 537;
localparam HSSI_ADAPT_RX_ASN_BYPASS_CLOCK_GATE_ADDR_FIELD_OFST = 1;
localparam HSSI_ADAPT_RX_ASN_BYPASS_CLOCK_GATE_ADDR_FIELD_HIGH = 1;
localparam HSSI_ADAPT_RX_ASN_BYPASS_CLOCK_GATE_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_ASN_BYPASS_CLOCK_GATE_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_ADAPT_RX_ASN_BYPASS_CLOCK_GATE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_ASN_BYPASS_CLOCK_GATE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_ASN_BYPASS_PMA_PCIE_SW_DONE_VALUE = "disable";
localparam HSSI_ADAPT_RX_ASN_BYPASS_PMA_PCIE_SW_DONE_ADDR_OFST = 537;
localparam HSSI_ADAPT_RX_ASN_BYPASS_PMA_PCIE_SW_DONE_ADDR_FIELD_OFST = 2;
localparam HSSI_ADAPT_RX_ASN_BYPASS_PMA_PCIE_SW_DONE_ADDR_FIELD_HIGH = 2;
localparam HSSI_ADAPT_RX_ASN_BYPASS_PMA_PCIE_SW_DONE_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_ASN_BYPASS_PMA_PCIE_SW_DONE_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_ADAPT_RX_ASN_BYPASS_PMA_PCIE_SW_DONE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_ASN_BYPASS_PMA_PCIE_SW_DONE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_CLOCK_GATE_CNT_VALUE = 7'd32;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_CLOCK_GATE_CNT_ADDR_OFST = 540;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_CLOCK_GATE_CNT_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_CLOCK_GATE_CNT_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_CLOCK_GATE_CNT_ADDR_FIELD_SIZE = 7;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_CLOCK_GATE_CNT_ADDR_FIELD_BITMASK = 32'h0000007F;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_CLOCK_GATE_CNT_ADDR_FIELD_VALMASK = 32'h00000020;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_CLOCK_GATE_CNT_ADDR_FIELD_VALUE = 7'h20;

localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_DLL_RESET_CNT_VALUE = 7'd32;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_DLL_RESET_CNT_ADDR_OFST = 539;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_DLL_RESET_CNT_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_DLL_RESET_CNT_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_DLL_RESET_CNT_ADDR_FIELD_SIZE = 7;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_DLL_RESET_CNT_ADDR_FIELD_BITMASK = 32'h0000007F;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_DLL_RESET_CNT_ADDR_FIELD_VALMASK = 32'h00000020;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_DLL_RESET_CNT_ADDR_FIELD_VALUE = 7'h20;

localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_FIFO_FLUSH_CNT_VALUE = 7'd32;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_FIFO_FLUSH_CNT_ADDR_OFST = 538;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_FIFO_FLUSH_CNT_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_FIFO_FLUSH_CNT_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_FIFO_FLUSH_CNT_ADDR_FIELD_SIZE = 7;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_FIFO_FLUSH_CNT_ADDR_FIELD_BITMASK = 32'h0000007F;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_FIFO_FLUSH_CNT_ADDR_FIELD_VALMASK = 32'h00000020;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_FIFO_FLUSH_CNT_ADDR_FIELD_VALUE = 7'h20;

localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_PMA_PCIE_SW_DONE_CNT_VALUE = 7'd32;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_PMA_PCIE_SW_DONE_CNT_ADDR_OFST = 541;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_PMA_PCIE_SW_DONE_CNT_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_PMA_PCIE_SW_DONE_CNT_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_PMA_PCIE_SW_DONE_CNT_ADDR_FIELD_SIZE = 7;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_PMA_PCIE_SW_DONE_CNT_ADDR_FIELD_BITMASK = 32'h0000007F;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_PMA_PCIE_SW_DONE_CNT_ADDR_FIELD_VALMASK = 32'h00000020;
localparam HSSI_ADAPT_RX_ASN_WAIT_FOR_PMA_PCIE_SW_DONE_CNT_ADDR_FIELD_VALUE = 7'h20;

localparam HSSI_ADAPT_RX_ASYNC_DIRECT_HIP_EN_VALUE = "disable";
localparam HSSI_ADAPT_RX_ASYNC_DIRECT_HIP_EN_ADDR_OFST = 544;
localparam HSSI_ADAPT_RX_ASYNC_DIRECT_HIP_EN_ADDR_FIELD_OFST = 5;
localparam HSSI_ADAPT_RX_ASYNC_DIRECT_HIP_EN_ADDR_FIELD_HIGH = 5;
localparam HSSI_ADAPT_RX_ASYNC_DIRECT_HIP_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_ASYNC_DIRECT_HIP_EN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_ADAPT_RX_ASYNC_DIRECT_HIP_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_ASYNC_DIRECT_HIP_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_BONDING_DFT_EN_VALUE = "dft_dis";
localparam HSSI_ADAPT_RX_BONDING_DFT_EN_ADDR_OFST = 535;
localparam HSSI_ADAPT_RX_BONDING_DFT_EN_ADDR_FIELD_OFST = 6;
localparam HSSI_ADAPT_RX_BONDING_DFT_EN_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_RX_BONDING_DFT_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_BONDING_DFT_EN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_ADAPT_RX_BONDING_DFT_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_BONDING_DFT_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_BONDING_DFT_VAL_VALUE = "dft_0";
localparam HSSI_ADAPT_RX_BONDING_DFT_VAL_ADDR_OFST = 535;
localparam HSSI_ADAPT_RX_BONDING_DFT_VAL_ADDR_FIELD_OFST = 7;
localparam HSSI_ADAPT_RX_BONDING_DFT_VAL_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_BONDING_DFT_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_BONDING_DFT_VAL_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_ADAPT_RX_BONDING_DFT_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_BONDING_DFT_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_CHNL_BONDING_VALUE = "disable";

localparam HSSI_ADAPT_RX_CLOCK_DEL_MEASURE_ENABLE_VALUE = "disable";

localparam HSSI_ADAPT_RX_CONTROL_DEL_VALUE = "control_del_none";
localparam HSSI_ADAPT_RX_CONTROL_DEL_ADDR_OFST = 533;
localparam HSSI_ADAPT_RX_CONTROL_DEL_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_RX_CONTROL_DEL_ADDR_FIELD_HIGH = 3;
localparam HSSI_ADAPT_RX_CONTROL_DEL_ADDR_FIELD_SIZE = 4;
localparam HSSI_ADAPT_RX_CONTROL_DEL_ADDR_FIELD_BITMASK = 32'h0000000F;
localparam HSSI_ADAPT_RX_CONTROL_DEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_CONTROL_DEL_ADDR_FIELD_VALUE = 4'h0;

localparam HSSI_ADAPT_RX_HD_HSSIADAPT_CSR_CLK_HZ_VALUE = 31'd0;

localparam HSSI_ADAPT_RX_CTRL_PLANE_BONDING_VALUE = "individual";

localparam HSSI_ADAPT_RX_DATAPATH_MAPPING_MODE_VALUE = "map_10g_2x2x_2x1x_fifo";
localparam HSSI_ADAPT_RX_DATAPATH_MAPPING_MODE_ADDR_OFST = 528;
localparam HSSI_ADAPT_RX_DATAPATH_MAPPING_MODE_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_RX_DATAPATH_MAPPING_MODE_ADDR_FIELD_HIGH = 4;
localparam HSSI_ADAPT_RX_DATAPATH_MAPPING_MODE_ADDR_FIELD_SIZE = 5;
localparam HSSI_ADAPT_RX_DATAPATH_MAPPING_MODE_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam HSSI_ADAPT_RX_DATAPATH_MAPPING_MODE_ADDR_FIELD_VALMASK = 32'h00000007;
localparam HSSI_ADAPT_RX_DATAPATH_MAPPING_MODE_ADDR_FIELD_VALUE = 5'h7;

localparam HSSI_ADAPT_RX_DS_BYPASS_PIPELN_VALUE = "ds_bypass_pipeln_dis";
localparam HSSI_ADAPT_RX_DS_BYPASS_PIPELN_ADDR_OFST = 535;
localparam HSSI_ADAPT_RX_DS_BYPASS_PIPELN_ADDR_FIELD_OFST = 3;
localparam HSSI_ADAPT_RX_DS_BYPASS_PIPELN_ADDR_FIELD_HIGH = 3;
localparam HSSI_ADAPT_RX_DS_BYPASS_PIPELN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_DS_BYPASS_PIPELN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_ADAPT_RX_DS_BYPASS_PIPELN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_DS_BYPASS_PIPELN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_DUPLEX_MODE_VALUE = "enable";

localparam HSSI_ADAPT_RX_DYN_CLK_SW_EN_VALUE = "disable";
localparam HSSI_ADAPT_RX_DYN_CLK_SW_EN_ADDR_OFST = 547;
localparam HSSI_ADAPT_RX_DYN_CLK_SW_EN_ADDR_FIELD_OFST = 5;
localparam HSSI_ADAPT_RX_DYN_CLK_SW_EN_ADDR_FIELD_HIGH = 5;
localparam HSSI_ADAPT_RX_DYN_CLK_SW_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_DYN_CLK_SW_EN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_ADAPT_RX_DYN_CLK_SW_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_DYN_CLK_SW_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_FIFO_DOUBLE_WRITE_VALUE = "fifo_double_write_en";
localparam HSSI_ADAPT_RX_FIFO_DOUBLE_WRITE_ADDR_OFST = 532;
localparam HSSI_ADAPT_RX_FIFO_DOUBLE_WRITE_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_RX_FIFO_DOUBLE_WRITE_ADDR_FIELD_HIGH = 0;
localparam HSSI_ADAPT_RX_FIFO_DOUBLE_WRITE_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_FIFO_DOUBLE_WRITE_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_ADAPT_RX_FIFO_DOUBLE_WRITE_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_ADAPT_RX_FIFO_DOUBLE_WRITE_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_RX_FIFO_MODE_VALUE = "phase_comp";

localparam HSSI_ADAPT_RX_FIFO_RD_CLK_SCG_EN_VALUE = "disable";
localparam HSSI_ADAPT_RX_FIFO_RD_CLK_SCG_EN_ADDR_OFST = 549;
localparam HSSI_ADAPT_RX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_OFST = 2;
localparam HSSI_ADAPT_RX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_HIGH = 2;
localparam HSSI_ADAPT_RX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_ADAPT_RX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_FIFO_RD_CLK_SEL_VALUE = "fifo_rd_pma_aib_rx_clk";
localparam HSSI_ADAPT_RX_FIFO_RD_CLK_SEL_ADDR_OFST = 547;
localparam HSSI_ADAPT_RX_FIFO_RD_CLK_SEL_ADDR_FIELD_OFST = 2;
localparam HSSI_ADAPT_RX_FIFO_RD_CLK_SEL_ADDR_FIELD_HIGH = 4;
localparam HSSI_ADAPT_RX_FIFO_RD_CLK_SEL_ADDR_FIELD_SIZE = 3;
localparam HSSI_ADAPT_RX_FIFO_RD_CLK_SEL_ADDR_FIELD_BITMASK = 32'h0000001C;
localparam HSSI_ADAPT_RX_FIFO_RD_CLK_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_FIFO_RD_CLK_SEL_ADDR_FIELD_VALUE = 3'h0;

localparam HSSI_ADAPT_RX_FIFO_STOP_RD_VALUE = "rd_empty";
localparam HSSI_ADAPT_RX_FIFO_STOP_RD_ADDR_OFST = 532;
localparam HSSI_ADAPT_RX_FIFO_STOP_RD_ADDR_FIELD_OFST = 1;
localparam HSSI_ADAPT_RX_FIFO_STOP_RD_ADDR_FIELD_HIGH = 1;
localparam HSSI_ADAPT_RX_FIFO_STOP_RD_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_FIFO_STOP_RD_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_ADAPT_RX_FIFO_STOP_RD_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_FIFO_STOP_RD_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_FIFO_STOP_WR_VALUE = "n_wr_full";
localparam HSSI_ADAPT_RX_FIFO_STOP_WR_ADDR_OFST = 532;
localparam HSSI_ADAPT_RX_FIFO_STOP_WR_ADDR_FIELD_OFST = 2;
localparam HSSI_ADAPT_RX_FIFO_STOP_WR_ADDR_FIELD_HIGH = 2;
localparam HSSI_ADAPT_RX_FIFO_STOP_WR_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_FIFO_STOP_WR_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_ADAPT_RX_FIFO_STOP_WR_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_ADAPT_RX_FIFO_STOP_WR_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_RX_FIFO_WIDTH_VALUE = "fifo_double_width";

localparam HSSI_ADAPT_RX_FIFO_WR_CLK_SCG_EN_VALUE = "disable";
localparam HSSI_ADAPT_RX_FIFO_WR_CLK_SCG_EN_ADDR_OFST = 549;
localparam HSSI_ADAPT_RX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_OFST = 1;
localparam HSSI_ADAPT_RX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_HIGH = 1;
localparam HSSI_ADAPT_RX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_ADAPT_RX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_FIFO_WR_CLK_SEL_VALUE = "fifo_wr_pld_pcs_rx_clk_out";
localparam HSSI_ADAPT_RX_FIFO_WR_CLK_SEL_ADDR_OFST = 547;
localparam HSSI_ADAPT_RX_FIFO_WR_CLK_SEL_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_RX_FIFO_WR_CLK_SEL_ADDR_FIELD_HIGH = 1;
localparam HSSI_ADAPT_RX_FIFO_WR_CLK_SEL_ADDR_FIELD_SIZE = 2;
localparam HSSI_ADAPT_RX_FIFO_WR_CLK_SEL_ADDR_FIELD_BITMASK = 32'h00000003;
localparam HSSI_ADAPT_RX_FIFO_WR_CLK_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_FIFO_WR_CLK_SEL_ADDR_FIELD_VALUE = 2'h0;

localparam HSSI_ADAPT_RX_FORCE_ALIGN_VALUE = "force_align_dis";
localparam HSSI_ADAPT_RX_FORCE_ALIGN_ADDR_OFST = 533;
localparam HSSI_ADAPT_RX_FORCE_ALIGN_ADDR_FIELD_OFST = 4;
localparam HSSI_ADAPT_RX_FORCE_ALIGN_ADDR_FIELD_HIGH = 4;
localparam HSSI_ADAPT_RX_FORCE_ALIGN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_FORCE_ALIGN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_ADAPT_RX_FORCE_ALIGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_FORCE_ALIGN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_FREE_RUN_DIV_CLK_VALUE = "out_of_reset_sync";
localparam HSSI_ADAPT_RX_FREE_RUN_DIV_CLK_ADDR_OFST = 550;
localparam HSSI_ADAPT_RX_FREE_RUN_DIV_CLK_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_RX_FREE_RUN_DIV_CLK_ADDR_FIELD_HIGH = 0;
localparam HSSI_ADAPT_RX_FREE_RUN_DIV_CLK_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_FREE_RUN_DIV_CLK_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_ADAPT_RX_FREE_RUN_DIV_CLK_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_FREE_RUN_DIV_CLK_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_FSR_PLD_10G_RX_CRC32_ERR_RST_VAL_VALUE = "reset_to_zero_crc32";
localparam HSSI_ADAPT_RX_FSR_PLD_10G_RX_CRC32_ERR_RST_VAL_ADDR_OFST = 544;
localparam HSSI_ADAPT_RX_FSR_PLD_10G_RX_CRC32_ERR_RST_VAL_ADDR_FIELD_OFST = 3;
localparam HSSI_ADAPT_RX_FSR_PLD_10G_RX_CRC32_ERR_RST_VAL_ADDR_FIELD_HIGH = 3;
localparam HSSI_ADAPT_RX_FSR_PLD_10G_RX_CRC32_ERR_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_FSR_PLD_10G_RX_CRC32_ERR_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_ADAPT_RX_FSR_PLD_10G_RX_CRC32_ERR_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_FSR_PLD_10G_RX_CRC32_ERR_RST_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_FSR_PLD_8G_SIGDET_OUT_RST_VAL_VALUE = "reset_to_zero_sigdet";
localparam HSSI_ADAPT_RX_FSR_PLD_8G_SIGDET_OUT_RST_VAL_ADDR_OFST = 544;
localparam HSSI_ADAPT_RX_FSR_PLD_8G_SIGDET_OUT_RST_VAL_ADDR_FIELD_OFST = 2;
localparam HSSI_ADAPT_RX_FSR_PLD_8G_SIGDET_OUT_RST_VAL_ADDR_FIELD_HIGH = 2;
localparam HSSI_ADAPT_RX_FSR_PLD_8G_SIGDET_OUT_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_FSR_PLD_8G_SIGDET_OUT_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_ADAPT_RX_FSR_PLD_8G_SIGDET_OUT_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_FSR_PLD_8G_SIGDET_OUT_RST_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_FSR_PLD_LTD_B_RST_VAL_VALUE = "reset_to_one_ltdb";
localparam HSSI_ADAPT_RX_FSR_PLD_LTD_B_RST_VAL_ADDR_OFST = 544;
localparam HSSI_ADAPT_RX_FSR_PLD_LTD_B_RST_VAL_ADDR_FIELD_OFST = 1;
localparam HSSI_ADAPT_RX_FSR_PLD_LTD_B_RST_VAL_ADDR_FIELD_HIGH = 1;
localparam HSSI_ADAPT_RX_FSR_PLD_LTD_B_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_FSR_PLD_LTD_B_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_ADAPT_RX_FSR_PLD_LTD_B_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_ADAPT_RX_FSR_PLD_LTD_B_RST_VAL_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_RX_FSR_PLD_LTR_RST_VAL_VALUE = "reset_to_zero_ltr";
localparam HSSI_ADAPT_RX_FSR_PLD_LTR_RST_VAL_ADDR_OFST = 544;
localparam HSSI_ADAPT_RX_FSR_PLD_LTR_RST_VAL_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_RX_FSR_PLD_LTR_RST_VAL_ADDR_FIELD_HIGH = 0;
localparam HSSI_ADAPT_RX_FSR_PLD_LTR_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_FSR_PLD_LTR_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_ADAPT_RX_FSR_PLD_LTR_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_FSR_PLD_LTR_RST_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_FSR_PLD_RX_FIFO_ALIGN_CLR_RST_VAL_VALUE = "reset_to_zero_alignclr";
localparam HSSI_ADAPT_RX_FSR_PLD_RX_FIFO_ALIGN_CLR_RST_VAL_ADDR_OFST = 544;
localparam HSSI_ADAPT_RX_FSR_PLD_RX_FIFO_ALIGN_CLR_RST_VAL_ADDR_FIELD_OFST = 4;
localparam HSSI_ADAPT_RX_FSR_PLD_RX_FIFO_ALIGN_CLR_RST_VAL_ADDR_FIELD_HIGH = 4;
localparam HSSI_ADAPT_RX_FSR_PLD_RX_FIFO_ALIGN_CLR_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_FSR_PLD_RX_FIFO_ALIGN_CLR_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_ADAPT_RX_FSR_PLD_RX_FIFO_ALIGN_CLR_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_FSR_PLD_RX_FIFO_ALIGN_CLR_RST_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_HD_HSSIADAPT_HIP_AIB_CLK_2X_HZ_VALUE = 31'd0;

localparam HSSI_ADAPT_RX_HD_HSSIADAPT_HIP_AIB_CLK_HZ_VALUE = 31'd0;

localparam HSSI_ADAPT_RX_HIP_MODE_VALUE = "disable_hip";

localparam HSSI_ADAPT_RX_HRDRST_DCD_CAL_DONE_BYPASS_VALUE = "disable";
localparam HSSI_ADAPT_RX_HRDRST_DCD_CAL_DONE_BYPASS_ADDR_OFST = 550;
localparam HSSI_ADAPT_RX_HRDRST_DCD_CAL_DONE_BYPASS_ADDR_FIELD_OFST = 3;
localparam HSSI_ADAPT_RX_HRDRST_DCD_CAL_DONE_BYPASS_ADDR_FIELD_HIGH = 3;
localparam HSSI_ADAPT_RX_HRDRST_DCD_CAL_DONE_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_HRDRST_DCD_CAL_DONE_BYPASS_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_ADAPT_RX_HRDRST_DCD_CAL_DONE_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_HRDRST_DCD_CAL_DONE_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_HRDRST_RX_OSC_CLK_SCG_EN_VALUE = "disable";
localparam HSSI_ADAPT_RX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_OFST = 549;
localparam HSSI_ADAPT_RX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_OFST = 6;
localparam HSSI_ADAPT_RX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_RX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_ADAPT_RX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_HRDRST_USER_CTL_EN_VALUE = "disable";
localparam HSSI_ADAPT_RX_HRDRST_USER_CTL_EN_ADDR_OFST = 537;
localparam HSSI_ADAPT_RX_HRDRST_USER_CTL_EN_ADDR_FIELD_OFST = 3;
localparam HSSI_ADAPT_RX_HRDRST_USER_CTL_EN_ADDR_FIELD_HIGH = 3;
localparam HSSI_ADAPT_RX_HRDRST_USER_CTL_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_HRDRST_USER_CTL_EN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_ADAPT_RX_HRDRST_USER_CTL_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_HRDRST_USER_CTL_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_INDV_VALUE = "indv_en";
localparam HSSI_ADAPT_RX_INDV_ADDR_OFST = 533;
localparam HSSI_ADAPT_RX_INDV_ADDR_FIELD_OFST = 6;
localparam HSSI_ADAPT_RX_INDV_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_RX_INDV_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_INDV_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_ADAPT_RX_INDV_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_ADAPT_RX_INDV_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL_VALUE = "pld_pma_tx_clk_out_clk1";
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL_ADDR_OFST = 548;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL_ADDR_FIELD_HIGH = 3;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL_ADDR_FIELD_SIZE = 4;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL_ADDR_FIELD_BITMASK = 32'h0000000F;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL_ADDR_FIELD_VALUE = 4'h0;

localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL0_VALUE = "pma_clks_or_txfifowr_post_ct_or_txfiford_pre_or_post_ct_mux_clk1_mux0";
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL0_ADDR_OFST = 546;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL0_ADDR_FIELD_OFST = 6;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL0_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL0_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL0_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL0_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL0_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL1_VALUE = "pma_clks_or_txfiford_pre_or_post_ct_mux_clk1_mux1";
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL1_ADDR_OFST = 546;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL1_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL1_ADDR_FIELD_HIGH = 0;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL1_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL1_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL1_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL1_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL2_VALUE = "pma_clks_or_txfiford_pre_ct_mux_clk1_mux2";
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL2_ADDR_OFST = 546;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL2_ADDR_FIELD_OFST = 1;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL2_ADDR_FIELD_HIGH = 1;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL2_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL2_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL2_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL2_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL3_VALUE = "pma_clks_clk1_mux3";
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL3_ADDR_OFST = 546;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL3_ADDR_FIELD_OFST = 2;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL3_ADDR_FIELD_HIGH = 2;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL3_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL3_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL3_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_INTERNAL_CLK1_SEL3_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL_VALUE = "pld_pma_tx_clk_out_clk2";
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL_ADDR_OFST = 548;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL_ADDR_FIELD_OFST = 4;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL_ADDR_FIELD_SIZE = 4;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL_ADDR_FIELD_BITMASK = 32'h000000F0;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL_ADDR_FIELD_VALUE = 4'h0;

localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL0_VALUE = "pma_clks_or_rxfiford_post_ct_or_rxfifowr_pre_or_post_ct_mux_clk2_mux0";
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL0_ADDR_OFST = 547;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL0_ADDR_FIELD_OFST = 6;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL0_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL0_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL0_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL0_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL0_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL1_VALUE = "pma_clks_or_rxfifowr_pre_or_post_ct_mux_clk2_mux1";
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL1_ADDR_OFST = 551;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL1_ADDR_FIELD_OFST = 1;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL1_ADDR_FIELD_HIGH = 1;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL1_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL1_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL1_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL1_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL2_VALUE = "pma_clks_or_rxfifowr_pre_ct_mux_clk2_mux2";
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL2_ADDR_OFST = 551;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL2_ADDR_FIELD_OFST = 2;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL2_ADDR_FIELD_HIGH = 2;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL2_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL2_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL2_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL2_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL3_VALUE = "pma_clks_clk2_mux3";
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL3_ADDR_OFST = 551;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL3_ADDR_FIELD_OFST = 3;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL3_ADDR_FIELD_HIGH = 3;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL3_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL3_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL3_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_INTERNAL_CLK2_SEL3_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_LOOPBACK_MODE_VALUE = "loopback_disable";

localparam HSSI_ADAPT_RX_OSC_CLK_SCG_EN_VALUE = "disable";
localparam HSSI_ADAPT_RX_OSC_CLK_SCG_EN_ADDR_OFST = 549;
localparam HSSI_ADAPT_RX_OSC_CLK_SCG_EN_ADDR_FIELD_OFST = 5;
localparam HSSI_ADAPT_RX_OSC_CLK_SCG_EN_ADDR_FIELD_HIGH = 5;
localparam HSSI_ADAPT_RX_OSC_CLK_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_OSC_CLK_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_ADAPT_RX_OSC_CLK_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_OSC_CLK_SCG_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_PHCOMP_RD_DEL_VALUE = "phcomp_rd_del3";
localparam HSSI_ADAPT_RX_PHCOMP_RD_DEL_ADDR_OFST = 531;
localparam HSSI_ADAPT_RX_PHCOMP_RD_DEL_ADDR_FIELD_OFST = 5;
localparam HSSI_ADAPT_RX_PHCOMP_RD_DEL_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_PHCOMP_RD_DEL_ADDR_FIELD_SIZE = 3;
localparam HSSI_ADAPT_RX_PHCOMP_RD_DEL_ADDR_FIELD_BITMASK = 32'h000000E0;
localparam HSSI_ADAPT_RX_PHCOMP_RD_DEL_ADDR_FIELD_VALMASK = 32'h00000060;
localparam HSSI_ADAPT_RX_PHCOMP_RD_DEL_ADDR_FIELD_VALUE = 3'h3;

localparam HSSI_ADAPT_RX_PIPE_MODE_VALUE = "disable_pipe";

localparam HSSI_ADAPT_RX_HD_HSSIADAPT_PLD_PCS_RX_CLK_OUT_HZ_VALUE = 31'd322265625;

localparam HSSI_ADAPT_RX_HD_HSSIADAPT_PLD_PMA_HCLK_HZ_VALUE = 31'd0;

localparam HSSI_ADAPT_RX_PMA_AIB_RX_CLK_EXPECTED_SETTING_VALUE = "x2";

localparam HSSI_ADAPT_RX_HD_HSSIADAPT_PMA_AIB_RX_CLK_HZ_VALUE = 31'd0;

localparam HSSI_ADAPT_RX_PMA_CORECLKIN_SEL_VALUE = "pma_coreclkin_pld_sel";
localparam HSSI_ADAPT_RX_PMA_CORECLKIN_SEL_ADDR_OFST = 549;
localparam HSSI_ADAPT_RX_PMA_CORECLKIN_SEL_ADDR_FIELD_OFST = 7;
localparam HSSI_ADAPT_RX_PMA_CORECLKIN_SEL_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_PMA_CORECLKIN_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_PMA_CORECLKIN_SEL_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_ADAPT_RX_PMA_CORECLKIN_SEL_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_ADAPT_RX_PMA_CORECLKIN_SEL_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_RX_PMA_HCLK_SCG_EN_VALUE = "enable";
localparam HSSI_ADAPT_RX_PMA_HCLK_SCG_EN_ADDR_OFST = 549;
localparam HSSI_ADAPT_RX_PMA_HCLK_SCG_EN_ADDR_FIELD_OFST = 4;
localparam HSSI_ADAPT_RX_PMA_HCLK_SCG_EN_ADDR_FIELD_HIGH = 4;
localparam HSSI_ADAPT_RX_PMA_HCLK_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_PMA_HCLK_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_ADAPT_RX_PMA_HCLK_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000010;
localparam HSSI_ADAPT_RX_PMA_HCLK_SCG_EN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_RX_POWERDOWN_MODE_VALUE = "powerup";

localparam HSSI_ADAPT_RX_RX_10G_KRFEC_RX_DIAG_DATA_STATUS_POLLING_BYPASS_VALUE = "disable";
localparam HSSI_ADAPT_RX_RX_10G_KRFEC_RX_DIAG_DATA_STATUS_POLLING_BYPASS_ADDR_OFST = 529;
localparam HSSI_ADAPT_RX_RX_10G_KRFEC_RX_DIAG_DATA_STATUS_POLLING_BYPASS_ADDR_FIELD_OFST = 1;
localparam HSSI_ADAPT_RX_RX_10G_KRFEC_RX_DIAG_DATA_STATUS_POLLING_BYPASS_ADDR_FIELD_HIGH = 1;
localparam HSSI_ADAPT_RX_RX_10G_KRFEC_RX_DIAG_DATA_STATUS_POLLING_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RX_10G_KRFEC_RX_DIAG_DATA_STATUS_POLLING_BYPASS_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_ADAPT_RX_RX_10G_KRFEC_RX_DIAG_DATA_STATUS_POLLING_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RX_10G_KRFEC_RX_DIAG_DATA_STATUS_POLLING_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_RX_ADP_GO_B4TXEQ_EN_VALUE = "enable";
localparam HSSI_ADAPT_RX_RX_ADP_GO_B4TXEQ_EN_ADDR_OFST = 542;
localparam HSSI_ADAPT_RX_RX_ADP_GO_B4TXEQ_EN_ADDR_FIELD_OFST = 7;
localparam HSSI_ADAPT_RX_RX_ADP_GO_B4TXEQ_EN_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_RX_ADP_GO_B4TXEQ_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RX_ADP_GO_B4TXEQ_EN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_ADAPT_RX_RX_ADP_GO_B4TXEQ_EN_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_ADAPT_RX_RX_ADP_GO_B4TXEQ_EN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_RX_RX_DATAPATH_TB_SEL_VALUE = "cp_bond";
localparam HSSI_ADAPT_RX_RX_DATAPATH_TB_SEL_ADDR_OFST = 545;
localparam HSSI_ADAPT_RX_RX_DATAPATH_TB_SEL_ADDR_FIELD_OFST = 3;
localparam HSSI_ADAPT_RX_RX_DATAPATH_TB_SEL_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_RX_RX_DATAPATH_TB_SEL_ADDR_FIELD_SIZE = 4;
localparam HSSI_ADAPT_RX_RX_DATAPATH_TB_SEL_ADDR_FIELD_BITMASK = 32'h00000078;
localparam HSSI_ADAPT_RX_RX_DATAPATH_TB_SEL_ADDR_FIELD_VALMASK = 32'h00000010;
localparam HSSI_ADAPT_RX_RX_DATAPATH_TB_SEL_ADDR_FIELD_VALUE = 4'h2;

localparam HSSI_ADAPT_RX_RX_EQ_ITERATION_VALUE = "cycles_32";
localparam HSSI_ADAPT_RX_RX_EQ_ITERATION_ADDR_OFST = 542;
localparam HSSI_ADAPT_RX_RX_EQ_ITERATION_ADDR_FIELD_OFST = 2;
localparam HSSI_ADAPT_RX_RX_EQ_ITERATION_ADDR_FIELD_HIGH = 3;
localparam HSSI_ADAPT_RX_RX_EQ_ITERATION_ADDR_FIELD_SIZE = 2;
localparam HSSI_ADAPT_RX_RX_EQ_ITERATION_ADDR_FIELD_BITMASK = 32'h0000000C;
localparam HSSI_ADAPT_RX_RX_EQ_ITERATION_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_ADAPT_RX_RX_EQ_ITERATION_ADDR_FIELD_VALUE = 2'h1;

localparam HSSI_ADAPT_RX_RX_FIFO_POWER_MODE_VALUE = "full_width_full_depth";
localparam HSSI_ADAPT_RX_RX_FIFO_POWER_MODE_ADDR_OFST = 536;
localparam HSSI_ADAPT_RX_RX_FIFO_POWER_MODE_ADDR_FIELD_OFST = 6;
localparam HSSI_ADAPT_RX_RX_FIFO_POWER_MODE_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_RX_FIFO_POWER_MODE_ADDR_FIELD_SIZE = 2;
localparam HSSI_ADAPT_RX_RX_FIFO_POWER_MODE_ADDR_FIELD_BITMASK = 32'h000000C0;
localparam HSSI_ADAPT_RX_RX_FIFO_POWER_MODE_ADDR_FIELD_VALMASK = 32'h000000C0;
localparam HSSI_ADAPT_RX_RX_FIFO_POWER_MODE_ADDR_FIELD_VALUE = 2'h3;

localparam HSSI_ADAPT_RX_RX_FIFO_READ_LATENCY_ADJUST_VALUE = "disable";
localparam HSSI_ADAPT_RX_RX_FIFO_READ_LATENCY_ADJUST_ADDR_OFST = 545;
localparam HSSI_ADAPT_RX_RX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_OFST = 7;
localparam HSSI_ADAPT_RX_RX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_RX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_ADAPT_RX_RX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_RX_FIFO_WRITE_LATENCY_ADJUST_VALUE = "disable";
localparam HSSI_ADAPT_RX_RX_FIFO_WRITE_LATENCY_ADJUST_ADDR_OFST = 538;
localparam HSSI_ADAPT_RX_RX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_OFST = 7;
localparam HSSI_ADAPT_RX_RX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_RX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_ADAPT_RX_RX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_RX_INVALID_NO_CHANGE_VALUE = "disable";
localparam HSSI_ADAPT_RX_RX_INVALID_NO_CHANGE_ADDR_OFST = 542;
localparam HSSI_ADAPT_RX_RX_INVALID_NO_CHANGE_ADDR_FIELD_OFST = 6;
localparam HSSI_ADAPT_RX_RX_INVALID_NO_CHANGE_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_RX_RX_INVALID_NO_CHANGE_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RX_INVALID_NO_CHANGE_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_ADAPT_RX_RX_INVALID_NO_CHANGE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RX_INVALID_NO_CHANGE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_RX_OSC_CLOCK_SETTING_VALUE = "osc_clk_div_by1";

localparam HSSI_ADAPT_RX_RX_PARITY_SEL_VALUE = "func_sel";
localparam HSSI_ADAPT_RX_RX_PARITY_SEL_ADDR_OFST = 544;
localparam HSSI_ADAPT_RX_RX_PARITY_SEL_ADDR_FIELD_OFST = 6;
localparam HSSI_ADAPT_RX_RX_PARITY_SEL_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_RX_PARITY_SEL_ADDR_FIELD_SIZE = 2;
localparam HSSI_ADAPT_RX_RX_PARITY_SEL_ADDR_FIELD_BITMASK = 32'h000000C0;
localparam HSSI_ADAPT_RX_RX_PARITY_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RX_PARITY_SEL_ADDR_FIELD_VALUE = 2'h0;

localparam HSSI_ADAPT_RX_RX_PCS_TESTBUS_SEL_VALUE = "direct_tr_tb_bit0_sel";
localparam HSSI_ADAPT_RX_RX_PCS_TESTBUS_SEL_ADDR_OFST = 528;
localparam HSSI_ADAPT_RX_RX_PCS_TESTBUS_SEL_ADDR_FIELD_OFST = 5;
localparam HSSI_ADAPT_RX_RX_PCS_TESTBUS_SEL_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_RX_PCS_TESTBUS_SEL_ADDR_FIELD_SIZE = 3;
localparam HSSI_ADAPT_RX_RX_PCS_TESTBUS_SEL_ADDR_FIELD_BITMASK = 32'h000000E0;
localparam HSSI_ADAPT_RX_RX_PCS_TESTBUS_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RX_PCS_TESTBUS_SEL_ADDR_FIELD_VALUE = 3'h0;

localparam HSSI_ADAPT_RX_RX_PCSPMA_TESTBUS_SEL_VALUE = "enable";
localparam HSSI_ADAPT_RX_RX_PCSPMA_TESTBUS_SEL_ADDR_OFST = 529;
localparam HSSI_ADAPT_RX_RX_PCSPMA_TESTBUS_SEL_ADDR_FIELD_OFST = 7;
localparam HSSI_ADAPT_RX_RX_PCSPMA_TESTBUS_SEL_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_RX_PCSPMA_TESTBUS_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RX_PCSPMA_TESTBUS_SEL_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_ADAPT_RX_RX_PCSPMA_TESTBUS_SEL_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_ADAPT_RX_RX_PCSPMA_TESTBUS_SEL_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_RX_RX_PLD_8G_A1A2_K1K2_FLAG_POLLING_BYPASS_VALUE = "disable";
localparam HSSI_ADAPT_RX_RX_PLD_8G_A1A2_K1K2_FLAG_POLLING_BYPASS_ADDR_OFST = 529;
localparam HSSI_ADAPT_RX_RX_PLD_8G_A1A2_K1K2_FLAG_POLLING_BYPASS_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_RX_RX_PLD_8G_A1A2_K1K2_FLAG_POLLING_BYPASS_ADDR_FIELD_HIGH = 0;
localparam HSSI_ADAPT_RX_RX_PLD_8G_A1A2_K1K2_FLAG_POLLING_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RX_PLD_8G_A1A2_K1K2_FLAG_POLLING_BYPASS_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_ADAPT_RX_RX_PLD_8G_A1A2_K1K2_FLAG_POLLING_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RX_PLD_8G_A1A2_K1K2_FLAG_POLLING_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_RX_PLD_8G_WA_BOUNDARY_POLLING_BYPASS_VALUE = "disable";
localparam HSSI_ADAPT_RX_RX_PLD_8G_WA_BOUNDARY_POLLING_BYPASS_ADDR_OFST = 529;
localparam HSSI_ADAPT_RX_RX_PLD_8G_WA_BOUNDARY_POLLING_BYPASS_ADDR_FIELD_OFST = 6;
localparam HSSI_ADAPT_RX_RX_PLD_8G_WA_BOUNDARY_POLLING_BYPASS_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_RX_RX_PLD_8G_WA_BOUNDARY_POLLING_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RX_PLD_8G_WA_BOUNDARY_POLLING_BYPASS_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_ADAPT_RX_RX_PLD_8G_WA_BOUNDARY_POLLING_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RX_PLD_8G_WA_BOUNDARY_POLLING_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_RX_PLD_PMA_PCIE_SW_DONE_POLLING_BYPASS_VALUE = "disable";
localparam HSSI_ADAPT_RX_RX_PLD_PMA_PCIE_SW_DONE_POLLING_BYPASS_ADDR_OFST = 529;
localparam HSSI_ADAPT_RX_RX_PLD_PMA_PCIE_SW_DONE_POLLING_BYPASS_ADDR_FIELD_OFST = 2;
localparam HSSI_ADAPT_RX_RX_PLD_PMA_PCIE_SW_DONE_POLLING_BYPASS_ADDR_FIELD_HIGH = 2;
localparam HSSI_ADAPT_RX_RX_PLD_PMA_PCIE_SW_DONE_POLLING_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RX_PLD_PMA_PCIE_SW_DONE_POLLING_BYPASS_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_ADAPT_RX_RX_PLD_PMA_PCIE_SW_DONE_POLLING_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RX_PLD_PMA_PCIE_SW_DONE_POLLING_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_RX_PLD_PMA_RESER_IN_POLLING_BYPASS_VALUE = "disable";
localparam HSSI_ADAPT_RX_RX_PLD_PMA_RESER_IN_POLLING_BYPASS_ADDR_OFST = 529;
localparam HSSI_ADAPT_RX_RX_PLD_PMA_RESER_IN_POLLING_BYPASS_ADDR_FIELD_OFST = 3;
localparam HSSI_ADAPT_RX_RX_PLD_PMA_RESER_IN_POLLING_BYPASS_ADDR_FIELD_HIGH = 3;
localparam HSSI_ADAPT_RX_RX_PLD_PMA_RESER_IN_POLLING_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RX_PLD_PMA_RESER_IN_POLLING_BYPASS_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_ADAPT_RX_RX_PLD_PMA_RESER_IN_POLLING_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RX_PLD_PMA_RESER_IN_POLLING_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_RX_PLD_PMA_TESTBUS_POLLING_BYPASS_VALUE = "disable";
localparam HSSI_ADAPT_RX_RX_PLD_PMA_TESTBUS_POLLING_BYPASS_ADDR_OFST = 529;
localparam HSSI_ADAPT_RX_RX_PLD_PMA_TESTBUS_POLLING_BYPASS_ADDR_FIELD_OFST = 4;
localparam HSSI_ADAPT_RX_RX_PLD_PMA_TESTBUS_POLLING_BYPASS_ADDR_FIELD_HIGH = 4;
localparam HSSI_ADAPT_RX_RX_PLD_PMA_TESTBUS_POLLING_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RX_PLD_PMA_TESTBUS_POLLING_BYPASS_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_ADAPT_RX_RX_PLD_PMA_TESTBUS_POLLING_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RX_PLD_PMA_TESTBUS_POLLING_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_RX_PLD_TEST_DATA_POLLING_BYPASS_VALUE = "disable";
localparam HSSI_ADAPT_RX_RX_PLD_TEST_DATA_POLLING_BYPASS_ADDR_OFST = 529;
localparam HSSI_ADAPT_RX_RX_PLD_TEST_DATA_POLLING_BYPASS_ADDR_FIELD_OFST = 5;
localparam HSSI_ADAPT_RX_RX_PLD_TEST_DATA_POLLING_BYPASS_ADDR_FIELD_HIGH = 5;
localparam HSSI_ADAPT_RX_RX_PLD_TEST_DATA_POLLING_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RX_PLD_TEST_DATA_POLLING_BYPASS_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_ADAPT_RX_RX_PLD_TEST_DATA_POLLING_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RX_PLD_TEST_DATA_POLLING_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_RX_PMA_RSTN_CYCLES_VALUE = "four_cycles";
localparam HSSI_ADAPT_RX_RX_PMA_RSTN_CYCLES_ADDR_OFST = 539;
localparam HSSI_ADAPT_RX_RX_PMA_RSTN_CYCLES_ADDR_FIELD_OFST = 7;
localparam HSSI_ADAPT_RX_RX_PMA_RSTN_CYCLES_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_RX_PMA_RSTN_CYCLES_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RX_PMA_RSTN_CYCLES_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_ADAPT_RX_RX_PMA_RSTN_CYCLES_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RX_PMA_RSTN_CYCLES_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_RX_PMA_RSTN_EN_VALUE = "disable";
localparam HSSI_ADAPT_RX_RX_PMA_RSTN_EN_ADDR_OFST = 540;
localparam HSSI_ADAPT_RX_RX_PMA_RSTN_EN_ADDR_FIELD_OFST = 7;
localparam HSSI_ADAPT_RX_RX_PMA_RSTN_EN_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_RX_PMA_RSTN_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RX_PMA_RSTN_EN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_ADAPT_RX_RX_PMA_RSTN_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RX_PMA_RSTN_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_RX_POST_CURSOR_EN_VALUE = "disable";
localparam HSSI_ADAPT_RX_RX_POST_CURSOR_EN_ADDR_OFST = 542;
localparam HSSI_ADAPT_RX_RX_POST_CURSOR_EN_ADDR_FIELD_OFST = 5;
localparam HSSI_ADAPT_RX_RX_POST_CURSOR_EN_ADDR_FIELD_HIGH = 5;
localparam HSSI_ADAPT_RX_RX_POST_CURSOR_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RX_POST_CURSOR_EN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_ADAPT_RX_RX_POST_CURSOR_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RX_POST_CURSOR_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_RX_PRE_CURSOR_EN_VALUE = "disable";
localparam HSSI_ADAPT_RX_RX_PRE_CURSOR_EN_ADDR_OFST = 542;
localparam HSSI_ADAPT_RX_RX_PRE_CURSOR_EN_ADDR_FIELD_OFST = 4;
localparam HSSI_ADAPT_RX_RX_PRE_CURSOR_EN_ADDR_FIELD_HIGH = 4;
localparam HSSI_ADAPT_RX_RX_PRE_CURSOR_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RX_PRE_CURSOR_EN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_ADAPT_RX_RX_PRE_CURSOR_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RX_PRE_CURSOR_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_RX_RMFFLAG_STRETCH_ENABLE_VALUE = "enable";
localparam HSSI_ADAPT_RX_RX_RMFFLAG_STRETCH_ENABLE_ADDR_OFST = 551;
localparam HSSI_ADAPT_RX_RX_RMFFLAG_STRETCH_ENABLE_ADDR_FIELD_OFST = 7;
localparam HSSI_ADAPT_RX_RX_RMFFLAG_STRETCH_ENABLE_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_RX_RMFFLAG_STRETCH_ENABLE_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RX_RMFFLAG_STRETCH_ENABLE_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_ADAPT_RX_RX_RMFFLAG_STRETCH_ENABLE_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_ADAPT_RX_RX_RMFFLAG_STRETCH_ENABLE_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_RX_RX_RMFFLAG_STRETCH_NUM_STAGES_VALUE = "rmfflag_two_stage";
localparam HSSI_ADAPT_RX_RX_RMFFLAG_STRETCH_NUM_STAGES_ADDR_OFST = 550;
localparam HSSI_ADAPT_RX_RX_RMFFLAG_STRETCH_NUM_STAGES_ADDR_FIELD_OFST = 4;
localparam HSSI_ADAPT_RX_RX_RMFFLAG_STRETCH_NUM_STAGES_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_RX_RX_RMFFLAG_STRETCH_NUM_STAGES_ADDR_FIELD_SIZE = 3;
localparam HSSI_ADAPT_RX_RX_RMFFLAG_STRETCH_NUM_STAGES_ADDR_FIELD_BITMASK = 32'h00000070;
localparam HSSI_ADAPT_RX_RX_RMFFLAG_STRETCH_NUM_STAGES_ADDR_FIELD_VALMASK = 32'h00000020;
localparam HSSI_ADAPT_RX_RX_RMFFLAG_STRETCH_NUM_STAGES_ADDR_FIELD_VALUE = 3'h2;

localparam HSSI_ADAPT_RX_RX_RXEQ_EN_VALUE = "disable";
localparam HSSI_ADAPT_RX_RX_RXEQ_EN_ADDR_OFST = 542;
localparam HSSI_ADAPT_RX_RX_RXEQ_EN_ADDR_FIELD_OFST = 1;
localparam HSSI_ADAPT_RX_RX_RXEQ_EN_ADDR_FIELD_HIGH = 1;
localparam HSSI_ADAPT_RX_RX_RXEQ_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RX_RXEQ_EN_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_ADAPT_RX_RX_RXEQ_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RX_RXEQ_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_RX_TXEQ_EN_VALUE = "disable";
localparam HSSI_ADAPT_RX_RX_TXEQ_EN_ADDR_OFST = 542;
localparam HSSI_ADAPT_RX_RX_TXEQ_EN_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_RX_RX_TXEQ_EN_ADDR_FIELD_HIGH = 0;
localparam HSSI_ADAPT_RX_RX_TXEQ_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RX_TXEQ_EN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_ADAPT_RX_RX_TXEQ_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RX_TXEQ_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_RX_TXEQ_TIME_VALUE = 8'd64;
localparam HSSI_ADAPT_RX_RX_TXEQ_TIME_ADDR_OFST = 543;
localparam HSSI_ADAPT_RX_RX_TXEQ_TIME_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_RX_RX_TXEQ_TIME_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_RX_TXEQ_TIME_ADDR_FIELD_SIZE = 8;
localparam HSSI_ADAPT_RX_RX_TXEQ_TIME_ADDR_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_ADAPT_RX_RX_TXEQ_TIME_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_ADAPT_RX_RX_TXEQ_TIME_ADDR_FIELD_VALUE = 8'h40;

localparam HSSI_ADAPT_RX_RX_USE_RXVALID_FOR_RXEQ_VALUE = "rxvalid";
localparam HSSI_ADAPT_RX_RX_USE_RXVALID_FOR_RXEQ_ADDR_OFST = 541;
localparam HSSI_ADAPT_RX_RX_USE_RXVALID_FOR_RXEQ_ADDR_FIELD_OFST = 7;
localparam HSSI_ADAPT_RX_RX_USE_RXVALID_FOR_RXEQ_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_RX_USE_RXVALID_FOR_RXEQ_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RX_USE_RXVALID_FOR_RXEQ_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_ADAPT_RX_RX_USE_RXVALID_FOR_RXEQ_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RX_USE_RXVALID_FOR_RXEQ_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_RX_USERTEST_SEL_VALUE = "direct_tr_usertest3_sel";
localparam HSSI_ADAPT_RX_RX_USERTEST_SEL_ADDR_OFST = 537;
localparam HSSI_ADAPT_RX_RX_USERTEST_SEL_ADDR_FIELD_OFST = 6;
localparam HSSI_ADAPT_RX_RX_USERTEST_SEL_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_RX_USERTEST_SEL_ADDR_FIELD_SIZE = 2;
localparam HSSI_ADAPT_RX_RX_USERTEST_SEL_ADDR_FIELD_BITMASK = 32'h000000C0;
localparam HSSI_ADAPT_RX_RX_USERTEST_SEL_ADDR_FIELD_VALMASK = 32'h000000C0;
localparam HSSI_ADAPT_RX_RX_USERTEST_SEL_ADDR_FIELD_VALUE = 2'h3;

localparam HSSI_ADAPT_RX_RXFIFO_EMPTY_VALUE = "empty_default";
localparam HSSI_ADAPT_RX_RXFIFO_EMPTY_ADDR_OFST = 530;
localparam HSSI_ADAPT_RX_RXFIFO_EMPTY_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_RX_RXFIFO_EMPTY_ADDR_FIELD_HIGH = 4;
localparam HSSI_ADAPT_RX_RXFIFO_EMPTY_ADDR_FIELD_SIZE = 5;
localparam HSSI_ADAPT_RX_RXFIFO_EMPTY_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam HSSI_ADAPT_RX_RXFIFO_EMPTY_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RXFIFO_EMPTY_ADDR_FIELD_VALUE = 5'h0;

localparam HSSI_ADAPT_RX_RXFIFO_FULL_VALUE = "full_dw";
localparam HSSI_ADAPT_RX_RXFIFO_FULL_ADDR_OFST = 531;
localparam HSSI_ADAPT_RX_RXFIFO_FULL_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_RX_RXFIFO_FULL_ADDR_FIELD_HIGH = 4;
localparam HSSI_ADAPT_RX_RXFIFO_FULL_ADDR_FIELD_SIZE = 5;
localparam HSSI_ADAPT_RX_RXFIFO_FULL_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam HSSI_ADAPT_RX_RXFIFO_FULL_ADDR_FIELD_VALMASK = 32'h0000000E;
localparam HSSI_ADAPT_RX_RXFIFO_FULL_ADDR_FIELD_VALUE = 5'hE;

localparam HSSI_ADAPT_RX_RXFIFO_MODE_VALUE = "rxphase_comp";
localparam HSSI_ADAPT_RX_RXFIFO_MODE_ADDR_OFST = 530;
localparam HSSI_ADAPT_RX_RXFIFO_MODE_ADDR_FIELD_OFST = 5;
localparam HSSI_ADAPT_RX_RXFIFO_MODE_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_RX_RXFIFO_MODE_ADDR_FIELD_SIZE = 2;
localparam HSSI_ADAPT_RX_RXFIFO_MODE_ADDR_FIELD_BITMASK = 32'h00000060;
localparam HSSI_ADAPT_RX_RXFIFO_MODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RXFIFO_MODE_ADDR_FIELD_VALUE = 2'h0;

localparam HSSI_ADAPT_RX_RXFIFO_PEMPTY_VALUE = 5'd2;
localparam HSSI_ADAPT_RX_RXFIFO_PEMPTY_ADDR_OFST = 532;
localparam HSSI_ADAPT_RX_RXFIFO_PEMPTY_ADDR_FIELD_OFST = 3;
localparam HSSI_ADAPT_RX_RXFIFO_PEMPTY_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_RXFIFO_PEMPTY_ADDR_FIELD_SIZE = 5;
localparam HSSI_ADAPT_RX_RXFIFO_PEMPTY_ADDR_FIELD_BITMASK = 32'h000000F8;
localparam HSSI_ADAPT_RX_RXFIFO_PEMPTY_ADDR_FIELD_VALMASK = 32'h00000010;
localparam HSSI_ADAPT_RX_RXFIFO_PEMPTY_ADDR_FIELD_VALUE = 5'h2;

localparam HSSI_ADAPT_RX_RXFIFO_PFULL_VALUE = 5'd5;
localparam HSSI_ADAPT_RX_RXFIFO_PFULL_ADDR_OFST = 536;
localparam HSSI_ADAPT_RX_RXFIFO_PFULL_ADDR_FIELD_OFST = 1;
localparam HSSI_ADAPT_RX_RXFIFO_PFULL_ADDR_FIELD_HIGH = 5;
localparam HSSI_ADAPT_RX_RXFIFO_PFULL_ADDR_FIELD_SIZE = 5;
localparam HSSI_ADAPT_RX_RXFIFO_PFULL_ADDR_FIELD_BITMASK = 32'h0000003E;
localparam HSSI_ADAPT_RX_RXFIFO_PFULL_ADDR_FIELD_VALMASK = 32'h0000000A;
localparam HSSI_ADAPT_RX_RXFIFO_PFULL_ADDR_FIELD_VALUE = 5'h5;

localparam HSSI_ADAPT_RX_RXFIFORD_POST_CT_SEL_VALUE = "rxfiford_sclk_post_ct";
localparam HSSI_ADAPT_RX_RXFIFORD_POST_CT_SEL_ADDR_OFST = 551;
localparam HSSI_ADAPT_RX_RXFIFORD_POST_CT_SEL_ADDR_FIELD_OFST = 6;
localparam HSSI_ADAPT_RX_RXFIFORD_POST_CT_SEL_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_RX_RXFIFORD_POST_CT_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RXFIFORD_POST_CT_SEL_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_ADAPT_RX_RXFIFORD_POST_CT_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RXFIFORD_POST_CT_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_RXFIFORD_TO_AIB_SEL_VALUE = "rxfiford_sclk_to_aib";
localparam HSSI_ADAPT_RX_RXFIFORD_TO_AIB_SEL_ADDR_OFST = 547;
localparam HSSI_ADAPT_RX_RXFIFORD_TO_AIB_SEL_ADDR_FIELD_OFST = 7;
localparam HSSI_ADAPT_RX_RXFIFORD_TO_AIB_SEL_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_RXFIFORD_TO_AIB_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RXFIFORD_TO_AIB_SEL_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_ADAPT_RX_RXFIFORD_TO_AIB_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RXFIFORD_TO_AIB_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_RXFIFOWR_POST_CT_SEL_VALUE = "rxfifowr_sclk_post_ct";
localparam HSSI_ADAPT_RX_RXFIFOWR_POST_CT_SEL_ADDR_OFST = 551;
localparam HSSI_ADAPT_RX_RXFIFOWR_POST_CT_SEL_ADDR_FIELD_OFST = 5;
localparam HSSI_ADAPT_RX_RXFIFOWR_POST_CT_SEL_ADDR_FIELD_HIGH = 5;
localparam HSSI_ADAPT_RX_RXFIFOWR_POST_CT_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RXFIFOWR_POST_CT_SEL_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_ADAPT_RX_RXFIFOWR_POST_CT_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RXFIFOWR_POST_CT_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_RXFIFOWR_PRE_CT_SEL_VALUE = "rxfifowr_sclk_pre_ct";
localparam HSSI_ADAPT_RX_RXFIFOWR_PRE_CT_SEL_ADDR_OFST = 551;
localparam HSSI_ADAPT_RX_RXFIFOWR_PRE_CT_SEL_ADDR_FIELD_OFST = 4;
localparam HSSI_ADAPT_RX_RXFIFOWR_PRE_CT_SEL_ADDR_FIELD_HIGH = 4;
localparam HSSI_ADAPT_RX_RXFIFOWR_PRE_CT_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_RXFIFOWR_PRE_CT_SEL_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_ADAPT_RX_RXFIFOWR_PRE_CT_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_RXFIFOWR_PRE_CT_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_HD_HSSIADAPT_SPEED_GRADE_VALUE = "dash_2";

localparam HSSI_ADAPT_RX_STRETCH_NUM_STAGES_VALUE = "seven_stage";
localparam HSSI_ADAPT_RX_STRETCH_NUM_STAGES_ADDR_OFST = 545;
localparam HSSI_ADAPT_RX_STRETCH_NUM_STAGES_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_RX_STRETCH_NUM_STAGES_ADDR_FIELD_HIGH = 2;
localparam HSSI_ADAPT_RX_STRETCH_NUM_STAGES_ADDR_FIELD_SIZE = 3;
localparam HSSI_ADAPT_RX_STRETCH_NUM_STAGES_ADDR_FIELD_BITMASK = 32'h00000007;
localparam HSSI_ADAPT_RX_STRETCH_NUM_STAGES_ADDR_FIELD_VALMASK = 32'h00000007;
localparam HSSI_ADAPT_RX_STRETCH_NUM_STAGES_ADDR_FIELD_VALUE = 3'h7;

localparam HSSI_ADAPT_RX_SUP_MODE_VALUE = "user_mode";

localparam HSSI_ADAPT_RX_TXEQ_CLK_SCG_EN_VALUE = "enable";
localparam HSSI_ADAPT_RX_TXEQ_CLK_SCG_EN_ADDR_OFST = 549;
localparam HSSI_ADAPT_RX_TXEQ_CLK_SCG_EN_ADDR_FIELD_OFST = 3;
localparam HSSI_ADAPT_RX_TXEQ_CLK_SCG_EN_ADDR_FIELD_HIGH = 3;
localparam HSSI_ADAPT_RX_TXEQ_CLK_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_TXEQ_CLK_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_ADAPT_RX_TXEQ_CLK_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000008;
localparam HSSI_ADAPT_RX_TXEQ_CLK_SCG_EN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_RX_TXEQ_CLK_SEL_VALUE = "txeq_pld_pcs_rx_clk_out";
localparam HSSI_ADAPT_RX_TXEQ_CLK_SEL_ADDR_OFST = 549;
localparam HSSI_ADAPT_RX_TXEQ_CLK_SEL_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_RX_TXEQ_CLK_SEL_ADDR_FIELD_HIGH = 0;
localparam HSSI_ADAPT_RX_TXEQ_CLK_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_TXEQ_CLK_SEL_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_ADAPT_RX_TXEQ_CLK_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_TXEQ_CLK_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_TXEQ_MODE_VALUE = "eq_disable";

localparam HSSI_ADAPT_RX_TXEQ_RST_SEL_VALUE = "txeq_pcs_rx_pld_rst_n";
localparam HSSI_ADAPT_RX_TXEQ_RST_SEL_ADDR_OFST = 550;
localparam HSSI_ADAPT_RX_TXEQ_RST_SEL_ADDR_FIELD_OFST = 1;
localparam HSSI_ADAPT_RX_TXEQ_RST_SEL_ADDR_FIELD_HIGH = 1;
localparam HSSI_ADAPT_RX_TXEQ_RST_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_TXEQ_RST_SEL_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_ADAPT_RX_TXEQ_RST_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_TXEQ_RST_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_TXFIFORD_POST_CT_SEL_VALUE = "txfiford_sclk_post_ct";
localparam HSSI_ADAPT_RX_TXFIFORD_POST_CT_SEL_ADDR_OFST = 546;
localparam HSSI_ADAPT_RX_TXFIFORD_POST_CT_SEL_ADDR_FIELD_OFST = 4;
localparam HSSI_ADAPT_RX_TXFIFORD_POST_CT_SEL_ADDR_FIELD_HIGH = 4;
localparam HSSI_ADAPT_RX_TXFIFORD_POST_CT_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_TXFIFORD_POST_CT_SEL_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_ADAPT_RX_TXFIFORD_POST_CT_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_TXFIFORD_POST_CT_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_TXFIFORD_PRE_CT_SEL_VALUE = "txfiford_sclk_pre_ct";
localparam HSSI_ADAPT_RX_TXFIFORD_PRE_CT_SEL_ADDR_OFST = 546;
localparam HSSI_ADAPT_RX_TXFIFORD_PRE_CT_SEL_ADDR_FIELD_OFST = 3;
localparam HSSI_ADAPT_RX_TXFIFORD_PRE_CT_SEL_ADDR_FIELD_HIGH = 3;
localparam HSSI_ADAPT_RX_TXFIFORD_PRE_CT_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_TXFIFORD_PRE_CT_SEL_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_ADAPT_RX_TXFIFORD_PRE_CT_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_TXFIFORD_PRE_CT_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_TXFIFOWR_FROM_AIB_SEL_VALUE = "txfifowr_sclk_from_aib";
localparam HSSI_ADAPT_RX_TXFIFOWR_FROM_AIB_SEL_ADDR_OFST = 546;
localparam HSSI_ADAPT_RX_TXFIFOWR_FROM_AIB_SEL_ADDR_FIELD_OFST = 7;
localparam HSSI_ADAPT_RX_TXFIFOWR_FROM_AIB_SEL_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_TXFIFOWR_FROM_AIB_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_TXFIFOWR_FROM_AIB_SEL_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_ADAPT_RX_TXFIFOWR_FROM_AIB_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_TXFIFOWR_FROM_AIB_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_TXFIFOWR_POST_CT_SEL_VALUE = "txfifowr_sclk_post_ct";
localparam HSSI_ADAPT_RX_TXFIFOWR_POST_CT_SEL_ADDR_OFST = 546;
localparam HSSI_ADAPT_RX_TXFIFOWR_POST_CT_SEL_ADDR_FIELD_OFST = 5;
localparam HSSI_ADAPT_RX_TXFIFOWR_POST_CT_SEL_ADDR_FIELD_HIGH = 5;
localparam HSSI_ADAPT_RX_TXFIFOWR_POST_CT_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_TXFIFOWR_POST_CT_SEL_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_ADAPT_RX_TXFIFOWR_POST_CT_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_TXFIFOWR_POST_CT_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_US_BYPASS_PIPELN_VALUE = "us_bypass_pipeln_dis";
localparam HSSI_ADAPT_RX_US_BYPASS_PIPELN_ADDR_OFST = 535;
localparam HSSI_ADAPT_RX_US_BYPASS_PIPELN_ADDR_FIELD_OFST = 2;
localparam HSSI_ADAPT_RX_US_BYPASS_PIPELN_ADDR_FIELD_HIGH = 2;
localparam HSSI_ADAPT_RX_US_BYPASS_PIPELN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_US_BYPASS_PIPELN_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_ADAPT_RX_US_BYPASS_PIPELN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_RX_US_BYPASS_PIPELN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_RX_WORD_ALIGN_ENABLE_VALUE = "enable";

localparam HSSI_ADAPT_RX_WORD_MARK_VALUE = "wm_en";
localparam HSSI_ADAPT_RX_WORD_MARK_ADDR_OFST = 530;
localparam HSSI_ADAPT_RX_WORD_MARK_ADDR_FIELD_OFST = 7;
localparam HSSI_ADAPT_RX_WORD_MARK_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_RX_WORD_MARK_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_RX_WORD_MARK_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_ADAPT_RX_WORD_MARK_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_ADAPT_RX_WORD_MARK_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_RX_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam HSSI_ADAPT_TX_AIB_CLK_SEL_VALUE = "aib_clk_pma_aib_tx_clk";
localparam HSSI_ADAPT_TX_AIB_CLK_SEL_ADDR_OFST = 524;
localparam HSSI_ADAPT_TX_AIB_CLK_SEL_ADDR_FIELD_OFST = 3;
localparam HSSI_ADAPT_TX_AIB_CLK_SEL_ADDR_FIELD_HIGH = 4;
localparam HSSI_ADAPT_TX_AIB_CLK_SEL_ADDR_FIELD_SIZE = 2;
localparam HSSI_ADAPT_TX_AIB_CLK_SEL_ADDR_FIELD_BITMASK = 32'h00000018;
localparam HSSI_ADAPT_TX_AIB_CLK_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_AIB_CLK_SEL_ADDR_FIELD_VALUE = 2'h0;

localparam HSSI_ADAPT_TX_HD_HSSIADAPT_AIB_HSSI_PLD_SCLK_HZ_VALUE = 31'd0;

localparam HSSI_ADAPT_TX_HD_HSSIADAPT_AIB_HSSI_TX_TRANSFER_CLK_HZ_VALUE = 31'd644531250;

localparam HSSI_ADAPT_TX_BONDING_DFT_EN_VALUE = "dft_dis";
localparam HSSI_ADAPT_TX_BONDING_DFT_EN_ADDR_OFST = 519;
localparam HSSI_ADAPT_TX_BONDING_DFT_EN_ADDR_FIELD_OFST = 6;
localparam HSSI_ADAPT_TX_BONDING_DFT_EN_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_TX_BONDING_DFT_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_BONDING_DFT_EN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_ADAPT_TX_BONDING_DFT_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_BONDING_DFT_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_BONDING_DFT_VAL_VALUE = "dft_0";
localparam HSSI_ADAPT_TX_BONDING_DFT_VAL_ADDR_OFST = 519;
localparam HSSI_ADAPT_TX_BONDING_DFT_VAL_ADDR_FIELD_OFST = 7;
localparam HSSI_ADAPT_TX_BONDING_DFT_VAL_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_TX_BONDING_DFT_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_BONDING_DFT_VAL_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_ADAPT_TX_BONDING_DFT_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_BONDING_DFT_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_CHNL_BONDING_VALUE = "disable";

localparam HSSI_ADAPT_TX_HD_HSSIADAPT_CSR_CLK_HZ_VALUE = 31'd0;

localparam HSSI_ADAPT_TX_CTRL_PLANE_BONDING_VALUE = "individual";

localparam HSSI_ADAPT_TX_DATAPATH_MAPPING_MODE_VALUE = "map_10g_2x2x_2x1x_fifo";
localparam HSSI_ADAPT_TX_DATAPATH_MAPPING_MODE_ADDR_OFST = 512;
localparam HSSI_ADAPT_TX_DATAPATH_MAPPING_MODE_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_TX_DATAPATH_MAPPING_MODE_ADDR_FIELD_HIGH = 4;
localparam HSSI_ADAPT_TX_DATAPATH_MAPPING_MODE_ADDR_FIELD_SIZE = 5;
localparam HSSI_ADAPT_TX_DATAPATH_MAPPING_MODE_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam HSSI_ADAPT_TX_DATAPATH_MAPPING_MODE_ADDR_FIELD_VALMASK = 32'h00000007;
localparam HSSI_ADAPT_TX_DATAPATH_MAPPING_MODE_ADDR_FIELD_VALUE = 5'h7;

localparam HSSI_ADAPT_TX_DS_BYPASS_PIPELN_VALUE = "ds_bypass_pipeln_dis";
localparam HSSI_ADAPT_TX_DS_BYPASS_PIPELN_ADDR_OFST = 519;
localparam HSSI_ADAPT_TX_DS_BYPASS_PIPELN_ADDR_FIELD_OFST = 3;
localparam HSSI_ADAPT_TX_DS_BYPASS_PIPELN_ADDR_FIELD_HIGH = 3;
localparam HSSI_ADAPT_TX_DS_BYPASS_PIPELN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_DS_BYPASS_PIPELN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_ADAPT_TX_DS_BYPASS_PIPELN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_DS_BYPASS_PIPELN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_DUPLEX_MODE_VALUE = "enable";

localparam HSSI_ADAPT_TX_DV_GATING_VALUE = "disable";
localparam HSSI_ADAPT_TX_DV_GATING_ADDR_OFST = 517;
localparam HSSI_ADAPT_TX_DV_GATING_ADDR_FIELD_OFST = 5;
localparam HSSI_ADAPT_TX_DV_GATING_ADDR_FIELD_HIGH = 5;
localparam HSSI_ADAPT_TX_DV_GATING_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_DV_GATING_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_ADAPT_TX_DV_GATING_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_DV_GATING_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_DYN_CLK_SW_EN_VALUE = "disable";
localparam HSSI_ADAPT_TX_DYN_CLK_SW_EN_ADDR_OFST = 524;
localparam HSSI_ADAPT_TX_DYN_CLK_SW_EN_ADDR_FIELD_OFST = 2;
localparam HSSI_ADAPT_TX_DYN_CLK_SW_EN_ADDR_FIELD_HIGH = 2;
localparam HSSI_ADAPT_TX_DYN_CLK_SW_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_DYN_CLK_SW_EN_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_ADAPT_TX_DYN_CLK_SW_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_DYN_CLK_SW_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_FIFO_DOUBLE_READ_VALUE = "fifo_double_read_en";
localparam HSSI_ADAPT_TX_FIFO_DOUBLE_READ_ADDR_OFST = 516;
localparam HSSI_ADAPT_TX_FIFO_DOUBLE_READ_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_TX_FIFO_DOUBLE_READ_ADDR_FIELD_HIGH = 0;
localparam HSSI_ADAPT_TX_FIFO_DOUBLE_READ_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_FIFO_DOUBLE_READ_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_ADAPT_TX_FIFO_DOUBLE_READ_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_ADAPT_TX_FIFO_DOUBLE_READ_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_TX_FIFO_MODE_VALUE = "phase_comp";

localparam HSSI_ADAPT_TX_FIFO_RD_CLK_SCG_EN_VALUE = "disable";
localparam HSSI_ADAPT_TX_FIFO_RD_CLK_SCG_EN_ADDR_OFST = 524;
localparam HSSI_ADAPT_TX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_OFST = 6;
localparam HSSI_ADAPT_TX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_TX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_ADAPT_TX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_FIFO_RD_CLK_SEL_VALUE = "fifo_rd_pld_pcs_tx_clk_out";
localparam HSSI_ADAPT_TX_FIFO_RD_CLK_SEL_ADDR_OFST = 524;
localparam HSSI_ADAPT_TX_FIFO_RD_CLK_SEL_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_TX_FIFO_RD_CLK_SEL_ADDR_FIELD_HIGH = 1;
localparam HSSI_ADAPT_TX_FIFO_RD_CLK_SEL_ADDR_FIELD_SIZE = 2;
localparam HSSI_ADAPT_TX_FIFO_RD_CLK_SEL_ADDR_FIELD_BITMASK = 32'h00000003;
localparam HSSI_ADAPT_TX_FIFO_RD_CLK_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_FIFO_RD_CLK_SEL_ADDR_FIELD_VALUE = 2'h0;

localparam HSSI_ADAPT_TX_FIFO_READY_BYPASS_VALUE = "disable";
localparam HSSI_ADAPT_TX_FIFO_READY_BYPASS_ADDR_OFST = 519;
localparam HSSI_ADAPT_TX_FIFO_READY_BYPASS_ADDR_FIELD_OFST = 2;
localparam HSSI_ADAPT_TX_FIFO_READY_BYPASS_ADDR_FIELD_HIGH = 2;
localparam HSSI_ADAPT_TX_FIFO_READY_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_FIFO_READY_BYPASS_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_ADAPT_TX_FIFO_READY_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_FIFO_READY_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_FIFO_STOP_RD_VALUE = "rd_empty";
localparam HSSI_ADAPT_TX_FIFO_STOP_RD_ADDR_OFST = 516;
localparam HSSI_ADAPT_TX_FIFO_STOP_RD_ADDR_FIELD_OFST = 1;
localparam HSSI_ADAPT_TX_FIFO_STOP_RD_ADDR_FIELD_HIGH = 1;
localparam HSSI_ADAPT_TX_FIFO_STOP_RD_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_FIFO_STOP_RD_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_ADAPT_TX_FIFO_STOP_RD_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_FIFO_STOP_RD_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_FIFO_STOP_WR_VALUE = "wr_full";
localparam HSSI_ADAPT_TX_FIFO_STOP_WR_ADDR_OFST = 516;
localparam HSSI_ADAPT_TX_FIFO_STOP_WR_ADDR_FIELD_OFST = 2;
localparam HSSI_ADAPT_TX_FIFO_STOP_WR_ADDR_FIELD_HIGH = 2;
localparam HSSI_ADAPT_TX_FIFO_STOP_WR_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_FIFO_STOP_WR_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_ADAPT_TX_FIFO_STOP_WR_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_FIFO_STOP_WR_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_FIFO_WIDTH_VALUE = "fifo_double_width";

localparam HSSI_ADAPT_TX_FIFO_WR_CLK_SCG_EN_VALUE = "disable";
localparam HSSI_ADAPT_TX_FIFO_WR_CLK_SCG_EN_ADDR_OFST = 524;
localparam HSSI_ADAPT_TX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_OFST = 5;
localparam HSSI_ADAPT_TX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_HIGH = 5;
localparam HSSI_ADAPT_TX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_ADAPT_TX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_FREE_RUN_DIV_CLK_VALUE = "out_of_reset_sync";
localparam HSSI_ADAPT_TX_FREE_RUN_DIV_CLK_ADDR_OFST = 526;
localparam HSSI_ADAPT_TX_FREE_RUN_DIV_CLK_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_TX_FREE_RUN_DIV_CLK_ADDR_FIELD_HIGH = 0;
localparam HSSI_ADAPT_TX_FREE_RUN_DIV_CLK_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_FREE_RUN_DIV_CLK_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_ADAPT_TX_FREE_RUN_DIV_CLK_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_FREE_RUN_DIV_CLK_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT0_RST_VAL_VALUE = "reset_to_one_hfsrin0";
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT0_RST_VAL_ADDR_OFST = 522;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT0_RST_VAL_ADDR_FIELD_OFST = 1;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT0_RST_VAL_ADDR_FIELD_HIGH = 1;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT0_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT0_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT0_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT0_RST_VAL_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT1_RST_VAL_VALUE = "reset_to_one_hfsrin1";
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT1_RST_VAL_ADDR_OFST = 522;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT1_RST_VAL_ADDR_FIELD_OFST = 2;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT1_RST_VAL_ADDR_FIELD_HIGH = 2;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT1_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT1_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT1_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT1_RST_VAL_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT2_RST_VAL_VALUE = "reset_to_one_hfsrin2";
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT2_RST_VAL_ADDR_OFST = 522;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT2_RST_VAL_ADDR_FIELD_OFST = 3;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT2_RST_VAL_ADDR_FIELD_HIGH = 3;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT2_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT2_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT2_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000008;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT2_RST_VAL_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT3_RST_VAL_VALUE = "reset_to_zero_hfsrin3";
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT3_RST_VAL_ADDR_OFST = 522;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT3_RST_VAL_ADDR_FIELD_OFST = 4;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT3_RST_VAL_ADDR_FIELD_HIGH = 4;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT3_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT3_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT3_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_IN_BIT3_RST_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT0_RST_VAL_VALUE = "reset_to_one_hfsrout0";
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT0_RST_VAL_ADDR_OFST = 522;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT0_RST_VAL_ADDR_FIELD_OFST = 6;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT0_RST_VAL_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT0_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT0_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT0_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT0_RST_VAL_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT1_RST_VAL_VALUE = "reset_to_one_hfsrout1";
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT1_RST_VAL_ADDR_OFST = 522;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT1_RST_VAL_ADDR_FIELD_OFST = 7;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT1_RST_VAL_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT1_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT1_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT1_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT1_RST_VAL_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT2_RST_VAL_VALUE = "reset_to_zero_hfsrout2";
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT2_RST_VAL_ADDR_OFST = 523;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT2_RST_VAL_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT2_RST_VAL_ADDR_FIELD_HIGH = 0;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT2_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT2_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT2_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT2_RST_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT3_RST_VAL_VALUE = "reset_to_zero_hfsrout3";
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT3_RST_VAL_ADDR_OFST = 523;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT3_RST_VAL_ADDR_FIELD_OFST = 1;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT3_RST_VAL_ADDR_FIELD_HIGH = 1;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT3_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT3_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT3_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_FSR_HIP_FSR_OUT_BIT3_RST_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_FSR_MASK_TX_PLL_RST_VAL_VALUE = "reset_to_zero_maskpll";
localparam HSSI_ADAPT_TX_FSR_MASK_TX_PLL_RST_VAL_ADDR_OFST = 522;
localparam HSSI_ADAPT_TX_FSR_MASK_TX_PLL_RST_VAL_ADDR_FIELD_OFST = 5;
localparam HSSI_ADAPT_TX_FSR_MASK_TX_PLL_RST_VAL_ADDR_FIELD_HIGH = 5;
localparam HSSI_ADAPT_TX_FSR_MASK_TX_PLL_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_FSR_MASK_TX_PLL_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_ADAPT_TX_FSR_MASK_TX_PLL_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_FSR_MASK_TX_PLL_RST_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_FSR_PLD_TXELECIDLE_RST_VAL_VALUE = "reset_to_zero_txelec";
localparam HSSI_ADAPT_TX_FSR_PLD_TXELECIDLE_RST_VAL_ADDR_OFST = 522;
localparam HSSI_ADAPT_TX_FSR_PLD_TXELECIDLE_RST_VAL_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_TX_FSR_PLD_TXELECIDLE_RST_VAL_ADDR_FIELD_HIGH = 0;
localparam HSSI_ADAPT_TX_FSR_PLD_TXELECIDLE_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_FSR_PLD_TXELECIDLE_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_ADAPT_TX_FSR_PLD_TXELECIDLE_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_FSR_PLD_TXELECIDLE_RST_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_HD_HSSIADAPT_HIP_AIB_CLK_2X_HZ_VALUE = 31'd0;

localparam HSSI_ADAPT_TX_HD_HSSIADAPT_HIP_AIB_CLK_HZ_VALUE = 31'd0;

localparam HSSI_ADAPT_TX_HD_HSSIADAPT_HIP_AIB_TXEQ_CLK_OUT_HZ_VALUE = 31'd0;

localparam HSSI_ADAPT_TX_HIP_MODE_VALUE = "disable_hip";

localparam HSSI_ADAPT_TX_HIP_OSC_CLK_SCG_EN_VALUE = "enable";
localparam HSSI_ADAPT_TX_HIP_OSC_CLK_SCG_EN_ADDR_OFST = 525;
localparam HSSI_ADAPT_TX_HIP_OSC_CLK_SCG_EN_ADDR_FIELD_OFST = 1;
localparam HSSI_ADAPT_TX_HIP_OSC_CLK_SCG_EN_ADDR_FIELD_HIGH = 1;
localparam HSSI_ADAPT_TX_HIP_OSC_CLK_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_HIP_OSC_CLK_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_ADAPT_TX_HIP_OSC_CLK_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_ADAPT_TX_HIP_OSC_CLK_SCG_EN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_TX_HRDRST_ALIGN_BYPASS_VALUE = "enable";
localparam HSSI_ADAPT_TX_HRDRST_ALIGN_BYPASS_ADDR_OFST = 526;
localparam HSSI_ADAPT_TX_HRDRST_ALIGN_BYPASS_ADDR_FIELD_OFST = 4;
localparam HSSI_ADAPT_TX_HRDRST_ALIGN_BYPASS_ADDR_FIELD_HIGH = 4;
localparam HSSI_ADAPT_TX_HRDRST_ALIGN_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_HRDRST_ALIGN_BYPASS_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_ADAPT_TX_HRDRST_ALIGN_BYPASS_ADDR_FIELD_VALMASK = 32'h00000010;
localparam HSSI_ADAPT_TX_HRDRST_ALIGN_BYPASS_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_TX_HRDRST_DCD_CAL_DONE_BYPASS_VALUE = "disable";
localparam HSSI_ADAPT_TX_HRDRST_DCD_CAL_DONE_BYPASS_ADDR_OFST = 526;
localparam HSSI_ADAPT_TX_HRDRST_DCD_CAL_DONE_BYPASS_ADDR_FIELD_OFST = 2;
localparam HSSI_ADAPT_TX_HRDRST_DCD_CAL_DONE_BYPASS_ADDR_FIELD_HIGH = 2;
localparam HSSI_ADAPT_TX_HRDRST_DCD_CAL_DONE_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_HRDRST_DCD_CAL_DONE_BYPASS_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_ADAPT_TX_HRDRST_DCD_CAL_DONE_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_HRDRST_DCD_CAL_DONE_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_HRDRST_DLL_LOCK_BYPASS_VALUE = "disable";
localparam HSSI_ADAPT_TX_HRDRST_DLL_LOCK_BYPASS_ADDR_OFST = 526;
localparam HSSI_ADAPT_TX_HRDRST_DLL_LOCK_BYPASS_ADDR_FIELD_OFST = 3;
localparam HSSI_ADAPT_TX_HRDRST_DLL_LOCK_BYPASS_ADDR_FIELD_HIGH = 3;
localparam HSSI_ADAPT_TX_HRDRST_DLL_LOCK_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_HRDRST_DLL_LOCK_BYPASS_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_ADAPT_TX_HRDRST_DLL_LOCK_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_HRDRST_DLL_LOCK_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_HRDRST_RX_OSC_CLK_SCG_EN_VALUE = "disable";
localparam HSSI_ADAPT_TX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_OFST = 525;
localparam HSSI_ADAPT_TX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_TX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_HIGH = 0;
localparam HSSI_ADAPT_TX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_ADAPT_TX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_HRDRST_USER_CTL_EN_VALUE = "disable";
localparam HSSI_ADAPT_TX_HRDRST_USER_CTL_EN_ADDR_OFST = 526;
localparam HSSI_ADAPT_TX_HRDRST_USER_CTL_EN_ADDR_FIELD_OFST = 6;
localparam HSSI_ADAPT_TX_HRDRST_USER_CTL_EN_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_TX_HRDRST_USER_CTL_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_HRDRST_USER_CTL_EN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_ADAPT_TX_HRDRST_USER_CTL_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_HRDRST_USER_CTL_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_INDV_VALUE = "indv_en";
localparam HSSI_ADAPT_TX_INDV_ADDR_OFST = 514;
localparam HSSI_ADAPT_TX_INDV_ADDR_FIELD_OFST = 7;
localparam HSSI_ADAPT_TX_INDV_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_TX_INDV_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_INDV_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_ADAPT_TX_INDV_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_ADAPT_TX_INDV_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_TX_LOOPBACK_MODE_VALUE = "loopback_disable";

localparam HSSI_ADAPT_TX_OSC_CLK_SCG_EN_VALUE = "disable";
localparam HSSI_ADAPT_TX_OSC_CLK_SCG_EN_ADDR_OFST = 524;
localparam HSSI_ADAPT_TX_OSC_CLK_SCG_EN_ADDR_FIELD_OFST = 7;
localparam HSSI_ADAPT_TX_OSC_CLK_SCG_EN_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_TX_OSC_CLK_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_OSC_CLK_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_ADAPT_TX_OSC_CLK_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_OSC_CLK_SCG_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_PHCOMP_RD_DEL_VALUE = "phcomp_rd_del2";
localparam HSSI_ADAPT_TX_PHCOMP_RD_DEL_ADDR_OFST = 515;
localparam HSSI_ADAPT_TX_PHCOMP_RD_DEL_ADDR_FIELD_OFST = 5;
localparam HSSI_ADAPT_TX_PHCOMP_RD_DEL_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_TX_PHCOMP_RD_DEL_ADDR_FIELD_SIZE = 3;
localparam HSSI_ADAPT_TX_PHCOMP_RD_DEL_ADDR_FIELD_BITMASK = 32'h000000E0;
localparam HSSI_ADAPT_TX_PHCOMP_RD_DEL_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_ADAPT_TX_PHCOMP_RD_DEL_ADDR_FIELD_VALUE = 3'h2;

localparam HSSI_ADAPT_TX_PIPE_MODE_VALUE = "disable_pipe";

localparam HSSI_ADAPT_TX_HD_HSSIADAPT_PLD_PCS_TX_CLK_OUT_HZ_VALUE = 31'd322265625;

localparam HSSI_ADAPT_TX_HD_HSSIADAPT_PLD_PMA_HCLK_HZ_VALUE = 31'd0;

localparam HSSI_ADAPT_TX_PMA_AIB_TX_CLK_EXPECTED_SETTING_VALUE = "x2";

localparam HSSI_ADAPT_TX_HD_HSSIADAPT_PMA_AIB_TX_CLK_HZ_VALUE = 31'd0;

localparam HSSI_ADAPT_TX_POWERDOWN_MODE_VALUE = "powerup";

localparam HSSI_ADAPT_TX_PRESETHINT_BYPASS_VALUE = "enable";
localparam HSSI_ADAPT_TX_PRESETHINT_BYPASS_ADDR_OFST = 526;
localparam HSSI_ADAPT_TX_PRESETHINT_BYPASS_ADDR_FIELD_OFST = 5;
localparam HSSI_ADAPT_TX_PRESETHINT_BYPASS_ADDR_FIELD_HIGH = 5;
localparam HSSI_ADAPT_TX_PRESETHINT_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_PRESETHINT_BYPASS_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_ADAPT_TX_PRESETHINT_BYPASS_ADDR_FIELD_VALMASK = 32'h00000020;
localparam HSSI_ADAPT_TX_PRESETHINT_BYPASS_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_TX_QPI_SR_ENABLE_VALUE = "enable";
localparam HSSI_ADAPT_TX_QPI_SR_ENABLE_ADDR_OFST = 513;
localparam HSSI_ADAPT_TX_QPI_SR_ENABLE_ADDR_FIELD_OFST = 2;
localparam HSSI_ADAPT_TX_QPI_SR_ENABLE_ADDR_FIELD_HIGH = 2;
localparam HSSI_ADAPT_TX_QPI_SR_ENABLE_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_QPI_SR_ENABLE_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_ADAPT_TX_QPI_SR_ENABLE_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_ADAPT_TX_QPI_SR_ENABLE_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_TX_RXQPI_PULLUP_RST_VAL_VALUE = "reset_to_zero_rxqpi";
localparam HSSI_ADAPT_TX_RXQPI_PULLUP_RST_VAL_ADDR_OFST = 512;
localparam HSSI_ADAPT_TX_RXQPI_PULLUP_RST_VAL_ADDR_FIELD_OFST = 6;
localparam HSSI_ADAPT_TX_RXQPI_PULLUP_RST_VAL_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_TX_RXQPI_PULLUP_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_RXQPI_PULLUP_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_ADAPT_TX_RXQPI_PULLUP_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_RXQPI_PULLUP_RST_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_HD_HSSIADAPT_SPEED_GRADE_VALUE = "dash_2";

localparam HSSI_ADAPT_TX_STRETCH_NUM_STAGES_VALUE = "seven_stage";
localparam HSSI_ADAPT_TX_STRETCH_NUM_STAGES_ADDR_OFST = 521;
localparam HSSI_ADAPT_TX_STRETCH_NUM_STAGES_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_TX_STRETCH_NUM_STAGES_ADDR_FIELD_HIGH = 2;
localparam HSSI_ADAPT_TX_STRETCH_NUM_STAGES_ADDR_FIELD_SIZE = 3;
localparam HSSI_ADAPT_TX_STRETCH_NUM_STAGES_ADDR_FIELD_BITMASK = 32'h00000007;
localparam HSSI_ADAPT_TX_STRETCH_NUM_STAGES_ADDR_FIELD_VALMASK = 32'h00000007;
localparam HSSI_ADAPT_TX_STRETCH_NUM_STAGES_ADDR_FIELD_VALUE = 3'h7;

localparam HSSI_ADAPT_TX_SUP_MODE_VALUE = "user_mode";

localparam HSSI_ADAPT_TX_TX_DATAPATH_TB_SEL_VALUE = "cp_bond";
localparam HSSI_ADAPT_TX_TX_DATAPATH_TB_SEL_ADDR_OFST = 521;
localparam HSSI_ADAPT_TX_TX_DATAPATH_TB_SEL_ADDR_FIELD_OFST = 3;
localparam HSSI_ADAPT_TX_TX_DATAPATH_TB_SEL_ADDR_FIELD_HIGH = 5;
localparam HSSI_ADAPT_TX_TX_DATAPATH_TB_SEL_ADDR_FIELD_SIZE = 3;
localparam HSSI_ADAPT_TX_TX_DATAPATH_TB_SEL_ADDR_FIELD_BITMASK = 32'h00000038;
localparam HSSI_ADAPT_TX_TX_DATAPATH_TB_SEL_ADDR_FIELD_VALMASK = 32'h00000018;
localparam HSSI_ADAPT_TX_TX_DATAPATH_TB_SEL_ADDR_FIELD_VALUE = 3'h3;

localparam HSSI_ADAPT_TX_TX_FASTBOND_WREN_VALUE = "wren_ds_del2_us_del2";
localparam HSSI_ADAPT_TX_TX_FASTBOND_WREN_ADDR_OFST = 520;
localparam HSSI_ADAPT_TX_TX_FASTBOND_WREN_ADDR_FIELD_OFST = 3;
localparam HSSI_ADAPT_TX_TX_FASTBOND_WREN_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_TX_TX_FASTBOND_WREN_ADDR_FIELD_SIZE = 5;
localparam HSSI_ADAPT_TX_TX_FASTBOND_WREN_ADDR_FIELD_BITMASK = 32'h000000F8;
localparam HSSI_ADAPT_TX_TX_FASTBOND_WREN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_TX_FASTBOND_WREN_ADDR_FIELD_VALUE = 5'h0;

localparam HSSI_ADAPT_TX_TX_FIFO_POWER_MODE_VALUE = "full_width_full_depth";
localparam HSSI_ADAPT_TX_TX_FIFO_POWER_MODE_ADDR_OFST = 520;
localparam HSSI_ADAPT_TX_TX_FIFO_POWER_MODE_ADDR_FIELD_OFST = 1;
localparam HSSI_ADAPT_TX_TX_FIFO_POWER_MODE_ADDR_FIELD_HIGH = 2;
localparam HSSI_ADAPT_TX_TX_FIFO_POWER_MODE_ADDR_FIELD_SIZE = 2;
localparam HSSI_ADAPT_TX_TX_FIFO_POWER_MODE_ADDR_FIELD_BITMASK = 32'h00000006;
localparam HSSI_ADAPT_TX_TX_FIFO_POWER_MODE_ADDR_FIELD_VALMASK = 32'h00000006;
localparam HSSI_ADAPT_TX_TX_FIFO_POWER_MODE_ADDR_FIELD_VALUE = 2'h3;

localparam HSSI_ADAPT_TX_TX_FIFO_READ_LATENCY_ADJUST_VALUE = "disable";
localparam HSSI_ADAPT_TX_TX_FIFO_READ_LATENCY_ADJUST_ADDR_OFST = 521;
localparam HSSI_ADAPT_TX_TX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_OFST = 7;
localparam HSSI_ADAPT_TX_TX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_TX_TX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_TX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_ADAPT_TX_TX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_TX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_TX_FIFO_WRITE_LATENCY_ADJUST_VALUE = "disable";
localparam HSSI_ADAPT_TX_TX_FIFO_WRITE_LATENCY_ADJUST_ADDR_OFST = 521;
localparam HSSI_ADAPT_TX_TX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_OFST = 6;
localparam HSSI_ADAPT_TX_TX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_TX_TX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_TX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_ADAPT_TX_TX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_TX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_TX_OSC_CLOCK_SETTING_VALUE = "osc_clk_div_by1";

localparam HSSI_ADAPT_TX_TX_QPI_MODE_EN_VALUE = "disable";
localparam HSSI_ADAPT_TX_TX_QPI_MODE_EN_ADDR_OFST = 512;
localparam HSSI_ADAPT_TX_TX_QPI_MODE_EN_ADDR_FIELD_OFST = 5;
localparam HSSI_ADAPT_TX_TX_QPI_MODE_EN_ADDR_FIELD_HIGH = 5;
localparam HSSI_ADAPT_TX_TX_QPI_MODE_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_TX_QPI_MODE_EN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_ADAPT_TX_TX_QPI_MODE_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_TX_QPI_MODE_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_TX_REV_LPBK_VALUE = "disable";
localparam HSSI_ADAPT_TX_TX_REV_LPBK_ADDR_OFST = 517;
localparam HSSI_ADAPT_TX_TX_REV_LPBK_ADDR_FIELD_OFST = 6;
localparam HSSI_ADAPT_TX_TX_REV_LPBK_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_TX_TX_REV_LPBK_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_TX_REV_LPBK_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_ADAPT_TX_TX_REV_LPBK_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_TX_REV_LPBK_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_TX_USERTEST_SEL_VALUE = "enable";
localparam HSSI_ADAPT_TX_TX_USERTEST_SEL_ADDR_OFST = 513;
localparam HSSI_ADAPT_TX_TX_USERTEST_SEL_ADDR_FIELD_OFST = 1;
localparam HSSI_ADAPT_TX_TX_USERTEST_SEL_ADDR_FIELD_HIGH = 1;
localparam HSSI_ADAPT_TX_TX_USERTEST_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_TX_USERTEST_SEL_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_ADAPT_TX_TX_USERTEST_SEL_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_ADAPT_TX_TX_USERTEST_SEL_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_TX_TXFIFO_EMPTY_VALUE = "empty_default";
localparam HSSI_ADAPT_TX_TXFIFO_EMPTY_ADDR_OFST = 514;
localparam HSSI_ADAPT_TX_TXFIFO_EMPTY_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_TX_TXFIFO_EMPTY_ADDR_FIELD_HIGH = 4;
localparam HSSI_ADAPT_TX_TXFIFO_EMPTY_ADDR_FIELD_SIZE = 5;
localparam HSSI_ADAPT_TX_TXFIFO_EMPTY_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam HSSI_ADAPT_TX_TXFIFO_EMPTY_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_TXFIFO_EMPTY_ADDR_FIELD_VALUE = 5'h0;

localparam HSSI_ADAPT_TX_TXFIFO_FULL_VALUE = "full_dw";
localparam HSSI_ADAPT_TX_TXFIFO_FULL_ADDR_OFST = 515;
localparam HSSI_ADAPT_TX_TXFIFO_FULL_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_TX_TXFIFO_FULL_ADDR_FIELD_HIGH = 4;
localparam HSSI_ADAPT_TX_TXFIFO_FULL_ADDR_FIELD_SIZE = 5;
localparam HSSI_ADAPT_TX_TXFIFO_FULL_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam HSSI_ADAPT_TX_TXFIFO_FULL_ADDR_FIELD_VALMASK = 32'h0000000F;
localparam HSSI_ADAPT_TX_TXFIFO_FULL_ADDR_FIELD_VALUE = 5'hF;

localparam HSSI_ADAPT_TX_TXFIFO_MODE_VALUE = "txphase_comp";
localparam HSSI_ADAPT_TX_TXFIFO_MODE_ADDR_OFST = 514;
localparam HSSI_ADAPT_TX_TXFIFO_MODE_ADDR_FIELD_OFST = 5;
localparam HSSI_ADAPT_TX_TXFIFO_MODE_ADDR_FIELD_HIGH = 6;
localparam HSSI_ADAPT_TX_TXFIFO_MODE_ADDR_FIELD_SIZE = 2;
localparam HSSI_ADAPT_TX_TXFIFO_MODE_ADDR_FIELD_BITMASK = 32'h00000060;
localparam HSSI_ADAPT_TX_TXFIFO_MODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_TXFIFO_MODE_ADDR_FIELD_VALUE = 2'h0;

localparam HSSI_ADAPT_TX_TXFIFO_PEMPTY_VALUE = 5'd2;
localparam HSSI_ADAPT_TX_TXFIFO_PEMPTY_ADDR_OFST = 516;
localparam HSSI_ADAPT_TX_TXFIFO_PEMPTY_ADDR_FIELD_OFST = 3;
localparam HSSI_ADAPT_TX_TXFIFO_PEMPTY_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_TX_TXFIFO_PEMPTY_ADDR_FIELD_SIZE = 5;
localparam HSSI_ADAPT_TX_TXFIFO_PEMPTY_ADDR_FIELD_BITMASK = 32'h000000F8;
localparam HSSI_ADAPT_TX_TXFIFO_PEMPTY_ADDR_FIELD_VALMASK = 32'h00000010;
localparam HSSI_ADAPT_TX_TXFIFO_PEMPTY_ADDR_FIELD_VALUE = 5'h2;

localparam HSSI_ADAPT_TX_TXFIFO_PFULL_VALUE = 5'd5;
localparam HSSI_ADAPT_TX_TXFIFO_PFULL_ADDR_OFST = 517;
localparam HSSI_ADAPT_TX_TXFIFO_PFULL_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_TX_TXFIFO_PFULL_ADDR_FIELD_HIGH = 4;
localparam HSSI_ADAPT_TX_TXFIFO_PFULL_ADDR_FIELD_SIZE = 5;
localparam HSSI_ADAPT_TX_TXFIFO_PFULL_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam HSSI_ADAPT_TX_TXFIFO_PFULL_ADDR_FIELD_VALMASK = 32'h00000005;
localparam HSSI_ADAPT_TX_TXFIFO_PFULL_ADDR_FIELD_VALUE = 5'h5;

localparam HSSI_ADAPT_TX_TXQPI_PULLDN_RST_VAL_VALUE = "reset_to_zero_txqpid";
localparam HSSI_ADAPT_TX_TXQPI_PULLDN_RST_VAL_ADDR_OFST = 513;
localparam HSSI_ADAPT_TX_TXQPI_PULLDN_RST_VAL_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_TX_TXQPI_PULLDN_RST_VAL_ADDR_FIELD_HIGH = 0;
localparam HSSI_ADAPT_TX_TXQPI_PULLDN_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_TXQPI_PULLDN_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_ADAPT_TX_TXQPI_PULLDN_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_TXQPI_PULLDN_RST_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_TXQPI_PULLUP_RST_VAL_VALUE = "reset_to_zero_txqpiu";
localparam HSSI_ADAPT_TX_TXQPI_PULLUP_RST_VAL_ADDR_OFST = 512;
localparam HSSI_ADAPT_TX_TXQPI_PULLUP_RST_VAL_ADDR_FIELD_OFST = 7;
localparam HSSI_ADAPT_TX_TXQPI_PULLUP_RST_VAL_ADDR_FIELD_HIGH = 7;
localparam HSSI_ADAPT_TX_TXQPI_PULLUP_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_TXQPI_PULLUP_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_ADAPT_TX_TXQPI_PULLUP_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_ADAPT_TX_TXQPI_PULLUP_RST_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_ADAPT_TX_WORD_ALIGN_VALUE = "wa_en";
localparam HSSI_ADAPT_TX_WORD_ALIGN_ADDR_OFST = 520;
localparam HSSI_ADAPT_TX_WORD_ALIGN_ADDR_FIELD_OFST = 0;
localparam HSSI_ADAPT_TX_WORD_ALIGN_ADDR_FIELD_HIGH = 0;
localparam HSSI_ADAPT_TX_WORD_ALIGN_ADDR_FIELD_SIZE = 1;
localparam HSSI_ADAPT_TX_WORD_ALIGN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_ADAPT_TX_WORD_ALIGN_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_ADAPT_TX_WORD_ALIGN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_ADAPT_TX_WORD_ALIGN_ENABLE_VALUE = "enable";

localparam HSSI_ADAPT_TX_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam HSSI_AIBCR_RX_AIB_DATASEL_GR0_VALUE = "aib_datasel0_setting0";

localparam HSSI_AIBCR_RX_AIB_DATASEL_GR1_VALUE = "aib_datasel1_setting0";

localparam HSSI_AIBCR_RX_AIB_DATASEL_GR2_VALUE = "aib_datasel2_setting1";

localparam HSSI_AIBCR_RX_AIB_DDRCTRL_GR0_VALUE = "aib_ddr0_setting1";

localparam HSSI_AIBCR_RX_AIB_DDRCTRL_GR1_VALUE = "aib_ddr1_setting1";

localparam HSSI_AIBCR_RX_AIB_IINASYNCEN_VALUE = "aib_inasyncen_setting2";

localparam HSSI_AIBCR_RX_AIB_IINCLKEN_VALUE = "aib_inclken_setting3";

localparam HSSI_AIBCR_RX_AIB_OUTCTRL_GR0_VALUE = "aib_outen0_setting1";

localparam HSSI_AIBCR_RX_AIB_OUTCTRL_GR1_VALUE = "aib_outen1_setting1";

localparam HSSI_AIBCR_RX_AIB_OUTCTRL_GR2_VALUE = "aib_outen2_setting1";

localparam HSSI_AIBCR_RX_AIB_OUTCTRL_GR3_VALUE = "aib_outen3_setting1";

localparam HSSI_AIBCR_RX_AIB_OUTNDRV_R12_VALUE = "aib_ndrv12_setting1";

localparam HSSI_AIBCR_RX_AIB_OUTNDRV_R56_VALUE = "aib_ndrv56_setting1";

localparam HSSI_AIBCR_RX_AIB_OUTNDRV_R78_VALUE = "aib_ndrv78_setting1";

localparam HSSI_AIBCR_RX_AIB_OUTPDRV_R12_VALUE = "aib_pdrv12_setting1";

localparam HSSI_AIBCR_RX_AIB_OUTPDRV_R56_VALUE = "aib_pdrv56_setting1";

localparam HSSI_AIBCR_RX_AIB_OUTPDRV_R78_VALUE = "aib_pdrv78_setting1";

localparam HSSI_AIBCR_RX_AIB_RED_RX_SHIFTEN_VALUE = "aib_red_rx_shift_disable";

localparam HSSI_AIBCR_RX_AIB_RX_CLKDIV_VALUE = "aib_rx_clkdiv_setting1";

localparam HSSI_AIBCR_RX_AIB_RX_DCC_BYP_VALUE = "aib_rx_dcc_byp_disable";
localparam HSSI_AIBCR_RX_AIB_RX_DCC_BYP_ADDR_OFST = 560;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_BYP_ADDR_FIELD_OFST = 3;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_BYP_ADDR_FIELD_HIGH = 3;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_BYP_ADDR_FIELD_SIZE = 1;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_BYP_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_BYP_ADDR_FIELD_VALMASK = 32'h00000008;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_BYP_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_AIBCR_RX_AIB_RX_DCC_BYP_IOCSR_UNUSED_VALUE = "aib_rx_dcc_byp_disable_iocsr_unused";

localparam HSSI_AIBCR_RX_AIB_RX_DCC_CONT_CAL_VALUE = "aib_rx_dcc_cal_cont";
localparam HSSI_AIBCR_RX_AIB_RX_DCC_CONT_CAL_ADDR_OFST = 560;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_CONT_CAL_ADDR_FIELD_OFST = 5;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_CONT_CAL_ADDR_FIELD_HIGH = 5;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_CONT_CAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_CONT_CAL_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_CONT_CAL_ADDR_FIELD_VALMASK = 32'h00000020;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_CONT_CAL_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_AIBCR_RX_AIB_RX_DCC_CONT_CAL_IOCSR_UNUSED_VALUE = "aib_rx_dcc_cal_single_iocsr_unused";

localparam HSSI_AIBCR_RX_AIB_RX_DCC_DFT_VALUE = "aib_rx_dcc_dft_disable";

localparam HSSI_AIBCR_RX_AIB_RX_DCC_DFT_SEL_VALUE = "aib_rx_dcc_dft_mode0";

localparam HSSI_AIBCR_RX_AIB_RX_DCC_DLL_ENTEST_VALUE = "aib_rx_dcc_dll_test_disable";

localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTL_STATIC_VALUE = "aib_rx_dcc_dy_ctl_static_setting1";
localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTL_STATIC_ADDR0_OFST = 559;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTL_STATIC_ADDR0_FIELD_OFST = 1;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTL_STATIC_ADDR0_FIELD_HIGH = 7;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTL_STATIC_ADDR0_FIELD_SIZE = 7;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTL_STATIC_ADDR0_FIELD_BITMASK = 32'h000000FE;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTL_STATIC_ADDR0_FIELD_VALMASK = 32'h000000F6;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTL_STATIC_ADDR0_FIELD_VALUE = 7'h7B;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTL_STATIC_ADDR1_OFST = 560;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTL_STATIC_ADDR1_FIELD_OFST = 0;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTL_STATIC_ADDR1_FIELD_HIGH = 2;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTL_STATIC_ADDR1_FIELD_SIZE = 3;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTL_STATIC_ADDR1_FIELD_BITMASK = 32'h00000007;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTL_STATIC_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTL_STATIC_ADDR1_FIELD_VALUE = 3'h0;

localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTLSEL_VALUE = "aib_rx_dcc_dy_ctlsel_setting0";
localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTLSEL_ADDR_OFST = 559;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTLSEL_ADDR_FIELD_OFST = 0;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTLSEL_ADDR_FIELD_HIGH = 0;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTLSEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTLSEL_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTLSEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_DY_CTLSEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_AIBCR_RX_AIB_RX_DCC_EN_VALUE = "aib_rx_dcc_enable";
localparam HSSI_AIBCR_RX_AIB_RX_DCC_EN_ADDR_OFST = 560;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_EN_ADDR_FIELD_OFST = 4;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_EN_ADDR_FIELD_HIGH = 4;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_EN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_EN_ADDR_FIELD_VALMASK = 32'h00000010;
localparam HSSI_AIBCR_RX_AIB_RX_DCC_EN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_AIBCR_RX_AIB_RX_DCC_EN_IOCSR_UNUSED_VALUE = "aib_rx_dcc_disable_iocsr_unused";

localparam HSSI_AIBCR_RX_AIB_RX_DCC_MANUAL_DN_VALUE = "aib_rx_dcc_manual_dn0";

localparam HSSI_AIBCR_RX_AIB_RX_DCC_MANUAL_UP_VALUE = "aib_rx_dcc_manual_up0";

localparam HSSI_AIBCR_RX_AIB_RX_DCC_RST_PRGMNVRT_VALUE = "aib_rx_dcc_st_rst_prgmnvrt_setting0";

localparam HSSI_AIBCR_RX_AIB_RX_DCC_ST_CORE_DN_PRGMNVRT_VALUE = "aib_rx_dcc_st_core_dn_prgmnvrt_setting0";

localparam HSSI_AIBCR_RX_AIB_RX_DCC_ST_CORE_UP_PRGMNVRT_VALUE = "aib_rx_dcc_st_core_up_prgmnvrt_setting0";

localparam HSSI_AIBCR_RX_AIB_RX_DCC_ST_CORE_UPDNEN_VALUE = "aib_rx_dcc_st_core_updnen_setting0";

localparam HSSI_AIBCR_RX_AIB_RX_DCC_ST_DFTMUXSEL_VALUE = "aib_rx_dcc_st_dftmuxsel_setting0";

localparam HSSI_AIBCR_RX_AIB_RX_DCC_ST_DLY_PST_VALUE = "aib_rx_dcc_st_dly_pst_setting0";

localparam HSSI_AIBCR_RX_AIB_RX_DCC_ST_EN_VALUE = "aib_rx_dcc_st_en_setting1";

localparam HSSI_AIBCR_RX_AIB_RX_DCC_ST_LOCKREQ_MUXSEL_VALUE = "aib_rx_dcc_st_lockreq_muxsel_setting0";

localparam HSSI_AIBCR_RX_AIB_RX_DCC_ST_NEW_DLL_VALUE = "aib_rx_dcc_new_dll_setting0";

localparam HSSI_AIBCR_RX_AIB_RX_DCC_ST_NEW_DLL2_VALUE = "aib_rx_dcc_new_dll2_setting0";

localparam HSSI_AIBCR_RX_AIB_RX_DCC_ST_RST_VALUE = "aib_rx_dcc_st_rst_setting0";

localparam HSSI_AIBCR_RX_AIB_RX_DCC_TEST_CLK_PLL_EN_N_VALUE = "aib_rx_dcc_test_clk_pll_en_n_disable";

localparam HSSI_AIBCR_RX_AIB_RX_HALFCODE_VALUE = "aib_rx_halfcode_enable";

localparam HSSI_AIBCR_RX_AIB_RX_SELFLOCK_VALUE = "aib_rx_selflock_enable";

localparam HSSI_AIBCR_RX_DFT_HSSITESTIP_DLL_DCC_EN_VALUE = "disable_dft";

localparam HSSI_AIBCR_RX_OP_MODE_VALUE = "rx_dcc_enable";

localparam HSSI_AIBCR_RX_POWERMODE_AC_VALUE = "rxdatapath_high_speed_pwr";

localparam HSSI_AIBCR_RX_POWERMODE_DC_VALUE = "powerup";

localparam HSSI_AIBCR_RX_REDUNDANCY_EN_VALUE = "disable";

localparam HSSI_AIBCR_RX_SUP_MODE_VALUE = "user_mode";

localparam HSSI_AIBCR_RX_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam HSSI_AIBCR_TX_AIB_DATASEL_GR0_VALUE = "aib_datasel0_setting0";

localparam HSSI_AIBCR_TX_AIB_DATASEL_GR1_VALUE = "aib_datasel1_setting1";

localparam HSSI_AIBCR_TX_AIB_DATASEL_GR2_VALUE = "aib_datasel2_setting0";

localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_CLKDIV_VALUE = "aib_dllstr_align_clkdiv_setting1";

localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DCC_DLL_DFT_SEL_VALUE = "aib_dllstr_align_dcc_dll_dft_sel_setting0";

localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DFT_CH_MUXSEL_VALUE = "aib_dllstr_align_dft_ch_muxsel_setting0";

localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DLY_PST_VALUE = "aib_dllstr_align_dly_pst_setting0";

localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_VALUE = "aib_dllstr_align_dy_ctl_static_setting1";
localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR0_OFST = 557;
localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR0_FIELD_OFST = 0;
localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR0_FIELD_HIGH = 7;
localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR0_FIELD_SIZE = 8;
localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR0_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR0_FIELD_VALMASK = 32'h0000007B;
localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR0_FIELD_VALUE = 8'h7B;
localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR1_OFST = 558;
localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR1_FIELD_OFST = 0;
localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR1_FIELD_HIGH = 1;
localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR1_FIELD_SIZE = 2;
localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR1_FIELD_BITMASK = 32'h00000003;
localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR1_FIELD_VALUE = 2'h0;

localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTLSEL_VALUE = "aib_dllstr_align_dy_ctlsel_setting0";
localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTLSEL_ADDR_OFST = 558;
localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTLSEL_ADDR_FIELD_OFST = 2;
localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTLSEL_ADDR_FIELD_HIGH = 2;
localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTLSEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTLSEL_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTLSEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_DY_CTLSEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_ENTEST_VALUE = "aib_dllstr_align_test_disable";

localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_HALFCODE_VALUE = "aib_dllstr_align_halfcode_enable";

localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_SELFLOCK_VALUE = "aib_dllstr_align_selflock_enable";

localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_ST_CORE_DN_PRGMNVRT_VALUE = "aib_dllstr_align_st_core_dn_prgmnvrt_setting0";

localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_ST_CORE_UP_PRGMNVRT_VALUE = "aib_dllstr_align_st_core_up_prgmnvrt_setting0";

localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_ST_CORE_UPDNEN_VALUE = "aib_dllstr_align_st_core_updnen_setting0";

localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_ST_DFTMUXSEL_VALUE = "aib_dllstr_align_st_dftmuxsel_setting0";

localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_ST_EN_VALUE = "aib_dllstr_align_st_en_setting1";

localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_ST_LOCKREQ_MUXSEL_VALUE = "aib_dllstr_align_st_lockreq_muxsel_setting0";

localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_ST_NEW_DLL_VALUE = "aib_dllstr_align_new_dll_setting0";

localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_ST_NEW_DLL2_VALUE = "aib_dllstr_align_new_dll2_setting0";

localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_ST_RST_VALUE = "aib_dllstr_align_st_rst_setting0";

localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_ST_RST_PRGMNVRT_VALUE = "aib_dllstr_align_st_rst_prgmnvrt_setting0";

localparam HSSI_AIBCR_TX_AIB_DLLSTR_ALIGN_TEST_CLK_PLL_EN_N_VALUE = "aib_dllstr_align_test_clk_pll_en_n_disable";

localparam HSSI_AIBCR_TX_AIB_INCTRL_GR0_VALUE = "aib_inctrl0_setting1";

localparam HSSI_AIBCR_TX_AIB_INCTRL_GR1_VALUE = "aib_inctrl1_setting3";

localparam HSSI_AIBCR_TX_AIB_INCTRL_GR2_VALUE = "aib_inctrl2_setting2";

localparam HSSI_AIBCR_TX_AIB_INCTRL_GR3_VALUE = "aib_inctrl3_setting2";

localparam HSSI_AIBCR_TX_AIB_OUTCTRL_GR0_VALUE = "aib_outen0_setting1";

localparam HSSI_AIBCR_TX_AIB_OUTCTRL_GR1_VALUE = "aib_outen1_setting1";

localparam HSSI_AIBCR_TX_AIB_OUTCTRL_GR2_VALUE = "aib_outen2_setting1";

localparam HSSI_AIBCR_TX_AIB_OUTNDRV_R12_VALUE = "aib_ndrv12_setting1";

localparam HSSI_AIBCR_TX_AIB_OUTNDRV_R34_VALUE = "aib_ndrv34_setting1";

localparam HSSI_AIBCR_TX_AIB_OUTNDRV_R56_VALUE = "aib_ndrv56_setting1";

localparam HSSI_AIBCR_TX_AIB_OUTNDRV_R78_VALUE = "aib_ndrv78_setting1";

localparam HSSI_AIBCR_TX_AIB_OUTPDRV_R12_VALUE = "aib_pdrv12_setting1";

localparam HSSI_AIBCR_TX_AIB_OUTPDRV_R34_VALUE = "aib_pdrv34_setting1";

localparam HSSI_AIBCR_TX_AIB_OUTPDRV_R56_VALUE = "aib_pdrv56_setting1";

localparam HSSI_AIBCR_TX_AIB_OUTPDRV_R78_VALUE = "aib_pdrv78_setting1";

localparam HSSI_AIBCR_TX_AIB_RED_DIRCLKN_SHIFTEN_VALUE = "aib_red_dirclkn_shift_disable";

localparam HSSI_AIBCR_TX_AIB_RED_DIRCLKP_SHIFTEN_VALUE = "aib_red_dirclkp_shift_disable";

localparam HSSI_AIBCR_TX_AIB_RED_DRX_SHIFTEN_VALUE = "aib_red_drx_shift_disable";

localparam HSSI_AIBCR_TX_AIB_RED_DTX_SHIFTEN_VALUE = "aib_red_dtx_shift_disable";

localparam HSSI_AIBCR_TX_AIB_RED_PINP_SHIFTEN_VALUE = "aib_red_pinp_shift_disable";

localparam HSSI_AIBCR_TX_AIB_RED_RX_SHIFTEN_VALUE = "aib_red_rx_shift_disable";

localparam HSSI_AIBCR_TX_AIB_RED_TX_SHIFTEN_VALUE = "aib_red_tx_shift_disable";

localparam HSSI_AIBCR_TX_AIB_RED_TXFERCLKOUT_SHIFTEN_VALUE = "aib_red_txferclkout_shift_disable";

localparam HSSI_AIBCR_TX_AIB_RED_TXFERCLKOUTN_SHIFTEN_VALUE = "aib_red_txferclkoutn_shift_disable";

localparam HSSI_AIBCR_TX_DFD_DLL_DCC_EN_VALUE = "disable_dfd";

localparam HSSI_AIBCR_TX_DFT_HSSITESTIP_DLL_DCC_EN_VALUE = "disable_dft";

localparam HSSI_AIBCR_TX_OP_MODE_VALUE = "tx_dll_enable";

localparam HSSI_AIBCR_TX_POWERMODE_AC_VALUE = "txdatapath_high_speed_pwr";

localparam HSSI_AIBCR_TX_POWERMODE_DC_VALUE = "powerup";

localparam HSSI_AIBCR_TX_REDUNDANCY_EN_VALUE = "disable";

localparam HSSI_AIBCR_TX_SUP_MODE_VALUE = "user_mode";

localparam HSSI_AIBCR_TX_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam HSSI_AIBND_RX_AIB_DATASEL_GR0_VALUE = "aib_datasel0_setting0";

localparam HSSI_AIBND_RX_AIB_DATASEL_GR1_VALUE = "aib_datasel1_setting1";

localparam HSSI_AIBND_RX_AIB_DATASEL_GR2_VALUE = "aib_datasel2_setting1";

localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_CLKDIV_VALUE = "aib_dllstr_align_clkdiv_setting1";

localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DLY_PST_VALUE = "aib_dllstr_align_dly_pst_setting0";

localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_VALUE = "aib_dllstr_align_dy_ctl_static_setting1";
localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR0_OFST = 811;
localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR0_FIELD_OFST = 0;
localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR0_FIELD_HIGH = 7;
localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR0_FIELD_SIZE = 8;
localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR0_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR0_FIELD_VALMASK = 32'h0000007B;
localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR0_FIELD_VALUE = 8'h7B;
localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR1_OFST = 812;
localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR1_FIELD_OFST = 0;
localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR1_FIELD_HIGH = 1;
localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR1_FIELD_SIZE = 2;
localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR1_FIELD_BITMASK = 32'h00000003;
localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTL_STATIC_ADDR1_FIELD_VALUE = 2'h0;

localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTLSEL_VALUE = "aib_dllstr_align_dy_ctlsel_setting0";
localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTLSEL_ADDR_OFST = 812;
localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTLSEL_ADDR_FIELD_OFST = 2;
localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTLSEL_ADDR_FIELD_HIGH = 2;
localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTLSEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTLSEL_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTLSEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_DY_CTLSEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_ENTEST_VALUE = "aib_dllstr_align_test_disable";

localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_HALFCODE_VALUE = "aib_dllstr_align_halfcode_enable";

localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_SELFLOCK_VALUE = "aib_dllstr_align_selflock_enable";

localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_ST_CORE_DN_PRGMNVRT_VALUE = "aib_dllstr_align_st_core_dn_prgmnvrt_setting0";

localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_ST_CORE_UP_PRGMNVRT_VALUE = "aib_dllstr_align_st_core_up_prgmnvrt_setting0";

localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_ST_CORE_UPDNEN_VALUE = "aib_dllstr_align_st_core_updnen_setting0";

localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_ST_DFTMUXSEL_VALUE = "aib_dllstr_align_st_dftmuxsel_setting0";

localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_ST_EN_VALUE = "aib_dllstr_align_st_en_setting1";

localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_ST_HPS_CTRL_EN_VALUE = "aib_dllstr_align_hps_ctrl_en_setting0";

localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_ST_LOCKREQ_MUXSEL_VALUE = "aib_dllstr_align_st_lockreq_muxsel_setting0";

localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_ST_NEW_DLL_VALUE = "aib_dllstr_align_new_dll_setting0";

localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_ST_RST_VALUE = "aib_dllstr_align_st_rst_setting0";

localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_ST_RST_PRGMNVRT_VALUE = "aib_dllstr_align_st_rst_prgmnvrt_setting0";

localparam HSSI_AIBND_RX_AIB_DLLSTR_ALIGN_TEST_CLK_PLL_EN_N_VALUE = "aib_dllstr_align_test_clk_pll_en_n_disable";

localparam HSSI_AIBND_RX_AIB_INCTRL_GR0_VALUE = "aib_inctrl0_setting1";

localparam HSSI_AIBND_RX_AIB_INCTRL_GR1_VALUE = "aib_inctrl1_setting3";

localparam HSSI_AIBND_RX_AIB_INCTRL_GR2_VALUE = "aib_inctrl2_setting2";

localparam HSSI_AIBND_RX_AIB_INCTRL_GR3_VALUE = "aib_inctrl3_setting3";

localparam HSSI_AIBND_RX_AIB_OUTCTRL_GR0_VALUE = "aib_outen0_setting1";

localparam HSSI_AIBND_RX_AIB_OUTCTRL_GR1_VALUE = "aib_outen1_setting1";

localparam HSSI_AIBND_RX_AIB_OUTCTRL_GR2_VALUE = "aib_outen2_setting1";

localparam HSSI_AIBND_RX_AIB_OUTNDRV_R12_VALUE = "aib_ndrv12_setting1";

localparam HSSI_AIBND_RX_AIB_OUTNDRV_R34_VALUE = "aib_ndrv34_setting1";

localparam HSSI_AIBND_RX_AIB_OUTNDRV_R56_VALUE = "aib_ndrv56_setting1";

localparam HSSI_AIBND_RX_AIB_OUTNDRV_R78_VALUE = "aib_ndrv78_setting1";

localparam HSSI_AIBND_RX_AIB_OUTPDRV_R12_VALUE = "aib_pdrv12_setting1";

localparam HSSI_AIBND_RX_AIB_OUTPDRV_R34_VALUE = "aib_pdrv34_setting1";

localparam HSSI_AIBND_RX_AIB_OUTPDRV_R56_VALUE = "aib_pdrv56_setting1";

localparam HSSI_AIBND_RX_AIB_OUTPDRV_R78_VALUE = "aib_pdrv78_setting1";

localparam HSSI_AIBND_RX_AIB_RED_SHIFT_EN_VALUE = "aib_red_shift_disable";

localparam HSSI_AIBND_RX_DFT_HSSITESTIP_DLL_DCC_EN_VALUE = "disable_dft";

localparam HSSI_AIBND_RX_OP_MODE_VALUE = "rx_dll_enable";

localparam HSSI_AIBND_RX_POWERDOWN_MODE_VALUE = "true";

localparam HSSI_AIBND_RX_POWERMODE_AC_VALUE = "rxdatapath_high_speed_pwr";

localparam HSSI_AIBND_RX_POWERMODE_DC_VALUE = "powerup";

localparam HSSI_AIBND_RX_REDUNDANCY_EN_VALUE = "disable";

localparam HSSI_AIBND_RX_SUP_MODE_VALUE = "user_mode";

localparam HSSI_AIBND_RX_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam HSSI_AIBND_TX_AIB_DATASEL_GR0_VALUE = "aib_datasel0_setting0";

localparam HSSI_AIBND_TX_AIB_DATASEL_GR1_VALUE = "aib_datasel1_setting0";

localparam HSSI_AIBND_TX_AIB_DATASEL_GR2_VALUE = "aib_datasel2_setting1";

localparam HSSI_AIBND_TX_AIB_DATASEL_GR3_VALUE = "aib_datasel3_setting1";

localparam HSSI_AIBND_TX_AIB_DDRCTRL_GR0_VALUE = "aib_ddr0_setting1";

localparam HSSI_AIBND_TX_AIB_IINASYNCEN_VALUE = "aib_inasyncen_setting2";

localparam HSSI_AIBND_TX_AIB_IINCLKEN_VALUE = "aib_inclken_setting3";

localparam HSSI_AIBND_TX_AIB_OUTCTRL_GR0_VALUE = "aib_outen0_setting1";

localparam HSSI_AIBND_TX_AIB_OUTCTRL_GR1_VALUE = "aib_outen1_setting1";

localparam HSSI_AIBND_TX_AIB_OUTCTRL_GR2_VALUE = "aib_outen2_setting1";

localparam HSSI_AIBND_TX_AIB_OUTCTRL_GR3_VALUE = "aib_outen3_setting1";

localparam HSSI_AIBND_TX_AIB_OUTNDRV_R34_VALUE = "aib_ndrv34_setting1";

localparam HSSI_AIBND_TX_AIB_OUTNDRV_R56_VALUE = "aib_ndrv56_setting1";

localparam HSSI_AIBND_TX_AIB_OUTPDRV_R34_VALUE = "aib_pdrv34_setting1";

localparam HSSI_AIBND_TX_AIB_OUTPDRV_R56_VALUE = "aib_pdrv56_setting1";

localparam HSSI_AIBND_TX_AIB_RED_DIRCLKN_SHIFTEN_VALUE = "aib_red_dirclkn_shift_disable";

localparam HSSI_AIBND_TX_AIB_RED_DIRCLKP_SHIFTEN_VALUE = "aib_red_dirclkp_shift_disable";

localparam HSSI_AIBND_TX_AIB_RED_DRX_SHIFTEN_VALUE = "aib_red_drx_shift_disable";

localparam HSSI_AIBND_TX_AIB_RED_DTX_SHIFTEN_VALUE = "aib_red_dtx_shift_disable";

localparam HSSI_AIBND_TX_AIB_RED_POUT_SHIFTEN_VALUE = "aib_red_pout_shift_disable";

localparam HSSI_AIBND_TX_AIB_RED_RX_SHIFTEN_VALUE = "aib_red_rx_shift_disable";

localparam HSSI_AIBND_TX_AIB_RED_TX_SHIFTEN_VALUE = "aib_red_tx_shift_disable";

localparam HSSI_AIBND_TX_AIB_RED_TXFERCLKOUT_SHIFTEN_VALUE = "aib_red_txferclkout_shift_disable";

localparam HSSI_AIBND_TX_AIB_RED_TXFERCLKOUTN_SHIFTEN_VALUE = "aib_red_txferclkoutn_shift_disable";

localparam HSSI_AIBND_TX_AIB_TX_CLKDIV_VALUE = "aib_tx_clkdiv_setting1";

localparam HSSI_AIBND_TX_AIB_TX_DCC_BYP_VALUE = "aib_tx_dcc_byp_disable";
localparam HSSI_AIBND_TX_AIB_TX_DCC_BYP_ADDR_OFST = 814;
localparam HSSI_AIBND_TX_AIB_TX_DCC_BYP_ADDR_FIELD_OFST = 3;
localparam HSSI_AIBND_TX_AIB_TX_DCC_BYP_ADDR_FIELD_HIGH = 3;
localparam HSSI_AIBND_TX_AIB_TX_DCC_BYP_ADDR_FIELD_SIZE = 1;
localparam HSSI_AIBND_TX_AIB_TX_DCC_BYP_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_AIBND_TX_AIB_TX_DCC_BYP_ADDR_FIELD_VALMASK = 32'h00000008;
localparam HSSI_AIBND_TX_AIB_TX_DCC_BYP_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_AIBND_TX_AIB_TX_DCC_BYP_IOCSR_UNUSED_VALUE = "aib_tx_dcc_byp_disable_iocsr_unused";

localparam HSSI_AIBND_TX_AIB_TX_DCC_CONT_CAL_VALUE = "aib_tx_dcc_cal_cont";
localparam HSSI_AIBND_TX_AIB_TX_DCC_CONT_CAL_ADDR_OFST = 814;
localparam HSSI_AIBND_TX_AIB_TX_DCC_CONT_CAL_ADDR_FIELD_OFST = 5;
localparam HSSI_AIBND_TX_AIB_TX_DCC_CONT_CAL_ADDR_FIELD_HIGH = 5;
localparam HSSI_AIBND_TX_AIB_TX_DCC_CONT_CAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_AIBND_TX_AIB_TX_DCC_CONT_CAL_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_AIBND_TX_AIB_TX_DCC_CONT_CAL_ADDR_FIELD_VALMASK = 32'h00000020;
localparam HSSI_AIBND_TX_AIB_TX_DCC_CONT_CAL_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_AIBND_TX_AIB_TX_DCC_CONT_CAL_IOCSR_UNUSED_VALUE = "aib_tx_dcc_cal_single_iocsr_unused";

localparam HSSI_AIBND_TX_AIB_TX_DCC_DFT_VALUE = "aib_tx_dcc_dft_disable";

localparam HSSI_AIBND_TX_AIB_TX_DCC_DFT_SEL_VALUE = "aib_tx_dcc_dft_mode0";

localparam HSSI_AIBND_TX_AIB_TX_DCC_DLL_DFT_SEL_VALUE = "aib_tx_dcc_dll_dft_sel_setting0";

localparam HSSI_AIBND_TX_AIB_TX_DCC_DLL_ENTEST_VALUE = "aib_tx_dcc_dll_test_disable";

localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTL_STATIC_VALUE = "aib_tx_dcc_dy_ctl_static_setting1";
localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTL_STATIC_ADDR0_OFST = 813;
localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTL_STATIC_ADDR0_FIELD_OFST = 1;
localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTL_STATIC_ADDR0_FIELD_HIGH = 7;
localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTL_STATIC_ADDR0_FIELD_SIZE = 7;
localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTL_STATIC_ADDR0_FIELD_BITMASK = 32'h000000FE;
localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTL_STATIC_ADDR0_FIELD_VALMASK = 32'h000000F6;
localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTL_STATIC_ADDR0_FIELD_VALUE = 7'h7B;
localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTL_STATIC_ADDR1_OFST = 814;
localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTL_STATIC_ADDR1_FIELD_OFST = 0;
localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTL_STATIC_ADDR1_FIELD_HIGH = 2;
localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTL_STATIC_ADDR1_FIELD_SIZE = 3;
localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTL_STATIC_ADDR1_FIELD_BITMASK = 32'h00000007;
localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTL_STATIC_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTL_STATIC_ADDR1_FIELD_VALUE = 3'h0;

localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTLSEL_VALUE = "aib_tx_dcc_dy_ctlsel_setting0";
localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTLSEL_ADDR_OFST = 813;
localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTLSEL_ADDR_FIELD_OFST = 0;
localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTLSEL_ADDR_FIELD_HIGH = 0;
localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTLSEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTLSEL_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTLSEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_AIBND_TX_AIB_TX_DCC_DY_CTLSEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_AIBND_TX_AIB_TX_DCC_EN_VALUE = "aib_tx_dcc_enable";
localparam HSSI_AIBND_TX_AIB_TX_DCC_EN_ADDR_OFST = 814;
localparam HSSI_AIBND_TX_AIB_TX_DCC_EN_ADDR_FIELD_OFST = 4;
localparam HSSI_AIBND_TX_AIB_TX_DCC_EN_ADDR_FIELD_HIGH = 4;
localparam HSSI_AIBND_TX_AIB_TX_DCC_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_AIBND_TX_AIB_TX_DCC_EN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_AIBND_TX_AIB_TX_DCC_EN_ADDR_FIELD_VALMASK = 32'h00000010;
localparam HSSI_AIBND_TX_AIB_TX_DCC_EN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_AIBND_TX_AIB_TX_DCC_EN_IOCSR_UNUSED_VALUE = "aib_tx_dcc_disable_iocsr_unused";

localparam HSSI_AIBND_TX_AIB_TX_DCC_MANUAL_DN_VALUE = "aib_tx_dcc_manual_dn0";

localparam HSSI_AIBND_TX_AIB_TX_DCC_MANUAL_UP_VALUE = "aib_tx_dcc_manual_up0";

localparam HSSI_AIBND_TX_AIB_TX_DCC_RST_PRGMNVRT_VALUE = "aib_tx_dcc_st_rst_prgmnvrt_setting0";

localparam HSSI_AIBND_TX_AIB_TX_DCC_ST_CORE_DN_PRGMNVRT_VALUE = "aib_tx_dcc_st_core_dn_prgmnvrt_setting0";

localparam HSSI_AIBND_TX_AIB_TX_DCC_ST_CORE_UP_PRGMNVRT_VALUE = "aib_tx_dcc_st_core_up_prgmnvrt_setting0";

localparam HSSI_AIBND_TX_AIB_TX_DCC_ST_CORE_UPDNEN_VALUE = "aib_tx_dcc_st_core_updnen_setting0";

localparam HSSI_AIBND_TX_AIB_TX_DCC_ST_DFTMUXSEL_VALUE = "aib_tx_dcc_st_dftmuxsel_setting0";

localparam HSSI_AIBND_TX_AIB_TX_DCC_ST_DLY_PST_VALUE = "aib_tx_dcc_st_dly_pst_setting0";

localparam HSSI_AIBND_TX_AIB_TX_DCC_ST_EN_VALUE = "aib_tx_dcc_st_en_setting1";

localparam HSSI_AIBND_TX_AIB_TX_DCC_ST_HPS_CTRL_EN_VALUE = "aib_tx_dcc_hps_ctrl_en_setting0";

localparam HSSI_AIBND_TX_AIB_TX_DCC_ST_LOCKREQ_MUXSEL_VALUE = "aib_tx_dcc_st_lockreq_muxsel_setting0";

localparam HSSI_AIBND_TX_AIB_TX_DCC_ST_NEW_DLL_VALUE = "aib_tx_dcc_new_dll_setting0";

localparam HSSI_AIBND_TX_AIB_TX_DCC_ST_RST_VALUE = "aib_tx_dcc_st_rst_setting0";

localparam HSSI_AIBND_TX_AIB_TX_DCC_TEST_CLK_PLL_EN_N_VALUE = "aib_tx_dcc_test_clk_pll_en_n_disable";

localparam HSSI_AIBND_TX_AIB_TX_HALFCODE_VALUE = "aib_tx_halfcode_enable";

localparam HSSI_AIBND_TX_AIB_TX_SELFLOCK_VALUE = "aib_tx_selflock_enable";

localparam HSSI_AIBND_TX_DFD_DLL_DCC_EN_VALUE = "disable_dfd";

localparam HSSI_AIBND_TX_DFT_HSSITESTIP_DLL_DCC_EN_VALUE = "disable_dft";

localparam HSSI_AIBND_TX_OP_MODE_VALUE = "tx_dcc_enable";

localparam HSSI_AIBND_TX_POWERDOWN_MODE_VALUE = "true";

localparam HSSI_AIBND_TX_POWERMODE_AC_VALUE = "txdatapath_high_speed_pwr";

localparam HSSI_AIBND_TX_POWERMODE_DC_VALUE = "powerup";

localparam HSSI_AIBND_TX_REDUNDANCY_EN_VALUE = "disable";

localparam HSSI_AIBND_TX_SUP_MODE_VALUE = "user_mode";

localparam HSSI_AIBND_TX_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam HSSI_AVMM1_IF_PCS_CALIBRATION_FEATURE_EN_VALUE = "avmm1_pcs_calibration_en";

localparam HSSI_AVMM1_IF_PLDADAPT_GATE_DIS_VALUE = "disable";

localparam HSSI_AVMM1_IF_HSSIADAPT_NFHSSI_CALIBRATIO_FEATURE_EN_VALUE = "disable";

localparam HSSI_AVMM1_IF_PLDADAPT_NFHSSI_CALIBRATIO_FEATURE_EN_VALUE = "enable";

localparam HSSI_AVMM1_IF_HSSIADAPT_READ_BLOCKING_ENABLE_VALUE = "enable";

localparam HSSI_AVMM1_IF_PLDADAPT_READ_BLOCKING_ENABLE_VALUE = "enable";

localparam HSSI_AVMM1_IF_HSSIADAPT_AVMM_OSC_CLOCK_SETTING_VALUE = "osc_clk_div_by1";

localparam HSSI_AVMM1_IF_PLDADAPT_AVMM_OSC_CLOCK_SETTING_VALUE = "osc_clk_div_by1";

localparam HSSI_AVMM1_IF_HSSIADAPT_AVMM_TESTBUS_SEL_VALUE = "avmm1_transfer_testbus";

localparam HSSI_AVMM1_IF_PLDADAPT_AVMM_TESTBUS_SEL_VALUE = "avmm1_transfer_testbus";

localparam HSSI_AVMM1_IF_HSSIADAPT_HIP_MODE_VALUE = "disable_hip";

localparam HSSI_AVMM1_IF_PLDADAPT_HIP_MODE_VALUE = "disable_hip";

localparam HSSI_AVMM1_IF_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam HSSI_AVMM1_IF_CALIBRATION_TYPE_VALUE = "one_time";

localparam HSSI_COMMON_PCS_PMA_INTERFACE_ASN_CLK_ENABLE_VALUE = "false";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_ASN_CLK_ENABLE_ADDR_OFST = 24;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_ASN_CLK_ENABLE_ADDR_FIELD_OFST = 6;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_ASN_CLK_ENABLE_ADDR_FIELD_HIGH = 6;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_ASN_CLK_ENABLE_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_ASN_CLK_ENABLE_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_ASN_CLK_ENABLE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_ASN_CLK_ENABLE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_ASN_ENABLE_VALUE = "dis_asn";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_ASN_ENABLE_ADDR_OFST = 13;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_ASN_ENABLE_ADDR_FIELD_OFST = 5;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_ASN_ENABLE_ADDR_FIELD_HIGH = 5;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_ASN_ENABLE_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_ASN_ENABLE_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_ASN_ENABLE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_ASN_ENABLE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_BLOCK_SEL_VALUE = "eight_g_pcs";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BLOCK_SEL_ADDR_OFST = 13;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BLOCK_SEL_ADDR_FIELD_OFST = 0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BLOCK_SEL_ADDR_FIELD_HIGH = 0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BLOCK_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BLOCK_SEL_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BLOCK_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BLOCK_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_EARLY_EIOS_VALUE = "true";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_EARLY_EIOS_ADDR_OFST = 25;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_EARLY_EIOS_ADDR_FIELD_OFST = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_EARLY_EIOS_ADDR_FIELD_HIGH = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_EARLY_EIOS_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_EARLY_EIOS_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_EARLY_EIOS_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_EARLY_EIOS_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PCIE_SWITCH_VALUE = "true";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PCIE_SWITCH_ADDR_OFST = 25;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PCIE_SWITCH_ADDR_FIELD_OFST = 0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PCIE_SWITCH_ADDR_FIELD_HIGH = 0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PCIE_SWITCH_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PCIE_SWITCH_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PCIE_SWITCH_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PCIE_SWITCH_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PMA_LTR_VALUE = "true";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PMA_LTR_ADDR_OFST = 25;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PMA_LTR_ADDR_FIELD_OFST = 4;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PMA_LTR_ADDR_FIELD_HIGH = 4;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PMA_LTR_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PMA_LTR_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PMA_LTR_ADDR_FIELD_VALMASK = 32'h00000010;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PMA_LTR_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PPM_LOCK_VALUE = "false";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PPM_LOCK_ADDR_OFST = 25;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PPM_LOCK_ADDR_FIELD_OFST = 3;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PPM_LOCK_ADDR_FIELD_HIGH = 3;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PPM_LOCK_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PPM_LOCK_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PPM_LOCK_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_PPM_LOCK_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_SEND_SYNCP_FBKP_VALUE = "true";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_SEND_SYNCP_FBKP_ADDR_OFST = 21;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_SEND_SYNCP_FBKP_ADDR_FIELD_OFST = 2;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_SEND_SYNCP_FBKP_ADDR_FIELD_HIGH = 2;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_SEND_SYNCP_FBKP_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_SEND_SYNCP_FBKP_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_SEND_SYNCP_FBKP_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_SEND_SYNCP_FBKP_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_TXDETECTRX_VALUE = "true";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_TXDETECTRX_ADDR_OFST = 25;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_TXDETECTRX_ADDR_FIELD_OFST = 2;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_TXDETECTRX_ADDR_FIELD_HIGH = 2;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_TXDETECTRX_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_TXDETECTRX_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_TXDETECTRX_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_BYPASS_TXDETECTRX_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_CDR_CONTROL_VALUE = "dis_cdr_ctrl";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_CDR_CONTROL_ADDR_OFST = 25;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_CDR_CONTROL_ADDR_FIELD_OFST = 5;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_CDR_CONTROL_ADDR_FIELD_HIGH = 5;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_CDR_CONTROL_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_CDR_CONTROL_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_CDR_CONTROL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_CDR_CONTROL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_CID_ENABLE_VALUE = "dis_cid_mode";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_CID_ENABLE_ADDR_OFST = 25;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_CID_ENABLE_ADDR_FIELD_OFST = 6;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_CID_ENABLE_ADDR_FIELD_HIGH = 6;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_CID_ENABLE_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_CID_ENABLE_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_CID_ENABLE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_CID_ENABLE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_VALUE = 16'd0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_ADDR0_OFST = 28;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_ADDR0_FIELD_OFST = 0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_ADDR0_FIELD_HIGH = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_ADDR0_FIELD_SIZE = 8;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_ADDR0_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_ADDR0_FIELD_VALUE = 8'h0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_ADDR1_OFST = 29;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_ADDR1_FIELD_OFST = 0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_ADDR1_FIELD_HIGH = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_ADDR1_FIELD_SIZE = 8;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_ADDR1_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_ADDR1_FIELD_VALUE = 8'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_MULTI_VALUE = 3'd0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_MULTI_ADDR_OFST = 30;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_MULTI_ADDR_FIELD_OFST = 3;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_MULTI_ADDR_FIELD_HIGH = 5;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_MULTI_ADDR_FIELD_SIZE = 3;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_MULTI_ADDR_FIELD_BITMASK = 32'h00000038;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_MULTI_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DATA_MASK_COUNT_MULTI_ADDR_FIELD_VALUE = 3'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_DFT_OBSERVATION_CLOCK_SELECTION_VALUE = "dft_clk_obsrv_tx0";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DFT_OBSERVATION_CLOCK_SELECTION_ADDR_OFST = 27;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DFT_OBSERVATION_CLOCK_SELECTION_ADDR_FIELD_OFST = 4;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DFT_OBSERVATION_CLOCK_SELECTION_ADDR_FIELD_HIGH = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DFT_OBSERVATION_CLOCK_SELECTION_ADDR_FIELD_SIZE = 4;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DFT_OBSERVATION_CLOCK_SELECTION_ADDR_FIELD_BITMASK = 32'h000000F0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DFT_OBSERVATION_CLOCK_SELECTION_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_DFT_OBSERVATION_CLOCK_SELECTION_ADDR_FIELD_VALUE = 4'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_EARLY_EIOS_COUNTER_VALUE = 8'd0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_EARLY_EIOS_COUNTER_ADDR_OFST = 31;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_EARLY_EIOS_COUNTER_ADDR_FIELD_OFST = 0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_EARLY_EIOS_COUNTER_ADDR_FIELD_HIGH = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_EARLY_EIOS_COUNTER_ADDR_FIELD_SIZE = 8;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_EARLY_EIOS_COUNTER_ADDR_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_EARLY_EIOS_COUNTER_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_EARLY_EIOS_COUNTER_ADDR_FIELD_VALUE = 8'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_FORCE_FREQDET_VALUE = "force_freqdet_dis";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_FORCE_FREQDET_ADDR_OFST = 14;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_FORCE_FREQDET_ADDR_FIELD_OFST = 0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_FORCE_FREQDET_ADDR_FIELD_HIGH = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_FORCE_FREQDET_ADDR_FIELD_SIZE = 2;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_FORCE_FREQDET_ADDR_FIELD_BITMASK = 32'h00000003;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_FORCE_FREQDET_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_FORCE_FREQDET_ADDR_FIELD_VALUE = 2'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_FREE_RUN_CLK_ENABLE_VALUE = "false";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_FREE_RUN_CLK_ENABLE_ADDR_OFST = 24;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_FREE_RUN_CLK_ENABLE_ADDR_FIELD_OFST = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_FREE_RUN_CLK_ENABLE_ADDR_FIELD_HIGH = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_FREE_RUN_CLK_ENABLE_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_FREE_RUN_CLK_ENABLE_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_FREE_RUN_CLK_ENABLE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_FREE_RUN_CLK_ENABLE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_IGNORE_SIGDET_G23_VALUE = "false";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_IGNORE_SIGDET_G23_ADDR_OFST = 30;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_IGNORE_SIGDET_G23_ADDR_FIELD_OFST = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_IGNORE_SIGDET_G23_ADDR_FIELD_HIGH = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_IGNORE_SIGDET_G23_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_IGNORE_SIGDET_G23_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_IGNORE_SIGDET_G23_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_IGNORE_SIGDET_G23_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_PC_EN_COUNTER_VALUE = 7'd0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PC_EN_COUNTER_ADDR_OFST = 19;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PC_EN_COUNTER_ADDR_FIELD_OFST = 0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PC_EN_COUNTER_ADDR_FIELD_HIGH = 6;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PC_EN_COUNTER_ADDR_FIELD_SIZE = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PC_EN_COUNTER_ADDR_FIELD_BITMASK = 32'h0000007F;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PC_EN_COUNTER_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PC_EN_COUNTER_ADDR_FIELD_VALUE = 7'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_PC_RST_COUNTER_VALUE = 5'd0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PC_RST_COUNTER_ADDR_OFST = 20;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PC_RST_COUNTER_ADDR_FIELD_OFST = 0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PC_RST_COUNTER_ADDR_FIELD_HIGH = 4;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PC_RST_COUNTER_ADDR_FIELD_SIZE = 5;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PC_RST_COUNTER_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PC_RST_COUNTER_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PC_RST_COUNTER_ADDR_FIELD_VALUE = 5'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_PCIE_HIP_MODE_VALUE = "hip_disable";

localparam HSSI_COMMON_PCS_PMA_INTERFACE_PH_FIFO_REG_MODE_VALUE = "phfifo_reg_mode_dis";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PH_FIFO_REG_MODE_ADDR_OFST = 19;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PH_FIFO_REG_MODE_ADDR_FIELD_OFST = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PH_FIFO_REG_MODE_ADDR_FIELD_HIGH = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PH_FIFO_REG_MODE_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PH_FIFO_REG_MODE_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PH_FIFO_REG_MODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PH_FIFO_REG_MODE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_PHFIFO_FLUSH_WAIT_VALUE = 6'd0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PHFIFO_FLUSH_WAIT_ADDR_OFST = 18;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PHFIFO_FLUSH_WAIT_ADDR_FIELD_OFST = 2;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PHFIFO_FLUSH_WAIT_ADDR_FIELD_HIGH = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PHFIFO_FLUSH_WAIT_ADDR_FIELD_SIZE = 6;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PHFIFO_FLUSH_WAIT_ADDR_FIELD_BITMASK = 32'h000000FC;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PHFIFO_FLUSH_WAIT_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PHFIFO_FLUSH_WAIT_ADDR_FIELD_VALUE = 6'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_PIPE_IF_G3PCS_VALUE = "pipe_if_8gpcs";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PIPE_IF_G3PCS_ADDR_OFST = 13;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PIPE_IF_G3PCS_ADDR_FIELD_OFST = 2;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PIPE_IF_G3PCS_ADDR_FIELD_HIGH = 2;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PIPE_IF_G3PCS_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PIPE_IF_G3PCS_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PIPE_IF_G3PCS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PIPE_IF_G3PCS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_VALUE = 18'd0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_ADDR0_OFST = 16;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_ADDR0_FIELD_OFST = 0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_ADDR0_FIELD_HIGH = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_ADDR0_FIELD_SIZE = 8;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_ADDR0_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_ADDR0_FIELD_VALUE = 8'h0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_ADDR1_OFST = 17;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_ADDR1_FIELD_OFST = 0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_ADDR1_FIELD_HIGH = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_ADDR1_FIELD_SIZE = 8;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_ADDR1_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_ADDR1_FIELD_VALUE = 8'h0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_ADDR2_OFST = 18;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_ADDR2_FIELD_OFST = 0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_ADDR2_FIELD_HIGH = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_ADDR2_FIELD_SIZE = 2;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_ADDR2_FIELD_BITMASK = 32'h00000003;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_ADDR2_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_DONE_COUNTER_ADDR2_FIELD_VALUE = 2'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_VALUE = "dft_dis";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_ADDR_OFST = 15;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_ADDR_FIELD_OFST = 0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_ADDR_FIELD_HIGH = 0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_IF_DFT_VAL_VALUE = "dft_0";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_IF_DFT_VAL_ADDR_OFST = 15;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_IF_DFT_VAL_ADDR_FIELD_OFST = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_IF_DFT_VAL_ADDR_FIELD_HIGH = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_IF_DFT_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_IF_DFT_VAL_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_IF_DFT_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PMA_IF_DFT_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_CNT_RST_VALUE = "ppm_cnt_rst_dis";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_CNT_RST_ADDR_OFST = 13;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_CNT_RST_ADDR_FIELD_OFST = 6;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_CNT_RST_ADDR_FIELD_HIGH = 6;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_CNT_RST_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_CNT_RST_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_CNT_RST_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_CNT_RST_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_DEASSERT_EARLY_VALUE = "deassert_early_dis";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_DEASSERT_EARLY_ADDR_OFST = 13;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_DEASSERT_EARLY_ADDR_FIELD_OFST = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_DEASSERT_EARLY_ADDR_FIELD_HIGH = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_DEASSERT_EARLY_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_DEASSERT_EARLY_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_DEASSERT_EARLY_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_DEASSERT_EARLY_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_GEN1_2_CNT_VALUE = "cnt_32k";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_GEN1_2_CNT_ADDR_OFST = 13;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_GEN1_2_CNT_ADDR_FIELD_OFST = 4;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_GEN1_2_CNT_ADDR_FIELD_HIGH = 4;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_GEN1_2_CNT_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_GEN1_2_CNT_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_GEN1_2_CNT_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_GEN1_2_CNT_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_POST_EIDLE_DELAY_VALUE = "cnt_200_cycles";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_POST_EIDLE_DELAY_ADDR_OFST = 13;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_POST_EIDLE_DELAY_ADDR_FIELD_OFST = 3;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_POST_EIDLE_DELAY_ADDR_FIELD_HIGH = 3;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_POST_EIDLE_DELAY_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_POST_EIDLE_DELAY_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_POST_EIDLE_DELAY_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPM_POST_EIDLE_DELAY_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPMSEL_VALUE = "ppmsel_100";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPMSEL_ADDR_OFST = 14;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPMSEL_ADDR_FIELD_OFST = 2;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPMSEL_ADDR_FIELD_HIGH = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPMSEL_ADDR_FIELD_SIZE = 6;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPMSEL_ADDR_FIELD_BITMASK = 32'h000000FC;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPMSEL_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_PPMSEL_ADDR_FIELD_VALUE = 6'h1;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_PROT_MODE_VALUE = "other_protocols";

localparam HSSI_COMMON_PCS_PMA_INTERFACE_RXVALID_MASK_VALUE = "rxvalid_mask_dis";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_RXVALID_MASK_ADDR_OFST = 25;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_RXVALID_MASK_ADDR_FIELD_OFST = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_RXVALID_MASK_ADDR_FIELD_HIGH = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_RXVALID_MASK_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_RXVALID_MASK_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_RXVALID_MASK_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_RXVALID_MASK_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_VALUE = 12'd0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_ADDR0_OFST = 26;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_ADDR0_FIELD_OFST = 0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_ADDR0_FIELD_HIGH = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_ADDR0_FIELD_SIZE = 8;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_ADDR0_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_ADDR0_FIELD_VALUE = 8'h0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_ADDR1_OFST = 27;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_ADDR1_FIELD_OFST = 0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_ADDR1_FIELD_HIGH = 3;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_ADDR1_FIELD_SIZE = 4;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_ADDR1_FIELD_BITMASK = 32'h0000000F;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_ADDR1_FIELD_VALUE = 4'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_MULTI_VALUE = 3'd0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_MULTI_ADDR_OFST = 30;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_MULTI_ADDR_FIELD_OFST = 0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_MULTI_ADDR_FIELD_HIGH = 2;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_MULTI_ADDR_FIELD_SIZE = 3;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_MULTI_ADDR_FIELD_BITMASK = 32'h00000007;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_MULTI_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIGDET_WAIT_COUNTER_MULTI_ADDR_FIELD_VALUE = 3'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_SIM_MODE_VALUE = "disable";

localparam HSSI_COMMON_PCS_PMA_INTERFACE_SPD_CHG_RST_WAIT_CNT_EN_VALUE = "false";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SPD_CHG_RST_WAIT_CNT_EN_ADDR_OFST = 30;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SPD_CHG_RST_WAIT_CNT_EN_ADDR_FIELD_OFST = 6;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SPD_CHG_RST_WAIT_CNT_EN_ADDR_FIELD_HIGH = 6;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SPD_CHG_RST_WAIT_CNT_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SPD_CHG_RST_WAIT_CNT_EN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SPD_CHG_RST_WAIT_CNT_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_SPD_CHG_RST_WAIT_CNT_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_SUP_MODE_VALUE = "user_mode";

localparam HSSI_COMMON_PCS_PMA_INTERFACE_TESTOUT_SEL_VALUE = "ppm_det_test";
localparam HSSI_COMMON_PCS_PMA_INTERFACE_TESTOUT_SEL_ADDR_OFST = 21;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_TESTOUT_SEL_ADDR_FIELD_OFST = 4;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_TESTOUT_SEL_ADDR_FIELD_HIGH = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_TESTOUT_SEL_ADDR_FIELD_SIZE = 4;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_TESTOUT_SEL_ADDR_FIELD_BITMASK = 32'h000000F0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_TESTOUT_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_TESTOUT_SEL_ADDR_FIELD_VALUE = 4'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_CLK_ON_OFF_TIMER_VALUE = 4'd0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_CLK_ON_OFF_TIMER_ADDR_OFST = 23;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_CLK_ON_OFF_TIMER_ADDR_FIELD_OFST = 4;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_CLK_ON_OFF_TIMER_ADDR_FIELD_HIGH = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_CLK_ON_OFF_TIMER_ADDR_FIELD_SIZE = 4;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_CLK_ON_OFF_TIMER_ADDR_FIELD_BITMASK = 32'h000000F0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_CLK_ON_OFF_TIMER_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_CLK_ON_OFF_TIMER_ADDR_FIELD_VALUE = 4'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_PIPE_SYNCHRONIZING_VALUE = 5'd0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_PIPE_SYNCHRONIZING_ADDR_OFST = 24;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_PIPE_SYNCHRONIZING_ADDR_FIELD_OFST = 0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_PIPE_SYNCHRONIZING_ADDR_FIELD_HIGH = 4;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_PIPE_SYNCHRONIZING_ADDR_FIELD_SIZE = 5;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_PIPE_SYNCHRONIZING_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_PIPE_SYNCHRONIZING_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_PIPE_SYNCHRONIZING_ADDR_FIELD_VALUE = 5'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_SEND_SYNCP_FBKP_VALUE = 11'd0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_SEND_SYNCP_FBKP_ADDR0_OFST = 22;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_SEND_SYNCP_FBKP_ADDR0_FIELD_OFST = 0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_SEND_SYNCP_FBKP_ADDR0_FIELD_HIGH = 7;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_SEND_SYNCP_FBKP_ADDR0_FIELD_SIZE = 8;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_SEND_SYNCP_FBKP_ADDR0_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_SEND_SYNCP_FBKP_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_SEND_SYNCP_FBKP_ADDR0_FIELD_VALUE = 8'h0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_SEND_SYNCP_FBKP_ADDR1_OFST = 23;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_SEND_SYNCP_FBKP_ADDR1_FIELD_OFST = 0;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_SEND_SYNCP_FBKP_ADDR1_FIELD_HIGH = 2;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_SEND_SYNCP_FBKP_ADDR1_FIELD_SIZE = 3;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_SEND_SYNCP_FBKP_ADDR1_FIELD_BITMASK = 32'h00000007;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_SEND_SYNCP_FBKP_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PCS_PMA_INTERFACE_WAIT_SEND_SYNCP_FBKP_ADDR1_FIELD_VALUE = 3'h0;

localparam HSSI_COMMON_PCS_PMA_INTERFACE_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam HSSI_COMMON_PLD_PCS_INTERFACE_DFT_CLK_OUT_EN_VALUE = "dft_clk_out_disable";
localparam HSSI_COMMON_PLD_PCS_INTERFACE_DFT_CLK_OUT_EN_ADDR_OFST = 41;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_DFT_CLK_OUT_EN_ADDR_FIELD_OFST = 0;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_DFT_CLK_OUT_EN_ADDR_FIELD_HIGH = 0;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_DFT_CLK_OUT_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_DFT_CLK_OUT_EN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_DFT_CLK_OUT_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_DFT_CLK_OUT_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_COMMON_PLD_PCS_INTERFACE_DFT_CLK_OUT_SEL_VALUE = "teng_rx_dft_clk";
localparam HSSI_COMMON_PLD_PCS_INTERFACE_DFT_CLK_OUT_SEL_ADDR_OFST = 40;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_DFT_CLK_OUT_SEL_ADDR_FIELD_OFST = 5;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_DFT_CLK_OUT_SEL_ADDR_FIELD_HIGH = 7;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_DFT_CLK_OUT_SEL_ADDR_FIELD_SIZE = 3;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_DFT_CLK_OUT_SEL_ADDR_FIELD_BITMASK = 32'h000000E0;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_DFT_CLK_OUT_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_DFT_CLK_OUT_SEL_ADDR_FIELD_VALUE = 3'h0;

localparam HSSI_COMMON_PLD_PCS_INTERFACE_HRDRSTCTRL_EN_VALUE = "hrst_dis";
localparam HSSI_COMMON_PLD_PCS_INTERFACE_HRDRSTCTRL_EN_ADDR_OFST = 40;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_HRDRSTCTRL_EN_ADDR_FIELD_OFST = 4;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_HRDRSTCTRL_EN_ADDR_FIELD_HIGH = 4;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_HRDRSTCTRL_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_HRDRSTCTRL_EN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_HRDRSTCTRL_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_HRDRSTCTRL_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_COMMON_PLD_PCS_INTERFACE_PCS_TESTBUS_BLOCK_SEL_VALUE = "pma_if";
localparam HSSI_COMMON_PLD_PCS_INTERFACE_PCS_TESTBUS_BLOCK_SEL_ADDR_OFST = 40;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_PCS_TESTBUS_BLOCK_SEL_ADDR_FIELD_OFST = 0;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_PCS_TESTBUS_BLOCK_SEL_ADDR_FIELD_HIGH = 2;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_PCS_TESTBUS_BLOCK_SEL_ADDR_FIELD_SIZE = 3;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_PCS_TESTBUS_BLOCK_SEL_ADDR_FIELD_BITMASK = 32'h00000007;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_PCS_TESTBUS_BLOCK_SEL_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_COMMON_PLD_PCS_INTERFACE_PCS_TESTBUS_BLOCK_SEL_ADDR_FIELD_VALUE = 3'h4;

localparam HSSI_COMMON_PLD_PCS_INTERFACE_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam PMA_ADAPT_SEQUENCER_RX_PATH_RSTN_OVERRIDEB_VALUE = "use_sequencer";

localparam PMA_ADAPT_SEQUENCER_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam PMA_PCIE_GEN_SWITCH_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam PMA_ADAPT_ADAPT_MODE_VALUE = "manual";

localparam PMA_ADAPT_ADP_AC_CTLE_CAL_WIN_VALUE = "radp_ac_ctle_cal_win_4";
localparam PMA_ADAPT_ADP_AC_CTLE_CAL_WIN_ADDR_OFST = 353;
localparam PMA_ADAPT_ADP_AC_CTLE_CAL_WIN_ADDR_FIELD_OFST = 3;
localparam PMA_ADAPT_ADP_AC_CTLE_CAL_WIN_ADDR_FIELD_HIGH = 4;
localparam PMA_ADAPT_ADP_AC_CTLE_CAL_WIN_ADDR_FIELD_SIZE = 2;
localparam PMA_ADAPT_ADP_AC_CTLE_CAL_WIN_ADDR_FIELD_BITMASK = 32'h00000018;
localparam PMA_ADAPT_ADP_AC_CTLE_CAL_WIN_ADDR_FIELD_VALMASK = 32'h00000010;
localparam PMA_ADAPT_ADP_AC_CTLE_CAL_WIN_ADDR_FIELD_VALUE = 2'h2;

localparam PMA_ADAPT_ADP_AC_CTLE_COCURRENT_MODE_SEL_VALUE = "radp_ac_ctle_cocurrent_mode_sel_mode_1";
localparam PMA_ADAPT_ADP_AC_CTLE_COCURRENT_MODE_SEL_ADDR_OFST = 330;
localparam PMA_ADAPT_ADP_AC_CTLE_COCURRENT_MODE_SEL_ADDR_FIELD_OFST = 6;
localparam PMA_ADAPT_ADP_AC_CTLE_COCURRENT_MODE_SEL_ADDR_FIELD_HIGH = 6;
localparam PMA_ADAPT_ADP_AC_CTLE_COCURRENT_MODE_SEL_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_AC_CTLE_COCURRENT_MODE_SEL_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_ADAPT_ADP_AC_CTLE_COCURRENT_MODE_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_AC_CTLE_COCURRENT_MODE_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_AC_CTLE_EN_VALUE = "radp_ac_ctle_en_disable";
localparam PMA_ADAPT_ADP_AC_CTLE_EN_ADDR_OFST = 353;
localparam PMA_ADAPT_ADP_AC_CTLE_EN_ADDR_FIELD_OFST = 7;
localparam PMA_ADAPT_ADP_AC_CTLE_EN_ADDR_FIELD_HIGH = 7;
localparam PMA_ADAPT_ADP_AC_CTLE_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_AC_CTLE_EN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_ADAPT_ADP_AC_CTLE_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_AC_CTLE_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_AC_CTLE_HOLD_EN_VALUE = "radp_ac_ctle_hold_en_not_hold";
localparam PMA_ADAPT_ADP_AC_CTLE_HOLD_EN_ADDR_OFST = 343;
localparam PMA_ADAPT_ADP_AC_CTLE_HOLD_EN_ADDR_FIELD_OFST = 4;
localparam PMA_ADAPT_ADP_AC_CTLE_HOLD_EN_ADDR_FIELD_HIGH = 4;
localparam PMA_ADAPT_ADP_AC_CTLE_HOLD_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_AC_CTLE_HOLD_EN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam PMA_ADAPT_ADP_AC_CTLE_HOLD_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_AC_CTLE_HOLD_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_AC_CTLE_INITIAL_LOAD_VALUE = "radp_ac_ctle_initial_load_0";
localparam PMA_ADAPT_ADP_AC_CTLE_INITIAL_LOAD_ADDR_OFST = 344;
localparam PMA_ADAPT_ADP_AC_CTLE_INITIAL_LOAD_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_AC_CTLE_INITIAL_LOAD_ADDR_FIELD_HIGH = 0;
localparam PMA_ADAPT_ADP_AC_CTLE_INITIAL_LOAD_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_AC_CTLE_INITIAL_LOAD_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_ADAPT_ADP_AC_CTLE_INITIAL_LOAD_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_AC_CTLE_INITIAL_LOAD_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_AC_CTLE_INITIAL_VALUE_VALUE = "radp_ac_ctle_initial_value_8";
localparam PMA_ADAPT_ADP_AC_CTLE_INITIAL_VALUE_ADDR_OFST = 352;
localparam PMA_ADAPT_ADP_AC_CTLE_INITIAL_VALUE_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_AC_CTLE_INITIAL_VALUE_ADDR_FIELD_HIGH = 1;
localparam PMA_ADAPT_ADP_AC_CTLE_INITIAL_VALUE_ADDR_FIELD_SIZE = 2;
localparam PMA_ADAPT_ADP_AC_CTLE_INITIAL_VALUE_ADDR_FIELD_BITMASK = 32'h00000003;
localparam PMA_ADAPT_ADP_AC_CTLE_INITIAL_VALUE_ADDR_FIELD_VALMASK = 32'h00000003;
localparam PMA_ADAPT_ADP_AC_CTLE_INITIAL_VALUE_ADDR_FIELD_VALUE = 2'h3;

localparam PMA_ADAPT_ADP_AC_CTLE_MODE_SEL_VALUE = "radp_ac_ctle_mode_sel_concurrent";
localparam PMA_ADAPT_ADP_AC_CTLE_MODE_SEL_ADDR_OFST = 351;
localparam PMA_ADAPT_ADP_AC_CTLE_MODE_SEL_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_AC_CTLE_MODE_SEL_ADDR_FIELD_HIGH = 0;
localparam PMA_ADAPT_ADP_AC_CTLE_MODE_SEL_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_AC_CTLE_MODE_SEL_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_ADAPT_ADP_AC_CTLE_MODE_SEL_ADDR_FIELD_VALMASK = 32'h00000001;
localparam PMA_ADAPT_ADP_AC_CTLE_MODE_SEL_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_ADAPT_ADP_AC_CTLE_PH1_WIN_VALUE = "radp_ac_ctle_ph1_win_2p19";
localparam PMA_ADAPT_ADP_AC_CTLE_PH1_WIN_ADDR_OFST = 332;
localparam PMA_ADAPT_ADP_AC_CTLE_PH1_WIN_ADDR_FIELD_OFST = 3;
localparam PMA_ADAPT_ADP_AC_CTLE_PH1_WIN_ADDR_FIELD_HIGH = 4;
localparam PMA_ADAPT_ADP_AC_CTLE_PH1_WIN_ADDR_FIELD_SIZE = 2;
localparam PMA_ADAPT_ADP_AC_CTLE_PH1_WIN_ADDR_FIELD_BITMASK = 32'h00000018;
localparam PMA_ADAPT_ADP_AC_CTLE_PH1_WIN_ADDR_FIELD_VALMASK = 32'h00000008;
localparam PMA_ADAPT_ADP_AC_CTLE_PH1_WIN_ADDR_FIELD_VALUE = 2'h1;

localparam PMA_ADAPT_ADP_ADAPT_CONTROL_SEL_VALUE = "radp_adapt_control_sel_from_cram";
localparam PMA_ADAPT_ADP_ADAPT_CONTROL_SEL_ADDR_OFST = 342;
localparam PMA_ADAPT_ADP_ADAPT_CONTROL_SEL_ADDR_FIELD_OFST = 4;
localparam PMA_ADAPT_ADP_ADAPT_CONTROL_SEL_ADDR_FIELD_HIGH = 4;
localparam PMA_ADAPT_ADP_ADAPT_CONTROL_SEL_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_ADAPT_CONTROL_SEL_ADDR_FIELD_BITMASK = 32'h00000010;
localparam PMA_ADAPT_ADP_ADAPT_CONTROL_SEL_ADDR_FIELD_VALMASK = 32'h00000010;
localparam PMA_ADAPT_ADP_ADAPT_CONTROL_SEL_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_ADAPT_ADP_ADAPT_START_VALUE = "radp_adapt_start_0";
localparam PMA_ADAPT_ADP_ADAPT_START_ADDR_OFST = 332;
localparam PMA_ADAPT_ADP_ADAPT_START_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_ADAPT_START_ADDR_FIELD_HIGH = 0;
localparam PMA_ADAPT_ADP_ADAPT_START_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_ADAPT_START_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_ADAPT_ADP_ADAPT_START_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_ADAPT_START_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_BIST_DATAPATH_EN_VALUE = "radp_bist_datapath_en_disable";
localparam PMA_ADAPT_ADP_BIST_DATAPATH_EN_ADDR_OFST = 350;
localparam PMA_ADAPT_ADP_BIST_DATAPATH_EN_ADDR_FIELD_OFST = 3;
localparam PMA_ADAPT_ADP_BIST_DATAPATH_EN_ADDR_FIELD_HIGH = 3;
localparam PMA_ADAPT_ADP_BIST_DATAPATH_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_BIST_DATAPATH_EN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam PMA_ADAPT_ADP_BIST_DATAPATH_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_BIST_DATAPATH_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_BIST_ERRCOUNT_RSTN_VALUE = "radp_bist_errcount_rstn_0";
localparam PMA_ADAPT_ADP_BIST_ERRCOUNT_RSTN_ADDR_OFST = 344;
localparam PMA_ADAPT_ADP_BIST_ERRCOUNT_RSTN_ADDR_FIELD_OFST = 4;
localparam PMA_ADAPT_ADP_BIST_ERRCOUNT_RSTN_ADDR_FIELD_HIGH = 4;
localparam PMA_ADAPT_ADP_BIST_ERRCOUNT_RSTN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_BIST_ERRCOUNT_RSTN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam PMA_ADAPT_ADP_BIST_ERRCOUNT_RSTN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_BIST_ERRCOUNT_RSTN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_BIST_MODE_SEL_VALUE = "radp_bist_mode_sel_prbs31";
localparam PMA_ADAPT_ADP_BIST_MODE_SEL_ADDR_OFST = 331;
localparam PMA_ADAPT_ADP_BIST_MODE_SEL_ADDR_FIELD_OFST = 4;
localparam PMA_ADAPT_ADP_BIST_MODE_SEL_ADDR_FIELD_HIGH = 5;
localparam PMA_ADAPT_ADP_BIST_MODE_SEL_ADDR_FIELD_SIZE = 2;
localparam PMA_ADAPT_ADP_BIST_MODE_SEL_ADDR_FIELD_BITMASK = 32'h00000030;
localparam PMA_ADAPT_ADP_BIST_MODE_SEL_ADDR_FIELD_VALMASK = 32'h00000030;
localparam PMA_ADAPT_ADP_BIST_MODE_SEL_ADDR_FIELD_VALUE = 2'h3;

localparam PMA_ADAPT_ADP_CLKGATE_ENB_VALUE = "radp_clkgate_enb_disable";
localparam PMA_ADAPT_ADP_CLKGATE_ENB_ADDR_OFST = 352;
localparam PMA_ADAPT_ADP_CLKGATE_ENB_ADDR_FIELD_OFST = 5;
localparam PMA_ADAPT_ADP_CLKGATE_ENB_ADDR_FIELD_HIGH = 5;
localparam PMA_ADAPT_ADP_CLKGATE_ENB_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_CLKGATE_ENB_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_ADAPT_ADP_CLKGATE_ENB_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_CLKGATE_ENB_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_CLKOUT_DIV_SEL_VALUE = "radp_clkout_div_sel_div2_4cycle";
localparam PMA_ADAPT_ADP_CLKOUT_DIV_SEL_ADDR_OFST = 351;
localparam PMA_ADAPT_ADP_CLKOUT_DIV_SEL_ADDR_FIELD_OFST = 6;
localparam PMA_ADAPT_ADP_CLKOUT_DIV_SEL_ADDR_FIELD_HIGH = 6;
localparam PMA_ADAPT_ADP_CLKOUT_DIV_SEL_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_CLKOUT_DIV_SEL_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_ADAPT_ADP_CLKOUT_DIV_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_CLKOUT_DIV_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_CTLE_BYPASS_AC_VALUE = "radp_ctle_bypass_ac_bypass";
localparam PMA_ADAPT_ADP_CTLE_BYPASS_AC_ADDR_OFST = 351;
localparam PMA_ADAPT_ADP_CTLE_BYPASS_AC_ADDR_FIELD_OFST = 3;
localparam PMA_ADAPT_ADP_CTLE_BYPASS_AC_ADDR_FIELD_HIGH = 3;
localparam PMA_ADAPT_ADP_CTLE_BYPASS_AC_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_CTLE_BYPASS_AC_ADDR_FIELD_BITMASK = 32'h00000008;
localparam PMA_ADAPT_ADP_CTLE_BYPASS_AC_ADDR_FIELD_VALMASK = 32'h00000008;
localparam PMA_ADAPT_ADP_CTLE_BYPASS_AC_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_ADAPT_ADP_CTLE_BYPASS_DC_VALUE = "radp_ctle_bypass_dc_bypass";
localparam PMA_ADAPT_ADP_CTLE_BYPASS_DC_ADDR_OFST = 348;
localparam PMA_ADAPT_ADP_CTLE_BYPASS_DC_ADDR_FIELD_OFST = 7;
localparam PMA_ADAPT_ADP_CTLE_BYPASS_DC_ADDR_FIELD_HIGH = 7;
localparam PMA_ADAPT_ADP_CTLE_BYPASS_DC_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_CTLE_BYPASS_DC_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_ADAPT_ADP_CTLE_BYPASS_DC_ADDR_FIELD_VALMASK = 32'h00000080;
localparam PMA_ADAPT_ADP_CTLE_BYPASS_DC_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_ADAPT_ADP_DC_CTLE_ACCUM_DEPTH_VALUE = 4'd8;
localparam PMA_ADAPT_ADP_DC_CTLE_ACCUM_DEPTH_ADDR_OFST = 334;
localparam PMA_ADAPT_ADP_DC_CTLE_ACCUM_DEPTH_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_DC_CTLE_ACCUM_DEPTH_ADDR_FIELD_HIGH = 3;
localparam PMA_ADAPT_ADP_DC_CTLE_ACCUM_DEPTH_ADDR_FIELD_SIZE = 4;
localparam PMA_ADAPT_ADP_DC_CTLE_ACCUM_DEPTH_ADDR_FIELD_BITMASK = 32'h0000000F;
localparam PMA_ADAPT_ADP_DC_CTLE_ACCUM_DEPTH_ADDR_FIELD_VALMASK = 32'h00000008;
localparam PMA_ADAPT_ADP_DC_CTLE_ACCUM_DEPTH_ADDR_FIELD_VALUE = 4'h8;

localparam PMA_ADAPT_ADP_DC_CTLE_EN_VALUE = "radp_dc_ctle_en_disable";
localparam PMA_ADAPT_ADP_DC_CTLE_EN_ADDR_OFST = 328;
localparam PMA_ADAPT_ADP_DC_CTLE_EN_ADDR_FIELD_OFST = 5;
localparam PMA_ADAPT_ADP_DC_CTLE_EN_ADDR_FIELD_HIGH = 5;
localparam PMA_ADAPT_ADP_DC_CTLE_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_DC_CTLE_EN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_ADAPT_ADP_DC_CTLE_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_DC_CTLE_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_DC_CTLE_HOLD_EN_VALUE = "radp_dc_ctle_hold_en_not_hold";
localparam PMA_ADAPT_ADP_DC_CTLE_HOLD_EN_ADDR_OFST = 333;
localparam PMA_ADAPT_ADP_DC_CTLE_HOLD_EN_ADDR_FIELD_OFST = 6;
localparam PMA_ADAPT_ADP_DC_CTLE_HOLD_EN_ADDR_FIELD_HIGH = 6;
localparam PMA_ADAPT_ADP_DC_CTLE_HOLD_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_DC_CTLE_HOLD_EN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_ADAPT_ADP_DC_CTLE_HOLD_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_DC_CTLE_HOLD_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_DC_CTLE_INITIAL_LOAD_VALUE = "radp_dc_ctle_initial_load_0";
localparam PMA_ADAPT_ADP_DC_CTLE_INITIAL_LOAD_ADDR_OFST = 343;
localparam PMA_ADAPT_ADP_DC_CTLE_INITIAL_LOAD_ADDR_FIELD_OFST = 7;
localparam PMA_ADAPT_ADP_DC_CTLE_INITIAL_LOAD_ADDR_FIELD_HIGH = 7;
localparam PMA_ADAPT_ADP_DC_CTLE_INITIAL_LOAD_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_DC_CTLE_INITIAL_LOAD_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_ADAPT_ADP_DC_CTLE_INITIAL_LOAD_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_DC_CTLE_INITIAL_LOAD_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_DC_CTLE_INITIAL_VALUE_VALUE = "radp_dc_ctle_initial_value_16";
localparam PMA_ADAPT_ADP_DC_CTLE_INITIAL_VALUE_ADDR_OFST = 352;
localparam PMA_ADAPT_ADP_DC_CTLE_INITIAL_VALUE_ADDR_FIELD_OFST = 2;
localparam PMA_ADAPT_ADP_DC_CTLE_INITIAL_VALUE_ADDR_FIELD_HIGH = 3;
localparam PMA_ADAPT_ADP_DC_CTLE_INITIAL_VALUE_ADDR_FIELD_SIZE = 2;
localparam PMA_ADAPT_ADP_DC_CTLE_INITIAL_VALUE_ADDR_FIELD_BITMASK = 32'h0000000C;
localparam PMA_ADAPT_ADP_DC_CTLE_INITIAL_VALUE_ADDR_FIELD_VALMASK = 32'h00000008;
localparam PMA_ADAPT_ADP_DC_CTLE_INITIAL_VALUE_ADDR_FIELD_VALUE = 2'h2;

localparam PMA_ADAPT_ADP_DC_CTLE_MODE0_WIN_SIZE_VALUE = "radp_dc_ctle_mode0_win_size_4_taps";
localparam PMA_ADAPT_ADP_DC_CTLE_MODE0_WIN_SIZE_ADDR_OFST = 354;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE0_WIN_SIZE_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE0_WIN_SIZE_ADDR_FIELD_HIGH = 1;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE0_WIN_SIZE_ADDR_FIELD_SIZE = 2;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE0_WIN_SIZE_ADDR_FIELD_BITMASK = 32'h00000003;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE0_WIN_SIZE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE0_WIN_SIZE_ADDR_FIELD_VALUE = 2'h0;

localparam PMA_ADAPT_ADP_DC_CTLE_MODE0_WIN_START_VALUE = 4'd0;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE0_WIN_START_ADDR_OFST = 359;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE0_WIN_START_ADDR_FIELD_OFST = 3;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE0_WIN_START_ADDR_FIELD_HIGH = 6;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE0_WIN_START_ADDR_FIELD_SIZE = 4;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE0_WIN_START_ADDR_FIELD_BITMASK = 32'h00000078;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE0_WIN_START_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE0_WIN_START_ADDR_FIELD_VALUE = 4'h0;

localparam PMA_ADAPT_ADP_DC_CTLE_MODE1_H1_RATIO_VALUE = 4'd8;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE1_H1_RATIO_ADDR_OFST = 356;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE1_H1_RATIO_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE1_H1_RATIO_ADDR_FIELD_HIGH = 3;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE1_H1_RATIO_ADDR_FIELD_SIZE = 4;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE1_H1_RATIO_ADDR_FIELD_BITMASK = 32'h0000000F;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE1_H1_RATIO_ADDR_FIELD_VALMASK = 32'h00000008;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE1_H1_RATIO_ADDR_FIELD_VALUE = 4'h8;

localparam PMA_ADAPT_ADP_DC_CTLE_MODE2_H2_LIMIT_VALUE = 4'd7;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE2_H2_LIMIT_ADDR_OFST = 357;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE2_H2_LIMIT_ADDR_FIELD_OFST = 1;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE2_H2_LIMIT_ADDR_FIELD_HIGH = 4;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE2_H2_LIMIT_ADDR_FIELD_SIZE = 4;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE2_H2_LIMIT_ADDR_FIELD_BITMASK = 32'h0000001E;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE2_H2_LIMIT_ADDR_FIELD_VALMASK = 32'h0000000E;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE2_H2_LIMIT_ADDR_FIELD_VALUE = 4'h7;

localparam PMA_ADAPT_ADP_DC_CTLE_MODE_SEL_VALUE = "radp_dc_ctle_mode_sel_mode_2";
localparam PMA_ADAPT_ADP_DC_CTLE_MODE_SEL_ADDR_OFST = 354;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE_SEL_ADDR_FIELD_OFST = 2;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE_SEL_ADDR_FIELD_HIGH = 3;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE_SEL_ADDR_FIELD_SIZE = 2;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE_SEL_ADDR_FIELD_BITMASK = 32'h0000000C;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE_SEL_ADDR_FIELD_VALMASK = 32'h00000008;
localparam PMA_ADAPT_ADP_DC_CTLE_MODE_SEL_ADDR_FIELD_VALUE = 2'h2;

localparam PMA_ADAPT_ADP_DC_CTLE_ONETIME_VALUE = "radp_dc_ctle_onetime_disable";
localparam PMA_ADAPT_ADP_DC_CTLE_ONETIME_ADDR_OFST = 359;
localparam PMA_ADAPT_ADP_DC_CTLE_ONETIME_ADDR_FIELD_OFST = 2;
localparam PMA_ADAPT_ADP_DC_CTLE_ONETIME_ADDR_FIELD_HIGH = 2;
localparam PMA_ADAPT_ADP_DC_CTLE_ONETIME_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_DC_CTLE_ONETIME_ADDR_FIELD_BITMASK = 32'h00000004;
localparam PMA_ADAPT_ADP_DC_CTLE_ONETIME_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_DC_CTLE_ONETIME_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_DC_CTLE_ONETIME_THRESHOLD_VALUE = "radp_dc_ctle_onetime_threshold_256";
localparam PMA_ADAPT_ADP_DC_CTLE_ONETIME_THRESHOLD_ADDR_OFST = 347;
localparam PMA_ADAPT_ADP_DC_CTLE_ONETIME_THRESHOLD_ADDR_FIELD_OFST = 1;
localparam PMA_ADAPT_ADP_DC_CTLE_ONETIME_THRESHOLD_ADDR_FIELD_HIGH = 3;
localparam PMA_ADAPT_ADP_DC_CTLE_ONETIME_THRESHOLD_ADDR_FIELD_SIZE = 3;
localparam PMA_ADAPT_ADP_DC_CTLE_ONETIME_THRESHOLD_ADDR_FIELD_BITMASK = 32'h0000000E;
localparam PMA_ADAPT_ADP_DC_CTLE_ONETIME_THRESHOLD_ADDR_FIELD_VALMASK = 32'h00000006;
localparam PMA_ADAPT_ADP_DC_CTLE_ONETIME_THRESHOLD_ADDR_FIELD_VALUE = 3'h3;

localparam PMA_ADAPT_ADP_DFE_ACCUM_DEPTH_VALUE = 4'd8;
localparam PMA_ADAPT_ADP_DFE_ACCUM_DEPTH_ADDR_OFST = 355;
localparam PMA_ADAPT_ADP_DFE_ACCUM_DEPTH_ADDR_FIELD_OFST = 3;
localparam PMA_ADAPT_ADP_DFE_ACCUM_DEPTH_ADDR_FIELD_HIGH = 6;
localparam PMA_ADAPT_ADP_DFE_ACCUM_DEPTH_ADDR_FIELD_SIZE = 4;
localparam PMA_ADAPT_ADP_DFE_ACCUM_DEPTH_ADDR_FIELD_BITMASK = 32'h00000078;
localparam PMA_ADAPT_ADP_DFE_ACCUM_DEPTH_ADDR_FIELD_VALMASK = 32'h00000040;
localparam PMA_ADAPT_ADP_DFE_ACCUM_DEPTH_ADDR_FIELD_VALUE = 4'h8;

localparam PMA_ADAPT_ADP_DFE_EN_VALUE = "radp_dfe_en_disable";
localparam PMA_ADAPT_ADP_DFE_EN_ADDR_OFST = 328;
localparam PMA_ADAPT_ADP_DFE_EN_ADDR_FIELD_OFST = 1;
localparam PMA_ADAPT_ADP_DFE_EN_ADDR_FIELD_HIGH = 1;
localparam PMA_ADAPT_ADP_DFE_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_DFE_EN_ADDR_FIELD_BITMASK = 32'h00000002;
localparam PMA_ADAPT_ADP_DFE_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_DFE_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_DFE_FXTAP_BYPASS_VALUE = "radp_dfe_fxtap_bypass_bypass";
localparam PMA_ADAPT_ADP_DFE_FXTAP_BYPASS_ADDR_OFST = 353;
localparam PMA_ADAPT_ADP_DFE_FXTAP_BYPASS_ADDR_FIELD_OFST = 6;
localparam PMA_ADAPT_ADP_DFE_FXTAP_BYPASS_ADDR_FIELD_HIGH = 6;
localparam PMA_ADAPT_ADP_DFE_FXTAP_BYPASS_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_DFE_FXTAP_BYPASS_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_ADAPT_ADP_DFE_FXTAP_BYPASS_ADDR_FIELD_VALMASK = 32'h00000040;
localparam PMA_ADAPT_ADP_DFE_FXTAP_BYPASS_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_ADAPT_ADP_DFE_HOLD_EN_VALUE = "radp_dfe_hold_en_not_hold";
localparam PMA_ADAPT_ADP_DFE_HOLD_EN_ADDR_OFST = 332;
localparam PMA_ADAPT_ADP_DFE_HOLD_EN_ADDR_FIELD_OFST = 7;
localparam PMA_ADAPT_ADP_DFE_HOLD_EN_ADDR_FIELD_HIGH = 7;
localparam PMA_ADAPT_ADP_DFE_HOLD_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_DFE_HOLD_EN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_ADAPT_ADP_DFE_HOLD_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_DFE_HOLD_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_DFE_HOLD_SEL_VALUE = "radp_dfe_hold_sel_no";
localparam PMA_ADAPT_ADP_DFE_HOLD_SEL_ADDR_OFST = 349;
localparam PMA_ADAPT_ADP_DFE_HOLD_SEL_ADDR_FIELD_OFST = 1;
localparam PMA_ADAPT_ADP_DFE_HOLD_SEL_ADDR_FIELD_HIGH = 3;
localparam PMA_ADAPT_ADP_DFE_HOLD_SEL_ADDR_FIELD_SIZE = 3;
localparam PMA_ADAPT_ADP_DFE_HOLD_SEL_ADDR_FIELD_BITMASK = 32'h0000000E;
localparam PMA_ADAPT_ADP_DFE_HOLD_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_DFE_HOLD_SEL_ADDR_FIELD_VALUE = 3'h0;

localparam PMA_ADAPT_ADP_DFE_ONETIME_VALUE = "radp_dfe_onetime_disable";
localparam PMA_ADAPT_ADP_DFE_ONETIME_ADDR_OFST = 350;
localparam PMA_ADAPT_ADP_DFE_ONETIME_ADDR_FIELD_OFST = 4;
localparam PMA_ADAPT_ADP_DFE_ONETIME_ADDR_FIELD_HIGH = 4;
localparam PMA_ADAPT_ADP_DFE_ONETIME_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_DFE_ONETIME_ADDR_FIELD_BITMASK = 32'h00000010;
localparam PMA_ADAPT_ADP_DFE_ONETIME_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_DFE_ONETIME_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_DFE_ONETIME_THRESHOLD_VALUE = "radp_dfe_onetime_threshold_2048";
localparam PMA_ADAPT_ADP_DFE_ONETIME_THRESHOLD_ADDR_OFST = 334;
localparam PMA_ADAPT_ADP_DFE_ONETIME_THRESHOLD_ADDR_FIELD_OFST = 4;
localparam PMA_ADAPT_ADP_DFE_ONETIME_THRESHOLD_ADDR_FIELD_HIGH = 6;
localparam PMA_ADAPT_ADP_DFE_ONETIME_THRESHOLD_ADDR_FIELD_SIZE = 3;
localparam PMA_ADAPT_ADP_DFE_ONETIME_THRESHOLD_ADDR_FIELD_BITMASK = 32'h00000070;
localparam PMA_ADAPT_ADP_DFE_ONETIME_THRESHOLD_ADDR_FIELD_VALMASK = 32'h00000060;
localparam PMA_ADAPT_ADP_DFE_ONETIME_THRESHOLD_ADDR_FIELD_VALUE = 3'h6;

localparam PMA_ADAPT_ADP_DFE_TAP1_INITIAL_LOAD_VALUE = "radp_dfe_tap1_initial_load_0";
localparam PMA_ADAPT_ADP_DFE_TAP1_INITIAL_LOAD_ADDR_OFST = 352;
localparam PMA_ADAPT_ADP_DFE_TAP1_INITIAL_LOAD_ADDR_FIELD_OFST = 4;
localparam PMA_ADAPT_ADP_DFE_TAP1_INITIAL_LOAD_ADDR_FIELD_HIGH = 4;
localparam PMA_ADAPT_ADP_DFE_TAP1_INITIAL_LOAD_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_DFE_TAP1_INITIAL_LOAD_ADDR_FIELD_BITMASK = 32'h00000010;
localparam PMA_ADAPT_ADP_DFE_TAP1_INITIAL_LOAD_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_DFE_TAP1_INITIAL_LOAD_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_DFE_TAP1_INITIAL_VALUE_VALUE = "radp_dfe_tap1_initial_value_0";
localparam PMA_ADAPT_ADP_DFE_TAP1_INITIAL_VALUE_ADDR_OFST = 354;
localparam PMA_ADAPT_ADP_DFE_TAP1_INITIAL_VALUE_ADDR_FIELD_OFST = 4;
localparam PMA_ADAPT_ADP_DFE_TAP1_INITIAL_VALUE_ADDR_FIELD_HIGH = 5;
localparam PMA_ADAPT_ADP_DFE_TAP1_INITIAL_VALUE_ADDR_FIELD_SIZE = 2;
localparam PMA_ADAPT_ADP_DFE_TAP1_INITIAL_VALUE_ADDR_FIELD_BITMASK = 32'h00000030;
localparam PMA_ADAPT_ADP_DFE_TAP1_INITIAL_VALUE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_DFE_TAP1_INITIAL_VALUE_ADDR_FIELD_VALUE = 2'h0;

localparam PMA_ADAPT_ADP_DFE_TAP_SEL_EN_VALUE = "radp_dfe_tap_sel_en_no";
localparam PMA_ADAPT_ADP_DFE_TAP_SEL_EN_ADDR_OFST = 332;
localparam PMA_ADAPT_ADP_DFE_TAP_SEL_EN_ADDR_FIELD_OFST = 5;
localparam PMA_ADAPT_ADP_DFE_TAP_SEL_EN_ADDR_FIELD_HIGH = 6;
localparam PMA_ADAPT_ADP_DFE_TAP_SEL_EN_ADDR_FIELD_SIZE = 2;
localparam PMA_ADAPT_ADP_DFE_TAP_SEL_EN_ADDR_FIELD_BITMASK = 32'h00000060;
localparam PMA_ADAPT_ADP_DFE_TAP_SEL_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_DFE_TAP_SEL_EN_ADDR_FIELD_VALUE = 2'h0;

localparam PMA_ADAPT_ADP_DLEV_ACCUM_DEPTH_VALUE = 4'd6;
localparam PMA_ADAPT_ADP_DLEV_ACCUM_DEPTH_ADDR_OFST = 348;
localparam PMA_ADAPT_ADP_DLEV_ACCUM_DEPTH_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_DLEV_ACCUM_DEPTH_ADDR_FIELD_HIGH = 3;
localparam PMA_ADAPT_ADP_DLEV_ACCUM_DEPTH_ADDR_FIELD_SIZE = 4;
localparam PMA_ADAPT_ADP_DLEV_ACCUM_DEPTH_ADDR_FIELD_BITMASK = 32'h0000000F;
localparam PMA_ADAPT_ADP_DLEV_ACCUM_DEPTH_ADDR_FIELD_VALMASK = 32'h00000006;
localparam PMA_ADAPT_ADP_DLEV_ACCUM_DEPTH_ADDR_FIELD_VALUE = 4'h6;

localparam PMA_ADAPT_ADP_DLEV_BYPASS_VALUE = "radp_dlev_bypass_bypass";
localparam PMA_ADAPT_ADP_DLEV_BYPASS_ADDR_OFST = 353;
localparam PMA_ADAPT_ADP_DLEV_BYPASS_ADDR_FIELD_OFST = 5;
localparam PMA_ADAPT_ADP_DLEV_BYPASS_ADDR_FIELD_HIGH = 5;
localparam PMA_ADAPT_ADP_DLEV_BYPASS_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_DLEV_BYPASS_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_ADAPT_ADP_DLEV_BYPASS_ADDR_FIELD_VALMASK = 32'h00000020;
localparam PMA_ADAPT_ADP_DLEV_BYPASS_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_ADAPT_ADP_DLEV_EN_VALUE = "radp_dlev_en_disable";
localparam PMA_ADAPT_ADP_DLEV_EN_ADDR_OFST = 328;
localparam PMA_ADAPT_ADP_DLEV_EN_ADDR_FIELD_OFST = 3;
localparam PMA_ADAPT_ADP_DLEV_EN_ADDR_FIELD_HIGH = 3;
localparam PMA_ADAPT_ADP_DLEV_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_DLEV_EN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam PMA_ADAPT_ADP_DLEV_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_DLEV_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_DLEV_HOLD_EN_VALUE = "radp_dlev_hold_en_not_hold";
localparam PMA_ADAPT_ADP_DLEV_HOLD_EN_ADDR_OFST = 330;
localparam PMA_ADAPT_ADP_DLEV_HOLD_EN_ADDR_FIELD_OFST = 5;
localparam PMA_ADAPT_ADP_DLEV_HOLD_EN_ADDR_FIELD_HIGH = 5;
localparam PMA_ADAPT_ADP_DLEV_HOLD_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_DLEV_HOLD_EN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_ADAPT_ADP_DLEV_HOLD_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_DLEV_HOLD_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_DLEV_INITIAL_LOAD_VALUE = "radp_dlev_initial_load_0";
localparam PMA_ADAPT_ADP_DLEV_INITIAL_LOAD_ADDR_OFST = 343;
localparam PMA_ADAPT_ADP_DLEV_INITIAL_LOAD_ADDR_FIELD_OFST = 5;
localparam PMA_ADAPT_ADP_DLEV_INITIAL_LOAD_ADDR_FIELD_HIGH = 5;
localparam PMA_ADAPT_ADP_DLEV_INITIAL_LOAD_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_DLEV_INITIAL_LOAD_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_ADAPT_ADP_DLEV_INITIAL_LOAD_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_DLEV_INITIAL_LOAD_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_DLEV_INITIAL_VALUE_VALUE = "radp_dlev_initial_value_38";
localparam PMA_ADAPT_ADP_DLEV_INITIAL_VALUE_ADDR_OFST = 333;
localparam PMA_ADAPT_ADP_DLEV_INITIAL_VALUE_ADDR_FIELD_OFST = 1;
localparam PMA_ADAPT_ADP_DLEV_INITIAL_VALUE_ADDR_FIELD_HIGH = 2;
localparam PMA_ADAPT_ADP_DLEV_INITIAL_VALUE_ADDR_FIELD_SIZE = 2;
localparam PMA_ADAPT_ADP_DLEV_INITIAL_VALUE_ADDR_FIELD_BITMASK = 32'h00000006;
localparam PMA_ADAPT_ADP_DLEV_INITIAL_VALUE_ADDR_FIELD_VALMASK = 32'h00000004;
localparam PMA_ADAPT_ADP_DLEV_INITIAL_VALUE_ADDR_FIELD_VALUE = 2'h2;

localparam PMA_ADAPT_ADP_DLEV_ONETIME_VALUE = "radp_dlev_onetime_disable";
localparam PMA_ADAPT_ADP_DLEV_ONETIME_ADDR_OFST = 333;
localparam PMA_ADAPT_ADP_DLEV_ONETIME_ADDR_FIELD_OFST = 5;
localparam PMA_ADAPT_ADP_DLEV_ONETIME_ADDR_FIELD_HIGH = 5;
localparam PMA_ADAPT_ADP_DLEV_ONETIME_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_DLEV_ONETIME_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_ADAPT_ADP_DLEV_ONETIME_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_DLEV_ONETIME_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_DLEV_ONETIME_THRESHOLD_VALUE = "radp_dlev_onetime_threshold_4096";
localparam PMA_ADAPT_ADP_DLEV_ONETIME_THRESHOLD_ADDR_OFST = 356;
localparam PMA_ADAPT_ADP_DLEV_ONETIME_THRESHOLD_ADDR_FIELD_OFST = 4;
localparam PMA_ADAPT_ADP_DLEV_ONETIME_THRESHOLD_ADDR_FIELD_HIGH = 6;
localparam PMA_ADAPT_ADP_DLEV_ONETIME_THRESHOLD_ADDR_FIELD_SIZE = 3;
localparam PMA_ADAPT_ADP_DLEV_ONETIME_THRESHOLD_ADDR_FIELD_BITMASK = 32'h00000070;
localparam PMA_ADAPT_ADP_DLEV_ONETIME_THRESHOLD_ADDR_FIELD_VALMASK = 32'h00000070;
localparam PMA_ADAPT_ADP_DLEV_ONETIME_THRESHOLD_ADDR_FIELD_VALUE = 3'h7;

localparam PMA_ADAPT_ADP_DLEV_SEL_VALUE = "radp_dlev_sel_mux";
localparam PMA_ADAPT_ADP_DLEV_SEL_ADDR_OFST = 353;
localparam PMA_ADAPT_ADP_DLEV_SEL_ADDR_FIELD_OFST = 1;
localparam PMA_ADAPT_ADP_DLEV_SEL_ADDR_FIELD_HIGH = 2;
localparam PMA_ADAPT_ADP_DLEV_SEL_ADDR_FIELD_SIZE = 2;
localparam PMA_ADAPT_ADP_DLEV_SEL_ADDR_FIELD_BITMASK = 32'h00000006;
localparam PMA_ADAPT_ADP_DLEV_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_DLEV_SEL_ADDR_FIELD_VALUE = 2'h0;

localparam PMA_ADAPT_ADP_FORCE_FREQLOCK_VALUE = "radp_force_freqlock_use";
localparam PMA_ADAPT_ADP_FORCE_FREQLOCK_ADDR_OFST = 328;
localparam PMA_ADAPT_ADP_FORCE_FREQLOCK_ADDR_FIELD_OFST = 7;
localparam PMA_ADAPT_ADP_FORCE_FREQLOCK_ADDR_FIELD_HIGH = 7;
localparam PMA_ADAPT_ADP_FORCE_FREQLOCK_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_FORCE_FREQLOCK_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_ADAPT_ADP_FORCE_FREQLOCK_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_FORCE_FREQLOCK_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_FRAME_CAPTURE_VALUE = "radp_frame_capture_0";
localparam PMA_ADAPT_ADP_FRAME_CAPTURE_ADDR_OFST = 359;
localparam PMA_ADAPT_ADP_FRAME_CAPTURE_ADDR_FIELD_OFST = 7;
localparam PMA_ADAPT_ADP_FRAME_CAPTURE_ADDR_FIELD_HIGH = 7;
localparam PMA_ADAPT_ADP_FRAME_CAPTURE_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_FRAME_CAPTURE_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_ADAPT_ADP_FRAME_CAPTURE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_FRAME_CAPTURE_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_FRAME_EN_VALUE = "radp_frame_en_disable";
localparam PMA_ADAPT_ADP_FRAME_EN_ADDR_OFST = 342;
localparam PMA_ADAPT_ADP_FRAME_EN_ADDR_FIELD_OFST = 5;
localparam PMA_ADAPT_ADP_FRAME_EN_ADDR_FIELD_HIGH = 5;
localparam PMA_ADAPT_ADP_FRAME_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_FRAME_EN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_ADAPT_ADP_FRAME_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_FRAME_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_FRAME_ODI_SEL_VALUE = "radp_frame_odi_sel_deser_err";
localparam PMA_ADAPT_ADP_FRAME_ODI_SEL_ADDR_OFST = 355;
localparam PMA_ADAPT_ADP_FRAME_ODI_SEL_ADDR_FIELD_OFST = 7;
localparam PMA_ADAPT_ADP_FRAME_ODI_SEL_ADDR_FIELD_HIGH = 7;
localparam PMA_ADAPT_ADP_FRAME_ODI_SEL_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_FRAME_ODI_SEL_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_ADAPT_ADP_FRAME_ODI_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_FRAME_ODI_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_FRAME_OUT_SEL_VALUE = "radp_frame_out_sel_select_a";
localparam PMA_ADAPT_ADP_FRAME_OUT_SEL_ADDR_OFST = 342;
localparam PMA_ADAPT_ADP_FRAME_OUT_SEL_ADDR_FIELD_OFST = 6;
localparam PMA_ADAPT_ADP_FRAME_OUT_SEL_ADDR_FIELD_HIGH = 6;
localparam PMA_ADAPT_ADP_FRAME_OUT_SEL_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_FRAME_OUT_SEL_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_ADAPT_ADP_FRAME_OUT_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_FRAME_OUT_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_LOAD_SIG_SEL_VALUE = "radp_load_sig_sel_from_interanl";
localparam PMA_ADAPT_ADP_LOAD_SIG_SEL_ADDR_OFST = 329;
localparam PMA_ADAPT_ADP_LOAD_SIG_SEL_ADDR_FIELD_OFST = 6;
localparam PMA_ADAPT_ADP_LOAD_SIG_SEL_ADDR_FIELD_HIGH = 6;
localparam PMA_ADAPT_ADP_LOAD_SIG_SEL_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_LOAD_SIG_SEL_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_ADAPT_ADP_LOAD_SIG_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_LOAD_SIG_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_OC_ACCUM_DEPTH_VALUE = 4'd11;
localparam PMA_ADAPT_ADP_OC_ACCUM_DEPTH_ADDR_OFST = 331;
localparam PMA_ADAPT_ADP_OC_ACCUM_DEPTH_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_OC_ACCUM_DEPTH_ADDR_FIELD_HIGH = 3;
localparam PMA_ADAPT_ADP_OC_ACCUM_DEPTH_ADDR_FIELD_SIZE = 4;
localparam PMA_ADAPT_ADP_OC_ACCUM_DEPTH_ADDR_FIELD_BITMASK = 32'h0000000F;
localparam PMA_ADAPT_ADP_OC_ACCUM_DEPTH_ADDR_FIELD_VALMASK = 32'h0000000B;
localparam PMA_ADAPT_ADP_OC_ACCUM_DEPTH_ADDR_FIELD_VALUE = 4'hB;

localparam PMA_ADAPT_ADP_OC_BYPASS_VALUE = "radp_oc_bypass_bypass";
localparam PMA_ADAPT_ADP_OC_BYPASS_ADDR_OFST = 361;
localparam PMA_ADAPT_ADP_OC_BYPASS_ADDR_FIELD_OFST = 7;
localparam PMA_ADAPT_ADP_OC_BYPASS_ADDR_FIELD_HIGH = 7;
localparam PMA_ADAPT_ADP_OC_BYPASS_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_OC_BYPASS_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_ADAPT_ADP_OC_BYPASS_ADDR_FIELD_VALMASK = 32'h00000080;
localparam PMA_ADAPT_ADP_OC_BYPASS_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_ADAPT_ADP_OC_EN_VALUE = "radp_oc_en_disable";
localparam PMA_ADAPT_ADP_OC_EN_ADDR_OFST = 349;
localparam PMA_ADAPT_ADP_OC_EN_ADDR_FIELD_OFST = 4;
localparam PMA_ADAPT_ADP_OC_EN_ADDR_FIELD_HIGH = 4;
localparam PMA_ADAPT_ADP_OC_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_OC_EN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam PMA_ADAPT_ADP_OC_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_OC_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_OC_HOLD_EN_VALUE = "radp_oc_hold_en_not_hold";
localparam PMA_ADAPT_ADP_OC_HOLD_EN_ADDR_OFST = 344;
localparam PMA_ADAPT_ADP_OC_HOLD_EN_ADDR_FIELD_OFST = 7;
localparam PMA_ADAPT_ADP_OC_HOLD_EN_ADDR_FIELD_HIGH = 7;
localparam PMA_ADAPT_ADP_OC_HOLD_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_OC_HOLD_EN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_ADAPT_ADP_OC_HOLD_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_OC_HOLD_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_OC_INITIAL_LOAD_VALUE = "radp_oc_initial_load_0";
localparam PMA_ADAPT_ADP_OC_INITIAL_LOAD_ADDR_OFST = 349;
localparam PMA_ADAPT_ADP_OC_INITIAL_LOAD_ADDR_FIELD_OFST = 5;
localparam PMA_ADAPT_ADP_OC_INITIAL_LOAD_ADDR_FIELD_HIGH = 5;
localparam PMA_ADAPT_ADP_OC_INITIAL_LOAD_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_OC_INITIAL_LOAD_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_ADAPT_ADP_OC_INITIAL_LOAD_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_OC_INITIAL_LOAD_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_OC_INITIAL_SIGN_VALUE = "radp_oc_initial_sign_0";
localparam PMA_ADAPT_ADP_OC_INITIAL_SIGN_ADDR_OFST = 283;
localparam PMA_ADAPT_ADP_OC_INITIAL_SIGN_ADDR_FIELD_OFST = 2;
localparam PMA_ADAPT_ADP_OC_INITIAL_SIGN_ADDR_FIELD_HIGH = 2;
localparam PMA_ADAPT_ADP_OC_INITIAL_SIGN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_OC_INITIAL_SIGN_ADDR_FIELD_BITMASK = 32'h00000004;
localparam PMA_ADAPT_ADP_OC_INITIAL_SIGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_OC_INITIAL_SIGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_OC_ONETIME_VALUE = "radp_oc_onetime_disable";
localparam PMA_ADAPT_ADP_OC_ONETIME_ADDR_OFST = 344;
localparam PMA_ADAPT_ADP_OC_ONETIME_ADDR_FIELD_OFST = 3;
localparam PMA_ADAPT_ADP_OC_ONETIME_ADDR_FIELD_HIGH = 3;
localparam PMA_ADAPT_ADP_OC_ONETIME_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_OC_ONETIME_ADDR_FIELD_BITMASK = 32'h00000008;
localparam PMA_ADAPT_ADP_OC_ONETIME_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_OC_ONETIME_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_OC_ONETIME_THRESHOLD_VALUE = "radp_oc_onetime_threshold_1024";
localparam PMA_ADAPT_ADP_OC_ONETIME_THRESHOLD_ADDR_OFST = 355;
localparam PMA_ADAPT_ADP_OC_ONETIME_THRESHOLD_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_OC_ONETIME_THRESHOLD_ADDR_FIELD_HIGH = 2;
localparam PMA_ADAPT_ADP_OC_ONETIME_THRESHOLD_ADDR_FIELD_SIZE = 3;
localparam PMA_ADAPT_ADP_OC_ONETIME_THRESHOLD_ADDR_FIELD_BITMASK = 32'h00000007;
localparam PMA_ADAPT_ADP_OC_ONETIME_THRESHOLD_ADDR_FIELD_VALMASK = 32'h00000005;
localparam PMA_ADAPT_ADP_OC_ONETIME_THRESHOLD_ADDR_FIELD_VALUE = 3'h5;

localparam PMA_ADAPT_ADP_ODI_BIT_SEL_VALUE = "radp_odi_bit_sel_all_bits";
localparam PMA_ADAPT_ADP_ODI_BIT_SEL_ADDR_OFST = 343;
localparam PMA_ADAPT_ADP_ODI_BIT_SEL_ADDR_FIELD_OFST = 2;
localparam PMA_ADAPT_ADP_ODI_BIT_SEL_ADDR_FIELD_HIGH = 3;
localparam PMA_ADAPT_ADP_ODI_BIT_SEL_ADDR_FIELD_SIZE = 2;
localparam PMA_ADAPT_ADP_ODI_BIT_SEL_ADDR_FIELD_BITMASK = 32'h0000000C;
localparam PMA_ADAPT_ADP_ODI_BIT_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_ODI_BIT_SEL_ADDR_FIELD_VALUE = 2'h0;

localparam PMA_ADAPT_ADP_ODI_CONTROL_SEL_VALUE = "radp_odi_control_sel_from_cram";
localparam PMA_ADAPT_ADP_ODI_CONTROL_SEL_ADDR_OFST = 344;
localparam PMA_ADAPT_ADP_ODI_CONTROL_SEL_ADDR_FIELD_OFST = 5;
localparam PMA_ADAPT_ADP_ODI_CONTROL_SEL_ADDR_FIELD_HIGH = 5;
localparam PMA_ADAPT_ADP_ODI_CONTROL_SEL_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_ODI_CONTROL_SEL_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_ADAPT_ADP_ODI_CONTROL_SEL_ADDR_FIELD_VALMASK = 32'h00000020;
localparam PMA_ADAPT_ADP_ODI_CONTROL_SEL_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_ADAPT_ADP_ODI_COUNT_THRESHOLD_VALUE = "radp_odi_count_threshold_1e6";
localparam PMA_ADAPT_ADP_ODI_COUNT_THRESHOLD_ADDR0_OFST = 360;
localparam PMA_ADAPT_ADP_ODI_COUNT_THRESHOLD_ADDR0_FIELD_OFST = 5;
localparam PMA_ADAPT_ADP_ODI_COUNT_THRESHOLD_ADDR0_FIELD_HIGH = 5;
localparam PMA_ADAPT_ADP_ODI_COUNT_THRESHOLD_ADDR0_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_ODI_COUNT_THRESHOLD_ADDR0_FIELD_BITMASK = 32'h00000020;
localparam PMA_ADAPT_ADP_ODI_COUNT_THRESHOLD_ADDR0_FIELD_VALMASK = 32'h00000020;
localparam PMA_ADAPT_ADP_ODI_COUNT_THRESHOLD_ADDR0_FIELD_VALUE = 1'h1;
localparam PMA_ADAPT_ADP_ODI_COUNT_THRESHOLD_ADDR1_OFST = 361;
localparam PMA_ADAPT_ADP_ODI_COUNT_THRESHOLD_ADDR1_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_ODI_COUNT_THRESHOLD_ADDR1_FIELD_HIGH = 1;
localparam PMA_ADAPT_ADP_ODI_COUNT_THRESHOLD_ADDR1_FIELD_SIZE = 2;
localparam PMA_ADAPT_ADP_ODI_COUNT_THRESHOLD_ADDR1_FIELD_BITMASK = 32'h00000003;
localparam PMA_ADAPT_ADP_ODI_COUNT_THRESHOLD_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_ODI_COUNT_THRESHOLD_ADDR1_FIELD_VALUE = 2'h0;

localparam PMA_ADAPT_ADP_ODI_DFE_SPEC_EN_VALUE = "radp_odi_dfe_spec_en_enable";
localparam PMA_ADAPT_ADP_ODI_DFE_SPEC_EN_ADDR_OFST = 361;
localparam PMA_ADAPT_ADP_ODI_DFE_SPEC_EN_ADDR_FIELD_OFST = 2;
localparam PMA_ADAPT_ADP_ODI_DFE_SPEC_EN_ADDR_FIELD_HIGH = 2;
localparam PMA_ADAPT_ADP_ODI_DFE_SPEC_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_ODI_DFE_SPEC_EN_ADDR_FIELD_BITMASK = 32'h00000004;
localparam PMA_ADAPT_ADP_ODI_DFE_SPEC_EN_ADDR_FIELD_VALMASK = 32'h00000004;
localparam PMA_ADAPT_ADP_ODI_DFE_SPEC_EN_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_ADAPT_ADP_ODI_DLEV_SEL_VALUE = "radp_odi_dlev_sel_0";
localparam PMA_ADAPT_ADP_ODI_DLEV_SEL_ADDR_OFST = 324;
localparam PMA_ADAPT_ADP_ODI_DLEV_SEL_ADDR_FIELD_OFST = 2;
localparam PMA_ADAPT_ADP_ODI_DLEV_SEL_ADDR_FIELD_HIGH = 2;
localparam PMA_ADAPT_ADP_ODI_DLEV_SEL_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_ODI_DLEV_SEL_ADDR_FIELD_BITMASK = 32'h00000004;
localparam PMA_ADAPT_ADP_ODI_DLEV_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_ODI_DLEV_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_ODI_EN_VALUE = "radp_odi_en_disable";
localparam PMA_ADAPT_ADP_ODI_EN_ADDR_OFST = 360;
localparam PMA_ADAPT_ADP_ODI_EN_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_ODI_EN_ADDR_FIELD_HIGH = 0;
localparam PMA_ADAPT_ADP_ODI_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_ODI_EN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_ADAPT_ADP_ODI_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_ODI_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_ODI_MODE_VALUE = "radp_odi_mode_detect_errdata";
localparam PMA_ADAPT_ADP_ODI_MODE_ADDR_OFST = 361;
localparam PMA_ADAPT_ADP_ODI_MODE_ADDR_FIELD_OFST = 6;
localparam PMA_ADAPT_ADP_ODI_MODE_ADDR_FIELD_HIGH = 6;
localparam PMA_ADAPT_ADP_ODI_MODE_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_ODI_MODE_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_ADAPT_ADP_ODI_MODE_ADDR_FIELD_VALMASK = 32'h00000040;
localparam PMA_ADAPT_ADP_ODI_MODE_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_ADAPT_ADP_ODI_RSTN_VALUE = "radp_odi_rstn_1";
localparam PMA_ADAPT_ADP_ODI_RSTN_ADDR_OFST = 360;
localparam PMA_ADAPT_ADP_ODI_RSTN_ADDR_FIELD_OFST = 1;
localparam PMA_ADAPT_ADP_ODI_RSTN_ADDR_FIELD_HIGH = 1;
localparam PMA_ADAPT_ADP_ODI_RSTN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_ODI_RSTN_ADDR_FIELD_BITMASK = 32'h00000002;
localparam PMA_ADAPT_ADP_ODI_RSTN_ADDR_FIELD_VALMASK = 32'h00000002;
localparam PMA_ADAPT_ADP_ODI_RSTN_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_ADAPT_ADP_ODI_SPEC_SEL_VALUE = "radp_odi_spec_sel_0";
localparam PMA_ADAPT_ADP_ODI_SPEC_SEL_ADDR_OFST = 333;
localparam PMA_ADAPT_ADP_ODI_SPEC_SEL_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_ODI_SPEC_SEL_ADDR_FIELD_HIGH = 0;
localparam PMA_ADAPT_ADP_ODI_SPEC_SEL_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_ODI_SPEC_SEL_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_ADAPT_ADP_ODI_SPEC_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_ODI_SPEC_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_ODI_START_VALUE = "radp_odi_start_0";
localparam PMA_ADAPT_ADP_ODI_START_ADDR_OFST = 360;
localparam PMA_ADAPT_ADP_ODI_START_ADDR_FIELD_OFST = 2;
localparam PMA_ADAPT_ADP_ODI_START_ADDR_FIELD_HIGH = 2;
localparam PMA_ADAPT_ADP_ODI_START_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_ODI_START_ADDR_FIELD_BITMASK = 32'h00000004;
localparam PMA_ADAPT_ADP_ODI_START_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_ODI_START_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_AVG_WIN_VALUE = "radp_pat_dlev_sign_avg_win_2x";
localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_AVG_WIN_ADDR_OFST = 354;
localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_AVG_WIN_ADDR_FIELD_OFST = 6;
localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_AVG_WIN_ADDR_FIELD_HIGH = 7;
localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_AVG_WIN_ADDR_FIELD_SIZE = 2;
localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_AVG_WIN_ADDR_FIELD_BITMASK = 32'h000000C0;
localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_AVG_WIN_ADDR_FIELD_VALMASK = 32'h00000040;
localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_AVG_WIN_ADDR_FIELD_VALUE = 2'h1;

localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_FORCE_VALUE = "radp_pat_dlev_sign_force_determined_by_cram";
localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_FORCE_ADDR_OFST = 350;
localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_FORCE_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_FORCE_ADDR_FIELD_HIGH = 0;
localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_FORCE_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_FORCE_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_FORCE_ADDR_FIELD_VALMASK = 32'h00000001;
localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_FORCE_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_VALUE_VALUE = "radp_pat_dlev_sign_value_1";
localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_VALUE_ADDR_OFST = 350;
localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_VALUE_ADDR_FIELD_OFST = 1;
localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_VALUE_ADDR_FIELD_HIGH = 1;
localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_VALUE_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_VALUE_ADDR_FIELD_BITMASK = 32'h00000002;
localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_VALUE_ADDR_FIELD_VALMASK = 32'h00000002;
localparam PMA_ADAPT_ADP_PAT_DLEV_SIGN_VALUE_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_AVG_WIN_VALUE = "radp_pat_spec_sign_avg_win_256";
localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_AVG_WIN_ADDR_OFST = 350;
localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_AVG_WIN_ADDR_FIELD_OFST = 5;
localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_AVG_WIN_ADDR_FIELD_HIGH = 7;
localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_AVG_WIN_ADDR_FIELD_SIZE = 3;
localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_AVG_WIN_ADDR_FIELD_BITMASK = 32'h000000E0;
localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_AVG_WIN_ADDR_FIELD_VALMASK = 32'h00000060;
localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_AVG_WIN_ADDR_FIELD_VALUE = 3'h3;

localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_FORCE_VALUE = "radp_pat_spec_sign_force_generated_internally";
localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_FORCE_ADDR_OFST = 350;
localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_FORCE_ADDR_FIELD_OFST = 2;
localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_FORCE_ADDR_FIELD_HIGH = 2;
localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_FORCE_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_FORCE_ADDR_FIELD_BITMASK = 32'h00000004;
localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_FORCE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_FORCE_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_VALUE_VALUE = "radp_pat_spec_sign_value_0";
localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_VALUE_ADDR_OFST = 330;
localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_VALUE_ADDR_FIELD_OFST = 7;
localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_VALUE_ADDR_FIELD_HIGH = 7;
localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_VALUE_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_VALUE_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_VALUE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_PAT_SPEC_SIGN_VALUE_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_PAT_TRANS_FILTER_VALUE = "radp_pat_trans_filter_5";
localparam PMA_ADAPT_ADP_PAT_TRANS_FILTER_ADDR_OFST = 351;
localparam PMA_ADAPT_ADP_PAT_TRANS_FILTER_ADDR_FIELD_OFST = 1;
localparam PMA_ADAPT_ADP_PAT_TRANS_FILTER_ADDR_FIELD_HIGH = 2;
localparam PMA_ADAPT_ADP_PAT_TRANS_FILTER_ADDR_FIELD_SIZE = 2;
localparam PMA_ADAPT_ADP_PAT_TRANS_FILTER_ADDR_FIELD_BITMASK = 32'h00000006;
localparam PMA_ADAPT_ADP_PAT_TRANS_FILTER_ADDR_FIELD_VALMASK = 32'h00000006;
localparam PMA_ADAPT_ADP_PAT_TRANS_FILTER_ADDR_FIELD_VALUE = 2'h3;

localparam PMA_ADAPT_ADP_PAT_TRANS_ONLY_EN_VALUE = "radp_pat_trans_only_en_enable";
localparam PMA_ADAPT_ADP_PAT_TRANS_ONLY_EN_ADDR_OFST = 353;
localparam PMA_ADAPT_ADP_PAT_TRANS_ONLY_EN_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_PAT_TRANS_ONLY_EN_ADDR_FIELD_HIGH = 0;
localparam PMA_ADAPT_ADP_PAT_TRANS_ONLY_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_PAT_TRANS_ONLY_EN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_ADAPT_ADP_PAT_TRANS_ONLY_EN_ADDR_FIELD_VALMASK = 32'h00000001;
localparam PMA_ADAPT_ADP_PAT_TRANS_ONLY_EN_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_ADAPT_ADP_PCIE_ADP_BYPASS_VALUE = "radp_pcie_adp_bypass_no";
localparam PMA_ADAPT_ADP_PCIE_ADP_BYPASS_ADDR_OFST = 357;
localparam PMA_ADAPT_ADP_PCIE_ADP_BYPASS_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_PCIE_ADP_BYPASS_ADDR_FIELD_HIGH = 0;
localparam PMA_ADAPT_ADP_PCIE_ADP_BYPASS_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_PCIE_ADP_BYPASS_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_ADAPT_ADP_PCIE_ADP_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_PCIE_ADP_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_PCIE_EQZ_VALUE = "radp_pcie_eqz_non_pcie_mode";
localparam PMA_ADAPT_ADP_PCIE_EQZ_ADDR_OFST = 347;
localparam PMA_ADAPT_ADP_PCIE_EQZ_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_PCIE_EQZ_ADDR_FIELD_HIGH = 0;
localparam PMA_ADAPT_ADP_PCIE_EQZ_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_PCIE_EQZ_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_ADAPT_ADP_PCIE_EQZ_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_PCIE_EQZ_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_PCIE_HOLD_SEL_VALUE = 4'd0;
localparam PMA_ADAPT_ADP_PCIE_HOLD_SEL_ADDR_OFST = 330;
localparam PMA_ADAPT_ADP_PCIE_HOLD_SEL_ADDR_FIELD_OFST = 1;
localparam PMA_ADAPT_ADP_PCIE_HOLD_SEL_ADDR_FIELD_HIGH = 4;
localparam PMA_ADAPT_ADP_PCIE_HOLD_SEL_ADDR_FIELD_SIZE = 4;
localparam PMA_ADAPT_ADP_PCIE_HOLD_SEL_ADDR_FIELD_BITMASK = 32'h0000001E;
localparam PMA_ADAPT_ADP_PCIE_HOLD_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_PCIE_HOLD_SEL_ADDR_FIELD_VALUE = 4'h0;

localparam PMA_ADAPT_ADP_PCS_OPTION_VALUE = "radp_pcs_option_0";
localparam PMA_ADAPT_ADP_PCS_OPTION_ADDR_OFST = 330;
localparam PMA_ADAPT_ADP_PCS_OPTION_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_PCS_OPTION_ADDR_FIELD_HIGH = 0;
localparam PMA_ADAPT_ADP_PCS_OPTION_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_PCS_OPTION_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_ADAPT_ADP_PCS_OPTION_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_PCS_OPTION_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_PO_ACTSLP_RATIO_VALUE = "radp_po_actslp_ratio_10_percent";
localparam PMA_ADAPT_ADP_PO_ACTSLP_RATIO_ADDR_OFST = 331;
localparam PMA_ADAPT_ADP_PO_ACTSLP_RATIO_ADDR_FIELD_OFST = 6;
localparam PMA_ADAPT_ADP_PO_ACTSLP_RATIO_ADDR_FIELD_HIGH = 7;
localparam PMA_ADAPT_ADP_PO_ACTSLP_RATIO_ADDR_FIELD_SIZE = 2;
localparam PMA_ADAPT_ADP_PO_ACTSLP_RATIO_ADDR_FIELD_BITMASK = 32'h000000C0;
localparam PMA_ADAPT_ADP_PO_ACTSLP_RATIO_ADDR_FIELD_VALMASK = 32'h00000080;
localparam PMA_ADAPT_ADP_PO_ACTSLP_RATIO_ADDR_FIELD_VALUE = 2'h2;

localparam PMA_ADAPT_ADP_PO_EN_VALUE = "radp_po_en_disable";
localparam PMA_ADAPT_ADP_PO_EN_ADDR_OFST = 333;
localparam PMA_ADAPT_ADP_PO_EN_ADDR_FIELD_OFST = 3;
localparam PMA_ADAPT_ADP_PO_EN_ADDR_FIELD_HIGH = 3;
localparam PMA_ADAPT_ADP_PO_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_PO_EN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam PMA_ADAPT_ADP_PO_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_PO_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_PO_GB_ACT2SLP_VALUE = "radp_po_gb_act2slp_288ns";
localparam PMA_ADAPT_ADP_PO_GB_ACT2SLP_ADDR_OFST = 377;
localparam PMA_ADAPT_ADP_PO_GB_ACT2SLP_ADDR_FIELD_OFST = 5;
localparam PMA_ADAPT_ADP_PO_GB_ACT2SLP_ADDR_FIELD_HIGH = 6;
localparam PMA_ADAPT_ADP_PO_GB_ACT2SLP_ADDR_FIELD_SIZE = 2;
localparam PMA_ADAPT_ADP_PO_GB_ACT2SLP_ADDR_FIELD_BITMASK = 32'h00000060;
localparam PMA_ADAPT_ADP_PO_GB_ACT2SLP_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_PO_GB_ACT2SLP_ADDR_FIELD_VALUE = 2'h0;

localparam PMA_ADAPT_ADP_PO_GB_SLP2ACT_VALUE = "radp_po_gb_slp2act_288ns";
localparam PMA_ADAPT_ADP_PO_GB_SLP2ACT_ADDR_OFST = 377;
localparam PMA_ADAPT_ADP_PO_GB_SLP2ACT_ADDR_FIELD_OFST = 3;
localparam PMA_ADAPT_ADP_PO_GB_SLP2ACT_ADDR_FIELD_HIGH = 4;
localparam PMA_ADAPT_ADP_PO_GB_SLP2ACT_ADDR_FIELD_SIZE = 2;
localparam PMA_ADAPT_ADP_PO_GB_SLP2ACT_ADDR_FIELD_BITMASK = 32'h00000018;
localparam PMA_ADAPT_ADP_PO_GB_SLP2ACT_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_PO_GB_SLP2ACT_ADDR_FIELD_VALUE = 2'h0;

localparam PMA_ADAPT_ADP_PO_INITWAIT_VALUE = "radp_po_initwait_10sec";
localparam PMA_ADAPT_ADP_PO_INITWAIT_ADDR_OFST = 343;
localparam PMA_ADAPT_ADP_PO_INITWAIT_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_PO_INITWAIT_ADDR_FIELD_HIGH = 1;
localparam PMA_ADAPT_ADP_PO_INITWAIT_ADDR_FIELD_SIZE = 2;
localparam PMA_ADAPT_ADP_PO_INITWAIT_ADDR_FIELD_BITMASK = 32'h00000003;
localparam PMA_ADAPT_ADP_PO_INITWAIT_ADDR_FIELD_VALMASK = 32'h00000002;
localparam PMA_ADAPT_ADP_PO_INITWAIT_ADDR_FIELD_VALUE = 2'h2;

localparam PMA_ADAPT_ADP_PO_SLEEP_WIN_VALUE = "radp_po_sleep_win_2_sec";
localparam PMA_ADAPT_ADP_PO_SLEEP_WIN_ADDR_OFST = 332;
localparam PMA_ADAPT_ADP_PO_SLEEP_WIN_ADDR_FIELD_OFST = 1;
localparam PMA_ADAPT_ADP_PO_SLEEP_WIN_ADDR_FIELD_HIGH = 2;
localparam PMA_ADAPT_ADP_PO_SLEEP_WIN_ADDR_FIELD_SIZE = 2;
localparam PMA_ADAPT_ADP_PO_SLEEP_WIN_ADDR_FIELD_BITMASK = 32'h00000006;
localparam PMA_ADAPT_ADP_PO_SLEEP_WIN_ADDR_FIELD_VALMASK = 32'h00000004;
localparam PMA_ADAPT_ADP_PO_SLEEP_WIN_ADDR_FIELD_VALUE = 2'h2;

localparam PMA_ADAPT_ADP_RSTN_VALUE = "radp_rstn_1";
localparam PMA_ADAPT_ADP_RSTN_ADDR_OFST = 328;
localparam PMA_ADAPT_ADP_RSTN_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_RSTN_ADDR_FIELD_HIGH = 0;
localparam PMA_ADAPT_ADP_RSTN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_RSTN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_ADAPT_ADP_RSTN_ADDR_FIELD_VALMASK = 32'h00000001;
localparam PMA_ADAPT_ADP_RSTN_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_ADAPT_ADP_STATUS_SEL_VALUE = "radp_status_sel_0";
localparam PMA_ADAPT_ADP_STATUS_SEL_ADDR_OFST = 329;
localparam PMA_ADAPT_ADP_STATUS_SEL_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_STATUS_SEL_ADDR_FIELD_HIGH = 5;
localparam PMA_ADAPT_ADP_STATUS_SEL_ADDR_FIELD_SIZE = 6;
localparam PMA_ADAPT_ADP_STATUS_SEL_ADDR_FIELD_BITMASK = 32'h0000003F;
localparam PMA_ADAPT_ADP_STATUS_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_STATUS_SEL_ADDR_FIELD_VALUE = 6'h0;

localparam PMA_ADAPT_ADP_TX_ACCUM_DEPTH_VALUE = 3'd4;
localparam PMA_ADAPT_ADP_TX_ACCUM_DEPTH_ADDR_OFST = 361;
localparam PMA_ADAPT_ADP_TX_ACCUM_DEPTH_ADDR_FIELD_OFST = 3;
localparam PMA_ADAPT_ADP_TX_ACCUM_DEPTH_ADDR_FIELD_HIGH = 5;
localparam PMA_ADAPT_ADP_TX_ACCUM_DEPTH_ADDR_FIELD_SIZE = 3;
localparam PMA_ADAPT_ADP_TX_ACCUM_DEPTH_ADDR_FIELD_BITMASK = 32'h00000038;
localparam PMA_ADAPT_ADP_TX_ACCUM_DEPTH_ADDR_FIELD_VALMASK = 32'h00000020;
localparam PMA_ADAPT_ADP_TX_ACCUM_DEPTH_ADDR_FIELD_VALUE = 3'h4;

localparam PMA_ADAPT_ADP_TX_ADP_ACCUMULATE_VALUE = "radp_tx_adp_accumulate_0";
localparam PMA_ADAPT_ADP_TX_ADP_ACCUMULATE_ADDR_OFST = 328;
localparam PMA_ADAPT_ADP_TX_ADP_ACCUMULATE_ADDR_FIELD_OFST = 6;
localparam PMA_ADAPT_ADP_TX_ADP_ACCUMULATE_ADDR_FIELD_HIGH = 6;
localparam PMA_ADAPT_ADP_TX_ADP_ACCUMULATE_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_TX_ADP_ACCUMULATE_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_ADAPT_ADP_TX_ADP_ACCUMULATE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_TX_ADP_ACCUMULATE_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_TX_ADP_EN_VALUE = "radp_tx_adp_en_0";
localparam PMA_ADAPT_ADP_TX_ADP_EN_ADDR_OFST = 333;
localparam PMA_ADAPT_ADP_TX_ADP_EN_ADDR_FIELD_OFST = 7;
localparam PMA_ADAPT_ADP_TX_ADP_EN_ADDR_FIELD_HIGH = 7;
localparam PMA_ADAPT_ADP_TX_ADP_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_TX_ADP_EN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_ADAPT_ADP_TX_ADP_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_TX_ADP_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_TX_UP_DN_FLIP_VALUE = "radp_tx_up_dn_flip_0";
localparam PMA_ADAPT_ADP_TX_UP_DN_FLIP_ADDR_OFST = 346;
localparam PMA_ADAPT_ADP_TX_UP_DN_FLIP_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_TX_UP_DN_FLIP_ADDR_FIELD_HIGH = 0;
localparam PMA_ADAPT_ADP_TX_UP_DN_FLIP_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_TX_UP_DN_FLIP_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_ADAPT_ADP_TX_UP_DN_FLIP_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_TX_UP_DN_FLIP_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_VGA_ACCUM_DEPTH_VALUE = 4'd9;
localparam PMA_ADAPT_ADP_VGA_ACCUM_DEPTH_ADDR0_OFST = 348;
localparam PMA_ADAPT_ADP_VGA_ACCUM_DEPTH_ADDR0_FIELD_OFST = 4;
localparam PMA_ADAPT_ADP_VGA_ACCUM_DEPTH_ADDR0_FIELD_HIGH = 4;
localparam PMA_ADAPT_ADP_VGA_ACCUM_DEPTH_ADDR0_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_VGA_ACCUM_DEPTH_ADDR0_FIELD_BITMASK = 32'h00000010;
localparam PMA_ADAPT_ADP_VGA_ACCUM_DEPTH_ADDR0_FIELD_VALMASK = 32'h00000010;
localparam PMA_ADAPT_ADP_VGA_ACCUM_DEPTH_ADDR0_FIELD_VALUE = 1'h1;
localparam PMA_ADAPT_ADP_VGA_ACCUM_DEPTH_ADDR1_OFST = 357;
localparam PMA_ADAPT_ADP_VGA_ACCUM_DEPTH_ADDR1_FIELD_OFST = 5;
localparam PMA_ADAPT_ADP_VGA_ACCUM_DEPTH_ADDR1_FIELD_HIGH = 7;
localparam PMA_ADAPT_ADP_VGA_ACCUM_DEPTH_ADDR1_FIELD_SIZE = 3;
localparam PMA_ADAPT_ADP_VGA_ACCUM_DEPTH_ADDR1_FIELD_BITMASK = 32'h000000E0;
localparam PMA_ADAPT_ADP_VGA_ACCUM_DEPTH_ADDR1_FIELD_VALMASK = 32'h00000020;
localparam PMA_ADAPT_ADP_VGA_ACCUM_DEPTH_ADDR1_FIELD_VALUE = 3'h1;

localparam PMA_ADAPT_ADP_VGA_BYPASS_VALUE = "radp_vga_bypass_bypass";
localparam PMA_ADAPT_ADP_VGA_BYPASS_ADDR_OFST = 329;
localparam PMA_ADAPT_ADP_VGA_BYPASS_ADDR_FIELD_OFST = 7;
localparam PMA_ADAPT_ADP_VGA_BYPASS_ADDR_FIELD_HIGH = 7;
localparam PMA_ADAPT_ADP_VGA_BYPASS_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_VGA_BYPASS_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_ADAPT_ADP_VGA_BYPASS_ADDR_FIELD_VALMASK = 32'h00000080;
localparam PMA_ADAPT_ADP_VGA_BYPASS_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_ADAPT_ADP_VGA_CTLE_LOW_LIMIT_VALUE = "radp_vga_ctle_low_limit_0";
localparam PMA_ADAPT_ADP_VGA_CTLE_LOW_LIMIT_ADDR_OFST = 344;
localparam PMA_ADAPT_ADP_VGA_CTLE_LOW_LIMIT_ADDR_FIELD_OFST = 6;
localparam PMA_ADAPT_ADP_VGA_CTLE_LOW_LIMIT_ADDR_FIELD_HIGH = 6;
localparam PMA_ADAPT_ADP_VGA_CTLE_LOW_LIMIT_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_VGA_CTLE_LOW_LIMIT_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_ADAPT_ADP_VGA_CTLE_LOW_LIMIT_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_VGA_CTLE_LOW_LIMIT_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_VGA_DLEV_OFFSET_VALUE = 3'd4;
localparam PMA_ADAPT_ADP_VGA_DLEV_OFFSET_ADDR_OFST = 358;
localparam PMA_ADAPT_ADP_VGA_DLEV_OFFSET_ADDR_FIELD_OFST = 5;
localparam PMA_ADAPT_ADP_VGA_DLEV_OFFSET_ADDR_FIELD_HIGH = 7;
localparam PMA_ADAPT_ADP_VGA_DLEV_OFFSET_ADDR_FIELD_SIZE = 3;
localparam PMA_ADAPT_ADP_VGA_DLEV_OFFSET_ADDR_FIELD_BITMASK = 32'h000000E0;
localparam PMA_ADAPT_ADP_VGA_DLEV_OFFSET_ADDR_FIELD_VALMASK = 32'h00000080;
localparam PMA_ADAPT_ADP_VGA_DLEV_OFFSET_ADDR_FIELD_VALUE = 3'h4;

localparam PMA_ADAPT_ADP_VGA_DLEV_TARGET_VALUE = 5'd15;
localparam PMA_ADAPT_ADP_VGA_DLEV_TARGET_ADDR_OFST = 358;
localparam PMA_ADAPT_ADP_VGA_DLEV_TARGET_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_VGA_DLEV_TARGET_ADDR_FIELD_HIGH = 4;
localparam PMA_ADAPT_ADP_VGA_DLEV_TARGET_ADDR_FIELD_SIZE = 5;
localparam PMA_ADAPT_ADP_VGA_DLEV_TARGET_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam PMA_ADAPT_ADP_VGA_DLEV_TARGET_ADDR_FIELD_VALMASK = 32'h0000000F;
localparam PMA_ADAPT_ADP_VGA_DLEV_TARGET_ADDR_FIELD_VALUE = 5'hF;

localparam PMA_ADAPT_ADP_VGA_EN_VALUE = "radp_vga_en_disable";
localparam PMA_ADAPT_ADP_VGA_EN_ADDR_OFST = 328;
localparam PMA_ADAPT_ADP_VGA_EN_ADDR_FIELD_OFST = 4;
localparam PMA_ADAPT_ADP_VGA_EN_ADDR_FIELD_HIGH = 4;
localparam PMA_ADAPT_ADP_VGA_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_VGA_EN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam PMA_ADAPT_ADP_VGA_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_VGA_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_VGA_HOLD_EN_VALUE = "radp_vga_hold_en_not_hold";
localparam PMA_ADAPT_ADP_VGA_HOLD_EN_ADDR_OFST = 333;
localparam PMA_ADAPT_ADP_VGA_HOLD_EN_ADDR_FIELD_OFST = 4;
localparam PMA_ADAPT_ADP_VGA_HOLD_EN_ADDR_FIELD_HIGH = 4;
localparam PMA_ADAPT_ADP_VGA_HOLD_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_VGA_HOLD_EN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam PMA_ADAPT_ADP_VGA_HOLD_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_VGA_HOLD_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_VGA_INITIAL_LOAD_VALUE = "radp_vga_initial_load_0";
localparam PMA_ADAPT_ADP_VGA_INITIAL_LOAD_ADDR_OFST = 343;
localparam PMA_ADAPT_ADP_VGA_INITIAL_LOAD_ADDR_FIELD_OFST = 6;
localparam PMA_ADAPT_ADP_VGA_INITIAL_LOAD_ADDR_FIELD_HIGH = 6;
localparam PMA_ADAPT_ADP_VGA_INITIAL_LOAD_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_VGA_INITIAL_LOAD_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_ADAPT_ADP_VGA_INITIAL_LOAD_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_VGA_INITIAL_LOAD_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_VGA_INITIAL_VALUE_VALUE = "radp_vga_initial_value_4";
localparam PMA_ADAPT_ADP_VGA_INITIAL_VALUE_ADDR_OFST = 359;
localparam PMA_ADAPT_ADP_VGA_INITIAL_VALUE_ADDR_FIELD_OFST = 0;
localparam PMA_ADAPT_ADP_VGA_INITIAL_VALUE_ADDR_FIELD_HIGH = 1;
localparam PMA_ADAPT_ADP_VGA_INITIAL_VALUE_ADDR_FIELD_SIZE = 2;
localparam PMA_ADAPT_ADP_VGA_INITIAL_VALUE_ADDR_FIELD_BITMASK = 32'h00000003;
localparam PMA_ADAPT_ADP_VGA_INITIAL_VALUE_ADDR_FIELD_VALMASK = 32'h00000001;
localparam PMA_ADAPT_ADP_VGA_INITIAL_VALUE_ADDR_FIELD_VALUE = 2'h1;

localparam PMA_ADAPT_ADP_VGA_ONETIME_VALUE = "radp_vga_onetime_disable";
localparam PMA_ADAPT_ADP_VGA_ONETIME_ADDR_OFST = 351;
localparam PMA_ADAPT_ADP_VGA_ONETIME_ADDR_FIELD_OFST = 7;
localparam PMA_ADAPT_ADP_VGA_ONETIME_ADDR_FIELD_HIGH = 7;
localparam PMA_ADAPT_ADP_VGA_ONETIME_ADDR_FIELD_SIZE = 1;
localparam PMA_ADAPT_ADP_VGA_ONETIME_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_ADAPT_ADP_VGA_ONETIME_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_ADAPT_ADP_VGA_ONETIME_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_ADAPT_ADP_VGA_ONETIME_THRESHOLD_VALUE = "radp_vga_onetime_threshold_512";
localparam PMA_ADAPT_ADP_VGA_ONETIME_THRESHOLD_ADDR_OFST = 347;
localparam PMA_ADAPT_ADP_VGA_ONETIME_THRESHOLD_ADDR_FIELD_OFST = 4;
localparam PMA_ADAPT_ADP_VGA_ONETIME_THRESHOLD_ADDR_FIELD_HIGH = 6;
localparam PMA_ADAPT_ADP_VGA_ONETIME_THRESHOLD_ADDR_FIELD_SIZE = 3;
localparam PMA_ADAPT_ADP_VGA_ONETIME_THRESHOLD_ADDR_FIELD_BITMASK = 32'h00000070;
localparam PMA_ADAPT_ADP_VGA_ONETIME_THRESHOLD_ADDR_FIELD_VALMASK = 32'h00000040;
localparam PMA_ADAPT_ADP_VGA_ONETIME_THRESHOLD_ADDR_FIELD_VALUE = 3'h4;

localparam PMA_ADAPT_DATARATE_BPS_VALUE = "10312500000";

localparam PMA_ADAPT_INITIAL_SETTINGS_VALUE = "true";

localparam PMA_ADAPT_ODI_MODE_VALUE = "odi_disable";

localparam PMA_ADAPT_OPTIMAL_VALUE = "true";

localparam PMA_ADAPT_POWER_MODE_VALUE = "powsav_disable";

localparam PMA_ADAPT_PROT_MODE_VALUE = "basic_rx";

localparam PMA_ADAPT_SUP_MODE_VALUE = "user_mode";

localparam PMA_ADAPT_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam CDR_PLL_ANALOG_MODE_VALUE = "user_custom";

localparam CDR_PLL_ATB_SELECT_CONTROL_VALUE = "atb_off";
localparam CDR_PLL_ATB_SELECT_CONTROL_ADDR0_OFST = 317;
localparam CDR_PLL_ATB_SELECT_CONTROL_ADDR0_FIELD_OFST = 6;
localparam CDR_PLL_ATB_SELECT_CONTROL_ADDR0_FIELD_HIGH = 7;
localparam CDR_PLL_ATB_SELECT_CONTROL_ADDR0_FIELD_SIZE = 2;
localparam CDR_PLL_ATB_SELECT_CONTROL_ADDR0_FIELD_BITMASK = 32'h000000C0;
localparam CDR_PLL_ATB_SELECT_CONTROL_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_ATB_SELECT_CONTROL_ADDR0_FIELD_VALUE = 2'h0;
localparam CDR_PLL_ATB_SELECT_CONTROL_ADDR1_OFST = 318;
localparam CDR_PLL_ATB_SELECT_CONTROL_ADDR1_FIELD_OFST = 3;
localparam CDR_PLL_ATB_SELECT_CONTROL_ADDR1_FIELD_HIGH = 6;
localparam CDR_PLL_ATB_SELECT_CONTROL_ADDR1_FIELD_SIZE = 4;
localparam CDR_PLL_ATB_SELECT_CONTROL_ADDR1_FIELD_BITMASK = 32'h00000078;
localparam CDR_PLL_ATB_SELECT_CONTROL_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_ATB_SELECT_CONTROL_ADDR1_FIELD_VALUE = 4'h0;

localparam CDR_PLL_AUTO_RESET_ON_VALUE = "auto_reset_off";
localparam CDR_PLL_AUTO_RESET_ON_ADDR_OFST = 312;
localparam CDR_PLL_AUTO_RESET_ON_ADDR_FIELD_OFST = 5;
localparam CDR_PLL_AUTO_RESET_ON_ADDR_FIELD_HIGH = 5;
localparam CDR_PLL_AUTO_RESET_ON_ADDR_FIELD_SIZE = 1;
localparam CDR_PLL_AUTO_RESET_ON_ADDR_FIELD_BITMASK = 32'h00000020;
localparam CDR_PLL_AUTO_RESET_ON_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_AUTO_RESET_ON_ADDR_FIELD_VALUE = 1'h0;

localparam CDR_PLL_BANDWIDTH_RANGE_HIGH_VALUE = "1";

localparam CDR_PLL_BANDWIDTH_RANGE_LOW_VALUE = "1";

localparam CDR_PLL_BBPD_DATA_PATTERN_FILTER_SELECT_VALUE = "bbpd_data_pat_off";
localparam CDR_PLL_BBPD_DATA_PATTERN_FILTER_SELECT_ADDR_OFST = 308;
localparam CDR_PLL_BBPD_DATA_PATTERN_FILTER_SELECT_ADDR_FIELD_OFST = 4;
localparam CDR_PLL_BBPD_DATA_PATTERN_FILTER_SELECT_ADDR_FIELD_HIGH = 5;
localparam CDR_PLL_BBPD_DATA_PATTERN_FILTER_SELECT_ADDR_FIELD_SIZE = 2;
localparam CDR_PLL_BBPD_DATA_PATTERN_FILTER_SELECT_ADDR_FIELD_BITMASK = 32'h00000030;
localparam CDR_PLL_BBPD_DATA_PATTERN_FILTER_SELECT_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_BBPD_DATA_PATTERN_FILTER_SELECT_ADDR_FIELD_VALUE = 2'h0;

localparam CDR_PLL_BW_MODE_VALUE = "mid_bw";

localparam CDR_PLL_CAL_VCO_COUNT_LENGTH_VALUE = "sel_8b_count";
localparam CDR_PLL_CAL_VCO_COUNT_LENGTH_ADDR_OFST = 324;
localparam CDR_PLL_CAL_VCO_COUNT_LENGTH_ADDR_FIELD_OFST = 3;
localparam CDR_PLL_CAL_VCO_COUNT_LENGTH_ADDR_FIELD_HIGH = 3;
localparam CDR_PLL_CAL_VCO_COUNT_LENGTH_ADDR_FIELD_SIZE = 1;
localparam CDR_PLL_CAL_VCO_COUNT_LENGTH_ADDR_FIELD_BITMASK = 32'h00000008;
localparam CDR_PLL_CAL_VCO_COUNT_LENGTH_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CAL_VCO_COUNT_LENGTH_ADDR_FIELD_VALUE = 1'h0;

localparam CDR_PLL_CDR_D2A_ENB_VALUE = "bti_d2a_disable";
localparam CDR_PLL_CDR_D2A_ENB_ADDR_OFST = 311;
localparam CDR_PLL_CDR_D2A_ENB_ADDR_FIELD_OFST = 6;
localparam CDR_PLL_CDR_D2A_ENB_ADDR_FIELD_HIGH = 6;
localparam CDR_PLL_CDR_D2A_ENB_ADDR_FIELD_SIZE = 1;
localparam CDR_PLL_CDR_D2A_ENB_ADDR_FIELD_BITMASK = 32'h00000040;
localparam CDR_PLL_CDR_D2A_ENB_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CDR_D2A_ENB_ADDR_FIELD_VALUE = 1'h0;

localparam CDR_PLL_CDR_ODI_SELECT_VALUE = "sel_cdr";
localparam CDR_PLL_CDR_ODI_SELECT_ADDR_OFST = 312;
localparam CDR_PLL_CDR_ODI_SELECT_ADDR_FIELD_OFST = 6;
localparam CDR_PLL_CDR_ODI_SELECT_ADDR_FIELD_HIGH = 6;
localparam CDR_PLL_CDR_ODI_SELECT_ADDR_FIELD_SIZE = 1;
localparam CDR_PLL_CDR_ODI_SELECT_ADDR_FIELD_BITMASK = 32'h00000040;
localparam CDR_PLL_CDR_ODI_SELECT_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CDR_ODI_SELECT_ADDR_FIELD_VALUE = 1'h0;

localparam CDR_PLL_CDR_PHASELOCK_MODE_VALUE = "no_ignore_lock";
localparam CDR_PLL_CDR_PHASELOCK_MODE_ADDR_OFST = 306;
localparam CDR_PLL_CDR_PHASELOCK_MODE_ADDR_FIELD_OFST = 6;
localparam CDR_PLL_CDR_PHASELOCK_MODE_ADDR_FIELD_HIGH = 6;
localparam CDR_PLL_CDR_PHASELOCK_MODE_ADDR_FIELD_SIZE = 1;
localparam CDR_PLL_CDR_PHASELOCK_MODE_ADDR_FIELD_BITMASK = 32'h00000040;
localparam CDR_PLL_CDR_PHASELOCK_MODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CDR_PHASELOCK_MODE_ADDR_FIELD_VALUE = 1'h0;

localparam CDR_PLL_CDR_POWERDOWN_MODE_VALUE = "power_up";
localparam CDR_PLL_CDR_POWERDOWN_MODE_ADDR_OFST = 306;
localparam CDR_PLL_CDR_POWERDOWN_MODE_ADDR_FIELD_OFST = 7;
localparam CDR_PLL_CDR_POWERDOWN_MODE_ADDR_FIELD_HIGH = 7;
localparam CDR_PLL_CDR_POWERDOWN_MODE_ADDR_FIELD_SIZE = 1;
localparam CDR_PLL_CDR_POWERDOWN_MODE_ADDR_FIELD_BITMASK = 32'h00000080;
localparam CDR_PLL_CDR_POWERDOWN_MODE_ADDR_FIELD_VALMASK = 32'h00000080;
localparam CDR_PLL_CDR_POWERDOWN_MODE_ADDR_FIELD_VALUE = 1'h1;

localparam CDR_PLL_CHGPMP_CURRENT_DN_PD_VALUE = "cp_current_pd_dn_setting3";
localparam CDR_PLL_CHGPMP_CURRENT_DN_PD_ADDR_OFST = 313;
localparam CDR_PLL_CHGPMP_CURRENT_DN_PD_ADDR_FIELD_OFST = 3;
localparam CDR_PLL_CHGPMP_CURRENT_DN_PD_ADDR_FIELD_HIGH = 5;
localparam CDR_PLL_CHGPMP_CURRENT_DN_PD_ADDR_FIELD_SIZE = 3;
localparam CDR_PLL_CHGPMP_CURRENT_DN_PD_ADDR_FIELD_BITMASK = 32'h00000038;
localparam CDR_PLL_CHGPMP_CURRENT_DN_PD_ADDR_FIELD_VALMASK = 32'h00000018;
localparam CDR_PLL_CHGPMP_CURRENT_DN_PD_ADDR_FIELD_VALUE = 3'h3;

localparam CDR_PLL_CHGPMP_CURRENT_DN_TRIM_VALUE = "cp_current_trimming_dn_setting0";
localparam CDR_PLL_CHGPMP_CURRENT_DN_TRIM_ADDR_OFST = 368;
localparam CDR_PLL_CHGPMP_CURRENT_DN_TRIM_ADDR_FIELD_OFST = 4;
localparam CDR_PLL_CHGPMP_CURRENT_DN_TRIM_ADDR_FIELD_HIGH = 7;
localparam CDR_PLL_CHGPMP_CURRENT_DN_TRIM_ADDR_FIELD_SIZE = 4;
localparam CDR_PLL_CHGPMP_CURRENT_DN_TRIM_ADDR_FIELD_BITMASK = 32'h000000F0;
localparam CDR_PLL_CHGPMP_CURRENT_DN_TRIM_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CHGPMP_CURRENT_DN_TRIM_ADDR_FIELD_VALUE = 4'h0;

localparam CDR_PLL_CHGPMP_CURRENT_PFD_VALUE = "cp_current_pfd_setting2";
localparam CDR_PLL_CHGPMP_CURRENT_PFD_ADDR_OFST = 313;
localparam CDR_PLL_CHGPMP_CURRENT_PFD_ADDR_FIELD_OFST = 0;
localparam CDR_PLL_CHGPMP_CURRENT_PFD_ADDR_FIELD_HIGH = 2;
localparam CDR_PLL_CHGPMP_CURRENT_PFD_ADDR_FIELD_SIZE = 3;
localparam CDR_PLL_CHGPMP_CURRENT_PFD_ADDR_FIELD_BITMASK = 32'h00000007;
localparam CDR_PLL_CHGPMP_CURRENT_PFD_ADDR_FIELD_VALMASK = 32'h00000002;
localparam CDR_PLL_CHGPMP_CURRENT_PFD_ADDR_FIELD_VALUE = 3'h2;

localparam CDR_PLL_CHGPMP_CURRENT_UP_PD_VALUE = "cp_current_pd_up_setting3";
localparam CDR_PLL_CHGPMP_CURRENT_UP_PD_ADDR_OFST = 307;
localparam CDR_PLL_CHGPMP_CURRENT_UP_PD_ADDR_FIELD_OFST = 5;
localparam CDR_PLL_CHGPMP_CURRENT_UP_PD_ADDR_FIELD_HIGH = 7;
localparam CDR_PLL_CHGPMP_CURRENT_UP_PD_ADDR_FIELD_SIZE = 3;
localparam CDR_PLL_CHGPMP_CURRENT_UP_PD_ADDR_FIELD_BITMASK = 32'h000000E0;
localparam CDR_PLL_CHGPMP_CURRENT_UP_PD_ADDR_FIELD_VALMASK = 32'h00000060;
localparam CDR_PLL_CHGPMP_CURRENT_UP_PD_ADDR_FIELD_VALUE = 3'h3;

localparam CDR_PLL_CHGPMP_CURRENT_UP_TRIM_VALUE = "cp_current_trimming_up_setting0";
localparam CDR_PLL_CHGPMP_CURRENT_UP_TRIM_ADDR0_OFST = 309;
localparam CDR_PLL_CHGPMP_CURRENT_UP_TRIM_ADDR0_FIELD_OFST = 5;
localparam CDR_PLL_CHGPMP_CURRENT_UP_TRIM_ADDR0_FIELD_HIGH = 5;
localparam CDR_PLL_CHGPMP_CURRENT_UP_TRIM_ADDR0_FIELD_SIZE = 1;
localparam CDR_PLL_CHGPMP_CURRENT_UP_TRIM_ADDR0_FIELD_BITMASK = 32'h00000020;
localparam CDR_PLL_CHGPMP_CURRENT_UP_TRIM_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CHGPMP_CURRENT_UP_TRIM_ADDR0_FIELD_VALUE = 1'h0;
localparam CDR_PLL_CHGPMP_CURRENT_UP_TRIM_ADDR1_OFST = 368;
localparam CDR_PLL_CHGPMP_CURRENT_UP_TRIM_ADDR1_FIELD_OFST = 1;
localparam CDR_PLL_CHGPMP_CURRENT_UP_TRIM_ADDR1_FIELD_HIGH = 3;
localparam CDR_PLL_CHGPMP_CURRENT_UP_TRIM_ADDR1_FIELD_SIZE = 3;
localparam CDR_PLL_CHGPMP_CURRENT_UP_TRIM_ADDR1_FIELD_BITMASK = 32'h0000000E;
localparam CDR_PLL_CHGPMP_CURRENT_UP_TRIM_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CHGPMP_CURRENT_UP_TRIM_ADDR1_FIELD_VALUE = 3'h0;

localparam CDR_PLL_CHGPMP_DN_PD_TRIM_DOUBLE_VALUE = "normal_dn_trim_current";
localparam CDR_PLL_CHGPMP_DN_PD_TRIM_DOUBLE_ADDR_OFST = 367;
localparam CDR_PLL_CHGPMP_DN_PD_TRIM_DOUBLE_ADDR_FIELD_OFST = 6;
localparam CDR_PLL_CHGPMP_DN_PD_TRIM_DOUBLE_ADDR_FIELD_HIGH = 6;
localparam CDR_PLL_CHGPMP_DN_PD_TRIM_DOUBLE_ADDR_FIELD_SIZE = 1;
localparam CDR_PLL_CHGPMP_DN_PD_TRIM_DOUBLE_ADDR_FIELD_BITMASK = 32'h00000040;
localparam CDR_PLL_CHGPMP_DN_PD_TRIM_DOUBLE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CHGPMP_DN_PD_TRIM_DOUBLE_ADDR_FIELD_VALUE = 1'h0;

localparam CDR_PLL_CHGPMP_REPLICATE_VALUE = "disable_replica_bias_ctrl";
localparam CDR_PLL_CHGPMP_REPLICATE_ADDR_OFST = 313;
localparam CDR_PLL_CHGPMP_REPLICATE_ADDR_FIELD_OFST = 6;
localparam CDR_PLL_CHGPMP_REPLICATE_ADDR_FIELD_HIGH = 6;
localparam CDR_PLL_CHGPMP_REPLICATE_ADDR_FIELD_SIZE = 1;
localparam CDR_PLL_CHGPMP_REPLICATE_ADDR_FIELD_BITMASK = 32'h00000040;
localparam CDR_PLL_CHGPMP_REPLICATE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CHGPMP_REPLICATE_ADDR_FIELD_VALUE = 1'h0;

localparam CDR_PLL_CHGPMP_TESTMODE_VALUE = "cp_test_disable";
localparam CDR_PLL_CHGPMP_TESTMODE_ADDR_OFST = 318;
localparam CDR_PLL_CHGPMP_TESTMODE_ADDR_FIELD_OFST = 0;
localparam CDR_PLL_CHGPMP_TESTMODE_ADDR_FIELD_HIGH = 2;
localparam CDR_PLL_CHGPMP_TESTMODE_ADDR_FIELD_SIZE = 3;
localparam CDR_PLL_CHGPMP_TESTMODE_ADDR_FIELD_BITMASK = 32'h00000007;
localparam CDR_PLL_CHGPMP_TESTMODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CHGPMP_TESTMODE_ADDR_FIELD_VALUE = 3'h0;

localparam CDR_PLL_CHGPMP_UP_PD_TRIM_DOUBLE_VALUE = "normal_up_trim_current";
localparam CDR_PLL_CHGPMP_UP_PD_TRIM_DOUBLE_ADDR_OFST = 367;
localparam CDR_PLL_CHGPMP_UP_PD_TRIM_DOUBLE_ADDR_FIELD_OFST = 7;
localparam CDR_PLL_CHGPMP_UP_PD_TRIM_DOUBLE_ADDR_FIELD_HIGH = 7;
localparam CDR_PLL_CHGPMP_UP_PD_TRIM_DOUBLE_ADDR_FIELD_SIZE = 1;
localparam CDR_PLL_CHGPMP_UP_PD_TRIM_DOUBLE_ADDR_FIELD_BITMASK = 32'h00000080;
localparam CDR_PLL_CHGPMP_UP_PD_TRIM_DOUBLE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CHGPMP_UP_PD_TRIM_DOUBLE_ADDR_FIELD_VALUE = 1'h0;

localparam CDR_PLL_CHGPMP_VCCREG_VALUE = "vreg_fw0";
localparam CDR_PLL_CHGPMP_VCCREG_ADDR_OFST = 307;
localparam CDR_PLL_CHGPMP_VCCREG_ADDR_FIELD_OFST = 1;
localparam CDR_PLL_CHGPMP_VCCREG_ADDR_FIELD_HIGH = 3;
localparam CDR_PLL_CHGPMP_VCCREG_ADDR_FIELD_SIZE = 3;
localparam CDR_PLL_CHGPMP_VCCREG_ADDR_FIELD_BITMASK = 32'h0000000E;
localparam CDR_PLL_CHGPMP_VCCREG_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CHGPMP_VCCREG_ADDR_FIELD_VALUE = 3'h0;

localparam CDR_PLL_CLK0_DFE_TFALL_ADJ_VALUE = "clk0_dfe_tf0";
localparam CDR_PLL_CLK0_DFE_TFALL_ADJ_ADDR_OFST = 376;
localparam CDR_PLL_CLK0_DFE_TFALL_ADJ_ADDR_FIELD_OFST = 5;
localparam CDR_PLL_CLK0_DFE_TFALL_ADJ_ADDR_FIELD_HIGH = 7;
localparam CDR_PLL_CLK0_DFE_TFALL_ADJ_ADDR_FIELD_SIZE = 3;
localparam CDR_PLL_CLK0_DFE_TFALL_ADJ_ADDR_FIELD_BITMASK = 32'h000000E0;
localparam CDR_PLL_CLK0_DFE_TFALL_ADJ_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CLK0_DFE_TFALL_ADJ_ADDR_FIELD_VALUE = 3'h0;

localparam CDR_PLL_CLK0_DFE_TRISE_ADJ_VALUE = "clk0_dfe_tr0";
localparam CDR_PLL_CLK0_DFE_TRISE_ADJ_ADDR_OFST = 376;
localparam CDR_PLL_CLK0_DFE_TRISE_ADJ_ADDR_FIELD_OFST = 2;
localparam CDR_PLL_CLK0_DFE_TRISE_ADJ_ADDR_FIELD_HIGH = 4;
localparam CDR_PLL_CLK0_DFE_TRISE_ADJ_ADDR_FIELD_SIZE = 3;
localparam CDR_PLL_CLK0_DFE_TRISE_ADJ_ADDR_FIELD_BITMASK = 32'h0000001C;
localparam CDR_PLL_CLK0_DFE_TRISE_ADJ_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CLK0_DFE_TRISE_ADJ_ADDR_FIELD_VALUE = 3'h0;

localparam CDR_PLL_CLK180_DFE_TFALL_ADJ_VALUE = "clk180_dfe_tf0";
localparam CDR_PLL_CLK180_DFE_TFALL_ADJ_ADDR0_OFST = 375;
localparam CDR_PLL_CLK180_DFE_TFALL_ADJ_ADDR0_FIELD_OFST = 7;
localparam CDR_PLL_CLK180_DFE_TFALL_ADJ_ADDR0_FIELD_HIGH = 7;
localparam CDR_PLL_CLK180_DFE_TFALL_ADJ_ADDR0_FIELD_SIZE = 1;
localparam CDR_PLL_CLK180_DFE_TFALL_ADJ_ADDR0_FIELD_BITMASK = 32'h00000080;
localparam CDR_PLL_CLK180_DFE_TFALL_ADJ_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CLK180_DFE_TFALL_ADJ_ADDR0_FIELD_VALUE = 1'h0;
localparam CDR_PLL_CLK180_DFE_TFALL_ADJ_ADDR1_OFST = 376;
localparam CDR_PLL_CLK180_DFE_TFALL_ADJ_ADDR1_FIELD_OFST = 0;
localparam CDR_PLL_CLK180_DFE_TFALL_ADJ_ADDR1_FIELD_HIGH = 1;
localparam CDR_PLL_CLK180_DFE_TFALL_ADJ_ADDR1_FIELD_SIZE = 2;
localparam CDR_PLL_CLK180_DFE_TFALL_ADJ_ADDR1_FIELD_BITMASK = 32'h00000003;
localparam CDR_PLL_CLK180_DFE_TFALL_ADJ_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CLK180_DFE_TFALL_ADJ_ADDR1_FIELD_VALUE = 2'h0;

localparam CDR_PLL_CLK180_DFE_TRISE_ADJ_VALUE = "clk180_dfe_tr0";
localparam CDR_PLL_CLK180_DFE_TRISE_ADJ_ADDR_OFST = 375;
localparam CDR_PLL_CLK180_DFE_TRISE_ADJ_ADDR_FIELD_OFST = 4;
localparam CDR_PLL_CLK180_DFE_TRISE_ADJ_ADDR_FIELD_HIGH = 6;
localparam CDR_PLL_CLK180_DFE_TRISE_ADJ_ADDR_FIELD_SIZE = 3;
localparam CDR_PLL_CLK180_DFE_TRISE_ADJ_ADDR_FIELD_BITMASK = 32'h00000070;
localparam CDR_PLL_CLK180_DFE_TRISE_ADJ_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CLK180_DFE_TRISE_ADJ_ADDR_FIELD_VALUE = 3'h0;

localparam CDR_PLL_CLK270_DFE_TFALL_ADJ_VALUE = "clk270_dfe_tf0";
localparam CDR_PLL_CLK270_DFE_TFALL_ADJ_ADDR_OFST = 374;
localparam CDR_PLL_CLK270_DFE_TFALL_ADJ_ADDR_FIELD_OFST = 3;
localparam CDR_PLL_CLK270_DFE_TFALL_ADJ_ADDR_FIELD_HIGH = 5;
localparam CDR_PLL_CLK270_DFE_TFALL_ADJ_ADDR_FIELD_SIZE = 3;
localparam CDR_PLL_CLK270_DFE_TFALL_ADJ_ADDR_FIELD_BITMASK = 32'h00000038;
localparam CDR_PLL_CLK270_DFE_TFALL_ADJ_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CLK270_DFE_TFALL_ADJ_ADDR_FIELD_VALUE = 3'h0;

localparam CDR_PLL_CLK270_DFE_TRISE_ADJ_VALUE = "clk270_dfe_tr0";
localparam CDR_PLL_CLK270_DFE_TRISE_ADJ_ADDR_OFST = 374;
localparam CDR_PLL_CLK270_DFE_TRISE_ADJ_ADDR_FIELD_OFST = 0;
localparam CDR_PLL_CLK270_DFE_TRISE_ADJ_ADDR_FIELD_HIGH = 2;
localparam CDR_PLL_CLK270_DFE_TRISE_ADJ_ADDR_FIELD_SIZE = 3;
localparam CDR_PLL_CLK270_DFE_TRISE_ADJ_ADDR_FIELD_BITMASK = 32'h00000007;
localparam CDR_PLL_CLK270_DFE_TRISE_ADJ_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CLK270_DFE_TRISE_ADJ_ADDR_FIELD_VALUE = 3'h0;

localparam CDR_PLL_CLK90_DFE_TFALL_ADJ_VALUE = "clk90_dfe_tf0";
localparam CDR_PLL_CLK90_DFE_TFALL_ADJ_ADDR_OFST = 375;
localparam CDR_PLL_CLK90_DFE_TFALL_ADJ_ADDR_FIELD_OFST = 1;
localparam CDR_PLL_CLK90_DFE_TFALL_ADJ_ADDR_FIELD_HIGH = 3;
localparam CDR_PLL_CLK90_DFE_TFALL_ADJ_ADDR_FIELD_SIZE = 3;
localparam CDR_PLL_CLK90_DFE_TFALL_ADJ_ADDR_FIELD_BITMASK = 32'h0000000E;
localparam CDR_PLL_CLK90_DFE_TFALL_ADJ_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CLK90_DFE_TFALL_ADJ_ADDR_FIELD_VALUE = 3'h0;

localparam CDR_PLL_CLK90_DFE_TRISE_ADJ_VALUE = "clk90_dfe_tr0";
localparam CDR_PLL_CLK90_DFE_TRISE_ADJ_ADDR0_OFST = 374;
localparam CDR_PLL_CLK90_DFE_TRISE_ADJ_ADDR0_FIELD_OFST = 6;
localparam CDR_PLL_CLK90_DFE_TRISE_ADJ_ADDR0_FIELD_HIGH = 7;
localparam CDR_PLL_CLK90_DFE_TRISE_ADJ_ADDR0_FIELD_SIZE = 2;
localparam CDR_PLL_CLK90_DFE_TRISE_ADJ_ADDR0_FIELD_BITMASK = 32'h000000C0;
localparam CDR_PLL_CLK90_DFE_TRISE_ADJ_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CLK90_DFE_TRISE_ADJ_ADDR0_FIELD_VALUE = 2'h0;
localparam CDR_PLL_CLK90_DFE_TRISE_ADJ_ADDR1_OFST = 375;
localparam CDR_PLL_CLK90_DFE_TRISE_ADJ_ADDR1_FIELD_OFST = 0;
localparam CDR_PLL_CLK90_DFE_TRISE_ADJ_ADDR1_FIELD_HIGH = 0;
localparam CDR_PLL_CLK90_DFE_TRISE_ADJ_ADDR1_FIELD_SIZE = 1;
localparam CDR_PLL_CLK90_DFE_TRISE_ADJ_ADDR1_FIELD_BITMASK = 32'h00000001;
localparam CDR_PLL_CLK90_DFE_TRISE_ADJ_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CLK90_DFE_TRISE_ADJ_ADDR1_FIELD_VALUE = 1'h0;

localparam CDR_PLL_CLKLOW_MUX_SELECT_VALUE = "clklow_mux_cdr_fbclk";
localparam CDR_PLL_CLKLOW_MUX_SELECT_ADDR_OFST = 317;
localparam CDR_PLL_CLKLOW_MUX_SELECT_ADDR_FIELD_OFST = 0;
localparam CDR_PLL_CLKLOW_MUX_SELECT_ADDR_FIELD_HIGH = 2;
localparam CDR_PLL_CLKLOW_MUX_SELECT_ADDR_FIELD_SIZE = 3;
localparam CDR_PLL_CLKLOW_MUX_SELECT_ADDR_FIELD_BITMASK = 32'h00000007;
localparam CDR_PLL_CLKLOW_MUX_SELECT_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_CLKLOW_MUX_SELECT_ADDR_FIELD_VALUE = 3'h0;

localparam CDR_PLL_DATARATE_BPS_VALUE = "10312500000";

localparam CDR_PLL_DIAG_LOOPBACK_ENABLE_VALUE = "no_diag_rev_loopback";
localparam CDR_PLL_DIAG_LOOPBACK_ENABLE_ADDR_OFST = 311;
localparam CDR_PLL_DIAG_LOOPBACK_ENABLE_ADDR_FIELD_OFST = 7;
localparam CDR_PLL_DIAG_LOOPBACK_ENABLE_ADDR_FIELD_HIGH = 7;
localparam CDR_PLL_DIAG_LOOPBACK_ENABLE_ADDR_FIELD_SIZE = 1;
localparam CDR_PLL_DIAG_LOOPBACK_ENABLE_ADDR_FIELD_BITMASK = 32'h00000080;
localparam CDR_PLL_DIAG_LOOPBACK_ENABLE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_DIAG_LOOPBACK_ENABLE_ADDR_FIELD_VALUE = 1'h0;

localparam CDR_PLL_DISABLE_UP_DN_VALUE = "normal_mode";

localparam CDR_PLL_F_MAX_CMU_OUT_FREQ_VALUE = "1";

localparam CDR_PLL_F_MAX_M_COUNTER_VALUE = "1";

localparam CDR_PLL_F_MAX_PFD_VALUE = "350000000";

localparam CDR_PLL_F_MAX_REF_VALUE = "800000000";

localparam CDR_PLL_F_MAX_VCO_VALUE = "14150000000";

localparam CDR_PLL_F_MIN_GT_CHANNEL_VALUE = "8700000000";

localparam CDR_PLL_F_MIN_PFD_VALUE = "25000000";

localparam CDR_PLL_F_MIN_REF_VALUE = "25000000";

localparam CDR_PLL_F_MIN_VCO_VALUE = "7000000000";

localparam CDR_PLL_FREF_CLKLOW_DIV_VALUE = 2;
localparam CDR_PLL_FREF_CLKLOW_DIV_ADDR_OFST = 314;
localparam CDR_PLL_FREF_CLKLOW_DIV_ADDR_FIELD_OFST = 6;
localparam CDR_PLL_FREF_CLKLOW_DIV_ADDR_FIELD_HIGH = 7;
localparam CDR_PLL_FREF_CLKLOW_DIV_ADDR_FIELD_SIZE = 2;
localparam CDR_PLL_FREF_CLKLOW_DIV_ADDR_FIELD_BITMASK = 32'h000000C0;
localparam CDR_PLL_FREF_CLKLOW_DIV_ADDR_FIELD_VALMASK = 32'h00000040;
localparam CDR_PLL_FREF_CLKLOW_DIV_ADDR_FIELD_VALUE = 2'h1;

localparam CDR_PLL_FREF_MUX_SELECT_VALUE = "fref_mux_cdr_refclk";
localparam CDR_PLL_FREF_MUX_SELECT_ADDR_OFST = 317;
localparam CDR_PLL_FREF_MUX_SELECT_ADDR_FIELD_OFST = 3;
localparam CDR_PLL_FREF_MUX_SELECT_ADDR_FIELD_HIGH = 5;
localparam CDR_PLL_FREF_MUX_SELECT_ADDR_FIELD_SIZE = 3;
localparam CDR_PLL_FREF_MUX_SELECT_ADDR_FIELD_BITMASK = 32'h00000038;
localparam CDR_PLL_FREF_MUX_SELECT_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_FREF_MUX_SELECT_ADDR_FIELD_VALUE = 3'h0;

localparam CDR_PLL_GPON_LCK2REF_CONTROL_VALUE = "gpon_lck2ref_off";
localparam CDR_PLL_GPON_LCK2REF_CONTROL_ADDR_OFST = 307;
localparam CDR_PLL_GPON_LCK2REF_CONTROL_ADDR_FIELD_OFST = 0;
localparam CDR_PLL_GPON_LCK2REF_CONTROL_ADDR_FIELD_HIGH = 0;
localparam CDR_PLL_GPON_LCK2REF_CONTROL_ADDR_FIELD_SIZE = 1;
localparam CDR_PLL_GPON_LCK2REF_CONTROL_ADDR_FIELD_BITMASK = 32'h00000001;
localparam CDR_PLL_GPON_LCK2REF_CONTROL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_GPON_LCK2REF_CONTROL_ADDR_FIELD_VALUE = 1'h0;

localparam CDR_PLL_INITIAL_SETTINGS_VALUE = "true";

localparam CDR_PLL_LCK2REF_DELAY_CONTROL_VALUE = "lck2ref_delay_2";
localparam CDR_PLL_LCK2REF_DELAY_CONTROL_ADDR_OFST = 308;
localparam CDR_PLL_LCK2REF_DELAY_CONTROL_ADDR_FIELD_OFST = 0;
localparam CDR_PLL_LCK2REF_DELAY_CONTROL_ADDR_FIELD_HIGH = 2;
localparam CDR_PLL_LCK2REF_DELAY_CONTROL_ADDR_FIELD_SIZE = 3;
localparam CDR_PLL_LCK2REF_DELAY_CONTROL_ADDR_FIELD_BITMASK = 32'h00000007;
localparam CDR_PLL_LCK2REF_DELAY_CONTROL_ADDR_FIELD_VALMASK = 32'h00000002;
localparam CDR_PLL_LCK2REF_DELAY_CONTROL_ADDR_FIELD_VALUE = 3'h2;

localparam CDR_PLL_LF_RESISTOR_PD_VALUE = "lf_pd_setting3";
localparam CDR_PLL_LF_RESISTOR_PD_ADDR_OFST = 309;
localparam CDR_PLL_LF_RESISTOR_PD_ADDR_FIELD_OFST = 2;
localparam CDR_PLL_LF_RESISTOR_PD_ADDR_FIELD_HIGH = 3;
localparam CDR_PLL_LF_RESISTOR_PD_ADDR_FIELD_SIZE = 2;
localparam CDR_PLL_LF_RESISTOR_PD_ADDR_FIELD_BITMASK = 32'h0000000C;
localparam CDR_PLL_LF_RESISTOR_PD_ADDR_FIELD_VALMASK = 32'h0000000C;
localparam CDR_PLL_LF_RESISTOR_PD_ADDR_FIELD_VALUE = 2'h3;

localparam CDR_PLL_LF_RESISTOR_PFD_VALUE = "lf_pfd_setting2";
localparam CDR_PLL_LF_RESISTOR_PFD_ADDR_OFST = 309;
localparam CDR_PLL_LF_RESISTOR_PFD_ADDR_FIELD_OFST = 0;
localparam CDR_PLL_LF_RESISTOR_PFD_ADDR_FIELD_HIGH = 1;
localparam CDR_PLL_LF_RESISTOR_PFD_ADDR_FIELD_SIZE = 2;
localparam CDR_PLL_LF_RESISTOR_PFD_ADDR_FIELD_BITMASK = 32'h00000003;
localparam CDR_PLL_LF_RESISTOR_PFD_ADDR_FIELD_VALMASK = 32'h00000002;
localparam CDR_PLL_LF_RESISTOR_PFD_ADDR_FIELD_VALUE = 2'h2;

localparam CDR_PLL_LF_RIPPLE_CAP_VALUE = "lf_no_ripple";
localparam CDR_PLL_LF_RIPPLE_CAP_ADDR_OFST = 309;
localparam CDR_PLL_LF_RIPPLE_CAP_ADDR_FIELD_OFST = 4;
localparam CDR_PLL_LF_RIPPLE_CAP_ADDR_FIELD_HIGH = 4;
localparam CDR_PLL_LF_RIPPLE_CAP_ADDR_FIELD_SIZE = 1;
localparam CDR_PLL_LF_RIPPLE_CAP_ADDR_FIELD_BITMASK = 32'h00000010;
localparam CDR_PLL_LF_RIPPLE_CAP_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_LF_RIPPLE_CAP_ADDR_FIELD_VALUE = 1'h0;

localparam CDR_PLL_LOOP_FILTER_BIAS_SELECT_VALUE = "lpflt_bias_7";
localparam CDR_PLL_LOOP_FILTER_BIAS_SELECT_ADDR_OFST = 322;
localparam CDR_PLL_LOOP_FILTER_BIAS_SELECT_ADDR_FIELD_OFST = 1;
localparam CDR_PLL_LOOP_FILTER_BIAS_SELECT_ADDR_FIELD_HIGH = 3;
localparam CDR_PLL_LOOP_FILTER_BIAS_SELECT_ADDR_FIELD_SIZE = 3;
localparam CDR_PLL_LOOP_FILTER_BIAS_SELECT_ADDR_FIELD_BITMASK = 32'h0000000E;
localparam CDR_PLL_LOOP_FILTER_BIAS_SELECT_ADDR_FIELD_VALMASK = 32'h0000000E;
localparam CDR_PLL_LOOP_FILTER_BIAS_SELECT_ADDR_FIELD_VALUE = 3'h7;

localparam CDR_PLL_LOOPBACK_MODE_VALUE = "loopback_disabled";
localparam CDR_PLL_LOOPBACK_MODE_ADDR0_OFST = 285;
localparam CDR_PLL_LOOPBACK_MODE_ADDR0_FIELD_OFST = 0;
localparam CDR_PLL_LOOPBACK_MODE_ADDR0_FIELD_HIGH = 0;
localparam CDR_PLL_LOOPBACK_MODE_ADDR0_FIELD_SIZE = 1;
localparam CDR_PLL_LOOPBACK_MODE_ADDR0_FIELD_BITMASK = 32'h00000001;
localparam CDR_PLL_LOOPBACK_MODE_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_LOOPBACK_MODE_ADDR0_FIELD_VALUE = 1'h0;
localparam CDR_PLL_LOOPBACK_MODE_ADDR1_OFST = 322;
localparam CDR_PLL_LOOPBACK_MODE_ADDR1_FIELD_OFST = 4;
localparam CDR_PLL_LOOPBACK_MODE_ADDR1_FIELD_HIGH = 4;
localparam CDR_PLL_LOOPBACK_MODE_ADDR1_FIELD_SIZE = 1;
localparam CDR_PLL_LOOPBACK_MODE_ADDR1_FIELD_BITMASK = 32'h00000010;
localparam CDR_PLL_LOOPBACK_MODE_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_LOOPBACK_MODE_ADDR1_FIELD_VALUE = 1'h0;
localparam CDR_PLL_LOOPBACK_MODE_ADDR2_OFST = 324;
localparam CDR_PLL_LOOPBACK_MODE_ADDR2_FIELD_OFST = 1;
localparam CDR_PLL_LOOPBACK_MODE_ADDR2_FIELD_HIGH = 1;
localparam CDR_PLL_LOOPBACK_MODE_ADDR2_FIELD_SIZE = 1;
localparam CDR_PLL_LOOPBACK_MODE_ADDR2_FIELD_BITMASK = 32'h00000002;
localparam CDR_PLL_LOOPBACK_MODE_ADDR2_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_LOOPBACK_MODE_ADDR2_FIELD_VALUE = 1'h0;

localparam CDR_PLL_LPD_COUNTER_VALUE = 5'd2;

localparam CDR_PLL_LPFD_COUNTER_VALUE = 5'd2;

localparam CDR_PLL_MCNT_DIV_VALUE = 8'd16;
localparam CDR_PLL_MCNT_DIV_ADDR_OFST = 315;
localparam CDR_PLL_MCNT_DIV_ADDR_FIELD_OFST = 0;
localparam CDR_PLL_MCNT_DIV_ADDR_FIELD_HIGH = 7;
localparam CDR_PLL_MCNT_DIV_ADDR_FIELD_SIZE = 8;
localparam CDR_PLL_MCNT_DIV_ADDR_FIELD_BITMASK = 32'h000000FF;
localparam CDR_PLL_MCNT_DIV_ADDR_FIELD_VALMASK = 32'h00000010;
localparam CDR_PLL_MCNT_DIV_ADDR_FIELD_VALUE = 8'h10;

localparam CDR_PLL_N_COUNTER_VALUE = 6'd2;

localparam CDR_PLL_NCNT_DIV_VALUE = 2;
localparam CDR_PLL_NCNT_DIV_ADDR_OFST = 316;
localparam CDR_PLL_NCNT_DIV_ADDR_FIELD_OFST = 2;
localparam CDR_PLL_NCNT_DIV_ADDR_FIELD_HIGH = 3;
localparam CDR_PLL_NCNT_DIV_ADDR_FIELD_SIZE = 2;
localparam CDR_PLL_NCNT_DIV_ADDR_FIELD_BITMASK = 32'h0000000C;
localparam CDR_PLL_NCNT_DIV_ADDR_FIELD_VALMASK = 32'h00000004;
localparam CDR_PLL_NCNT_DIV_ADDR_FIELD_VALUE = 2'h1;

localparam CDR_PLL_OPTIMAL_VALUE = "true";

localparam CDR_PLL_OUT_FREQ_VALUE = "5156250000";

localparam CDR_PLL_PCIE_GEN_VALUE = "non_pcie";
localparam CDR_PLL_PCIE_GEN_ADDR0_OFST = 281;
localparam CDR_PLL_PCIE_GEN_ADDR0_FIELD_OFST = 0;
localparam CDR_PLL_PCIE_GEN_ADDR0_FIELD_HIGH = 0;
localparam CDR_PLL_PCIE_GEN_ADDR0_FIELD_SIZE = 1;
localparam CDR_PLL_PCIE_GEN_ADDR0_FIELD_BITMASK = 32'h00000001;
localparam CDR_PLL_PCIE_GEN_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_PCIE_GEN_ADDR0_FIELD_VALUE = 1'h0;
localparam CDR_PLL_PCIE_GEN_ADDR1_OFST = 368;
localparam CDR_PLL_PCIE_GEN_ADDR1_FIELD_OFST = 0;
localparam CDR_PLL_PCIE_GEN_ADDR1_FIELD_HIGH = 0;
localparam CDR_PLL_PCIE_GEN_ADDR1_FIELD_SIZE = 1;
localparam CDR_PLL_PCIE_GEN_ADDR1_FIELD_BITMASK = 32'h00000001;
localparam CDR_PLL_PCIE_GEN_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_PCIE_GEN_ADDR1_FIELD_VALUE = 1'h0;

localparam CDR_PLL_PD_FASTLOCK_MODE_VALUE = "fast_lock_disable";
localparam CDR_PLL_PD_FASTLOCK_MODE_ADDR_OFST = 313;
localparam CDR_PLL_PD_FASTLOCK_MODE_ADDR_FIELD_OFST = 7;
localparam CDR_PLL_PD_FASTLOCK_MODE_ADDR_FIELD_HIGH = 7;
localparam CDR_PLL_PD_FASTLOCK_MODE_ADDR_FIELD_SIZE = 1;
localparam CDR_PLL_PD_FASTLOCK_MODE_ADDR_FIELD_BITMASK = 32'h00000080;
localparam CDR_PLL_PD_FASTLOCK_MODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_PD_FASTLOCK_MODE_ADDR_FIELD_VALUE = 1'h0;

localparam CDR_PLL_PD_L_COUNTER_VALUE = 2;
localparam CDR_PLL_PD_L_COUNTER_ADDR_OFST = 314;
localparam CDR_PLL_PD_L_COUNTER_ADDR_FIELD_OFST = 3;
localparam CDR_PLL_PD_L_COUNTER_ADDR_FIELD_HIGH = 5;
localparam CDR_PLL_PD_L_COUNTER_ADDR_FIELD_SIZE = 3;
localparam CDR_PLL_PD_L_COUNTER_ADDR_FIELD_BITMASK = 32'h00000038;
localparam CDR_PLL_PD_L_COUNTER_ADDR_FIELD_VALMASK = 32'h00000018;
localparam CDR_PLL_PD_L_COUNTER_ADDR_FIELD_VALUE = 3'h3;

localparam CDR_PLL_PFD_L_COUNTER_VALUE = 2;
localparam CDR_PLL_PFD_L_COUNTER_ADDR_OFST = 314;
localparam CDR_PLL_PFD_L_COUNTER_ADDR_FIELD_OFST = 0;
localparam CDR_PLL_PFD_L_COUNTER_ADDR_FIELD_HIGH = 2;
localparam CDR_PLL_PFD_L_COUNTER_ADDR_FIELD_SIZE = 3;
localparam CDR_PLL_PFD_L_COUNTER_ADDR_FIELD_BITMASK = 32'h00000007;
localparam CDR_PLL_PFD_L_COUNTER_ADDR_FIELD_VALMASK = 32'h00000003;
localparam CDR_PLL_PFD_L_COUNTER_ADDR_FIELD_VALUE = 3'h3;

localparam CDR_PLL_POSITION_VALUE = "position0";

localparam CDR_PLL_POWER_MODE_VALUE = "mid_power";

localparam CDR_PLL_POWERMODE_AC_BBPD_VALUE = "bbpd_ac_on";

localparam CDR_PLL_POWERMODE_AC_RVCOTOP_VALUE = "rvcotop_ac_div2";

localparam CDR_PLL_POWERMODE_AC_TXPLL_VALUE = "txpll_ac_off";

localparam CDR_PLL_POWERMODE_DC_BBPD_VALUE = "bbpd_dc_on";

localparam CDR_PLL_POWERMODE_DC_RVCOTOP_VALUE = "rvcotop_dc_div2";

localparam CDR_PLL_POWERMODE_DC_TXPLL_VALUE = "powerdown_txpll";

localparam CDR_PLL_PRIMARY_USE_VALUE = "cdr";

localparam CDR_PLL_PROT_MODE_VALUE = "basic_rx";

localparam CDR_PLL_REFERENCE_CLOCK_FREQUENCY_VALUE = "644531250";

localparam CDR_PLL_REQUIRES_GT_CAPABLE_CHANNEL_VALUE = "false";

localparam CDR_PLL_REVERSE_SERIAL_LOOPBACK_VALUE = "no_loopback";
localparam CDR_PLL_REVERSE_SERIAL_LOOPBACK_ADDR0_OFST = 306;
localparam CDR_PLL_REVERSE_SERIAL_LOOPBACK_ADDR0_FIELD_OFST = 4;
localparam CDR_PLL_REVERSE_SERIAL_LOOPBACK_ADDR0_FIELD_HIGH = 5;
localparam CDR_PLL_REVERSE_SERIAL_LOOPBACK_ADDR0_FIELD_SIZE = 2;
localparam CDR_PLL_REVERSE_SERIAL_LOOPBACK_ADDR0_FIELD_BITMASK = 32'h00000030;
localparam CDR_PLL_REVERSE_SERIAL_LOOPBACK_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_REVERSE_SERIAL_LOOPBACK_ADDR0_FIELD_VALUE = 2'h0;
localparam CDR_PLL_REVERSE_SERIAL_LOOPBACK_ADDR1_OFST = 324;
localparam CDR_PLL_REVERSE_SERIAL_LOOPBACK_ADDR1_FIELD_OFST = 1;
localparam CDR_PLL_REVERSE_SERIAL_LOOPBACK_ADDR1_FIELD_HIGH = 1;
localparam CDR_PLL_REVERSE_SERIAL_LOOPBACK_ADDR1_FIELD_SIZE = 1;
localparam CDR_PLL_REVERSE_SERIAL_LOOPBACK_ADDR1_FIELD_BITMASK = 32'h00000002;
localparam CDR_PLL_REVERSE_SERIAL_LOOPBACK_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_REVERSE_SERIAL_LOOPBACK_ADDR1_FIELD_VALUE = 1'h0;

localparam CDR_PLL_SET_CDR_INPUT_FREQ_RANGE_VALUE = 8'd149;
localparam CDR_PLL_SET_CDR_INPUT_FREQ_RANGE_ADDR_OFST = 345;
localparam CDR_PLL_SET_CDR_INPUT_FREQ_RANGE_ADDR_FIELD_OFST = 0;
localparam CDR_PLL_SET_CDR_INPUT_FREQ_RANGE_ADDR_FIELD_HIGH = 7;
localparam CDR_PLL_SET_CDR_INPUT_FREQ_RANGE_ADDR_FIELD_SIZE = 8;
localparam CDR_PLL_SET_CDR_INPUT_FREQ_RANGE_ADDR_FIELD_BITMASK = 32'h000000FF;
localparam CDR_PLL_SET_CDR_INPUT_FREQ_RANGE_ADDR_FIELD_VALMASK = 32'h00000095;
localparam CDR_PLL_SET_CDR_INPUT_FREQ_RANGE_ADDR_FIELD_VALUE = 8'h95;

localparam CDR_PLL_SET_CDR_V2I_ENABLE_VALUE = "enable_v2i_bias";
localparam CDR_PLL_SET_CDR_V2I_ENABLE_ADDR_OFST = 311;
localparam CDR_PLL_SET_CDR_V2I_ENABLE_ADDR_FIELD_OFST = 1;
localparam CDR_PLL_SET_CDR_V2I_ENABLE_ADDR_FIELD_HIGH = 1;
localparam CDR_PLL_SET_CDR_V2I_ENABLE_ADDR_FIELD_SIZE = 1;
localparam CDR_PLL_SET_CDR_V2I_ENABLE_ADDR_FIELD_BITMASK = 32'h00000002;
localparam CDR_PLL_SET_CDR_V2I_ENABLE_ADDR_FIELD_VALMASK = 32'h00000002;
localparam CDR_PLL_SET_CDR_V2I_ENABLE_ADDR_FIELD_VALUE = 1'h1;

localparam CDR_PLL_SET_CDR_VCO_RESET_VALUE = "vco_normal";
localparam CDR_PLL_SET_CDR_VCO_RESET_ADDR_OFST = 311;
localparam CDR_PLL_SET_CDR_VCO_RESET_ADDR_FIELD_OFST = 0;
localparam CDR_PLL_SET_CDR_VCO_RESET_ADDR_FIELD_HIGH = 0;
localparam CDR_PLL_SET_CDR_VCO_RESET_ADDR_FIELD_SIZE = 1;
localparam CDR_PLL_SET_CDR_VCO_RESET_ADDR_FIELD_BITMASK = 32'h00000001;
localparam CDR_PLL_SET_CDR_VCO_RESET_ADDR_FIELD_VALMASK = 32'h00000001;
localparam CDR_PLL_SET_CDR_VCO_RESET_ADDR_FIELD_VALUE = 1'h1;

localparam CDR_PLL_SET_CDR_VCO_SPEED_VALUE = 4'd2;
localparam CDR_PLL_SET_CDR_VCO_SPEED_ADDR_OFST = 311;
localparam CDR_PLL_SET_CDR_VCO_SPEED_ADDR_FIELD_OFST = 2;
localparam CDR_PLL_SET_CDR_VCO_SPEED_ADDR_FIELD_HIGH = 5;
localparam CDR_PLL_SET_CDR_VCO_SPEED_ADDR_FIELD_SIZE = 4;
localparam CDR_PLL_SET_CDR_VCO_SPEED_ADDR_FIELD_BITMASK = 32'h0000003C;
localparam CDR_PLL_SET_CDR_VCO_SPEED_ADDR_FIELD_VALMASK = 32'h00000008;
localparam CDR_PLL_SET_CDR_VCO_SPEED_ADDR_FIELD_VALUE = 4'h2;

localparam CDR_PLL_SET_CDR_VCO_SPEED_FIX_VALUE = 8'd92;
localparam CDR_PLL_SET_CDR_VCO_SPEED_FIX_ADDR0_OFST = 306;
localparam CDR_PLL_SET_CDR_VCO_SPEED_FIX_ADDR0_FIELD_OFST = 0;
localparam CDR_PLL_SET_CDR_VCO_SPEED_FIX_ADDR0_FIELD_HIGH = 3;
localparam CDR_PLL_SET_CDR_VCO_SPEED_FIX_ADDR0_FIELD_SIZE = 4;
localparam CDR_PLL_SET_CDR_VCO_SPEED_FIX_ADDR0_FIELD_BITMASK = 32'h0000000F;
localparam CDR_PLL_SET_CDR_VCO_SPEED_FIX_ADDR0_FIELD_VALMASK = 32'h00000005;
localparam CDR_PLL_SET_CDR_VCO_SPEED_FIX_ADDR0_FIELD_VALUE = 4'h5;
localparam CDR_PLL_SET_CDR_VCO_SPEED_FIX_ADDR1_OFST = 310;
localparam CDR_PLL_SET_CDR_VCO_SPEED_FIX_ADDR1_FIELD_OFST = 0;
localparam CDR_PLL_SET_CDR_VCO_SPEED_FIX_ADDR1_FIELD_HIGH = 3;
localparam CDR_PLL_SET_CDR_VCO_SPEED_FIX_ADDR1_FIELD_SIZE = 4;
localparam CDR_PLL_SET_CDR_VCO_SPEED_FIX_ADDR1_FIELD_BITMASK = 32'h0000000F;
localparam CDR_PLL_SET_CDR_VCO_SPEED_FIX_ADDR1_FIELD_VALMASK = 32'h0000000C;
localparam CDR_PLL_SET_CDR_VCO_SPEED_FIX_ADDR1_FIELD_VALUE = 4'hC;

localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_VALUE = "cdr_vco_max_speedbin_pciegen3";
localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_ADDR0_OFST = 312;
localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_ADDR0_FIELD_OFST = 0;
localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_ADDR0_FIELD_HIGH = 4;
localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_ADDR0_FIELD_SIZE = 5;
localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_ADDR0_FIELD_BITMASK = 32'h0000001F;
localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_ADDR0_FIELD_VALMASK = 32'h00000002;
localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_ADDR0_FIELD_VALUE = 5'h2;
localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_ADDR1_OFST = 316;
localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_ADDR1_FIELD_OFST = 4;
localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_ADDR1_FIELD_HIGH = 7;
localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_ADDR1_FIELD_SIZE = 4;
localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_ADDR1_FIELD_BITMASK = 32'h000000F0;
localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_ADDR1_FIELD_VALMASK = 32'h00000020;
localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_ADDR1_FIELD_VALUE = 4'h2;
localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_ADDR2_OFST = 373;
localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_ADDR2_FIELD_OFST = 4;
localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_ADDR2_FIELD_HIGH = 7;
localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_ADDR2_FIELD_SIZE = 4;
localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_ADDR2_FIELD_BITMASK = 32'h000000F0;
localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_ADDR2_FIELD_VALMASK = 32'h00000040;
localparam CDR_PLL_SET_CDR_VCO_SPEED_PCIEGEN3_ADDR2_FIELD_VALUE = 4'h4;

localparam CDR_PLL_SPEED_GRADE_VALUE = "e2";

localparam CDR_PLL_SUP_MODE_VALUE = "user_mode";

localparam CDR_PLL_TX_PLL_PROT_MODE_VALUE = "txpll_unused";

localparam CDR_PLL_TXPLL_HCLK_DRIVER_ENABLE_VALUE = "hclk_off";
localparam CDR_PLL_TXPLL_HCLK_DRIVER_ENABLE_ADDR0_OFST = 308;
localparam CDR_PLL_TXPLL_HCLK_DRIVER_ENABLE_ADDR0_FIELD_OFST = 7;
localparam CDR_PLL_TXPLL_HCLK_DRIVER_ENABLE_ADDR0_FIELD_HIGH = 7;
localparam CDR_PLL_TXPLL_HCLK_DRIVER_ENABLE_ADDR0_FIELD_SIZE = 1;
localparam CDR_PLL_TXPLL_HCLK_DRIVER_ENABLE_ADDR0_FIELD_BITMASK = 32'h00000080;
localparam CDR_PLL_TXPLL_HCLK_DRIVER_ENABLE_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_TXPLL_HCLK_DRIVER_ENABLE_ADDR0_FIELD_VALUE = 1'h0;
localparam CDR_PLL_TXPLL_HCLK_DRIVER_ENABLE_ADDR1_OFST = 309;
localparam CDR_PLL_TXPLL_HCLK_DRIVER_ENABLE_ADDR1_FIELD_OFST = 7;
localparam CDR_PLL_TXPLL_HCLK_DRIVER_ENABLE_ADDR1_FIELD_HIGH = 7;
localparam CDR_PLL_TXPLL_HCLK_DRIVER_ENABLE_ADDR1_FIELD_SIZE = 1;
localparam CDR_PLL_TXPLL_HCLK_DRIVER_ENABLE_ADDR1_FIELD_BITMASK = 32'h00000080;
localparam CDR_PLL_TXPLL_HCLK_DRIVER_ENABLE_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_TXPLL_HCLK_DRIVER_ENABLE_ADDR1_FIELD_VALUE = 1'h0;

localparam CDR_PLL_RSTB_VALUE = "cdr_lf_reset_off";
localparam CDR_PLL_RSTB_ADDR_OFST = 258;
localparam CDR_PLL_RSTB_ADDR_FIELD_OFST = 2;
localparam CDR_PLL_RSTB_ADDR_FIELD_HIGH = 2;
localparam CDR_PLL_RSTB_ADDR_FIELD_SIZE = 1;
localparam CDR_PLL_RSTB_ADDR_FIELD_BITMASK = 32'h00000004;
localparam CDR_PLL_RSTB_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_RSTB_ADDR_FIELD_VALUE = 1'h0;

localparam CDR_PLL_VCO_FREQ_VALUE = "10312500000";

localparam CDR_PLL_VCO_OVERRANGE_VOLTAGE_VALUE = "vco_overrange_off";
localparam CDR_PLL_VCO_OVERRANGE_VOLTAGE_ADDR_OFST = 310;
localparam CDR_PLL_VCO_OVERRANGE_VOLTAGE_ADDR_FIELD_OFST = 4;
localparam CDR_PLL_VCO_OVERRANGE_VOLTAGE_ADDR_FIELD_HIGH = 5;
localparam CDR_PLL_VCO_OVERRANGE_VOLTAGE_ADDR_FIELD_SIZE = 2;
localparam CDR_PLL_VCO_OVERRANGE_VOLTAGE_ADDR_FIELD_BITMASK = 32'h00000030;
localparam CDR_PLL_VCO_OVERRANGE_VOLTAGE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_VCO_OVERRANGE_VOLTAGE_ADDR_FIELD_VALUE = 2'h0;

localparam CDR_PLL_VCO_UNDERRANGE_VOLTAGE_VALUE = "vco_underange_off";
localparam CDR_PLL_VCO_UNDERRANGE_VOLTAGE_ADDR_OFST = 310;
localparam CDR_PLL_VCO_UNDERRANGE_VOLTAGE_ADDR_FIELD_OFST = 6;
localparam CDR_PLL_VCO_UNDERRANGE_VOLTAGE_ADDR_FIELD_HIGH = 7;
localparam CDR_PLL_VCO_UNDERRANGE_VOLTAGE_ADDR_FIELD_SIZE = 2;
localparam CDR_PLL_VCO_UNDERRANGE_VOLTAGE_ADDR_FIELD_BITMASK = 32'h000000C0;
localparam CDR_PLL_VCO_UNDERRANGE_VOLTAGE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_VCO_UNDERRANGE_VOLTAGE_ADDR_FIELD_VALUE = 2'h0;

localparam CDR_PLL_VREG_OUTPUT_VALUE = "vccdreg_nominal";
localparam CDR_PLL_VREG_OUTPUT_ADDR0_OFST = 346;
localparam CDR_PLL_VREG_OUTPUT_ADDR0_FIELD_OFST = 5;
localparam CDR_PLL_VREG_OUTPUT_ADDR0_FIELD_HIGH = 5;
localparam CDR_PLL_VREG_OUTPUT_ADDR0_FIELD_SIZE = 1;
localparam CDR_PLL_VREG_OUTPUT_ADDR0_FIELD_BITMASK = 32'h00000020;
localparam CDR_PLL_VREG_OUTPUT_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_VREG_OUTPUT_ADDR0_FIELD_VALUE = 1'h0;
localparam CDR_PLL_VREG_OUTPUT_ADDR1_OFST = 349;
localparam CDR_PLL_VREG_OUTPUT_ADDR1_FIELD_OFST = 6;
localparam CDR_PLL_VREG_OUTPUT_ADDR1_FIELD_HIGH = 7;
localparam CDR_PLL_VREG_OUTPUT_ADDR1_FIELD_SIZE = 2;
localparam CDR_PLL_VREG_OUTPUT_ADDR1_FIELD_BITMASK = 32'h000000C0;
localparam CDR_PLL_VREG_OUTPUT_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_VREG_OUTPUT_ADDR1_FIELD_VALUE = 2'h0;
localparam CDR_PLL_VREG_OUTPUT_ADDR2_OFST = 360;
localparam CDR_PLL_VREG_OUTPUT_ADDR2_FIELD_OFST = 6;
localparam CDR_PLL_VREG_OUTPUT_ADDR2_FIELD_HIGH = 7;
localparam CDR_PLL_VREG_OUTPUT_ADDR2_FIELD_SIZE = 2;
localparam CDR_PLL_VREG_OUTPUT_ADDR2_FIELD_BITMASK = 32'h000000C0;
localparam CDR_PLL_VREG_OUTPUT_ADDR2_FIELD_VALMASK = 32'h00000000;
localparam CDR_PLL_VREG_OUTPUT_ADDR2_FIELD_VALUE = 2'h0;

localparam CDR_PLL_DIRECT_FB_VALUE = "direct_fb";
localparam CDR_PLL_DIRECT_FB_ADDR_OFST = 312;
localparam CDR_PLL_DIRECT_FB_ADDR_FIELD_OFST = 7;
localparam CDR_PLL_DIRECT_FB_ADDR_FIELD_HIGH = 7;
localparam CDR_PLL_DIRECT_FB_ADDR_FIELD_SIZE = 1;
localparam CDR_PLL_DIRECT_FB_ADDR_FIELD_BITMASK = 32'h00000080;
localparam CDR_PLL_DIRECT_FB_ADDR_FIELD_VALMASK = 32'h00000080;
localparam CDR_PLL_DIRECT_FB_ADDR_FIELD_VALUE = 1'h1;

localparam CDR_PLL_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam CDR_PLL_PMA_WIDTH_VALUE = 32;

localparam CDR_PLL_CGB_DIV_VALUE = 1;

localparam CDR_PLL_IS_CASCADED_PLL_VALUE = "false";

localparam PMA_RX_BUF_ACT_ISOURCE_DISABLE_VALUE = "isrc_dis";

localparam PMA_RX_BUF_ADVANCED_MODE_VALUE = "false";

localparam PMA_RX_BUF_PM_CR2_RX_PATH_ANALOG_MODE_VALUE = "user_custom";

localparam PMA_RX_BUF_BODYBIAS_ENABLE_VALUE = "bodybias_en";
localparam PMA_RX_BUF_BODYBIAS_ENABLE_ADDR_OFST = 283;
localparam PMA_RX_BUF_BODYBIAS_ENABLE_ADDR_FIELD_OFST = 6;
localparam PMA_RX_BUF_BODYBIAS_ENABLE_ADDR_FIELD_HIGH = 6;
localparam PMA_RX_BUF_BODYBIAS_ENABLE_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_BODYBIAS_ENABLE_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_RX_BUF_BODYBIAS_ENABLE_ADDR_FIELD_VALMASK = 32'h00000040;
localparam PMA_RX_BUF_BODYBIAS_ENABLE_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_RX_BUF_BODYBIAS_SELECT_VALUE = "bodybias_sel1";
localparam PMA_RX_BUF_BODYBIAS_SELECT_ADDR_OFST = 283;
localparam PMA_RX_BUF_BODYBIAS_SELECT_ADDR_FIELD_OFST = 7;
localparam PMA_RX_BUF_BODYBIAS_SELECT_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_BUF_BODYBIAS_SELECT_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_BODYBIAS_SELECT_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_BUF_BODYBIAS_SELECT_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_BODYBIAS_SELECT_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_BYPASS_CTLE_RF_CAL_VALUE = "use_dprio_rfcal";
localparam PMA_RX_BUF_BYPASS_CTLE_RF_CAL_ADDR_OFST = 287;
localparam PMA_RX_BUF_BYPASS_CTLE_RF_CAL_ADDR_FIELD_OFST = 1;
localparam PMA_RX_BUF_BYPASS_CTLE_RF_CAL_ADDR_FIELD_HIGH = 1;
localparam PMA_RX_BUF_BYPASS_CTLE_RF_CAL_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_BYPASS_CTLE_RF_CAL_ADDR_FIELD_BITMASK = 32'h00000002;
localparam PMA_RX_BUF_BYPASS_CTLE_RF_CAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_BYPASS_CTLE_RF_CAL_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_CLK_DIVRX_EN_VALUE = "normal_clk";
localparam PMA_RX_BUF_CLK_DIVRX_EN_ADDR_OFST = 287;
localparam PMA_RX_BUF_CLK_DIVRX_EN_ADDR_FIELD_OFST = 3;
localparam PMA_RX_BUF_CLK_DIVRX_EN_ADDR_FIELD_HIGH = 3;
localparam PMA_RX_BUF_CLK_DIVRX_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_CLK_DIVRX_EN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam PMA_RX_BUF_CLK_DIVRX_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_CLK_DIVRX_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_CONST_GM_EN_VALUE = "cgm_en_3";
localparam PMA_RX_BUF_CONST_GM_EN_ADDR_OFST = 289;
localparam PMA_RX_BUF_CONST_GM_EN_ADDR_FIELD_OFST = 4;
localparam PMA_RX_BUF_CONST_GM_EN_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_BUF_CONST_GM_EN_ADDR_FIELD_SIZE = 2;
localparam PMA_RX_BUF_CONST_GM_EN_ADDR_FIELD_BITMASK = 32'h00000030;
localparam PMA_RX_BUF_CONST_GM_EN_ADDR_FIELD_VALMASK = 32'h00000030;
localparam PMA_RX_BUF_CONST_GM_EN_ADDR_FIELD_VALUE = 2'h3;

localparam PMA_RX_BUF_CTLE_AC_GAIN_VALUE = 4'd0;
localparam PMA_RX_BUF_CTLE_AC_GAIN_ADDR_OFST = 282;
localparam PMA_RX_BUF_CTLE_AC_GAIN_ADDR_FIELD_OFST = 4;
localparam PMA_RX_BUF_CTLE_AC_GAIN_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_BUF_CTLE_AC_GAIN_ADDR_FIELD_SIZE = 4;
localparam PMA_RX_BUF_CTLE_AC_GAIN_ADDR_FIELD_BITMASK = 32'h000000F0;
localparam PMA_RX_BUF_CTLE_AC_GAIN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_CTLE_AC_GAIN_ADDR_FIELD_VALUE = 4'h0;

localparam PMA_RX_BUF_CTLE_EQ_GAIN_VALUE = 6'd0;
localparam PMA_RX_BUF_CTLE_EQ_GAIN_ADDR0_OFST = 284;
localparam PMA_RX_BUF_CTLE_EQ_GAIN_ADDR0_FIELD_OFST = 0;
localparam PMA_RX_BUF_CTLE_EQ_GAIN_ADDR0_FIELD_HIGH = 4;
localparam PMA_RX_BUF_CTLE_EQ_GAIN_ADDR0_FIELD_SIZE = 5;
localparam PMA_RX_BUF_CTLE_EQ_GAIN_ADDR0_FIELD_BITMASK = 32'h0000001F;
localparam PMA_RX_BUF_CTLE_EQ_GAIN_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_CTLE_EQ_GAIN_ADDR0_FIELD_VALUE = 5'h0;
localparam PMA_RX_BUF_CTLE_EQ_GAIN_ADDR1_OFST = 286;
localparam PMA_RX_BUF_CTLE_EQ_GAIN_ADDR1_FIELD_OFST = 7;
localparam PMA_RX_BUF_CTLE_EQ_GAIN_ADDR1_FIELD_HIGH = 7;
localparam PMA_RX_BUF_CTLE_EQ_GAIN_ADDR1_FIELD_SIZE = 1;
localparam PMA_RX_BUF_CTLE_EQ_GAIN_ADDR1_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_BUF_CTLE_EQ_GAIN_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_CTLE_EQ_GAIN_ADDR1_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_CTLE_HIRES_BYPASS_VALUE = "ctle_hires_en";
localparam PMA_RX_BUF_CTLE_HIRES_BYPASS_ADDR_OFST = 360;
localparam PMA_RX_BUF_CTLE_HIRES_BYPASS_ADDR_FIELD_OFST = 4;
localparam PMA_RX_BUF_CTLE_HIRES_BYPASS_ADDR_FIELD_HIGH = 4;
localparam PMA_RX_BUF_CTLE_HIRES_BYPASS_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_CTLE_HIRES_BYPASS_ADDR_FIELD_BITMASK = 32'h00000010;
localparam PMA_RX_BUF_CTLE_HIRES_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_CTLE_HIRES_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_CTLE_OC_IB_SEL_VALUE = "ib_oc_bw3";
localparam PMA_RX_BUF_CTLE_OC_IB_SEL_ADDR_OFST = 286;
localparam PMA_RX_BUF_CTLE_OC_IB_SEL_ADDR_FIELD_OFST = 3;
localparam PMA_RX_BUF_CTLE_OC_IB_SEL_ADDR_FIELD_HIGH = 4;
localparam PMA_RX_BUF_CTLE_OC_IB_SEL_ADDR_FIELD_SIZE = 2;
localparam PMA_RX_BUF_CTLE_OC_IB_SEL_ADDR_FIELD_BITMASK = 32'h00000018;
localparam PMA_RX_BUF_CTLE_OC_IB_SEL_ADDR_FIELD_VALMASK = 32'h00000018;
localparam PMA_RX_BUF_CTLE_OC_IB_SEL_ADDR_FIELD_VALUE = 2'h3;

localparam PMA_RX_BUF_CTLE_OC_SIGN_VALUE = "add_i_2_p_eq";
localparam PMA_RX_BUF_CTLE_OC_SIGN_ADDR_OFST = 283;
localparam PMA_RX_BUF_CTLE_OC_SIGN_ADDR_FIELD_OFST = 2;
localparam PMA_RX_BUF_CTLE_OC_SIGN_ADDR_FIELD_HIGH = 2;
localparam PMA_RX_BUF_CTLE_OC_SIGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_CTLE_OC_SIGN_ADDR_FIELD_BITMASK = 32'h00000004;
localparam PMA_RX_BUF_CTLE_OC_SIGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_CTLE_OC_SIGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_CTLE_RF_CAL_VALUE = 3'd3;
localparam PMA_RX_BUF_CTLE_RF_CAL_ADDR_OFST = 286;
localparam PMA_RX_BUF_CTLE_RF_CAL_ADDR_FIELD_OFST = 0;
localparam PMA_RX_BUF_CTLE_RF_CAL_ADDR_FIELD_HIGH = 2;
localparam PMA_RX_BUF_CTLE_RF_CAL_ADDR_FIELD_SIZE = 3;
localparam PMA_RX_BUF_CTLE_RF_CAL_ADDR_FIELD_BITMASK = 32'h00000007;
localparam PMA_RX_BUF_CTLE_RF_CAL_ADDR_FIELD_VALMASK = 32'h00000003;
localparam PMA_RX_BUF_CTLE_RF_CAL_ADDR_FIELD_VALUE = 3'h3;

localparam PMA_RX_BUF_CTLE_TIA_ISEL_VALUE = "ib_tia_bw1";
localparam PMA_RX_BUF_CTLE_TIA_ISEL_ADDR_OFST = 302;
localparam PMA_RX_BUF_CTLE_TIA_ISEL_ADDR_FIELD_OFST = 4;
localparam PMA_RX_BUF_CTLE_TIA_ISEL_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_BUF_CTLE_TIA_ISEL_ADDR_FIELD_SIZE = 2;
localparam PMA_RX_BUF_CTLE_TIA_ISEL_ADDR_FIELD_BITMASK = 32'h00000030;
localparam PMA_RX_BUF_CTLE_TIA_ISEL_ADDR_FIELD_VALMASK = 32'h00000010;
localparam PMA_RX_BUF_CTLE_TIA_ISEL_ADDR_FIELD_VALUE = 2'h1;

localparam PMA_RX_BUF_PM_CR2_TX_RX_CVP_MODE_VALUE = "cvp_off";
localparam PMA_RX_BUF_PM_CR2_TX_RX_CVP_MODE_ADDR_OFST = 369;
localparam PMA_RX_BUF_PM_CR2_TX_RX_CVP_MODE_ADDR_FIELD_OFST = 0;
localparam PMA_RX_BUF_PM_CR2_TX_RX_CVP_MODE_ADDR_FIELD_HIGH = 0;
localparam PMA_RX_BUF_PM_CR2_TX_RX_CVP_MODE_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_PM_CR2_TX_RX_CVP_MODE_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_RX_BUF_PM_CR2_TX_RX_CVP_MODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_PM_CR2_TX_RX_CVP_MODE_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_DATARATE_BPS_VALUE = "10312500000";

localparam PMA_RX_BUF_PM_CR2_RX_PATH_DATARATE_BPS_VALUE = "10312500000";

localparam PMA_RX_BUF_PM_CR2_RX_PATH_DATAWIDTH_VALUE = 8'd32;

localparam PMA_RX_BUF_DFE_H1_CAL_EN_VALUE = "dfe_h1_cal_disable";
localparam PMA_RX_BUF_DFE_H1_CAL_EN_ADDR_OFST = 342;
localparam PMA_RX_BUF_DFE_H1_CAL_EN_ADDR_FIELD_OFST = 2;
localparam PMA_RX_BUF_DFE_H1_CAL_EN_ADDR_FIELD_HIGH = 2;
localparam PMA_RX_BUF_DFE_H1_CAL_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_DFE_H1_CAL_EN_ADDR_FIELD_BITMASK = 32'h00000004;
localparam PMA_RX_BUF_DFE_H1_CAL_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_DFE_H1_CAL_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_DFE_H1_SW_TOGG_VALUE = "dfe_h1_tog_neg";
localparam PMA_RX_BUF_DFE_H1_SW_TOGG_ADDR_OFST = 342;
localparam PMA_RX_BUF_DFE_H1_SW_TOGG_ADDR_FIELD_OFST = 3;
localparam PMA_RX_BUF_DFE_H1_SW_TOGG_ADDR_FIELD_HIGH = 3;
localparam PMA_RX_BUF_DFE_H1_SW_TOGG_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_DFE_H1_SW_TOGG_ADDR_FIELD_BITMASK = 32'h00000008;
localparam PMA_RX_BUF_DFE_H1_SW_TOGG_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_DFE_H1_SW_TOGG_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_DIAG_LP_EN_VALUE = "dlp_off";
localparam PMA_RX_BUF_DIAG_LP_EN_ADDR_OFST = 285;
localparam PMA_RX_BUF_DIAG_LP_EN_ADDR_FIELD_OFST = 0;
localparam PMA_RX_BUF_DIAG_LP_EN_ADDR_FIELD_HIGH = 0;
localparam PMA_RX_BUF_DIAG_LP_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_DIAG_LP_EN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_RX_BUF_DIAG_LP_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_DIAG_LP_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_EQ_BW_SEL_VALUE = "eq_bw_1";
localparam PMA_RX_BUF_EQ_BW_SEL_ADDR_OFST = 287;
localparam PMA_RX_BUF_EQ_BW_SEL_ADDR_FIELD_OFST = 4;
localparam PMA_RX_BUF_EQ_BW_SEL_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_BUF_EQ_BW_SEL_ADDR_FIELD_SIZE = 2;
localparam PMA_RX_BUF_EQ_BW_SEL_ADDR_FIELD_BITMASK = 32'h00000030;
localparam PMA_RX_BUF_EQ_BW_SEL_ADDR_FIELD_VALMASK = 32'h00000010;
localparam PMA_RX_BUF_EQ_BW_SEL_ADDR_FIELD_VALUE = 2'h1;

localparam PMA_RX_BUF_EQ_CDGEN_SEL_VALUE = "eq_cdgen_2";
localparam PMA_RX_BUF_EQ_CDGEN_SEL_ADDR0_OFST = 328;
localparam PMA_RX_BUF_EQ_CDGEN_SEL_ADDR0_FIELD_OFST = 2;
localparam PMA_RX_BUF_EQ_CDGEN_SEL_ADDR0_FIELD_HIGH = 2;
localparam PMA_RX_BUF_EQ_CDGEN_SEL_ADDR0_FIELD_SIZE = 1;
localparam PMA_RX_BUF_EQ_CDGEN_SEL_ADDR0_FIELD_BITMASK = 32'h00000004;
localparam PMA_RX_BUF_EQ_CDGEN_SEL_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_EQ_CDGEN_SEL_ADDR0_FIELD_VALUE = 1'h0;
localparam PMA_RX_BUF_EQ_CDGEN_SEL_ADDR1_OFST = 337;
localparam PMA_RX_BUF_EQ_CDGEN_SEL_ADDR1_FIELD_OFST = 7;
localparam PMA_RX_BUF_EQ_CDGEN_SEL_ADDR1_FIELD_HIGH = 7;
localparam PMA_RX_BUF_EQ_CDGEN_SEL_ADDR1_FIELD_SIZE = 1;
localparam PMA_RX_BUF_EQ_CDGEN_SEL_ADDR1_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_BUF_EQ_CDGEN_SEL_ADDR1_FIELD_VALMASK = 32'h00000080;
localparam PMA_RX_BUF_EQ_CDGEN_SEL_ADDR1_FIELD_VALUE = 1'h1;

localparam PMA_RX_BUF_EQ_ISEL_VALUE = "eq_isel_1";
localparam PMA_RX_BUF_EQ_ISEL_ADDR_OFST = 370;
localparam PMA_RX_BUF_EQ_ISEL_ADDR_FIELD_OFST = 4;
localparam PMA_RX_BUF_EQ_ISEL_ADDR_FIELD_HIGH = 4;
localparam PMA_RX_BUF_EQ_ISEL_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_EQ_ISEL_ADDR_FIELD_BITMASK = 32'h00000010;
localparam PMA_RX_BUF_EQ_ISEL_ADDR_FIELD_VALMASK = 32'h00000010;
localparam PMA_RX_BUF_EQ_ISEL_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_RX_BUF_EQ_SEL_VALUE = "eq_sel_1";
localparam PMA_RX_BUF_EQ_SEL_ADDR_OFST = 302;
localparam PMA_RX_BUF_EQ_SEL_ADDR_FIELD_OFST = 6;
localparam PMA_RX_BUF_EQ_SEL_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_BUF_EQ_SEL_ADDR_FIELD_SIZE = 2;
localparam PMA_RX_BUF_EQ_SEL_ADDR_FIELD_BITMASK = 32'h000000C0;
localparam PMA_RX_BUF_EQ_SEL_ADDR_FIELD_VALMASK = 32'h00000040;
localparam PMA_RX_BUF_EQ_SEL_ADDR_FIELD_VALUE = 2'h1;

localparam PMA_RX_BUF_PM_CR2_RX_PATH_GT_ENABLED_VALUE = "disable";

localparam PMA_RX_BUF_INITIAL_SETTINGS_VALUE = "true";

localparam PMA_RX_BUF_PM_CR2_RX_PATH_INITIAL_SETTINGS_VALUE = "true";

localparam PMA_RX_BUF_PM_CR2_RX_PATH_JTAG_HYS_VALUE = "hys_increase_disable";
localparam PMA_RX_BUF_PM_CR2_RX_PATH_JTAG_HYS_ADDR_OFST = 367;
localparam PMA_RX_BUF_PM_CR2_RX_PATH_JTAG_HYS_ADDR_FIELD_OFST = 1;
localparam PMA_RX_BUF_PM_CR2_RX_PATH_JTAG_HYS_ADDR_FIELD_HIGH = 1;
localparam PMA_RX_BUF_PM_CR2_RX_PATH_JTAG_HYS_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_PM_CR2_RX_PATH_JTAG_HYS_ADDR_FIELD_BITMASK = 32'h00000002;
localparam PMA_RX_BUF_PM_CR2_RX_PATH_JTAG_HYS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_PM_CR2_RX_PATH_JTAG_HYS_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_PM_CR2_RX_PATH_JTAG_LP_VALUE = "lp_off";
localparam PMA_RX_BUF_PM_CR2_RX_PATH_JTAG_LP_ADDR_OFST = 268;
localparam PMA_RX_BUF_PM_CR2_RX_PATH_JTAG_LP_ADDR_FIELD_OFST = 3;
localparam PMA_RX_BUF_PM_CR2_RX_PATH_JTAG_LP_ADDR_FIELD_HIGH = 3;
localparam PMA_RX_BUF_PM_CR2_RX_PATH_JTAG_LP_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_PM_CR2_RX_PATH_JTAG_LP_ADDR_FIELD_BITMASK = 32'h00000008;
localparam PMA_RX_BUF_PM_CR2_RX_PATH_JTAG_LP_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_PM_CR2_RX_PATH_JTAG_LP_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_PM_CR2_RX_PATH_LINK_VALUE = "sr";

localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_VALUE = "loopback_disabled";
localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_ADDR0_OFST = 285;
localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_ADDR0_FIELD_OFST = 0;
localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_ADDR0_FIELD_HIGH = 0;
localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_ADDR0_FIELD_SIZE = 1;
localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_ADDR0_FIELD_BITMASK = 32'h00000001;
localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_ADDR0_FIELD_VALUE = 1'h0;
localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_ADDR1_OFST = 322;
localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_ADDR1_FIELD_OFST = 4;
localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_ADDR1_FIELD_HIGH = 4;
localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_ADDR1_FIELD_SIZE = 1;
localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_ADDR1_FIELD_BITMASK = 32'h00000010;
localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_ADDR1_FIELD_VALUE = 1'h0;
localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_ADDR2_OFST = 324;
localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_ADDR2_FIELD_OFST = 1;
localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_ADDR2_FIELD_HIGH = 1;
localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_ADDR2_FIELD_SIZE = 1;
localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_ADDR2_FIELD_BITMASK = 32'h00000002;
localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_ADDR2_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_XRX_PATH_XCDR_DESER_XCDR_LOOPBACK_MODE_ADDR2_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_LOOPBACK_MODES_VALUE = "lpbk_disable";

localparam PMA_RX_BUF_OFFSET_CANCELLATION_COARSE_VALUE = "coarse_setting_0";
localparam PMA_RX_BUF_OFFSET_CANCELLATION_COARSE_ADDR_OFST = 289;
localparam PMA_RX_BUF_OFFSET_CANCELLATION_COARSE_ADDR_FIELD_OFST = 0;
localparam PMA_RX_BUF_OFFSET_CANCELLATION_COARSE_ADDR_FIELD_HIGH = 2;
localparam PMA_RX_BUF_OFFSET_CANCELLATION_COARSE_ADDR_FIELD_SIZE = 3;
localparam PMA_RX_BUF_OFFSET_CANCELLATION_COARSE_ADDR_FIELD_BITMASK = 32'h00000007;
localparam PMA_RX_BUF_OFFSET_CANCELLATION_COARSE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_OFFSET_CANCELLATION_COARSE_ADDR_FIELD_VALUE = 3'h0;

localparam PMA_RX_BUF_OFFSET_RX_CAL_EN_VALUE = "rx_oc_dis";

localparam PMA_RX_BUF_OPTIMAL_VALUE = "true";

localparam PMA_RX_BUF_PM_CR2_RX_PATH_OPTIMAL_VALUE = "true";

localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_VALUE = "non_pcie";
localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_ADDR0_OFST = 281;
localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_ADDR0_FIELD_OFST = 0;
localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_ADDR0_FIELD_HIGH = 0;
localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_ADDR0_FIELD_SIZE = 1;
localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_ADDR0_FIELD_BITMASK = 32'h00000001;
localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_ADDR0_FIELD_VALUE = 1'h0;
localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_ADDR1_OFST = 368;
localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_ADDR1_FIELD_OFST = 0;
localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_ADDR1_FIELD_HIGH = 0;
localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_ADDR1_FIELD_SIZE = 1;
localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_ADDR1_FIELD_BITMASK = 32'h00000001;
localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_ADDR1_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_BITWIDTH_VALUE = "pcie_gen3_32b";
localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_BITWIDTH_ADDR_OFST = 281;
localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_BITWIDTH_ADDR_FIELD_OFST = 1;
localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_BITWIDTH_ADDR_FIELD_HIGH = 1;
localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_BITWIDTH_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_BITWIDTH_ADDR_FIELD_BITMASK = 32'h00000002;
localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_BITWIDTH_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_PM_CR2_TX_RX_PCIE_GEN_BITWIDTH_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_PDB_RX_VALUE = "normal_rx_on";
localparam PMA_RX_BUF_PDB_RX_ADDR_OFST = 283;
localparam PMA_RX_BUF_PDB_RX_ADDR_FIELD_OFST = 0;
localparam PMA_RX_BUF_PDB_RX_ADDR_FIELD_HIGH = 0;
localparam PMA_RX_BUF_PDB_RX_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_PDB_RX_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_RX_BUF_PDB_RX_ADDR_FIELD_VALMASK = 32'h00000001;
localparam PMA_RX_BUF_PDB_RX_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_RX_BUF_PM_CR2_RX_PATH_PMA_RX_DIVCLK_HZ_VALUE = "322265625";

localparam PMA_RX_BUF_POWER_MODE_VALUE = "mid_power";

localparam PMA_RX_BUF_PM_CR2_RX_PATH_POWER_MODE_VALUE = "mid_power";

localparam PMA_RX_BUF_PM_CR2_RX_PATH_POWER_RAIL_EHT_VALUE = 12'd0;

localparam PMA_RX_BUF_POWER_RAIL_ER_VALUE = 12'd0;

localparam PMA_RX_BUF_PM_CR2_RX_PATH_POWER_RAIL_ER_VALUE = 12'd1030;

localparam PMA_RX_BUF_POWERMODE_AC_CTLE_VALUE = "ctle_pwr_ac2";

localparam PMA_RX_BUF_POWERMODE_AC_VCM_VALUE = "vcm_pwr_ac3";

localparam PMA_RX_BUF_POWERMODE_AC_VGA_VALUE = "vga_pwr_ac_half";

localparam PMA_RX_BUF_POWERMODE_DC_CTLE_VALUE = "ctle_pwr_dc1";

localparam PMA_RX_BUF_POWERMODE_DC_VCM_VALUE = "vcm_pwr_dc3";

localparam PMA_RX_BUF_POWERMODE_DC_VGA_VALUE = "vga_pwr_dc_half";

localparam PMA_RX_BUF_PROT_MODE_VALUE = "basic_rx";

localparam PMA_RX_BUF_PM_CR2_RX_PATH_PROT_MODE_VALUE = "basic_rx";

localparam PMA_RX_BUF_QPI_AFE_EN_VALUE = "ctle_mode_en";

localparam PMA_RX_BUF_QPI_ENABLE_VALUE = "non_qpi_mode";
localparam PMA_RX_BUF_QPI_ENABLE_ADDR_OFST = 283;
localparam PMA_RX_BUF_QPI_ENABLE_ADDR_FIELD_OFST = 1;
localparam PMA_RX_BUF_QPI_ENABLE_ADDR_FIELD_HIGH = 1;
localparam PMA_RX_BUF_QPI_ENABLE_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_QPI_ENABLE_ADDR_FIELD_BITMASK = 32'h00000002;
localparam PMA_RX_BUF_QPI_ENABLE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_QPI_ENABLE_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_REFCLK_EN_VALUE = "disable";
localparam PMA_RX_BUF_REFCLK_EN_ADDR_OFST = 289;
localparam PMA_RX_BUF_REFCLK_EN_ADDR_FIELD_OFST = 3;
localparam PMA_RX_BUF_REFCLK_EN_ADDR_FIELD_HIGH = 3;
localparam PMA_RX_BUF_REFCLK_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_REFCLK_EN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam PMA_RX_BUF_REFCLK_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_REFCLK_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_RX_ATB_SELECT_VALUE = "atb_disable";
localparam PMA_RX_BUF_RX_ATB_SELECT_ADDR_OFST = 290;
localparam PMA_RX_BUF_RX_ATB_SELECT_ADDR_FIELD_OFST = 2;
localparam PMA_RX_BUF_RX_ATB_SELECT_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_BUF_RX_ATB_SELECT_ADDR_FIELD_SIZE = 6;
localparam PMA_RX_BUF_RX_ATB_SELECT_ADDR_FIELD_BITMASK = 32'h000000FC;
localparam PMA_RX_BUF_RX_ATB_SELECT_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_RX_ATB_SELECT_ADDR_FIELD_VALUE = 6'h0;

localparam PMA_RX_BUF_RX_LFEQ_ENABLE_VALUE = "rx_lfeq_disable";
localparam PMA_RX_BUF_RX_LFEQ_ENABLE_ADDR_OFST = 287;
localparam PMA_RX_BUF_RX_LFEQ_ENABLE_ADDR_FIELD_OFST = 6;
localparam PMA_RX_BUF_RX_LFEQ_ENABLE_ADDR_FIELD_HIGH = 6;
localparam PMA_RX_BUF_RX_LFEQ_ENABLE_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_RX_LFEQ_ENABLE_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_RX_BUF_RX_LFEQ_ENABLE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_RX_LFEQ_ENABLE_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_RX_VGA_OC_EN_VALUE = "vga_cal_off";

localparam PMA_RX_BUF_SEL_VCM_CTLE_VALUE = "vocm_eq_gndref";
localparam PMA_RX_BUF_SEL_VCM_CTLE_ADDR_OFST = 327;
localparam PMA_RX_BUF_SEL_VCM_CTLE_ADDR_FIELD_OFST = 7;
localparam PMA_RX_BUF_SEL_VCM_CTLE_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_BUF_SEL_VCM_CTLE_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_SEL_VCM_CTLE_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_BUF_SEL_VCM_CTLE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_SEL_VCM_CTLE_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_SEL_VCM_TIA_VALUE = "vocm_tia_fixed";
localparam PMA_RX_BUF_SEL_VCM_TIA_ADDR_OFST = 290;
localparam PMA_RX_BUF_SEL_VCM_TIA_ADDR_FIELD_OFST = 0;
localparam PMA_RX_BUF_SEL_VCM_TIA_ADDR_FIELD_HIGH = 0;
localparam PMA_RX_BUF_SEL_VCM_TIA_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_SEL_VCM_TIA_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_RX_BUF_SEL_VCM_TIA_ADDR_FIELD_VALMASK = 32'h00000001;
localparam PMA_RX_BUF_SEL_VCM_TIA_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_RX_BUF_PM_CR2_RX_PATH_SPEED_GRADE_VALUE = "e2";

localparam PMA_RX_BUF_SUP_MODE_VALUE = "user_mode";

localparam PMA_RX_BUF_PM_CR2_RX_PATH_SUP_MODE_VALUE = "user_mode";

localparam PMA_RX_BUF_TERM_SEL_VALUE = "r_r4";
localparam PMA_RX_BUF_TERM_SEL_ADDR_OFST = 284;
localparam PMA_RX_BUF_TERM_SEL_ADDR_FIELD_OFST = 5;
localparam PMA_RX_BUF_TERM_SEL_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_BUF_TERM_SEL_ADDR_FIELD_SIZE = 3;
localparam PMA_RX_BUF_TERM_SEL_ADDR_FIELD_BITMASK = 32'h000000E0;
localparam PMA_RX_BUF_TERM_SEL_ADDR_FIELD_VALMASK = 32'h00000080;
localparam PMA_RX_BUF_TERM_SEL_ADDR_FIELD_VALUE = 3'h4;

localparam PMA_RX_BUF_TERM_SYNC_BYPASS_VALUE = "bypass_termsync";

localparam PMA_RX_BUF_TERM_TRI_ENABLE_VALUE = "disable_tri";
localparam PMA_RX_BUF_TERM_TRI_ENABLE_ADDR_OFST = 289;
localparam PMA_RX_BUF_TERM_TRI_ENABLE_ADDR_FIELD_OFST = 7;
localparam PMA_RX_BUF_TERM_TRI_ENABLE_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_BUF_TERM_TRI_ENABLE_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_TERM_TRI_ENABLE_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_BUF_TERM_TRI_ENABLE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_TERM_TRI_ENABLE_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_PM_CR2_TX_RX_TESTMUX_SELECT_VALUE = "setting0";
localparam PMA_RX_BUF_PM_CR2_TX_RX_TESTMUX_SELECT_ADDR_OFST = 369;
localparam PMA_RX_BUF_PM_CR2_TX_RX_TESTMUX_SELECT_ADDR_FIELD_OFST = 1;
localparam PMA_RX_BUF_PM_CR2_TX_RX_TESTMUX_SELECT_ADDR_FIELD_HIGH = 4;
localparam PMA_RX_BUF_PM_CR2_TX_RX_TESTMUX_SELECT_ADDR_FIELD_SIZE = 4;
localparam PMA_RX_BUF_PM_CR2_TX_RX_TESTMUX_SELECT_ADDR_FIELD_BITMASK = 32'h0000001E;
localparam PMA_RX_BUF_PM_CR2_TX_RX_TESTMUX_SELECT_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_PM_CR2_TX_RX_TESTMUX_SELECT_ADDR_FIELD_VALUE = 4'h0;

localparam PMA_RX_BUF_TIA_SEL_VALUE = "tia_sel_1";
localparam PMA_RX_BUF_TIA_SEL_ADDR_OFST = 286;
localparam PMA_RX_BUF_TIA_SEL_ADDR_FIELD_OFST = 6;
localparam PMA_RX_BUF_TIA_SEL_ADDR_FIELD_HIGH = 6;
localparam PMA_RX_BUF_TIA_SEL_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_TIA_SEL_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_RX_BUF_TIA_SEL_ADDR_FIELD_VALMASK = 32'h00000040;
localparam PMA_RX_BUF_TIA_SEL_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_RX_BUF_PM_CR2_RX_PATH_TILE_TYPE_VALUE = "h";

localparam PMA_RX_BUF_VCM_CAL_I_VALUE = 4'd4;
localparam PMA_RX_BUF_VCM_CAL_I_ADDR_OFST = 288;
localparam PMA_RX_BUF_VCM_CAL_I_ADDR_FIELD_OFST = 0;
localparam PMA_RX_BUF_VCM_CAL_I_ADDR_FIELD_HIGH = 3;
localparam PMA_RX_BUF_VCM_CAL_I_ADDR_FIELD_SIZE = 4;
localparam PMA_RX_BUF_VCM_CAL_I_ADDR_FIELD_BITMASK = 32'h0000000F;
localparam PMA_RX_BUF_VCM_CAL_I_ADDR_FIELD_VALMASK = 32'h00000004;
localparam PMA_RX_BUF_VCM_CAL_I_ADDR_FIELD_VALUE = 4'h4;

localparam PMA_RX_BUF_VCM_CURRENT_ADD_VALUE = "vcm_current_3";
localparam PMA_RX_BUF_VCM_CURRENT_ADD_ADDR_OFST = 288;
localparam PMA_RX_BUF_VCM_CURRENT_ADD_ADDR_FIELD_OFST = 4;
localparam PMA_RX_BUF_VCM_CURRENT_ADD_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_BUF_VCM_CURRENT_ADD_ADDR_FIELD_SIZE = 2;
localparam PMA_RX_BUF_VCM_CURRENT_ADD_ADDR_FIELD_BITMASK = 32'h00000030;
localparam PMA_RX_BUF_VCM_CURRENT_ADD_ADDR_FIELD_VALMASK = 32'h00000030;
localparam PMA_RX_BUF_VCM_CURRENT_ADD_ADDR_FIELD_VALUE = 2'h3;

localparam PMA_RX_BUF_VCM_SEL_VALUE = "vcm_l1";
localparam PMA_RX_BUF_VCM_SEL_ADDR_OFST = 283;
localparam PMA_RX_BUF_VCM_SEL_ADDR_FIELD_OFST = 3;
localparam PMA_RX_BUF_VCM_SEL_ADDR_FIELD_HIGH = 4;
localparam PMA_RX_BUF_VCM_SEL_ADDR_FIELD_SIZE = 2;
localparam PMA_RX_BUF_VCM_SEL_ADDR_FIELD_BITMASK = 32'h00000018;
localparam PMA_RX_BUF_VCM_SEL_ADDR_FIELD_VALMASK = 32'h00000008;
localparam PMA_RX_BUF_VCM_SEL_ADDR_FIELD_VALUE = 2'h1;

localparam PMA_RX_BUF_VCM_SEL_VCCREF_VALUE = 4'd5;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR0_OFST = 308;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR0_FIELD0_OFST = 3;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR0_FIELD0_HIGH = 3;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR0_FIELD0_SIZE = 1;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR0_FIELD0_BITMASK = 32'h00000008;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR0_FIELD0_VALMASK = 32'h00000008;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR0_FIELD0_VALUE = 1'h1;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR0_FIELD1_OFST = 6;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR0_FIELD1_HIGH = 6;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR0_FIELD1_SIZE = 1;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR0_FIELD1_BITMASK = 32'h00000040;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR0_FIELD1_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR0_FIELD1_VALUE = 1'h0;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR1_OFST = 309;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR1_FIELD_OFST = 6;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR1_FIELD_HIGH = 6;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR1_FIELD_SIZE = 1;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR1_FIELD_BITMASK = 32'h00000040;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR1_FIELD_VALMASK = 32'h00000040;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR1_FIELD_VALUE = 1'h1;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR2_OFST = 324;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR2_FIELD_OFST = 0;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR2_FIELD_HIGH = 0;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR2_FIELD_SIZE = 1;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR2_FIELD_BITMASK = 32'h00000001;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR2_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_VCM_SEL_VCCREF_ADDR2_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_VGA_DC_GAIN_VALUE = 5'd0;
localparam PMA_RX_BUF_VGA_DC_GAIN_ADDR0_OFST = 282;
localparam PMA_RX_BUF_VGA_DC_GAIN_ADDR0_FIELD_OFST = 0;
localparam PMA_RX_BUF_VGA_DC_GAIN_ADDR0_FIELD_HIGH = 3;
localparam PMA_RX_BUF_VGA_DC_GAIN_ADDR0_FIELD_SIZE = 4;
localparam PMA_RX_BUF_VGA_DC_GAIN_ADDR0_FIELD_BITMASK = 32'h0000000F;
localparam PMA_RX_BUF_VGA_DC_GAIN_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_VGA_DC_GAIN_ADDR0_FIELD_VALUE = 4'h0;
localparam PMA_RX_BUF_VGA_DC_GAIN_ADDR1_OFST = 287;
localparam PMA_RX_BUF_VGA_DC_GAIN_ADDR1_FIELD_OFST = 0;
localparam PMA_RX_BUF_VGA_DC_GAIN_ADDR1_FIELD_HIGH = 0;
localparam PMA_RX_BUF_VGA_DC_GAIN_ADDR1_FIELD_SIZE = 1;
localparam PMA_RX_BUF_VGA_DC_GAIN_ADDR1_FIELD_BITMASK = 32'h00000001;
localparam PMA_RX_BUF_VGA_DC_GAIN_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_VGA_DC_GAIN_ADDR1_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_VGA_HALFBW_EN_VALUE = "vga_half_bw_enabled";
localparam PMA_RX_BUF_VGA_HALFBW_EN_ADDR_OFST = 286;
localparam PMA_RX_BUF_VGA_HALFBW_EN_ADDR_FIELD_OFST = 5;
localparam PMA_RX_BUF_VGA_HALFBW_EN_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_BUF_VGA_HALFBW_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_VGA_HALFBW_EN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_RX_BUF_VGA_HALFBW_EN_ADDR_FIELD_VALMASK = 32'h00000020;
localparam PMA_RX_BUF_VGA_HALFBW_EN_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_RX_BUF_VGA_IB_MAX_EN_VALUE = "vga_ib_max_disable";
localparam PMA_RX_BUF_VGA_IB_MAX_EN_ADDR_OFST = 372;
localparam PMA_RX_BUF_VGA_IB_MAX_EN_ADDR_FIELD_OFST = 7;
localparam PMA_RX_BUF_VGA_IB_MAX_EN_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_BUF_VGA_IB_MAX_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_BUF_VGA_IB_MAX_EN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_BUF_VGA_IB_MAX_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_BUF_VGA_IB_MAX_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_BUF_VGA_MODE_VALUE = "vga_off";

localparam PMA_RX_BUF_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam PMA_RX_DESER_BITSLIP_BYPASS_VALUE = "bs_bypass_yes";
localparam PMA_RX_DESER_BITSLIP_BYPASS_ADDR_OFST = 322;
localparam PMA_RX_DESER_BITSLIP_BYPASS_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DESER_BITSLIP_BYPASS_ADDR_FIELD_HIGH = 0;
localparam PMA_RX_DESER_BITSLIP_BYPASS_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DESER_BITSLIP_BYPASS_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_RX_DESER_BITSLIP_BYPASS_ADDR_FIELD_VALMASK = 32'h00000001;
localparam PMA_RX_DESER_BITSLIP_BYPASS_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_RX_DESER_BTI_PROTECTED_VALUE = "false";

localparam PMA_RX_DESER_CLKDIV_SOURCE_VALUE = "vco_bypass_normal";
localparam PMA_RX_DESER_CLKDIV_SOURCE_ADDR_OFST = 319;
localparam PMA_RX_DESER_CLKDIV_SOURCE_ADDR_FIELD_OFST = 4;
localparam PMA_RX_DESER_CLKDIV_SOURCE_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_DESER_CLKDIV_SOURCE_ADDR_FIELD_SIZE = 2;
localparam PMA_RX_DESER_CLKDIV_SOURCE_ADDR_FIELD_BITMASK = 32'h00000030;
localparam PMA_RX_DESER_CLKDIV_SOURCE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DESER_CLKDIV_SOURCE_ADDR_FIELD_VALUE = 2'h0;

localparam PMA_RX_DESER_CLKDIVRX_USER_MODE_VALUE = "clkdivrx_user_div33";
localparam PMA_RX_DESER_CLKDIVRX_USER_MODE_ADDR_OFST = 320;
localparam PMA_RX_DESER_CLKDIVRX_USER_MODE_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DESER_CLKDIVRX_USER_MODE_ADDR_FIELD_HIGH = 2;
localparam PMA_RX_DESER_CLKDIVRX_USER_MODE_ADDR_FIELD_SIZE = 3;
localparam PMA_RX_DESER_CLKDIVRX_USER_MODE_ADDR_FIELD_BITMASK = 32'h00000007;
localparam PMA_RX_DESER_CLKDIVRX_USER_MODE_ADDR_FIELD_VALMASK = 32'h00000006;
localparam PMA_RX_DESER_CLKDIVRX_USER_MODE_ADDR_FIELD_VALUE = 3'h6;

localparam PMA_RX_DESER_DATARATE_BPS_VALUE = "10312500000";

localparam PMA_RX_DESER_DESER_AIB_DFTPPM_EN_VALUE = "disable";
localparam PMA_RX_DESER_DESER_AIB_DFTPPM_EN_ADDR_OFST = 352;
localparam PMA_RX_DESER_DESER_AIB_DFTPPM_EN_ADDR_FIELD_OFST = 7;
localparam PMA_RX_DESER_DESER_AIB_DFTPPM_EN_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_DESER_DESER_AIB_DFTPPM_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DESER_DESER_AIB_DFTPPM_EN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_DESER_DESER_AIB_DFTPPM_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DESER_DESER_AIB_DFTPPM_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DESER_DESER_AIBCK_EN_VALUE = "enable";
localparam PMA_RX_DESER_DESER_AIBCK_EN_ADDR_OFST = 347;
localparam PMA_RX_DESER_DESER_AIBCK_EN_ADDR_FIELD_OFST = 7;
localparam PMA_RX_DESER_DESER_AIBCK_EN_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_DESER_DESER_AIBCK_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DESER_DESER_AIBCK_EN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_DESER_DESER_AIBCK_EN_ADDR_FIELD_VALMASK = 32'h00000080;
localparam PMA_RX_DESER_DESER_AIBCK_EN_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_RX_DESER_DESER_AIBCK_X1_VALUE = "normal";
localparam PMA_RX_DESER_DESER_AIBCK_X1_ADDR_OFST = 356;
localparam PMA_RX_DESER_DESER_AIBCK_X1_ADDR_FIELD_OFST = 7;
localparam PMA_RX_DESER_DESER_AIBCK_X1_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_DESER_DESER_AIBCK_X1_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DESER_DESER_AIBCK_X1_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_DESER_DESER_AIBCK_X1_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DESER_DESER_AIBCK_X1_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DESER_DESER_FACTOR_VALUE = "deser_32b";
localparam PMA_RX_DESER_DESER_FACTOR_ADDR_OFST = 319;
localparam PMA_RX_DESER_DESER_FACTOR_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DESER_DESER_FACTOR_ADDR_FIELD_HIGH = 3;
localparam PMA_RX_DESER_DESER_FACTOR_ADDR_FIELD_SIZE = 4;
localparam PMA_RX_DESER_DESER_FACTOR_ADDR_FIELD_BITMASK = 32'h0000000F;
localparam PMA_RX_DESER_DESER_FACTOR_ADDR_FIELD_VALMASK = 32'h00000006;
localparam PMA_RX_DESER_DESER_FACTOR_ADDR_FIELD_VALUE = 4'h6;

localparam PMA_RX_DESER_DESER_POWERDOWN_VALUE = "deser_power_up";
localparam PMA_RX_DESER_DESER_POWERDOWN_ADDR_OFST = 319;
localparam PMA_RX_DESER_DESER_POWERDOWN_ADDR_FIELD_OFST = 7;
localparam PMA_RX_DESER_DESER_POWERDOWN_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_DESER_DESER_POWERDOWN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DESER_DESER_POWERDOWN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_DESER_DESER_POWERDOWN_ADDR_FIELD_VALMASK = 32'h00000080;
localparam PMA_RX_DESER_DESER_POWERDOWN_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_RX_DESER_FORCE_ADAPTATION_OUTPUTS_VALUE = "normal_outputs";
localparam PMA_RX_DESER_FORCE_ADAPTATION_OUTPUTS_ADDR_OFST = 320;
localparam PMA_RX_DESER_FORCE_ADAPTATION_OUTPUTS_ADDR_FIELD_OFST = 3;
localparam PMA_RX_DESER_FORCE_ADAPTATION_OUTPUTS_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_DESER_FORCE_ADAPTATION_OUTPUTS_ADDR_FIELD_SIZE = 3;
localparam PMA_RX_DESER_FORCE_ADAPTATION_OUTPUTS_ADDR_FIELD_BITMASK = 32'h00000038;
localparam PMA_RX_DESER_FORCE_ADAPTATION_OUTPUTS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DESER_FORCE_ADAPTATION_OUTPUTS_ADDR_FIELD_VALUE = 3'h0;

localparam PMA_RX_DESER_FORCE_CLKDIV_FOR_TESTING_VALUE = "normal_clkdiv";
localparam PMA_RX_DESER_FORCE_CLKDIV_FOR_TESTING_ADDR_OFST = 320;
localparam PMA_RX_DESER_FORCE_CLKDIV_FOR_TESTING_ADDR_FIELD_OFST = 6;
localparam PMA_RX_DESER_FORCE_CLKDIV_FOR_TESTING_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_DESER_FORCE_CLKDIV_FOR_TESTING_ADDR_FIELD_SIZE = 2;
localparam PMA_RX_DESER_FORCE_CLKDIV_FOR_TESTING_ADDR_FIELD_BITMASK = 32'h000000C0;
localparam PMA_RX_DESER_FORCE_CLKDIV_FOR_TESTING_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DESER_FORCE_CLKDIV_FOR_TESTING_ADDR_FIELD_VALUE = 2'h0;

localparam PMA_RX_DESER_ODI_ADAPT_BTI_EN_VALUE = "deser_bti_disable";
localparam PMA_RX_DESER_ODI_ADAPT_BTI_EN_ADDR_OFST = 378;
localparam PMA_RX_DESER_ODI_ADAPT_BTI_EN_ADDR_FIELD_OFST = 4;
localparam PMA_RX_DESER_ODI_ADAPT_BTI_EN_ADDR_FIELD_HIGH = 4;
localparam PMA_RX_DESER_ODI_ADAPT_BTI_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DESER_ODI_ADAPT_BTI_EN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam PMA_RX_DESER_ODI_ADAPT_BTI_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DESER_ODI_ADAPT_BTI_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DESER_OPTIMAL_VALUE = "true";

localparam PMA_RX_DESER_PCIE_G3_HCLK_EN_VALUE = "disable_hclk_div2";
localparam PMA_RX_DESER_PCIE_G3_HCLK_EN_ADDR_OFST = 348;
localparam PMA_RX_DESER_PCIE_G3_HCLK_EN_ADDR_FIELD_OFST = 5;
localparam PMA_RX_DESER_PCIE_G3_HCLK_EN_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_DESER_PCIE_G3_HCLK_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DESER_PCIE_G3_HCLK_EN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_RX_DESER_PCIE_G3_HCLK_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DESER_PCIE_G3_HCLK_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_VALUE = "non_pcie";
localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_ADDR0_OFST = 281;
localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_ADDR0_FIELD_OFST = 0;
localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_ADDR0_FIELD_HIGH = 0;
localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_ADDR0_FIELD_SIZE = 1;
localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_ADDR0_FIELD_BITMASK = 32'h00000001;
localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_ADDR0_FIELD_VALUE = 1'h0;
localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_ADDR1_OFST = 368;
localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_ADDR1_FIELD_OFST = 0;
localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_ADDR1_FIELD_HIGH = 0;
localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_ADDR1_FIELD_SIZE = 1;
localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_ADDR1_FIELD_BITMASK = 32'h00000001;
localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_ADDR1_FIELD_VALUE = 1'h0;

localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_BITWIDTH_VALUE = "pcie_gen3_32b";
localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_BITWIDTH_ADDR_OFST = 281;
localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_BITWIDTH_ADDR_FIELD_OFST = 1;
localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_BITWIDTH_ADDR_FIELD_HIGH = 1;
localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_BITWIDTH_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_BITWIDTH_ADDR_FIELD_BITMASK = 32'h00000002;
localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_BITWIDTH_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DESER_PM_CR2_TX_RX_PCIE_GEN_BITWIDTH_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DESER_POWERMODE_AC_DESER_VALUE = "deser_ac_32b_nobs";

localparam PMA_RX_DESER_POWERMODE_AC_DESER_BS_VALUE = "deser_ac_bs_off";

localparam PMA_RX_DESER_POWERMODE_DC_DESER_VALUE = "deser_dc_32b_nobs";

localparam PMA_RX_DESER_POWERMODE_DC_DESER_BS_VALUE = "powerdown_deser_bs";

localparam PMA_RX_DESER_PROT_MODE_VALUE = "basic_rx";

localparam PMA_RX_DESER_RST_N_ADAPT_ODI_VALUE = "no_rst_adapt_odi";
localparam PMA_RX_DESER_RST_N_ADAPT_ODI_ADDR_OFST = 316;
localparam PMA_RX_DESER_RST_N_ADAPT_ODI_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DESER_RST_N_ADAPT_ODI_ADDR_FIELD_HIGH = 0;
localparam PMA_RX_DESER_RST_N_ADAPT_ODI_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DESER_RST_N_ADAPT_ODI_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_RX_DESER_RST_N_ADAPT_ODI_ADDR_FIELD_VALMASK = 32'h00000001;
localparam PMA_RX_DESER_RST_N_ADAPT_ODI_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_RX_DESER_SD_CLK_VALUE = "sd_clk_disabled";
localparam PMA_RX_DESER_SD_CLK_ADDR_OFST = 319;
localparam PMA_RX_DESER_SD_CLK_ADDR_FIELD_OFST = 6;
localparam PMA_RX_DESER_SD_CLK_ADDR_FIELD_HIGH = 6;
localparam PMA_RX_DESER_SD_CLK_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DESER_SD_CLK_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_RX_DESER_SD_CLK_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DESER_SD_CLK_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DESER_SUP_MODE_VALUE = "user_mode";

localparam PMA_RX_DESER_TDR_MODE_VALUE = "select_bbpd_data";
localparam PMA_RX_DESER_TDR_MODE_ADDR_OFST = 346;
localparam PMA_RX_DESER_TDR_MODE_ADDR_FIELD_OFST = 6;
localparam PMA_RX_DESER_TDR_MODE_ADDR_FIELD_HIGH = 6;
localparam PMA_RX_DESER_TDR_MODE_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DESER_TDR_MODE_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_RX_DESER_TDR_MODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DESER_TDR_MODE_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DESER_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam PMA_RX_DFE_ADAPT_BTI_EN_VALUE = "adapt_bti_disable";
localparam PMA_RX_DFE_ADAPT_BTI_EN_ADDR_OFST = 378;
localparam PMA_RX_DFE_ADAPT_BTI_EN_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DFE_ADAPT_BTI_EN_ADDR_FIELD_HIGH = 0;
localparam PMA_RX_DFE_ADAPT_BTI_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_ADAPT_BTI_EN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_RX_DFE_ADAPT_BTI_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_ADAPT_BTI_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_ATB_SELECT_VALUE = "atb_disable";
localparam PMA_RX_DFE_ATB_SELECT_ADDR_OFST = 341;
localparam PMA_RX_DFE_ATB_SELECT_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DFE_ATB_SELECT_ADDR_FIELD_HIGH = 4;
localparam PMA_RX_DFE_ATB_SELECT_ADDR_FIELD_SIZE = 5;
localparam PMA_RX_DFE_ATB_SELECT_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam PMA_RX_DFE_ATB_SELECT_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_ATB_SELECT_ADDR_FIELD_VALUE = 5'h0;

localparam PMA_RX_DFE_BTI_PROTECTED_VALUE = "false";

localparam PMA_RX_DFE_DATARATE_BPS_VALUE = "10312500000";

localparam PMA_RX_DFE_DFE_BTI_EN_VALUE = "dfe_bti_disable";
localparam PMA_RX_DFE_DFE_BTI_EN_ADDR_OFST = 378;
localparam PMA_RX_DFE_DFE_BTI_EN_ADDR_FIELD_OFST = 1;
localparam PMA_RX_DFE_DFE_BTI_EN_ADDR_FIELD_HIGH = 1;
localparam PMA_RX_DFE_DFE_BTI_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_DFE_BTI_EN_ADDR_FIELD_BITMASK = 32'h00000002;
localparam PMA_RX_DFE_DFE_BTI_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_DFE_BTI_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_DFE_MODE_VALUE = "cdr_mode";

localparam PMA_RX_DFE_DFT_EN_VALUE = "dft_disable";
localparam PMA_RX_DFE_DFT_EN_ADDR_OFST = 338;
localparam PMA_RX_DFE_DFT_EN_ADDR_FIELD_OFST = 7;
localparam PMA_RX_DFE_DFT_EN_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_DFE_DFT_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_DFT_EN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_DFE_DFT_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_DFT_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_DFT_HILOSPEED_SEL_VALUE = "dft_osc_lospeed_path";
localparam PMA_RX_DFE_DFT_HILOSPEED_SEL_ADDR_OFST = 323;
localparam PMA_RX_DFE_DFT_HILOSPEED_SEL_ADDR_FIELD_OFST = 1;
localparam PMA_RX_DFE_DFT_HILOSPEED_SEL_ADDR_FIELD_HIGH = 1;
localparam PMA_RX_DFE_DFT_HILOSPEED_SEL_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_DFT_HILOSPEED_SEL_ADDR_FIELD_BITMASK = 32'h00000002;
localparam PMA_RX_DFE_DFT_HILOSPEED_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_DFT_HILOSPEED_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_DFT_OSC_SEL_VALUE = "dft_osc_even";
localparam PMA_RX_DFE_DFT_OSC_SEL_ADDR_OFST = 301;
localparam PMA_RX_DFE_DFT_OSC_SEL_ADDR_FIELD_OFST = 7;
localparam PMA_RX_DFE_DFT_OSC_SEL_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_DFE_DFT_OSC_SEL_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_DFT_OSC_SEL_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_DFE_DFT_OSC_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_DFT_OSC_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_H1EDGE_BTI_EN_VALUE = "h1edge_bti_disable";
localparam PMA_RX_DFE_H1EDGE_BTI_EN_ADDR_OFST = 378;
localparam PMA_RX_DFE_H1EDGE_BTI_EN_ADDR_FIELD_OFST = 3;
localparam PMA_RX_DFE_H1EDGE_BTI_EN_ADDR_FIELD_HIGH = 3;
localparam PMA_RX_DFE_H1EDGE_BTI_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_H1EDGE_BTI_EN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam PMA_RX_DFE_H1EDGE_BTI_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_H1EDGE_BTI_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_INITIAL_SETTINGS_VALUE = "true";

localparam PMA_RX_DFE_LATCH_XCOUPLE_DISABLE_VALUE = "latch_xcouple_enable";
localparam PMA_RX_DFE_LATCH_XCOUPLE_DISABLE_ADDR_OFST = 301;
localparam PMA_RX_DFE_LATCH_XCOUPLE_DISABLE_ADDR_FIELD_OFST = 5;
localparam PMA_RX_DFE_LATCH_XCOUPLE_DISABLE_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_DFE_LATCH_XCOUPLE_DISABLE_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_LATCH_XCOUPLE_DISABLE_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_RX_DFE_LATCH_XCOUPLE_DISABLE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_LATCH_XCOUPLE_DISABLE_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_OC_SA_CDR0E_VALUE = 5'd0;
localparam PMA_RX_DFE_OC_SA_CDR0E_ADDR_OFST = 299;
localparam PMA_RX_DFE_OC_SA_CDR0E_ADDR_FIELD_OFST = 2;
localparam PMA_RX_DFE_OC_SA_CDR0E_ADDR_FIELD_HIGH = 6;
localparam PMA_RX_DFE_OC_SA_CDR0E_ADDR_FIELD_SIZE = 5;
localparam PMA_RX_DFE_OC_SA_CDR0E_ADDR_FIELD_BITMASK = 32'h0000007C;
localparam PMA_RX_DFE_OC_SA_CDR0E_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_CDR0E_ADDR_FIELD_VALUE = 5'h0;

localparam PMA_RX_DFE_OC_SA_CDR0E_SGN_VALUE = "oc_sa_cdr0e_sgn_0";
localparam PMA_RX_DFE_OC_SA_CDR0E_SGN_ADDR_OFST = 299;
localparam PMA_RX_DFE_OC_SA_CDR0E_SGN_ADDR_FIELD_OFST = 7;
localparam PMA_RX_DFE_OC_SA_CDR0E_SGN_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_DFE_OC_SA_CDR0E_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_OC_SA_CDR0E_SGN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_DFE_OC_SA_CDR0E_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_CDR0E_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_OC_SA_CDR0O_VALUE = 5'd0;
localparam PMA_RX_DFE_OC_SA_CDR0O_ADDR0_OFST = 298;
localparam PMA_RX_DFE_OC_SA_CDR0O_ADDR0_FIELD_OFST = 4;
localparam PMA_RX_DFE_OC_SA_CDR0O_ADDR0_FIELD_HIGH = 6;
localparam PMA_RX_DFE_OC_SA_CDR0O_ADDR0_FIELD_SIZE = 3;
localparam PMA_RX_DFE_OC_SA_CDR0O_ADDR0_FIELD_BITMASK = 32'h00000070;
localparam PMA_RX_DFE_OC_SA_CDR0O_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_CDR0O_ADDR0_FIELD_VALUE = 3'h0;
localparam PMA_RX_DFE_OC_SA_CDR0O_ADDR1_OFST = 299;
localparam PMA_RX_DFE_OC_SA_CDR0O_ADDR1_FIELD_OFST = 0;
localparam PMA_RX_DFE_OC_SA_CDR0O_ADDR1_FIELD_HIGH = 1;
localparam PMA_RX_DFE_OC_SA_CDR0O_ADDR1_FIELD_SIZE = 2;
localparam PMA_RX_DFE_OC_SA_CDR0O_ADDR1_FIELD_BITMASK = 32'h00000003;
localparam PMA_RX_DFE_OC_SA_CDR0O_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_CDR0O_ADDR1_FIELD_VALUE = 2'h0;

localparam PMA_RX_DFE_OC_SA_CDR0O_SGN_VALUE = "oc_sa_cdr0o_sgn_0";
localparam PMA_RX_DFE_OC_SA_CDR0O_SGN_ADDR_OFST = 298;
localparam PMA_RX_DFE_OC_SA_CDR0O_SGN_ADDR_FIELD_OFST = 7;
localparam PMA_RX_DFE_OC_SA_CDR0O_SGN_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_DFE_OC_SA_CDR0O_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_OC_SA_CDR0O_SGN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_DFE_OC_SA_CDR0O_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_CDR0O_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_OC_SA_CDRNE_VALUE = 5'd0;
localparam PMA_RX_DFE_OC_SA_CDRNE_ADDR0_OFST = 297;
localparam PMA_RX_DFE_OC_SA_CDRNE_ADDR0_FIELD_OFST = 6;
localparam PMA_RX_DFE_OC_SA_CDRNE_ADDR0_FIELD_HIGH = 7;
localparam PMA_RX_DFE_OC_SA_CDRNE_ADDR0_FIELD_SIZE = 2;
localparam PMA_RX_DFE_OC_SA_CDRNE_ADDR0_FIELD_BITMASK = 32'h000000C0;
localparam PMA_RX_DFE_OC_SA_CDRNE_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_CDRNE_ADDR0_FIELD_VALUE = 2'h0;
localparam PMA_RX_DFE_OC_SA_CDRNE_ADDR1_OFST = 298;
localparam PMA_RX_DFE_OC_SA_CDRNE_ADDR1_FIELD_OFST = 0;
localparam PMA_RX_DFE_OC_SA_CDRNE_ADDR1_FIELD_HIGH = 2;
localparam PMA_RX_DFE_OC_SA_CDRNE_ADDR1_FIELD_SIZE = 3;
localparam PMA_RX_DFE_OC_SA_CDRNE_ADDR1_FIELD_BITMASK = 32'h00000007;
localparam PMA_RX_DFE_OC_SA_CDRNE_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_CDRNE_ADDR1_FIELD_VALUE = 3'h0;

localparam PMA_RX_DFE_OC_SA_CDRNE_SGN_VALUE = "oc_sa_cdrne_sgn_0";
localparam PMA_RX_DFE_OC_SA_CDRNE_SGN_ADDR_OFST = 298;
localparam PMA_RX_DFE_OC_SA_CDRNE_SGN_ADDR_FIELD_OFST = 3;
localparam PMA_RX_DFE_OC_SA_CDRNE_SGN_ADDR_FIELD_HIGH = 3;
localparam PMA_RX_DFE_OC_SA_CDRNE_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_OC_SA_CDRNE_SGN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam PMA_RX_DFE_OC_SA_CDRNE_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_CDRNE_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_OC_SA_CDRNO_VALUE = 5'd0;
localparam PMA_RX_DFE_OC_SA_CDRNO_ADDR_OFST = 296;
localparam PMA_RX_DFE_OC_SA_CDRNO_ADDR_FIELD_OFST = 2;
localparam PMA_RX_DFE_OC_SA_CDRNO_ADDR_FIELD_HIGH = 6;
localparam PMA_RX_DFE_OC_SA_CDRNO_ADDR_FIELD_SIZE = 5;
localparam PMA_RX_DFE_OC_SA_CDRNO_ADDR_FIELD_BITMASK = 32'h0000007C;
localparam PMA_RX_DFE_OC_SA_CDRNO_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_CDRNO_ADDR_FIELD_VALUE = 5'h0;

localparam PMA_RX_DFE_OC_SA_CDRNO_SGN_VALUE = "oc_sa_cdrno_sgn_0";
localparam PMA_RX_DFE_OC_SA_CDRNO_SGN_ADDR_OFST = 296;
localparam PMA_RX_DFE_OC_SA_CDRNO_SGN_ADDR_FIELD_OFST = 7;
localparam PMA_RX_DFE_OC_SA_CDRNO_SGN_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_DFE_OC_SA_CDRNO_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_OC_SA_CDRNO_SGN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_DFE_OC_SA_CDRNO_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_CDRNO_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_OC_SA_CDRPE_VALUE = 5'd0;
localparam PMA_RX_DFE_OC_SA_CDRPE_ADDR_OFST = 297;
localparam PMA_RX_DFE_OC_SA_CDRPE_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DFE_OC_SA_CDRPE_ADDR_FIELD_HIGH = 4;
localparam PMA_RX_DFE_OC_SA_CDRPE_ADDR_FIELD_SIZE = 5;
localparam PMA_RX_DFE_OC_SA_CDRPE_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam PMA_RX_DFE_OC_SA_CDRPE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_CDRPE_ADDR_FIELD_VALUE = 5'h0;

localparam PMA_RX_DFE_OC_SA_CDRPE_SGN_VALUE = "oc_sa_cdrpe_sgn_0";
localparam PMA_RX_DFE_OC_SA_CDRPE_SGN_ADDR_OFST = 297;
localparam PMA_RX_DFE_OC_SA_CDRPE_SGN_ADDR_FIELD_OFST = 5;
localparam PMA_RX_DFE_OC_SA_CDRPE_SGN_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_DFE_OC_SA_CDRPE_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_OC_SA_CDRPE_SGN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_RX_DFE_OC_SA_CDRPE_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_CDRPE_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_OC_SA_CDRPO_VALUE = 5'd0;
localparam PMA_RX_DFE_OC_SA_CDRPO_ADDR0_OFST = 295;
localparam PMA_RX_DFE_OC_SA_CDRPO_ADDR0_FIELD_OFST = 4;
localparam PMA_RX_DFE_OC_SA_CDRPO_ADDR0_FIELD_HIGH = 6;
localparam PMA_RX_DFE_OC_SA_CDRPO_ADDR0_FIELD_SIZE = 3;
localparam PMA_RX_DFE_OC_SA_CDRPO_ADDR0_FIELD_BITMASK = 32'h00000070;
localparam PMA_RX_DFE_OC_SA_CDRPO_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_CDRPO_ADDR0_FIELD_VALUE = 3'h0;
localparam PMA_RX_DFE_OC_SA_CDRPO_ADDR1_OFST = 296;
localparam PMA_RX_DFE_OC_SA_CDRPO_ADDR1_FIELD_OFST = 0;
localparam PMA_RX_DFE_OC_SA_CDRPO_ADDR1_FIELD_HIGH = 1;
localparam PMA_RX_DFE_OC_SA_CDRPO_ADDR1_FIELD_SIZE = 2;
localparam PMA_RX_DFE_OC_SA_CDRPO_ADDR1_FIELD_BITMASK = 32'h00000003;
localparam PMA_RX_DFE_OC_SA_CDRPO_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_CDRPO_ADDR1_FIELD_VALUE = 2'h0;

localparam PMA_RX_DFE_OC_SA_CDRPO_SGN_VALUE = "oc_sa_cdrpo_sgn_0";
localparam PMA_RX_DFE_OC_SA_CDRPO_SGN_ADDR_OFST = 295;
localparam PMA_RX_DFE_OC_SA_CDRPO_SGN_ADDR_FIELD_OFST = 7;
localparam PMA_RX_DFE_OC_SA_CDRPO_SGN_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_DFE_OC_SA_CDRPO_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_OC_SA_CDRPO_SGN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_DFE_OC_SA_CDRPO_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_CDRPO_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_OC_SA_DNE_VALUE = 5'd0;
localparam PMA_RX_DFE_OC_SA_DNE_ADDR0_OFST = 294;
localparam PMA_RX_DFE_OC_SA_DNE_ADDR0_FIELD_OFST = 6;
localparam PMA_RX_DFE_OC_SA_DNE_ADDR0_FIELD_HIGH = 7;
localparam PMA_RX_DFE_OC_SA_DNE_ADDR0_FIELD_SIZE = 2;
localparam PMA_RX_DFE_OC_SA_DNE_ADDR0_FIELD_BITMASK = 32'h000000C0;
localparam PMA_RX_DFE_OC_SA_DNE_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_DNE_ADDR0_FIELD_VALUE = 2'h0;
localparam PMA_RX_DFE_OC_SA_DNE_ADDR1_OFST = 295;
localparam PMA_RX_DFE_OC_SA_DNE_ADDR1_FIELD_OFST = 0;
localparam PMA_RX_DFE_OC_SA_DNE_ADDR1_FIELD_HIGH = 2;
localparam PMA_RX_DFE_OC_SA_DNE_ADDR1_FIELD_SIZE = 3;
localparam PMA_RX_DFE_OC_SA_DNE_ADDR1_FIELD_BITMASK = 32'h00000007;
localparam PMA_RX_DFE_OC_SA_DNE_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_DNE_ADDR1_FIELD_VALUE = 3'h0;

localparam PMA_RX_DFE_OC_SA_DNE_SGN_VALUE = "oc_sa_dne_sgn_0";
localparam PMA_RX_DFE_OC_SA_DNE_SGN_ADDR_OFST = 295;
localparam PMA_RX_DFE_OC_SA_DNE_SGN_ADDR_FIELD_OFST = 3;
localparam PMA_RX_DFE_OC_SA_DNE_SGN_ADDR_FIELD_HIGH = 3;
localparam PMA_RX_DFE_OC_SA_DNE_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_OC_SA_DNE_SGN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam PMA_RX_DFE_OC_SA_DNE_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_DNE_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_OC_SA_DNO_VALUE = 5'd0;
localparam PMA_RX_DFE_OC_SA_DNO_ADDR_OFST = 293;
localparam PMA_RX_DFE_OC_SA_DNO_ADDR_FIELD_OFST = 2;
localparam PMA_RX_DFE_OC_SA_DNO_ADDR_FIELD_HIGH = 6;
localparam PMA_RX_DFE_OC_SA_DNO_ADDR_FIELD_SIZE = 5;
localparam PMA_RX_DFE_OC_SA_DNO_ADDR_FIELD_BITMASK = 32'h0000007C;
localparam PMA_RX_DFE_OC_SA_DNO_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_DNO_ADDR_FIELD_VALUE = 5'h0;

localparam PMA_RX_DFE_OC_SA_DNO_SGN_VALUE = "oc_sa_dno_sgn_0";
localparam PMA_RX_DFE_OC_SA_DNO_SGN_ADDR_OFST = 293;
localparam PMA_RX_DFE_OC_SA_DNO_SGN_ADDR_FIELD_OFST = 7;
localparam PMA_RX_DFE_OC_SA_DNO_SGN_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_DFE_OC_SA_DNO_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_OC_SA_DNO_SGN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_DFE_OC_SA_DNO_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_DNO_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_OC_SA_DPE_VALUE = 5'd0;
localparam PMA_RX_DFE_OC_SA_DPE_ADDR_OFST = 294;
localparam PMA_RX_DFE_OC_SA_DPE_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DFE_OC_SA_DPE_ADDR_FIELD_HIGH = 4;
localparam PMA_RX_DFE_OC_SA_DPE_ADDR_FIELD_SIZE = 5;
localparam PMA_RX_DFE_OC_SA_DPE_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam PMA_RX_DFE_OC_SA_DPE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_DPE_ADDR_FIELD_VALUE = 5'h0;

localparam PMA_RX_DFE_OC_SA_DPE_SGN_VALUE = "oc_sa_dpe_sgn_0";
localparam PMA_RX_DFE_OC_SA_DPE_SGN_ADDR_OFST = 294;
localparam PMA_RX_DFE_OC_SA_DPE_SGN_ADDR_FIELD_OFST = 5;
localparam PMA_RX_DFE_OC_SA_DPE_SGN_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_DFE_OC_SA_DPE_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_OC_SA_DPE_SGN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_RX_DFE_OC_SA_DPE_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_DPE_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_OC_SA_DPO_VALUE = 5'd0;
localparam PMA_RX_DFE_OC_SA_DPO_ADDR0_OFST = 292;
localparam PMA_RX_DFE_OC_SA_DPO_ADDR0_FIELD_OFST = 4;
localparam PMA_RX_DFE_OC_SA_DPO_ADDR0_FIELD_HIGH = 6;
localparam PMA_RX_DFE_OC_SA_DPO_ADDR0_FIELD_SIZE = 3;
localparam PMA_RX_DFE_OC_SA_DPO_ADDR0_FIELD_BITMASK = 32'h00000070;
localparam PMA_RX_DFE_OC_SA_DPO_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_DPO_ADDR0_FIELD_VALUE = 3'h0;
localparam PMA_RX_DFE_OC_SA_DPO_ADDR1_OFST = 293;
localparam PMA_RX_DFE_OC_SA_DPO_ADDR1_FIELD_OFST = 0;
localparam PMA_RX_DFE_OC_SA_DPO_ADDR1_FIELD_HIGH = 1;
localparam PMA_RX_DFE_OC_SA_DPO_ADDR1_FIELD_SIZE = 2;
localparam PMA_RX_DFE_OC_SA_DPO_ADDR1_FIELD_BITMASK = 32'h00000003;
localparam PMA_RX_DFE_OC_SA_DPO_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_DPO_ADDR1_FIELD_VALUE = 2'h0;

localparam PMA_RX_DFE_OC_SA_DPO_SGN_VALUE = "oc_sa_dpo_sgn_0";
localparam PMA_RX_DFE_OC_SA_DPO_SGN_ADDR_OFST = 292;
localparam PMA_RX_DFE_OC_SA_DPO_SGN_ADDR_FIELD_OFST = 7;
localparam PMA_RX_DFE_OC_SA_DPO_SGN_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_DFE_OC_SA_DPO_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_OC_SA_DPO_SGN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_DFE_OC_SA_DPO_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_DPO_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_OC_SA_ODIE_VALUE = 5'd0;
localparam PMA_RX_DFE_OC_SA_ODIE_ADDR0_OFST = 300;
localparam PMA_RX_DFE_OC_SA_ODIE_ADDR0_FIELD_OFST = 6;
localparam PMA_RX_DFE_OC_SA_ODIE_ADDR0_FIELD_HIGH = 7;
localparam PMA_RX_DFE_OC_SA_ODIE_ADDR0_FIELD_SIZE = 2;
localparam PMA_RX_DFE_OC_SA_ODIE_ADDR0_FIELD_BITMASK = 32'h000000C0;
localparam PMA_RX_DFE_OC_SA_ODIE_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_ODIE_ADDR0_FIELD_VALUE = 2'h0;
localparam PMA_RX_DFE_OC_SA_ODIE_ADDR1_OFST = 301;
localparam PMA_RX_DFE_OC_SA_ODIE_ADDR1_FIELD_OFST = 0;
localparam PMA_RX_DFE_OC_SA_ODIE_ADDR1_FIELD_HIGH = 2;
localparam PMA_RX_DFE_OC_SA_ODIE_ADDR1_FIELD_SIZE = 3;
localparam PMA_RX_DFE_OC_SA_ODIE_ADDR1_FIELD_BITMASK = 32'h00000007;
localparam PMA_RX_DFE_OC_SA_ODIE_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_ODIE_ADDR1_FIELD_VALUE = 3'h0;

localparam PMA_RX_DFE_OC_SA_ODIE_SGN_VALUE = "oc_sa_odie_sgn_0";
localparam PMA_RX_DFE_OC_SA_ODIE_SGN_ADDR_OFST = 301;
localparam PMA_RX_DFE_OC_SA_ODIE_SGN_ADDR_FIELD_OFST = 3;
localparam PMA_RX_DFE_OC_SA_ODIE_SGN_ADDR_FIELD_HIGH = 3;
localparam PMA_RX_DFE_OC_SA_ODIE_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_OC_SA_ODIE_SGN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam PMA_RX_DFE_OC_SA_ODIE_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_ODIE_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_OC_SA_ODIO_VALUE = 5'd0;
localparam PMA_RX_DFE_OC_SA_ODIO_ADDR_OFST = 300;
localparam PMA_RX_DFE_OC_SA_ODIO_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DFE_OC_SA_ODIO_ADDR_FIELD_HIGH = 4;
localparam PMA_RX_DFE_OC_SA_ODIO_ADDR_FIELD_SIZE = 5;
localparam PMA_RX_DFE_OC_SA_ODIO_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam PMA_RX_DFE_OC_SA_ODIO_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_ODIO_ADDR_FIELD_VALUE = 5'h0;

localparam PMA_RX_DFE_OC_SA_ODIO_SGN_VALUE = "oc_sa_odio_sgn_0";
localparam PMA_RX_DFE_OC_SA_ODIO_SGN_ADDR_OFST = 300;
localparam PMA_RX_DFE_OC_SA_ODIO_SGN_ADDR_FIELD_OFST = 5;
localparam PMA_RX_DFE_OC_SA_ODIO_SGN_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_DFE_OC_SA_ODIO_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_OC_SA_ODIO_SGN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_RX_DFE_OC_SA_ODIO_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_ODIO_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_OC_SA_VREFE_VALUE = 5'd0;
localparam PMA_RX_DFE_OC_SA_VREFE_ADDR0_OFST = 291;
localparam PMA_RX_DFE_OC_SA_VREFE_ADDR0_FIELD_OFST = 6;
localparam PMA_RX_DFE_OC_SA_VREFE_ADDR0_FIELD_HIGH = 7;
localparam PMA_RX_DFE_OC_SA_VREFE_ADDR0_FIELD_SIZE = 2;
localparam PMA_RX_DFE_OC_SA_VREFE_ADDR0_FIELD_BITMASK = 32'h000000C0;
localparam PMA_RX_DFE_OC_SA_VREFE_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_VREFE_ADDR0_FIELD_VALUE = 2'h0;
localparam PMA_RX_DFE_OC_SA_VREFE_ADDR1_OFST = 292;
localparam PMA_RX_DFE_OC_SA_VREFE_ADDR1_FIELD_OFST = 0;
localparam PMA_RX_DFE_OC_SA_VREFE_ADDR1_FIELD_HIGH = 2;
localparam PMA_RX_DFE_OC_SA_VREFE_ADDR1_FIELD_SIZE = 3;
localparam PMA_RX_DFE_OC_SA_VREFE_ADDR1_FIELD_BITMASK = 32'h00000007;
localparam PMA_RX_DFE_OC_SA_VREFE_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_VREFE_ADDR1_FIELD_VALUE = 3'h0;

localparam PMA_RX_DFE_OC_SA_VREFE_SGN_VALUE = "oc_sa_vrefe_sgn_0";
localparam PMA_RX_DFE_OC_SA_VREFE_SGN_ADDR_OFST = 292;
localparam PMA_RX_DFE_OC_SA_VREFE_SGN_ADDR_FIELD_OFST = 3;
localparam PMA_RX_DFE_OC_SA_VREFE_SGN_ADDR_FIELD_HIGH = 3;
localparam PMA_RX_DFE_OC_SA_VREFE_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_OC_SA_VREFE_SGN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam PMA_RX_DFE_OC_SA_VREFE_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_VREFE_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_OC_SA_VREFO_VALUE = 5'd0;
localparam PMA_RX_DFE_OC_SA_VREFO_ADDR_OFST = 291;
localparam PMA_RX_DFE_OC_SA_VREFO_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DFE_OC_SA_VREFO_ADDR_FIELD_HIGH = 4;
localparam PMA_RX_DFE_OC_SA_VREFO_ADDR_FIELD_SIZE = 5;
localparam PMA_RX_DFE_OC_SA_VREFO_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam PMA_RX_DFE_OC_SA_VREFO_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_VREFO_ADDR_FIELD_VALUE = 5'h0;

localparam PMA_RX_DFE_OC_SA_VREFO_SGN_VALUE = "oc_sa_vrefo_sgn_0";
localparam PMA_RX_DFE_OC_SA_VREFO_SGN_ADDR_OFST = 291;
localparam PMA_RX_DFE_OC_SA_VREFO_SGN_ADDR_FIELD_OFST = 5;
localparam PMA_RX_DFE_OC_SA_VREFO_SGN_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_DFE_OC_SA_VREFO_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_OC_SA_VREFO_SGN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_RX_DFE_OC_SA_VREFO_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_OC_SA_VREFO_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_ODI_BTI_EN_VALUE = "odi_bti_disable";
localparam PMA_RX_DFE_ODI_BTI_EN_ADDR_OFST = 378;
localparam PMA_RX_DFE_ODI_BTI_EN_ADDR_FIELD_OFST = 2;
localparam PMA_RX_DFE_ODI_BTI_EN_ADDR_FIELD_HIGH = 2;
localparam PMA_RX_DFE_ODI_BTI_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_ODI_BTI_EN_ADDR_FIELD_BITMASK = 32'h00000004;
localparam PMA_RX_DFE_ODI_BTI_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_ODI_BTI_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_ODI_DLEV_SIGN_VALUE = "odi_dlev_pos";
localparam PMA_RX_DFE_ODI_DLEV_SIGN_ADDR_OFST = 342;
localparam PMA_RX_DFE_ODI_DLEV_SIGN_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DFE_ODI_DLEV_SIGN_ADDR_FIELD_HIGH = 0;
localparam PMA_RX_DFE_ODI_DLEV_SIGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_ODI_DLEV_SIGN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_RX_DFE_ODI_DLEV_SIGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_ODI_DLEV_SIGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_ODI_H1_SIGN_VALUE = "odi_h1_pos";
localparam PMA_RX_DFE_ODI_H1_SIGN_ADDR_OFST = 342;
localparam PMA_RX_DFE_ODI_H1_SIGN_ADDR_FIELD_OFST = 1;
localparam PMA_RX_DFE_ODI_H1_SIGN_ADDR_FIELD_HIGH = 1;
localparam PMA_RX_DFE_ODI_H1_SIGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_ODI_H1_SIGN_ADDR_FIELD_BITMASK = 32'h00000002;
localparam PMA_RX_DFE_ODI_H1_SIGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_ODI_H1_SIGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_OPTIMAL_VALUE = "true";

localparam PMA_RX_DFE_PDB_VALUE = "dfe_enable";
localparam PMA_RX_DFE_PDB_ADDR_OFST = 290;
localparam PMA_RX_DFE_PDB_ADDR_FIELD_OFST = 1;
localparam PMA_RX_DFE_PDB_ADDR_FIELD_HIGH = 1;
localparam PMA_RX_DFE_PDB_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_PDB_ADDR_FIELD_BITMASK = 32'h00000002;
localparam PMA_RX_DFE_PDB_ADDR_FIELD_VALMASK = 32'h00000002;
localparam PMA_RX_DFE_PDB_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_RX_DFE_PDB_EDGE_PRE_H1_VALUE = "cdr_pre_h1_enable";
localparam PMA_RX_DFE_PDB_EDGE_PRE_H1_ADDR_OFST = 305;
localparam PMA_RX_DFE_PDB_EDGE_PRE_H1_ADDR_FIELD_OFST = 6;
localparam PMA_RX_DFE_PDB_EDGE_PRE_H1_ADDR_FIELD_HIGH = 6;
localparam PMA_RX_DFE_PDB_EDGE_PRE_H1_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_PDB_EDGE_PRE_H1_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_RX_DFE_PDB_EDGE_PRE_H1_ADDR_FIELD_VALMASK = 32'h00000040;
localparam PMA_RX_DFE_PDB_EDGE_PRE_H1_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_RX_DFE_PDB_EDGE_PST_H1_VALUE = "cdr_pst_h1_disable";
localparam PMA_RX_DFE_PDB_EDGE_PST_H1_ADDR_OFST = 305;
localparam PMA_RX_DFE_PDB_EDGE_PST_H1_ADDR_FIELD_OFST = 7;
localparam PMA_RX_DFE_PDB_EDGE_PST_H1_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_DFE_PDB_EDGE_PST_H1_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_PDB_EDGE_PST_H1_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_DFE_PDB_EDGE_PST_H1_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_PDB_EDGE_PST_H1_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_PDB_TAP_10T15_VALUE = "tap10t15_dfe_powerdown";
localparam PMA_RX_DFE_PDB_TAP_10T15_ADDR_OFST = 303;
localparam PMA_RX_DFE_PDB_TAP_10T15_ADDR_FIELD_OFST = 7;
localparam PMA_RX_DFE_PDB_TAP_10T15_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_DFE_PDB_TAP_10T15_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_PDB_TAP_10T15_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_DFE_PDB_TAP_10T15_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_PDB_TAP_10T15_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_PDB_TAP_4T9_VALUE = "tap4t9_dfe_powerdown";
localparam PMA_RX_DFE_PDB_TAP_4T9_ADDR_OFST = 303;
localparam PMA_RX_DFE_PDB_TAP_4T9_ADDR_FIELD_OFST = 6;
localparam PMA_RX_DFE_PDB_TAP_4T9_ADDR_FIELD_HIGH = 6;
localparam PMA_RX_DFE_PDB_TAP_4T9_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_PDB_TAP_4T9_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_RX_DFE_PDB_TAP_4T9_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_PDB_TAP_4T9_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_PDB_TAPSUM_VALUE = "tapsum_disable";
localparam PMA_RX_DFE_PDB_TAPSUM_ADDR_OFST = 336;
localparam PMA_RX_DFE_PDB_TAPSUM_ADDR_FIELD_OFST = 5;
localparam PMA_RX_DFE_PDB_TAPSUM_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_DFE_PDB_TAPSUM_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_PDB_TAPSUM_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_RX_DFE_PDB_TAPSUM_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_PDB_TAPSUM_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_POWER_MODE_VALUE = "mid_power";

localparam PMA_RX_DFE_PROT_MODE_VALUE = "basic_rx";

localparam PMA_RX_DFE_SEL_OC_EN_VALUE = "off_canc_disable";
localparam PMA_RX_DFE_SEL_OC_EN_ADDR_OFST = 301;
localparam PMA_RX_DFE_SEL_OC_EN_ADDR_FIELD_OFST = 4;
localparam PMA_RX_DFE_SEL_OC_EN_ADDR_FIELD_HIGH = 4;
localparam PMA_RX_DFE_SEL_OC_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_SEL_OC_EN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam PMA_RX_DFE_SEL_OC_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_SEL_OC_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_SEL_PROBE_TSTMX_VALUE = "probe_tstmx_none";
localparam PMA_RX_DFE_SEL_PROBE_TSTMX_ADDR_OFST = 302;
localparam PMA_RX_DFE_SEL_PROBE_TSTMX_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DFE_SEL_PROBE_TSTMX_ADDR_FIELD_HIGH = 3;
localparam PMA_RX_DFE_SEL_PROBE_TSTMX_ADDR_FIELD_SIZE = 4;
localparam PMA_RX_DFE_SEL_PROBE_TSTMX_ADDR_FIELD_BITMASK = 32'h0000000F;
localparam PMA_RX_DFE_SEL_PROBE_TSTMX_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_SEL_PROBE_TSTMX_ADDR_FIELD_VALUE = 4'h0;

localparam PMA_RX_DFE_SUP_MODE_VALUE = "user_mode";

localparam PMA_RX_DFE_TAP10_COEFF_VALUE = 3'd0;
localparam PMA_RX_DFE_TAP10_COEFF_ADDR_OFST = 337;
localparam PMA_RX_DFE_TAP10_COEFF_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DFE_TAP10_COEFF_ADDR_FIELD_HIGH = 2;
localparam PMA_RX_DFE_TAP10_COEFF_ADDR_FIELD_SIZE = 3;
localparam PMA_RX_DFE_TAP10_COEFF_ADDR_FIELD_BITMASK = 32'h00000007;
localparam PMA_RX_DFE_TAP10_COEFF_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP10_COEFF_ADDR_FIELD_VALUE = 3'h0;

localparam PMA_RX_DFE_TAP10_SGN_VALUE = "tap10_sign_0";
localparam PMA_RX_DFE_TAP10_SGN_ADDR_OFST = 336;
localparam PMA_RX_DFE_TAP10_SGN_ADDR_FIELD_OFST = 6;
localparam PMA_RX_DFE_TAP10_SGN_ADDR_FIELD_HIGH = 6;
localparam PMA_RX_DFE_TAP10_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_TAP10_SGN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_RX_DFE_TAP10_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP10_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_TAP11_COEFF_VALUE = 3'd0;
localparam PMA_RX_DFE_TAP11_COEFF_ADDR_OFST = 337;
localparam PMA_RX_DFE_TAP11_COEFF_ADDR_FIELD_OFST = 3;
localparam PMA_RX_DFE_TAP11_COEFF_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_DFE_TAP11_COEFF_ADDR_FIELD_SIZE = 3;
localparam PMA_RX_DFE_TAP11_COEFF_ADDR_FIELD_BITMASK = 32'h00000038;
localparam PMA_RX_DFE_TAP11_COEFF_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP11_COEFF_ADDR_FIELD_VALUE = 3'h0;

localparam PMA_RX_DFE_TAP11_SGN_VALUE = "tap11_sign_0";
localparam PMA_RX_DFE_TAP11_SGN_ADDR_OFST = 336;
localparam PMA_RX_DFE_TAP11_SGN_ADDR_FIELD_OFST = 7;
localparam PMA_RX_DFE_TAP11_SGN_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_DFE_TAP11_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_TAP11_SGN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_DFE_TAP11_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP11_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_TAP12_COEFF_VALUE = 3'd0;
localparam PMA_RX_DFE_TAP12_COEFF_ADDR_OFST = 338;
localparam PMA_RX_DFE_TAP12_COEFF_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DFE_TAP12_COEFF_ADDR_FIELD_HIGH = 2;
localparam PMA_RX_DFE_TAP12_COEFF_ADDR_FIELD_SIZE = 3;
localparam PMA_RX_DFE_TAP12_COEFF_ADDR_FIELD_BITMASK = 32'h00000007;
localparam PMA_RX_DFE_TAP12_COEFF_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP12_COEFF_ADDR_FIELD_VALUE = 3'h0;

localparam PMA_RX_DFE_TAP12_SGN_VALUE = "tap12_sign_0";
localparam PMA_RX_DFE_TAP12_SGN_ADDR_OFST = 337;
localparam PMA_RX_DFE_TAP12_SGN_ADDR_FIELD_OFST = 6;
localparam PMA_RX_DFE_TAP12_SGN_ADDR_FIELD_HIGH = 6;
localparam PMA_RX_DFE_TAP12_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_TAP12_SGN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_RX_DFE_TAP12_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP12_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_TAP13_COEFF_VALUE = 3'd0;
localparam PMA_RX_DFE_TAP13_COEFF_ADDR_OFST = 338;
localparam PMA_RX_DFE_TAP13_COEFF_ADDR_FIELD_OFST = 3;
localparam PMA_RX_DFE_TAP13_COEFF_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_DFE_TAP13_COEFF_ADDR_FIELD_SIZE = 3;
localparam PMA_RX_DFE_TAP13_COEFF_ADDR_FIELD_BITMASK = 32'h00000038;
localparam PMA_RX_DFE_TAP13_COEFF_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP13_COEFF_ADDR_FIELD_VALUE = 3'h0;

localparam PMA_RX_DFE_TAP13_SGN_VALUE = "tap13_sign_0";
localparam PMA_RX_DFE_TAP13_SGN_ADDR_OFST = 338;
localparam PMA_RX_DFE_TAP13_SGN_ADDR_FIELD_OFST = 6;
localparam PMA_RX_DFE_TAP13_SGN_ADDR_FIELD_HIGH = 6;
localparam PMA_RX_DFE_TAP13_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_TAP13_SGN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_RX_DFE_TAP13_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP13_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_TAP14_COEFF_VALUE = 3'd0;
localparam PMA_RX_DFE_TAP14_COEFF_ADDR_OFST = 339;
localparam PMA_RX_DFE_TAP14_COEFF_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DFE_TAP14_COEFF_ADDR_FIELD_HIGH = 2;
localparam PMA_RX_DFE_TAP14_COEFF_ADDR_FIELD_SIZE = 3;
localparam PMA_RX_DFE_TAP14_COEFF_ADDR_FIELD_BITMASK = 32'h00000007;
localparam PMA_RX_DFE_TAP14_COEFF_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP14_COEFF_ADDR_FIELD_VALUE = 3'h0;

localparam PMA_RX_DFE_TAP14_SGN_VALUE = "tap14_sign_0";
localparam PMA_RX_DFE_TAP14_SGN_ADDR_OFST = 339;
localparam PMA_RX_DFE_TAP14_SGN_ADDR_FIELD_OFST = 3;
localparam PMA_RX_DFE_TAP14_SGN_ADDR_FIELD_HIGH = 3;
localparam PMA_RX_DFE_TAP14_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_TAP14_SGN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam PMA_RX_DFE_TAP14_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP14_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_TAP15_COEFF_VALUE = 3'd0;
localparam PMA_RX_DFE_TAP15_COEFF_ADDR_OFST = 339;
localparam PMA_RX_DFE_TAP15_COEFF_ADDR_FIELD_OFST = 4;
localparam PMA_RX_DFE_TAP15_COEFF_ADDR_FIELD_HIGH = 6;
localparam PMA_RX_DFE_TAP15_COEFF_ADDR_FIELD_SIZE = 3;
localparam PMA_RX_DFE_TAP15_COEFF_ADDR_FIELD_BITMASK = 32'h00000070;
localparam PMA_RX_DFE_TAP15_COEFF_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP15_COEFF_ADDR_FIELD_VALUE = 3'h0;

localparam PMA_RX_DFE_TAP15_SGN_VALUE = "tap15_sign_0";
localparam PMA_RX_DFE_TAP15_SGN_ADDR_OFST = 339;
localparam PMA_RX_DFE_TAP15_SGN_ADDR_FIELD_OFST = 7;
localparam PMA_RX_DFE_TAP15_SGN_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_DFE_TAP15_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_TAP15_SGN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_DFE_TAP15_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP15_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_TAP1_COEFF_VALUE = 6'd0;
localparam PMA_RX_DFE_TAP1_COEFF_ADDR_OFST = 303;
localparam PMA_RX_DFE_TAP1_COEFF_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DFE_TAP1_COEFF_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_DFE_TAP1_COEFF_ADDR_FIELD_SIZE = 6;
localparam PMA_RX_DFE_TAP1_COEFF_ADDR_FIELD_BITMASK = 32'h0000003F;
localparam PMA_RX_DFE_TAP1_COEFF_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP1_COEFF_ADDR_FIELD_VALUE = 6'h0;

localparam PMA_RX_DFE_TAP1_SGN_VALUE = "tap1_sign_0";
localparam PMA_RX_DFE_TAP1_SGN_ADDR_OFST = 301;
localparam PMA_RX_DFE_TAP1_SGN_ADDR_FIELD_OFST = 6;
localparam PMA_RX_DFE_TAP1_SGN_ADDR_FIELD_HIGH = 6;
localparam PMA_RX_DFE_TAP1_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_TAP1_SGN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_RX_DFE_TAP1_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP1_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_TAP2_COEFF_VALUE = 5'd0;
localparam PMA_RX_DFE_TAP2_COEFF_ADDR_OFST = 304;
localparam PMA_RX_DFE_TAP2_COEFF_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DFE_TAP2_COEFF_ADDR_FIELD_HIGH = 4;
localparam PMA_RX_DFE_TAP2_COEFF_ADDR_FIELD_SIZE = 5;
localparam PMA_RX_DFE_TAP2_COEFF_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam PMA_RX_DFE_TAP2_COEFF_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP2_COEFF_ADDR_FIELD_VALUE = 5'h0;

localparam PMA_RX_DFE_TAP2_SGN_VALUE = "tap2_sign_0";
localparam PMA_RX_DFE_TAP2_SGN_ADDR_OFST = 304;
localparam PMA_RX_DFE_TAP2_SGN_ADDR_FIELD_OFST = 5;
localparam PMA_RX_DFE_TAP2_SGN_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_DFE_TAP2_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_TAP2_SGN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_RX_DFE_TAP2_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP2_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_TAP3_COEFF_VALUE = 5'd0;
localparam PMA_RX_DFE_TAP3_COEFF_ADDR_OFST = 305;
localparam PMA_RX_DFE_TAP3_COEFF_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DFE_TAP3_COEFF_ADDR_FIELD_HIGH = 4;
localparam PMA_RX_DFE_TAP3_COEFF_ADDR_FIELD_SIZE = 5;
localparam PMA_RX_DFE_TAP3_COEFF_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam PMA_RX_DFE_TAP3_COEFF_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP3_COEFF_ADDR_FIELD_VALUE = 5'h0;

localparam PMA_RX_DFE_TAP3_SGN_VALUE = "tap3_sign_0";
localparam PMA_RX_DFE_TAP3_SGN_ADDR_OFST = 305;
localparam PMA_RX_DFE_TAP3_SGN_ADDR_FIELD_OFST = 5;
localparam PMA_RX_DFE_TAP3_SGN_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_DFE_TAP3_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_TAP3_SGN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_RX_DFE_TAP3_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP3_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_TAP4_COEFF_VALUE = 4'd0;
localparam PMA_RX_DFE_TAP4_COEFF_ADDR_OFST = 326;
localparam PMA_RX_DFE_TAP4_COEFF_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DFE_TAP4_COEFF_ADDR_FIELD_HIGH = 3;
localparam PMA_RX_DFE_TAP4_COEFF_ADDR_FIELD_SIZE = 4;
localparam PMA_RX_DFE_TAP4_COEFF_ADDR_FIELD_BITMASK = 32'h0000000F;
localparam PMA_RX_DFE_TAP4_COEFF_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP4_COEFF_ADDR_FIELD_VALUE = 4'h0;

localparam PMA_RX_DFE_TAP4_SGN_VALUE = "tap4_sign_0";
localparam PMA_RX_DFE_TAP4_SGN_ADDR_OFST = 327;
localparam PMA_RX_DFE_TAP4_SGN_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DFE_TAP4_SGN_ADDR_FIELD_HIGH = 0;
localparam PMA_RX_DFE_TAP4_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_TAP4_SGN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_RX_DFE_TAP4_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP4_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_TAP5_COEFF_VALUE = 4'd0;
localparam PMA_RX_DFE_TAP5_COEFF_ADDR_OFST = 326;
localparam PMA_RX_DFE_TAP5_COEFF_ADDR_FIELD_OFST = 4;
localparam PMA_RX_DFE_TAP5_COEFF_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_DFE_TAP5_COEFF_ADDR_FIELD_SIZE = 4;
localparam PMA_RX_DFE_TAP5_COEFF_ADDR_FIELD_BITMASK = 32'h000000F0;
localparam PMA_RX_DFE_TAP5_COEFF_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP5_COEFF_ADDR_FIELD_VALUE = 4'h0;

localparam PMA_RX_DFE_TAP5_SGN_VALUE = "tap5_sign_0";
localparam PMA_RX_DFE_TAP5_SGN_ADDR_OFST = 327;
localparam PMA_RX_DFE_TAP5_SGN_ADDR_FIELD_OFST = 1;
localparam PMA_RX_DFE_TAP5_SGN_ADDR_FIELD_HIGH = 1;
localparam PMA_RX_DFE_TAP5_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_TAP5_SGN_ADDR_FIELD_BITMASK = 32'h00000002;
localparam PMA_RX_DFE_TAP5_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP5_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_TAP6_COEFF_VALUE = 4'd0;
localparam PMA_RX_DFE_TAP6_COEFF_ADDR_OFST = 327;
localparam PMA_RX_DFE_TAP6_COEFF_ADDR_FIELD_OFST = 2;
localparam PMA_RX_DFE_TAP6_COEFF_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_DFE_TAP6_COEFF_ADDR_FIELD_SIZE = 4;
localparam PMA_RX_DFE_TAP6_COEFF_ADDR_FIELD_BITMASK = 32'h0000003C;
localparam PMA_RX_DFE_TAP6_COEFF_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP6_COEFF_ADDR_FIELD_VALUE = 4'h0;

localparam PMA_RX_DFE_TAP6_SGN_VALUE = "tap6_sign_0";
localparam PMA_RX_DFE_TAP6_SGN_ADDR_OFST = 327;
localparam PMA_RX_DFE_TAP6_SGN_ADDR_FIELD_OFST = 6;
localparam PMA_RX_DFE_TAP6_SGN_ADDR_FIELD_HIGH = 6;
localparam PMA_RX_DFE_TAP6_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_TAP6_SGN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_RX_DFE_TAP6_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP6_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_TAP7_COEFF_VALUE = 4'd0;
localparam PMA_RX_DFE_TAP7_COEFF_ADDR_OFST = 335;
localparam PMA_RX_DFE_TAP7_COEFF_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DFE_TAP7_COEFF_ADDR_FIELD_HIGH = 3;
localparam PMA_RX_DFE_TAP7_COEFF_ADDR_FIELD_SIZE = 4;
localparam PMA_RX_DFE_TAP7_COEFF_ADDR_FIELD_BITMASK = 32'h0000000F;
localparam PMA_RX_DFE_TAP7_COEFF_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP7_COEFF_ADDR_FIELD_VALUE = 4'h0;

localparam PMA_RX_DFE_TAP7_SGN_VALUE = "tap7_sign_0";
localparam PMA_RX_DFE_TAP7_SGN_ADDR_OFST = 335;
localparam PMA_RX_DFE_TAP7_SGN_ADDR_FIELD_OFST = 4;
localparam PMA_RX_DFE_TAP7_SGN_ADDR_FIELD_HIGH = 4;
localparam PMA_RX_DFE_TAP7_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_TAP7_SGN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam PMA_RX_DFE_TAP7_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP7_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_TAP8_COEFF_VALUE = 3'd0;
localparam PMA_RX_DFE_TAP8_COEFF_ADDR_OFST = 335;
localparam PMA_RX_DFE_TAP8_COEFF_ADDR_FIELD_OFST = 5;
localparam PMA_RX_DFE_TAP8_COEFF_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_DFE_TAP8_COEFF_ADDR_FIELD_SIZE = 3;
localparam PMA_RX_DFE_TAP8_COEFF_ADDR_FIELD_BITMASK = 32'h000000E0;
localparam PMA_RX_DFE_TAP8_COEFF_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP8_COEFF_ADDR_FIELD_VALUE = 3'h0;

localparam PMA_RX_DFE_TAP8_SGN_VALUE = "tap8_sign_0";
localparam PMA_RX_DFE_TAP8_SGN_ADDR_OFST = 336;
localparam PMA_RX_DFE_TAP8_SGN_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DFE_TAP8_SGN_ADDR_FIELD_HIGH = 0;
localparam PMA_RX_DFE_TAP8_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_TAP8_SGN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_RX_DFE_TAP8_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP8_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_TAP9_COEFF_VALUE = 3'd0;
localparam PMA_RX_DFE_TAP9_COEFF_ADDR_OFST = 336;
localparam PMA_RX_DFE_TAP9_COEFF_ADDR_FIELD_OFST = 1;
localparam PMA_RX_DFE_TAP9_COEFF_ADDR_FIELD_HIGH = 3;
localparam PMA_RX_DFE_TAP9_COEFF_ADDR_FIELD_SIZE = 3;
localparam PMA_RX_DFE_TAP9_COEFF_ADDR_FIELD_BITMASK = 32'h0000000E;
localparam PMA_RX_DFE_TAP9_COEFF_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP9_COEFF_ADDR_FIELD_VALUE = 3'h0;

localparam PMA_RX_DFE_TAP9_SGN_VALUE = "tap9_sign_0";
localparam PMA_RX_DFE_TAP9_SGN_ADDR_OFST = 336;
localparam PMA_RX_DFE_TAP9_SGN_ADDR_FIELD_OFST = 4;
localparam PMA_RX_DFE_TAP9_SGN_ADDR_FIELD_HIGH = 4;
localparam PMA_RX_DFE_TAP9_SGN_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_DFE_TAP9_SGN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam PMA_RX_DFE_TAP9_SGN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_TAP9_SGN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_DFE_TAPSUM_BW_SEL_VALUE = "tapsum_medbw";
localparam PMA_RX_DFE_TAPSUM_BW_SEL_ADDR_OFST = 304;
localparam PMA_RX_DFE_TAPSUM_BW_SEL_ADDR_FIELD_OFST = 6;
localparam PMA_RX_DFE_TAPSUM_BW_SEL_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_DFE_TAPSUM_BW_SEL_ADDR_FIELD_SIZE = 2;
localparam PMA_RX_DFE_TAPSUM_BW_SEL_ADDR_FIELD_BITMASK = 32'h000000C0;
localparam PMA_RX_DFE_TAPSUM_BW_SEL_ADDR_FIELD_VALMASK = 32'h00000040;
localparam PMA_RX_DFE_TAPSUM_BW_SEL_ADDR_FIELD_VALUE = 2'h1;

localparam PMA_RX_DFE_VREF_COEFF_VALUE = 6'd0;
localparam PMA_RX_DFE_VREF_COEFF_ADDR_OFST = 340;
localparam PMA_RX_DFE_VREF_COEFF_ADDR_FIELD_OFST = 0;
localparam PMA_RX_DFE_VREF_COEFF_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_DFE_VREF_COEFF_ADDR_FIELD_SIZE = 6;
localparam PMA_RX_DFE_VREF_COEFF_ADDR_FIELD_BITMASK = 32'h0000003F;
localparam PMA_RX_DFE_VREF_COEFF_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_DFE_VREF_COEFF_ADDR_FIELD_VALUE = 6'h0;

localparam PMA_RX_DFE_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam PMA_RX_ODI_DATARATE_BPS_VALUE = "10312500000";

localparam PMA_RX_ODI_ENABLE_CDR_LPBK_VALUE = "disable_lpbk";
localparam PMA_RX_ODI_ENABLE_CDR_LPBK_ADDR_OFST = 323;
localparam PMA_RX_ODI_ENABLE_CDR_LPBK_ADDR_FIELD_OFST = 0;
localparam PMA_RX_ODI_ENABLE_CDR_LPBK_ADDR_FIELD_HIGH = 0;
localparam PMA_RX_ODI_ENABLE_CDR_LPBK_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_ODI_ENABLE_CDR_LPBK_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_RX_ODI_ENABLE_CDR_LPBK_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_ODI_ENABLE_CDR_LPBK_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_ODI_INITIAL_SETTINGS_VALUE = "true";

localparam PMA_RX_ODI_MONITOR_BW_SEL_VALUE = "bw_4";
localparam PMA_RX_ODI_MONITOR_BW_SEL_ADDR0_OFST = 324;
localparam PMA_RX_ODI_MONITOR_BW_SEL_ADDR0_FIELD_OFST = 7;
localparam PMA_RX_ODI_MONITOR_BW_SEL_ADDR0_FIELD_HIGH = 7;
localparam PMA_RX_ODI_MONITOR_BW_SEL_ADDR0_FIELD_SIZE = 1;
localparam PMA_RX_ODI_MONITOR_BW_SEL_ADDR0_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_ODI_MONITOR_BW_SEL_ADDR0_FIELD_VALMASK = 32'h00000080;
localparam PMA_RX_ODI_MONITOR_BW_SEL_ADDR0_FIELD_VALUE = 1'h1;
localparam PMA_RX_ODI_MONITOR_BW_SEL_ADDR1_OFST = 325;
localparam PMA_RX_ODI_MONITOR_BW_SEL_ADDR1_FIELD_OFST = 7;
localparam PMA_RX_ODI_MONITOR_BW_SEL_ADDR1_FIELD_HIGH = 7;
localparam PMA_RX_ODI_MONITOR_BW_SEL_ADDR1_FIELD_SIZE = 1;
localparam PMA_RX_ODI_MONITOR_BW_SEL_ADDR1_FIELD_BITMASK = 32'h00000080;
localparam PMA_RX_ODI_MONITOR_BW_SEL_ADDR1_FIELD_VALMASK = 32'h00000080;
localparam PMA_RX_ODI_MONITOR_BW_SEL_ADDR1_FIELD_VALUE = 1'h1;

localparam PMA_RX_ODI_OPTIMAL_VALUE = "true";

localparam PMA_RX_ODI_PHASE_STEPS_64_VS_128_VALUE = "phase_steps_64";
localparam PMA_RX_ODI_PHASE_STEPS_64_VS_128_ADDR_OFST = 324;
localparam PMA_RX_ODI_PHASE_STEPS_64_VS_128_ADDR_FIELD_OFST = 5;
localparam PMA_RX_ODI_PHASE_STEPS_64_VS_128_ADDR_FIELD_HIGH = 5;
localparam PMA_RX_ODI_PHASE_STEPS_64_VS_128_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_ODI_PHASE_STEPS_64_VS_128_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_RX_ODI_PHASE_STEPS_64_VS_128_ADDR_FIELD_VALMASK = 32'h00000020;
localparam PMA_RX_ODI_PHASE_STEPS_64_VS_128_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_RX_ODI_PHASE_STEPS_SEL_VALUE = "step33";
localparam PMA_RX_ODI_PHASE_STEPS_SEL_ADDR_OFST = 325;
localparam PMA_RX_ODI_PHASE_STEPS_SEL_ADDR_FIELD_OFST = 0;
localparam PMA_RX_ODI_PHASE_STEPS_SEL_ADDR_FIELD_HIGH = 6;
localparam PMA_RX_ODI_PHASE_STEPS_SEL_ADDR_FIELD_SIZE = 7;
localparam PMA_RX_ODI_PHASE_STEPS_SEL_ADDR_FIELD_BITMASK = 32'h0000007F;
localparam PMA_RX_ODI_PHASE_STEPS_SEL_ADDR_FIELD_VALMASK = 32'h00000040;
localparam PMA_RX_ODI_PHASE_STEPS_SEL_ADDR_FIELD_VALUE = 7'h40;

localparam PMA_RX_ODI_POWER_MODE_VALUE = "mid_power";

localparam PMA_RX_ODI_PROT_MODE_VALUE = "basic_rx";

localparam PMA_RX_ODI_XRX_PATH_X119_RX_PATH_RSTN_OVERRIDEB_VALUE = "use_sequencer";
localparam PMA_RX_ODI_XRX_PATH_X119_RX_PATH_RSTN_OVERRIDEB_ADDR_OFST = 377;
localparam PMA_RX_ODI_XRX_PATH_X119_RX_PATH_RSTN_OVERRIDEB_ADDR_FIELD_OFST = 1;
localparam PMA_RX_ODI_XRX_PATH_X119_RX_PATH_RSTN_OVERRIDEB_ADDR_FIELD_HIGH = 1;
localparam PMA_RX_ODI_XRX_PATH_X119_RX_PATH_RSTN_OVERRIDEB_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_ODI_XRX_PATH_X119_RX_PATH_RSTN_OVERRIDEB_ADDR_FIELD_BITMASK = 32'h00000002;
localparam PMA_RX_ODI_XRX_PATH_X119_RX_PATH_RSTN_OVERRIDEB_ADDR_FIELD_VALMASK = 32'h00000002;
localparam PMA_RX_ODI_XRX_PATH_X119_RX_PATH_RSTN_OVERRIDEB_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_RX_ODI_STEP_CTRL_SEL_VALUE = "dprio_mode";
localparam PMA_RX_ODI_STEP_CTRL_SEL_ADDR_OFST = 324;
localparam PMA_RX_ODI_STEP_CTRL_SEL_ADDR_FIELD0_OFST = 4;
localparam PMA_RX_ODI_STEP_CTRL_SEL_ADDR_FIELD0_HIGH = 4;
localparam PMA_RX_ODI_STEP_CTRL_SEL_ADDR_FIELD0_SIZE = 1;
localparam PMA_RX_ODI_STEP_CTRL_SEL_ADDR_FIELD0_BITMASK = 32'h00000010;
localparam PMA_RX_ODI_STEP_CTRL_SEL_ADDR_FIELD0_VALMASK = 32'h00000000;
localparam PMA_RX_ODI_STEP_CTRL_SEL_ADDR_FIELD0_VALUE = 1'h0;
localparam PMA_RX_ODI_STEP_CTRL_SEL_ADDR_FIELD1_OFST = 6;
localparam PMA_RX_ODI_STEP_CTRL_SEL_ADDR_FIELD1_HIGH = 6;
localparam PMA_RX_ODI_STEP_CTRL_SEL_ADDR_FIELD1_SIZE = 1;
localparam PMA_RX_ODI_STEP_CTRL_SEL_ADDR_FIELD1_BITMASK = 32'h00000040;
localparam PMA_RX_ODI_STEP_CTRL_SEL_ADDR_FIELD1_VALMASK = 32'h00000000;
localparam PMA_RX_ODI_STEP_CTRL_SEL_ADDR_FIELD1_VALUE = 1'h0;

localparam PMA_RX_ODI_SUP_MODE_VALUE = "user_mode";

localparam PMA_RX_ODI_VERT_THRESHOLD_VALUE = "vert_0";
localparam PMA_RX_ODI_VERT_THRESHOLD_ADDR_OFST = 323;
localparam PMA_RX_ODI_VERT_THRESHOLD_ADDR_FIELD_OFST = 2;
localparam PMA_RX_ODI_VERT_THRESHOLD_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_ODI_VERT_THRESHOLD_ADDR_FIELD_SIZE = 6;
localparam PMA_RX_ODI_VERT_THRESHOLD_ADDR_FIELD_BITMASK = 32'h000000FC;
localparam PMA_RX_ODI_VERT_THRESHOLD_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_ODI_VERT_THRESHOLD_ADDR_FIELD_VALUE = 6'h0;

localparam PMA_RX_ODI_VREG_VOLTAGE_SEL_VALUE = "vreg0";
localparam PMA_RX_ODI_VREG_VOLTAGE_SEL_ADDR_OFST = 340;
localparam PMA_RX_ODI_VREG_VOLTAGE_SEL_ADDR_FIELD_OFST = 6;
localparam PMA_RX_ODI_VREG_VOLTAGE_SEL_ADDR_FIELD_HIGH = 7;
localparam PMA_RX_ODI_VREG_VOLTAGE_SEL_ADDR_FIELD_SIZE = 2;
localparam PMA_RX_ODI_VREG_VOLTAGE_SEL_ADDR_FIELD_BITMASK = 32'h000000C0;
localparam PMA_RX_ODI_VREG_VOLTAGE_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_ODI_VREG_VOLTAGE_SEL_ADDR_FIELD_VALUE = 2'h0;

localparam PMA_RX_ODI_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam PMA_RX_SD_LINK_VALUE = "sr";

localparam PMA_RX_SD_OPTIMAL_VALUE = "true";

localparam PMA_RX_SD_POWER_MODE_VALUE = "mid_power";

localparam PMA_RX_SD_PROT_MODE_VALUE = "basic_rx";

localparam PMA_RX_SD_SD_OUTPUT_OFF_VALUE = "clk_divrx_2";
localparam PMA_RX_SD_SD_OUTPUT_OFF_ADDR0_OFST = 371;
localparam PMA_RX_SD_SD_OUTPUT_OFF_ADDR0_FIELD_OFST = 4;
localparam PMA_RX_SD_SD_OUTPUT_OFF_ADDR0_FIELD_HIGH = 7;
localparam PMA_RX_SD_SD_OUTPUT_OFF_ADDR0_FIELD_SIZE = 4;
localparam PMA_RX_SD_SD_OUTPUT_OFF_ADDR0_FIELD_BITMASK = 32'h000000F0;
localparam PMA_RX_SD_SD_OUTPUT_OFF_ADDR0_FIELD_VALMASK = 32'h00000030;
localparam PMA_RX_SD_SD_OUTPUT_OFF_ADDR0_FIELD_VALUE = 4'h3;
localparam PMA_RX_SD_SD_OUTPUT_OFF_ADDR1_OFST = 372;
localparam PMA_RX_SD_SD_OUTPUT_OFF_ADDR1_FIELD_OFST = 0;
localparam PMA_RX_SD_SD_OUTPUT_OFF_ADDR1_FIELD_HIGH = 4;
localparam PMA_RX_SD_SD_OUTPUT_OFF_ADDR1_FIELD_SIZE = 5;
localparam PMA_RX_SD_SD_OUTPUT_OFF_ADDR1_FIELD_BITMASK = 32'h0000001F;
localparam PMA_RX_SD_SD_OUTPUT_OFF_ADDR1_FIELD_VALMASK = 32'h0000000C;
localparam PMA_RX_SD_SD_OUTPUT_OFF_ADDR1_FIELD_VALUE = 5'hC;

localparam PMA_RX_SD_SD_OUTPUT_ON_VALUE = "force_sd_output_on";
localparam PMA_RX_SD_SD_OUTPUT_ON_ADDR0_OFST = 371;
localparam PMA_RX_SD_SD_OUTPUT_ON_ADDR0_FIELD_OFST = 0;
localparam PMA_RX_SD_SD_OUTPUT_ON_ADDR0_FIELD_HIGH = 3;
localparam PMA_RX_SD_SD_OUTPUT_ON_ADDR0_FIELD_SIZE = 4;
localparam PMA_RX_SD_SD_OUTPUT_ON_ADDR0_FIELD_BITMASK = 32'h0000000F;
localparam PMA_RX_SD_SD_OUTPUT_ON_ADDR0_FIELD_VALMASK = 32'h00000001;
localparam PMA_RX_SD_SD_OUTPUT_ON_ADDR0_FIELD_VALUE = 4'h1;
localparam PMA_RX_SD_SD_OUTPUT_ON_ADDR1_OFST = 372;
localparam PMA_RX_SD_SD_OUTPUT_ON_ADDR1_FIELD_OFST = 5;
localparam PMA_RX_SD_SD_OUTPUT_ON_ADDR1_FIELD_HIGH = 5;
localparam PMA_RX_SD_SD_OUTPUT_ON_ADDR1_FIELD_SIZE = 1;
localparam PMA_RX_SD_SD_OUTPUT_ON_ADDR1_FIELD_BITMASK = 32'h00000020;
localparam PMA_RX_SD_SD_OUTPUT_ON_ADDR1_FIELD_VALMASK = 32'h00000020;
localparam PMA_RX_SD_SD_OUTPUT_ON_ADDR1_FIELD_VALUE = 1'h1;

localparam PMA_RX_SD_SD_PDB_VALUE = "sd_off";
localparam PMA_RX_SD_SD_PDB_ADDR_OFST = 372;
localparam PMA_RX_SD_SD_PDB_ADDR_FIELD_OFST = 6;
localparam PMA_RX_SD_SD_PDB_ADDR_FIELD_HIGH = 6;
localparam PMA_RX_SD_SD_PDB_ADDR_FIELD_SIZE = 1;
localparam PMA_RX_SD_SD_PDB_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_RX_SD_SD_PDB_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_RX_SD_SD_PDB_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_RX_SD_SD_THRESHOLD_VALUE = "sdlv_3";
localparam PMA_RX_SD_SD_THRESHOLD_ADDR_OFST = 373;
localparam PMA_RX_SD_SD_THRESHOLD_ADDR_FIELD_OFST = 0;
localparam PMA_RX_SD_SD_THRESHOLD_ADDR_FIELD_HIGH = 3;
localparam PMA_RX_SD_SD_THRESHOLD_ADDR_FIELD_SIZE = 4;
localparam PMA_RX_SD_SD_THRESHOLD_ADDR_FIELD_BITMASK = 32'h0000000F;
localparam PMA_RX_SD_SD_THRESHOLD_ADDR_FIELD_VALMASK = 32'h00000003;
localparam PMA_RX_SD_SD_THRESHOLD_ADDR_FIELD_VALUE = 4'h3;

localparam PMA_RX_SD_SUP_MODE_VALUE = "user_mode";

localparam PMA_RX_SD_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam PMA_TX_BUF_PM_CR2_TX_PATH_ANALOG_MODE_VALUE = "user_custom";

localparam PMA_TX_BUF_BTI_PROTECTED_VALUE = "false";

localparam PMA_TX_BUF_CALIBRATION_EN_VALUE = "false";

localparam PMA_TX_BUF_PM_CR2_TX_PATH_CALIBRATION_EN_VALUE = "false";

localparam PMA_TX_BUF_CALIBRATION_RESISTOR_VALUE_VALUE = "res_setting0";
localparam PMA_TX_BUF_CALIBRATION_RESISTOR_VALUE_ADDR0_OFST = 285;
localparam PMA_TX_BUF_CALIBRATION_RESISTOR_VALUE_ADDR0_FIELD_OFST = 7;
localparam PMA_TX_BUF_CALIBRATION_RESISTOR_VALUE_ADDR0_FIELD_HIGH = 7;
localparam PMA_TX_BUF_CALIBRATION_RESISTOR_VALUE_ADDR0_FIELD_SIZE = 1;
localparam PMA_TX_BUF_CALIBRATION_RESISTOR_VALUE_ADDR0_FIELD_BITMASK = 32'h00000080;
localparam PMA_TX_BUF_CALIBRATION_RESISTOR_VALUE_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_CALIBRATION_RESISTOR_VALUE_ADDR0_FIELD_VALUE = 1'h0;
localparam PMA_TX_BUF_CALIBRATION_RESISTOR_VALUE_ADDR1_OFST = 316;
localparam PMA_TX_BUF_CALIBRATION_RESISTOR_VALUE_ADDR1_FIELD_OFST = 1;
localparam PMA_TX_BUF_CALIBRATION_RESISTOR_VALUE_ADDR1_FIELD_HIGH = 1;
localparam PMA_TX_BUF_CALIBRATION_RESISTOR_VALUE_ADDR1_FIELD_SIZE = 1;
localparam PMA_TX_BUF_CALIBRATION_RESISTOR_VALUE_ADDR1_FIELD_BITMASK = 32'h00000002;
localparam PMA_TX_BUF_CALIBRATION_RESISTOR_VALUE_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_CALIBRATION_RESISTOR_VALUE_ADDR1_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_CDR_CP_CALIBRATION_EN_VALUE = "cdr_cp_cal_disable";
localparam PMA_TX_BUF_CDR_CP_CALIBRATION_EN_ADDR_OFST = 271;
localparam PMA_TX_BUF_CDR_CP_CALIBRATION_EN_ADDR_FIELD_OFST = 7;
localparam PMA_TX_BUF_CDR_CP_CALIBRATION_EN_ADDR_FIELD_HIGH = 7;
localparam PMA_TX_BUF_CDR_CP_CALIBRATION_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_CDR_CP_CALIBRATION_EN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_TX_BUF_CDR_CP_CALIBRATION_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_CDR_CP_CALIBRATION_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_CHGPMP_CURRENT_DN_TRIM_VALUE = "cp_current_trimming_dn_setting0";
localparam PMA_TX_BUF_CHGPMP_CURRENT_DN_TRIM_ADDR0_OFST = 272;
localparam PMA_TX_BUF_CHGPMP_CURRENT_DN_TRIM_ADDR0_FIELD_OFST = 6;
localparam PMA_TX_BUF_CHGPMP_CURRENT_DN_TRIM_ADDR0_FIELD_HIGH = 6;
localparam PMA_TX_BUF_CHGPMP_CURRENT_DN_TRIM_ADDR0_FIELD_SIZE = 1;
localparam PMA_TX_BUF_CHGPMP_CURRENT_DN_TRIM_ADDR0_FIELD_BITMASK = 32'h00000040;
localparam PMA_TX_BUF_CHGPMP_CURRENT_DN_TRIM_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_CHGPMP_CURRENT_DN_TRIM_ADDR0_FIELD_VALUE = 1'h0;
localparam PMA_TX_BUF_CHGPMP_CURRENT_DN_TRIM_ADDR1_OFST = 276;
localparam PMA_TX_BUF_CHGPMP_CURRENT_DN_TRIM_ADDR1_FIELD_OFST = 5;
localparam PMA_TX_BUF_CHGPMP_CURRENT_DN_TRIM_ADDR1_FIELD_HIGH = 7;
localparam PMA_TX_BUF_CHGPMP_CURRENT_DN_TRIM_ADDR1_FIELD_SIZE = 3;
localparam PMA_TX_BUF_CHGPMP_CURRENT_DN_TRIM_ADDR1_FIELD_BITMASK = 32'h000000E0;
localparam PMA_TX_BUF_CHGPMP_CURRENT_DN_TRIM_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_CHGPMP_CURRENT_DN_TRIM_ADDR1_FIELD_VALUE = 3'h0;

localparam PMA_TX_BUF_CHGPMP_CURRENT_UP_TRIM_VALUE = "cp_current_trimming_up_setting0";
localparam PMA_TX_BUF_CHGPMP_CURRENT_UP_TRIM_ADDR0_OFST = 272;
localparam PMA_TX_BUF_CHGPMP_CURRENT_UP_TRIM_ADDR0_FIELD_OFST = 7;
localparam PMA_TX_BUF_CHGPMP_CURRENT_UP_TRIM_ADDR0_FIELD_HIGH = 7;
localparam PMA_TX_BUF_CHGPMP_CURRENT_UP_TRIM_ADDR0_FIELD_SIZE = 1;
localparam PMA_TX_BUF_CHGPMP_CURRENT_UP_TRIM_ADDR0_FIELD_BITMASK = 32'h00000080;
localparam PMA_TX_BUF_CHGPMP_CURRENT_UP_TRIM_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_CHGPMP_CURRENT_UP_TRIM_ADDR0_FIELD_VALUE = 1'h0;
localparam PMA_TX_BUF_CHGPMP_CURRENT_UP_TRIM_ADDR1_OFST = 281;
localparam PMA_TX_BUF_CHGPMP_CURRENT_UP_TRIM_ADDR1_FIELD_OFST = 5;
localparam PMA_TX_BUF_CHGPMP_CURRENT_UP_TRIM_ADDR1_FIELD_HIGH = 7;
localparam PMA_TX_BUF_CHGPMP_CURRENT_UP_TRIM_ADDR1_FIELD_SIZE = 3;
localparam PMA_TX_BUF_CHGPMP_CURRENT_UP_TRIM_ADDR1_FIELD_BITMASK = 32'h000000E0;
localparam PMA_TX_BUF_CHGPMP_CURRENT_UP_TRIM_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_CHGPMP_CURRENT_UP_TRIM_ADDR1_FIELD_VALUE = 3'h0;

localparam PMA_TX_BUF_CHGPMP_DN_TRIM_DOUBLE_VALUE = "normal_dn_trim_current";
localparam PMA_TX_BUF_CHGPMP_DN_TRIM_DOUBLE_ADDR_OFST = 259;
localparam PMA_TX_BUF_CHGPMP_DN_TRIM_DOUBLE_ADDR_FIELD_OFST = 6;
localparam PMA_TX_BUF_CHGPMP_DN_TRIM_DOUBLE_ADDR_FIELD_HIGH = 6;
localparam PMA_TX_BUF_CHGPMP_DN_TRIM_DOUBLE_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_CHGPMP_DN_TRIM_DOUBLE_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_TX_BUF_CHGPMP_DN_TRIM_DOUBLE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_CHGPMP_DN_TRIM_DOUBLE_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_CHGPMP_UP_TRIM_DOUBLE_VALUE = "normal_up_trim_current";
localparam PMA_TX_BUF_CHGPMP_UP_TRIM_DOUBLE_ADDR_OFST = 259;
localparam PMA_TX_BUF_CHGPMP_UP_TRIM_DOUBLE_ADDR_FIELD_OFST = 7;
localparam PMA_TX_BUF_CHGPMP_UP_TRIM_DOUBLE_ADDR_FIELD_HIGH = 7;
localparam PMA_TX_BUF_CHGPMP_UP_TRIM_DOUBLE_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_CHGPMP_UP_TRIM_DOUBLE_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_TX_BUF_CHGPMP_UP_TRIM_DOUBLE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_CHGPMP_UP_TRIM_DOUBLE_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_PM_CR2_TX_PATH_CLOCK_DIVIDER_RATIO_VALUE = 4'd1;

localparam PMA_TX_BUF_COMPENSATION_EN_VALUE = "enable";
localparam PMA_TX_BUF_COMPENSATION_EN_ADDR_OFST = 265;
localparam PMA_TX_BUF_COMPENSATION_EN_ADDR_FIELD_OFST = 5;
localparam PMA_TX_BUF_COMPENSATION_EN_ADDR_FIELD_HIGH = 5;
localparam PMA_TX_BUF_COMPENSATION_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_COMPENSATION_EN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_TX_BUF_COMPENSATION_EN_ADDR_FIELD_VALMASK = 32'h00000020;
localparam PMA_TX_BUF_COMPENSATION_EN_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_TX_BUF_COMPENSATION_POSTTAP_EN_VALUE = "disable";
localparam PMA_TX_BUF_COMPENSATION_POSTTAP_EN_ADDR_OFST = 261;
localparam PMA_TX_BUF_COMPENSATION_POSTTAP_EN_ADDR_FIELD_OFST = 5;
localparam PMA_TX_BUF_COMPENSATION_POSTTAP_EN_ADDR_FIELD_HIGH = 5;
localparam PMA_TX_BUF_COMPENSATION_POSTTAP_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_COMPENSATION_POSTTAP_EN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_TX_BUF_COMPENSATION_POSTTAP_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_COMPENSATION_POSTTAP_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_CPEN_CTRL_VALUE = "cp_l1";
localparam PMA_TX_BUF_CPEN_CTRL_ADDR_OFST = 269;
localparam PMA_TX_BUF_CPEN_CTRL_ADDR_FIELD_OFST = 7;
localparam PMA_TX_BUF_CPEN_CTRL_ADDR_FIELD_HIGH = 7;
localparam PMA_TX_BUF_CPEN_CTRL_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_CPEN_CTRL_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_TX_BUF_CPEN_CTRL_ADDR_FIELD_VALMASK = 32'h00000080;
localparam PMA_TX_BUF_CPEN_CTRL_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_TX_BUF_DATARATE_BPS_VALUE = "10312500000";

localparam PMA_TX_BUF_PM_CR2_TX_PATH_DATARATE_BPS_VALUE = "10312500000";

localparam PMA_TX_BUF_PM_CR2_TX_PATH_DATAWIDTH_VALUE = 8'd32;

localparam PMA_TX_BUF_DCC_FINESTEP_ENIN_VALUE = "disable";
localparam PMA_TX_BUF_DCC_FINESTEP_ENIN_ADDR_OFST = 262;
localparam PMA_TX_BUF_DCC_FINESTEP_ENIN_ADDR_FIELD_OFST = 3;
localparam PMA_TX_BUF_DCC_FINESTEP_ENIN_ADDR_FIELD_HIGH = 3;
localparam PMA_TX_BUF_DCC_FINESTEP_ENIN_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_DCC_FINESTEP_ENIN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam PMA_TX_BUF_DCC_FINESTEP_ENIN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_DCC_FINESTEP_ENIN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_DCD_CLK_DIV_CTRL_VALUE = "dcd_ck_div128";
localparam PMA_TX_BUF_DCD_CLK_DIV_CTRL_ADDR_OFST = 341;
localparam PMA_TX_BUF_DCD_CLK_DIV_CTRL_ADDR_FIELD_OFST = 7;
localparam PMA_TX_BUF_DCD_CLK_DIV_CTRL_ADDR_FIELD_HIGH = 7;
localparam PMA_TX_BUF_DCD_CLK_DIV_CTRL_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_DCD_CLK_DIV_CTRL_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_TX_BUF_DCD_CLK_DIV_CTRL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_DCD_CLK_DIV_CTRL_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_DCD_DETECTION_EN_VALUE = "disable";
localparam PMA_TX_BUF_DCD_DETECTION_EN_ADDR_OFST = 262;
localparam PMA_TX_BUF_DCD_DETECTION_EN_ADDR_FIELD_OFST = 4;
localparam PMA_TX_BUF_DCD_DETECTION_EN_ADDR_FIELD_HIGH = 4;
localparam PMA_TX_BUF_DCD_DETECTION_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_DCD_DETECTION_EN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam PMA_TX_BUF_DCD_DETECTION_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_DCD_DETECTION_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_DFT_SEL_VALUE = "dft_disabled";
localparam PMA_TX_BUF_DFT_SEL_ADDR_OFST = 270;
localparam PMA_TX_BUF_DFT_SEL_ADDR_FIELD_OFST = 4;
localparam PMA_TX_BUF_DFT_SEL_ADDR_FIELD_HIGH = 7;
localparam PMA_TX_BUF_DFT_SEL_ADDR_FIELD_SIZE = 4;
localparam PMA_TX_BUF_DFT_SEL_ADDR_FIELD_BITMASK = 32'h000000F0;
localparam PMA_TX_BUF_DFT_SEL_ADDR_FIELD_VALMASK = 32'h000000F0;
localparam PMA_TX_BUF_DFT_SEL_ADDR_FIELD_VALUE = 4'hF;

localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_BANDWIDTH_VALUE = "dcc_bw_2";
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_BANDWIDTH_ADDR_OFST = 276;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_BANDWIDTH_ADDR_FIELD_OFST = 0;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_BANDWIDTH_ADDR_FIELD_HIGH = 1;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_BANDWIDTH_ADDR_FIELD_SIZE = 2;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_BANDWIDTH_ADDR_FIELD_BITMASK = 32'h00000003;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_BANDWIDTH_ADDR_FIELD_VALMASK = 32'h00000002;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_BANDWIDTH_ADDR_FIELD_VALUE = 2'h2;

localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_BANDWIDTH_DN_VALUE = "dcd_bw_dn_2";
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_BANDWIDTH_DN_ADDR_OFST = 341;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_BANDWIDTH_DN_ADDR_FIELD_OFST = 5;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_BANDWIDTH_DN_ADDR_FIELD_HIGH = 6;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_BANDWIDTH_DN_ADDR_FIELD_SIZE = 2;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_BANDWIDTH_DN_ADDR_FIELD_BITMASK = 32'h00000060;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_BANDWIDTH_DN_ADDR_FIELD_VALMASK = 32'h00000040;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_BANDWIDTH_DN_ADDR_FIELD_VALUE = 2'h2;

localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE1_VALUE = "dcc_ref1_4";
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE1_ADDR0_OFST = 288;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE1_ADDR0_FIELD_OFST = 6;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE1_ADDR0_FIELD_HIGH = 6;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE1_ADDR0_FIELD_SIZE = 1;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE1_ADDR0_FIELD_BITMASK = 32'h00000040;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE1_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE1_ADDR0_FIELD_VALUE = 1'h0;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE1_ADDR1_OFST = 369;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE1_ADDR1_FIELD_OFST = 5;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE1_ADDR1_FIELD_HIGH = 7;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE1_ADDR1_FIELD_SIZE = 3;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE1_ADDR1_FIELD_BITMASK = 32'h000000E0;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE1_ADDR1_FIELD_VALMASK = 32'h00000080;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE1_ADDR1_FIELD_VALUE = 3'h4;

localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE2_VALUE = "dcc_ref2_2";
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE2_ADDR_OFST = 370;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE2_ADDR_FIELD_OFST = 5;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE2_ADDR_FIELD_HIGH = 7;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE2_ADDR_FIELD_SIZE = 3;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE2_ADDR_FIELD_BITMASK = 32'h000000E0;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE2_ADDR_FIELD_VALMASK = 32'h00000040;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_REFERENCE2_ADDR_FIELD_VALUE = 3'h2;

localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_RESET_N_VALUE = "reset";
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_RESET_N_ADDR_OFST = 265;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_RESET_N_ADDR_FIELD_OFST = 7;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_RESET_N_ADDR_FIELD_HIGH = 7;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_RESET_N_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_RESET_N_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_RESET_N_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_DUTY_CYCLE_CORRECTION_RESET_N_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_DUTY_CYCLE_CP_COMP_EN_VALUE = "cp_comp_off";
localparam PMA_TX_BUF_DUTY_CYCLE_CP_COMP_EN_ADDR_OFST = 268;
localparam PMA_TX_BUF_DUTY_CYCLE_CP_COMP_EN_ADDR_FIELD_OFST = 7;
localparam PMA_TX_BUF_DUTY_CYCLE_CP_COMP_EN_ADDR_FIELD_HIGH = 7;
localparam PMA_TX_BUF_DUTY_CYCLE_CP_COMP_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_DUTY_CYCLE_CP_COMP_EN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_TX_BUF_DUTY_CYCLE_CP_COMP_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_DUTY_CYCLE_CP_COMP_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_DUTY_CYCLE_DETECTOR_CP_CAL_VALUE = "dcd_cp_cal_disable";
localparam PMA_TX_BUF_DUTY_CYCLE_DETECTOR_CP_CAL_ADDR_OFST = 266;
localparam PMA_TX_BUF_DUTY_CYCLE_DETECTOR_CP_CAL_ADDR_FIELD_OFST = 6;
localparam PMA_TX_BUF_DUTY_CYCLE_DETECTOR_CP_CAL_ADDR_FIELD_HIGH = 7;
localparam PMA_TX_BUF_DUTY_CYCLE_DETECTOR_CP_CAL_ADDR_FIELD_SIZE = 2;
localparam PMA_TX_BUF_DUTY_CYCLE_DETECTOR_CP_CAL_ADDR_FIELD_BITMASK = 32'h000000C0;
localparam PMA_TX_BUF_DUTY_CYCLE_DETECTOR_CP_CAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_DUTY_CYCLE_DETECTOR_CP_CAL_ADDR_FIELD_VALUE = 2'h0;

localparam PMA_TX_BUF_DUTY_CYCLE_DETECTOR_SA_CAL_VALUE = "dcd_sa_cal_disable";
localparam PMA_TX_BUF_DUTY_CYCLE_DETECTOR_SA_CAL_ADDR_OFST = 268;
localparam PMA_TX_BUF_DUTY_CYCLE_DETECTOR_SA_CAL_ADDR_FIELD_OFST = 6;
localparam PMA_TX_BUF_DUTY_CYCLE_DETECTOR_SA_CAL_ADDR_FIELD_HIGH = 6;
localparam PMA_TX_BUF_DUTY_CYCLE_DETECTOR_SA_CAL_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_DUTY_CYCLE_DETECTOR_SA_CAL_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_TX_BUF_DUTY_CYCLE_DETECTOR_SA_CAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_DUTY_CYCLE_DETECTOR_SA_CAL_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_DUTY_CYCLE_INPUT_POLARITY_VALUE = "dcc_input_pos";
localparam PMA_TX_BUF_DUTY_CYCLE_INPUT_POLARITY_ADDR_OFST = 276;
localparam PMA_TX_BUF_DUTY_CYCLE_INPUT_POLARITY_ADDR_FIELD_OFST = 4;
localparam PMA_TX_BUF_DUTY_CYCLE_INPUT_POLARITY_ADDR_FIELD_HIGH = 4;
localparam PMA_TX_BUF_DUTY_CYCLE_INPUT_POLARITY_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_DUTY_CYCLE_INPUT_POLARITY_ADDR_FIELD_BITMASK = 32'h00000010;
localparam PMA_TX_BUF_DUTY_CYCLE_INPUT_POLARITY_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_DUTY_CYCLE_INPUT_POLARITY_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_DUTY_CYCLE_SETTING_VALUE = "dcc_t32";
localparam PMA_TX_BUF_DUTY_CYCLE_SETTING_ADDR_OFST = 266;
localparam PMA_TX_BUF_DUTY_CYCLE_SETTING_ADDR_FIELD_OFST = 0;
localparam PMA_TX_BUF_DUTY_CYCLE_SETTING_ADDR_FIELD_HIGH = 5;
localparam PMA_TX_BUF_DUTY_CYCLE_SETTING_ADDR_FIELD_SIZE = 6;
localparam PMA_TX_BUF_DUTY_CYCLE_SETTING_ADDR_FIELD_BITMASK = 32'h0000003F;
localparam PMA_TX_BUF_DUTY_CYCLE_SETTING_ADDR_FIELD_VALMASK = 32'h00000020;
localparam PMA_TX_BUF_DUTY_CYCLE_SETTING_ADDR_FIELD_VALUE = 6'h20;

localparam PMA_TX_BUF_DUTY_CYCLE_SETTING_AUX_VALUE = "dcc2_t32";
localparam PMA_TX_BUF_DUTY_CYCLE_SETTING_AUX_ADDR_OFST = 267;
localparam PMA_TX_BUF_DUTY_CYCLE_SETTING_AUX_ADDR_FIELD_OFST = 0;
localparam PMA_TX_BUF_DUTY_CYCLE_SETTING_AUX_ADDR_FIELD_HIGH = 5;
localparam PMA_TX_BUF_DUTY_CYCLE_SETTING_AUX_ADDR_FIELD_SIZE = 6;
localparam PMA_TX_BUF_DUTY_CYCLE_SETTING_AUX_ADDR_FIELD_BITMASK = 32'h0000003F;
localparam PMA_TX_BUF_DUTY_CYCLE_SETTING_AUX_ADDR_FIELD_VALMASK = 32'h00000020;
localparam PMA_TX_BUF_DUTY_CYCLE_SETTING_AUX_ADDR_FIELD_VALUE = 6'h20;

localparam PMA_TX_BUF_PM_CR2_TX_PATH_GT_ENABLED_VALUE = "disable";

localparam PMA_TX_BUF_IDLE_CTRL_VALUE = "id_cpen_on";
localparam PMA_TX_BUF_IDLE_CTRL_ADDR_OFST = 276;
localparam PMA_TX_BUF_IDLE_CTRL_ADDR_FIELD_OFST = 2;
localparam PMA_TX_BUF_IDLE_CTRL_ADDR_FIELD_HIGH = 2;
localparam PMA_TX_BUF_IDLE_CTRL_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_IDLE_CTRL_ADDR_FIELD_BITMASK = 32'h00000004;
localparam PMA_TX_BUF_IDLE_CTRL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_IDLE_CTRL_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_INITIAL_SETTINGS_VALUE = "true";

localparam PMA_TX_BUF_PM_CR2_TX_PATH_INITIAL_SETTINGS_VALUE = "true";

localparam PMA_TX_BUF_JTAG_DRV_SEL_VALUE = "drv1";
localparam PMA_TX_BUF_JTAG_DRV_SEL_ADDR_OFST = 268;
localparam PMA_TX_BUF_JTAG_DRV_SEL_ADDR_FIELD_OFST = 4;
localparam PMA_TX_BUF_JTAG_DRV_SEL_ADDR_FIELD_HIGH = 5;
localparam PMA_TX_BUF_JTAG_DRV_SEL_ADDR_FIELD_SIZE = 2;
localparam PMA_TX_BUF_JTAG_DRV_SEL_ADDR_FIELD_BITMASK = 32'h00000030;
localparam PMA_TX_BUF_JTAG_DRV_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_JTAG_DRV_SEL_ADDR_FIELD_VALUE = 2'h0;

localparam PMA_TX_BUF_JTAG_LP_VALUE = "lp_off";
localparam PMA_TX_BUF_JTAG_LP_ADDR_OFST = 268;
localparam PMA_TX_BUF_JTAG_LP_ADDR_FIELD_OFST = 3;
localparam PMA_TX_BUF_JTAG_LP_ADDR_FIELD_HIGH = 3;
localparam PMA_TX_BUF_JTAG_LP_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_JTAG_LP_ADDR_FIELD_BITMASK = 32'h00000008;
localparam PMA_TX_BUF_JTAG_LP_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_JTAG_LP_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_PM_CR2_TX_PATH_LINK_VALUE = "sr";

localparam PMA_TX_BUF_LOW_POWER_EN_VALUE = "disable";
localparam PMA_TX_BUF_LOW_POWER_EN_ADDR_OFST = 264;
localparam PMA_TX_BUF_LOW_POWER_EN_ADDR_FIELD_OFST = 4;
localparam PMA_TX_BUF_LOW_POWER_EN_ADDR_FIELD_HIGH = 4;
localparam PMA_TX_BUF_LOW_POWER_EN_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_LOW_POWER_EN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam PMA_TX_BUF_LOW_POWER_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_LOW_POWER_EN_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_LST_VALUE = "atb_disabled";
localparam PMA_TX_BUF_LST_ADDR_OFST = 270;
localparam PMA_TX_BUF_LST_ADDR_FIELD_OFST = 0;
localparam PMA_TX_BUF_LST_ADDR_FIELD_HIGH = 3;
localparam PMA_TX_BUF_LST_ADDR_FIELD_SIZE = 4;
localparam PMA_TX_BUF_LST_ADDR_FIELD_BITMASK = 32'h0000000F;
localparam PMA_TX_BUF_LST_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_LST_ADDR_FIELD_VALUE = 4'h0;

localparam PMA_TX_BUF_PM_CR2_TX_RX_MCGB_LOCATION_FOR_PCIE_VALUE = 5'd0;
localparam PMA_TX_BUF_PM_CR2_TX_RX_MCGB_LOCATION_FOR_PCIE_ADDR0_OFST = 367;
localparam PMA_TX_BUF_PM_CR2_TX_RX_MCGB_LOCATION_FOR_PCIE_ADDR0_FIELD_OFST = 2;
localparam PMA_TX_BUF_PM_CR2_TX_RX_MCGB_LOCATION_FOR_PCIE_ADDR0_FIELD_HIGH = 5;
localparam PMA_TX_BUF_PM_CR2_TX_RX_MCGB_LOCATION_FOR_PCIE_ADDR0_FIELD_SIZE = 4;
localparam PMA_TX_BUF_PM_CR2_TX_RX_MCGB_LOCATION_FOR_PCIE_ADDR0_FIELD_BITMASK = 32'h0000003C;
localparam PMA_TX_BUF_PM_CR2_TX_RX_MCGB_LOCATION_FOR_PCIE_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_PM_CR2_TX_RX_MCGB_LOCATION_FOR_PCIE_ADDR0_FIELD_VALUE = 4'h0;
localparam PMA_TX_BUF_PM_CR2_TX_RX_MCGB_LOCATION_FOR_PCIE_ADDR1_OFST = 381;
localparam PMA_TX_BUF_PM_CR2_TX_RX_MCGB_LOCATION_FOR_PCIE_ADDR1_FIELD_OFST = 7;
localparam PMA_TX_BUF_PM_CR2_TX_RX_MCGB_LOCATION_FOR_PCIE_ADDR1_FIELD_HIGH = 7;
localparam PMA_TX_BUF_PM_CR2_TX_RX_MCGB_LOCATION_FOR_PCIE_ADDR1_FIELD_SIZE = 1;
localparam PMA_TX_BUF_PM_CR2_TX_RX_MCGB_LOCATION_FOR_PCIE_ADDR1_FIELD_BITMASK = 32'h00000080;
localparam PMA_TX_BUF_PM_CR2_TX_RX_MCGB_LOCATION_FOR_PCIE_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_PM_CR2_TX_RX_MCGB_LOCATION_FOR_PCIE_ADDR1_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_OPTIMAL_VALUE = "true";

localparam PMA_TX_BUF_PM_CR2_TX_PATH_OPTIMAL_VALUE = "true";

localparam PMA_TX_BUF_PCIE_GEN_VALUE = "non_pcie";
localparam PMA_TX_BUF_PCIE_GEN_ADDR0_OFST = 281;
localparam PMA_TX_BUF_PCIE_GEN_ADDR0_FIELD_OFST = 0;
localparam PMA_TX_BUF_PCIE_GEN_ADDR0_FIELD_HIGH = 0;
localparam PMA_TX_BUF_PCIE_GEN_ADDR0_FIELD_SIZE = 1;
localparam PMA_TX_BUF_PCIE_GEN_ADDR0_FIELD_BITMASK = 32'h00000001;
localparam PMA_TX_BUF_PCIE_GEN_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_PCIE_GEN_ADDR0_FIELD_VALUE = 1'h0;
localparam PMA_TX_BUF_PCIE_GEN_ADDR1_OFST = 368;
localparam PMA_TX_BUF_PCIE_GEN_ADDR1_FIELD_OFST = 0;
localparam PMA_TX_BUF_PCIE_GEN_ADDR1_FIELD_HIGH = 0;
localparam PMA_TX_BUF_PCIE_GEN_ADDR1_FIELD_SIZE = 1;
localparam PMA_TX_BUF_PCIE_GEN_ADDR1_FIELD_BITMASK = 32'h00000001;
localparam PMA_TX_BUF_PCIE_GEN_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_PCIE_GEN_ADDR1_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_PM_CR2_TX_PATH_PMA_TX_DIVCLK_HZ_VALUE = "322265625";

localparam PMA_TX_BUF_PM_CR2_TX_PATH_POWER_MODE_VALUE = "mid_power";

localparam PMA_TX_BUF_PM_CR2_TX_PATH_POWER_RAIL_EHT_VALUE = 12'd1800;

localparam PMA_TX_BUF_POWER_RAIL_ER_VALUE = 12'd0;

localparam PMA_TX_BUF_PM_CR2_TX_PATH_POWER_RAIL_ET_VALUE = 12'd1030;

localparam PMA_TX_BUF_POWERMODE_AC_POST_TAP_VALUE = "tx_post_tap_ac_off";

localparam PMA_TX_BUF_POWERMODE_AC_PRE_TAP_VALUE = "tx_pre_tap_ac_off";

localparam PMA_TX_BUF_POWERMODE_AC_TX_VOD_NO_JITCOMP_VALUE = "tx_vod_no_jitcomp_ac_l0";

localparam PMA_TX_BUF_POWERMODE_AC_TX_VOD_W_JITCOMP_VALUE = "tx_vod_w_jitcomp_ac_l31";

localparam PMA_TX_BUF_POWERMODE_DC_POST_TAP_VALUE = "powerdown_tx_post_tap";

localparam PMA_TX_BUF_POWERMODE_DC_PRE_TAP_VALUE = "powerdown_tx_pre_tap";

localparam PMA_TX_BUF_POWERMODE_DC_TX_VOD_NO_JITCOMP_VALUE = "powerdown_tx_vod_no_jitcomp";

localparam PMA_TX_BUF_POWERMODE_DC_TX_VOD_W_JITCOMP_VALUE = "tx_vod_w_jitcomp_dc_l31";

localparam PMA_TX_BUF_PRE_EMP_SIGN_1ST_POST_TAP_VALUE = "fir_post_1t_neg";
localparam PMA_TX_BUF_PRE_EMP_SIGN_1ST_POST_TAP_ADDR_OFST = 261;
localparam PMA_TX_BUF_PRE_EMP_SIGN_1ST_POST_TAP_ADDR_FIELD_OFST = 6;
localparam PMA_TX_BUF_PRE_EMP_SIGN_1ST_POST_TAP_ADDR_FIELD_HIGH = 6;
localparam PMA_TX_BUF_PRE_EMP_SIGN_1ST_POST_TAP_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_PRE_EMP_SIGN_1ST_POST_TAP_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_TX_BUF_PRE_EMP_SIGN_1ST_POST_TAP_ADDR_FIELD_VALMASK = 32'h00000040;
localparam PMA_TX_BUF_PRE_EMP_SIGN_1ST_POST_TAP_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_TX_BUF_PRE_EMP_SIGN_PRE_TAP_1T_VALUE = "fir_pre_1t_neg";
localparam PMA_TX_BUF_PRE_EMP_SIGN_PRE_TAP_1T_ADDR_OFST = 263;
localparam PMA_TX_BUF_PRE_EMP_SIGN_PRE_TAP_1T_ADDR_FIELD_OFST = 5;
localparam PMA_TX_BUF_PRE_EMP_SIGN_PRE_TAP_1T_ADDR_FIELD_HIGH = 5;
localparam PMA_TX_BUF_PRE_EMP_SIGN_PRE_TAP_1T_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_PRE_EMP_SIGN_PRE_TAP_1T_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_TX_BUF_PRE_EMP_SIGN_PRE_TAP_1T_ADDR_FIELD_VALMASK = 32'h00000020;
localparam PMA_TX_BUF_PRE_EMP_SIGN_PRE_TAP_1T_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_TX_BUF_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP_VALUE = 5'd0;
localparam PMA_TX_BUF_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP_ADDR_OFST = 261;
localparam PMA_TX_BUF_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP_ADDR_FIELD_OFST = 0;
localparam PMA_TX_BUF_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP_ADDR_FIELD_HIGH = 4;
localparam PMA_TX_BUF_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP_ADDR_FIELD_SIZE = 5;
localparam PMA_TX_BUF_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam PMA_TX_BUF_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP_ADDR_FIELD_VALUE = 5'h0;

localparam PMA_TX_BUF_PRE_EMP_SWITCHING_CTRL_PRE_TAP_1T_VALUE = 5'd0;
localparam PMA_TX_BUF_PRE_EMP_SWITCHING_CTRL_PRE_TAP_1T_ADDR_OFST = 263;
localparam PMA_TX_BUF_PRE_EMP_SWITCHING_CTRL_PRE_TAP_1T_ADDR_FIELD_OFST = 0;
localparam PMA_TX_BUF_PRE_EMP_SWITCHING_CTRL_PRE_TAP_1T_ADDR_FIELD_HIGH = 4;
localparam PMA_TX_BUF_PRE_EMP_SWITCHING_CTRL_PRE_TAP_1T_ADDR_FIELD_SIZE = 5;
localparam PMA_TX_BUF_PRE_EMP_SWITCHING_CTRL_PRE_TAP_1T_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam PMA_TX_BUF_PRE_EMP_SWITCHING_CTRL_PRE_TAP_1T_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_PRE_EMP_SWITCHING_CTRL_PRE_TAP_1T_ADDR_FIELD_VALUE = 5'h0;

localparam PMA_TX_BUF_PROT_MODE_VALUE = "basic_tx";

localparam PMA_TX_BUF_PM_CR2_TX_PATH_PROT_MODE_VALUE = "basic_tx";

localparam PMA_TX_BUF_RES_CAL_LOCAL_VALUE = "non_local";
localparam PMA_TX_BUF_RES_CAL_LOCAL_ADDR_OFST = 269;
localparam PMA_TX_BUF_RES_CAL_LOCAL_ADDR_FIELD_OFST = 0;
localparam PMA_TX_BUF_RES_CAL_LOCAL_ADDR_FIELD_HIGH = 0;
localparam PMA_TX_BUF_RES_CAL_LOCAL_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_RES_CAL_LOCAL_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_TX_BUF_RES_CAL_LOCAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_RES_CAL_LOCAL_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_RX_DET_VALUE = "mode_0";
localparam PMA_TX_BUF_RX_DET_ADDR_OFST = 269;
localparam PMA_TX_BUF_RX_DET_ADDR_FIELD_OFST = 3;
localparam PMA_TX_BUF_RX_DET_ADDR_FIELD_HIGH = 6;
localparam PMA_TX_BUF_RX_DET_ADDR_FIELD_SIZE = 4;
localparam PMA_TX_BUF_RX_DET_ADDR_FIELD_BITMASK = 32'h00000078;
localparam PMA_TX_BUF_RX_DET_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_RX_DET_ADDR_FIELD_VALUE = 4'h0;

localparam PMA_TX_BUF_RX_DET_OUTPUT_SEL_VALUE = "rx_det_pcie_out";
localparam PMA_TX_BUF_RX_DET_OUTPUT_SEL_ADDR_OFST = 269;
localparam PMA_TX_BUF_RX_DET_OUTPUT_SEL_ADDR_FIELD_OFST = 1;
localparam PMA_TX_BUF_RX_DET_OUTPUT_SEL_ADDR_FIELD_HIGH = 1;
localparam PMA_TX_BUF_RX_DET_OUTPUT_SEL_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_RX_DET_OUTPUT_SEL_ADDR_FIELD_BITMASK = 32'h00000002;
localparam PMA_TX_BUF_RX_DET_OUTPUT_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_RX_DET_OUTPUT_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_RX_DET_PDB_VALUE = "rx_det_off";
localparam PMA_TX_BUF_RX_DET_PDB_ADDR_OFST = 269;
localparam PMA_TX_BUF_RX_DET_PDB_ADDR_FIELD_OFST = 2;
localparam PMA_TX_BUF_RX_DET_PDB_ADDR_FIELD_HIGH = 2;
localparam PMA_TX_BUF_RX_DET_PDB_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_RX_DET_PDB_ADDR_FIELD_BITMASK = 32'h00000004;
localparam PMA_TX_BUF_RX_DET_PDB_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_RX_DET_PDB_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_SENSE_AMP_OFFSET_CAL_CURR_N_VALUE = "sa_os_cal_in_0";

localparam PMA_TX_BUF_SENSE_AMP_OFFSET_CAL_CURR_P_VALUE = 5'd0;

localparam PMA_TX_BUF_SER_POWERDOWN_VALUE = "normal_ser_on";
localparam PMA_TX_BUF_SER_POWERDOWN_ADDR_OFST = 271;
localparam PMA_TX_BUF_SER_POWERDOWN_ADDR_FIELD_OFST = 0;
localparam PMA_TX_BUF_SER_POWERDOWN_ADDR_FIELD_HIGH = 0;
localparam PMA_TX_BUF_SER_POWERDOWN_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_SER_POWERDOWN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_TX_BUF_SER_POWERDOWN_ADDR_FIELD_VALMASK = 32'h00000001;
localparam PMA_TX_BUF_SER_POWERDOWN_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_TX_BUF_SLEW_RATE_CTRL_VALUE = "slew_r5";
localparam PMA_TX_BUF_SLEW_RATE_CTRL_ADDR_OFST = 268;
localparam PMA_TX_BUF_SLEW_RATE_CTRL_ADDR_FIELD_OFST = 0;
localparam PMA_TX_BUF_SLEW_RATE_CTRL_ADDR_FIELD_HIGH = 2;
localparam PMA_TX_BUF_SLEW_RATE_CTRL_ADDR_FIELD_SIZE = 3;
localparam PMA_TX_BUF_SLEW_RATE_CTRL_ADDR_FIELD_BITMASK = 32'h00000007;
localparam PMA_TX_BUF_SLEW_RATE_CTRL_ADDR_FIELD_VALMASK = 32'h00000005;
localparam PMA_TX_BUF_SLEW_RATE_CTRL_ADDR_FIELD_VALUE = 3'h5;

localparam PMA_TX_BUF_PM_CR2_TX_PATH_SPEED_GRADE_VALUE = "e2";

localparam PMA_TX_BUF_SUP_MODE_VALUE = "user_mode";

localparam PMA_TX_BUF_PM_CR2_TX_PATH_SUP_MODE_VALUE = "user_mode";

localparam PMA_TX_BUF_SWING_LEVEL_VALUE = "hv";

localparam PMA_TX_BUF_PM_CR2_TX_PATH_SWING_LEVEL_VALUE = "hv";

localparam PMA_TX_BUF_TERM_CODE_VALUE = "rterm_code0";

localparam PMA_TX_BUF_TERM_N_TUNE_VALUE = "rterm_n7";
localparam PMA_TX_BUF_TERM_N_TUNE_ADDR_OFST = 277;
localparam PMA_TX_BUF_TERM_N_TUNE_ADDR_FIELD_OFST = 4;
localparam PMA_TX_BUF_TERM_N_TUNE_ADDR_FIELD_HIGH = 7;
localparam PMA_TX_BUF_TERM_N_TUNE_ADDR_FIELD_SIZE = 4;
localparam PMA_TX_BUF_TERM_N_TUNE_ADDR_FIELD_BITMASK = 32'h000000F0;
localparam PMA_TX_BUF_TERM_N_TUNE_ADDR_FIELD_VALMASK = 32'h00000070;
localparam PMA_TX_BUF_TERM_N_TUNE_ADDR_FIELD_VALUE = 4'h7;

localparam PMA_TX_BUF_TERM_P_TUNE_VALUE = "rterm_p7";
localparam PMA_TX_BUF_TERM_P_TUNE_ADDR0_OFST = 262;
localparam PMA_TX_BUF_TERM_P_TUNE_ADDR0_FIELD_OFST = 6;
localparam PMA_TX_BUF_TERM_P_TUNE_ADDR0_FIELD_HIGH = 7;
localparam PMA_TX_BUF_TERM_P_TUNE_ADDR0_FIELD_SIZE = 2;
localparam PMA_TX_BUF_TERM_P_TUNE_ADDR0_FIELD_BITMASK = 32'h000000C0;
localparam PMA_TX_BUF_TERM_P_TUNE_ADDR0_FIELD_VALMASK = 32'h000000C0;
localparam PMA_TX_BUF_TERM_P_TUNE_ADDR0_FIELD_VALUE = 2'h3;
localparam PMA_TX_BUF_TERM_P_TUNE_ADDR1_OFST = 263;
localparam PMA_TX_BUF_TERM_P_TUNE_ADDR1_FIELD_OFST = 6;
localparam PMA_TX_BUF_TERM_P_TUNE_ADDR1_FIELD_HIGH = 7;
localparam PMA_TX_BUF_TERM_P_TUNE_ADDR1_FIELD_SIZE = 2;
localparam PMA_TX_BUF_TERM_P_TUNE_ADDR1_FIELD_BITMASK = 32'h000000C0;
localparam PMA_TX_BUF_TERM_P_TUNE_ADDR1_FIELD_VALMASK = 32'h00000040;
localparam PMA_TX_BUF_TERM_P_TUNE_ADDR1_FIELD_VALUE = 2'h1;

localparam PMA_TX_BUF_TERM_SEL_VALUE = "r_r1";
localparam PMA_TX_BUF_TERM_SEL_ADDR_OFST = 264;
localparam PMA_TX_BUF_TERM_SEL_ADDR_FIELD_OFST = 5;
localparam PMA_TX_BUF_TERM_SEL_ADDR_FIELD_HIGH = 5;
localparam PMA_TX_BUF_TERM_SEL_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_TERM_SEL_ADDR_FIELD_BITMASK = 32'h00000020;
localparam PMA_TX_BUF_TERM_SEL_ADDR_FIELD_VALMASK = 32'h00000020;
localparam PMA_TX_BUF_TERM_SEL_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_TX_BUF_PM_CR2_TX_PATH_TILE_TYPE_VALUE = "h";

localparam PMA_TX_BUF_TRI_DRIVER_VALUE = "tri_driver_disable";
localparam PMA_TX_BUF_TRI_DRIVER_ADDR_OFST = 288;
localparam PMA_TX_BUF_TRI_DRIVER_ADDR_FIELD_OFST = 7;
localparam PMA_TX_BUF_TRI_DRIVER_ADDR_FIELD_HIGH = 7;
localparam PMA_TX_BUF_TRI_DRIVER_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_TRI_DRIVER_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_TX_BUF_TRI_DRIVER_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_TRI_DRIVER_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_PM_CR2_TX_PATH_TX_PLL_CLK_HZ_VALUE = "5156250000";

localparam PMA_TX_BUF_TX_POWERDOWN_VALUE = "normal_tx_on";
localparam PMA_TX_BUF_TX_POWERDOWN_ADDR_OFST = 265;
localparam PMA_TX_BUF_TX_POWERDOWN_ADDR_FIELD_OFST = 6;
localparam PMA_TX_BUF_TX_POWERDOWN_ADDR_FIELD_HIGH = 6;
localparam PMA_TX_BUF_TX_POWERDOWN_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_TX_POWERDOWN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_TX_BUF_TX_POWERDOWN_ADDR_FIELD_VALMASK = 32'h00000040;
localparam PMA_TX_BUF_TX_POWERDOWN_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_TX_BUF_TX_RST_ENABLE_VALUE = "enable";
localparam PMA_TX_BUF_TX_RST_ENABLE_ADDR_OFST = 262;
localparam PMA_TX_BUF_TX_RST_ENABLE_ADDR_FIELD_OFST = 0;
localparam PMA_TX_BUF_TX_RST_ENABLE_ADDR_FIELD_HIGH = 0;
localparam PMA_TX_BUF_TX_RST_ENABLE_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_TX_RST_ENABLE_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_TX_BUF_TX_RST_ENABLE_ADDR_FIELD_VALMASK = 32'h00000001;
localparam PMA_TX_BUF_TX_RST_ENABLE_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_TX_BUF_USER_FIR_COEFF_CTRL_SEL_VALUE = "ram_ctl";
localparam PMA_TX_BUF_USER_FIR_COEFF_CTRL_SEL_ADDR_OFST = 261;
localparam PMA_TX_BUF_USER_FIR_COEFF_CTRL_SEL_ADDR_FIELD_OFST = 7;
localparam PMA_TX_BUF_USER_FIR_COEFF_CTRL_SEL_ADDR_FIELD_HIGH = 7;
localparam PMA_TX_BUF_USER_FIR_COEFF_CTRL_SEL_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_BUF_USER_FIR_COEFF_CTRL_SEL_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_TX_BUF_USER_FIR_COEFF_CTRL_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_USER_FIR_COEFF_CTRL_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_TX_BUF_VOD_OUTPUT_SWING_CTRL_VALUE = 5'd31;
localparam PMA_TX_BUF_VOD_OUTPUT_SWING_CTRL_ADDR_OFST = 265;
localparam PMA_TX_BUF_VOD_OUTPUT_SWING_CTRL_ADDR_FIELD_OFST = 0;
localparam PMA_TX_BUF_VOD_OUTPUT_SWING_CTRL_ADDR_FIELD_HIGH = 4;
localparam PMA_TX_BUF_VOD_OUTPUT_SWING_CTRL_ADDR_FIELD_SIZE = 5;
localparam PMA_TX_BUF_VOD_OUTPUT_SWING_CTRL_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam PMA_TX_BUF_VOD_OUTPUT_SWING_CTRL_ADDR_FIELD_VALMASK = 32'h0000001F;
localparam PMA_TX_BUF_VOD_OUTPUT_SWING_CTRL_ADDR_FIELD_VALUE = 5'h1F;

localparam PMA_TX_BUF_VREG_OUTPUT_VALUE = "vccdreg_nominal";
localparam PMA_TX_BUF_VREG_OUTPUT_ADDR0_OFST = 274;
localparam PMA_TX_BUF_VREG_OUTPUT_ADDR0_FIELD_OFST = 6;
localparam PMA_TX_BUF_VREG_OUTPUT_ADDR0_FIELD_HIGH = 7;
localparam PMA_TX_BUF_VREG_OUTPUT_ADDR0_FIELD_SIZE = 2;
localparam PMA_TX_BUF_VREG_OUTPUT_ADDR0_FIELD_BITMASK = 32'h000000C0;
localparam PMA_TX_BUF_VREG_OUTPUT_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_VREG_OUTPUT_ADDR0_FIELD_VALUE = 2'h0;
localparam PMA_TX_BUF_VREG_OUTPUT_ADDR1_OFST = 275;
localparam PMA_TX_BUF_VREG_OUTPUT_ADDR1_FIELD_OFST = 5;
localparam PMA_TX_BUF_VREG_OUTPUT_ADDR1_FIELD_HIGH = 7;
localparam PMA_TX_BUF_VREG_OUTPUT_ADDR1_FIELD_SIZE = 3;
localparam PMA_TX_BUF_VREG_OUTPUT_ADDR1_FIELD_BITMASK = 32'h000000E0;
localparam PMA_TX_BUF_VREG_OUTPUT_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_BUF_VREG_OUTPUT_ADDR1_FIELD_VALUE = 3'h0;

localparam PMA_TX_BUF_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam PMA_CGB_BITSLIP_ENABLE_VALUE = "disable_bitslip";
localparam PMA_CGB_BITSLIP_ENABLE_ADDR_OFST = 274;
localparam PMA_CGB_BITSLIP_ENABLE_ADDR_FIELD_OFST = 2;
localparam PMA_CGB_BITSLIP_ENABLE_ADDR_FIELD_HIGH = 2;
localparam PMA_CGB_BITSLIP_ENABLE_ADDR_FIELD_SIZE = 1;
localparam PMA_CGB_BITSLIP_ENABLE_ADDR_FIELD_BITMASK = 32'h00000004;
localparam PMA_CGB_BITSLIP_ENABLE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_CGB_BITSLIP_ENABLE_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_CGB_BTI_PROTECTED_VALUE = "false";

localparam PMA_CGB_CGB_POWER_DOWN_VALUE = "normal_cgb";
localparam PMA_CGB_CGB_POWER_DOWN_ADDR_OFST = 274;
localparam PMA_CGB_CGB_POWER_DOWN_ADDR_FIELD_OFST = 0;
localparam PMA_CGB_CGB_POWER_DOWN_ADDR_FIELD_HIGH = 0;
localparam PMA_CGB_CGB_POWER_DOWN_ADDR_FIELD_SIZE = 1;
localparam PMA_CGB_CGB_POWER_DOWN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_CGB_CGB_POWER_DOWN_ADDR_FIELD_VALMASK = 32'h00000001;
localparam PMA_CGB_CGB_POWER_DOWN_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_CGB_DATARATE_BPS_VALUE = "10312500000";

localparam PMA_CGB_INITIAL_SETTINGS_VALUE = "true";

localparam PMA_CGB_OBSERVE_CGB_CLOCKS_VALUE = "observe_nothing";
localparam PMA_CGB_OBSERVE_CGB_CLOCKS_ADDR_OFST = 274;
localparam PMA_CGB_OBSERVE_CGB_CLOCKS_ADDR_FIELD_OFST = 3;
localparam PMA_CGB_OBSERVE_CGB_CLOCKS_ADDR_FIELD_HIGH = 4;
localparam PMA_CGB_OBSERVE_CGB_CLOCKS_ADDR_FIELD_SIZE = 2;
localparam PMA_CGB_OBSERVE_CGB_CLOCKS_ADDR_FIELD_BITMASK = 32'h00000018;
localparam PMA_CGB_OBSERVE_CGB_CLOCKS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_CGB_OBSERVE_CGB_CLOCKS_ADDR_FIELD_VALUE = 2'h0;

localparam PMA_CGB_PCIE_GEN_VALUE = "non_pcie";
localparam PMA_CGB_PCIE_GEN_ADDR0_OFST = 281;
localparam PMA_CGB_PCIE_GEN_ADDR0_FIELD_OFST = 0;
localparam PMA_CGB_PCIE_GEN_ADDR0_FIELD_HIGH = 0;
localparam PMA_CGB_PCIE_GEN_ADDR0_FIELD_SIZE = 1;
localparam PMA_CGB_PCIE_GEN_ADDR0_FIELD_BITMASK = 32'h00000001;
localparam PMA_CGB_PCIE_GEN_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_CGB_PCIE_GEN_ADDR0_FIELD_VALUE = 1'h0;
localparam PMA_CGB_PCIE_GEN_ADDR1_OFST = 368;
localparam PMA_CGB_PCIE_GEN_ADDR1_FIELD_OFST = 0;
localparam PMA_CGB_PCIE_GEN_ADDR1_FIELD_HIGH = 0;
localparam PMA_CGB_PCIE_GEN_ADDR1_FIELD_SIZE = 1;
localparam PMA_CGB_PCIE_GEN_ADDR1_FIELD_BITMASK = 32'h00000001;
localparam PMA_CGB_PCIE_GEN_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam PMA_CGB_PCIE_GEN_ADDR1_FIELD_VALUE = 1'h0;

localparam PMA_CGB_PCIE_GEN3_BITWIDTH_VALUE = "pciegen3_wide";
localparam PMA_CGB_PCIE_GEN3_BITWIDTH_ADDR_OFST = 281;
localparam PMA_CGB_PCIE_GEN3_BITWIDTH_ADDR_FIELD_OFST = 1;
localparam PMA_CGB_PCIE_GEN3_BITWIDTH_ADDR_FIELD_HIGH = 1;
localparam PMA_CGB_PCIE_GEN3_BITWIDTH_ADDR_FIELD_SIZE = 1;
localparam PMA_CGB_PCIE_GEN3_BITWIDTH_ADDR_FIELD_BITMASK = 32'h00000002;
localparam PMA_CGB_PCIE_GEN3_BITWIDTH_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_CGB_PCIE_GEN3_BITWIDTH_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_CGB_POWER_RAIL_ER_VALUE = 12'd1030;

localparam PMA_CGB_PROT_MODE_VALUE = "basic_tx";

localparam PMA_CGB_SER_MODE_VALUE = "thirty_two_bit";
localparam PMA_CGB_SER_MODE_ADDR_OFST = 272;
localparam PMA_CGB_SER_MODE_ADDR_FIELD_OFST = 0;
localparam PMA_CGB_SER_MODE_ADDR_FIELD_HIGH = 2;
localparam PMA_CGB_SER_MODE_ADDR_FIELD_SIZE = 3;
localparam PMA_CGB_SER_MODE_ADDR_FIELD_BITMASK = 32'h00000007;
localparam PMA_CGB_SER_MODE_ADDR_FIELD_VALMASK = 32'h00000002;
localparam PMA_CGB_SER_MODE_ADDR_FIELD_VALUE = 3'h2;

localparam PMA_CGB_SER_POWERDOWN_VALUE = "normal_poweron_ser";
localparam PMA_CGB_SER_POWERDOWN_ADDR_OFST = 271;
localparam PMA_CGB_SER_POWERDOWN_ADDR_FIELD_OFST = 0;
localparam PMA_CGB_SER_POWERDOWN_ADDR_FIELD_HIGH = 0;
localparam PMA_CGB_SER_POWERDOWN_ADDR_FIELD_SIZE = 1;
localparam PMA_CGB_SER_POWERDOWN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_CGB_SER_POWERDOWN_ADDR_FIELD_VALMASK = 32'h00000001;
localparam PMA_CGB_SER_POWERDOWN_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_CGB_SUP_MODE_VALUE = "user_mode";

localparam PMA_CGB_VCCDREG_OUTPUT_VALUE = "vccdreg_nominal";
localparam PMA_CGB_VCCDREG_OUTPUT_ADDR_OFST = 275;
localparam PMA_CGB_VCCDREG_OUTPUT_ADDR_FIELD_OFST = 0;
localparam PMA_CGB_VCCDREG_OUTPUT_ADDR_FIELD_HIGH = 4;
localparam PMA_CGB_VCCDREG_OUTPUT_ADDR_FIELD_SIZE = 5;
localparam PMA_CGB_VCCDREG_OUTPUT_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam PMA_CGB_VCCDREG_OUTPUT_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_CGB_VCCDREG_OUTPUT_ADDR_FIELD_VALUE = 5'h0;

localparam PMA_CGB_VREG_SEL_REF_VALUE = "sel_vccer_4ref";
localparam PMA_CGB_VREG_SEL_REF_ADDR_OFST = 262;
localparam PMA_CGB_VREG_SEL_REF_ADDR_FIELD_OFST = 2;
localparam PMA_CGB_VREG_SEL_REF_ADDR_FIELD_HIGH = 2;
localparam PMA_CGB_VREG_SEL_REF_ADDR_FIELD_SIZE = 1;
localparam PMA_CGB_VREG_SEL_REF_ADDR_FIELD_BITMASK = 32'h00000004;
localparam PMA_CGB_VREG_SEL_REF_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_CGB_VREG_SEL_REF_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_CGB_X1_DIV_M_SEL_VALUE = "divbypass";
localparam PMA_CGB_X1_DIV_M_SEL_ADDR_OFST = 281;
localparam PMA_CGB_X1_DIV_M_SEL_ADDR_FIELD_OFST = 2;
localparam PMA_CGB_X1_DIV_M_SEL_ADDR_FIELD_HIGH = 3;
localparam PMA_CGB_X1_DIV_M_SEL_ADDR_FIELD_SIZE = 2;
localparam PMA_CGB_X1_DIV_M_SEL_ADDR_FIELD_BITMASK = 32'h0000000C;
localparam PMA_CGB_X1_DIV_M_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_CGB_X1_DIV_M_SEL_ADDR_FIELD_VALUE = 2'h0;

localparam PMA_CGB_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam PMA_CGB_INPUT_SELECT_X1_VALUE = "fpll_bot";

localparam PMA_CGB_INPUT_SELECT_GEN3_VALUE = "not_used";

localparam PMA_CGB_INPUT_SELECT_XN_VALUE = "not_used";

localparam PMA_TX_SER_BTI_PROTECTED_VALUE = "false";

localparam PMA_TX_SER_CONTROL_CLKS_DIVTX_AIBTX_VALUE = "no_dft_control_clkdivtx_clkaibtx";
localparam PMA_TX_SER_CONTROL_CLKS_DIVTX_AIBTX_ADDR_OFST = 271;
localparam PMA_TX_SER_CONTROL_CLKS_DIVTX_AIBTX_ADDR_FIELD_OFST = 1;
localparam PMA_TX_SER_CONTROL_CLKS_DIVTX_AIBTX_ADDR_FIELD_HIGH = 2;
localparam PMA_TX_SER_CONTROL_CLKS_DIVTX_AIBTX_ADDR_FIELD_SIZE = 2;
localparam PMA_TX_SER_CONTROL_CLKS_DIVTX_AIBTX_ADDR_FIELD_BITMASK = 32'h00000006;
localparam PMA_TX_SER_CONTROL_CLKS_DIVTX_AIBTX_ADDR_FIELD_VALMASK = 32'h00000002;
localparam PMA_TX_SER_CONTROL_CLKS_DIVTX_AIBTX_ADDR_FIELD_VALUE = 2'h1;

localparam PMA_TX_SER_DATARATE_BPS_VALUE = "0";

localparam PMA_TX_SER_DUTY_CYCLE_CORRECTION_MODE_CTRL_VALUE = "dcc_disable";
localparam PMA_TX_SER_DUTY_CYCLE_CORRECTION_MODE_CTRL_ADDR_OFST = 266;
localparam PMA_TX_SER_DUTY_CYCLE_CORRECTION_MODE_CTRL_ADDR_FIELD_OFST = 6;
localparam PMA_TX_SER_DUTY_CYCLE_CORRECTION_MODE_CTRL_ADDR_FIELD_HIGH = 7;
localparam PMA_TX_SER_DUTY_CYCLE_CORRECTION_MODE_CTRL_ADDR_FIELD_SIZE = 2;
localparam PMA_TX_SER_DUTY_CYCLE_CORRECTION_MODE_CTRL_ADDR_FIELD_BITMASK = 32'h000000C0;
localparam PMA_TX_SER_DUTY_CYCLE_CORRECTION_MODE_CTRL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_SER_DUTY_CYCLE_CORRECTION_MODE_CTRL_ADDR_FIELD_VALUE = 2'h0;

localparam PMA_TX_SER_INITIAL_SETTINGS_VALUE = "true";

localparam PMA_TX_SER_PCIE_GEN_VALUE = "non_pcie";
localparam PMA_TX_SER_PCIE_GEN_ADDR0_OFST = 281;
localparam PMA_TX_SER_PCIE_GEN_ADDR0_FIELD_OFST = 0;
localparam PMA_TX_SER_PCIE_GEN_ADDR0_FIELD_HIGH = 0;
localparam PMA_TX_SER_PCIE_GEN_ADDR0_FIELD_SIZE = 1;
localparam PMA_TX_SER_PCIE_GEN_ADDR0_FIELD_BITMASK = 32'h00000001;
localparam PMA_TX_SER_PCIE_GEN_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_SER_PCIE_GEN_ADDR0_FIELD_VALUE = 1'h0;
localparam PMA_TX_SER_PCIE_GEN_ADDR1_OFST = 368;
localparam PMA_TX_SER_PCIE_GEN_ADDR1_FIELD_OFST = 0;
localparam PMA_TX_SER_PCIE_GEN_ADDR1_FIELD_HIGH = 0;
localparam PMA_TX_SER_PCIE_GEN_ADDR1_FIELD_SIZE = 1;
localparam PMA_TX_SER_PCIE_GEN_ADDR1_FIELD_BITMASK = 32'h00000001;
localparam PMA_TX_SER_PCIE_GEN_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_SER_PCIE_GEN_ADDR1_FIELD_VALUE = 1'h0;

localparam PMA_TX_SER_POWER_RAIL_ER_VALUE = 12'd1030;

localparam PMA_TX_SER_POWERMODE_AC_SER_VALUE = "ac_clk_divtx_user_0_jitcomp1p0";

localparam PMA_TX_SER_POWERMODE_DC_SER_VALUE = "dc_clk_divtx_user_0_jitcomp1p0";

localparam PMA_TX_SER_PROT_MODE_VALUE = "basic_tx";

localparam PMA_TX_SER_SER_CLK_DIVTX_USER_SEL_VALUE = "divtx_user_off";
localparam PMA_TX_SER_SER_CLK_DIVTX_USER_SEL_ADDR_OFST = 272;
localparam PMA_TX_SER_SER_CLK_DIVTX_USER_SEL_ADDR_FIELD_OFST = 3;
localparam PMA_TX_SER_SER_CLK_DIVTX_USER_SEL_ADDR_FIELD_HIGH = 5;
localparam PMA_TX_SER_SER_CLK_DIVTX_USER_SEL_ADDR_FIELD_SIZE = 3;
localparam PMA_TX_SER_SER_CLK_DIVTX_USER_SEL_ADDR_FIELD_BITMASK = 32'h00000038;
localparam PMA_TX_SER_SER_CLK_DIVTX_USER_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_SER_SER_CLK_DIVTX_USER_SEL_ADDR_FIELD_VALUE = 3'h0;

localparam PMA_TX_SER_SER_AIBCK_ENABLE_VALUE = "enable";
localparam PMA_TX_SER_SER_AIBCK_ENABLE_ADDR_OFST = 348;
localparam PMA_TX_SER_SER_AIBCK_ENABLE_ADDR_FIELD_OFST = 6;
localparam PMA_TX_SER_SER_AIBCK_ENABLE_ADDR_FIELD_HIGH = 6;
localparam PMA_TX_SER_SER_AIBCK_ENABLE_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_SER_SER_AIBCK_ENABLE_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_TX_SER_SER_AIBCK_ENABLE_ADDR_FIELD_VALMASK = 32'h00000040;
localparam PMA_TX_SER_SER_AIBCK_ENABLE_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_TX_SER_SER_AIBCK_X1_OVERRIDE_VALUE = "normal";
localparam PMA_TX_SER_SER_AIBCK_X1_OVERRIDE_ADDR_OFST = 352;
localparam PMA_TX_SER_SER_AIBCK_X1_OVERRIDE_ADDR_FIELD_OFST = 6;
localparam PMA_TX_SER_SER_AIBCK_X1_OVERRIDE_ADDR_FIELD_HIGH = 6;
localparam PMA_TX_SER_SER_AIBCK_X1_OVERRIDE_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_SER_SER_AIBCK_X1_OVERRIDE_ADDR_FIELD_BITMASK = 32'h00000040;
localparam PMA_TX_SER_SER_AIBCK_X1_OVERRIDE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_SER_SER_AIBCK_X1_OVERRIDE_ADDR_FIELD_VALUE = 1'h0;

localparam PMA_TX_SER_SER_CLK_MON_VALUE = "disable_clk_mon";
localparam PMA_TX_SER_SER_CLK_MON_ADDR_OFST = 267;
localparam PMA_TX_SER_SER_CLK_MON_ADDR_FIELD_OFST = 6;
localparam PMA_TX_SER_SER_CLK_MON_ADDR_FIELD_HIGH = 7;
localparam PMA_TX_SER_SER_CLK_MON_ADDR_FIELD_SIZE = 2;
localparam PMA_TX_SER_SER_CLK_MON_ADDR_FIELD_BITMASK = 32'h000000C0;
localparam PMA_TX_SER_SER_CLK_MON_ADDR_FIELD_VALMASK = 32'h00000000;
localparam PMA_TX_SER_SER_CLK_MON_ADDR_FIELD_VALUE = 2'h0;

localparam PMA_TX_SER_SER_DFTPPM_CLKSELECT_VALUE = "aib_dftppm";
localparam PMA_TX_SER_SER_DFTPPM_CLKSELECT_ADDR_OFST = 346;
localparam PMA_TX_SER_SER_DFTPPM_CLKSELECT_ADDR_FIELD_OFST = 7;
localparam PMA_TX_SER_SER_DFTPPM_CLKSELECT_ADDR_FIELD_HIGH = 7;
localparam PMA_TX_SER_SER_DFTPPM_CLKSELECT_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_SER_SER_DFTPPM_CLKSELECT_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_TX_SER_SER_DFTPPM_CLKSELECT_ADDR_FIELD_VALMASK = 32'h00000080;
localparam PMA_TX_SER_SER_DFTPPM_CLKSELECT_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_TX_SER_SER_IN_JITCOMP_VALUE = "jitcomp_on";

localparam PMA_TX_SER_SER_POWERDOWN_VALUE = "normal_poweron_ser";
localparam PMA_TX_SER_SER_POWERDOWN_ADDR_OFST = 271;
localparam PMA_TX_SER_SER_POWERDOWN_ADDR_FIELD_OFST = 0;
localparam PMA_TX_SER_SER_POWERDOWN_ADDR_FIELD_HIGH = 0;
localparam PMA_TX_SER_SER_POWERDOWN_ADDR_FIELD_SIZE = 1;
localparam PMA_TX_SER_SER_POWERDOWN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam PMA_TX_SER_SER_POWERDOWN_ADDR_FIELD_VALMASK = 32'h00000001;
localparam PMA_TX_SER_SER_POWERDOWN_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_TX_SER_SUP_MODE_VALUE = "user_mode";

localparam PMA_TX_SER_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam PMA_RESET_SEQUENCER_RX_PATH_RSTN_OVERRIDEB_VALUE = "use_sequencer";

localparam PMA_RESET_SEQUENCER_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam PMA_TX_SEQUENCER_TX_PATH_RSTN_OVERRIDEB_VALUE = "use_sequencer";

localparam PMA_TX_SEQUENCER_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam PMA_TXPATH_CHNSEQUENCER_PCIE_GEN_VALUE = "non_pcie";

localparam PMA_TXPATH_CHNSEQUENCER_PROT_MODE_VALUE = "basic_tx";

localparam PMA_TXPATH_CHNSEQUENCER_SUP_MODE_VALUE = "sup_off";

localparam PMA_TXPATH_CHNSEQUENCER_TXPATH_CHNSEQ_ENABLE_VALUE = "disable";

localparam PMA_TXPATH_CHNSEQUENCER_TXPATH_CHNSEQ_STAGE_SELECT_VALUE = 4'd0;

localparam PMA_TXPATH_CHNSEQUENCER_TXPATH_CHNSEQ_WAKEUP_BYPASS_VALUE = "bypass_off";

localparam PMA_TXPATH_CHNSEQUENCER_SILICON_REV_VALUE = "14nm5bcr2ea";

localparam HSSI_FIFO_RX_PCS_DOUBLE_READ_MODE_VALUE = "double_read_dis";
localparam HSSI_FIFO_RX_PCS_DOUBLE_READ_MODE_ADDR_OFST = 199;
localparam HSSI_FIFO_RX_PCS_DOUBLE_READ_MODE_ADDR_FIELD_OFST = 1;
localparam HSSI_FIFO_RX_PCS_DOUBLE_READ_MODE_ADDR_FIELD_HIGH = 1;
localparam HSSI_FIFO_RX_PCS_DOUBLE_READ_MODE_ADDR_FIELD_SIZE = 1;
localparam HSSI_FIFO_RX_PCS_DOUBLE_READ_MODE_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_FIFO_RX_PCS_DOUBLE_READ_MODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_FIFO_RX_PCS_DOUBLE_READ_MODE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_FIFO_RX_PCS_PROT_MODE_VALUE = "teng_mode";
localparam HSSI_FIFO_RX_PCS_PROT_MODE_ADDR_OFST = 199;
localparam HSSI_FIFO_RX_PCS_PROT_MODE_ADDR_FIELD_OFST = 0;
localparam HSSI_FIFO_RX_PCS_PROT_MODE_ADDR_FIELD_HIGH = 0;
localparam HSSI_FIFO_RX_PCS_PROT_MODE_ADDR_FIELD_SIZE = 1;
localparam HSSI_FIFO_RX_PCS_PROT_MODE_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_FIFO_RX_PCS_PROT_MODE_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_FIFO_RX_PCS_PROT_MODE_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_FIFO_RX_PCS_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam HSSI_FIFO_TX_PCS_DOUBLE_WRITE_MODE_VALUE = "double_write_dis";
localparam HSSI_FIFO_TX_PCS_DOUBLE_WRITE_MODE_ADDR_OFST = 197;
localparam HSSI_FIFO_TX_PCS_DOUBLE_WRITE_MODE_ADDR_FIELD_OFST = 1;
localparam HSSI_FIFO_TX_PCS_DOUBLE_WRITE_MODE_ADDR_FIELD_HIGH = 1;
localparam HSSI_FIFO_TX_PCS_DOUBLE_WRITE_MODE_ADDR_FIELD_SIZE = 1;
localparam HSSI_FIFO_TX_PCS_DOUBLE_WRITE_MODE_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_FIFO_TX_PCS_DOUBLE_WRITE_MODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_FIFO_TX_PCS_DOUBLE_WRITE_MODE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_FIFO_TX_PCS_PROT_MODE_VALUE = "teng_mode";
localparam HSSI_FIFO_TX_PCS_PROT_MODE_ADDR_OFST = 197;
localparam HSSI_FIFO_TX_PCS_PROT_MODE_ADDR_FIELD_OFST = 0;
localparam HSSI_FIFO_TX_PCS_PROT_MODE_ADDR_FIELD_HIGH = 0;
localparam HSSI_FIFO_TX_PCS_PROT_MODE_ADDR_FIELD_SIZE = 1;
localparam HSSI_FIFO_TX_PCS_PROT_MODE_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_FIFO_TX_PCS_PROT_MODE_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_FIFO_TX_PCS_PROT_MODE_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_FIFO_TX_PCS_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam HSSI_KRFEC_RX_PCS_BLKSYNC_COR_EN_VALUE = "detect";
localparam HSSI_KRFEC_RX_PCS_BLKSYNC_COR_EN_ADDR_OFST = 192;
localparam HSSI_KRFEC_RX_PCS_BLKSYNC_COR_EN_ADDR_FIELD_OFST = 4;
localparam HSSI_KRFEC_RX_PCS_BLKSYNC_COR_EN_ADDR_FIELD_HIGH = 4;
localparam HSSI_KRFEC_RX_PCS_BLKSYNC_COR_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_RX_PCS_BLKSYNC_COR_EN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_KRFEC_RX_PCS_BLKSYNC_COR_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_KRFEC_RX_PCS_BLKSYNC_COR_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_KRFEC_RX_PCS_BYPASS_GB_VALUE = "bypass_dis";
localparam HSSI_KRFEC_RX_PCS_BYPASS_GB_ADDR_OFST = 194;
localparam HSSI_KRFEC_RX_PCS_BYPASS_GB_ADDR_FIELD_OFST = 4;
localparam HSSI_KRFEC_RX_PCS_BYPASS_GB_ADDR_FIELD_HIGH = 4;
localparam HSSI_KRFEC_RX_PCS_BYPASS_GB_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_RX_PCS_BYPASS_GB_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_KRFEC_RX_PCS_BYPASS_GB_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_KRFEC_RX_PCS_BYPASS_GB_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_KRFEC_RX_PCS_CLR_CTRL_VALUE = "both_enabled";
localparam HSSI_KRFEC_RX_PCS_CLR_CTRL_ADDR_OFST = 192;
localparam HSSI_KRFEC_RX_PCS_CLR_CTRL_ADDR_FIELD_OFST = 0;
localparam HSSI_KRFEC_RX_PCS_CLR_CTRL_ADDR_FIELD_HIGH = 1;
localparam HSSI_KRFEC_RX_PCS_CLR_CTRL_ADDR_FIELD_SIZE = 2;
localparam HSSI_KRFEC_RX_PCS_CLR_CTRL_ADDR_FIELD_BITMASK = 32'h00000003;
localparam HSSI_KRFEC_RX_PCS_CLR_CTRL_ADDR_FIELD_VALMASK = 32'h00000003;
localparam HSSI_KRFEC_RX_PCS_CLR_CTRL_ADDR_FIELD_VALUE = 2'h3;

localparam HSSI_KRFEC_RX_PCS_CTRL_BIT_REVERSE_VALUE = "ctrl_bit_reverse_en";
localparam HSSI_KRFEC_RX_PCS_CTRL_BIT_REVERSE_ADDR_OFST = 192;
localparam HSSI_KRFEC_RX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_OFST = 6;
localparam HSSI_KRFEC_RX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_HIGH = 6;
localparam HSSI_KRFEC_RX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_RX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_KRFEC_RX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_KRFEC_RX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_KRFEC_RX_PCS_DATA_BIT_REVERSE_VALUE = "data_bit_reverse_dis";
localparam HSSI_KRFEC_RX_PCS_DATA_BIT_REVERSE_ADDR_OFST = 192;
localparam HSSI_KRFEC_RX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_OFST = 5;
localparam HSSI_KRFEC_RX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_HIGH = 5;
localparam HSSI_KRFEC_RX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_RX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_KRFEC_RX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_KRFEC_RX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_KRFEC_RX_PCS_DV_START_VALUE = "with_blklock";
localparam HSSI_KRFEC_RX_PCS_DV_START_ADDR_OFST = 192;
localparam HSSI_KRFEC_RX_PCS_DV_START_ADDR_FIELD_OFST = 2;
localparam HSSI_KRFEC_RX_PCS_DV_START_ADDR_FIELD_HIGH = 2;
localparam HSSI_KRFEC_RX_PCS_DV_START_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_RX_PCS_DV_START_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_KRFEC_RX_PCS_DV_START_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_KRFEC_RX_PCS_DV_START_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_KRFEC_RX_PCS_ERR_MARK_TYPE_VALUE = "err_mark_10g";
localparam HSSI_KRFEC_RX_PCS_ERR_MARK_TYPE_ADDR_OFST = 194;
localparam HSSI_KRFEC_RX_PCS_ERR_MARK_TYPE_ADDR_FIELD_OFST = 6;
localparam HSSI_KRFEC_RX_PCS_ERR_MARK_TYPE_ADDR_FIELD_HIGH = 6;
localparam HSSI_KRFEC_RX_PCS_ERR_MARK_TYPE_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_RX_PCS_ERR_MARK_TYPE_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_KRFEC_RX_PCS_ERR_MARK_TYPE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_KRFEC_RX_PCS_ERR_MARK_TYPE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_KRFEC_RX_PCS_ERROR_MARKING_EN_VALUE = "err_mark_dis";
localparam HSSI_KRFEC_RX_PCS_ERROR_MARKING_EN_ADDR_OFST = 194;
localparam HSSI_KRFEC_RX_PCS_ERROR_MARKING_EN_ADDR_FIELD_OFST = 5;
localparam HSSI_KRFEC_RX_PCS_ERROR_MARKING_EN_ADDR_FIELD_HIGH = 5;
localparam HSSI_KRFEC_RX_PCS_ERROR_MARKING_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_RX_PCS_ERROR_MARKING_EN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_KRFEC_RX_PCS_ERROR_MARKING_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_KRFEC_RX_PCS_ERROR_MARKING_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_KRFEC_RX_PCS_LOW_LATENCY_EN_VALUE = "disable";

localparam HSSI_KRFEC_RX_PCS_LPBK_MODE_VALUE = "lpbk_dis";

localparam HSSI_KRFEC_RX_PCS_PARITY_INVALID_ENUM_VALUE = 8'd8;
localparam HSSI_KRFEC_RX_PCS_PARITY_INVALID_ENUM_ADDR_OFST = 193;
localparam HSSI_KRFEC_RX_PCS_PARITY_INVALID_ENUM_ADDR_FIELD_OFST = 0;
localparam HSSI_KRFEC_RX_PCS_PARITY_INVALID_ENUM_ADDR_FIELD_HIGH = 7;
localparam HSSI_KRFEC_RX_PCS_PARITY_INVALID_ENUM_ADDR_FIELD_SIZE = 8;
localparam HSSI_KRFEC_RX_PCS_PARITY_INVALID_ENUM_ADDR_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_KRFEC_RX_PCS_PARITY_INVALID_ENUM_ADDR_FIELD_VALMASK = 32'h00000008;
localparam HSSI_KRFEC_RX_PCS_PARITY_INVALID_ENUM_ADDR_FIELD_VALUE = 8'h8;

localparam HSSI_KRFEC_RX_PCS_PARITY_VALID_NUM_VALUE = 4'd4;
localparam HSSI_KRFEC_RX_PCS_PARITY_VALID_NUM_ADDR_OFST = 194;
localparam HSSI_KRFEC_RX_PCS_PARITY_VALID_NUM_ADDR_FIELD_OFST = 0;
localparam HSSI_KRFEC_RX_PCS_PARITY_VALID_NUM_ADDR_FIELD_HIGH = 3;
localparam HSSI_KRFEC_RX_PCS_PARITY_VALID_NUM_ADDR_FIELD_SIZE = 4;
localparam HSSI_KRFEC_RX_PCS_PARITY_VALID_NUM_ADDR_FIELD_BITMASK = 32'h0000000F;
localparam HSSI_KRFEC_RX_PCS_PARITY_VALID_NUM_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_KRFEC_RX_PCS_PARITY_VALID_NUM_ADDR_FIELD_VALUE = 4'h4;

localparam HSSI_KRFEC_RX_PCS_PIPELN_BLKSYNC_VALUE = "enable";
localparam HSSI_KRFEC_RX_PCS_PIPELN_BLKSYNC_ADDR_OFST = 191;
localparam HSSI_KRFEC_RX_PCS_PIPELN_BLKSYNC_ADDR_FIELD_OFST = 5;
localparam HSSI_KRFEC_RX_PCS_PIPELN_BLKSYNC_ADDR_FIELD_HIGH = 5;
localparam HSSI_KRFEC_RX_PCS_PIPELN_BLKSYNC_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_RX_PCS_PIPELN_BLKSYNC_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_KRFEC_RX_PCS_PIPELN_BLKSYNC_ADDR_FIELD_VALMASK = 32'h00000020;
localparam HSSI_KRFEC_RX_PCS_PIPELN_BLKSYNC_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_KRFEC_RX_PCS_PIPELN_DESCRM_VALUE = "disable";
localparam HSSI_KRFEC_RX_PCS_PIPELN_DESCRM_ADDR_OFST = 191;
localparam HSSI_KRFEC_RX_PCS_PIPELN_DESCRM_ADDR_FIELD_OFST = 6;
localparam HSSI_KRFEC_RX_PCS_PIPELN_DESCRM_ADDR_FIELD_HIGH = 6;
localparam HSSI_KRFEC_RX_PCS_PIPELN_DESCRM_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_RX_PCS_PIPELN_DESCRM_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_KRFEC_RX_PCS_PIPELN_DESCRM_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_KRFEC_RX_PCS_PIPELN_DESCRM_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRCORRECT_VALUE = "disable";
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRCORRECT_ADDR_OFST = 195;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRCORRECT_ADDR_FIELD_OFST = 5;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRCORRECT_ADDR_FIELD_HIGH = 5;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRCORRECT_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRCORRECT_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRCORRECT_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRCORRECT_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_IND_VALUE = "enable";
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_IND_ADDR_OFST = 195;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_IND_ADDR_FIELD_OFST = 2;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_IND_ADDR_FIELD_HIGH = 2;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_IND_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_IND_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_IND_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_IND_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_LFSR_VALUE = "disable";
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_LFSR_ADDR_OFST = 195;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_LFSR_ADDR_FIELD_OFST = 1;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_LFSR_ADDR_FIELD_HIGH = 1;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_LFSR_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_LFSR_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_LFSR_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_LFSR_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_LOC_VALUE = "disable";
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_LOC_ADDR_OFST = 195;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_LOC_ADDR_FIELD_OFST = 3;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_LOC_ADDR_FIELD_HIGH = 3;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_LOC_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_LOC_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_LOC_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_LOC_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_PAT_VALUE = "disable";
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_PAT_ADDR_OFST = 195;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_PAT_ADDR_FIELD_OFST = 4;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_PAT_ADDR_FIELD_HIGH = 4;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_PAT_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_PAT_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_PAT_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_KRFEC_RX_PCS_PIPELN_ERRTRAP_PAT_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_KRFEC_RX_PCS_PIPELN_GEARBOX_VALUE = "enable";
localparam HSSI_KRFEC_RX_PCS_PIPELN_GEARBOX_ADDR_OFST = 195;
localparam HSSI_KRFEC_RX_PCS_PIPELN_GEARBOX_ADDR_FIELD_OFST = 6;
localparam HSSI_KRFEC_RX_PCS_PIPELN_GEARBOX_ADDR_FIELD_HIGH = 6;
localparam HSSI_KRFEC_RX_PCS_PIPELN_GEARBOX_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_RX_PCS_PIPELN_GEARBOX_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_KRFEC_RX_PCS_PIPELN_GEARBOX_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_KRFEC_RX_PCS_PIPELN_GEARBOX_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_KRFEC_RX_PCS_PIPELN_SYNDRM_VALUE = "enable";
localparam HSSI_KRFEC_RX_PCS_PIPELN_SYNDRM_ADDR_OFST = 195;
localparam HSSI_KRFEC_RX_PCS_PIPELN_SYNDRM_ADDR_FIELD_OFST = 0;
localparam HSSI_KRFEC_RX_PCS_PIPELN_SYNDRM_ADDR_FIELD_HIGH = 0;
localparam HSSI_KRFEC_RX_PCS_PIPELN_SYNDRM_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_RX_PCS_PIPELN_SYNDRM_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_KRFEC_RX_PCS_PIPELN_SYNDRM_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_KRFEC_RX_PCS_PIPELN_SYNDRM_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_KRFEC_RX_PCS_PIPELN_TRANS_DEC_VALUE = "disable";
localparam HSSI_KRFEC_RX_PCS_PIPELN_TRANS_DEC_ADDR_OFST = 195;
localparam HSSI_KRFEC_RX_PCS_PIPELN_TRANS_DEC_ADDR_FIELD_OFST = 7;
localparam HSSI_KRFEC_RX_PCS_PIPELN_TRANS_DEC_ADDR_FIELD_HIGH = 7;
localparam HSSI_KRFEC_RX_PCS_PIPELN_TRANS_DEC_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_RX_PCS_PIPELN_TRANS_DEC_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_KRFEC_RX_PCS_PIPELN_TRANS_DEC_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_KRFEC_RX_PCS_PIPELN_TRANS_DEC_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_KRFEC_RX_PCS_PROT_MODE_VALUE = "disable_mode";

localparam HSSI_KRFEC_RX_PCS_RECEIVE_ORDER_VALUE = "receive_lsb";
localparam HSSI_KRFEC_RX_PCS_RECEIVE_ORDER_ADDR_OFST = 192;
localparam HSSI_KRFEC_RX_PCS_RECEIVE_ORDER_ADDR_FIELD_OFST = 7;
localparam HSSI_KRFEC_RX_PCS_RECEIVE_ORDER_ADDR_FIELD_HIGH = 7;
localparam HSSI_KRFEC_RX_PCS_RECEIVE_ORDER_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_RX_PCS_RECEIVE_ORDER_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_KRFEC_RX_PCS_RECEIVE_ORDER_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_KRFEC_RX_PCS_RECEIVE_ORDER_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_KRFEC_RX_PCS_RX_TESTBUS_SEL_VALUE = "overall";
localparam HSSI_KRFEC_RX_PCS_RX_TESTBUS_SEL_ADDR_OFST = 191;
localparam HSSI_KRFEC_RX_PCS_RX_TESTBUS_SEL_ADDR_FIELD_OFST = 0;
localparam HSSI_KRFEC_RX_PCS_RX_TESTBUS_SEL_ADDR_FIELD_HIGH = 4;
localparam HSSI_KRFEC_RX_PCS_RX_TESTBUS_SEL_ADDR_FIELD_SIZE = 5;
localparam HSSI_KRFEC_RX_PCS_RX_TESTBUS_SEL_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam HSSI_KRFEC_RX_PCS_RX_TESTBUS_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_KRFEC_RX_PCS_RX_TESTBUS_SEL_ADDR_FIELD_VALUE = 5'h0;

localparam HSSI_KRFEC_RX_PCS_SIGNAL_OK_EN_VALUE = "sig_ok_en";
localparam HSSI_KRFEC_RX_PCS_SIGNAL_OK_EN_ADDR_OFST = 194;
localparam HSSI_KRFEC_RX_PCS_SIGNAL_OK_EN_ADDR_FIELD_OFST = 7;
localparam HSSI_KRFEC_RX_PCS_SIGNAL_OK_EN_ADDR_FIELD_HIGH = 7;
localparam HSSI_KRFEC_RX_PCS_SIGNAL_OK_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_RX_PCS_SIGNAL_OK_EN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_KRFEC_RX_PCS_SIGNAL_OK_EN_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_KRFEC_RX_PCS_SIGNAL_OK_EN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_KRFEC_RX_PCS_SUP_MODE_VALUE = "user_mode";

localparam HSSI_KRFEC_RX_PCS_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam HSSI_KRFEC_TX_PCS_BURST_ERR_VALUE = "burst_err_dis";
localparam HSSI_KRFEC_TX_PCS_BURST_ERR_ADDR_OFST = 189;
localparam HSSI_KRFEC_TX_PCS_BURST_ERR_ADDR_FIELD_OFST = 1;
localparam HSSI_KRFEC_TX_PCS_BURST_ERR_ADDR_FIELD_HIGH = 1;
localparam HSSI_KRFEC_TX_PCS_BURST_ERR_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_TX_PCS_BURST_ERR_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_KRFEC_TX_PCS_BURST_ERR_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_KRFEC_TX_PCS_BURST_ERR_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_KRFEC_TX_PCS_BURST_ERR_LEN_VALUE = "burst_err_len1";
localparam HSSI_KRFEC_TX_PCS_BURST_ERR_LEN_ADDR_OFST = 189;
localparam HSSI_KRFEC_TX_PCS_BURST_ERR_LEN_ADDR_FIELD_OFST = 4;
localparam HSSI_KRFEC_TX_PCS_BURST_ERR_LEN_ADDR_FIELD_HIGH = 7;
localparam HSSI_KRFEC_TX_PCS_BURST_ERR_LEN_ADDR_FIELD_SIZE = 4;
localparam HSSI_KRFEC_TX_PCS_BURST_ERR_LEN_ADDR_FIELD_BITMASK = 32'h000000F0;
localparam HSSI_KRFEC_TX_PCS_BURST_ERR_LEN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_KRFEC_TX_PCS_BURST_ERR_LEN_ADDR_FIELD_VALUE = 4'h0;

localparam HSSI_KRFEC_TX_PCS_CTRL_BIT_REVERSE_VALUE = "ctrl_bit_reverse_en";
localparam HSSI_KRFEC_TX_PCS_CTRL_BIT_REVERSE_ADDR_OFST = 188;
localparam HSSI_KRFEC_TX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_OFST = 4;
localparam HSSI_KRFEC_TX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_HIGH = 4;
localparam HSSI_KRFEC_TX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_TX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_KRFEC_TX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_VALMASK = 32'h00000010;
localparam HSSI_KRFEC_TX_PCS_CTRL_BIT_REVERSE_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_KRFEC_TX_PCS_DATA_BIT_REVERSE_VALUE = "data_bit_reverse_dis";
localparam HSSI_KRFEC_TX_PCS_DATA_BIT_REVERSE_ADDR_OFST = 188;
localparam HSSI_KRFEC_TX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_OFST = 3;
localparam HSSI_KRFEC_TX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_HIGH = 3;
localparam HSSI_KRFEC_TX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_TX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_KRFEC_TX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_KRFEC_TX_PCS_DATA_BIT_REVERSE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_KRFEC_TX_PCS_ENC_FRAME_QUERY_VALUE = "enc_query_dis";
localparam HSSI_KRFEC_TX_PCS_ENC_FRAME_QUERY_ADDR_OFST = 188;
localparam HSSI_KRFEC_TX_PCS_ENC_FRAME_QUERY_ADDR_FIELD_OFST = 7;
localparam HSSI_KRFEC_TX_PCS_ENC_FRAME_QUERY_ADDR_FIELD_HIGH = 7;
localparam HSSI_KRFEC_TX_PCS_ENC_FRAME_QUERY_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_TX_PCS_ENC_FRAME_QUERY_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_KRFEC_TX_PCS_ENC_FRAME_QUERY_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_KRFEC_TX_PCS_ENC_FRAME_QUERY_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_KRFEC_TX_PCS_LOW_LATENCY_EN_VALUE = "disable";

localparam HSSI_KRFEC_TX_PCS_PIPELN_ENCODER_VALUE = "enable";
localparam HSSI_KRFEC_TX_PCS_PIPELN_ENCODER_ADDR_OFST = 189;
localparam HSSI_KRFEC_TX_PCS_PIPELN_ENCODER_ADDR_FIELD_OFST = 3;
localparam HSSI_KRFEC_TX_PCS_PIPELN_ENCODER_ADDR_FIELD_HIGH = 3;
localparam HSSI_KRFEC_TX_PCS_PIPELN_ENCODER_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_TX_PCS_PIPELN_ENCODER_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_KRFEC_TX_PCS_PIPELN_ENCODER_ADDR_FIELD_VALMASK = 32'h00000008;
localparam HSSI_KRFEC_TX_PCS_PIPELN_ENCODER_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_KRFEC_TX_PCS_PIPELN_SCRAMBLER_VALUE = "enable";
localparam HSSI_KRFEC_TX_PCS_PIPELN_SCRAMBLER_ADDR_OFST = 189;
localparam HSSI_KRFEC_TX_PCS_PIPELN_SCRAMBLER_ADDR_FIELD_OFST = 2;
localparam HSSI_KRFEC_TX_PCS_PIPELN_SCRAMBLER_ADDR_FIELD_HIGH = 2;
localparam HSSI_KRFEC_TX_PCS_PIPELN_SCRAMBLER_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_TX_PCS_PIPELN_SCRAMBLER_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_KRFEC_TX_PCS_PIPELN_SCRAMBLER_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_KRFEC_TX_PCS_PIPELN_SCRAMBLER_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_KRFEC_TX_PCS_PROT_MODE_VALUE = "disable_mode";

localparam HSSI_KRFEC_TX_PCS_SUP_MODE_VALUE = "user_mode";

localparam HSSI_KRFEC_TX_PCS_TRANSCODE_ERR_VALUE = "trans_err_dis";
localparam HSSI_KRFEC_TX_PCS_TRANSCODE_ERR_ADDR_OFST = 189;
localparam HSSI_KRFEC_TX_PCS_TRANSCODE_ERR_ADDR_FIELD_OFST = 0;
localparam HSSI_KRFEC_TX_PCS_TRANSCODE_ERR_ADDR_FIELD_HIGH = 0;
localparam HSSI_KRFEC_TX_PCS_TRANSCODE_ERR_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_TX_PCS_TRANSCODE_ERR_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_KRFEC_TX_PCS_TRANSCODE_ERR_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_KRFEC_TX_PCS_TRANSCODE_ERR_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_KRFEC_TX_PCS_TRANSMIT_ORDER_VALUE = "transmit_lsb";
localparam HSSI_KRFEC_TX_PCS_TRANSMIT_ORDER_ADDR_OFST = 188;
localparam HSSI_KRFEC_TX_PCS_TRANSMIT_ORDER_ADDR_FIELD_OFST = 6;
localparam HSSI_KRFEC_TX_PCS_TRANSMIT_ORDER_ADDR_FIELD_HIGH = 6;
localparam HSSI_KRFEC_TX_PCS_TRANSMIT_ORDER_ADDR_FIELD_SIZE = 1;
localparam HSSI_KRFEC_TX_PCS_TRANSMIT_ORDER_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_KRFEC_TX_PCS_TRANSMIT_ORDER_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_KRFEC_TX_PCS_TRANSMIT_ORDER_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_KRFEC_TX_PCS_TX_TESTBUS_SEL_VALUE = "overall";
localparam HSSI_KRFEC_TX_PCS_TX_TESTBUS_SEL_ADDR_OFST = 188;
localparam HSSI_KRFEC_TX_PCS_TX_TESTBUS_SEL_ADDR_FIELD_OFST = 0;
localparam HSSI_KRFEC_TX_PCS_TX_TESTBUS_SEL_ADDR_FIELD_HIGH = 2;
localparam HSSI_KRFEC_TX_PCS_TX_TESTBUS_SEL_ADDR_FIELD_SIZE = 3;
localparam HSSI_KRFEC_TX_PCS_TX_TESTBUS_SEL_ADDR_FIELD_BITMASK = 32'h00000007;
localparam HSSI_KRFEC_TX_PCS_TX_TESTBUS_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_KRFEC_TX_PCS_TX_TESTBUS_SEL_ADDR_FIELD_VALUE = 3'h0;

localparam HSSI_KRFEC_TX_PCS_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam HSSI_PLDADAPT_RX_AIB_CLK1_SEL_VALUE = "aib_clk1_pld_pcs_rx_clk_out";
localparam HSSI_PLDADAPT_RX_AIB_CLK1_SEL_ADDR_OFST = 802;
localparam HSSI_PLDADAPT_RX_AIB_CLK1_SEL_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_RX_AIB_CLK1_SEL_ADDR_FIELD_HIGH = 1;
localparam HSSI_PLDADAPT_RX_AIB_CLK1_SEL_ADDR_FIELD_SIZE = 2;
localparam HSSI_PLDADAPT_RX_AIB_CLK1_SEL_ADDR_FIELD_BITMASK = 32'h00000003;
localparam HSSI_PLDADAPT_RX_AIB_CLK1_SEL_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_PLDADAPT_RX_AIB_CLK1_SEL_ADDR_FIELD_VALUE = 2'h1;

localparam HSSI_PLDADAPT_RX_AIB_CLK2_SEL_VALUE = "aib_clk2_pld_pma_clkdiv_rx_user";
localparam HSSI_PLDADAPT_RX_AIB_CLK2_SEL_ADDR_OFST = 802;
localparam HSSI_PLDADAPT_RX_AIB_CLK2_SEL_ADDR_FIELD_OFST = 2;
localparam HSSI_PLDADAPT_RX_AIB_CLK2_SEL_ADDR_FIELD_HIGH = 3;
localparam HSSI_PLDADAPT_RX_AIB_CLK2_SEL_ADDR_FIELD_SIZE = 2;
localparam HSSI_PLDADAPT_RX_AIB_CLK2_SEL_ADDR_FIELD_BITMASK = 32'h0000000C;
localparam HSSI_PLDADAPT_RX_AIB_CLK2_SEL_ADDR_FIELD_VALMASK = 32'h00000008;
localparam HSSI_PLDADAPT_RX_AIB_CLK2_SEL_ADDR_FIELD_VALUE = 2'h2;

localparam HSSI_PLDADAPT_RX_HDPLDADAPT_AIB_FABRIC_PLD_PMA_HCLK_HZ_VALUE = 31'd0;

localparam HSSI_PLDADAPT_RX_HDPLDADAPT_AIB_FABRIC_RX_TRANSFER_CLK_HZ_VALUE = 31'd644531250;

localparam HSSI_PLDADAPT_RX_ASN_BYPASS_PMA_PCIE_SW_DONE_VALUE = "disable";
localparam HSSI_PLDADAPT_RX_ASN_BYPASS_PMA_PCIE_SW_DONE_ADDR_OFST = 794;
localparam HSSI_PLDADAPT_RX_ASN_BYPASS_PMA_PCIE_SW_DONE_ADDR_FIELD_OFST = 1;
localparam HSSI_PLDADAPT_RX_ASN_BYPASS_PMA_PCIE_SW_DONE_ADDR_FIELD_HIGH = 1;
localparam HSSI_PLDADAPT_RX_ASN_BYPASS_PMA_PCIE_SW_DONE_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_ASN_BYPASS_PMA_PCIE_SW_DONE_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_PLDADAPT_RX_ASN_BYPASS_PMA_PCIE_SW_DONE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_ASN_BYPASS_PMA_PCIE_SW_DONE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_DLL_RESET_CNT_VALUE = 8'd64;
localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_DLL_RESET_CNT_ADDR_OFST = 796;
localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_DLL_RESET_CNT_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_DLL_RESET_CNT_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_DLL_RESET_CNT_ADDR_FIELD_SIZE = 8;
localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_DLL_RESET_CNT_ADDR_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_DLL_RESET_CNT_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_DLL_RESET_CNT_ADDR_FIELD_VALUE = 8'h40;

localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_FIFO_FLUSH_CNT_VALUE = 8'd64;
localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_FIFO_FLUSH_CNT_ADDR_OFST = 795;
localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_FIFO_FLUSH_CNT_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_FIFO_FLUSH_CNT_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_FIFO_FLUSH_CNT_ADDR_FIELD_SIZE = 8;
localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_FIFO_FLUSH_CNT_ADDR_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_FIFO_FLUSH_CNT_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_FIFO_FLUSH_CNT_ADDR_FIELD_VALUE = 8'h40;

localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_PMA_PCIE_SW_DONE_CNT_VALUE = 8'd64;
localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_PMA_PCIE_SW_DONE_CNT_ADDR_OFST = 797;
localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_PMA_PCIE_SW_DONE_CNT_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_PMA_PCIE_SW_DONE_CNT_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_PMA_PCIE_SW_DONE_CNT_ADDR_FIELD_SIZE = 8;
localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_PMA_PCIE_SW_DONE_CNT_ADDR_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_PMA_PCIE_SW_DONE_CNT_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_PLDADAPT_RX_ASN_WAIT_FOR_PMA_PCIE_SW_DONE_CNT_ADDR_FIELD_VALUE = 8'h40;

localparam HSSI_PLDADAPT_RX_BONDING_DFT_EN_VALUE = "dft_dis";
localparam HSSI_PLDADAPT_RX_BONDING_DFT_EN_ADDR_OFST = 791;
localparam HSSI_PLDADAPT_RX_BONDING_DFT_EN_ADDR_FIELD_OFST = 6;
localparam HSSI_PLDADAPT_RX_BONDING_DFT_EN_ADDR_FIELD_HIGH = 6;
localparam HSSI_PLDADAPT_RX_BONDING_DFT_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_BONDING_DFT_EN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_PLDADAPT_RX_BONDING_DFT_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_BONDING_DFT_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_BONDING_DFT_VAL_VALUE = "dft_0";
localparam HSSI_PLDADAPT_RX_BONDING_DFT_VAL_ADDR_OFST = 791;
localparam HSSI_PLDADAPT_RX_BONDING_DFT_VAL_ADDR_FIELD_OFST = 7;
localparam HSSI_PLDADAPT_RX_BONDING_DFT_VAL_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_RX_BONDING_DFT_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_BONDING_DFT_VAL_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_PLDADAPT_RX_BONDING_DFT_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_BONDING_DFT_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_CHNL_BONDING_VALUE = "disable";

localparam HSSI_PLDADAPT_RX_CLOCK_DEL_MEASURE_ENABLE_VALUE = "disable";

localparam HSSI_PLDADAPT_RX_HDPLDADAPT_CSR_CLK_HZ_VALUE = 31'd0;

localparam HSSI_PLDADAPT_RX_CTRL_PLANE_BONDING_VALUE = "individual";

localparam HSSI_PLDADAPT_RX_DS_BYPASS_PIPELN_VALUE = "ds_bypass_pipeln_dis";
localparam HSSI_PLDADAPT_RX_DS_BYPASS_PIPELN_ADDR_OFST = 791;
localparam HSSI_PLDADAPT_RX_DS_BYPASS_PIPELN_ADDR_FIELD_OFST = 3;
localparam HSSI_PLDADAPT_RX_DS_BYPASS_PIPELN_ADDR_FIELD_HIGH = 3;
localparam HSSI_PLDADAPT_RX_DS_BYPASS_PIPELN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_DS_BYPASS_PIPELN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_PLDADAPT_RX_DS_BYPASS_PIPELN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_DS_BYPASS_PIPELN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_DUPLEX_MODE_VALUE = "enable";

localparam HSSI_PLDADAPT_RX_DV_MODE_VALUE = "dv_mode_dis";
localparam HSSI_PLDADAPT_RX_DV_MODE_ADDR_OFST = 786;
localparam HSSI_PLDADAPT_RX_DV_MODE_ADDR_FIELD_OFST = 7;
localparam HSSI_PLDADAPT_RX_DV_MODE_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_RX_DV_MODE_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_DV_MODE_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_PLDADAPT_RX_DV_MODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_DV_MODE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_FIFO_DOUBLE_READ_VALUE = "fifo_double_read_en";
localparam HSSI_PLDADAPT_RX_FIFO_DOUBLE_READ_ADDR_OFST = 786;
localparam HSSI_PLDADAPT_RX_FIFO_DOUBLE_READ_ADDR_FIELD_OFST = 6;
localparam HSSI_PLDADAPT_RX_FIFO_DOUBLE_READ_ADDR_FIELD_HIGH = 6;
localparam HSSI_PLDADAPT_RX_FIFO_DOUBLE_READ_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_FIFO_DOUBLE_READ_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_PLDADAPT_RX_FIFO_DOUBLE_READ_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_PLDADAPT_RX_FIFO_DOUBLE_READ_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_RX_FIFO_MODE_VALUE = "phase_comp";

localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_INS_SM_SCG_EN_VALUE = "enable";
localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_INS_SM_SCG_EN_ADDR_OFST = 803;
localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_INS_SM_SCG_EN_ADDR_FIELD_OFST = 7;
localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_INS_SM_SCG_EN_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_INS_SM_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_INS_SM_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_INS_SM_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_INS_SM_SCG_EN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_SCG_EN_VALUE = "disable";
localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_SCG_EN_ADDR_OFST = 803;
localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_OFST = 2;
localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_HIGH = 2;
localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_SEL_VALUE = "fifo_rd_clk_pld_rx_clk1";
localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_SEL_ADDR_OFST = 802;
localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_SEL_ADDR_FIELD_OFST = 5;
localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_SEL_ADDR_FIELD_HIGH = 6;
localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_SEL_ADDR_FIELD_SIZE = 2;
localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_SEL_ADDR_FIELD_BITMASK = 32'h00000060;
localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_SEL_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_PLDADAPT_RX_FIFO_RD_CLK_SEL_ADDR_FIELD_VALUE = 2'h2;

localparam HSSI_PLDADAPT_RX_FIFO_STOP_RD_VALUE = "rd_empty";
localparam HSSI_PLDADAPT_RX_FIFO_STOP_RD_ADDR_OFST = 787;
localparam HSSI_PLDADAPT_RX_FIFO_STOP_RD_ADDR_FIELD_OFST = 6;
localparam HSSI_PLDADAPT_RX_FIFO_STOP_RD_ADDR_FIELD_HIGH = 6;
localparam HSSI_PLDADAPT_RX_FIFO_STOP_RD_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_FIFO_STOP_RD_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_PLDADAPT_RX_FIFO_STOP_RD_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_FIFO_STOP_RD_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_FIFO_STOP_WR_VALUE = "n_wr_full";
localparam HSSI_PLDADAPT_RX_FIFO_STOP_WR_ADDR_OFST = 787;
localparam HSSI_PLDADAPT_RX_FIFO_STOP_WR_ADDR_FIELD_OFST = 7;
localparam HSSI_PLDADAPT_RX_FIFO_STOP_WR_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_RX_FIFO_STOP_WR_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_FIFO_STOP_WR_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_PLDADAPT_RX_FIFO_STOP_WR_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_PLDADAPT_RX_FIFO_STOP_WR_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_RX_FIFO_WIDTH_VALUE = "fifo_double_width";

localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_DEL_SM_SCG_EN_VALUE = "enable";
localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_DEL_SM_SCG_EN_ADDR_OFST = 803;
localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_DEL_SM_SCG_EN_ADDR_FIELD_OFST = 6;
localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_DEL_SM_SCG_EN_ADDR_FIELD_HIGH = 6;
localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_DEL_SM_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_DEL_SM_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_DEL_SM_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_DEL_SM_SCG_EN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_SCG_EN_VALUE = "disable";
localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_SCG_EN_ADDR_OFST = 803;
localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_OFST = 1;
localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_HIGH = 1;
localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_SEL_VALUE = "fifo_wr_clk_rx_transfer_clk";
localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_SEL_ADDR_OFST = 802;
localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_SEL_ADDR_FIELD_OFST = 4;
localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_SEL_ADDR_FIELD_HIGH = 4;
localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_SEL_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_FIFO_WR_CLK_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_FREE_RUN_DIV_CLK_VALUE = "out_of_reset_sync";
localparam HSSI_PLDADAPT_RX_FREE_RUN_DIV_CLK_ADDR_OFST = 805;
localparam HSSI_PLDADAPT_RX_FREE_RUN_DIV_CLK_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_RX_FREE_RUN_DIV_CLK_ADDR_FIELD_HIGH = 0;
localparam HSSI_PLDADAPT_RX_FREE_RUN_DIV_CLK_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_FREE_RUN_DIV_CLK_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_PLDADAPT_RX_FREE_RUN_DIV_CLK_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_FREE_RUN_DIV_CLK_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_FSR_PLD_10G_RX_CRC32_ERR_RST_VAL_VALUE = "reset_to_zero_crc32";
localparam HSSI_PLDADAPT_RX_FSR_PLD_10G_RX_CRC32_ERR_RST_VAL_ADDR_OFST = 799;
localparam HSSI_PLDADAPT_RX_FSR_PLD_10G_RX_CRC32_ERR_RST_VAL_ADDR_FIELD_OFST = 3;
localparam HSSI_PLDADAPT_RX_FSR_PLD_10G_RX_CRC32_ERR_RST_VAL_ADDR_FIELD_HIGH = 3;
localparam HSSI_PLDADAPT_RX_FSR_PLD_10G_RX_CRC32_ERR_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_FSR_PLD_10G_RX_CRC32_ERR_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_PLDADAPT_RX_FSR_PLD_10G_RX_CRC32_ERR_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_FSR_PLD_10G_RX_CRC32_ERR_RST_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_FSR_PLD_8G_SIGDET_OUT_RST_VAL_VALUE = "reset_to_zero_sigdet";
localparam HSSI_PLDADAPT_RX_FSR_PLD_8G_SIGDET_OUT_RST_VAL_ADDR_OFST = 799;
localparam HSSI_PLDADAPT_RX_FSR_PLD_8G_SIGDET_OUT_RST_VAL_ADDR_FIELD_OFST = 2;
localparam HSSI_PLDADAPT_RX_FSR_PLD_8G_SIGDET_OUT_RST_VAL_ADDR_FIELD_HIGH = 2;
localparam HSSI_PLDADAPT_RX_FSR_PLD_8G_SIGDET_OUT_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_FSR_PLD_8G_SIGDET_OUT_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_PLDADAPT_RX_FSR_PLD_8G_SIGDET_OUT_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_FSR_PLD_8G_SIGDET_OUT_RST_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_FSR_PLD_LTD_B_RST_VAL_VALUE = "reset_to_one_ltdb";
localparam HSSI_PLDADAPT_RX_FSR_PLD_LTD_B_RST_VAL_ADDR_OFST = 799;
localparam HSSI_PLDADAPT_RX_FSR_PLD_LTD_B_RST_VAL_ADDR_FIELD_OFST = 1;
localparam HSSI_PLDADAPT_RX_FSR_PLD_LTD_B_RST_VAL_ADDR_FIELD_HIGH = 1;
localparam HSSI_PLDADAPT_RX_FSR_PLD_LTD_B_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_FSR_PLD_LTD_B_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_PLDADAPT_RX_FSR_PLD_LTD_B_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_PLDADAPT_RX_FSR_PLD_LTD_B_RST_VAL_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_RX_FSR_PLD_LTR_RST_VAL_VALUE = "reset_to_zero_ltr";
localparam HSSI_PLDADAPT_RX_FSR_PLD_LTR_RST_VAL_ADDR_OFST = 799;
localparam HSSI_PLDADAPT_RX_FSR_PLD_LTR_RST_VAL_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_RX_FSR_PLD_LTR_RST_VAL_ADDR_FIELD_HIGH = 0;
localparam HSSI_PLDADAPT_RX_FSR_PLD_LTR_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_FSR_PLD_LTR_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_PLDADAPT_RX_FSR_PLD_LTR_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_FSR_PLD_LTR_RST_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_FSR_PLD_RX_FIFO_ALIGN_CLR_RST_VAL_VALUE = "reset_to_zero_alignclr";
localparam HSSI_PLDADAPT_RX_FSR_PLD_RX_FIFO_ALIGN_CLR_RST_VAL_ADDR_OFST = 799;
localparam HSSI_PLDADAPT_RX_FSR_PLD_RX_FIFO_ALIGN_CLR_RST_VAL_ADDR_FIELD_OFST = 4;
localparam HSSI_PLDADAPT_RX_FSR_PLD_RX_FIFO_ALIGN_CLR_RST_VAL_ADDR_FIELD_HIGH = 4;
localparam HSSI_PLDADAPT_RX_FSR_PLD_RX_FIFO_ALIGN_CLR_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_FSR_PLD_RX_FIFO_ALIGN_CLR_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_PLDADAPT_RX_FSR_PLD_RX_FIFO_ALIGN_CLR_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_FSR_PLD_RX_FIFO_ALIGN_CLR_RST_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_GB_RX_IDWIDTH_VALUE = "idwidth_32";

localparam HSSI_PLDADAPT_RX_GB_RX_ODWIDTH_VALUE = "odwidth_66";

localparam HSSI_PLDADAPT_RX_HIP_MODE_VALUE = "disable_hip";

localparam HSSI_PLDADAPT_RX_HRDRST_ALIGN_BYPASS_VALUE = "enable";
localparam HSSI_PLDADAPT_RX_HRDRST_ALIGN_BYPASS_ADDR_OFST = 805;
localparam HSSI_PLDADAPT_RX_HRDRST_ALIGN_BYPASS_ADDR_FIELD_OFST = 3;
localparam HSSI_PLDADAPT_RX_HRDRST_ALIGN_BYPASS_ADDR_FIELD_HIGH = 3;
localparam HSSI_PLDADAPT_RX_HRDRST_ALIGN_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_HRDRST_ALIGN_BYPASS_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_PLDADAPT_RX_HRDRST_ALIGN_BYPASS_ADDR_FIELD_VALMASK = 32'h00000008;
localparam HSSI_PLDADAPT_RX_HRDRST_ALIGN_BYPASS_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_RX_HRDRST_DLL_LOCK_BYPASS_VALUE = "disable";
localparam HSSI_PLDADAPT_RX_HRDRST_DLL_LOCK_BYPASS_ADDR_OFST = 805;
localparam HSSI_PLDADAPT_RX_HRDRST_DLL_LOCK_BYPASS_ADDR_FIELD_OFST = 2;
localparam HSSI_PLDADAPT_RX_HRDRST_DLL_LOCK_BYPASS_ADDR_FIELD_HIGH = 2;
localparam HSSI_PLDADAPT_RX_HRDRST_DLL_LOCK_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_HRDRST_DLL_LOCK_BYPASS_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_PLDADAPT_RX_HRDRST_DLL_LOCK_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_HRDRST_DLL_LOCK_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_HRDRST_RX_OSC_CLK_SCG_EN_VALUE = "disable";
localparam HSSI_PLDADAPT_RX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_OFST = 803;
localparam HSSI_PLDADAPT_RX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_OFST = 5;
localparam HSSI_PLDADAPT_RX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_HIGH = 5;
localparam HSSI_PLDADAPT_RX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_PLDADAPT_RX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_HRDRST_USER_CTL_EN_VALUE = "disable";
localparam HSSI_PLDADAPT_RX_HRDRST_USER_CTL_EN_ADDR_OFST = 805;
localparam HSSI_PLDADAPT_RX_HRDRST_USER_CTL_EN_ADDR_FIELD_OFST = 4;
localparam HSSI_PLDADAPT_RX_HRDRST_USER_CTL_EN_ADDR_FIELD_HIGH = 4;
localparam HSSI_PLDADAPT_RX_HRDRST_USER_CTL_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_HRDRST_USER_CTL_EN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_PLDADAPT_RX_HRDRST_USER_CTL_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_HRDRST_USER_CTL_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_INDV_VALUE = "indv_en";
localparam HSSI_PLDADAPT_RX_INDV_ADDR_OFST = 788;
localparam HSSI_PLDADAPT_RX_INDV_ADDR_FIELD_OFST = 6;
localparam HSSI_PLDADAPT_RX_INDV_ADDR_FIELD_HIGH = 6;
localparam HSSI_PLDADAPT_RX_INDV_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_INDV_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_PLDADAPT_RX_INDV_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_PLDADAPT_RX_INDV_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_RX_INTERNAL_CLK1_SEL1_VALUE = "pma_clks_or_txfiford_post_ct_mux_clk1_mux1";
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK1_SEL1_ADDR_OFST = 804;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK1_SEL1_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK1_SEL1_ADDR_FIELD_HIGH = 0;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK1_SEL1_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK1_SEL1_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK1_SEL1_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK1_SEL1_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_INTERNAL_CLK1_SEL2_VALUE = "pma_clks_clk1_mux2";
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK1_SEL2_ADDR_OFST = 804;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK1_SEL2_ADDR_FIELD_OFST = 1;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK1_SEL2_ADDR_FIELD_HIGH = 1;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK1_SEL2_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK1_SEL2_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK1_SEL2_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK1_SEL2_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_INTERNAL_CLK2_SEL1_VALUE = "pma_clks_or_rxfifowr_post_ct_mux_clk2_mux1";
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK2_SEL1_ADDR_OFST = 804;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK2_SEL1_ADDR_FIELD_OFST = 4;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK2_SEL1_ADDR_FIELD_HIGH = 4;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK2_SEL1_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK2_SEL1_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK2_SEL1_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK2_SEL1_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_INTERNAL_CLK2_SEL2_VALUE = "pma_clks_clk2_mux2";
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK2_SEL2_ADDR_OFST = 804;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK2_SEL2_ADDR_FIELD_OFST = 5;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK2_SEL2_ADDR_FIELD_HIGH = 5;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK2_SEL2_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK2_SEL2_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK2_SEL2_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_INTERNAL_CLK2_SEL2_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_LOOPBACK_MODE_VALUE = "disable";

localparam HSSI_PLDADAPT_RX_LOW_LATENCY_EN_VALUE = "disable";

localparam HSSI_PLDADAPT_RX_LPBK_MODE_VALUE = "disable";
localparam HSSI_PLDADAPT_RX_LPBK_MODE_ADDR_OFST = 789;
localparam HSSI_PLDADAPT_RX_LPBK_MODE_ADDR_FIELD_OFST = 6;
localparam HSSI_PLDADAPT_RX_LPBK_MODE_ADDR_FIELD_HIGH = 6;
localparam HSSI_PLDADAPT_RX_LPBK_MODE_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_LPBK_MODE_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_PLDADAPT_RX_LPBK_MODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_LPBK_MODE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_OSC_CLK_SCG_EN_VALUE = "disable";
localparam HSSI_PLDADAPT_RX_OSC_CLK_SCG_EN_ADDR_OFST = 803;
localparam HSSI_PLDADAPT_RX_OSC_CLK_SCG_EN_ADDR_FIELD_OFST = 4;
localparam HSSI_PLDADAPT_RX_OSC_CLK_SCG_EN_ADDR_FIELD_HIGH = 4;
localparam HSSI_PLDADAPT_RX_OSC_CLK_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_OSC_CLK_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_PLDADAPT_RX_OSC_CLK_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_OSC_CLK_SCG_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_PHCOMP_RD_DEL_VALUE = "phcomp_rd_del2";
localparam HSSI_PLDADAPT_RX_PHCOMP_RD_DEL_ADDR_OFST = 789;
localparam HSSI_PLDADAPT_RX_PHCOMP_RD_DEL_ADDR_FIELD_OFST = 3;
localparam HSSI_PLDADAPT_RX_PHCOMP_RD_DEL_ADDR_FIELD_HIGH = 5;
localparam HSSI_PLDADAPT_RX_PHCOMP_RD_DEL_ADDR_FIELD_SIZE = 3;
localparam HSSI_PLDADAPT_RX_PHCOMP_RD_DEL_ADDR_FIELD_BITMASK = 32'h00000038;
localparam HSSI_PLDADAPT_RX_PHCOMP_RD_DEL_ADDR_FIELD_VALMASK = 32'h00000010;
localparam HSSI_PLDADAPT_RX_PHCOMP_RD_DEL_ADDR_FIELD_VALUE = 3'h2;

localparam HSSI_PLDADAPT_RX_PIPE_ENABLE_VALUE = "disable";
localparam HSSI_PLDADAPT_RX_PIPE_ENABLE_ADDR_OFST = 794;
localparam HSSI_PLDADAPT_RX_PIPE_ENABLE_ADDR_FIELD_OFST = 7;
localparam HSSI_PLDADAPT_RX_PIPE_ENABLE_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_RX_PIPE_ENABLE_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_PIPE_ENABLE_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_PLDADAPT_RX_PIPE_ENABLE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_PIPE_ENABLE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_PIPE_MODE_VALUE = "disable_pipe";

localparam HSSI_PLDADAPT_RX_HDPLDADAPT_PLD_AVMM1_CLK_ROWCLK_HZ_VALUE = 31'd0;

localparam HSSI_PLDADAPT_RX_HDPLDADAPT_PLD_AVMM2_CLK_ROWCLK_HZ_VALUE = 31'd0;

localparam HSSI_PLDADAPT_RX_PLD_CLK1_DELAY_EN_VALUE = "enable";
localparam HSSI_PLDADAPT_RX_PLD_CLK1_DELAY_EN_ADDR_OFST = 801;
localparam HSSI_PLDADAPT_RX_PLD_CLK1_DELAY_EN_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_RX_PLD_CLK1_DELAY_EN_ADDR_FIELD_HIGH = 0;
localparam HSSI_PLDADAPT_RX_PLD_CLK1_DELAY_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_PLD_CLK1_DELAY_EN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_PLDADAPT_RX_PLD_CLK1_DELAY_EN_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_PLDADAPT_RX_PLD_CLK1_DELAY_EN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_RX_PLD_CLK1_DELAY_SEL_VALUE = "delay_path13";
localparam HSSI_PLDADAPT_RX_PLD_CLK1_DELAY_SEL_ADDR_OFST = 801;
localparam HSSI_PLDADAPT_RX_PLD_CLK1_DELAY_SEL_ADDR_FIELD_OFST = 1;
localparam HSSI_PLDADAPT_RX_PLD_CLK1_DELAY_SEL_ADDR_FIELD_HIGH = 4;
localparam HSSI_PLDADAPT_RX_PLD_CLK1_DELAY_SEL_ADDR_FIELD_SIZE = 4;
localparam HSSI_PLDADAPT_RX_PLD_CLK1_DELAY_SEL_ADDR_FIELD_BITMASK = 32'h0000001E;
localparam HSSI_PLDADAPT_RX_PLD_CLK1_DELAY_SEL_ADDR_FIELD_VALMASK = 32'h0000001A;
localparam HSSI_PLDADAPT_RX_PLD_CLK1_DELAY_SEL_ADDR_FIELD_VALUE = 4'hD;

localparam HSSI_PLDADAPT_RX_PLD_CLK1_INV_EN_VALUE = "disable";
localparam HSSI_PLDADAPT_RX_PLD_CLK1_INV_EN_ADDR_OFST = 801;
localparam HSSI_PLDADAPT_RX_PLD_CLK1_INV_EN_ADDR_FIELD_OFST = 5;
localparam HSSI_PLDADAPT_RX_PLD_CLK1_INV_EN_ADDR_FIELD_HIGH = 5;
localparam HSSI_PLDADAPT_RX_PLD_CLK1_INV_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_PLD_CLK1_INV_EN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_PLDADAPT_RX_PLD_CLK1_INV_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_PLD_CLK1_INV_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_HDPLDADAPT_PLD_RX_CLK1_DCM_HZ_VALUE = 31'd156250000;

localparam HSSI_PLDADAPT_RX_HDPLDADAPT_PLD_RX_CLK1_ROWCLK_HZ_VALUE = 31'd156250000;

localparam HSSI_PLDADAPT_RX_HDPLDADAPT_PLD_SCLK1_ROWCLK_HZ_VALUE = 31'd0;

localparam HSSI_PLDADAPT_RX_HDPLDADAPT_PLD_SCLK2_ROWCLK_HZ_VALUE = 31'd0;

localparam HSSI_PLDADAPT_RX_PMA_HCLK_SCG_EN_VALUE = "enable";
localparam HSSI_PLDADAPT_RX_PMA_HCLK_SCG_EN_ADDR_OFST = 803;
localparam HSSI_PLDADAPT_RX_PMA_HCLK_SCG_EN_ADDR_FIELD_OFST = 3;
localparam HSSI_PLDADAPT_RX_PMA_HCLK_SCG_EN_ADDR_FIELD_HIGH = 3;
localparam HSSI_PLDADAPT_RX_PMA_HCLK_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_PMA_HCLK_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_PLDADAPT_RX_PMA_HCLK_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000008;
localparam HSSI_PLDADAPT_RX_PMA_HCLK_SCG_EN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_RX_POWERDOWN_MODE_VALUE = "powerup";

localparam HSSI_PLDADAPT_RX_RX_DATAPATH_TB_SEL_VALUE = "cp_bond";
localparam HSSI_PLDADAPT_RX_RX_DATAPATH_TB_SEL_ADDR_OFST = 800;
localparam HSSI_PLDADAPT_RX_RX_DATAPATH_TB_SEL_ADDR_FIELD_OFST = 3;
localparam HSSI_PLDADAPT_RX_RX_DATAPATH_TB_SEL_ADDR_FIELD_HIGH = 6;
localparam HSSI_PLDADAPT_RX_RX_DATAPATH_TB_SEL_ADDR_FIELD_SIZE = 4;
localparam HSSI_PLDADAPT_RX_RX_DATAPATH_TB_SEL_ADDR_FIELD_BITMASK = 32'h00000078;
localparam HSSI_PLDADAPT_RX_RX_DATAPATH_TB_SEL_ADDR_FIELD_VALMASK = 32'h00000010;
localparam HSSI_PLDADAPT_RX_RX_DATAPATH_TB_SEL_ADDR_FIELD_VALUE = 4'h2;

localparam HSSI_PLDADAPT_RX_RX_FASTBOND_RDEN_VALUE = "rden_ds_fast_us_fast";
localparam HSSI_PLDADAPT_RX_RX_FASTBOND_RDEN_ADDR_OFST = 794;
localparam HSSI_PLDADAPT_RX_RX_FASTBOND_RDEN_ADDR_FIELD_OFST = 5;
localparam HSSI_PLDADAPT_RX_RX_FASTBOND_RDEN_ADDR_FIELD_HIGH = 6;
localparam HSSI_PLDADAPT_RX_RX_FASTBOND_RDEN_ADDR_FIELD_SIZE = 2;
localparam HSSI_PLDADAPT_RX_RX_FASTBOND_RDEN_ADDR_FIELD_BITMASK = 32'h00000060;
localparam HSSI_PLDADAPT_RX_RX_FASTBOND_RDEN_ADDR_FIELD_VALMASK = 32'h00000060;
localparam HSSI_PLDADAPT_RX_RX_FASTBOND_RDEN_ADDR_FIELD_VALUE = 2'h3;

localparam HSSI_PLDADAPT_RX_RX_FASTBOND_WREN_VALUE = "wren_ds_del_us_del";
localparam HSSI_PLDADAPT_RX_RX_FASTBOND_WREN_ADDR_OFST = 785;
localparam HSSI_PLDADAPT_RX_RX_FASTBOND_WREN_ADDR_FIELD_OFST = 6;
localparam HSSI_PLDADAPT_RX_RX_FASTBOND_WREN_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_RX_RX_FASTBOND_WREN_ADDR_FIELD_SIZE = 2;
localparam HSSI_PLDADAPT_RX_RX_FASTBOND_WREN_ADDR_FIELD_BITMASK = 32'h000000C0;
localparam HSSI_PLDADAPT_RX_RX_FASTBOND_WREN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_RX_FASTBOND_WREN_ADDR_FIELD_VALUE = 2'h0;

localparam HSSI_PLDADAPT_RX_RX_FIFO_POWER_MODE_VALUE = "full_width_ps_dw";
localparam HSSI_PLDADAPT_RX_RX_FIFO_POWER_MODE_ADDR_OFST = 794;
localparam HSSI_PLDADAPT_RX_RX_FIFO_POWER_MODE_ADDR_FIELD_OFST = 2;
localparam HSSI_PLDADAPT_RX_RX_FIFO_POWER_MODE_ADDR_FIELD_HIGH = 4;
localparam HSSI_PLDADAPT_RX_RX_FIFO_POWER_MODE_ADDR_FIELD_SIZE = 3;
localparam HSSI_PLDADAPT_RX_RX_FIFO_POWER_MODE_ADDR_FIELD_BITMASK = 32'h0000001C;
localparam HSSI_PLDADAPT_RX_RX_FIFO_POWER_MODE_ADDR_FIELD_VALMASK = 32'h0000000C;
localparam HSSI_PLDADAPT_RX_RX_FIFO_POWER_MODE_ADDR_FIELD_VALUE = 3'h3;

localparam HSSI_PLDADAPT_RX_RX_FIFO_READ_LATENCY_ADJUST_VALUE = "disable";
localparam HSSI_PLDADAPT_RX_RX_FIFO_READ_LATENCY_ADJUST_ADDR_OFST = 800;
localparam HSSI_PLDADAPT_RX_RX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_OFST = 7;
localparam HSSI_PLDADAPT_RX_RX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_RX_RX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_RX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_PLDADAPT_RX_RX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_RX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_RX_FIFO_WRITE_CTRL_VALUE = "blklock_ignore";
localparam HSSI_PLDADAPT_RX_RX_FIFO_WRITE_CTRL_ADDR_OFST = 792;
localparam HSSI_PLDADAPT_RX_RX_FIFO_WRITE_CTRL_ADDR_FIELD_OFST = 1;
localparam HSSI_PLDADAPT_RX_RX_FIFO_WRITE_CTRL_ADDR_FIELD_HIGH = 1;
localparam HSSI_PLDADAPT_RX_RX_FIFO_WRITE_CTRL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_RX_FIFO_WRITE_CTRL_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_PLDADAPT_RX_RX_FIFO_WRITE_CTRL_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_PLDADAPT_RX_RX_FIFO_WRITE_CTRL_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_RX_RX_FIFO_WRITE_LATENCY_ADJUST_VALUE = "disable";
localparam HSSI_PLDADAPT_RX_RX_FIFO_WRITE_LATENCY_ADJUST_ADDR_OFST = 789;
localparam HSSI_PLDADAPT_RX_RX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_OFST = 7;
localparam HSSI_PLDADAPT_RX_RX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_RX_RX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_RX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_PLDADAPT_RX_RX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_RX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_RX_OSC_CLOCK_SETTING_VALUE = "osc_clk_div_by1";

localparam HSSI_PLDADAPT_RX_RX_PLD_8G_EIDLEINFERSEL_POLLING_BYPASS_VALUE = "disable";
localparam HSSI_PLDADAPT_RX_RX_PLD_8G_EIDLEINFERSEL_POLLING_BYPASS_ADDR_OFST = 798;
localparam HSSI_PLDADAPT_RX_RX_PLD_8G_EIDLEINFERSEL_POLLING_BYPASS_ADDR_FIELD_OFST = 4;
localparam HSSI_PLDADAPT_RX_RX_PLD_8G_EIDLEINFERSEL_POLLING_BYPASS_ADDR_FIELD_HIGH = 4;
localparam HSSI_PLDADAPT_RX_RX_PLD_8G_EIDLEINFERSEL_POLLING_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_RX_PLD_8G_EIDLEINFERSEL_POLLING_BYPASS_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_PLDADAPT_RX_RX_PLD_8G_EIDLEINFERSEL_POLLING_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_RX_PLD_8G_EIDLEINFERSEL_POLLING_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_EYE_MONITOR_POLLING_BYPASS_VALUE = "disable";
localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_EYE_MONITOR_POLLING_BYPASS_ADDR_OFST = 798;
localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_EYE_MONITOR_POLLING_BYPASS_ADDR_FIELD_OFST = 5;
localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_EYE_MONITOR_POLLING_BYPASS_ADDR_FIELD_HIGH = 5;
localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_EYE_MONITOR_POLLING_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_EYE_MONITOR_POLLING_BYPASS_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_EYE_MONITOR_POLLING_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_EYE_MONITOR_POLLING_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_PCIE_SWITCH_POLLING_BYPASS_VALUE = "disable";
localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_PCIE_SWITCH_POLLING_BYPASS_ADDR_OFST = 798;
localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_PCIE_SWITCH_POLLING_BYPASS_ADDR_FIELD_OFST = 6;
localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_PCIE_SWITCH_POLLING_BYPASS_ADDR_FIELD_HIGH = 6;
localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_PCIE_SWITCH_POLLING_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_PCIE_SWITCH_POLLING_BYPASS_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_PCIE_SWITCH_POLLING_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_PCIE_SWITCH_POLLING_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_RESER_OUT_POLLING_BYPASS_VALUE = "disable";
localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_RESER_OUT_POLLING_BYPASS_ADDR_OFST = 798;
localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_RESER_OUT_POLLING_BYPASS_ADDR_FIELD_OFST = 7;
localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_RESER_OUT_POLLING_BYPASS_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_RESER_OUT_POLLING_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_RESER_OUT_POLLING_BYPASS_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_RESER_OUT_POLLING_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_RX_PLD_PMA_RESER_OUT_POLLING_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_RX_PRBS_FLAGS_SR_ENABLE_VALUE = "disable";
localparam HSSI_PLDADAPT_RX_RX_PRBS_FLAGS_SR_ENABLE_ADDR_OFST = 799;
localparam HSSI_PLDADAPT_RX_RX_PRBS_FLAGS_SR_ENABLE_ADDR_FIELD_OFST = 5;
localparam HSSI_PLDADAPT_RX_RX_PRBS_FLAGS_SR_ENABLE_ADDR_FIELD_HIGH = 5;
localparam HSSI_PLDADAPT_RX_RX_PRBS_FLAGS_SR_ENABLE_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_RX_PRBS_FLAGS_SR_ENABLE_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_PLDADAPT_RX_RX_PRBS_FLAGS_SR_ENABLE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_RX_PRBS_FLAGS_SR_ENABLE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_RX_TRUE_B2B_VALUE = "b2b";
localparam HSSI_PLDADAPT_RX_RX_TRUE_B2B_ADDR_OFST = 788;
localparam HSSI_PLDADAPT_RX_RX_TRUE_B2B_ADDR_FIELD_OFST = 7;
localparam HSSI_PLDADAPT_RX_RX_TRUE_B2B_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_RX_RX_TRUE_B2B_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_RX_TRUE_B2B_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_PLDADAPT_RX_RX_TRUE_B2B_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_PLDADAPT_RX_RX_TRUE_B2B_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_RX_RX_USERTEST_SEL_VALUE = "enable";
localparam HSSI_PLDADAPT_RX_RX_USERTEST_SEL_ADDR_OFST = 799;
localparam HSSI_PLDADAPT_RX_RX_USERTEST_SEL_ADDR_FIELD_OFST = 6;
localparam HSSI_PLDADAPT_RX_RX_USERTEST_SEL_ADDR_FIELD_HIGH = 6;
localparam HSSI_PLDADAPT_RX_RX_USERTEST_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_RX_USERTEST_SEL_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_PLDADAPT_RX_RX_USERTEST_SEL_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_PLDADAPT_RX_RX_USERTEST_SEL_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_RX_RXFIFO_EMPTY_VALUE = "empty_dw";
localparam HSSI_PLDADAPT_RX_RXFIFO_EMPTY_ADDR_OFST = 785;
localparam HSSI_PLDADAPT_RX_RXFIFO_EMPTY_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_RX_RXFIFO_EMPTY_ADDR_FIELD_HIGH = 5;
localparam HSSI_PLDADAPT_RX_RXFIFO_EMPTY_ADDR_FIELD_SIZE = 6;
localparam HSSI_PLDADAPT_RX_RXFIFO_EMPTY_ADDR_FIELD_BITMASK = 32'h0000003F;
localparam HSSI_PLDADAPT_RX_RXFIFO_EMPTY_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_PLDADAPT_RX_RXFIFO_EMPTY_ADDR_FIELD_VALUE = 6'h1;

localparam HSSI_PLDADAPT_RX_RXFIFO_FULL_VALUE = "full_pc_dw";
localparam HSSI_PLDADAPT_RX_RXFIFO_FULL_ADDR_OFST = 786;
localparam HSSI_PLDADAPT_RX_RXFIFO_FULL_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_RX_RXFIFO_FULL_ADDR_FIELD_HIGH = 5;
localparam HSSI_PLDADAPT_RX_RXFIFO_FULL_ADDR_FIELD_SIZE = 6;
localparam HSSI_PLDADAPT_RX_RXFIFO_FULL_ADDR_FIELD_BITMASK = 32'h0000003F;
localparam HSSI_PLDADAPT_RX_RXFIFO_FULL_ADDR_FIELD_VALMASK = 32'h0000000F;
localparam HSSI_PLDADAPT_RX_RXFIFO_FULL_ADDR_FIELD_VALUE = 6'hF;

localparam HSSI_PLDADAPT_RX_RXFIFO_MODE_VALUE = "rxphase_comp";
localparam HSSI_PLDADAPT_RX_RXFIFO_MODE_ADDR_OFST = 789;
localparam HSSI_PLDADAPT_RX_RXFIFO_MODE_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_RX_RXFIFO_MODE_ADDR_FIELD_HIGH = 2;
localparam HSSI_PLDADAPT_RX_RXFIFO_MODE_ADDR_FIELD_SIZE = 3;
localparam HSSI_PLDADAPT_RX_RXFIFO_MODE_ADDR_FIELD_BITMASK = 32'h00000007;
localparam HSSI_PLDADAPT_RX_RXFIFO_MODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_RXFIFO_MODE_ADDR_FIELD_VALUE = 3'h0;

localparam HSSI_PLDADAPT_RX_RXFIFO_PEMPTY_VALUE = 6'd2;
localparam HSSI_PLDADAPT_RX_RXFIFO_PEMPTY_ADDR_OFST = 787;
localparam HSSI_PLDADAPT_RX_RXFIFO_PEMPTY_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_RX_RXFIFO_PEMPTY_ADDR_FIELD_HIGH = 5;
localparam HSSI_PLDADAPT_RX_RXFIFO_PEMPTY_ADDR_FIELD_SIZE = 6;
localparam HSSI_PLDADAPT_RX_RXFIFO_PEMPTY_ADDR_FIELD_BITMASK = 32'h0000003F;
localparam HSSI_PLDADAPT_RX_RXFIFO_PEMPTY_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_PLDADAPT_RX_RXFIFO_PEMPTY_ADDR_FIELD_VALUE = 6'h2;

localparam HSSI_PLDADAPT_RX_RXFIFO_PFULL_VALUE = 6'd10;
localparam HSSI_PLDADAPT_RX_RXFIFO_PFULL_ADDR_OFST = 788;
localparam HSSI_PLDADAPT_RX_RXFIFO_PFULL_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_RX_RXFIFO_PFULL_ADDR_FIELD_HIGH = 5;
localparam HSSI_PLDADAPT_RX_RXFIFO_PFULL_ADDR_FIELD_SIZE = 6;
localparam HSSI_PLDADAPT_RX_RXFIFO_PFULL_ADDR_FIELD_BITMASK = 32'h0000003F;
localparam HSSI_PLDADAPT_RX_RXFIFO_PFULL_ADDR_FIELD_VALMASK = 32'h0000000A;
localparam HSSI_PLDADAPT_RX_RXFIFO_PFULL_ADDR_FIELD_VALUE = 6'hA;

localparam HSSI_PLDADAPT_RX_RXFIFORD_POST_CT_SEL_VALUE = "rxfiford_sclk_post_ct";
localparam HSSI_PLDADAPT_RX_RXFIFORD_POST_CT_SEL_ADDR_OFST = 804;
localparam HSSI_PLDADAPT_RX_RXFIFORD_POST_CT_SEL_ADDR_FIELD_OFST = 7;
localparam HSSI_PLDADAPT_RX_RXFIFORD_POST_CT_SEL_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_RX_RXFIFORD_POST_CT_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_RXFIFORD_POST_CT_SEL_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_PLDADAPT_RX_RXFIFORD_POST_CT_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_RXFIFORD_POST_CT_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_RXFIFOWR_POST_CT_SEL_VALUE = "rxfifowr_sclk_post_ct";
localparam HSSI_PLDADAPT_RX_RXFIFOWR_POST_CT_SEL_ADDR_OFST = 804;
localparam HSSI_PLDADAPT_RX_RXFIFOWR_POST_CT_SEL_ADDR_FIELD_OFST = 6;
localparam HSSI_PLDADAPT_RX_RXFIFOWR_POST_CT_SEL_ADDR_FIELD_HIGH = 6;
localparam HSSI_PLDADAPT_RX_RXFIFOWR_POST_CT_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_RXFIFOWR_POST_CT_SEL_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_PLDADAPT_RX_RXFIFOWR_POST_CT_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_RXFIFOWR_POST_CT_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_SCLK_SEL_VALUE = "sclk1_rowclk";
localparam HSSI_PLDADAPT_RX_SCLK_SEL_ADDR_OFST = 803;
localparam HSSI_PLDADAPT_RX_SCLK_SEL_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_RX_SCLK_SEL_ADDR_FIELD_HIGH = 0;
localparam HSSI_PLDADAPT_RX_SCLK_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_SCLK_SEL_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_PLDADAPT_RX_SCLK_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_SCLK_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_HDPLDADAPT_SPEED_GRADE_VALUE = "dash_2";

localparam HSSI_PLDADAPT_RX_STRETCH_NUM_STAGES_VALUE = "four_stage";
localparam HSSI_PLDADAPT_RX_STRETCH_NUM_STAGES_ADDR_OFST = 800;
localparam HSSI_PLDADAPT_RX_STRETCH_NUM_STAGES_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_RX_STRETCH_NUM_STAGES_ADDR_FIELD_HIGH = 2;
localparam HSSI_PLDADAPT_RX_STRETCH_NUM_STAGES_ADDR_FIELD_SIZE = 3;
localparam HSSI_PLDADAPT_RX_STRETCH_NUM_STAGES_ADDR_FIELD_BITMASK = 32'h00000007;
localparam HSSI_PLDADAPT_RX_STRETCH_NUM_STAGES_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_PLDADAPT_RX_STRETCH_NUM_STAGES_ADDR_FIELD_VALUE = 3'h4;

localparam HSSI_PLDADAPT_RX_SUP_MODE_VALUE = "user_mode";

localparam HSSI_PLDADAPT_RX_TXFIFORD_POST_CT_SEL_VALUE = "txfiford_sclk_post_ct";
localparam HSSI_PLDADAPT_RX_TXFIFORD_POST_CT_SEL_ADDR_OFST = 804;
localparam HSSI_PLDADAPT_RX_TXFIFORD_POST_CT_SEL_ADDR_FIELD_OFST = 2;
localparam HSSI_PLDADAPT_RX_TXFIFORD_POST_CT_SEL_ADDR_FIELD_HIGH = 2;
localparam HSSI_PLDADAPT_RX_TXFIFORD_POST_CT_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_TXFIFORD_POST_CT_SEL_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_PLDADAPT_RX_TXFIFORD_POST_CT_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_TXFIFORD_POST_CT_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_TXFIFOWR_POST_CT_SEL_VALUE = "txfifowr_sclk_post_ct";
localparam HSSI_PLDADAPT_RX_TXFIFOWR_POST_CT_SEL_ADDR_OFST = 804;
localparam HSSI_PLDADAPT_RX_TXFIFOWR_POST_CT_SEL_ADDR_FIELD_OFST = 3;
localparam HSSI_PLDADAPT_RX_TXFIFOWR_POST_CT_SEL_ADDR_FIELD_HIGH = 3;
localparam HSSI_PLDADAPT_RX_TXFIFOWR_POST_CT_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_TXFIFOWR_POST_CT_SEL_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_PLDADAPT_RX_TXFIFOWR_POST_CT_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_TXFIFOWR_POST_CT_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_US_BYPASS_PIPELN_VALUE = "us_bypass_pipeln_dis";
localparam HSSI_PLDADAPT_RX_US_BYPASS_PIPELN_ADDR_OFST = 791;
localparam HSSI_PLDADAPT_RX_US_BYPASS_PIPELN_ADDR_FIELD_OFST = 2;
localparam HSSI_PLDADAPT_RX_US_BYPASS_PIPELN_ADDR_FIELD_HIGH = 2;
localparam HSSI_PLDADAPT_RX_US_BYPASS_PIPELN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_US_BYPASS_PIPELN_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_PLDADAPT_RX_US_BYPASS_PIPELN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_RX_US_BYPASS_PIPELN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_RX_WORD_ALIGN_VALUE = "wa_en";
localparam HSSI_PLDADAPT_RX_WORD_ALIGN_ADDR_OFST = 792;
localparam HSSI_PLDADAPT_RX_WORD_ALIGN_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_RX_WORD_ALIGN_ADDR_FIELD_HIGH = 0;
localparam HSSI_PLDADAPT_RX_WORD_ALIGN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_RX_WORD_ALIGN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_PLDADAPT_RX_WORD_ALIGN_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_PLDADAPT_RX_WORD_ALIGN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_RX_WORD_ALIGN_ENABLE_VALUE = "enable";

localparam HSSI_PLDADAPT_RX_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam HSSI_PLDADAPT_TX_AIB_CLK1_SEL_VALUE = "aib_clk1_pld_pcs_tx_clk_out";
localparam HSSI_PLDADAPT_TX_AIB_CLK1_SEL_ADDR_OFST = 781;
localparam HSSI_PLDADAPT_TX_AIB_CLK1_SEL_ADDR_FIELD_OFST = 2;
localparam HSSI_PLDADAPT_TX_AIB_CLK1_SEL_ADDR_FIELD_HIGH = 3;
localparam HSSI_PLDADAPT_TX_AIB_CLK1_SEL_ADDR_FIELD_SIZE = 2;
localparam HSSI_PLDADAPT_TX_AIB_CLK1_SEL_ADDR_FIELD_BITMASK = 32'h0000000C;
localparam HSSI_PLDADAPT_TX_AIB_CLK1_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_AIB_CLK1_SEL_ADDR_FIELD_VALUE = 2'h0;

localparam HSSI_PLDADAPT_TX_AIB_CLK2_SEL_VALUE = "aib_clk2_pld_pcs_tx_clk_out";
localparam HSSI_PLDADAPT_TX_AIB_CLK2_SEL_ADDR_OFST = 781;
localparam HSSI_PLDADAPT_TX_AIB_CLK2_SEL_ADDR_FIELD_OFST = 4;
localparam HSSI_PLDADAPT_TX_AIB_CLK2_SEL_ADDR_FIELD_HIGH = 5;
localparam HSSI_PLDADAPT_TX_AIB_CLK2_SEL_ADDR_FIELD_SIZE = 2;
localparam HSSI_PLDADAPT_TX_AIB_CLK2_SEL_ADDR_FIELD_BITMASK = 32'h00000030;
localparam HSSI_PLDADAPT_TX_AIB_CLK2_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_AIB_CLK2_SEL_ADDR_FIELD_VALUE = 2'h0;

localparam HSSI_PLDADAPT_TX_HDPLDADAPT_AIB_FABRIC_PLD_PMA_HCLK_HZ_VALUE = 31'd0;

localparam HSSI_PLDADAPT_TX_HDPLDADAPT_AIB_FABRIC_PMA_AIB_TX_CLK_HZ_VALUE = 31'd644531250;

localparam HSSI_PLDADAPT_TX_BONDING_DFT_EN_VALUE = "dft_dis";
localparam HSSI_PLDADAPT_TX_BONDING_DFT_EN_ADDR_OFST = 773;
localparam HSSI_PLDADAPT_TX_BONDING_DFT_EN_ADDR_FIELD_OFST = 6;
localparam HSSI_PLDADAPT_TX_BONDING_DFT_EN_ADDR_FIELD_HIGH = 6;
localparam HSSI_PLDADAPT_TX_BONDING_DFT_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_BONDING_DFT_EN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_PLDADAPT_TX_BONDING_DFT_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_BONDING_DFT_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_BONDING_DFT_VAL_VALUE = "dft_0";
localparam HSSI_PLDADAPT_TX_BONDING_DFT_VAL_ADDR_OFST = 773;
localparam HSSI_PLDADAPT_TX_BONDING_DFT_VAL_ADDR_FIELD_OFST = 7;
localparam HSSI_PLDADAPT_TX_BONDING_DFT_VAL_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_TX_BONDING_DFT_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_BONDING_DFT_VAL_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_PLDADAPT_TX_BONDING_DFT_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_BONDING_DFT_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_CHNL_BONDING_VALUE = "disable";

localparam HSSI_PLDADAPT_TX_HDPLDADAPT_CSR_CLK_HZ_VALUE = 31'd0;

localparam HSSI_PLDADAPT_TX_CTRL_PLANE_BONDING_VALUE = "individual";

localparam HSSI_PLDADAPT_TX_DS_BYPASS_PIPELN_VALUE = "ds_bypass_pipeln_dis";
localparam HSSI_PLDADAPT_TX_DS_BYPASS_PIPELN_ADDR_OFST = 773;
localparam HSSI_PLDADAPT_TX_DS_BYPASS_PIPELN_ADDR_FIELD_OFST = 3;
localparam HSSI_PLDADAPT_TX_DS_BYPASS_PIPELN_ADDR_FIELD_HIGH = 3;
localparam HSSI_PLDADAPT_TX_DS_BYPASS_PIPELN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_DS_BYPASS_PIPELN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_PLDADAPT_TX_DS_BYPASS_PIPELN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_DS_BYPASS_PIPELN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_DUPLEX_MODE_VALUE = "enable";

localparam HSSI_PLDADAPT_TX_DV_BOND_VALUE = "dv_bond_dis";
localparam HSSI_PLDADAPT_TX_DV_BOND_ADDR_OFST = 774;
localparam HSSI_PLDADAPT_TX_DV_BOND_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_TX_DV_BOND_ADDR_FIELD_HIGH = 0;
localparam HSSI_PLDADAPT_TX_DV_BOND_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_DV_BOND_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_PLDADAPT_TX_DV_BOND_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_PLDADAPT_TX_DV_BOND_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_TX_DV_GEN_VALUE = "dv_gen_dis";
localparam HSSI_PLDADAPT_TX_DV_GEN_ADDR_OFST = 774;
localparam HSSI_PLDADAPT_TX_DV_GEN_ADDR_FIELD_OFST = 6;
localparam HSSI_PLDADAPT_TX_DV_GEN_ADDR_FIELD_HIGH = 6;
localparam HSSI_PLDADAPT_TX_DV_GEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_DV_GEN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_PLDADAPT_TX_DV_GEN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_DV_GEN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_FIFO_DOUBLE_WRITE_VALUE = "fifo_double_write_en";
localparam HSSI_PLDADAPT_TX_FIFO_DOUBLE_WRITE_ADDR_OFST = 774;
localparam HSSI_PLDADAPT_TX_FIFO_DOUBLE_WRITE_ADDR_FIELD_OFST = 7;
localparam HSSI_PLDADAPT_TX_FIFO_DOUBLE_WRITE_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_TX_FIFO_DOUBLE_WRITE_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FIFO_DOUBLE_WRITE_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_PLDADAPT_TX_FIFO_DOUBLE_WRITE_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_PLDADAPT_TX_FIFO_DOUBLE_WRITE_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_TX_FIFO_MODE_VALUE = "phase_comp";

localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_FRM_GEN_SCG_EN_VALUE = "enable";
localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_FRM_GEN_SCG_EN_ADDR_OFST = 781;
localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_FRM_GEN_SCG_EN_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_FRM_GEN_SCG_EN_ADDR_FIELD_HIGH = 0;
localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_FRM_GEN_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_FRM_GEN_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_FRM_GEN_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_FRM_GEN_SCG_EN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_SCG_EN_VALUE = "disable";
localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_SCG_EN_ADDR_OFST = 782;
localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_OFST = 3;
localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_HIGH = 3;
localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_SCG_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_SEL_VALUE = "fifo_rd_pma_aib_tx_clk";
localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_SEL_ADDR_OFST = 781;
localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_SEL_ADDR_FIELD_OFST = 6;
localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_SEL_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_SEL_ADDR_FIELD_SIZE = 2;
localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_SEL_ADDR_FIELD_BITMASK = 32'h000000C0;
localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_FIFO_RD_CLK_SEL_ADDR_FIELD_VALUE = 2'h0;

localparam HSSI_PLDADAPT_TX_FIFO_STOP_RD_VALUE = "rd_empty";
localparam HSSI_PLDADAPT_TX_FIFO_STOP_RD_ADDR_OFST = 770;
localparam HSSI_PLDADAPT_TX_FIFO_STOP_RD_ADDR_FIELD_OFST = 6;
localparam HSSI_PLDADAPT_TX_FIFO_STOP_RD_ADDR_FIELD_HIGH = 6;
localparam HSSI_PLDADAPT_TX_FIFO_STOP_RD_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FIFO_STOP_RD_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_PLDADAPT_TX_FIFO_STOP_RD_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_FIFO_STOP_RD_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_FIFO_STOP_WR_VALUE = "wr_full";
localparam HSSI_PLDADAPT_TX_FIFO_STOP_WR_ADDR_OFST = 770;
localparam HSSI_PLDADAPT_TX_FIFO_STOP_WR_ADDR_FIELD_OFST = 7;
localparam HSSI_PLDADAPT_TX_FIFO_STOP_WR_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_TX_FIFO_STOP_WR_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FIFO_STOP_WR_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_PLDADAPT_TX_FIFO_STOP_WR_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_FIFO_STOP_WR_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_FIFO_WIDTH_VALUE = "fifo_double_width";

localparam HSSI_PLDADAPT_TX_FIFO_WR_CLK_SCG_EN_VALUE = "disable";
localparam HSSI_PLDADAPT_TX_FIFO_WR_CLK_SCG_EN_ADDR_OFST = 782;
localparam HSSI_PLDADAPT_TX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_OFST = 4;
localparam HSSI_PLDADAPT_TX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_HIGH = 4;
localparam HSSI_PLDADAPT_TX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_PLDADAPT_TX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_FIFO_WR_CLK_SCG_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_FPLL_SHARED_DIRECT_ASYNC_IN_SEL_VALUE = "fpll_shared_direct_async_in_rowclk";
localparam HSSI_PLDADAPT_TX_FPLL_SHARED_DIRECT_ASYNC_IN_SEL_ADDR_OFST = 781;
localparam HSSI_PLDADAPT_TX_FPLL_SHARED_DIRECT_ASYNC_IN_SEL_ADDR_FIELD_OFST = 1;
localparam HSSI_PLDADAPT_TX_FPLL_SHARED_DIRECT_ASYNC_IN_SEL_ADDR_FIELD_HIGH = 1;
localparam HSSI_PLDADAPT_TX_FPLL_SHARED_DIRECT_ASYNC_IN_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FPLL_SHARED_DIRECT_ASYNC_IN_SEL_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_PLDADAPT_TX_FPLL_SHARED_DIRECT_ASYNC_IN_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_FPLL_SHARED_DIRECT_ASYNC_IN_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_FRMGEN_BURST_VALUE = "frmgen_burst_dis";
localparam HSSI_PLDADAPT_TX_FRMGEN_BURST_ADDR_OFST = 777;
localparam HSSI_PLDADAPT_TX_FRMGEN_BURST_ADDR_FIELD_OFST = 4;
localparam HSSI_PLDADAPT_TX_FRMGEN_BURST_ADDR_FIELD_HIGH = 4;
localparam HSSI_PLDADAPT_TX_FRMGEN_BURST_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FRMGEN_BURST_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_PLDADAPT_TX_FRMGEN_BURST_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_FRMGEN_BURST_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_FRMGEN_BYPASS_VALUE = "frmgen_bypass_en";
localparam HSSI_PLDADAPT_TX_FRMGEN_BYPASS_ADDR_OFST = 777;
localparam HSSI_PLDADAPT_TX_FRMGEN_BYPASS_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_TX_FRMGEN_BYPASS_ADDR_FIELD_HIGH = 0;
localparam HSSI_PLDADAPT_TX_FRMGEN_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FRMGEN_BYPASS_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_PLDADAPT_TX_FRMGEN_BYPASS_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_PLDADAPT_TX_FRMGEN_BYPASS_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_TX_FRMGEN_MFRM_LENGTH_VALUE = 16'd2048;
localparam HSSI_PLDADAPT_TX_FRMGEN_MFRM_LENGTH_ADDR0_OFST = 775;
localparam HSSI_PLDADAPT_TX_FRMGEN_MFRM_LENGTH_ADDR0_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_TX_FRMGEN_MFRM_LENGTH_ADDR0_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_TX_FRMGEN_MFRM_LENGTH_ADDR0_FIELD_SIZE = 8;
localparam HSSI_PLDADAPT_TX_FRMGEN_MFRM_LENGTH_ADDR0_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_PLDADAPT_TX_FRMGEN_MFRM_LENGTH_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_FRMGEN_MFRM_LENGTH_ADDR0_FIELD_VALUE = 8'h0;
localparam HSSI_PLDADAPT_TX_FRMGEN_MFRM_LENGTH_ADDR1_OFST = 776;
localparam HSSI_PLDADAPT_TX_FRMGEN_MFRM_LENGTH_ADDR1_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_TX_FRMGEN_MFRM_LENGTH_ADDR1_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_TX_FRMGEN_MFRM_LENGTH_ADDR1_FIELD_SIZE = 8;
localparam HSSI_PLDADAPT_TX_FRMGEN_MFRM_LENGTH_ADDR1_FIELD_BITMASK = 32'h000000FF;
localparam HSSI_PLDADAPT_TX_FRMGEN_MFRM_LENGTH_ADDR1_FIELD_VALMASK = 32'h00000008;
localparam HSSI_PLDADAPT_TX_FRMGEN_MFRM_LENGTH_ADDR1_FIELD_VALUE = 8'h8;

localparam HSSI_PLDADAPT_TX_FRMGEN_PIPELN_VALUE = "frmgen_pipeln_en";
localparam HSSI_PLDADAPT_TX_FRMGEN_PIPELN_ADDR_OFST = 777;
localparam HSSI_PLDADAPT_TX_FRMGEN_PIPELN_ADDR_FIELD_OFST = 1;
localparam HSSI_PLDADAPT_TX_FRMGEN_PIPELN_ADDR_FIELD_HIGH = 1;
localparam HSSI_PLDADAPT_TX_FRMGEN_PIPELN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FRMGEN_PIPELN_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_PLDADAPT_TX_FRMGEN_PIPELN_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_PLDADAPT_TX_FRMGEN_PIPELN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_TX_FRMGEN_PYLD_INS_VALUE = "frmgen_pyld_ins_dis";
localparam HSSI_PLDADAPT_TX_FRMGEN_PYLD_INS_ADDR_OFST = 777;
localparam HSSI_PLDADAPT_TX_FRMGEN_PYLD_INS_ADDR_FIELD_OFST = 2;
localparam HSSI_PLDADAPT_TX_FRMGEN_PYLD_INS_ADDR_FIELD_HIGH = 2;
localparam HSSI_PLDADAPT_TX_FRMGEN_PYLD_INS_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FRMGEN_PYLD_INS_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_PLDADAPT_TX_FRMGEN_PYLD_INS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_FRMGEN_PYLD_INS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_FRMGEN_WORDSLIP_VALUE = "frmgen_wordslip_dis";
localparam HSSI_PLDADAPT_TX_FRMGEN_WORDSLIP_ADDR_OFST = 777;
localparam HSSI_PLDADAPT_TX_FRMGEN_WORDSLIP_ADDR_FIELD_OFST = 6;
localparam HSSI_PLDADAPT_TX_FRMGEN_WORDSLIP_ADDR_FIELD_HIGH = 6;
localparam HSSI_PLDADAPT_TX_FRMGEN_WORDSLIP_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FRMGEN_WORDSLIP_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_PLDADAPT_TX_FRMGEN_WORDSLIP_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_FRMGEN_WORDSLIP_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT0_RST_VAL_VALUE = "reset_to_one_hfsrin0";
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT0_RST_VAL_ADDR_OFST = 778;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT0_RST_VAL_ADDR_FIELD_OFST = 1;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT0_RST_VAL_ADDR_FIELD_HIGH = 1;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT0_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT0_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT0_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT0_RST_VAL_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT1_RST_VAL_VALUE = "reset_to_one_hfsrin1";
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT1_RST_VAL_ADDR_OFST = 778;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT1_RST_VAL_ADDR_FIELD_OFST = 2;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT1_RST_VAL_ADDR_FIELD_HIGH = 2;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT1_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT1_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT1_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT1_RST_VAL_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT2_RST_VAL_VALUE = "reset_to_one_hfsrin2";
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT2_RST_VAL_ADDR_OFST = 778;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT2_RST_VAL_ADDR_FIELD_OFST = 3;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT2_RST_VAL_ADDR_FIELD_HIGH = 3;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT2_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT2_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT2_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000008;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT2_RST_VAL_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT3_RST_VAL_VALUE = "reset_to_zero_hfsrin3";
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT3_RST_VAL_ADDR_OFST = 778;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT3_RST_VAL_ADDR_FIELD_OFST = 4;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT3_RST_VAL_ADDR_FIELD_HIGH = 4;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT3_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT3_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT3_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_IN_BIT3_RST_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT0_RST_VAL_VALUE = "reset_to_one_hfsrout0";
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT0_RST_VAL_ADDR_OFST = 778;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT0_RST_VAL_ADDR_FIELD_OFST = 6;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT0_RST_VAL_ADDR_FIELD_HIGH = 6;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT0_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT0_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT0_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT0_RST_VAL_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT1_RST_VAL_VALUE = "reset_to_one_hfsrout1";
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT1_RST_VAL_ADDR_OFST = 778;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT1_RST_VAL_ADDR_FIELD_OFST = 7;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT1_RST_VAL_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT1_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT1_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT1_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT1_RST_VAL_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT2_RST_VAL_VALUE = "reset_to_zero_hfsrout2";
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT2_RST_VAL_ADDR_OFST = 779;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT2_RST_VAL_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT2_RST_VAL_ADDR_FIELD_HIGH = 0;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT2_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT2_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT2_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT2_RST_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT3_RST_VAL_VALUE = "reset_to_zero_hfsrout3";
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT3_RST_VAL_ADDR_OFST = 779;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT3_RST_VAL_ADDR_FIELD_OFST = 1;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT3_RST_VAL_ADDR_FIELD_HIGH = 1;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT3_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT3_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT3_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_FSR_HIP_FSR_OUT_BIT3_RST_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_FSR_MASK_TX_PLL_RST_VAL_VALUE = "reset_to_zero_maskpll";
localparam HSSI_PLDADAPT_TX_FSR_MASK_TX_PLL_RST_VAL_ADDR_OFST = 778;
localparam HSSI_PLDADAPT_TX_FSR_MASK_TX_PLL_RST_VAL_ADDR_FIELD_OFST = 5;
localparam HSSI_PLDADAPT_TX_FSR_MASK_TX_PLL_RST_VAL_ADDR_FIELD_HIGH = 5;
localparam HSSI_PLDADAPT_TX_FSR_MASK_TX_PLL_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FSR_MASK_TX_PLL_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_PLDADAPT_TX_FSR_MASK_TX_PLL_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_FSR_MASK_TX_PLL_RST_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_FSR_PLD_TXELECIDLE_RST_VAL_VALUE = "reset_to_zero_txelec";
localparam HSSI_PLDADAPT_TX_FSR_PLD_TXELECIDLE_RST_VAL_ADDR_OFST = 778;
localparam HSSI_PLDADAPT_TX_FSR_PLD_TXELECIDLE_RST_VAL_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_TX_FSR_PLD_TXELECIDLE_RST_VAL_ADDR_FIELD_HIGH = 0;
localparam HSSI_PLDADAPT_TX_FSR_PLD_TXELECIDLE_RST_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_FSR_PLD_TXELECIDLE_RST_VAL_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_PLDADAPT_TX_FSR_PLD_TXELECIDLE_RST_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_FSR_PLD_TXELECIDLE_RST_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_GB_TX_IDWIDTH_VALUE = "idwidth_66";
localparam HSSI_PLDADAPT_TX_GB_TX_IDWIDTH_ADDR_OFST = 774;
localparam HSSI_PLDADAPT_TX_GB_TX_IDWIDTH_ADDR_FIELD_OFST = 1;
localparam HSSI_PLDADAPT_TX_GB_TX_IDWIDTH_ADDR_FIELD_HIGH = 3;
localparam HSSI_PLDADAPT_TX_GB_TX_IDWIDTH_ADDR_FIELD_SIZE = 3;
localparam HSSI_PLDADAPT_TX_GB_TX_IDWIDTH_ADDR_FIELD_BITMASK = 32'h0000000E;
localparam HSSI_PLDADAPT_TX_GB_TX_IDWIDTH_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_GB_TX_IDWIDTH_ADDR_FIELD_VALUE = 3'h0;

localparam HSSI_PLDADAPT_TX_GB_TX_ODWIDTH_VALUE = "odwidth_32";
localparam HSSI_PLDADAPT_TX_GB_TX_ODWIDTH_ADDR_OFST = 774;
localparam HSSI_PLDADAPT_TX_GB_TX_ODWIDTH_ADDR_FIELD_OFST = 4;
localparam HSSI_PLDADAPT_TX_GB_TX_ODWIDTH_ADDR_FIELD_HIGH = 5;
localparam HSSI_PLDADAPT_TX_GB_TX_ODWIDTH_ADDR_FIELD_SIZE = 2;
localparam HSSI_PLDADAPT_TX_GB_TX_ODWIDTH_ADDR_FIELD_BITMASK = 32'h00000030;
localparam HSSI_PLDADAPT_TX_GB_TX_ODWIDTH_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_GB_TX_ODWIDTH_ADDR_FIELD_VALUE = 2'h0;

localparam HSSI_PLDADAPT_TX_HIP_MODE_VALUE = "disable_hip";

localparam HSSI_PLDADAPT_TX_HIP_OSC_CLK_SCG_EN_VALUE = "enable";
localparam HSSI_PLDADAPT_TX_HIP_OSC_CLK_SCG_EN_ADDR_OFST = 782;
localparam HSSI_PLDADAPT_TX_HIP_OSC_CLK_SCG_EN_ADDR_FIELD_OFST = 7;
localparam HSSI_PLDADAPT_TX_HIP_OSC_CLK_SCG_EN_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_TX_HIP_OSC_CLK_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_HIP_OSC_CLK_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_PLDADAPT_TX_HIP_OSC_CLK_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_PLDADAPT_TX_HIP_OSC_CLK_SCG_EN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_TX_HRDRST_DCD_CAL_DONE_BYPASS_VALUE = "disable";
localparam HSSI_PLDADAPT_TX_HRDRST_DCD_CAL_DONE_BYPASS_ADDR_OFST = 783;
localparam HSSI_PLDADAPT_TX_HRDRST_DCD_CAL_DONE_BYPASS_ADDR_FIELD_OFST = 1;
localparam HSSI_PLDADAPT_TX_HRDRST_DCD_CAL_DONE_BYPASS_ADDR_FIELD_HIGH = 1;
localparam HSSI_PLDADAPT_TX_HRDRST_DCD_CAL_DONE_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_HRDRST_DCD_CAL_DONE_BYPASS_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_PLDADAPT_TX_HRDRST_DCD_CAL_DONE_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_HRDRST_DCD_CAL_DONE_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_HRDRST_RX_OSC_CLK_SCG_EN_VALUE = "disable";
localparam HSSI_PLDADAPT_TX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_OFST = 782;
localparam HSSI_PLDADAPT_TX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_OFST = 6;
localparam HSSI_PLDADAPT_TX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_HIGH = 6;
localparam HSSI_PLDADAPT_TX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_PLDADAPT_TX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_HRDRST_RX_OSC_CLK_SCG_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_HRDRST_USER_CTL_EN_VALUE = "disable";
localparam HSSI_PLDADAPT_TX_HRDRST_USER_CTL_EN_ADDR_OFST = 783;
localparam HSSI_PLDADAPT_TX_HRDRST_USER_CTL_EN_ADDR_FIELD_OFST = 2;
localparam HSSI_PLDADAPT_TX_HRDRST_USER_CTL_EN_ADDR_FIELD_HIGH = 2;
localparam HSSI_PLDADAPT_TX_HRDRST_USER_CTL_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_HRDRST_USER_CTL_EN_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_PLDADAPT_TX_HRDRST_USER_CTL_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_HRDRST_USER_CTL_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_INDV_VALUE = "indv_en";
localparam HSSI_PLDADAPT_TX_INDV_ADDR_OFST = 770;
localparam HSSI_PLDADAPT_TX_INDV_ADDR_FIELD_OFST = 5;
localparam HSSI_PLDADAPT_TX_INDV_ADDR_FIELD_HIGH = 5;
localparam HSSI_PLDADAPT_TX_INDV_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_INDV_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_PLDADAPT_TX_INDV_ADDR_FIELD_VALMASK = 32'h00000020;
localparam HSSI_PLDADAPT_TX_INDV_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_TX_LOOPBACK_MODE_VALUE = "disable";

localparam HSSI_PLDADAPT_TX_LOW_LATENCY_EN_VALUE = "disable";

localparam HSSI_PLDADAPT_TX_OSC_CLK_SCG_EN_VALUE = "disable";
localparam HSSI_PLDADAPT_TX_OSC_CLK_SCG_EN_ADDR_OFST = 782;
localparam HSSI_PLDADAPT_TX_OSC_CLK_SCG_EN_ADDR_FIELD_OFST = 5;
localparam HSSI_PLDADAPT_TX_OSC_CLK_SCG_EN_ADDR_FIELD_HIGH = 5;
localparam HSSI_PLDADAPT_TX_OSC_CLK_SCG_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_OSC_CLK_SCG_EN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_PLDADAPT_TX_OSC_CLK_SCG_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_OSC_CLK_SCG_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_PHCOMP_RD_DEL_VALUE = "phcomp_rd_del3";
localparam HSSI_PLDADAPT_TX_PHCOMP_RD_DEL_ADDR_OFST = 769;
localparam HSSI_PLDADAPT_TX_PHCOMP_RD_DEL_ADDR_FIELD_OFST = 5;
localparam HSSI_PLDADAPT_TX_PHCOMP_RD_DEL_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_TX_PHCOMP_RD_DEL_ADDR_FIELD_SIZE = 3;
localparam HSSI_PLDADAPT_TX_PHCOMP_RD_DEL_ADDR_FIELD_BITMASK = 32'h000000E0;
localparam HSSI_PLDADAPT_TX_PHCOMP_RD_DEL_ADDR_FIELD_VALMASK = 32'h00000060;
localparam HSSI_PLDADAPT_TX_PHCOMP_RD_DEL_ADDR_FIELD_VALUE = 3'h3;

localparam HSSI_PLDADAPT_TX_PIPE_MODE_VALUE = "disable_pipe";

localparam HSSI_PLDADAPT_TX_HDPLDADAPT_PLD_AVMM1_CLK_ROWCLK_HZ_VALUE = 31'd0;

localparam HSSI_PLDADAPT_TX_HDPLDADAPT_PLD_AVMM2_CLK_ROWCLK_HZ_VALUE = 31'd0;

localparam HSSI_PLDADAPT_TX_PLD_CLK1_DELAY_EN_VALUE = "enable";
localparam HSSI_PLDADAPT_TX_PLD_CLK1_DELAY_EN_ADDR_OFST = 780;
localparam HSSI_PLDADAPT_TX_PLD_CLK1_DELAY_EN_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_TX_PLD_CLK1_DELAY_EN_ADDR_FIELD_HIGH = 0;
localparam HSSI_PLDADAPT_TX_PLD_CLK1_DELAY_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_PLD_CLK1_DELAY_EN_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_PLDADAPT_TX_PLD_CLK1_DELAY_EN_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_PLDADAPT_TX_PLD_CLK1_DELAY_EN_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_TX_PLD_CLK1_DELAY_SEL_VALUE = "delay_path15";
localparam HSSI_PLDADAPT_TX_PLD_CLK1_DELAY_SEL_ADDR_OFST = 780;
localparam HSSI_PLDADAPT_TX_PLD_CLK1_DELAY_SEL_ADDR_FIELD_OFST = 1;
localparam HSSI_PLDADAPT_TX_PLD_CLK1_DELAY_SEL_ADDR_FIELD_HIGH = 4;
localparam HSSI_PLDADAPT_TX_PLD_CLK1_DELAY_SEL_ADDR_FIELD_SIZE = 4;
localparam HSSI_PLDADAPT_TX_PLD_CLK1_DELAY_SEL_ADDR_FIELD_BITMASK = 32'h0000001E;
localparam HSSI_PLDADAPT_TX_PLD_CLK1_DELAY_SEL_ADDR_FIELD_VALMASK = 32'h0000001E;
localparam HSSI_PLDADAPT_TX_PLD_CLK1_DELAY_SEL_ADDR_FIELD_VALUE = 4'hF;

localparam HSSI_PLDADAPT_TX_PLD_CLK1_INV_EN_VALUE = "disable";
localparam HSSI_PLDADAPT_TX_PLD_CLK1_INV_EN_ADDR_OFST = 780;
localparam HSSI_PLDADAPT_TX_PLD_CLK1_INV_EN_ADDR_FIELD_OFST = 5;
localparam HSSI_PLDADAPT_TX_PLD_CLK1_INV_EN_ADDR_FIELD_HIGH = 5;
localparam HSSI_PLDADAPT_TX_PLD_CLK1_INV_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_PLD_CLK1_INV_EN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_PLDADAPT_TX_PLD_CLK1_INV_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_PLD_CLK1_INV_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_HDPLDADAPT_PLD_SCLK1_ROWCLK_HZ_VALUE = 31'd0;

localparam HSSI_PLDADAPT_TX_HDPLDADAPT_PLD_SCLK2_ROWCLK_HZ_VALUE = 31'd0;

localparam HSSI_PLDADAPT_TX_HDPLDADAPT_PLD_TX_CLK1_DCM_HZ_VALUE = 31'd156250000;

localparam HSSI_PLDADAPT_TX_HDPLDADAPT_PLD_TX_CLK1_ROWCLK_HZ_VALUE = 31'd156250000;

localparam HSSI_PLDADAPT_TX_HDPLDADAPT_PLD_TX_CLK2_DCM_HZ_VALUE = 31'd644531250;

localparam HSSI_PLDADAPT_TX_HDPLDADAPT_PLD_TX_CLK2_ROWCLK_HZ_VALUE = 31'd644531250;

localparam HSSI_PLDADAPT_TX_PMA_AIB_TX_CLK_EXPECTED_SETTING_VALUE = "x2";

localparam HSSI_PLDADAPT_TX_POWERDOWN_MODE_VALUE = "powerup";

localparam HSSI_PLDADAPT_TX_SH_ERR_VALUE = "sh_err_dis";
localparam HSSI_PLDADAPT_TX_SH_ERR_ADDR_OFST = 777;
localparam HSSI_PLDADAPT_TX_SH_ERR_ADDR_FIELD_OFST = 3;
localparam HSSI_PLDADAPT_TX_SH_ERR_ADDR_FIELD_HIGH = 3;
localparam HSSI_PLDADAPT_TX_SH_ERR_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_SH_ERR_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_PLDADAPT_TX_SH_ERR_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_SH_ERR_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_HDPLDADAPT_SPEED_GRADE_VALUE = "dash_2";

localparam HSSI_PLDADAPT_TX_STRETCH_NUM_STAGES_VALUE = "four_stage";
localparam HSSI_PLDADAPT_TX_STRETCH_NUM_STAGES_ADDR_OFST = 784;
localparam HSSI_PLDADAPT_TX_STRETCH_NUM_STAGES_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_TX_STRETCH_NUM_STAGES_ADDR_FIELD_HIGH = 2;
localparam HSSI_PLDADAPT_TX_STRETCH_NUM_STAGES_ADDR_FIELD_SIZE = 3;
localparam HSSI_PLDADAPT_TX_STRETCH_NUM_STAGES_ADDR_FIELD_BITMASK = 32'h00000007;
localparam HSSI_PLDADAPT_TX_STRETCH_NUM_STAGES_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_PLDADAPT_TX_STRETCH_NUM_STAGES_ADDR_FIELD_VALUE = 3'h4;

localparam HSSI_PLDADAPT_TX_SUP_MODE_VALUE = "user_mode";

localparam HSSI_PLDADAPT_TX_TX_DATAPATH_TB_SEL_VALUE = "cp_bond";
localparam HSSI_PLDADAPT_TX_TX_DATAPATH_TB_SEL_ADDR_OFST = 784;
localparam HSSI_PLDADAPT_TX_TX_DATAPATH_TB_SEL_ADDR_FIELD_OFST = 3;
localparam HSSI_PLDADAPT_TX_TX_DATAPATH_TB_SEL_ADDR_FIELD_HIGH = 5;
localparam HSSI_PLDADAPT_TX_TX_DATAPATH_TB_SEL_ADDR_FIELD_SIZE = 3;
localparam HSSI_PLDADAPT_TX_TX_DATAPATH_TB_SEL_ADDR_FIELD_BITMASK = 32'h00000038;
localparam HSSI_PLDADAPT_TX_TX_DATAPATH_TB_SEL_ADDR_FIELD_VALMASK = 32'h00000018;
localparam HSSI_PLDADAPT_TX_TX_DATAPATH_TB_SEL_ADDR_FIELD_VALUE = 3'h3;

localparam HSSI_PLDADAPT_TX_TX_FASTBOND_RDEN_VALUE = "rden_ds_fast_us_fast";
localparam HSSI_PLDADAPT_TX_TX_FASTBOND_RDEN_ADDR_OFST = 783;
localparam HSSI_PLDADAPT_TX_TX_FASTBOND_RDEN_ADDR_FIELD_OFST = 3;
localparam HSSI_PLDADAPT_TX_TX_FASTBOND_RDEN_ADDR_FIELD_HIGH = 4;
localparam HSSI_PLDADAPT_TX_TX_FASTBOND_RDEN_ADDR_FIELD_SIZE = 2;
localparam HSSI_PLDADAPT_TX_TX_FASTBOND_RDEN_ADDR_FIELD_BITMASK = 32'h00000018;
localparam HSSI_PLDADAPT_TX_TX_FASTBOND_RDEN_ADDR_FIELD_VALMASK = 32'h00000018;
localparam HSSI_PLDADAPT_TX_TX_FASTBOND_RDEN_ADDR_FIELD_VALUE = 2'h3;

localparam HSSI_PLDADAPT_TX_TX_FASTBOND_WREN_VALUE = "wren_ds_fast_us_fast";
localparam HSSI_PLDADAPT_TX_TX_FASTBOND_WREN_ADDR_OFST = 780;
localparam HSSI_PLDADAPT_TX_TX_FASTBOND_WREN_ADDR_FIELD_OFST = 6;
localparam HSSI_PLDADAPT_TX_TX_FASTBOND_WREN_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_TX_TX_FASTBOND_WREN_ADDR_FIELD_SIZE = 2;
localparam HSSI_PLDADAPT_TX_TX_FASTBOND_WREN_ADDR_FIELD_BITMASK = 32'h000000C0;
localparam HSSI_PLDADAPT_TX_TX_FASTBOND_WREN_ADDR_FIELD_VALMASK = 32'h000000C0;
localparam HSSI_PLDADAPT_TX_TX_FASTBOND_WREN_ADDR_FIELD_VALUE = 2'h3;

localparam HSSI_PLDADAPT_TX_TX_FIFO_POWER_MODE_VALUE = "full_width_ps_dw";
localparam HSSI_PLDADAPT_TX_TX_FIFO_POWER_MODE_ADDR_OFST = 771;
localparam HSSI_PLDADAPT_TX_TX_FIFO_POWER_MODE_ADDR_FIELD_OFST = 5;
localparam HSSI_PLDADAPT_TX_TX_FIFO_POWER_MODE_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_TX_TX_FIFO_POWER_MODE_ADDR_FIELD_SIZE = 3;
localparam HSSI_PLDADAPT_TX_TX_FIFO_POWER_MODE_ADDR_FIELD_BITMASK = 32'h000000E0;
localparam HSSI_PLDADAPT_TX_TX_FIFO_POWER_MODE_ADDR_FIELD_VALMASK = 32'h00000060;
localparam HSSI_PLDADAPT_TX_TX_FIFO_POWER_MODE_ADDR_FIELD_VALUE = 3'h3;

localparam HSSI_PLDADAPT_TX_TX_FIFO_READ_LATENCY_ADJUST_VALUE = "disable";
localparam HSSI_PLDADAPT_TX_TX_FIFO_READ_LATENCY_ADJUST_ADDR_OFST = 784;
localparam HSSI_PLDADAPT_TX_TX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_OFST = 7;
localparam HSSI_PLDADAPT_TX_TX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_TX_TX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_TX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_PLDADAPT_TX_TX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_TX_FIFO_READ_LATENCY_ADJUST_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_TX_FIFO_WRITE_LATENCY_ADJUST_VALUE = "disable";
localparam HSSI_PLDADAPT_TX_TX_FIFO_WRITE_LATENCY_ADJUST_ADDR_OFST = 784;
localparam HSSI_PLDADAPT_TX_TX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_OFST = 6;
localparam HSSI_PLDADAPT_TX_TX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_HIGH = 6;
localparam HSSI_PLDADAPT_TX_TX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_TX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_PLDADAPT_TX_TX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_TX_FIFO_WRITE_LATENCY_ADJUST_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_TX_HIP_AIB_SSR_IN_POLLING_BYPASS_VALUE = "disable";
localparam HSSI_PLDADAPT_TX_TX_HIP_AIB_SSR_IN_POLLING_BYPASS_ADDR_OFST = 779;
localparam HSSI_PLDADAPT_TX_TX_HIP_AIB_SSR_IN_POLLING_BYPASS_ADDR_FIELD_OFST = 4;
localparam HSSI_PLDADAPT_TX_TX_HIP_AIB_SSR_IN_POLLING_BYPASS_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_TX_TX_HIP_AIB_SSR_IN_POLLING_BYPASS_ADDR_FIELD_SIZE = 4;
localparam HSSI_PLDADAPT_TX_TX_HIP_AIB_SSR_IN_POLLING_BYPASS_ADDR_FIELD_BITMASK = 32'h000000F0;
localparam HSSI_PLDADAPT_TX_TX_HIP_AIB_SSR_IN_POLLING_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_TX_HIP_AIB_SSR_IN_POLLING_BYPASS_ADDR_FIELD_VALUE = 4'h0;

localparam HSSI_PLDADAPT_TX_TX_OSC_CLOCK_SETTING_VALUE = "osc_clk_div_by1";

localparam HSSI_PLDADAPT_TX_TX_PLD_10G_TX_BITSLIP_POLLING_BYPASS_VALUE = "disable";
localparam HSSI_PLDADAPT_TX_TX_PLD_10G_TX_BITSLIP_POLLING_BYPASS_ADDR_OFST = 779;
localparam HSSI_PLDADAPT_TX_TX_PLD_10G_TX_BITSLIP_POLLING_BYPASS_ADDR_FIELD_OFST = 3;
localparam HSSI_PLDADAPT_TX_TX_PLD_10G_TX_BITSLIP_POLLING_BYPASS_ADDR_FIELD_HIGH = 3;
localparam HSSI_PLDADAPT_TX_TX_PLD_10G_TX_BITSLIP_POLLING_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_TX_PLD_10G_TX_BITSLIP_POLLING_BYPASS_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_PLDADAPT_TX_TX_PLD_10G_TX_BITSLIP_POLLING_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_TX_PLD_10G_TX_BITSLIP_POLLING_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_TX_PLD_8G_TX_BOUNDARY_SEL_POLLING_BYPASS_VALUE = "disable";
localparam HSSI_PLDADAPT_TX_TX_PLD_8G_TX_BOUNDARY_SEL_POLLING_BYPASS_ADDR_OFST = 779;
localparam HSSI_PLDADAPT_TX_TX_PLD_8G_TX_BOUNDARY_SEL_POLLING_BYPASS_ADDR_FIELD_OFST = 2;
localparam HSSI_PLDADAPT_TX_TX_PLD_8G_TX_BOUNDARY_SEL_POLLING_BYPASS_ADDR_FIELD_HIGH = 2;
localparam HSSI_PLDADAPT_TX_TX_PLD_8G_TX_BOUNDARY_SEL_POLLING_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_TX_PLD_8G_TX_BOUNDARY_SEL_POLLING_BYPASS_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_PLDADAPT_TX_TX_PLD_8G_TX_BOUNDARY_SEL_POLLING_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_TX_PLD_8G_TX_BOUNDARY_SEL_POLLING_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_TX_PLD_PMA_FPLL_CNT_SEL_POLLING_BYPASS_VALUE = "disable";
localparam HSSI_PLDADAPT_TX_TX_PLD_PMA_FPLL_CNT_SEL_POLLING_BYPASS_ADDR_OFST = 782;
localparam HSSI_PLDADAPT_TX_TX_PLD_PMA_FPLL_CNT_SEL_POLLING_BYPASS_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_TX_TX_PLD_PMA_FPLL_CNT_SEL_POLLING_BYPASS_ADDR_FIELD_HIGH = 0;
localparam HSSI_PLDADAPT_TX_TX_PLD_PMA_FPLL_CNT_SEL_POLLING_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_TX_PLD_PMA_FPLL_CNT_SEL_POLLING_BYPASS_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_PLDADAPT_TX_TX_PLD_PMA_FPLL_CNT_SEL_POLLING_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_TX_PLD_PMA_FPLL_CNT_SEL_POLLING_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_TX_PLD_PMA_FPLL_NUM_PHASE_SHIFTS_POLLING_BYPASS_VALUE = "disable";
localparam HSSI_PLDADAPT_TX_TX_PLD_PMA_FPLL_NUM_PHASE_SHIFTS_POLLING_BYPASS_ADDR_OFST = 777;
localparam HSSI_PLDADAPT_TX_TX_PLD_PMA_FPLL_NUM_PHASE_SHIFTS_POLLING_BYPASS_ADDR_FIELD_OFST = 7;
localparam HSSI_PLDADAPT_TX_TX_PLD_PMA_FPLL_NUM_PHASE_SHIFTS_POLLING_BYPASS_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_TX_TX_PLD_PMA_FPLL_NUM_PHASE_SHIFTS_POLLING_BYPASS_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_TX_PLD_PMA_FPLL_NUM_PHASE_SHIFTS_POLLING_BYPASS_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_PLDADAPT_TX_TX_PLD_PMA_FPLL_NUM_PHASE_SHIFTS_POLLING_BYPASS_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_TX_PLD_PMA_FPLL_NUM_PHASE_SHIFTS_POLLING_BYPASS_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_TX_USERTEST_SEL_VALUE = "enable";
localparam HSSI_PLDADAPT_TX_TX_USERTEST_SEL_ADDR_OFST = 783;
localparam HSSI_PLDADAPT_TX_TX_USERTEST_SEL_ADDR_FIELD_OFST = 7;
localparam HSSI_PLDADAPT_TX_TX_USERTEST_SEL_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_TX_TX_USERTEST_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_TX_USERTEST_SEL_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_PLDADAPT_TX_TX_USERTEST_SEL_ADDR_FIELD_VALMASK = 32'h00000080;
localparam HSSI_PLDADAPT_TX_TX_USERTEST_SEL_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_TX_TXFIFO_EMPTY_VALUE = "empty_default";
localparam HSSI_PLDADAPT_TX_TXFIFO_EMPTY_ADDR_OFST = 768;
localparam HSSI_PLDADAPT_TX_TXFIFO_EMPTY_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_TX_TXFIFO_EMPTY_ADDR_FIELD_HIGH = 4;
localparam HSSI_PLDADAPT_TX_TXFIFO_EMPTY_ADDR_FIELD_SIZE = 5;
localparam HSSI_PLDADAPT_TX_TXFIFO_EMPTY_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam HSSI_PLDADAPT_TX_TXFIFO_EMPTY_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_TXFIFO_EMPTY_ADDR_FIELD_VALUE = 5'h0;

localparam HSSI_PLDADAPT_TX_TXFIFO_FULL_VALUE = "full_pc_dw";
localparam HSSI_PLDADAPT_TX_TXFIFO_FULL_ADDR_OFST = 769;
localparam HSSI_PLDADAPT_TX_TXFIFO_FULL_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_TX_TXFIFO_FULL_ADDR_FIELD_HIGH = 4;
localparam HSSI_PLDADAPT_TX_TXFIFO_FULL_ADDR_FIELD_SIZE = 5;
localparam HSSI_PLDADAPT_TX_TXFIFO_FULL_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam HSSI_PLDADAPT_TX_TXFIFO_FULL_ADDR_FIELD_VALMASK = 32'h0000000E;
localparam HSSI_PLDADAPT_TX_TXFIFO_FULL_ADDR_FIELD_VALUE = 5'hE;

localparam HSSI_PLDADAPT_TX_TXFIFO_MODE_VALUE = "txphase_comp";
localparam HSSI_PLDADAPT_TX_TXFIFO_MODE_ADDR_OFST = 768;
localparam HSSI_PLDADAPT_TX_TXFIFO_MODE_ADDR_FIELD_OFST = 5;
localparam HSSI_PLDADAPT_TX_TXFIFO_MODE_ADDR_FIELD_HIGH = 7;
localparam HSSI_PLDADAPT_TX_TXFIFO_MODE_ADDR_FIELD_SIZE = 3;
localparam HSSI_PLDADAPT_TX_TXFIFO_MODE_ADDR_FIELD_BITMASK = 32'h000000E0;
localparam HSSI_PLDADAPT_TX_TXFIFO_MODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_TXFIFO_MODE_ADDR_FIELD_VALUE = 3'h0;

localparam HSSI_PLDADAPT_TX_TXFIFO_PEMPTY_VALUE = 5'd2;
localparam HSSI_PLDADAPT_TX_TXFIFO_PEMPTY_ADDR_OFST = 770;
localparam HSSI_PLDADAPT_TX_TXFIFO_PEMPTY_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_TX_TXFIFO_PEMPTY_ADDR_FIELD_HIGH = 4;
localparam HSSI_PLDADAPT_TX_TXFIFO_PEMPTY_ADDR_FIELD_SIZE = 5;
localparam HSSI_PLDADAPT_TX_TXFIFO_PEMPTY_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam HSSI_PLDADAPT_TX_TXFIFO_PEMPTY_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_PLDADAPT_TX_TXFIFO_PEMPTY_ADDR_FIELD_VALUE = 5'h2;

localparam HSSI_PLDADAPT_TX_TXFIFO_PFULL_VALUE = 5'd10;
localparam HSSI_PLDADAPT_TX_TXFIFO_PFULL_ADDR_OFST = 771;
localparam HSSI_PLDADAPT_TX_TXFIFO_PFULL_ADDR_FIELD_OFST = 0;
localparam HSSI_PLDADAPT_TX_TXFIFO_PFULL_ADDR_FIELD_HIGH = 4;
localparam HSSI_PLDADAPT_TX_TXFIFO_PFULL_ADDR_FIELD_SIZE = 5;
localparam HSSI_PLDADAPT_TX_TXFIFO_PFULL_ADDR_FIELD_BITMASK = 32'h0000001F;
localparam HSSI_PLDADAPT_TX_TXFIFO_PFULL_ADDR_FIELD_VALMASK = 32'h0000000A;
localparam HSSI_PLDADAPT_TX_TXFIFO_PFULL_ADDR_FIELD_VALUE = 5'hA;

localparam HSSI_PLDADAPT_TX_US_BYPASS_PIPELN_VALUE = "us_bypass_pipeln_dis";
localparam HSSI_PLDADAPT_TX_US_BYPASS_PIPELN_ADDR_OFST = 773;
localparam HSSI_PLDADAPT_TX_US_BYPASS_PIPELN_ADDR_FIELD_OFST = 2;
localparam HSSI_PLDADAPT_TX_US_BYPASS_PIPELN_ADDR_FIELD_HIGH = 2;
localparam HSSI_PLDADAPT_TX_US_BYPASS_PIPELN_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_US_BYPASS_PIPELN_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_PLDADAPT_TX_US_BYPASS_PIPELN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_PLDADAPT_TX_US_BYPASS_PIPELN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_PLDADAPT_TX_WORD_ALIGN_ENABLE_VALUE = "enable";

localparam HSSI_PLDADAPT_TX_WORD_MARK_VALUE = "wm_en";
localparam HSSI_PLDADAPT_TX_WORD_MARK_ADDR_OFST = 777;
localparam HSSI_PLDADAPT_TX_WORD_MARK_ADDR_FIELD_OFST = 5;
localparam HSSI_PLDADAPT_TX_WORD_MARK_ADDR_FIELD_HIGH = 5;
localparam HSSI_PLDADAPT_TX_WORD_MARK_ADDR_FIELD_SIZE = 1;
localparam HSSI_PLDADAPT_TX_WORD_MARK_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_PLDADAPT_TX_WORD_MARK_ADDR_FIELD_VALMASK = 32'h00000020;
localparam HSSI_PLDADAPT_TX_WORD_MARK_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_PLDADAPT_TX_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam PMA_CDR_REFCLK_POWERDOWN_MODE_VALUE = "powerup";

localparam PMA_CDR_REFCLK_RECEIVER_DETECT_SRC_VALUE = "iqclk_src";
localparam PMA_CDR_REFCLK_RECEIVER_DETECT_SRC_ADDR_OFST = 318;
localparam PMA_CDR_REFCLK_RECEIVER_DETECT_SRC_ADDR_FIELD_OFST = 7;
localparam PMA_CDR_REFCLK_RECEIVER_DETECT_SRC_ADDR_FIELD_HIGH = 7;
localparam PMA_CDR_REFCLK_RECEIVER_DETECT_SRC_ADDR_FIELD_SIZE = 1;
localparam PMA_CDR_REFCLK_RECEIVER_DETECT_SRC_ADDR_FIELD_BITMASK = 32'h00000080;
localparam PMA_CDR_REFCLK_RECEIVER_DETECT_SRC_ADDR_FIELD_VALMASK = 32'h00000080;
localparam PMA_CDR_REFCLK_RECEIVER_DETECT_SRC_ADDR_FIELD_VALUE = 1'h1;

localparam PMA_CDR_REFCLK_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam PMA_CDR_REFCLK_REFCLK_SELECT_VALUE = "ref_iqclk0";

localparam HSSI_RX_PCS_PMA_INTERFACE_BLOCK_SEL_VALUE = "ten_g_pcs";
localparam HSSI_RX_PCS_PMA_INTERFACE_BLOCK_SEL_ADDR_OFST = 10;
localparam HSSI_RX_PCS_PMA_INTERFACE_BLOCK_SEL_ADDR_FIELD_OFST = 0;
localparam HSSI_RX_PCS_PMA_INTERFACE_BLOCK_SEL_ADDR_FIELD_HIGH = 1;
localparam HSSI_RX_PCS_PMA_INTERFACE_BLOCK_SEL_ADDR_FIELD_SIZE = 2;
localparam HSSI_RX_PCS_PMA_INTERFACE_BLOCK_SEL_ADDR_FIELD_BITMASK = 32'h00000003;
localparam HSSI_RX_PCS_PMA_INTERFACE_BLOCK_SEL_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_RX_PCS_PMA_INTERFACE_BLOCK_SEL_ADDR_FIELD_VALUE = 2'h2;

localparam HSSI_RX_PCS_PMA_INTERFACE_CHANNEL_OPERATION_MODE_VALUE = "tx_rx_pair_enabled";

localparam HSSI_RX_PCS_PMA_INTERFACE_CLKSLIP_SEL_VALUE = "pld";
localparam HSSI_RX_PCS_PMA_INTERFACE_CLKSLIP_SEL_ADDR_OFST = 10;
localparam HSSI_RX_PCS_PMA_INTERFACE_CLKSLIP_SEL_ADDR_FIELD_OFST = 2;
localparam HSSI_RX_PCS_PMA_INTERFACE_CLKSLIP_SEL_ADDR_FIELD_HIGH = 2;
localparam HSSI_RX_PCS_PMA_INTERFACE_CLKSLIP_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_RX_PCS_PMA_INTERFACE_CLKSLIP_SEL_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_RX_PCS_PMA_INTERFACE_CLKSLIP_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_RX_PCS_PMA_INTERFACE_CLKSLIP_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_RX_PCS_PMA_INTERFACE_LPBK_EN_VALUE = "disable";

localparam HSSI_RX_PCS_PMA_INTERFACE_MASTER_CLK_SEL_VALUE = "master_rx_pma_clk";
localparam HSSI_RX_PCS_PMA_INTERFACE_MASTER_CLK_SEL_ADDR_OFST = 10;
localparam HSSI_RX_PCS_PMA_INTERFACE_MASTER_CLK_SEL_ADDR_FIELD_OFST = 5;
localparam HSSI_RX_PCS_PMA_INTERFACE_MASTER_CLK_SEL_ADDR_FIELD_HIGH = 6;
localparam HSSI_RX_PCS_PMA_INTERFACE_MASTER_CLK_SEL_ADDR_FIELD_SIZE = 2;
localparam HSSI_RX_PCS_PMA_INTERFACE_MASTER_CLK_SEL_ADDR_FIELD_BITMASK = 32'h00000060;
localparam HSSI_RX_PCS_PMA_INTERFACE_MASTER_CLK_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_RX_PCS_PMA_INTERFACE_MASTER_CLK_SEL_ADDR_FIELD_VALUE = 2'h0;

localparam HSSI_RX_PCS_PMA_INTERFACE_PLDIF_DATAWIDTH_MODE_VALUE = "pldif_data_10bit";
localparam HSSI_RX_PCS_PMA_INTERFACE_PLDIF_DATAWIDTH_MODE_ADDR_OFST = 15;
localparam HSSI_RX_PCS_PMA_INTERFACE_PLDIF_DATAWIDTH_MODE_ADDR_FIELD_OFST = 7;
localparam HSSI_RX_PCS_PMA_INTERFACE_PLDIF_DATAWIDTH_MODE_ADDR_FIELD_HIGH = 7;
localparam HSSI_RX_PCS_PMA_INTERFACE_PLDIF_DATAWIDTH_MODE_ADDR_FIELD_SIZE = 1;
localparam HSSI_RX_PCS_PMA_INTERFACE_PLDIF_DATAWIDTH_MODE_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_RX_PCS_PMA_INTERFACE_PLDIF_DATAWIDTH_MODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_RX_PCS_PMA_INTERFACE_PLDIF_DATAWIDTH_MODE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_RX_PCS_PMA_INTERFACE_PMA_DW_RX_VALUE = "pma_32b_rx";

localparam HSSI_RX_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_VALUE = "dft_dis";
localparam HSSI_RX_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_ADDR_OFST = 15;
localparam HSSI_RX_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_ADDR_FIELD_OFST = 2;
localparam HSSI_RX_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_ADDR_FIELD_HIGH = 2;
localparam HSSI_RX_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_RX_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_RX_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_RX_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_RX_PCS_PMA_INTERFACE_PMA_IF_DFT_VAL_VALUE = "dft_0";
localparam HSSI_RX_PCS_PMA_INTERFACE_PMA_IF_DFT_VAL_ADDR_OFST = 15;
localparam HSSI_RX_PCS_PMA_INTERFACE_PMA_IF_DFT_VAL_ADDR_FIELD_OFST = 3;
localparam HSSI_RX_PCS_PMA_INTERFACE_PMA_IF_DFT_VAL_ADDR_FIELD_HIGH = 3;
localparam HSSI_RX_PCS_PMA_INTERFACE_PMA_IF_DFT_VAL_ADDR_FIELD_SIZE = 1;
localparam HSSI_RX_PCS_PMA_INTERFACE_PMA_IF_DFT_VAL_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_RX_PCS_PMA_INTERFACE_PMA_IF_DFT_VAL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_RX_PCS_PMA_INTERFACE_PMA_IF_DFT_VAL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS9_DWIDTH_VALUE = "prbs9_64b";
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS9_DWIDTH_ADDR_OFST = 12;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS9_DWIDTH_ADDR_FIELD_OFST = 3;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS9_DWIDTH_ADDR_FIELD_HIGH = 3;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS9_DWIDTH_ADDR_FIELD_SIZE = 1;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS9_DWIDTH_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS9_DWIDTH_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS9_DWIDTH_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_CLKEN_VALUE = "prbs_clk_dis";
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_CLKEN_ADDR_OFST = 10;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_CLKEN_ADDR_FIELD_OFST = 7;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_CLKEN_ADDR_FIELD_HIGH = 7;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_CLKEN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_CLKEN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_CLKEN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_VER_VALUE = "prbs_off";
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_VER_ADDR0_OFST = 11;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_VER_ADDR0_FIELD_OFST = 4;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_VER_ADDR0_FIELD_HIGH = 7;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_VER_ADDR0_FIELD_SIZE = 4;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_VER_ADDR0_FIELD_BITMASK = 32'h000000F0;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_VER_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_VER_ADDR0_FIELD_VALUE = 4'h0;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_VER_ADDR1_OFST = 12;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_VER_ADDR1_FIELD_OFST = 0;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_VER_ADDR1_FIELD_HIGH = 0;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_VER_ADDR1_FIELD_SIZE = 1;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_VER_ADDR1_FIELD_BITMASK = 32'h00000001;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_VER_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam HSSI_RX_PCS_PMA_INTERFACE_PRBS_VER_ADDR1_FIELD_VALUE = 1'h0;

localparam HSSI_RX_PCS_PMA_INTERFACE_PROT_MODE_RX_VALUE = "teng_krfec_mode_rx";

localparam HSSI_RX_PCS_PMA_INTERFACE_RX_DYN_POLARITY_INVERSION_VALUE = "rx_dyn_polinv_dis";
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_DYN_POLARITY_INVERSION_ADDR_OFST = 11;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_DYN_POLARITY_INVERSION_ADDR_FIELD_OFST = 0;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_DYN_POLARITY_INVERSION_ADDR_FIELD_HIGH = 0;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_DYN_POLARITY_INVERSION_ADDR_FIELD_SIZE = 1;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_DYN_POLARITY_INVERSION_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_DYN_POLARITY_INVERSION_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_DYN_POLARITY_INVERSION_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_RX_PCS_PMA_INTERFACE_RX_LPBK_EN_VALUE = "lpbk_dis";
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_LPBK_EN_ADDR_OFST = 10;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_LPBK_EN_ADDR_FIELD_OFST = 3;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_LPBK_EN_ADDR_FIELD_HIGH = 3;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_LPBK_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_LPBK_EN_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_LPBK_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_LPBK_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_FORCE_SIGNAL_OK_VALUE = "force_sig_ok";
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_FORCE_SIGNAL_OK_ADDR_OFST = 12;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_FORCE_SIGNAL_OK_ADDR_FIELD_OFST = 1;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_FORCE_SIGNAL_OK_ADDR_FIELD_HIGH = 1;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_FORCE_SIGNAL_OK_ADDR_FIELD_SIZE = 1;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_FORCE_SIGNAL_OK_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_FORCE_SIGNAL_OK_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_FORCE_SIGNAL_OK_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_MASK_VALUE = "prbsmask128";
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_MASK_ADDR_OFST = 11;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_MASK_ADDR_FIELD_OFST = 2;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_MASK_ADDR_FIELD_HIGH = 3;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_MASK_ADDR_FIELD_SIZE = 2;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_MASK_ADDR_FIELD_BITMASK = 32'h0000000C;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_MASK_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_MASK_ADDR_FIELD_VALUE = 2'h0;

localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_MODE_VALUE = "teng_mode";
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_MODE_ADDR_OFST = 11;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_MODE_ADDR_FIELD_OFST = 1;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_MODE_ADDR_FIELD_HIGH = 1;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_MODE_ADDR_FIELD_SIZE = 1;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_MODE_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_MODE_ADDR_FIELD_VALMASK = 32'h00000002;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_PRBS_MODE_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_RX_PCS_PMA_INTERFACE_RX_SIGNALOK_SIGNALDET_SEL_VALUE = "sel_sig_det";
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_SIGNALOK_SIGNALDET_SEL_ADDR_OFST = 12;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_SIGNALOK_SIGNALDET_SEL_ADDR_FIELD_OFST = 2;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_SIGNALOK_SIGNALDET_SEL_ADDR_FIELD_HIGH = 2;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_SIGNALOK_SIGNALDET_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_SIGNALOK_SIGNALDET_SEL_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_SIGNALOK_SIGNALDET_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_SIGNALOK_SIGNALDET_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_RX_PCS_PMA_INTERFACE_RX_STATIC_POLARITY_INVERSION_VALUE = "rx_stat_polinv_dis";
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_STATIC_POLARITY_INVERSION_ADDR_OFST = 10;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_STATIC_POLARITY_INVERSION_ADDR_FIELD_OFST = 4;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_STATIC_POLARITY_INVERSION_ADDR_FIELD_HIGH = 4;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_STATIC_POLARITY_INVERSION_ADDR_FIELD_SIZE = 1;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_STATIC_POLARITY_INVERSION_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_STATIC_POLARITY_INVERSION_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_RX_PCS_PMA_INTERFACE_RX_STATIC_POLARITY_INVERSION_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_RX_PCS_PMA_INTERFACE_SUP_MODE_VALUE = "user_mode";

localparam HSSI_RX_PCS_PMA_INTERFACE_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS10G_ADVANCED_USER_MODE_RX_VALUE = "disable";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_KRFEC_CHANNEL_OPERATION_MODE_VALUE = "tx_rx_pair_enabled";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS10G_CHANNEL_OPERATION_MODE_VALUE = "tx_rx_pair_enabled";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS8G_CHANNEL_OPERATION_MODE_VALUE = "tx_rx_pair_enabled";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_CHANNEL_OPERATION_MODE_VALUE = "tx_rx_pair_enabled";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PMA_IF_CHANNEL_OPERATION_MODE_VALUE = "tx_rx_pair_enabled";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_SHARE_FIFO_MEM_CHANNEL_OPERATION_MODE_VALUE = "tx_rx_pair_enabled";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_CLKLOW_CLK_HZ_VALUE = 30'd322265625;

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_CTRL_PLANE_BONDING_RX_VALUE = "individual_rx";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS10G_FIFO_MODE_RX_VALUE = "reg_rx";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS8G_FIFO_MODE_RX_VALUE = "reg_rx";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_FREF_CLK_HZ_VALUE = 30'd322265625;

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_FREQUENCY_RULES_EN_VALUE = "enable";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_FUNC_MODE_VALUE = "enable";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_HCLK_CLK_HZ_VALUE = 30'd0;

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_HIP_EN_VALUE = "disable";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS8G_HIP_MODE_VALUE = "disable";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_HRDRSTCTL_EN_VALUE = "disable";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PLD_IF_HRDRSTCTL_EN_VALUE = "disable";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_KRFEC_LOW_LATENCY_EN_RX_VALUE = "disable";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS10G_LOW_LATENCY_EN_RX_VALUE = "disable";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_LOW_LATENCY_EN_RX_VALUE = "disable";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_KRFEC_LPBK_EN_VALUE = "disable";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS10G_LPBK_EN_VALUE = "disable";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS8G_LPBK_EN_VALUE = "disable";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_LPBK_EN_VALUE = "disable";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PMA_IF_LPBK_EN_VALUE = "disable";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_OPERATING_VOLTAGE_VALUE = "standard";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PCS_AC_PWR_RULES_EN_VALUE = "disable";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PCS_PAIR_AC_PWR_UW_PER_MHZ_VALUE = 20'd0;

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PCS_RX_AC_PWR_UW_PER_MHZ_VALUE = 20'd0;

localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_BLOCK_SEL_VALUE = "teng";
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_BLOCK_SEL_ADDR_OFST = 36;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_BLOCK_SEL_ADDR_FIELD_OFST = 0;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_BLOCK_SEL_ADDR_FIELD_HIGH = 1;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_BLOCK_SEL_ADDR_FIELD_SIZE = 2;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_BLOCK_SEL_ADDR_FIELD_BITMASK = 32'h00000003;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_BLOCK_SEL_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_BLOCK_SEL_ADDR_FIELD_VALUE = 2'h1;

localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_CLK_OUT_SEL_VALUE = "teng_clk_out";
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_CLK_OUT_SEL_ADDR_OFST = 36;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_CLK_OUT_SEL_ADDR_FIELD_OFST = 6;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_CLK_OUT_SEL_ADDR_FIELD_HIGH = 7;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_CLK_OUT_SEL_ADDR_FIELD_SIZE = 2;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_CLK_OUT_SEL_ADDR_FIELD_BITMASK = 32'h000000C0;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_CLK_OUT_SEL_ADDR_FIELD_VALMASK = 32'h00000040;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_CLK_OUT_SEL_ADDR_FIELD_VALUE = 2'h1;

localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_CLK_SEL_VALUE = "pcs_rx_clk";
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_CLK_SEL_ADDR_OFST = 36;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_CLK_SEL_ADDR_FIELD_OFST = 2;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_CLK_SEL_ADDR_FIELD_HIGH = 2;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_CLK_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_CLK_SEL_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_CLK_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_CLK_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_HIP_CLK_EN_VALUE = "hip_rx_disable";
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_HIP_CLK_EN_ADDR_OFST = 36;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_HIP_CLK_EN_ADDR_FIELD_OFST = 5;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_HIP_CLK_EN_ADDR_FIELD_HIGH = 5;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_HIP_CLK_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_HIP_CLK_EN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_HIP_CLK_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_HIP_CLK_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_OUTPUT_SEL_VALUE = "teng_output";
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_OUTPUT_SEL_ADDR_OFST = 36;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_OUTPUT_SEL_ADDR_FIELD_OFST = 3;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_OUTPUT_SEL_ADDR_FIELD_HIGH = 3;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_OUTPUT_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_OUTPUT_SEL_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_OUTPUT_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_RX_PLD_PCS_INTERFACE_PCS_RX_OUTPUT_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PCS_RX_PWR_SCALING_CLK_VALUE = "pma_rx_clk";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PLD_8G_REFCLK_DIG_NONATPG_MODE_CLK_HZ_VALUE = 30'd0;

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PLD_FIFO_MODE_RX_VALUE = "reg_rx";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PLD_PCS_REFCLK_DIG_NONATPG_MODE_CLK_HZ_VALUE = 30'd0;

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PLD_RX_CLK_HZ_VALUE = 30'd0;

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS10G_PMA_DW_RX_VALUE = "pma_32b_rx";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS8G_PMA_DW_RX_VALUE = "pma_10b_rx";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PMA_DW_RX_VALUE = "pma_32b_rx";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PMA_IF_PMA_DW_RX_VALUE = "pma_32b_rx";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PMA_RX_CLK_HZ_VALUE = 30'd322265625;

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_G3PCS_PROT_MODE_VALUE = "disabled_prot_mode";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_KRFEC_PROT_MODE_RX_VALUE = "disabled_prot_mode_rx";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS10G_PROT_MODE_RX_VALUE = "teng_1588_mode_rx";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS8G_PROT_MODE_RX_VALUE = "disabled_prot_mode_rx";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PROT_MODE_RX_VALUE = "teng_1588_baser_rx";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PLD_IF_PROT_MODE_RX_VALUE = "teng_reg_mode_rx";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PMA_IF_PROT_MODE_RX_VALUE = "teng_krfec_mode_rx";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_SHARE_FIFO_MEM_PROT_MODE_RX_VALUE = "teng_mode_rx";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS10G_SHARED_FIFO_WIDTH_RX_VALUE = "single_rx";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_SHARED_FIFO_WIDTH_RX_VALUE = "single_rx";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_SHARE_FIFO_MEM_SHARED_FIFO_WIDTH_RX_VALUE = "single_rx";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PMA_IF_SIM_MODE_VALUE = "disable";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_SPEED_GRADE_VALUE = "e2";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_G3PCS_SUP_MODE_VALUE = "user_mode";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_KRFEC_SUP_MODE_VALUE = "user_mode";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS10G_SUP_MODE_VALUE = "user_mode";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS8G_SUP_MODE_VALUE = "user_mode";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_SUP_MODE_VALUE = "user_mode";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PLD_IF_SUP_MODE_VALUE = "user_mode";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PMA_IF_SUP_MODE_VALUE = "user_mode";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_SHARE_FIFO_MEM_SUP_MODE_VALUE = "user_mode";

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_KRFEC_TEST_BUS_MODE_VALUE = "tx";
localparam HSSI_RX_PLD_PCS_INTERFACE_HD_KRFEC_TEST_BUS_MODE_ADDR_OFST = 196;
localparam HSSI_RX_PLD_PCS_INTERFACE_HD_KRFEC_TEST_BUS_MODE_ADDR_FIELD_OFST = 0;
localparam HSSI_RX_PLD_PCS_INTERFACE_HD_KRFEC_TEST_BUS_MODE_ADDR_FIELD_HIGH = 0;
localparam HSSI_RX_PLD_PCS_INTERFACE_HD_KRFEC_TEST_BUS_MODE_ADDR_FIELD_SIZE = 1;
localparam HSSI_RX_PLD_PCS_INTERFACE_HD_KRFEC_TEST_BUS_MODE_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_RX_PLD_PCS_INTERFACE_HD_KRFEC_TEST_BUS_MODE_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_RX_PLD_PCS_INTERFACE_HD_KRFEC_TEST_BUS_MODE_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS10G_TEST_BUS_MODE_VALUE = "rx";
localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS10G_TEST_BUS_MODE_ADDR_OFST = 184;
localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS10G_TEST_BUS_MODE_ADDR_FIELD_OFST = 0;
localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS10G_TEST_BUS_MODE_ADDR_FIELD_HIGH = 0;
localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS10G_TEST_BUS_MODE_ADDR_FIELD_SIZE = 1;
localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS10G_TEST_BUS_MODE_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS10G_TEST_BUS_MODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS10G_TEST_BUS_MODE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_RX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_TRANSPARENT_PCS_RX_VALUE = "disable";

localparam HSSI_RX_PLD_PCS_INTERFACE_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam HSSI_TX_PCS_PMA_INTERFACE_BYPASS_PMA_TXELECIDLE_VALUE = "true";
localparam HSSI_TX_PCS_PMA_INTERFACE_BYPASS_PMA_TXELECIDLE_ADDR_OFST = 7;
localparam HSSI_TX_PCS_PMA_INTERFACE_BYPASS_PMA_TXELECIDLE_ADDR_FIELD_OFST = 0;
localparam HSSI_TX_PCS_PMA_INTERFACE_BYPASS_PMA_TXELECIDLE_ADDR_FIELD_HIGH = 0;
localparam HSSI_TX_PCS_PMA_INTERFACE_BYPASS_PMA_TXELECIDLE_ADDR_FIELD_SIZE = 1;
localparam HSSI_TX_PCS_PMA_INTERFACE_BYPASS_PMA_TXELECIDLE_ADDR_FIELD_BITMASK = 32'h00000001;
localparam HSSI_TX_PCS_PMA_INTERFACE_BYPASS_PMA_TXELECIDLE_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_TX_PCS_PMA_INTERFACE_BYPASS_PMA_TXELECIDLE_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_TX_PCS_PMA_INTERFACE_CHANNEL_OPERATION_MODE_VALUE = "tx_rx_pair_enabled";

localparam HSSI_TX_PCS_PMA_INTERFACE_LPBK_EN_VALUE = "disable";

localparam HSSI_TX_PCS_PMA_INTERFACE_MASTER_CLK_SEL_VALUE = "master_tx_pma_clk";
localparam HSSI_TX_PCS_PMA_INTERFACE_MASTER_CLK_SEL_ADDR_OFST = 6;
localparam HSSI_TX_PCS_PMA_INTERFACE_MASTER_CLK_SEL_ADDR_FIELD_OFST = 4;
localparam HSSI_TX_PCS_PMA_INTERFACE_MASTER_CLK_SEL_ADDR_FIELD_HIGH = 4;
localparam HSSI_TX_PCS_PMA_INTERFACE_MASTER_CLK_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_TX_PCS_PMA_INTERFACE_MASTER_CLK_SEL_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_TX_PCS_PMA_INTERFACE_MASTER_CLK_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_TX_PCS_PMA_INTERFACE_MASTER_CLK_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_TX_PCS_PMA_INTERFACE_PCIE_SUB_PROT_MODE_TX_VALUE = "other_prot_mode";

localparam HSSI_TX_PCS_PMA_INTERFACE_PLDIF_DATAWIDTH_MODE_VALUE = "pldif_data_10bit";
localparam HSSI_TX_PCS_PMA_INTERFACE_PLDIF_DATAWIDTH_MODE_ADDR_OFST = 8;
localparam HSSI_TX_PCS_PMA_INTERFACE_PLDIF_DATAWIDTH_MODE_ADDR_FIELD_OFST = 7;
localparam HSSI_TX_PCS_PMA_INTERFACE_PLDIF_DATAWIDTH_MODE_ADDR_FIELD_HIGH = 7;
localparam HSSI_TX_PCS_PMA_INTERFACE_PLDIF_DATAWIDTH_MODE_ADDR_FIELD_SIZE = 1;
localparam HSSI_TX_PCS_PMA_INTERFACE_PLDIF_DATAWIDTH_MODE_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_TX_PCS_PMA_INTERFACE_PLDIF_DATAWIDTH_MODE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_TX_PCS_PMA_INTERFACE_PLDIF_DATAWIDTH_MODE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_TX_PCS_PMA_INTERFACE_PMA_DW_TX_VALUE = "pma_32b_tx";

localparam HSSI_TX_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_VALUE = "dft_dis";
localparam HSSI_TX_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_ADDR_OFST = 15;
localparam HSSI_TX_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_ADDR_FIELD_OFST = 4;
localparam HSSI_TX_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_ADDR_FIELD_HIGH = 4;
localparam HSSI_TX_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_TX_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_TX_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_TX_PCS_PMA_INTERFACE_PMA_IF_DFT_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_TX_PCS_PMA_INTERFACE_PMAGATE_EN_VALUE = "pmagate_dis";
localparam HSSI_TX_PCS_PMA_INTERFACE_PMAGATE_EN_ADDR_OFST = 7;
localparam HSSI_TX_PCS_PMA_INTERFACE_PMAGATE_EN_ADDR_FIELD_OFST = 1;
localparam HSSI_TX_PCS_PMA_INTERFACE_PMAGATE_EN_ADDR_FIELD_HIGH = 1;
localparam HSSI_TX_PCS_PMA_INTERFACE_PMAGATE_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_TX_PCS_PMA_INTERFACE_PMAGATE_EN_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_TX_PCS_PMA_INTERFACE_PMAGATE_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_TX_PCS_PMA_INTERFACE_PMAGATE_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS9_DWIDTH_VALUE = "prbs9_64b";
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS9_DWIDTH_ADDR_OFST = 6;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS9_DWIDTH_ADDR_FIELD_OFST = 3;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS9_DWIDTH_ADDR_FIELD_HIGH = 3;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS9_DWIDTH_ADDR_FIELD_SIZE = 1;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS9_DWIDTH_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS9_DWIDTH_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS9_DWIDTH_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_CLKEN_VALUE = "prbs_clk_dis";
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_CLKEN_ADDR_OFST = 6;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_CLKEN_ADDR_FIELD_OFST = 6;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_CLKEN_ADDR_FIELD_HIGH = 6;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_CLKEN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_CLKEN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_CLKEN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_GEN_PAT_VALUE = "prbs_gen_dis";
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_GEN_PAT_ADDR0_OFST = 7;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_GEN_PAT_ADDR0_FIELD_OFST = 4;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_GEN_PAT_ADDR0_FIELD_HIGH = 7;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_GEN_PAT_ADDR0_FIELD_SIZE = 4;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_GEN_PAT_ADDR0_FIELD_BITMASK = 32'h000000F0;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_GEN_PAT_ADDR0_FIELD_VALMASK = 32'h00000000;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_GEN_PAT_ADDR0_FIELD_VALUE = 4'h0;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_GEN_PAT_ADDR1_OFST = 8;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_GEN_PAT_ADDR1_FIELD_OFST = 4;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_GEN_PAT_ADDR1_FIELD_HIGH = 4;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_GEN_PAT_ADDR1_FIELD_SIZE = 1;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_GEN_PAT_ADDR1_FIELD_BITMASK = 32'h00000010;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_GEN_PAT_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam HSSI_TX_PCS_PMA_INTERFACE_PRBS_GEN_PAT_ADDR1_FIELD_VALUE = 1'h0;

localparam HSSI_TX_PCS_PMA_INTERFACE_PROT_MODE_TX_VALUE = "teng_krfec_mode_tx";

localparam HSSI_TX_PCS_PMA_INTERFACE_SQ_WAVE_NUM_VALUE = "sq_wave_default";
localparam HSSI_TX_PCS_PMA_INTERFACE_SQ_WAVE_NUM_ADDR_OFST = 8;
localparam HSSI_TX_PCS_PMA_INTERFACE_SQ_WAVE_NUM_ADDR_FIELD_OFST = 0;
localparam HSSI_TX_PCS_PMA_INTERFACE_SQ_WAVE_NUM_ADDR_FIELD_HIGH = 3;
localparam HSSI_TX_PCS_PMA_INTERFACE_SQ_WAVE_NUM_ADDR_FIELD_SIZE = 4;
localparam HSSI_TX_PCS_PMA_INTERFACE_SQ_WAVE_NUM_ADDR_FIELD_BITMASK = 32'h0000000F;
localparam HSSI_TX_PCS_PMA_INTERFACE_SQ_WAVE_NUM_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_TX_PCS_PMA_INTERFACE_SQ_WAVE_NUM_ADDR_FIELD_VALUE = 4'h4;

localparam HSSI_TX_PCS_PMA_INTERFACE_SQWGEN_CLKEN_VALUE = "sqwgen_clk_dis";
localparam HSSI_TX_PCS_PMA_INTERFACE_SQWGEN_CLKEN_ADDR_OFST = 6;
localparam HSSI_TX_PCS_PMA_INTERFACE_SQWGEN_CLKEN_ADDR_FIELD_OFST = 7;
localparam HSSI_TX_PCS_PMA_INTERFACE_SQWGEN_CLKEN_ADDR_FIELD_HIGH = 7;
localparam HSSI_TX_PCS_PMA_INTERFACE_SQWGEN_CLKEN_ADDR_FIELD_SIZE = 1;
localparam HSSI_TX_PCS_PMA_INTERFACE_SQWGEN_CLKEN_ADDR_FIELD_BITMASK = 32'h00000080;
localparam HSSI_TX_PCS_PMA_INTERFACE_SQWGEN_CLKEN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_TX_PCS_PMA_INTERFACE_SQWGEN_CLKEN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_TX_PCS_PMA_INTERFACE_SUP_MODE_VALUE = "user_mode";

localparam HSSI_TX_PCS_PMA_INTERFACE_TX_DYN_POLARITY_INVERSION_VALUE = "tx_dyn_polinv_dis";
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_DYN_POLARITY_INVERSION_ADDR_OFST = 7;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_DYN_POLARITY_INVERSION_ADDR_FIELD_OFST = 3;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_DYN_POLARITY_INVERSION_ADDR_FIELD_HIGH = 3;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_DYN_POLARITY_INVERSION_ADDR_FIELD_SIZE = 1;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_DYN_POLARITY_INVERSION_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_DYN_POLARITY_INVERSION_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_DYN_POLARITY_INVERSION_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_TX_PCS_PMA_INTERFACE_TX_PMA_DATA_SEL_VALUE = "ten_g_pcs";
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_PMA_DATA_SEL_ADDR0_OFST = 6;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_PMA_DATA_SEL_ADDR0_FIELD_OFST = 0;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_PMA_DATA_SEL_ADDR0_FIELD_HIGH = 2;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_PMA_DATA_SEL_ADDR0_FIELD_SIZE = 3;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_PMA_DATA_SEL_ADDR0_FIELD_BITMASK = 32'h00000007;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_PMA_DATA_SEL_ADDR0_FIELD_VALMASK = 32'h00000003;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_PMA_DATA_SEL_ADDR0_FIELD_VALUE = 3'h3;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_PMA_DATA_SEL_ADDR1_OFST = 8;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_PMA_DATA_SEL_ADDR1_FIELD_OFST = 5;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_PMA_DATA_SEL_ADDR1_FIELD_HIGH = 6;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_PMA_DATA_SEL_ADDR1_FIELD_SIZE = 2;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_PMA_DATA_SEL_ADDR1_FIELD_BITMASK = 32'h00000060;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_PMA_DATA_SEL_ADDR1_FIELD_VALMASK = 32'h00000000;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_PMA_DATA_SEL_ADDR1_FIELD_VALUE = 2'h0;

localparam HSSI_TX_PCS_PMA_INTERFACE_TX_STATIC_POLARITY_INVERSION_VALUE = "tx_stat_polinv_dis";
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_STATIC_POLARITY_INVERSION_ADDR_OFST = 7;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_STATIC_POLARITY_INVERSION_ADDR_FIELD_OFST = 2;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_STATIC_POLARITY_INVERSION_ADDR_FIELD_HIGH = 2;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_STATIC_POLARITY_INVERSION_ADDR_FIELD_SIZE = 1;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_STATIC_POLARITY_INVERSION_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_STATIC_POLARITY_INVERSION_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_TX_PCS_PMA_INTERFACE_TX_STATIC_POLARITY_INVERSION_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_TX_PCS_PMA_INTERFACE_SILICON_REV_VALUE = "14nm5bcr2eb";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS10G_ADVANCED_USER_MODE_TX_VALUE = "disable";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_KRFEC_CHANNEL_OPERATION_MODE_VALUE = "tx_rx_pair_enabled";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS10G_CHANNEL_OPERATION_MODE_VALUE = "tx_rx_pair_enabled";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS8G_CHANNEL_OPERATION_MODE_VALUE = "tx_rx_pair_enabled";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_CHANNEL_OPERATION_MODE_VALUE = "tx_rx_pair_enabled";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PMA_IF_CHANNEL_OPERATION_MODE_VALUE = "tx_rx_pair_enabled";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_SHARE_FIFO_MEM_CHANNEL_OPERATION_MODE_VALUE = "tx_rx_pair_enabled";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PMA_IF_CTRL_PLANE_BONDING_VALUE = "individual";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_CTRL_PLANE_BONDING_TX_VALUE = "individual_tx";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS10G_FIFO_MODE_TX_VALUE = "reg_tx";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS8G_FIFO_MODE_TX_VALUE = "reg_tx";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_FREQUENCY_RULES_EN_VALUE = "enable";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_FUNC_MODE_VALUE = "enable";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_HCLK_CLK_HZ_VALUE = 30'd0;

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_HIP_EN_VALUE = "disable";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS8G_HIP_MODE_VALUE = "disable";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_HRDRSTCTL_EN_VALUE = "disable";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PLD_IF_HRDRSTCTL_EN_VALUE = "disable";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_KRFEC_LOW_LATENCY_EN_TX_VALUE = "disable";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS10G_LOW_LATENCY_EN_TX_VALUE = "disable";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_LOW_LATENCY_EN_TX_VALUE = "disable";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_KRFEC_LPBK_EN_VALUE = "disable";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS10G_LPBK_EN_VALUE = "disable";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS8G_LPBK_EN_VALUE = "disable";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_LPBK_EN_VALUE = "disable";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PMA_IF_LPBK_EN_VALUE = "disable";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PCS_TX_AC_PWR_UW_PER_MHZ_VALUE = 20'd0;

localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_CLK_OUT_SEL_VALUE = "teng_clk_out";
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_CLK_OUT_SEL_ADDR_OFST = 34;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_CLK_OUT_SEL_ADDR_FIELD_OFST = 0;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_CLK_OUT_SEL_ADDR_FIELD_HIGH = 1;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_CLK_OUT_SEL_ADDR_FIELD_SIZE = 2;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_CLK_OUT_SEL_ADDR_FIELD_BITMASK = 32'h00000003;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_CLK_OUT_SEL_ADDR_FIELD_VALMASK = 32'h00000001;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_CLK_OUT_SEL_ADDR_FIELD_VALUE = 2'h1;

localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_CLK_SOURCE_VALUE = "teng";
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_CLK_SOURCE_ADDR_OFST = 34;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_CLK_SOURCE_ADDR_FIELD_OFST = 2;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_CLK_SOURCE_ADDR_FIELD_HIGH = 3;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_CLK_SOURCE_ADDR_FIELD_SIZE = 2;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_CLK_SOURCE_ADDR_FIELD_BITMASK = 32'h0000000C;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_CLK_SOURCE_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_CLK_SOURCE_ADDR_FIELD_VALUE = 2'h1;

localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DATA_SOURCE_VALUE = "hip_disable";
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DATA_SOURCE_ADDR_OFST = 32;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DATA_SOURCE_ADDR_FIELD_OFST = 1;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DATA_SOURCE_ADDR_FIELD_HIGH = 1;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DATA_SOURCE_ADDR_FIELD_SIZE = 1;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DATA_SOURCE_ADDR_FIELD_BITMASK = 32'h00000002;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DATA_SOURCE_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DATA_SOURCE_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CLK_EN_VALUE = "delay1_clk_disable";
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CLK_EN_ADDR_OFST = 32;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CLK_EN_ADDR_FIELD_OFST = 5;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CLK_EN_ADDR_FIELD_HIGH = 5;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CLK_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CLK_EN_ADDR_FIELD_BITMASK = 32'h00000020;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CLK_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CLK_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CLK_SEL_VALUE = "pcs_tx_clk";
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CLK_SEL_ADDR_OFST = 32;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CLK_SEL_ADDR_FIELD_OFST = 2;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CLK_SEL_ADDR_FIELD_HIGH = 2;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CLK_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CLK_SEL_ADDR_FIELD_BITMASK = 32'h00000004;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CLK_SEL_ADDR_FIELD_VALMASK = 32'h00000004;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CLK_SEL_ADDR_FIELD_VALUE = 1'h1;

localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CTRL_VALUE = "delay1_path0";
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CTRL_ADDR_OFST = 33;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CTRL_ADDR_FIELD_OFST = 0;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CTRL_ADDR_FIELD_HIGH = 3;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CTRL_ADDR_FIELD_SIZE = 4;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CTRL_ADDR_FIELD_BITMASK = 32'h0000000F;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CTRL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_CTRL_ADDR_FIELD_VALUE = 4'h0;

localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_DATA_SEL_VALUE = "one_ff_delay";
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_DATA_SEL_ADDR_OFST = 32;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_DATA_SEL_ADDR_FIELD_OFST = 4;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_DATA_SEL_ADDR_FIELD_HIGH = 4;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_DATA_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_DATA_SEL_ADDR_FIELD_BITMASK = 32'h00000010;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_DATA_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY1_DATA_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY2_CLK_EN_VALUE = "delay2_clk_disable";
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY2_CLK_EN_ADDR_OFST = 32;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY2_CLK_EN_ADDR_FIELD_OFST = 6;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY2_CLK_EN_ADDR_FIELD_HIGH = 6;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY2_CLK_EN_ADDR_FIELD_SIZE = 1;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY2_CLK_EN_ADDR_FIELD_BITMASK = 32'h00000040;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY2_CLK_EN_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY2_CLK_EN_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY2_CTRL_VALUE = "delay2_path0";
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY2_CTRL_ADDR_OFST = 33;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY2_CTRL_ADDR_FIELD_OFST = 4;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY2_CTRL_ADDR_FIELD_HIGH = 7;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY2_CTRL_ADDR_FIELD_SIZE = 4;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY2_CTRL_ADDR_FIELD_BITMASK = 32'h000000F0;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY2_CTRL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_DELAY2_CTRL_ADDR_FIELD_VALUE = 4'h0;

localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_OUTPUT_SEL_VALUE = "teng_output";
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_OUTPUT_SEL_ADDR_OFST = 32;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_OUTPUT_SEL_ADDR_FIELD_OFST = 3;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_OUTPUT_SEL_ADDR_FIELD_HIGH = 3;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_OUTPUT_SEL_ADDR_FIELD_SIZE = 1;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_OUTPUT_SEL_ADDR_FIELD_BITMASK = 32'h00000008;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_OUTPUT_SEL_ADDR_FIELD_VALMASK = 32'h00000000;
localparam HSSI_TX_PLD_PCS_INTERFACE_PCS_TX_OUTPUT_SEL_ADDR_FIELD_VALUE = 1'h0;

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PCS_TX_PWR_SCALING_CLK_VALUE = "pma_tx_clk";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PLD_8G_REFCLK_DIG_NONATPG_MODE_CLK_HZ_VALUE = 30'd0;

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PLD_FIFO_MODE_TX_VALUE = "reg_tx";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PLD_PCS_REFCLK_DIG_NONATPG_MODE_CLK_HZ_VALUE = 30'd0;

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PLD_TX_CLK_HZ_VALUE = 30'd0;

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS10G_PMA_DW_TX_VALUE = "pma_32b_tx";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS8G_PMA_DW_TX_VALUE = "pma_10b_tx";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PMA_DW_TX_VALUE = "pma_32b_tx";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PMA_IF_PMA_DW_TX_VALUE = "pma_32b_tx";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PMA_TX_CLK_HZ_VALUE = 30'd322265625;

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_G3PCS_PROT_MODE_VALUE = "disabled_prot_mode";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_KRFEC_PROT_MODE_TX_VALUE = "disabled_prot_mode_tx";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS10G_PROT_MODE_TX_VALUE = "teng_1588_mode_tx";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS8G_PROT_MODE_TX_VALUE = "disabled_prot_mode_tx";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PROT_MODE_TX_VALUE = "teng_1588_baser_tx";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PLD_IF_PROT_MODE_TX_VALUE = "teng_reg_mode_tx";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PMA_IF_PROT_MODE_TX_VALUE = "teng_krfec_mode_tx";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_SHARE_FIFO_MEM_PROT_MODE_TX_VALUE = "teng_mode_tx";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS10G_SHARED_FIFO_WIDTH_TX_VALUE = "single_tx";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_SHARED_FIFO_WIDTH_TX_VALUE = "single_tx";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_SHARE_FIFO_MEM_SHARED_FIFO_WIDTH_TX_VALUE = "single_tx";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PMA_IF_SIM_MODE_VALUE = "disable";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_SPEED_GRADE_VALUE = "e2";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_G3PCS_SUP_MODE_VALUE = "user_mode";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_KRFEC_SUP_MODE_VALUE = "user_mode";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS10G_SUP_MODE_VALUE = "user_mode";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS8G_SUP_MODE_VALUE = "user_mode";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_SUP_MODE_VALUE = "user_mode";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PLD_IF_SUP_MODE_VALUE = "user_mode";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_PMA_IF_SUP_MODE_VALUE = "user_mode";

localparam HSSI_TX_PLD_PCS_INTERFACE_HD_PCS_CHANNEL_SHARE_FIFO_MEM_SUP_MODE_VALUE = "user_mode";

localparam HSSI_TX_PLD_PCS_INTERFACE_SILICON_REV_VALUE = "14nm5bcr2eb";

endpackage