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# Address Offset
set PHY_USXGMII_CONTROL_REG             0x1000
set PHY_USXGMII_STATUS_REG              0x1004
set PHY_USXGMII_DEV_ABILITY_REG         0x1010
set PHY_USXGMII_PARTNER_ABILITY_REG     0x1014
set PHY_USXGMII_LINK_TIMER_REG          0x1048

set PHY_USXGMII_SERIAL_LOOPBACK_REG     0x1184

# Bit Offset
# USXGMII Control Register
set PHY_USXGMII_ENA                     0
set PHY_USXGMII_AN_ENA                  1
set PHY_USXGMII_SPEED                   2
set PHY_USXGMII_RESTART_AN              9
