// address_decoder_multi_channel_altera_mm_interconnect_191_yxycpgi.v

// This file was auto-generated from altera_mm_interconnect_hw.tcl.  If you edit it your changes
// will probably be lost.
// 
// Generated using ACDS version 19.4 64

`timescale 1 ps / 1 ps
module address_decoder_multi_channel_altera_mm_interconnect_191_yxycpgi (
		input  wire [31:0] master_avalon_universal_master_0_address,          //    master_avalon_universal_master_0.address
		output wire        master_avalon_universal_master_0_waitrequest,      //                                    .waitrequest
		input  wire [2:0]  master_avalon_universal_master_0_burstcount,       //                                    .burstcount
		input  wire [3:0]  master_avalon_universal_master_0_byteenable,       //                                    .byteenable
		input  wire        master_avalon_universal_master_0_read,             //                                    .read
		output wire [31:0] master_avalon_universal_master_0_readdata,         //                                    .readdata
		output wire        master_avalon_universal_master_0_readdatavalid,    //                                    .readdatavalid
		input  wire        master_avalon_universal_master_0_write,            //                                    .write
		input  wire [31:0] master_avalon_universal_master_0_writedata,        //                                    .writedata
		input  wire        master_avalon_universal_master_0_lock,             //                                    .lock
		input  wire        master_avalon_universal_master_0_debugaccess,      //                                    .debugaccess
		output wire [15:0] channel_1_avalon_universal_slave_0_address,        //  channel_1_avalon_universal_slave_0.address
		output wire        channel_1_avalon_universal_slave_0_write,          //                                    .write
		output wire        channel_1_avalon_universal_slave_0_read,           //                                    .read
		input  wire [31:0] channel_1_avalon_universal_slave_0_readdata,       //                                    .readdata
		output wire [31:0] channel_1_avalon_universal_slave_0_writedata,      //                                    .writedata
		output wire [2:0]  channel_1_avalon_universal_slave_0_burstcount,     //                                    .burstcount
		output wire [3:0]  channel_1_avalon_universal_slave_0_byteenable,     //                                    .byteenable
		input  wire        channel_1_avalon_universal_slave_0_readdatavalid,  //                                    .readdatavalid
		input  wire        channel_1_avalon_universal_slave_0_waitrequest,    //                                    .waitrequest
		output wire        channel_1_avalon_universal_slave_0_lock,           //                                    .lock
		output wire        channel_1_avalon_universal_slave_0_debugaccess,    //                                    .debugaccess
		output wire [15:0] channel_0_avalon_universal_slave_0_address,        //  channel_0_avalon_universal_slave_0.address
		output wire        channel_0_avalon_universal_slave_0_write,          //                                    .write
		output wire        channel_0_avalon_universal_slave_0_read,           //                                    .read
		input  wire [31:0] channel_0_avalon_universal_slave_0_readdata,       //                                    .readdata
		output wire [31:0] channel_0_avalon_universal_slave_0_writedata,      //                                    .writedata
		output wire [2:0]  channel_0_avalon_universal_slave_0_burstcount,     //                                    .burstcount
		output wire [3:0]  channel_0_avalon_universal_slave_0_byteenable,     //                                    .byteenable
		input  wire        channel_0_avalon_universal_slave_0_readdatavalid,  //                                    .readdatavalid
		input  wire        channel_0_avalon_universal_slave_0_waitrequest,    //                                    .waitrequest
		output wire        channel_0_avalon_universal_slave_0_lock,           //                                    .lock
		output wire        channel_0_avalon_universal_slave_0_debugaccess,    //                                    .debugaccess
		output wire [15:0] channel_2_avalon_universal_slave_0_address,        //  channel_2_avalon_universal_slave_0.address
		output wire        channel_2_avalon_universal_slave_0_write,          //                                    .write
		output wire        channel_2_avalon_universal_slave_0_read,           //                                    .read
		input  wire [31:0] channel_2_avalon_universal_slave_0_readdata,       //                                    .readdata
		output wire [31:0] channel_2_avalon_universal_slave_0_writedata,      //                                    .writedata
		output wire [2:0]  channel_2_avalon_universal_slave_0_burstcount,     //                                    .burstcount
		output wire [3:0]  channel_2_avalon_universal_slave_0_byteenable,     //                                    .byteenable
		input  wire        channel_2_avalon_universal_slave_0_readdatavalid,  //                                    .readdatavalid
		input  wire        channel_2_avalon_universal_slave_0_waitrequest,    //                                    .waitrequest
		output wire        channel_2_avalon_universal_slave_0_lock,           //                                    .lock
		output wire        channel_2_avalon_universal_slave_0_debugaccess,    //                                    .debugaccess
		output wire [15:0] channel_3_avalon_universal_slave_0_address,        //  channel_3_avalon_universal_slave_0.address
		output wire        channel_3_avalon_universal_slave_0_write,          //                                    .write
		output wire        channel_3_avalon_universal_slave_0_read,           //                                    .read
		input  wire [31:0] channel_3_avalon_universal_slave_0_readdata,       //                                    .readdata
		output wire [31:0] channel_3_avalon_universal_slave_0_writedata,      //                                    .writedata
		output wire [2:0]  channel_3_avalon_universal_slave_0_burstcount,     //                                    .burstcount
		output wire [3:0]  channel_3_avalon_universal_slave_0_byteenable,     //                                    .byteenable
		input  wire        channel_3_avalon_universal_slave_0_readdatavalid,  //                                    .readdatavalid
		input  wire        channel_3_avalon_universal_slave_0_waitrequest,    //                                    .waitrequest
		output wire        channel_3_avalon_universal_slave_0_lock,           //                                    .lock
		output wire        channel_3_avalon_universal_slave_0_debugaccess,    //                                    .debugaccess
		output wire [15:0] channel_4_avalon_universal_slave_0_address,        //  channel_4_avalon_universal_slave_0.address
		output wire        channel_4_avalon_universal_slave_0_write,          //                                    .write
		output wire        channel_4_avalon_universal_slave_0_read,           //                                    .read
		input  wire [31:0] channel_4_avalon_universal_slave_0_readdata,       //                                    .readdata
		output wire [31:0] channel_4_avalon_universal_slave_0_writedata,      //                                    .writedata
		output wire [2:0]  channel_4_avalon_universal_slave_0_burstcount,     //                                    .burstcount
		output wire [3:0]  channel_4_avalon_universal_slave_0_byteenable,     //                                    .byteenable
		input  wire        channel_4_avalon_universal_slave_0_readdatavalid,  //                                    .readdatavalid
		input  wire        channel_4_avalon_universal_slave_0_waitrequest,    //                                    .waitrequest
		output wire        channel_4_avalon_universal_slave_0_lock,           //                                    .lock
		output wire        channel_4_avalon_universal_slave_0_debugaccess,    //                                    .debugaccess
		output wire [15:0] channel_5_avalon_universal_slave_0_address,        //  channel_5_avalon_universal_slave_0.address
		output wire        channel_5_avalon_universal_slave_0_write,          //                                    .write
		output wire        channel_5_avalon_universal_slave_0_read,           //                                    .read
		input  wire [31:0] channel_5_avalon_universal_slave_0_readdata,       //                                    .readdata
		output wire [31:0] channel_5_avalon_universal_slave_0_writedata,      //                                    .writedata
		output wire [2:0]  channel_5_avalon_universal_slave_0_burstcount,     //                                    .burstcount
		output wire [3:0]  channel_5_avalon_universal_slave_0_byteenable,     //                                    .byteenable
		input  wire        channel_5_avalon_universal_slave_0_readdatavalid,  //                                    .readdatavalid
		input  wire        channel_5_avalon_universal_slave_0_waitrequest,    //                                    .waitrequest
		output wire        channel_5_avalon_universal_slave_0_lock,           //                                    .lock
		output wire        channel_5_avalon_universal_slave_0_debugaccess,    //                                    .debugaccess
		output wire [15:0] channel_6_avalon_universal_slave_0_address,        //  channel_6_avalon_universal_slave_0.address
		output wire        channel_6_avalon_universal_slave_0_write,          //                                    .write
		output wire        channel_6_avalon_universal_slave_0_read,           //                                    .read
		input  wire [31:0] channel_6_avalon_universal_slave_0_readdata,       //                                    .readdata
		output wire [31:0] channel_6_avalon_universal_slave_0_writedata,      //                                    .writedata
		output wire [2:0]  channel_6_avalon_universal_slave_0_burstcount,     //                                    .burstcount
		output wire [3:0]  channel_6_avalon_universal_slave_0_byteenable,     //                                    .byteenable
		input  wire        channel_6_avalon_universal_slave_0_readdatavalid,  //                                    .readdatavalid
		input  wire        channel_6_avalon_universal_slave_0_waitrequest,    //                                    .waitrequest
		output wire        channel_6_avalon_universal_slave_0_lock,           //                                    .lock
		output wire        channel_6_avalon_universal_slave_0_debugaccess,    //                                    .debugaccess
		output wire [15:0] channel_7_avalon_universal_slave_0_address,        //  channel_7_avalon_universal_slave_0.address
		output wire        channel_7_avalon_universal_slave_0_write,          //                                    .write
		output wire        channel_7_avalon_universal_slave_0_read,           //                                    .read
		input  wire [31:0] channel_7_avalon_universal_slave_0_readdata,       //                                    .readdata
		output wire [31:0] channel_7_avalon_universal_slave_0_writedata,      //                                    .writedata
		output wire [2:0]  channel_7_avalon_universal_slave_0_burstcount,     //                                    .burstcount
		output wire [3:0]  channel_7_avalon_universal_slave_0_byteenable,     //                                    .byteenable
		input  wire        channel_7_avalon_universal_slave_0_readdatavalid,  //                                    .readdatavalid
		input  wire        channel_7_avalon_universal_slave_0_waitrequest,    //                                    .waitrequest
		output wire        channel_7_avalon_universal_slave_0_lock,           //                                    .lock
		output wire        channel_7_avalon_universal_slave_0_debugaccess,    //                                    .debugaccess
		output wire [15:0] channel_8_avalon_universal_slave_0_address,        //  channel_8_avalon_universal_slave_0.address
		output wire        channel_8_avalon_universal_slave_0_write,          //                                    .write
		output wire        channel_8_avalon_universal_slave_0_read,           //                                    .read
		input  wire [31:0] channel_8_avalon_universal_slave_0_readdata,       //                                    .readdata
		output wire [31:0] channel_8_avalon_universal_slave_0_writedata,      //                                    .writedata
		output wire [2:0]  channel_8_avalon_universal_slave_0_burstcount,     //                                    .burstcount
		output wire [3:0]  channel_8_avalon_universal_slave_0_byteenable,     //                                    .byteenable
		input  wire        channel_8_avalon_universal_slave_0_readdatavalid,  //                                    .readdatavalid
		input  wire        channel_8_avalon_universal_slave_0_waitrequest,    //                                    .waitrequest
		output wire        channel_8_avalon_universal_slave_0_lock,           //                                    .lock
		output wire        channel_8_avalon_universal_slave_0_debugaccess,    //                                    .debugaccess
		output wire [15:0] channel_9_avalon_universal_slave_0_address,        //  channel_9_avalon_universal_slave_0.address
		output wire        channel_9_avalon_universal_slave_0_write,          //                                    .write
		output wire        channel_9_avalon_universal_slave_0_read,           //                                    .read
		input  wire [31:0] channel_9_avalon_universal_slave_0_readdata,       //                                    .readdata
		output wire [31:0] channel_9_avalon_universal_slave_0_writedata,      //                                    .writedata
		output wire [2:0]  channel_9_avalon_universal_slave_0_burstcount,     //                                    .burstcount
		output wire [3:0]  channel_9_avalon_universal_slave_0_byteenable,     //                                    .byteenable
		input  wire        channel_9_avalon_universal_slave_0_readdatavalid,  //                                    .readdatavalid
		input  wire        channel_9_avalon_universal_slave_0_waitrequest,    //                                    .waitrequest
		output wire        channel_9_avalon_universal_slave_0_lock,           //                                    .lock
		output wire        channel_9_avalon_universal_slave_0_debugaccess,    //                                    .debugaccess
		output wire [15:0] channel_10_avalon_universal_slave_0_address,       // channel_10_avalon_universal_slave_0.address
		output wire        channel_10_avalon_universal_slave_0_write,         //                                    .write
		output wire        channel_10_avalon_universal_slave_0_read,          //                                    .read
		input  wire [31:0] channel_10_avalon_universal_slave_0_readdata,      //                                    .readdata
		output wire [31:0] channel_10_avalon_universal_slave_0_writedata,     //                                    .writedata
		output wire [2:0]  channel_10_avalon_universal_slave_0_burstcount,    //                                    .burstcount
		output wire [3:0]  channel_10_avalon_universal_slave_0_byteenable,    //                                    .byteenable
		input  wire        channel_10_avalon_universal_slave_0_readdatavalid, //                                    .readdatavalid
		input  wire        channel_10_avalon_universal_slave_0_waitrequest,   //                                    .waitrequest
		output wire        channel_10_avalon_universal_slave_0_lock,          //                                    .lock
		output wire        channel_10_avalon_universal_slave_0_debugaccess,   //                                    .debugaccess
		output wire [15:0] channel_11_avalon_universal_slave_0_address,       // channel_11_avalon_universal_slave_0.address
		output wire        channel_11_avalon_universal_slave_0_write,         //                                    .write
		output wire        channel_11_avalon_universal_slave_0_read,          //                                    .read
		input  wire [31:0] channel_11_avalon_universal_slave_0_readdata,      //                                    .readdata
		output wire [31:0] channel_11_avalon_universal_slave_0_writedata,     //                                    .writedata
		output wire [2:0]  channel_11_avalon_universal_slave_0_burstcount,    //                                    .burstcount
		output wire [3:0]  channel_11_avalon_universal_slave_0_byteenable,    //                                    .byteenable
		input  wire        channel_11_avalon_universal_slave_0_readdatavalid, //                                    .readdatavalid
		input  wire        channel_11_avalon_universal_slave_0_waitrequest,   //                                    .waitrequest
		output wire        channel_11_avalon_universal_slave_0_lock,          //                                    .lock
		output wire        channel_11_avalon_universal_slave_0_debugaccess,   //                                    .debugaccess
		input  wire        master_reset_reset_bridge_in_reset_reset,          //  master_reset_reset_bridge_in_reset.reset
		input  wire        csr_clk_clk_clk                                    //                         csr_clk_clk.clk
	);

	wire          master_avalon_universal_master_0_translator_avalon_universal_master_0_waitrequest;   // master_avalon_universal_master_0_agent:av_waitrequest -> master_avalon_universal_master_0_translator:uav_waitrequest
	wire   [31:0] master_avalon_universal_master_0_translator_avalon_universal_master_0_readdata;      // master_avalon_universal_master_0_agent:av_readdata -> master_avalon_universal_master_0_translator:uav_readdata
	wire          master_avalon_universal_master_0_translator_avalon_universal_master_0_debugaccess;   // master_avalon_universal_master_0_translator:uav_debugaccess -> master_avalon_universal_master_0_agent:av_debugaccess
	wire   [31:0] master_avalon_universal_master_0_translator_avalon_universal_master_0_address;       // master_avalon_universal_master_0_translator:uav_address -> master_avalon_universal_master_0_agent:av_address
	wire          master_avalon_universal_master_0_translator_avalon_universal_master_0_read;          // master_avalon_universal_master_0_translator:uav_read -> master_avalon_universal_master_0_agent:av_read
	wire    [3:0] master_avalon_universal_master_0_translator_avalon_universal_master_0_byteenable;    // master_avalon_universal_master_0_translator:uav_byteenable -> master_avalon_universal_master_0_agent:av_byteenable
	wire          master_avalon_universal_master_0_translator_avalon_universal_master_0_readdatavalid; // master_avalon_universal_master_0_agent:av_readdatavalid -> master_avalon_universal_master_0_translator:uav_readdatavalid
	wire          master_avalon_universal_master_0_translator_avalon_universal_master_0_lock;          // master_avalon_universal_master_0_translator:uav_lock -> master_avalon_universal_master_0_agent:av_lock
	wire          master_avalon_universal_master_0_translator_avalon_universal_master_0_write;         // master_avalon_universal_master_0_translator:uav_write -> master_avalon_universal_master_0_agent:av_write
	wire   [31:0] master_avalon_universal_master_0_translator_avalon_universal_master_0_writedata;     // master_avalon_universal_master_0_translator:uav_writedata -> master_avalon_universal_master_0_agent:av_writedata
	wire    [2:0] master_avalon_universal_master_0_translator_avalon_universal_master_0_burstcount;    // master_avalon_universal_master_0_translator:uav_burstcount -> master_avalon_universal_master_0_agent:av_burstcount
	wire   [31:0] channel_1_avalon_universal_slave_0_agent_m0_readdata;                                // channel_1_avalon_universal_slave_0_translator:uav_readdata -> channel_1_avalon_universal_slave_0_agent:m0_readdata
	wire          channel_1_avalon_universal_slave_0_agent_m0_waitrequest;                             // channel_1_avalon_universal_slave_0_translator:uav_waitrequest -> channel_1_avalon_universal_slave_0_agent:m0_waitrequest
	wire          channel_1_avalon_universal_slave_0_agent_m0_debugaccess;                             // channel_1_avalon_universal_slave_0_agent:m0_debugaccess -> channel_1_avalon_universal_slave_0_translator:uav_debugaccess
	wire   [31:0] channel_1_avalon_universal_slave_0_agent_m0_address;                                 // channel_1_avalon_universal_slave_0_agent:m0_address -> channel_1_avalon_universal_slave_0_translator:uav_address
	wire    [3:0] channel_1_avalon_universal_slave_0_agent_m0_byteenable;                              // channel_1_avalon_universal_slave_0_agent:m0_byteenable -> channel_1_avalon_universal_slave_0_translator:uav_byteenable
	wire          channel_1_avalon_universal_slave_0_agent_m0_read;                                    // channel_1_avalon_universal_slave_0_agent:m0_read -> channel_1_avalon_universal_slave_0_translator:uav_read
	wire          channel_1_avalon_universal_slave_0_agent_m0_readdatavalid;                           // channel_1_avalon_universal_slave_0_translator:uav_readdatavalid -> channel_1_avalon_universal_slave_0_agent:m0_readdatavalid
	wire          channel_1_avalon_universal_slave_0_agent_m0_lock;                                    // channel_1_avalon_universal_slave_0_agent:m0_lock -> channel_1_avalon_universal_slave_0_translator:uav_lock
	wire   [31:0] channel_1_avalon_universal_slave_0_agent_m0_writedata;                               // channel_1_avalon_universal_slave_0_agent:m0_writedata -> channel_1_avalon_universal_slave_0_translator:uav_writedata
	wire          channel_1_avalon_universal_slave_0_agent_m0_write;                                   // channel_1_avalon_universal_slave_0_agent:m0_write -> channel_1_avalon_universal_slave_0_translator:uav_write
	wire    [2:0] channel_1_avalon_universal_slave_0_agent_m0_burstcount;                              // channel_1_avalon_universal_slave_0_agent:m0_burstcount -> channel_1_avalon_universal_slave_0_translator:uav_burstcount
	wire          channel_1_avalon_universal_slave_0_agent_rf_source_valid;                            // channel_1_avalon_universal_slave_0_agent:rf_source_valid -> channel_1_avalon_universal_slave_0_agent_rsp_fifo:in_valid
	wire  [117:0] channel_1_avalon_universal_slave_0_agent_rf_source_data;                             // channel_1_avalon_universal_slave_0_agent:rf_source_data -> channel_1_avalon_universal_slave_0_agent_rsp_fifo:in_data
	wire          channel_1_avalon_universal_slave_0_agent_rf_source_ready;                            // channel_1_avalon_universal_slave_0_agent_rsp_fifo:in_ready -> channel_1_avalon_universal_slave_0_agent:rf_source_ready
	wire          channel_1_avalon_universal_slave_0_agent_rf_source_startofpacket;                    // channel_1_avalon_universal_slave_0_agent:rf_source_startofpacket -> channel_1_avalon_universal_slave_0_agent_rsp_fifo:in_startofpacket
	wire          channel_1_avalon_universal_slave_0_agent_rf_source_endofpacket;                      // channel_1_avalon_universal_slave_0_agent:rf_source_endofpacket -> channel_1_avalon_universal_slave_0_agent_rsp_fifo:in_endofpacket
	wire          channel_1_avalon_universal_slave_0_agent_rsp_fifo_out_valid;                         // channel_1_avalon_universal_slave_0_agent_rsp_fifo:out_valid -> channel_1_avalon_universal_slave_0_agent:rf_sink_valid
	wire  [117:0] channel_1_avalon_universal_slave_0_agent_rsp_fifo_out_data;                          // channel_1_avalon_universal_slave_0_agent_rsp_fifo:out_data -> channel_1_avalon_universal_slave_0_agent:rf_sink_data
	wire          channel_1_avalon_universal_slave_0_agent_rsp_fifo_out_ready;                         // channel_1_avalon_universal_slave_0_agent:rf_sink_ready -> channel_1_avalon_universal_slave_0_agent_rsp_fifo:out_ready
	wire          channel_1_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket;                 // channel_1_avalon_universal_slave_0_agent_rsp_fifo:out_startofpacket -> channel_1_avalon_universal_slave_0_agent:rf_sink_startofpacket
	wire          channel_1_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket;                   // channel_1_avalon_universal_slave_0_agent_rsp_fifo:out_endofpacket -> channel_1_avalon_universal_slave_0_agent:rf_sink_endofpacket
	wire          channel_1_avalon_universal_slave_0_agent_rdata_fifo_src_valid;                       // channel_1_avalon_universal_slave_0_agent:rdata_fifo_src_valid -> channel_1_avalon_universal_slave_0_agent:rdata_fifo_sink_valid
	wire   [33:0] channel_1_avalon_universal_slave_0_agent_rdata_fifo_src_data;                        // channel_1_avalon_universal_slave_0_agent:rdata_fifo_src_data -> channel_1_avalon_universal_slave_0_agent:rdata_fifo_sink_data
	wire          channel_1_avalon_universal_slave_0_agent_rdata_fifo_src_ready;                       // channel_1_avalon_universal_slave_0_agent:rdata_fifo_sink_ready -> channel_1_avalon_universal_slave_0_agent:rdata_fifo_src_ready
	wire          cmd_mux_src_valid;                                                                   // cmd_mux:src_valid -> channel_1_avalon_universal_slave_0_agent:cp_valid
	wire  [116:0] cmd_mux_src_data;                                                                    // cmd_mux:src_data -> channel_1_avalon_universal_slave_0_agent:cp_data
	wire          cmd_mux_src_ready;                                                                   // channel_1_avalon_universal_slave_0_agent:cp_ready -> cmd_mux:src_ready
	wire   [11:0] cmd_mux_src_channel;                                                                 // cmd_mux:src_channel -> channel_1_avalon_universal_slave_0_agent:cp_channel
	wire          cmd_mux_src_startofpacket;                                                           // cmd_mux:src_startofpacket -> channel_1_avalon_universal_slave_0_agent:cp_startofpacket
	wire          cmd_mux_src_endofpacket;                                                             // cmd_mux:src_endofpacket -> channel_1_avalon_universal_slave_0_agent:cp_endofpacket
	wire   [31:0] channel_0_avalon_universal_slave_0_agent_m0_readdata;                                // channel_0_avalon_universal_slave_0_translator:uav_readdata -> channel_0_avalon_universal_slave_0_agent:m0_readdata
	wire          channel_0_avalon_universal_slave_0_agent_m0_waitrequest;                             // channel_0_avalon_universal_slave_0_translator:uav_waitrequest -> channel_0_avalon_universal_slave_0_agent:m0_waitrequest
	wire          channel_0_avalon_universal_slave_0_agent_m0_debugaccess;                             // channel_0_avalon_universal_slave_0_agent:m0_debugaccess -> channel_0_avalon_universal_slave_0_translator:uav_debugaccess
	wire   [31:0] channel_0_avalon_universal_slave_0_agent_m0_address;                                 // channel_0_avalon_universal_slave_0_agent:m0_address -> channel_0_avalon_universal_slave_0_translator:uav_address
	wire    [3:0] channel_0_avalon_universal_slave_0_agent_m0_byteenable;                              // channel_0_avalon_universal_slave_0_agent:m0_byteenable -> channel_0_avalon_universal_slave_0_translator:uav_byteenable
	wire          channel_0_avalon_universal_slave_0_agent_m0_read;                                    // channel_0_avalon_universal_slave_0_agent:m0_read -> channel_0_avalon_universal_slave_0_translator:uav_read
	wire          channel_0_avalon_universal_slave_0_agent_m0_readdatavalid;                           // channel_0_avalon_universal_slave_0_translator:uav_readdatavalid -> channel_0_avalon_universal_slave_0_agent:m0_readdatavalid
	wire          channel_0_avalon_universal_slave_0_agent_m0_lock;                                    // channel_0_avalon_universal_slave_0_agent:m0_lock -> channel_0_avalon_universal_slave_0_translator:uav_lock
	wire   [31:0] channel_0_avalon_universal_slave_0_agent_m0_writedata;                               // channel_0_avalon_universal_slave_0_agent:m0_writedata -> channel_0_avalon_universal_slave_0_translator:uav_writedata
	wire          channel_0_avalon_universal_slave_0_agent_m0_write;                                   // channel_0_avalon_universal_slave_0_agent:m0_write -> channel_0_avalon_universal_slave_0_translator:uav_write
	wire    [2:0] channel_0_avalon_universal_slave_0_agent_m0_burstcount;                              // channel_0_avalon_universal_slave_0_agent:m0_burstcount -> channel_0_avalon_universal_slave_0_translator:uav_burstcount
	wire          channel_0_avalon_universal_slave_0_agent_rf_source_valid;                            // channel_0_avalon_universal_slave_0_agent:rf_source_valid -> channel_0_avalon_universal_slave_0_agent_rsp_fifo:in_valid
	wire  [117:0] channel_0_avalon_universal_slave_0_agent_rf_source_data;                             // channel_0_avalon_universal_slave_0_agent:rf_source_data -> channel_0_avalon_universal_slave_0_agent_rsp_fifo:in_data
	wire          channel_0_avalon_universal_slave_0_agent_rf_source_ready;                            // channel_0_avalon_universal_slave_0_agent_rsp_fifo:in_ready -> channel_0_avalon_universal_slave_0_agent:rf_source_ready
	wire          channel_0_avalon_universal_slave_0_agent_rf_source_startofpacket;                    // channel_0_avalon_universal_slave_0_agent:rf_source_startofpacket -> channel_0_avalon_universal_slave_0_agent_rsp_fifo:in_startofpacket
	wire          channel_0_avalon_universal_slave_0_agent_rf_source_endofpacket;                      // channel_0_avalon_universal_slave_0_agent:rf_source_endofpacket -> channel_0_avalon_universal_slave_0_agent_rsp_fifo:in_endofpacket
	wire          channel_0_avalon_universal_slave_0_agent_rsp_fifo_out_valid;                         // channel_0_avalon_universal_slave_0_agent_rsp_fifo:out_valid -> channel_0_avalon_universal_slave_0_agent:rf_sink_valid
	wire  [117:0] channel_0_avalon_universal_slave_0_agent_rsp_fifo_out_data;                          // channel_0_avalon_universal_slave_0_agent_rsp_fifo:out_data -> channel_0_avalon_universal_slave_0_agent:rf_sink_data
	wire          channel_0_avalon_universal_slave_0_agent_rsp_fifo_out_ready;                         // channel_0_avalon_universal_slave_0_agent:rf_sink_ready -> channel_0_avalon_universal_slave_0_agent_rsp_fifo:out_ready
	wire          channel_0_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket;                 // channel_0_avalon_universal_slave_0_agent_rsp_fifo:out_startofpacket -> channel_0_avalon_universal_slave_0_agent:rf_sink_startofpacket
	wire          channel_0_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket;                   // channel_0_avalon_universal_slave_0_agent_rsp_fifo:out_endofpacket -> channel_0_avalon_universal_slave_0_agent:rf_sink_endofpacket
	wire          channel_0_avalon_universal_slave_0_agent_rdata_fifo_src_valid;                       // channel_0_avalon_universal_slave_0_agent:rdata_fifo_src_valid -> channel_0_avalon_universal_slave_0_agent:rdata_fifo_sink_valid
	wire   [33:0] channel_0_avalon_universal_slave_0_agent_rdata_fifo_src_data;                        // channel_0_avalon_universal_slave_0_agent:rdata_fifo_src_data -> channel_0_avalon_universal_slave_0_agent:rdata_fifo_sink_data
	wire          channel_0_avalon_universal_slave_0_agent_rdata_fifo_src_ready;                       // channel_0_avalon_universal_slave_0_agent:rdata_fifo_sink_ready -> channel_0_avalon_universal_slave_0_agent:rdata_fifo_src_ready
	wire          cmd_mux_001_src_valid;                                                               // cmd_mux_001:src_valid -> channel_0_avalon_universal_slave_0_agent:cp_valid
	wire  [116:0] cmd_mux_001_src_data;                                                                // cmd_mux_001:src_data -> channel_0_avalon_universal_slave_0_agent:cp_data
	wire          cmd_mux_001_src_ready;                                                               // channel_0_avalon_universal_slave_0_agent:cp_ready -> cmd_mux_001:src_ready
	wire   [11:0] cmd_mux_001_src_channel;                                                             // cmd_mux_001:src_channel -> channel_0_avalon_universal_slave_0_agent:cp_channel
	wire          cmd_mux_001_src_startofpacket;                                                       // cmd_mux_001:src_startofpacket -> channel_0_avalon_universal_slave_0_agent:cp_startofpacket
	wire          cmd_mux_001_src_endofpacket;                                                         // cmd_mux_001:src_endofpacket -> channel_0_avalon_universal_slave_0_agent:cp_endofpacket
	wire   [31:0] channel_2_avalon_universal_slave_0_agent_m0_readdata;                                // channel_2_avalon_universal_slave_0_translator:uav_readdata -> channel_2_avalon_universal_slave_0_agent:m0_readdata
	wire          channel_2_avalon_universal_slave_0_agent_m0_waitrequest;                             // channel_2_avalon_universal_slave_0_translator:uav_waitrequest -> channel_2_avalon_universal_slave_0_agent:m0_waitrequest
	wire          channel_2_avalon_universal_slave_0_agent_m0_debugaccess;                             // channel_2_avalon_universal_slave_0_agent:m0_debugaccess -> channel_2_avalon_universal_slave_0_translator:uav_debugaccess
	wire   [31:0] channel_2_avalon_universal_slave_0_agent_m0_address;                                 // channel_2_avalon_universal_slave_0_agent:m0_address -> channel_2_avalon_universal_slave_0_translator:uav_address
	wire    [3:0] channel_2_avalon_universal_slave_0_agent_m0_byteenable;                              // channel_2_avalon_universal_slave_0_agent:m0_byteenable -> channel_2_avalon_universal_slave_0_translator:uav_byteenable
	wire          channel_2_avalon_universal_slave_0_agent_m0_read;                                    // channel_2_avalon_universal_slave_0_agent:m0_read -> channel_2_avalon_universal_slave_0_translator:uav_read
	wire          channel_2_avalon_universal_slave_0_agent_m0_readdatavalid;                           // channel_2_avalon_universal_slave_0_translator:uav_readdatavalid -> channel_2_avalon_universal_slave_0_agent:m0_readdatavalid
	wire          channel_2_avalon_universal_slave_0_agent_m0_lock;                                    // channel_2_avalon_universal_slave_0_agent:m0_lock -> channel_2_avalon_universal_slave_0_translator:uav_lock
	wire   [31:0] channel_2_avalon_universal_slave_0_agent_m0_writedata;                               // channel_2_avalon_universal_slave_0_agent:m0_writedata -> channel_2_avalon_universal_slave_0_translator:uav_writedata
	wire          channel_2_avalon_universal_slave_0_agent_m0_write;                                   // channel_2_avalon_universal_slave_0_agent:m0_write -> channel_2_avalon_universal_slave_0_translator:uav_write
	wire    [2:0] channel_2_avalon_universal_slave_0_agent_m0_burstcount;                              // channel_2_avalon_universal_slave_0_agent:m0_burstcount -> channel_2_avalon_universal_slave_0_translator:uav_burstcount
	wire          channel_2_avalon_universal_slave_0_agent_rf_source_valid;                            // channel_2_avalon_universal_slave_0_agent:rf_source_valid -> channel_2_avalon_universal_slave_0_agent_rsp_fifo:in_valid
	wire  [117:0] channel_2_avalon_universal_slave_0_agent_rf_source_data;                             // channel_2_avalon_universal_slave_0_agent:rf_source_data -> channel_2_avalon_universal_slave_0_agent_rsp_fifo:in_data
	wire          channel_2_avalon_universal_slave_0_agent_rf_source_ready;                            // channel_2_avalon_universal_slave_0_agent_rsp_fifo:in_ready -> channel_2_avalon_universal_slave_0_agent:rf_source_ready
	wire          channel_2_avalon_universal_slave_0_agent_rf_source_startofpacket;                    // channel_2_avalon_universal_slave_0_agent:rf_source_startofpacket -> channel_2_avalon_universal_slave_0_agent_rsp_fifo:in_startofpacket
	wire          channel_2_avalon_universal_slave_0_agent_rf_source_endofpacket;                      // channel_2_avalon_universal_slave_0_agent:rf_source_endofpacket -> channel_2_avalon_universal_slave_0_agent_rsp_fifo:in_endofpacket
	wire          channel_2_avalon_universal_slave_0_agent_rsp_fifo_out_valid;                         // channel_2_avalon_universal_slave_0_agent_rsp_fifo:out_valid -> channel_2_avalon_universal_slave_0_agent:rf_sink_valid
	wire  [117:0] channel_2_avalon_universal_slave_0_agent_rsp_fifo_out_data;                          // channel_2_avalon_universal_slave_0_agent_rsp_fifo:out_data -> channel_2_avalon_universal_slave_0_agent:rf_sink_data
	wire          channel_2_avalon_universal_slave_0_agent_rsp_fifo_out_ready;                         // channel_2_avalon_universal_slave_0_agent:rf_sink_ready -> channel_2_avalon_universal_slave_0_agent_rsp_fifo:out_ready
	wire          channel_2_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket;                 // channel_2_avalon_universal_slave_0_agent_rsp_fifo:out_startofpacket -> channel_2_avalon_universal_slave_0_agent:rf_sink_startofpacket
	wire          channel_2_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket;                   // channel_2_avalon_universal_slave_0_agent_rsp_fifo:out_endofpacket -> channel_2_avalon_universal_slave_0_agent:rf_sink_endofpacket
	wire          channel_2_avalon_universal_slave_0_agent_rdata_fifo_src_valid;                       // channel_2_avalon_universal_slave_0_agent:rdata_fifo_src_valid -> channel_2_avalon_universal_slave_0_agent:rdata_fifo_sink_valid
	wire   [33:0] channel_2_avalon_universal_slave_0_agent_rdata_fifo_src_data;                        // channel_2_avalon_universal_slave_0_agent:rdata_fifo_src_data -> channel_2_avalon_universal_slave_0_agent:rdata_fifo_sink_data
	wire          channel_2_avalon_universal_slave_0_agent_rdata_fifo_src_ready;                       // channel_2_avalon_universal_slave_0_agent:rdata_fifo_sink_ready -> channel_2_avalon_universal_slave_0_agent:rdata_fifo_src_ready
	wire          cmd_mux_002_src_valid;                                                               // cmd_mux_002:src_valid -> channel_2_avalon_universal_slave_0_agent:cp_valid
	wire  [116:0] cmd_mux_002_src_data;                                                                // cmd_mux_002:src_data -> channel_2_avalon_universal_slave_0_agent:cp_data
	wire          cmd_mux_002_src_ready;                                                               // channel_2_avalon_universal_slave_0_agent:cp_ready -> cmd_mux_002:src_ready
	wire   [11:0] cmd_mux_002_src_channel;                                                             // cmd_mux_002:src_channel -> channel_2_avalon_universal_slave_0_agent:cp_channel
	wire          cmd_mux_002_src_startofpacket;                                                       // cmd_mux_002:src_startofpacket -> channel_2_avalon_universal_slave_0_agent:cp_startofpacket
	wire          cmd_mux_002_src_endofpacket;                                                         // cmd_mux_002:src_endofpacket -> channel_2_avalon_universal_slave_0_agent:cp_endofpacket
	wire   [31:0] channel_3_avalon_universal_slave_0_agent_m0_readdata;                                // channel_3_avalon_universal_slave_0_translator:uav_readdata -> channel_3_avalon_universal_slave_0_agent:m0_readdata
	wire          channel_3_avalon_universal_slave_0_agent_m0_waitrequest;                             // channel_3_avalon_universal_slave_0_translator:uav_waitrequest -> channel_3_avalon_universal_slave_0_agent:m0_waitrequest
	wire          channel_3_avalon_universal_slave_0_agent_m0_debugaccess;                             // channel_3_avalon_universal_slave_0_agent:m0_debugaccess -> channel_3_avalon_universal_slave_0_translator:uav_debugaccess
	wire   [31:0] channel_3_avalon_universal_slave_0_agent_m0_address;                                 // channel_3_avalon_universal_slave_0_agent:m0_address -> channel_3_avalon_universal_slave_0_translator:uav_address
	wire    [3:0] channel_3_avalon_universal_slave_0_agent_m0_byteenable;                              // channel_3_avalon_universal_slave_0_agent:m0_byteenable -> channel_3_avalon_universal_slave_0_translator:uav_byteenable
	wire          channel_3_avalon_universal_slave_0_agent_m0_read;                                    // channel_3_avalon_universal_slave_0_agent:m0_read -> channel_3_avalon_universal_slave_0_translator:uav_read
	wire          channel_3_avalon_universal_slave_0_agent_m0_readdatavalid;                           // channel_3_avalon_universal_slave_0_translator:uav_readdatavalid -> channel_3_avalon_universal_slave_0_agent:m0_readdatavalid
	wire          channel_3_avalon_universal_slave_0_agent_m0_lock;                                    // channel_3_avalon_universal_slave_0_agent:m0_lock -> channel_3_avalon_universal_slave_0_translator:uav_lock
	wire   [31:0] channel_3_avalon_universal_slave_0_agent_m0_writedata;                               // channel_3_avalon_universal_slave_0_agent:m0_writedata -> channel_3_avalon_universal_slave_0_translator:uav_writedata
	wire          channel_3_avalon_universal_slave_0_agent_m0_write;                                   // channel_3_avalon_universal_slave_0_agent:m0_write -> channel_3_avalon_universal_slave_0_translator:uav_write
	wire    [2:0] channel_3_avalon_universal_slave_0_agent_m0_burstcount;                              // channel_3_avalon_universal_slave_0_agent:m0_burstcount -> channel_3_avalon_universal_slave_0_translator:uav_burstcount
	wire          channel_3_avalon_universal_slave_0_agent_rf_source_valid;                            // channel_3_avalon_universal_slave_0_agent:rf_source_valid -> channel_3_avalon_universal_slave_0_agent_rsp_fifo:in_valid
	wire  [117:0] channel_3_avalon_universal_slave_0_agent_rf_source_data;                             // channel_3_avalon_universal_slave_0_agent:rf_source_data -> channel_3_avalon_universal_slave_0_agent_rsp_fifo:in_data
	wire          channel_3_avalon_universal_slave_0_agent_rf_source_ready;                            // channel_3_avalon_universal_slave_0_agent_rsp_fifo:in_ready -> channel_3_avalon_universal_slave_0_agent:rf_source_ready
	wire          channel_3_avalon_universal_slave_0_agent_rf_source_startofpacket;                    // channel_3_avalon_universal_slave_0_agent:rf_source_startofpacket -> channel_3_avalon_universal_slave_0_agent_rsp_fifo:in_startofpacket
	wire          channel_3_avalon_universal_slave_0_agent_rf_source_endofpacket;                      // channel_3_avalon_universal_slave_0_agent:rf_source_endofpacket -> channel_3_avalon_universal_slave_0_agent_rsp_fifo:in_endofpacket
	wire          channel_3_avalon_universal_slave_0_agent_rsp_fifo_out_valid;                         // channel_3_avalon_universal_slave_0_agent_rsp_fifo:out_valid -> channel_3_avalon_universal_slave_0_agent:rf_sink_valid
	wire  [117:0] channel_3_avalon_universal_slave_0_agent_rsp_fifo_out_data;                          // channel_3_avalon_universal_slave_0_agent_rsp_fifo:out_data -> channel_3_avalon_universal_slave_0_agent:rf_sink_data
	wire          channel_3_avalon_universal_slave_0_agent_rsp_fifo_out_ready;                         // channel_3_avalon_universal_slave_0_agent:rf_sink_ready -> channel_3_avalon_universal_slave_0_agent_rsp_fifo:out_ready
	wire          channel_3_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket;                 // channel_3_avalon_universal_slave_0_agent_rsp_fifo:out_startofpacket -> channel_3_avalon_universal_slave_0_agent:rf_sink_startofpacket
	wire          channel_3_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket;                   // channel_3_avalon_universal_slave_0_agent_rsp_fifo:out_endofpacket -> channel_3_avalon_universal_slave_0_agent:rf_sink_endofpacket
	wire          channel_3_avalon_universal_slave_0_agent_rdata_fifo_src_valid;                       // channel_3_avalon_universal_slave_0_agent:rdata_fifo_src_valid -> channel_3_avalon_universal_slave_0_agent:rdata_fifo_sink_valid
	wire   [33:0] channel_3_avalon_universal_slave_0_agent_rdata_fifo_src_data;                        // channel_3_avalon_universal_slave_0_agent:rdata_fifo_src_data -> channel_3_avalon_universal_slave_0_agent:rdata_fifo_sink_data
	wire          channel_3_avalon_universal_slave_0_agent_rdata_fifo_src_ready;                       // channel_3_avalon_universal_slave_0_agent:rdata_fifo_sink_ready -> channel_3_avalon_universal_slave_0_agent:rdata_fifo_src_ready
	wire          cmd_mux_003_src_valid;                                                               // cmd_mux_003:src_valid -> channel_3_avalon_universal_slave_0_agent:cp_valid
	wire  [116:0] cmd_mux_003_src_data;                                                                // cmd_mux_003:src_data -> channel_3_avalon_universal_slave_0_agent:cp_data
	wire          cmd_mux_003_src_ready;                                                               // channel_3_avalon_universal_slave_0_agent:cp_ready -> cmd_mux_003:src_ready
	wire   [11:0] cmd_mux_003_src_channel;                                                             // cmd_mux_003:src_channel -> channel_3_avalon_universal_slave_0_agent:cp_channel
	wire          cmd_mux_003_src_startofpacket;                                                       // cmd_mux_003:src_startofpacket -> channel_3_avalon_universal_slave_0_agent:cp_startofpacket
	wire          cmd_mux_003_src_endofpacket;                                                         // cmd_mux_003:src_endofpacket -> channel_3_avalon_universal_slave_0_agent:cp_endofpacket
	wire   [31:0] channel_4_avalon_universal_slave_0_agent_m0_readdata;                                // channel_4_avalon_universal_slave_0_translator:uav_readdata -> channel_4_avalon_universal_slave_0_agent:m0_readdata
	wire          channel_4_avalon_universal_slave_0_agent_m0_waitrequest;                             // channel_4_avalon_universal_slave_0_translator:uav_waitrequest -> channel_4_avalon_universal_slave_0_agent:m0_waitrequest
	wire          channel_4_avalon_universal_slave_0_agent_m0_debugaccess;                             // channel_4_avalon_universal_slave_0_agent:m0_debugaccess -> channel_4_avalon_universal_slave_0_translator:uav_debugaccess
	wire   [31:0] channel_4_avalon_universal_slave_0_agent_m0_address;                                 // channel_4_avalon_universal_slave_0_agent:m0_address -> channel_4_avalon_universal_slave_0_translator:uav_address
	wire    [3:0] channel_4_avalon_universal_slave_0_agent_m0_byteenable;                              // channel_4_avalon_universal_slave_0_agent:m0_byteenable -> channel_4_avalon_universal_slave_0_translator:uav_byteenable
	wire          channel_4_avalon_universal_slave_0_agent_m0_read;                                    // channel_4_avalon_universal_slave_0_agent:m0_read -> channel_4_avalon_universal_slave_0_translator:uav_read
	wire          channel_4_avalon_universal_slave_0_agent_m0_readdatavalid;                           // channel_4_avalon_universal_slave_0_translator:uav_readdatavalid -> channel_4_avalon_universal_slave_0_agent:m0_readdatavalid
	wire          channel_4_avalon_universal_slave_0_agent_m0_lock;                                    // channel_4_avalon_universal_slave_0_agent:m0_lock -> channel_4_avalon_universal_slave_0_translator:uav_lock
	wire   [31:0] channel_4_avalon_universal_slave_0_agent_m0_writedata;                               // channel_4_avalon_universal_slave_0_agent:m0_writedata -> channel_4_avalon_universal_slave_0_translator:uav_writedata
	wire          channel_4_avalon_universal_slave_0_agent_m0_write;                                   // channel_4_avalon_universal_slave_0_agent:m0_write -> channel_4_avalon_universal_slave_0_translator:uav_write
	wire    [2:0] channel_4_avalon_universal_slave_0_agent_m0_burstcount;                              // channel_4_avalon_universal_slave_0_agent:m0_burstcount -> channel_4_avalon_universal_slave_0_translator:uav_burstcount
	wire          channel_4_avalon_universal_slave_0_agent_rf_source_valid;                            // channel_4_avalon_universal_slave_0_agent:rf_source_valid -> channel_4_avalon_universal_slave_0_agent_rsp_fifo:in_valid
	wire  [117:0] channel_4_avalon_universal_slave_0_agent_rf_source_data;                             // channel_4_avalon_universal_slave_0_agent:rf_source_data -> channel_4_avalon_universal_slave_0_agent_rsp_fifo:in_data
	wire          channel_4_avalon_universal_slave_0_agent_rf_source_ready;                            // channel_4_avalon_universal_slave_0_agent_rsp_fifo:in_ready -> channel_4_avalon_universal_slave_0_agent:rf_source_ready
	wire          channel_4_avalon_universal_slave_0_agent_rf_source_startofpacket;                    // channel_4_avalon_universal_slave_0_agent:rf_source_startofpacket -> channel_4_avalon_universal_slave_0_agent_rsp_fifo:in_startofpacket
	wire          channel_4_avalon_universal_slave_0_agent_rf_source_endofpacket;                      // channel_4_avalon_universal_slave_0_agent:rf_source_endofpacket -> channel_4_avalon_universal_slave_0_agent_rsp_fifo:in_endofpacket
	wire          channel_4_avalon_universal_slave_0_agent_rsp_fifo_out_valid;                         // channel_4_avalon_universal_slave_0_agent_rsp_fifo:out_valid -> channel_4_avalon_universal_slave_0_agent:rf_sink_valid
	wire  [117:0] channel_4_avalon_universal_slave_0_agent_rsp_fifo_out_data;                          // channel_4_avalon_universal_slave_0_agent_rsp_fifo:out_data -> channel_4_avalon_universal_slave_0_agent:rf_sink_data
	wire          channel_4_avalon_universal_slave_0_agent_rsp_fifo_out_ready;                         // channel_4_avalon_universal_slave_0_agent:rf_sink_ready -> channel_4_avalon_universal_slave_0_agent_rsp_fifo:out_ready
	wire          channel_4_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket;                 // channel_4_avalon_universal_slave_0_agent_rsp_fifo:out_startofpacket -> channel_4_avalon_universal_slave_0_agent:rf_sink_startofpacket
	wire          channel_4_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket;                   // channel_4_avalon_universal_slave_0_agent_rsp_fifo:out_endofpacket -> channel_4_avalon_universal_slave_0_agent:rf_sink_endofpacket
	wire          channel_4_avalon_universal_slave_0_agent_rdata_fifo_src_valid;                       // channel_4_avalon_universal_slave_0_agent:rdata_fifo_src_valid -> channel_4_avalon_universal_slave_0_agent:rdata_fifo_sink_valid
	wire   [33:0] channel_4_avalon_universal_slave_0_agent_rdata_fifo_src_data;                        // channel_4_avalon_universal_slave_0_agent:rdata_fifo_src_data -> channel_4_avalon_universal_slave_0_agent:rdata_fifo_sink_data
	wire          channel_4_avalon_universal_slave_0_agent_rdata_fifo_src_ready;                       // channel_4_avalon_universal_slave_0_agent:rdata_fifo_sink_ready -> channel_4_avalon_universal_slave_0_agent:rdata_fifo_src_ready
	wire          cmd_mux_004_src_valid;                                                               // cmd_mux_004:src_valid -> channel_4_avalon_universal_slave_0_agent:cp_valid
	wire  [116:0] cmd_mux_004_src_data;                                                                // cmd_mux_004:src_data -> channel_4_avalon_universal_slave_0_agent:cp_data
	wire          cmd_mux_004_src_ready;                                                               // channel_4_avalon_universal_slave_0_agent:cp_ready -> cmd_mux_004:src_ready
	wire   [11:0] cmd_mux_004_src_channel;                                                             // cmd_mux_004:src_channel -> channel_4_avalon_universal_slave_0_agent:cp_channel
	wire          cmd_mux_004_src_startofpacket;                                                       // cmd_mux_004:src_startofpacket -> channel_4_avalon_universal_slave_0_agent:cp_startofpacket
	wire          cmd_mux_004_src_endofpacket;                                                         // cmd_mux_004:src_endofpacket -> channel_4_avalon_universal_slave_0_agent:cp_endofpacket
	wire   [31:0] channel_5_avalon_universal_slave_0_agent_m0_readdata;                                // channel_5_avalon_universal_slave_0_translator:uav_readdata -> channel_5_avalon_universal_slave_0_agent:m0_readdata
	wire          channel_5_avalon_universal_slave_0_agent_m0_waitrequest;                             // channel_5_avalon_universal_slave_0_translator:uav_waitrequest -> channel_5_avalon_universal_slave_0_agent:m0_waitrequest
	wire          channel_5_avalon_universal_slave_0_agent_m0_debugaccess;                             // channel_5_avalon_universal_slave_0_agent:m0_debugaccess -> channel_5_avalon_universal_slave_0_translator:uav_debugaccess
	wire   [31:0] channel_5_avalon_universal_slave_0_agent_m0_address;                                 // channel_5_avalon_universal_slave_0_agent:m0_address -> channel_5_avalon_universal_slave_0_translator:uav_address
	wire    [3:0] channel_5_avalon_universal_slave_0_agent_m0_byteenable;                              // channel_5_avalon_universal_slave_0_agent:m0_byteenable -> channel_5_avalon_universal_slave_0_translator:uav_byteenable
	wire          channel_5_avalon_universal_slave_0_agent_m0_read;                                    // channel_5_avalon_universal_slave_0_agent:m0_read -> channel_5_avalon_universal_slave_0_translator:uav_read
	wire          channel_5_avalon_universal_slave_0_agent_m0_readdatavalid;                           // channel_5_avalon_universal_slave_0_translator:uav_readdatavalid -> channel_5_avalon_universal_slave_0_agent:m0_readdatavalid
	wire          channel_5_avalon_universal_slave_0_agent_m0_lock;                                    // channel_5_avalon_universal_slave_0_agent:m0_lock -> channel_5_avalon_universal_slave_0_translator:uav_lock
	wire   [31:0] channel_5_avalon_universal_slave_0_agent_m0_writedata;                               // channel_5_avalon_universal_slave_0_agent:m0_writedata -> channel_5_avalon_universal_slave_0_translator:uav_writedata
	wire          channel_5_avalon_universal_slave_0_agent_m0_write;                                   // channel_5_avalon_universal_slave_0_agent:m0_write -> channel_5_avalon_universal_slave_0_translator:uav_write
	wire    [2:0] channel_5_avalon_universal_slave_0_agent_m0_burstcount;                              // channel_5_avalon_universal_slave_0_agent:m0_burstcount -> channel_5_avalon_universal_slave_0_translator:uav_burstcount
	wire          channel_5_avalon_universal_slave_0_agent_rf_source_valid;                            // channel_5_avalon_universal_slave_0_agent:rf_source_valid -> channel_5_avalon_universal_slave_0_agent_rsp_fifo:in_valid
	wire  [117:0] channel_5_avalon_universal_slave_0_agent_rf_source_data;                             // channel_5_avalon_universal_slave_0_agent:rf_source_data -> channel_5_avalon_universal_slave_0_agent_rsp_fifo:in_data
	wire          channel_5_avalon_universal_slave_0_agent_rf_source_ready;                            // channel_5_avalon_universal_slave_0_agent_rsp_fifo:in_ready -> channel_5_avalon_universal_slave_0_agent:rf_source_ready
	wire          channel_5_avalon_universal_slave_0_agent_rf_source_startofpacket;                    // channel_5_avalon_universal_slave_0_agent:rf_source_startofpacket -> channel_5_avalon_universal_slave_0_agent_rsp_fifo:in_startofpacket
	wire          channel_5_avalon_universal_slave_0_agent_rf_source_endofpacket;                      // channel_5_avalon_universal_slave_0_agent:rf_source_endofpacket -> channel_5_avalon_universal_slave_0_agent_rsp_fifo:in_endofpacket
	wire          channel_5_avalon_universal_slave_0_agent_rsp_fifo_out_valid;                         // channel_5_avalon_universal_slave_0_agent_rsp_fifo:out_valid -> channel_5_avalon_universal_slave_0_agent:rf_sink_valid
	wire  [117:0] channel_5_avalon_universal_slave_0_agent_rsp_fifo_out_data;                          // channel_5_avalon_universal_slave_0_agent_rsp_fifo:out_data -> channel_5_avalon_universal_slave_0_agent:rf_sink_data
	wire          channel_5_avalon_universal_slave_0_agent_rsp_fifo_out_ready;                         // channel_5_avalon_universal_slave_0_agent:rf_sink_ready -> channel_5_avalon_universal_slave_0_agent_rsp_fifo:out_ready
	wire          channel_5_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket;                 // channel_5_avalon_universal_slave_0_agent_rsp_fifo:out_startofpacket -> channel_5_avalon_universal_slave_0_agent:rf_sink_startofpacket
	wire          channel_5_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket;                   // channel_5_avalon_universal_slave_0_agent_rsp_fifo:out_endofpacket -> channel_5_avalon_universal_slave_0_agent:rf_sink_endofpacket
	wire          channel_5_avalon_universal_slave_0_agent_rdata_fifo_src_valid;                       // channel_5_avalon_universal_slave_0_agent:rdata_fifo_src_valid -> channel_5_avalon_universal_slave_0_agent:rdata_fifo_sink_valid
	wire   [33:0] channel_5_avalon_universal_slave_0_agent_rdata_fifo_src_data;                        // channel_5_avalon_universal_slave_0_agent:rdata_fifo_src_data -> channel_5_avalon_universal_slave_0_agent:rdata_fifo_sink_data
	wire          channel_5_avalon_universal_slave_0_agent_rdata_fifo_src_ready;                       // channel_5_avalon_universal_slave_0_agent:rdata_fifo_sink_ready -> channel_5_avalon_universal_slave_0_agent:rdata_fifo_src_ready
	wire          cmd_mux_005_src_valid;                                                               // cmd_mux_005:src_valid -> channel_5_avalon_universal_slave_0_agent:cp_valid
	wire  [116:0] cmd_mux_005_src_data;                                                                // cmd_mux_005:src_data -> channel_5_avalon_universal_slave_0_agent:cp_data
	wire          cmd_mux_005_src_ready;                                                               // channel_5_avalon_universal_slave_0_agent:cp_ready -> cmd_mux_005:src_ready
	wire   [11:0] cmd_mux_005_src_channel;                                                             // cmd_mux_005:src_channel -> channel_5_avalon_universal_slave_0_agent:cp_channel
	wire          cmd_mux_005_src_startofpacket;                                                       // cmd_mux_005:src_startofpacket -> channel_5_avalon_universal_slave_0_agent:cp_startofpacket
	wire          cmd_mux_005_src_endofpacket;                                                         // cmd_mux_005:src_endofpacket -> channel_5_avalon_universal_slave_0_agent:cp_endofpacket
	wire   [31:0] channel_6_avalon_universal_slave_0_agent_m0_readdata;                                // channel_6_avalon_universal_slave_0_translator:uav_readdata -> channel_6_avalon_universal_slave_0_agent:m0_readdata
	wire          channel_6_avalon_universal_slave_0_agent_m0_waitrequest;                             // channel_6_avalon_universal_slave_0_translator:uav_waitrequest -> channel_6_avalon_universal_slave_0_agent:m0_waitrequest
	wire          channel_6_avalon_universal_slave_0_agent_m0_debugaccess;                             // channel_6_avalon_universal_slave_0_agent:m0_debugaccess -> channel_6_avalon_universal_slave_0_translator:uav_debugaccess
	wire   [31:0] channel_6_avalon_universal_slave_0_agent_m0_address;                                 // channel_6_avalon_universal_slave_0_agent:m0_address -> channel_6_avalon_universal_slave_0_translator:uav_address
	wire    [3:0] channel_6_avalon_universal_slave_0_agent_m0_byteenable;                              // channel_6_avalon_universal_slave_0_agent:m0_byteenable -> channel_6_avalon_universal_slave_0_translator:uav_byteenable
	wire          channel_6_avalon_universal_slave_0_agent_m0_read;                                    // channel_6_avalon_universal_slave_0_agent:m0_read -> channel_6_avalon_universal_slave_0_translator:uav_read
	wire          channel_6_avalon_universal_slave_0_agent_m0_readdatavalid;                           // channel_6_avalon_universal_slave_0_translator:uav_readdatavalid -> channel_6_avalon_universal_slave_0_agent:m0_readdatavalid
	wire          channel_6_avalon_universal_slave_0_agent_m0_lock;                                    // channel_6_avalon_universal_slave_0_agent:m0_lock -> channel_6_avalon_universal_slave_0_translator:uav_lock
	wire   [31:0] channel_6_avalon_universal_slave_0_agent_m0_writedata;                               // channel_6_avalon_universal_slave_0_agent:m0_writedata -> channel_6_avalon_universal_slave_0_translator:uav_writedata
	wire          channel_6_avalon_universal_slave_0_agent_m0_write;                                   // channel_6_avalon_universal_slave_0_agent:m0_write -> channel_6_avalon_universal_slave_0_translator:uav_write
	wire    [2:0] channel_6_avalon_universal_slave_0_agent_m0_burstcount;                              // channel_6_avalon_universal_slave_0_agent:m0_burstcount -> channel_6_avalon_universal_slave_0_translator:uav_burstcount
	wire          channel_6_avalon_universal_slave_0_agent_rf_source_valid;                            // channel_6_avalon_universal_slave_0_agent:rf_source_valid -> channel_6_avalon_universal_slave_0_agent_rsp_fifo:in_valid
	wire  [117:0] channel_6_avalon_universal_slave_0_agent_rf_source_data;                             // channel_6_avalon_universal_slave_0_agent:rf_source_data -> channel_6_avalon_universal_slave_0_agent_rsp_fifo:in_data
	wire          channel_6_avalon_universal_slave_0_agent_rf_source_ready;                            // channel_6_avalon_universal_slave_0_agent_rsp_fifo:in_ready -> channel_6_avalon_universal_slave_0_agent:rf_source_ready
	wire          channel_6_avalon_universal_slave_0_agent_rf_source_startofpacket;                    // channel_6_avalon_universal_slave_0_agent:rf_source_startofpacket -> channel_6_avalon_universal_slave_0_agent_rsp_fifo:in_startofpacket
	wire          channel_6_avalon_universal_slave_0_agent_rf_source_endofpacket;                      // channel_6_avalon_universal_slave_0_agent:rf_source_endofpacket -> channel_6_avalon_universal_slave_0_agent_rsp_fifo:in_endofpacket
	wire          channel_6_avalon_universal_slave_0_agent_rsp_fifo_out_valid;                         // channel_6_avalon_universal_slave_0_agent_rsp_fifo:out_valid -> channel_6_avalon_universal_slave_0_agent:rf_sink_valid
	wire  [117:0] channel_6_avalon_universal_slave_0_agent_rsp_fifo_out_data;                          // channel_6_avalon_universal_slave_0_agent_rsp_fifo:out_data -> channel_6_avalon_universal_slave_0_agent:rf_sink_data
	wire          channel_6_avalon_universal_slave_0_agent_rsp_fifo_out_ready;                         // channel_6_avalon_universal_slave_0_agent:rf_sink_ready -> channel_6_avalon_universal_slave_0_agent_rsp_fifo:out_ready
	wire          channel_6_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket;                 // channel_6_avalon_universal_slave_0_agent_rsp_fifo:out_startofpacket -> channel_6_avalon_universal_slave_0_agent:rf_sink_startofpacket
	wire          channel_6_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket;                   // channel_6_avalon_universal_slave_0_agent_rsp_fifo:out_endofpacket -> channel_6_avalon_universal_slave_0_agent:rf_sink_endofpacket
	wire          channel_6_avalon_universal_slave_0_agent_rdata_fifo_src_valid;                       // channel_6_avalon_universal_slave_0_agent:rdata_fifo_src_valid -> channel_6_avalon_universal_slave_0_agent:rdata_fifo_sink_valid
	wire   [33:0] channel_6_avalon_universal_slave_0_agent_rdata_fifo_src_data;                        // channel_6_avalon_universal_slave_0_agent:rdata_fifo_src_data -> channel_6_avalon_universal_slave_0_agent:rdata_fifo_sink_data
	wire          channel_6_avalon_universal_slave_0_agent_rdata_fifo_src_ready;                       // channel_6_avalon_universal_slave_0_agent:rdata_fifo_sink_ready -> channel_6_avalon_universal_slave_0_agent:rdata_fifo_src_ready
	wire          cmd_mux_006_src_valid;                                                               // cmd_mux_006:src_valid -> channel_6_avalon_universal_slave_0_agent:cp_valid
	wire  [116:0] cmd_mux_006_src_data;                                                                // cmd_mux_006:src_data -> channel_6_avalon_universal_slave_0_agent:cp_data
	wire          cmd_mux_006_src_ready;                                                               // channel_6_avalon_universal_slave_0_agent:cp_ready -> cmd_mux_006:src_ready
	wire   [11:0] cmd_mux_006_src_channel;                                                             // cmd_mux_006:src_channel -> channel_6_avalon_universal_slave_0_agent:cp_channel
	wire          cmd_mux_006_src_startofpacket;                                                       // cmd_mux_006:src_startofpacket -> channel_6_avalon_universal_slave_0_agent:cp_startofpacket
	wire          cmd_mux_006_src_endofpacket;                                                         // cmd_mux_006:src_endofpacket -> channel_6_avalon_universal_slave_0_agent:cp_endofpacket
	wire   [31:0] channel_7_avalon_universal_slave_0_agent_m0_readdata;                                // channel_7_avalon_universal_slave_0_translator:uav_readdata -> channel_7_avalon_universal_slave_0_agent:m0_readdata
	wire          channel_7_avalon_universal_slave_0_agent_m0_waitrequest;                             // channel_7_avalon_universal_slave_0_translator:uav_waitrequest -> channel_7_avalon_universal_slave_0_agent:m0_waitrequest
	wire          channel_7_avalon_universal_slave_0_agent_m0_debugaccess;                             // channel_7_avalon_universal_slave_0_agent:m0_debugaccess -> channel_7_avalon_universal_slave_0_translator:uav_debugaccess
	wire   [31:0] channel_7_avalon_universal_slave_0_agent_m0_address;                                 // channel_7_avalon_universal_slave_0_agent:m0_address -> channel_7_avalon_universal_slave_0_translator:uav_address
	wire    [3:0] channel_7_avalon_universal_slave_0_agent_m0_byteenable;                              // channel_7_avalon_universal_slave_0_agent:m0_byteenable -> channel_7_avalon_universal_slave_0_translator:uav_byteenable
	wire          channel_7_avalon_universal_slave_0_agent_m0_read;                                    // channel_7_avalon_universal_slave_0_agent:m0_read -> channel_7_avalon_universal_slave_0_translator:uav_read
	wire          channel_7_avalon_universal_slave_0_agent_m0_readdatavalid;                           // channel_7_avalon_universal_slave_0_translator:uav_readdatavalid -> channel_7_avalon_universal_slave_0_agent:m0_readdatavalid
	wire          channel_7_avalon_universal_slave_0_agent_m0_lock;                                    // channel_7_avalon_universal_slave_0_agent:m0_lock -> channel_7_avalon_universal_slave_0_translator:uav_lock
	wire   [31:0] channel_7_avalon_universal_slave_0_agent_m0_writedata;                               // channel_7_avalon_universal_slave_0_agent:m0_writedata -> channel_7_avalon_universal_slave_0_translator:uav_writedata
	wire          channel_7_avalon_universal_slave_0_agent_m0_write;                                   // channel_7_avalon_universal_slave_0_agent:m0_write -> channel_7_avalon_universal_slave_0_translator:uav_write
	wire    [2:0] channel_7_avalon_universal_slave_0_agent_m0_burstcount;                              // channel_7_avalon_universal_slave_0_agent:m0_burstcount -> channel_7_avalon_universal_slave_0_translator:uav_burstcount
	wire          channel_7_avalon_universal_slave_0_agent_rf_source_valid;                            // channel_7_avalon_universal_slave_0_agent:rf_source_valid -> channel_7_avalon_universal_slave_0_agent_rsp_fifo:in_valid
	wire  [117:0] channel_7_avalon_universal_slave_0_agent_rf_source_data;                             // channel_7_avalon_universal_slave_0_agent:rf_source_data -> channel_7_avalon_universal_slave_0_agent_rsp_fifo:in_data
	wire          channel_7_avalon_universal_slave_0_agent_rf_source_ready;                            // channel_7_avalon_universal_slave_0_agent_rsp_fifo:in_ready -> channel_7_avalon_universal_slave_0_agent:rf_source_ready
	wire          channel_7_avalon_universal_slave_0_agent_rf_source_startofpacket;                    // channel_7_avalon_universal_slave_0_agent:rf_source_startofpacket -> channel_7_avalon_universal_slave_0_agent_rsp_fifo:in_startofpacket
	wire          channel_7_avalon_universal_slave_0_agent_rf_source_endofpacket;                      // channel_7_avalon_universal_slave_0_agent:rf_source_endofpacket -> channel_7_avalon_universal_slave_0_agent_rsp_fifo:in_endofpacket
	wire          channel_7_avalon_universal_slave_0_agent_rsp_fifo_out_valid;                         // channel_7_avalon_universal_slave_0_agent_rsp_fifo:out_valid -> channel_7_avalon_universal_slave_0_agent:rf_sink_valid
	wire  [117:0] channel_7_avalon_universal_slave_0_agent_rsp_fifo_out_data;                          // channel_7_avalon_universal_slave_0_agent_rsp_fifo:out_data -> channel_7_avalon_universal_slave_0_agent:rf_sink_data
	wire          channel_7_avalon_universal_slave_0_agent_rsp_fifo_out_ready;                         // channel_7_avalon_universal_slave_0_agent:rf_sink_ready -> channel_7_avalon_universal_slave_0_agent_rsp_fifo:out_ready
	wire          channel_7_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket;                 // channel_7_avalon_universal_slave_0_agent_rsp_fifo:out_startofpacket -> channel_7_avalon_universal_slave_0_agent:rf_sink_startofpacket
	wire          channel_7_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket;                   // channel_7_avalon_universal_slave_0_agent_rsp_fifo:out_endofpacket -> channel_7_avalon_universal_slave_0_agent:rf_sink_endofpacket
	wire          channel_7_avalon_universal_slave_0_agent_rdata_fifo_src_valid;                       // channel_7_avalon_universal_slave_0_agent:rdata_fifo_src_valid -> channel_7_avalon_universal_slave_0_agent:rdata_fifo_sink_valid
	wire   [33:0] channel_7_avalon_universal_slave_0_agent_rdata_fifo_src_data;                        // channel_7_avalon_universal_slave_0_agent:rdata_fifo_src_data -> channel_7_avalon_universal_slave_0_agent:rdata_fifo_sink_data
	wire          channel_7_avalon_universal_slave_0_agent_rdata_fifo_src_ready;                       // channel_7_avalon_universal_slave_0_agent:rdata_fifo_sink_ready -> channel_7_avalon_universal_slave_0_agent:rdata_fifo_src_ready
	wire          cmd_mux_007_src_valid;                                                               // cmd_mux_007:src_valid -> channel_7_avalon_universal_slave_0_agent:cp_valid
	wire  [116:0] cmd_mux_007_src_data;                                                                // cmd_mux_007:src_data -> channel_7_avalon_universal_slave_0_agent:cp_data
	wire          cmd_mux_007_src_ready;                                                               // channel_7_avalon_universal_slave_0_agent:cp_ready -> cmd_mux_007:src_ready
	wire   [11:0] cmd_mux_007_src_channel;                                                             // cmd_mux_007:src_channel -> channel_7_avalon_universal_slave_0_agent:cp_channel
	wire          cmd_mux_007_src_startofpacket;                                                       // cmd_mux_007:src_startofpacket -> channel_7_avalon_universal_slave_0_agent:cp_startofpacket
	wire          cmd_mux_007_src_endofpacket;                                                         // cmd_mux_007:src_endofpacket -> channel_7_avalon_universal_slave_0_agent:cp_endofpacket
	wire   [31:0] channel_8_avalon_universal_slave_0_agent_m0_readdata;                                // channel_8_avalon_universal_slave_0_translator:uav_readdata -> channel_8_avalon_universal_slave_0_agent:m0_readdata
	wire          channel_8_avalon_universal_slave_0_agent_m0_waitrequest;                             // channel_8_avalon_universal_slave_0_translator:uav_waitrequest -> channel_8_avalon_universal_slave_0_agent:m0_waitrequest
	wire          channel_8_avalon_universal_slave_0_agent_m0_debugaccess;                             // channel_8_avalon_universal_slave_0_agent:m0_debugaccess -> channel_8_avalon_universal_slave_0_translator:uav_debugaccess
	wire   [31:0] channel_8_avalon_universal_slave_0_agent_m0_address;                                 // channel_8_avalon_universal_slave_0_agent:m0_address -> channel_8_avalon_universal_slave_0_translator:uav_address
	wire    [3:0] channel_8_avalon_universal_slave_0_agent_m0_byteenable;                              // channel_8_avalon_universal_slave_0_agent:m0_byteenable -> channel_8_avalon_universal_slave_0_translator:uav_byteenable
	wire          channel_8_avalon_universal_slave_0_agent_m0_read;                                    // channel_8_avalon_universal_slave_0_agent:m0_read -> channel_8_avalon_universal_slave_0_translator:uav_read
	wire          channel_8_avalon_universal_slave_0_agent_m0_readdatavalid;                           // channel_8_avalon_universal_slave_0_translator:uav_readdatavalid -> channel_8_avalon_universal_slave_0_agent:m0_readdatavalid
	wire          channel_8_avalon_universal_slave_0_agent_m0_lock;                                    // channel_8_avalon_universal_slave_0_agent:m0_lock -> channel_8_avalon_universal_slave_0_translator:uav_lock
	wire   [31:0] channel_8_avalon_universal_slave_0_agent_m0_writedata;                               // channel_8_avalon_universal_slave_0_agent:m0_writedata -> channel_8_avalon_universal_slave_0_translator:uav_writedata
	wire          channel_8_avalon_universal_slave_0_agent_m0_write;                                   // channel_8_avalon_universal_slave_0_agent:m0_write -> channel_8_avalon_universal_slave_0_translator:uav_write
	wire    [2:0] channel_8_avalon_universal_slave_0_agent_m0_burstcount;                              // channel_8_avalon_universal_slave_0_agent:m0_burstcount -> channel_8_avalon_universal_slave_0_translator:uav_burstcount
	wire          channel_8_avalon_universal_slave_0_agent_rf_source_valid;                            // channel_8_avalon_universal_slave_0_agent:rf_source_valid -> channel_8_avalon_universal_slave_0_agent_rsp_fifo:in_valid
	wire  [117:0] channel_8_avalon_universal_slave_0_agent_rf_source_data;                             // channel_8_avalon_universal_slave_0_agent:rf_source_data -> channel_8_avalon_universal_slave_0_agent_rsp_fifo:in_data
	wire          channel_8_avalon_universal_slave_0_agent_rf_source_ready;                            // channel_8_avalon_universal_slave_0_agent_rsp_fifo:in_ready -> channel_8_avalon_universal_slave_0_agent:rf_source_ready
	wire          channel_8_avalon_universal_slave_0_agent_rf_source_startofpacket;                    // channel_8_avalon_universal_slave_0_agent:rf_source_startofpacket -> channel_8_avalon_universal_slave_0_agent_rsp_fifo:in_startofpacket
	wire          channel_8_avalon_universal_slave_0_agent_rf_source_endofpacket;                      // channel_8_avalon_universal_slave_0_agent:rf_source_endofpacket -> channel_8_avalon_universal_slave_0_agent_rsp_fifo:in_endofpacket
	wire          channel_8_avalon_universal_slave_0_agent_rsp_fifo_out_valid;                         // channel_8_avalon_universal_slave_0_agent_rsp_fifo:out_valid -> channel_8_avalon_universal_slave_0_agent:rf_sink_valid
	wire  [117:0] channel_8_avalon_universal_slave_0_agent_rsp_fifo_out_data;                          // channel_8_avalon_universal_slave_0_agent_rsp_fifo:out_data -> channel_8_avalon_universal_slave_0_agent:rf_sink_data
	wire          channel_8_avalon_universal_slave_0_agent_rsp_fifo_out_ready;                         // channel_8_avalon_universal_slave_0_agent:rf_sink_ready -> channel_8_avalon_universal_slave_0_agent_rsp_fifo:out_ready
	wire          channel_8_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket;                 // channel_8_avalon_universal_slave_0_agent_rsp_fifo:out_startofpacket -> channel_8_avalon_universal_slave_0_agent:rf_sink_startofpacket
	wire          channel_8_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket;                   // channel_8_avalon_universal_slave_0_agent_rsp_fifo:out_endofpacket -> channel_8_avalon_universal_slave_0_agent:rf_sink_endofpacket
	wire          channel_8_avalon_universal_slave_0_agent_rdata_fifo_src_valid;                       // channel_8_avalon_universal_slave_0_agent:rdata_fifo_src_valid -> channel_8_avalon_universal_slave_0_agent:rdata_fifo_sink_valid
	wire   [33:0] channel_8_avalon_universal_slave_0_agent_rdata_fifo_src_data;                        // channel_8_avalon_universal_slave_0_agent:rdata_fifo_src_data -> channel_8_avalon_universal_slave_0_agent:rdata_fifo_sink_data
	wire          channel_8_avalon_universal_slave_0_agent_rdata_fifo_src_ready;                       // channel_8_avalon_universal_slave_0_agent:rdata_fifo_sink_ready -> channel_8_avalon_universal_slave_0_agent:rdata_fifo_src_ready
	wire          cmd_mux_008_src_valid;                                                               // cmd_mux_008:src_valid -> channel_8_avalon_universal_slave_0_agent:cp_valid
	wire  [116:0] cmd_mux_008_src_data;                                                                // cmd_mux_008:src_data -> channel_8_avalon_universal_slave_0_agent:cp_data
	wire          cmd_mux_008_src_ready;                                                               // channel_8_avalon_universal_slave_0_agent:cp_ready -> cmd_mux_008:src_ready
	wire   [11:0] cmd_mux_008_src_channel;                                                             // cmd_mux_008:src_channel -> channel_8_avalon_universal_slave_0_agent:cp_channel
	wire          cmd_mux_008_src_startofpacket;                                                       // cmd_mux_008:src_startofpacket -> channel_8_avalon_universal_slave_0_agent:cp_startofpacket
	wire          cmd_mux_008_src_endofpacket;                                                         // cmd_mux_008:src_endofpacket -> channel_8_avalon_universal_slave_0_agent:cp_endofpacket
	wire   [31:0] channel_9_avalon_universal_slave_0_agent_m0_readdata;                                // channel_9_avalon_universal_slave_0_translator:uav_readdata -> channel_9_avalon_universal_slave_0_agent:m0_readdata
	wire          channel_9_avalon_universal_slave_0_agent_m0_waitrequest;                             // channel_9_avalon_universal_slave_0_translator:uav_waitrequest -> channel_9_avalon_universal_slave_0_agent:m0_waitrequest
	wire          channel_9_avalon_universal_slave_0_agent_m0_debugaccess;                             // channel_9_avalon_universal_slave_0_agent:m0_debugaccess -> channel_9_avalon_universal_slave_0_translator:uav_debugaccess
	wire   [31:0] channel_9_avalon_universal_slave_0_agent_m0_address;                                 // channel_9_avalon_universal_slave_0_agent:m0_address -> channel_9_avalon_universal_slave_0_translator:uav_address
	wire    [3:0] channel_9_avalon_universal_slave_0_agent_m0_byteenable;                              // channel_9_avalon_universal_slave_0_agent:m0_byteenable -> channel_9_avalon_universal_slave_0_translator:uav_byteenable
	wire          channel_9_avalon_universal_slave_0_agent_m0_read;                                    // channel_9_avalon_universal_slave_0_agent:m0_read -> channel_9_avalon_universal_slave_0_translator:uav_read
	wire          channel_9_avalon_universal_slave_0_agent_m0_readdatavalid;                           // channel_9_avalon_universal_slave_0_translator:uav_readdatavalid -> channel_9_avalon_universal_slave_0_agent:m0_readdatavalid
	wire          channel_9_avalon_universal_slave_0_agent_m0_lock;                                    // channel_9_avalon_universal_slave_0_agent:m0_lock -> channel_9_avalon_universal_slave_0_translator:uav_lock
	wire   [31:0] channel_9_avalon_universal_slave_0_agent_m0_writedata;                               // channel_9_avalon_universal_slave_0_agent:m0_writedata -> channel_9_avalon_universal_slave_0_translator:uav_writedata
	wire          channel_9_avalon_universal_slave_0_agent_m0_write;                                   // channel_9_avalon_universal_slave_0_agent:m0_write -> channel_9_avalon_universal_slave_0_translator:uav_write
	wire    [2:0] channel_9_avalon_universal_slave_0_agent_m0_burstcount;                              // channel_9_avalon_universal_slave_0_agent:m0_burstcount -> channel_9_avalon_universal_slave_0_translator:uav_burstcount
	wire          channel_9_avalon_universal_slave_0_agent_rf_source_valid;                            // channel_9_avalon_universal_slave_0_agent:rf_source_valid -> channel_9_avalon_universal_slave_0_agent_rsp_fifo:in_valid
	wire  [117:0] channel_9_avalon_universal_slave_0_agent_rf_source_data;                             // channel_9_avalon_universal_slave_0_agent:rf_source_data -> channel_9_avalon_universal_slave_0_agent_rsp_fifo:in_data
	wire          channel_9_avalon_universal_slave_0_agent_rf_source_ready;                            // channel_9_avalon_universal_slave_0_agent_rsp_fifo:in_ready -> channel_9_avalon_universal_slave_0_agent:rf_source_ready
	wire          channel_9_avalon_universal_slave_0_agent_rf_source_startofpacket;                    // channel_9_avalon_universal_slave_0_agent:rf_source_startofpacket -> channel_9_avalon_universal_slave_0_agent_rsp_fifo:in_startofpacket
	wire          channel_9_avalon_universal_slave_0_agent_rf_source_endofpacket;                      // channel_9_avalon_universal_slave_0_agent:rf_source_endofpacket -> channel_9_avalon_universal_slave_0_agent_rsp_fifo:in_endofpacket
	wire          channel_9_avalon_universal_slave_0_agent_rsp_fifo_out_valid;                         // channel_9_avalon_universal_slave_0_agent_rsp_fifo:out_valid -> channel_9_avalon_universal_slave_0_agent:rf_sink_valid
	wire  [117:0] channel_9_avalon_universal_slave_0_agent_rsp_fifo_out_data;                          // channel_9_avalon_universal_slave_0_agent_rsp_fifo:out_data -> channel_9_avalon_universal_slave_0_agent:rf_sink_data
	wire          channel_9_avalon_universal_slave_0_agent_rsp_fifo_out_ready;                         // channel_9_avalon_universal_slave_0_agent:rf_sink_ready -> channel_9_avalon_universal_slave_0_agent_rsp_fifo:out_ready
	wire          channel_9_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket;                 // channel_9_avalon_universal_slave_0_agent_rsp_fifo:out_startofpacket -> channel_9_avalon_universal_slave_0_agent:rf_sink_startofpacket
	wire          channel_9_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket;                   // channel_9_avalon_universal_slave_0_agent_rsp_fifo:out_endofpacket -> channel_9_avalon_universal_slave_0_agent:rf_sink_endofpacket
	wire          channel_9_avalon_universal_slave_0_agent_rdata_fifo_src_valid;                       // channel_9_avalon_universal_slave_0_agent:rdata_fifo_src_valid -> channel_9_avalon_universal_slave_0_agent:rdata_fifo_sink_valid
	wire   [33:0] channel_9_avalon_universal_slave_0_agent_rdata_fifo_src_data;                        // channel_9_avalon_universal_slave_0_agent:rdata_fifo_src_data -> channel_9_avalon_universal_slave_0_agent:rdata_fifo_sink_data
	wire          channel_9_avalon_universal_slave_0_agent_rdata_fifo_src_ready;                       // channel_9_avalon_universal_slave_0_agent:rdata_fifo_sink_ready -> channel_9_avalon_universal_slave_0_agent:rdata_fifo_src_ready
	wire          cmd_mux_009_src_valid;                                                               // cmd_mux_009:src_valid -> channel_9_avalon_universal_slave_0_agent:cp_valid
	wire  [116:0] cmd_mux_009_src_data;                                                                // cmd_mux_009:src_data -> channel_9_avalon_universal_slave_0_agent:cp_data
	wire          cmd_mux_009_src_ready;                                                               // channel_9_avalon_universal_slave_0_agent:cp_ready -> cmd_mux_009:src_ready
	wire   [11:0] cmd_mux_009_src_channel;                                                             // cmd_mux_009:src_channel -> channel_9_avalon_universal_slave_0_agent:cp_channel
	wire          cmd_mux_009_src_startofpacket;                                                       // cmd_mux_009:src_startofpacket -> channel_9_avalon_universal_slave_0_agent:cp_startofpacket
	wire          cmd_mux_009_src_endofpacket;                                                         // cmd_mux_009:src_endofpacket -> channel_9_avalon_universal_slave_0_agent:cp_endofpacket
	wire   [31:0] channel_10_avalon_universal_slave_0_agent_m0_readdata;                               // channel_10_avalon_universal_slave_0_translator:uav_readdata -> channel_10_avalon_universal_slave_0_agent:m0_readdata
	wire          channel_10_avalon_universal_slave_0_agent_m0_waitrequest;                            // channel_10_avalon_universal_slave_0_translator:uav_waitrequest -> channel_10_avalon_universal_slave_0_agent:m0_waitrequest
	wire          channel_10_avalon_universal_slave_0_agent_m0_debugaccess;                            // channel_10_avalon_universal_slave_0_agent:m0_debugaccess -> channel_10_avalon_universal_slave_0_translator:uav_debugaccess
	wire   [31:0] channel_10_avalon_universal_slave_0_agent_m0_address;                                // channel_10_avalon_universal_slave_0_agent:m0_address -> channel_10_avalon_universal_slave_0_translator:uav_address
	wire    [3:0] channel_10_avalon_universal_slave_0_agent_m0_byteenable;                             // channel_10_avalon_universal_slave_0_agent:m0_byteenable -> channel_10_avalon_universal_slave_0_translator:uav_byteenable
	wire          channel_10_avalon_universal_slave_0_agent_m0_read;                                   // channel_10_avalon_universal_slave_0_agent:m0_read -> channel_10_avalon_universal_slave_0_translator:uav_read
	wire          channel_10_avalon_universal_slave_0_agent_m0_readdatavalid;                          // channel_10_avalon_universal_slave_0_translator:uav_readdatavalid -> channel_10_avalon_universal_slave_0_agent:m0_readdatavalid
	wire          channel_10_avalon_universal_slave_0_agent_m0_lock;                                   // channel_10_avalon_universal_slave_0_agent:m0_lock -> channel_10_avalon_universal_slave_0_translator:uav_lock
	wire   [31:0] channel_10_avalon_universal_slave_0_agent_m0_writedata;                              // channel_10_avalon_universal_slave_0_agent:m0_writedata -> channel_10_avalon_universal_slave_0_translator:uav_writedata
	wire          channel_10_avalon_universal_slave_0_agent_m0_write;                                  // channel_10_avalon_universal_slave_0_agent:m0_write -> channel_10_avalon_universal_slave_0_translator:uav_write
	wire    [2:0] channel_10_avalon_universal_slave_0_agent_m0_burstcount;                             // channel_10_avalon_universal_slave_0_agent:m0_burstcount -> channel_10_avalon_universal_slave_0_translator:uav_burstcount
	wire          channel_10_avalon_universal_slave_0_agent_rf_source_valid;                           // channel_10_avalon_universal_slave_0_agent:rf_source_valid -> channel_10_avalon_universal_slave_0_agent_rsp_fifo:in_valid
	wire  [117:0] channel_10_avalon_universal_slave_0_agent_rf_source_data;                            // channel_10_avalon_universal_slave_0_agent:rf_source_data -> channel_10_avalon_universal_slave_0_agent_rsp_fifo:in_data
	wire          channel_10_avalon_universal_slave_0_agent_rf_source_ready;                           // channel_10_avalon_universal_slave_0_agent_rsp_fifo:in_ready -> channel_10_avalon_universal_slave_0_agent:rf_source_ready
	wire          channel_10_avalon_universal_slave_0_agent_rf_source_startofpacket;                   // channel_10_avalon_universal_slave_0_agent:rf_source_startofpacket -> channel_10_avalon_universal_slave_0_agent_rsp_fifo:in_startofpacket
	wire          channel_10_avalon_universal_slave_0_agent_rf_source_endofpacket;                     // channel_10_avalon_universal_slave_0_agent:rf_source_endofpacket -> channel_10_avalon_universal_slave_0_agent_rsp_fifo:in_endofpacket
	wire          channel_10_avalon_universal_slave_0_agent_rsp_fifo_out_valid;                        // channel_10_avalon_universal_slave_0_agent_rsp_fifo:out_valid -> channel_10_avalon_universal_slave_0_agent:rf_sink_valid
	wire  [117:0] channel_10_avalon_universal_slave_0_agent_rsp_fifo_out_data;                         // channel_10_avalon_universal_slave_0_agent_rsp_fifo:out_data -> channel_10_avalon_universal_slave_0_agent:rf_sink_data
	wire          channel_10_avalon_universal_slave_0_agent_rsp_fifo_out_ready;                        // channel_10_avalon_universal_slave_0_agent:rf_sink_ready -> channel_10_avalon_universal_slave_0_agent_rsp_fifo:out_ready
	wire          channel_10_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket;                // channel_10_avalon_universal_slave_0_agent_rsp_fifo:out_startofpacket -> channel_10_avalon_universal_slave_0_agent:rf_sink_startofpacket
	wire          channel_10_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket;                  // channel_10_avalon_universal_slave_0_agent_rsp_fifo:out_endofpacket -> channel_10_avalon_universal_slave_0_agent:rf_sink_endofpacket
	wire          channel_10_avalon_universal_slave_0_agent_rdata_fifo_src_valid;                      // channel_10_avalon_universal_slave_0_agent:rdata_fifo_src_valid -> channel_10_avalon_universal_slave_0_agent:rdata_fifo_sink_valid
	wire   [33:0] channel_10_avalon_universal_slave_0_agent_rdata_fifo_src_data;                       // channel_10_avalon_universal_slave_0_agent:rdata_fifo_src_data -> channel_10_avalon_universal_slave_0_agent:rdata_fifo_sink_data
	wire          channel_10_avalon_universal_slave_0_agent_rdata_fifo_src_ready;                      // channel_10_avalon_universal_slave_0_agent:rdata_fifo_sink_ready -> channel_10_avalon_universal_slave_0_agent:rdata_fifo_src_ready
	wire          cmd_mux_010_src_valid;                                                               // cmd_mux_010:src_valid -> channel_10_avalon_universal_slave_0_agent:cp_valid
	wire  [116:0] cmd_mux_010_src_data;                                                                // cmd_mux_010:src_data -> channel_10_avalon_universal_slave_0_agent:cp_data
	wire          cmd_mux_010_src_ready;                                                               // channel_10_avalon_universal_slave_0_agent:cp_ready -> cmd_mux_010:src_ready
	wire   [11:0] cmd_mux_010_src_channel;                                                             // cmd_mux_010:src_channel -> channel_10_avalon_universal_slave_0_agent:cp_channel
	wire          cmd_mux_010_src_startofpacket;                                                       // cmd_mux_010:src_startofpacket -> channel_10_avalon_universal_slave_0_agent:cp_startofpacket
	wire          cmd_mux_010_src_endofpacket;                                                         // cmd_mux_010:src_endofpacket -> channel_10_avalon_universal_slave_0_agent:cp_endofpacket
	wire   [31:0] channel_11_avalon_universal_slave_0_agent_m0_readdata;                               // channel_11_avalon_universal_slave_0_translator:uav_readdata -> channel_11_avalon_universal_slave_0_agent:m0_readdata
	wire          channel_11_avalon_universal_slave_0_agent_m0_waitrequest;                            // channel_11_avalon_universal_slave_0_translator:uav_waitrequest -> channel_11_avalon_universal_slave_0_agent:m0_waitrequest
	wire          channel_11_avalon_universal_slave_0_agent_m0_debugaccess;                            // channel_11_avalon_universal_slave_0_agent:m0_debugaccess -> channel_11_avalon_universal_slave_0_translator:uav_debugaccess
	wire   [31:0] channel_11_avalon_universal_slave_0_agent_m0_address;                                // channel_11_avalon_universal_slave_0_agent:m0_address -> channel_11_avalon_universal_slave_0_translator:uav_address
	wire    [3:0] channel_11_avalon_universal_slave_0_agent_m0_byteenable;                             // channel_11_avalon_universal_slave_0_agent:m0_byteenable -> channel_11_avalon_universal_slave_0_translator:uav_byteenable
	wire          channel_11_avalon_universal_slave_0_agent_m0_read;                                   // channel_11_avalon_universal_slave_0_agent:m0_read -> channel_11_avalon_universal_slave_0_translator:uav_read
	wire          channel_11_avalon_universal_slave_0_agent_m0_readdatavalid;                          // channel_11_avalon_universal_slave_0_translator:uav_readdatavalid -> channel_11_avalon_universal_slave_0_agent:m0_readdatavalid
	wire          channel_11_avalon_universal_slave_0_agent_m0_lock;                                   // channel_11_avalon_universal_slave_0_agent:m0_lock -> channel_11_avalon_universal_slave_0_translator:uav_lock
	wire   [31:0] channel_11_avalon_universal_slave_0_agent_m0_writedata;                              // channel_11_avalon_universal_slave_0_agent:m0_writedata -> channel_11_avalon_universal_slave_0_translator:uav_writedata
	wire          channel_11_avalon_universal_slave_0_agent_m0_write;                                  // channel_11_avalon_universal_slave_0_agent:m0_write -> channel_11_avalon_universal_slave_0_translator:uav_write
	wire    [2:0] channel_11_avalon_universal_slave_0_agent_m0_burstcount;                             // channel_11_avalon_universal_slave_0_agent:m0_burstcount -> channel_11_avalon_universal_slave_0_translator:uav_burstcount
	wire          channel_11_avalon_universal_slave_0_agent_rf_source_valid;                           // channel_11_avalon_universal_slave_0_agent:rf_source_valid -> channel_11_avalon_universal_slave_0_agent_rsp_fifo:in_valid
	wire  [117:0] channel_11_avalon_universal_slave_0_agent_rf_source_data;                            // channel_11_avalon_universal_slave_0_agent:rf_source_data -> channel_11_avalon_universal_slave_0_agent_rsp_fifo:in_data
	wire          channel_11_avalon_universal_slave_0_agent_rf_source_ready;                           // channel_11_avalon_universal_slave_0_agent_rsp_fifo:in_ready -> channel_11_avalon_universal_slave_0_agent:rf_source_ready
	wire          channel_11_avalon_universal_slave_0_agent_rf_source_startofpacket;                   // channel_11_avalon_universal_slave_0_agent:rf_source_startofpacket -> channel_11_avalon_universal_slave_0_agent_rsp_fifo:in_startofpacket
	wire          channel_11_avalon_universal_slave_0_agent_rf_source_endofpacket;                     // channel_11_avalon_universal_slave_0_agent:rf_source_endofpacket -> channel_11_avalon_universal_slave_0_agent_rsp_fifo:in_endofpacket
	wire          channel_11_avalon_universal_slave_0_agent_rsp_fifo_out_valid;                        // channel_11_avalon_universal_slave_0_agent_rsp_fifo:out_valid -> channel_11_avalon_universal_slave_0_agent:rf_sink_valid
	wire  [117:0] channel_11_avalon_universal_slave_0_agent_rsp_fifo_out_data;                         // channel_11_avalon_universal_slave_0_agent_rsp_fifo:out_data -> channel_11_avalon_universal_slave_0_agent:rf_sink_data
	wire          channel_11_avalon_universal_slave_0_agent_rsp_fifo_out_ready;                        // channel_11_avalon_universal_slave_0_agent:rf_sink_ready -> channel_11_avalon_universal_slave_0_agent_rsp_fifo:out_ready
	wire          channel_11_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket;                // channel_11_avalon_universal_slave_0_agent_rsp_fifo:out_startofpacket -> channel_11_avalon_universal_slave_0_agent:rf_sink_startofpacket
	wire          channel_11_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket;                  // channel_11_avalon_universal_slave_0_agent_rsp_fifo:out_endofpacket -> channel_11_avalon_universal_slave_0_agent:rf_sink_endofpacket
	wire          channel_11_avalon_universal_slave_0_agent_rdata_fifo_src_valid;                      // channel_11_avalon_universal_slave_0_agent:rdata_fifo_src_valid -> channel_11_avalon_universal_slave_0_agent:rdata_fifo_sink_valid
	wire   [33:0] channel_11_avalon_universal_slave_0_agent_rdata_fifo_src_data;                       // channel_11_avalon_universal_slave_0_agent:rdata_fifo_src_data -> channel_11_avalon_universal_slave_0_agent:rdata_fifo_sink_data
	wire          channel_11_avalon_universal_slave_0_agent_rdata_fifo_src_ready;                      // channel_11_avalon_universal_slave_0_agent:rdata_fifo_sink_ready -> channel_11_avalon_universal_slave_0_agent:rdata_fifo_src_ready
	wire          cmd_mux_011_src_valid;                                                               // cmd_mux_011:src_valid -> channel_11_avalon_universal_slave_0_agent:cp_valid
	wire  [116:0] cmd_mux_011_src_data;                                                                // cmd_mux_011:src_data -> channel_11_avalon_universal_slave_0_agent:cp_data
	wire          cmd_mux_011_src_ready;                                                               // channel_11_avalon_universal_slave_0_agent:cp_ready -> cmd_mux_011:src_ready
	wire   [11:0] cmd_mux_011_src_channel;                                                             // cmd_mux_011:src_channel -> channel_11_avalon_universal_slave_0_agent:cp_channel
	wire          cmd_mux_011_src_startofpacket;                                                       // cmd_mux_011:src_startofpacket -> channel_11_avalon_universal_slave_0_agent:cp_startofpacket
	wire          cmd_mux_011_src_endofpacket;                                                         // cmd_mux_011:src_endofpacket -> channel_11_avalon_universal_slave_0_agent:cp_endofpacket
	wire          master_avalon_universal_master_0_agent_cp_valid;                                     // master_avalon_universal_master_0_agent:cp_valid -> router:sink_valid
	wire  [116:0] master_avalon_universal_master_0_agent_cp_data;                                      // master_avalon_universal_master_0_agent:cp_data -> router:sink_data
	wire          master_avalon_universal_master_0_agent_cp_ready;                                     // router:sink_ready -> master_avalon_universal_master_0_agent:cp_ready
	wire          master_avalon_universal_master_0_agent_cp_startofpacket;                             // master_avalon_universal_master_0_agent:cp_startofpacket -> router:sink_startofpacket
	wire          master_avalon_universal_master_0_agent_cp_endofpacket;                               // master_avalon_universal_master_0_agent:cp_endofpacket -> router:sink_endofpacket
	wire          channel_1_avalon_universal_slave_0_agent_rp_valid;                                   // channel_1_avalon_universal_slave_0_agent:rp_valid -> router_001:sink_valid
	wire  [116:0] channel_1_avalon_universal_slave_0_agent_rp_data;                                    // channel_1_avalon_universal_slave_0_agent:rp_data -> router_001:sink_data
	wire          channel_1_avalon_universal_slave_0_agent_rp_ready;                                   // router_001:sink_ready -> channel_1_avalon_universal_slave_0_agent:rp_ready
	wire          channel_1_avalon_universal_slave_0_agent_rp_startofpacket;                           // channel_1_avalon_universal_slave_0_agent:rp_startofpacket -> router_001:sink_startofpacket
	wire          channel_1_avalon_universal_slave_0_agent_rp_endofpacket;                             // channel_1_avalon_universal_slave_0_agent:rp_endofpacket -> router_001:sink_endofpacket
	wire          router_001_src_valid;                                                                // router_001:src_valid -> rsp_demux:sink_valid
	wire  [116:0] router_001_src_data;                                                                 // router_001:src_data -> rsp_demux:sink_data
	wire          router_001_src_ready;                                                                // rsp_demux:sink_ready -> router_001:src_ready
	wire   [11:0] router_001_src_channel;                                                              // router_001:src_channel -> rsp_demux:sink_channel
	wire          router_001_src_startofpacket;                                                        // router_001:src_startofpacket -> rsp_demux:sink_startofpacket
	wire          router_001_src_endofpacket;                                                          // router_001:src_endofpacket -> rsp_demux:sink_endofpacket
	wire          channel_0_avalon_universal_slave_0_agent_rp_valid;                                   // channel_0_avalon_universal_slave_0_agent:rp_valid -> router_002:sink_valid
	wire  [116:0] channel_0_avalon_universal_slave_0_agent_rp_data;                                    // channel_0_avalon_universal_slave_0_agent:rp_data -> router_002:sink_data
	wire          channel_0_avalon_universal_slave_0_agent_rp_ready;                                   // router_002:sink_ready -> channel_0_avalon_universal_slave_0_agent:rp_ready
	wire          channel_0_avalon_universal_slave_0_agent_rp_startofpacket;                           // channel_0_avalon_universal_slave_0_agent:rp_startofpacket -> router_002:sink_startofpacket
	wire          channel_0_avalon_universal_slave_0_agent_rp_endofpacket;                             // channel_0_avalon_universal_slave_0_agent:rp_endofpacket -> router_002:sink_endofpacket
	wire          router_002_src_valid;                                                                // router_002:src_valid -> rsp_demux_001:sink_valid
	wire  [116:0] router_002_src_data;                                                                 // router_002:src_data -> rsp_demux_001:sink_data
	wire          router_002_src_ready;                                                                // rsp_demux_001:sink_ready -> router_002:src_ready
	wire   [11:0] router_002_src_channel;                                                              // router_002:src_channel -> rsp_demux_001:sink_channel
	wire          router_002_src_startofpacket;                                                        // router_002:src_startofpacket -> rsp_demux_001:sink_startofpacket
	wire          router_002_src_endofpacket;                                                          // router_002:src_endofpacket -> rsp_demux_001:sink_endofpacket
	wire          channel_2_avalon_universal_slave_0_agent_rp_valid;                                   // channel_2_avalon_universal_slave_0_agent:rp_valid -> router_003:sink_valid
	wire  [116:0] channel_2_avalon_universal_slave_0_agent_rp_data;                                    // channel_2_avalon_universal_slave_0_agent:rp_data -> router_003:sink_data
	wire          channel_2_avalon_universal_slave_0_agent_rp_ready;                                   // router_003:sink_ready -> channel_2_avalon_universal_slave_0_agent:rp_ready
	wire          channel_2_avalon_universal_slave_0_agent_rp_startofpacket;                           // channel_2_avalon_universal_slave_0_agent:rp_startofpacket -> router_003:sink_startofpacket
	wire          channel_2_avalon_universal_slave_0_agent_rp_endofpacket;                             // channel_2_avalon_universal_slave_0_agent:rp_endofpacket -> router_003:sink_endofpacket
	wire          router_003_src_valid;                                                                // router_003:src_valid -> rsp_demux_002:sink_valid
	wire  [116:0] router_003_src_data;                                                                 // router_003:src_data -> rsp_demux_002:sink_data
	wire          router_003_src_ready;                                                                // rsp_demux_002:sink_ready -> router_003:src_ready
	wire   [11:0] router_003_src_channel;                                                              // router_003:src_channel -> rsp_demux_002:sink_channel
	wire          router_003_src_startofpacket;                                                        // router_003:src_startofpacket -> rsp_demux_002:sink_startofpacket
	wire          router_003_src_endofpacket;                                                          // router_003:src_endofpacket -> rsp_demux_002:sink_endofpacket
	wire          channel_3_avalon_universal_slave_0_agent_rp_valid;                                   // channel_3_avalon_universal_slave_0_agent:rp_valid -> router_004:sink_valid
	wire  [116:0] channel_3_avalon_universal_slave_0_agent_rp_data;                                    // channel_3_avalon_universal_slave_0_agent:rp_data -> router_004:sink_data
	wire          channel_3_avalon_universal_slave_0_agent_rp_ready;                                   // router_004:sink_ready -> channel_3_avalon_universal_slave_0_agent:rp_ready
	wire          channel_3_avalon_universal_slave_0_agent_rp_startofpacket;                           // channel_3_avalon_universal_slave_0_agent:rp_startofpacket -> router_004:sink_startofpacket
	wire          channel_3_avalon_universal_slave_0_agent_rp_endofpacket;                             // channel_3_avalon_universal_slave_0_agent:rp_endofpacket -> router_004:sink_endofpacket
	wire          router_004_src_valid;                                                                // router_004:src_valid -> rsp_demux_003:sink_valid
	wire  [116:0] router_004_src_data;                                                                 // router_004:src_data -> rsp_demux_003:sink_data
	wire          router_004_src_ready;                                                                // rsp_demux_003:sink_ready -> router_004:src_ready
	wire   [11:0] router_004_src_channel;                                                              // router_004:src_channel -> rsp_demux_003:sink_channel
	wire          router_004_src_startofpacket;                                                        // router_004:src_startofpacket -> rsp_demux_003:sink_startofpacket
	wire          router_004_src_endofpacket;                                                          // router_004:src_endofpacket -> rsp_demux_003:sink_endofpacket
	wire          channel_4_avalon_universal_slave_0_agent_rp_valid;                                   // channel_4_avalon_universal_slave_0_agent:rp_valid -> router_005:sink_valid
	wire  [116:0] channel_4_avalon_universal_slave_0_agent_rp_data;                                    // channel_4_avalon_universal_slave_0_agent:rp_data -> router_005:sink_data
	wire          channel_4_avalon_universal_slave_0_agent_rp_ready;                                   // router_005:sink_ready -> channel_4_avalon_universal_slave_0_agent:rp_ready
	wire          channel_4_avalon_universal_slave_0_agent_rp_startofpacket;                           // channel_4_avalon_universal_slave_0_agent:rp_startofpacket -> router_005:sink_startofpacket
	wire          channel_4_avalon_universal_slave_0_agent_rp_endofpacket;                             // channel_4_avalon_universal_slave_0_agent:rp_endofpacket -> router_005:sink_endofpacket
	wire          router_005_src_valid;                                                                // router_005:src_valid -> rsp_demux_004:sink_valid
	wire  [116:0] router_005_src_data;                                                                 // router_005:src_data -> rsp_demux_004:sink_data
	wire          router_005_src_ready;                                                                // rsp_demux_004:sink_ready -> router_005:src_ready
	wire   [11:0] router_005_src_channel;                                                              // router_005:src_channel -> rsp_demux_004:sink_channel
	wire          router_005_src_startofpacket;                                                        // router_005:src_startofpacket -> rsp_demux_004:sink_startofpacket
	wire          router_005_src_endofpacket;                                                          // router_005:src_endofpacket -> rsp_demux_004:sink_endofpacket
	wire          channel_5_avalon_universal_slave_0_agent_rp_valid;                                   // channel_5_avalon_universal_slave_0_agent:rp_valid -> router_006:sink_valid
	wire  [116:0] channel_5_avalon_universal_slave_0_agent_rp_data;                                    // channel_5_avalon_universal_slave_0_agent:rp_data -> router_006:sink_data
	wire          channel_5_avalon_universal_slave_0_agent_rp_ready;                                   // router_006:sink_ready -> channel_5_avalon_universal_slave_0_agent:rp_ready
	wire          channel_5_avalon_universal_slave_0_agent_rp_startofpacket;                           // channel_5_avalon_universal_slave_0_agent:rp_startofpacket -> router_006:sink_startofpacket
	wire          channel_5_avalon_universal_slave_0_agent_rp_endofpacket;                             // channel_5_avalon_universal_slave_0_agent:rp_endofpacket -> router_006:sink_endofpacket
	wire          router_006_src_valid;                                                                // router_006:src_valid -> rsp_demux_005:sink_valid
	wire  [116:0] router_006_src_data;                                                                 // router_006:src_data -> rsp_demux_005:sink_data
	wire          router_006_src_ready;                                                                // rsp_demux_005:sink_ready -> router_006:src_ready
	wire   [11:0] router_006_src_channel;                                                              // router_006:src_channel -> rsp_demux_005:sink_channel
	wire          router_006_src_startofpacket;                                                        // router_006:src_startofpacket -> rsp_demux_005:sink_startofpacket
	wire          router_006_src_endofpacket;                                                          // router_006:src_endofpacket -> rsp_demux_005:sink_endofpacket
	wire          channel_6_avalon_universal_slave_0_agent_rp_valid;                                   // channel_6_avalon_universal_slave_0_agent:rp_valid -> router_007:sink_valid
	wire  [116:0] channel_6_avalon_universal_slave_0_agent_rp_data;                                    // channel_6_avalon_universal_slave_0_agent:rp_data -> router_007:sink_data
	wire          channel_6_avalon_universal_slave_0_agent_rp_ready;                                   // router_007:sink_ready -> channel_6_avalon_universal_slave_0_agent:rp_ready
	wire          channel_6_avalon_universal_slave_0_agent_rp_startofpacket;                           // channel_6_avalon_universal_slave_0_agent:rp_startofpacket -> router_007:sink_startofpacket
	wire          channel_6_avalon_universal_slave_0_agent_rp_endofpacket;                             // channel_6_avalon_universal_slave_0_agent:rp_endofpacket -> router_007:sink_endofpacket
	wire          router_007_src_valid;                                                                // router_007:src_valid -> rsp_demux_006:sink_valid
	wire  [116:0] router_007_src_data;                                                                 // router_007:src_data -> rsp_demux_006:sink_data
	wire          router_007_src_ready;                                                                // rsp_demux_006:sink_ready -> router_007:src_ready
	wire   [11:0] router_007_src_channel;                                                              // router_007:src_channel -> rsp_demux_006:sink_channel
	wire          router_007_src_startofpacket;                                                        // router_007:src_startofpacket -> rsp_demux_006:sink_startofpacket
	wire          router_007_src_endofpacket;                                                          // router_007:src_endofpacket -> rsp_demux_006:sink_endofpacket
	wire          channel_7_avalon_universal_slave_0_agent_rp_valid;                                   // channel_7_avalon_universal_slave_0_agent:rp_valid -> router_008:sink_valid
	wire  [116:0] channel_7_avalon_universal_slave_0_agent_rp_data;                                    // channel_7_avalon_universal_slave_0_agent:rp_data -> router_008:sink_data
	wire          channel_7_avalon_universal_slave_0_agent_rp_ready;                                   // router_008:sink_ready -> channel_7_avalon_universal_slave_0_agent:rp_ready
	wire          channel_7_avalon_universal_slave_0_agent_rp_startofpacket;                           // channel_7_avalon_universal_slave_0_agent:rp_startofpacket -> router_008:sink_startofpacket
	wire          channel_7_avalon_universal_slave_0_agent_rp_endofpacket;                             // channel_7_avalon_universal_slave_0_agent:rp_endofpacket -> router_008:sink_endofpacket
	wire          router_008_src_valid;                                                                // router_008:src_valid -> rsp_demux_007:sink_valid
	wire  [116:0] router_008_src_data;                                                                 // router_008:src_data -> rsp_demux_007:sink_data
	wire          router_008_src_ready;                                                                // rsp_demux_007:sink_ready -> router_008:src_ready
	wire   [11:0] router_008_src_channel;                                                              // router_008:src_channel -> rsp_demux_007:sink_channel
	wire          router_008_src_startofpacket;                                                        // router_008:src_startofpacket -> rsp_demux_007:sink_startofpacket
	wire          router_008_src_endofpacket;                                                          // router_008:src_endofpacket -> rsp_demux_007:sink_endofpacket
	wire          channel_8_avalon_universal_slave_0_agent_rp_valid;                                   // channel_8_avalon_universal_slave_0_agent:rp_valid -> router_009:sink_valid
	wire  [116:0] channel_8_avalon_universal_slave_0_agent_rp_data;                                    // channel_8_avalon_universal_slave_0_agent:rp_data -> router_009:sink_data
	wire          channel_8_avalon_universal_slave_0_agent_rp_ready;                                   // router_009:sink_ready -> channel_8_avalon_universal_slave_0_agent:rp_ready
	wire          channel_8_avalon_universal_slave_0_agent_rp_startofpacket;                           // channel_8_avalon_universal_slave_0_agent:rp_startofpacket -> router_009:sink_startofpacket
	wire          channel_8_avalon_universal_slave_0_agent_rp_endofpacket;                             // channel_8_avalon_universal_slave_0_agent:rp_endofpacket -> router_009:sink_endofpacket
	wire          router_009_src_valid;                                                                // router_009:src_valid -> rsp_demux_008:sink_valid
	wire  [116:0] router_009_src_data;                                                                 // router_009:src_data -> rsp_demux_008:sink_data
	wire          router_009_src_ready;                                                                // rsp_demux_008:sink_ready -> router_009:src_ready
	wire   [11:0] router_009_src_channel;                                                              // router_009:src_channel -> rsp_demux_008:sink_channel
	wire          router_009_src_startofpacket;                                                        // router_009:src_startofpacket -> rsp_demux_008:sink_startofpacket
	wire          router_009_src_endofpacket;                                                          // router_009:src_endofpacket -> rsp_demux_008:sink_endofpacket
	wire          channel_9_avalon_universal_slave_0_agent_rp_valid;                                   // channel_9_avalon_universal_slave_0_agent:rp_valid -> router_010:sink_valid
	wire  [116:0] channel_9_avalon_universal_slave_0_agent_rp_data;                                    // channel_9_avalon_universal_slave_0_agent:rp_data -> router_010:sink_data
	wire          channel_9_avalon_universal_slave_0_agent_rp_ready;                                   // router_010:sink_ready -> channel_9_avalon_universal_slave_0_agent:rp_ready
	wire          channel_9_avalon_universal_slave_0_agent_rp_startofpacket;                           // channel_9_avalon_universal_slave_0_agent:rp_startofpacket -> router_010:sink_startofpacket
	wire          channel_9_avalon_universal_slave_0_agent_rp_endofpacket;                             // channel_9_avalon_universal_slave_0_agent:rp_endofpacket -> router_010:sink_endofpacket
	wire          router_010_src_valid;                                                                // router_010:src_valid -> rsp_demux_009:sink_valid
	wire  [116:0] router_010_src_data;                                                                 // router_010:src_data -> rsp_demux_009:sink_data
	wire          router_010_src_ready;                                                                // rsp_demux_009:sink_ready -> router_010:src_ready
	wire   [11:0] router_010_src_channel;                                                              // router_010:src_channel -> rsp_demux_009:sink_channel
	wire          router_010_src_startofpacket;                                                        // router_010:src_startofpacket -> rsp_demux_009:sink_startofpacket
	wire          router_010_src_endofpacket;                                                          // router_010:src_endofpacket -> rsp_demux_009:sink_endofpacket
	wire          channel_10_avalon_universal_slave_0_agent_rp_valid;                                  // channel_10_avalon_universal_slave_0_agent:rp_valid -> router_011:sink_valid
	wire  [116:0] channel_10_avalon_universal_slave_0_agent_rp_data;                                   // channel_10_avalon_universal_slave_0_agent:rp_data -> router_011:sink_data
	wire          channel_10_avalon_universal_slave_0_agent_rp_ready;                                  // router_011:sink_ready -> channel_10_avalon_universal_slave_0_agent:rp_ready
	wire          channel_10_avalon_universal_slave_0_agent_rp_startofpacket;                          // channel_10_avalon_universal_slave_0_agent:rp_startofpacket -> router_011:sink_startofpacket
	wire          channel_10_avalon_universal_slave_0_agent_rp_endofpacket;                            // channel_10_avalon_universal_slave_0_agent:rp_endofpacket -> router_011:sink_endofpacket
	wire          router_011_src_valid;                                                                // router_011:src_valid -> rsp_demux_010:sink_valid
	wire  [116:0] router_011_src_data;                                                                 // router_011:src_data -> rsp_demux_010:sink_data
	wire          router_011_src_ready;                                                                // rsp_demux_010:sink_ready -> router_011:src_ready
	wire   [11:0] router_011_src_channel;                                                              // router_011:src_channel -> rsp_demux_010:sink_channel
	wire          router_011_src_startofpacket;                                                        // router_011:src_startofpacket -> rsp_demux_010:sink_startofpacket
	wire          router_011_src_endofpacket;                                                          // router_011:src_endofpacket -> rsp_demux_010:sink_endofpacket
	wire          channel_11_avalon_universal_slave_0_agent_rp_valid;                                  // channel_11_avalon_universal_slave_0_agent:rp_valid -> router_012:sink_valid
	wire  [116:0] channel_11_avalon_universal_slave_0_agent_rp_data;                                   // channel_11_avalon_universal_slave_0_agent:rp_data -> router_012:sink_data
	wire          channel_11_avalon_universal_slave_0_agent_rp_ready;                                  // router_012:sink_ready -> channel_11_avalon_universal_slave_0_agent:rp_ready
	wire          channel_11_avalon_universal_slave_0_agent_rp_startofpacket;                          // channel_11_avalon_universal_slave_0_agent:rp_startofpacket -> router_012:sink_startofpacket
	wire          channel_11_avalon_universal_slave_0_agent_rp_endofpacket;                            // channel_11_avalon_universal_slave_0_agent:rp_endofpacket -> router_012:sink_endofpacket
	wire          router_012_src_valid;                                                                // router_012:src_valid -> rsp_demux_011:sink_valid
	wire  [116:0] router_012_src_data;                                                                 // router_012:src_data -> rsp_demux_011:sink_data
	wire          router_012_src_ready;                                                                // rsp_demux_011:sink_ready -> router_012:src_ready
	wire   [11:0] router_012_src_channel;                                                              // router_012:src_channel -> rsp_demux_011:sink_channel
	wire          router_012_src_startofpacket;                                                        // router_012:src_startofpacket -> rsp_demux_011:sink_startofpacket
	wire          router_012_src_endofpacket;                                                          // router_012:src_endofpacket -> rsp_demux_011:sink_endofpacket
	wire          router_src_valid;                                                                    // router:src_valid -> master_avalon_universal_master_0_limiter:cmd_sink_valid
	wire  [116:0] router_src_data;                                                                     // router:src_data -> master_avalon_universal_master_0_limiter:cmd_sink_data
	wire          router_src_ready;                                                                    // master_avalon_universal_master_0_limiter:cmd_sink_ready -> router:src_ready
	wire   [11:0] router_src_channel;                                                                  // router:src_channel -> master_avalon_universal_master_0_limiter:cmd_sink_channel
	wire          router_src_startofpacket;                                                            // router:src_startofpacket -> master_avalon_universal_master_0_limiter:cmd_sink_startofpacket
	wire          router_src_endofpacket;                                                              // router:src_endofpacket -> master_avalon_universal_master_0_limiter:cmd_sink_endofpacket
	wire  [116:0] master_avalon_universal_master_0_limiter_cmd_src_data;                               // master_avalon_universal_master_0_limiter:cmd_src_data -> cmd_demux:sink_data
	wire          master_avalon_universal_master_0_limiter_cmd_src_ready;                              // cmd_demux:sink_ready -> master_avalon_universal_master_0_limiter:cmd_src_ready
	wire   [11:0] master_avalon_universal_master_0_limiter_cmd_src_channel;                            // master_avalon_universal_master_0_limiter:cmd_src_channel -> cmd_demux:sink_channel
	wire          master_avalon_universal_master_0_limiter_cmd_src_startofpacket;                      // master_avalon_universal_master_0_limiter:cmd_src_startofpacket -> cmd_demux:sink_startofpacket
	wire          master_avalon_universal_master_0_limiter_cmd_src_endofpacket;                        // master_avalon_universal_master_0_limiter:cmd_src_endofpacket -> cmd_demux:sink_endofpacket
	wire          rsp_mux_src_valid;                                                                   // rsp_mux:src_valid -> master_avalon_universal_master_0_limiter:rsp_sink_valid
	wire  [116:0] rsp_mux_src_data;                                                                    // rsp_mux:src_data -> master_avalon_universal_master_0_limiter:rsp_sink_data
	wire          rsp_mux_src_ready;                                                                   // master_avalon_universal_master_0_limiter:rsp_sink_ready -> rsp_mux:src_ready
	wire   [11:0] rsp_mux_src_channel;                                                                 // rsp_mux:src_channel -> master_avalon_universal_master_0_limiter:rsp_sink_channel
	wire          rsp_mux_src_startofpacket;                                                           // rsp_mux:src_startofpacket -> master_avalon_universal_master_0_limiter:rsp_sink_startofpacket
	wire          rsp_mux_src_endofpacket;                                                             // rsp_mux:src_endofpacket -> master_avalon_universal_master_0_limiter:rsp_sink_endofpacket
	wire          master_avalon_universal_master_0_limiter_rsp_src_valid;                              // master_avalon_universal_master_0_limiter:rsp_src_valid -> master_avalon_universal_master_0_agent:rp_valid
	wire  [116:0] master_avalon_universal_master_0_limiter_rsp_src_data;                               // master_avalon_universal_master_0_limiter:rsp_src_data -> master_avalon_universal_master_0_agent:rp_data
	wire          master_avalon_universal_master_0_limiter_rsp_src_ready;                              // master_avalon_universal_master_0_agent:rp_ready -> master_avalon_universal_master_0_limiter:rsp_src_ready
	wire   [11:0] master_avalon_universal_master_0_limiter_rsp_src_channel;                            // master_avalon_universal_master_0_limiter:rsp_src_channel -> master_avalon_universal_master_0_agent:rp_channel
	wire          master_avalon_universal_master_0_limiter_rsp_src_startofpacket;                      // master_avalon_universal_master_0_limiter:rsp_src_startofpacket -> master_avalon_universal_master_0_agent:rp_startofpacket
	wire          master_avalon_universal_master_0_limiter_rsp_src_endofpacket;                        // master_avalon_universal_master_0_limiter:rsp_src_endofpacket -> master_avalon_universal_master_0_agent:rp_endofpacket
	wire          cmd_demux_src0_valid;                                                                // cmd_demux:src0_valid -> cmd_mux:sink0_valid
	wire  [116:0] cmd_demux_src0_data;                                                                 // cmd_demux:src0_data -> cmd_mux:sink0_data
	wire          cmd_demux_src0_ready;                                                                // cmd_mux:sink0_ready -> cmd_demux:src0_ready
	wire   [11:0] cmd_demux_src0_channel;                                                              // cmd_demux:src0_channel -> cmd_mux:sink0_channel
	wire          cmd_demux_src0_startofpacket;                                                        // cmd_demux:src0_startofpacket -> cmd_mux:sink0_startofpacket
	wire          cmd_demux_src0_endofpacket;                                                          // cmd_demux:src0_endofpacket -> cmd_mux:sink0_endofpacket
	wire          cmd_demux_src1_valid;                                                                // cmd_demux:src1_valid -> cmd_mux_001:sink0_valid
	wire  [116:0] cmd_demux_src1_data;                                                                 // cmd_demux:src1_data -> cmd_mux_001:sink0_data
	wire          cmd_demux_src1_ready;                                                                // cmd_mux_001:sink0_ready -> cmd_demux:src1_ready
	wire   [11:0] cmd_demux_src1_channel;                                                              // cmd_demux:src1_channel -> cmd_mux_001:sink0_channel
	wire          cmd_demux_src1_startofpacket;                                                        // cmd_demux:src1_startofpacket -> cmd_mux_001:sink0_startofpacket
	wire          cmd_demux_src1_endofpacket;                                                          // cmd_demux:src1_endofpacket -> cmd_mux_001:sink0_endofpacket
	wire          cmd_demux_src2_valid;                                                                // cmd_demux:src2_valid -> cmd_mux_002:sink0_valid
	wire  [116:0] cmd_demux_src2_data;                                                                 // cmd_demux:src2_data -> cmd_mux_002:sink0_data
	wire          cmd_demux_src2_ready;                                                                // cmd_mux_002:sink0_ready -> cmd_demux:src2_ready
	wire   [11:0] cmd_demux_src2_channel;                                                              // cmd_demux:src2_channel -> cmd_mux_002:sink0_channel
	wire          cmd_demux_src2_startofpacket;                                                        // cmd_demux:src2_startofpacket -> cmd_mux_002:sink0_startofpacket
	wire          cmd_demux_src2_endofpacket;                                                          // cmd_demux:src2_endofpacket -> cmd_mux_002:sink0_endofpacket
	wire          cmd_demux_src3_valid;                                                                // cmd_demux:src3_valid -> cmd_mux_003:sink0_valid
	wire  [116:0] cmd_demux_src3_data;                                                                 // cmd_demux:src3_data -> cmd_mux_003:sink0_data
	wire          cmd_demux_src3_ready;                                                                // cmd_mux_003:sink0_ready -> cmd_demux:src3_ready
	wire   [11:0] cmd_demux_src3_channel;                                                              // cmd_demux:src3_channel -> cmd_mux_003:sink0_channel
	wire          cmd_demux_src3_startofpacket;                                                        // cmd_demux:src3_startofpacket -> cmd_mux_003:sink0_startofpacket
	wire          cmd_demux_src3_endofpacket;                                                          // cmd_demux:src3_endofpacket -> cmd_mux_003:sink0_endofpacket
	wire          cmd_demux_src4_valid;                                                                // cmd_demux:src4_valid -> cmd_mux_004:sink0_valid
	wire  [116:0] cmd_demux_src4_data;                                                                 // cmd_demux:src4_data -> cmd_mux_004:sink0_data
	wire          cmd_demux_src4_ready;                                                                // cmd_mux_004:sink0_ready -> cmd_demux:src4_ready
	wire   [11:0] cmd_demux_src4_channel;                                                              // cmd_demux:src4_channel -> cmd_mux_004:sink0_channel
	wire          cmd_demux_src4_startofpacket;                                                        // cmd_demux:src4_startofpacket -> cmd_mux_004:sink0_startofpacket
	wire          cmd_demux_src4_endofpacket;                                                          // cmd_demux:src4_endofpacket -> cmd_mux_004:sink0_endofpacket
	wire          cmd_demux_src5_valid;                                                                // cmd_demux:src5_valid -> cmd_mux_005:sink0_valid
	wire  [116:0] cmd_demux_src5_data;                                                                 // cmd_demux:src5_data -> cmd_mux_005:sink0_data
	wire          cmd_demux_src5_ready;                                                                // cmd_mux_005:sink0_ready -> cmd_demux:src5_ready
	wire   [11:0] cmd_demux_src5_channel;                                                              // cmd_demux:src5_channel -> cmd_mux_005:sink0_channel
	wire          cmd_demux_src5_startofpacket;                                                        // cmd_demux:src5_startofpacket -> cmd_mux_005:sink0_startofpacket
	wire          cmd_demux_src5_endofpacket;                                                          // cmd_demux:src5_endofpacket -> cmd_mux_005:sink0_endofpacket
	wire          cmd_demux_src6_valid;                                                                // cmd_demux:src6_valid -> cmd_mux_006:sink0_valid
	wire  [116:0] cmd_demux_src6_data;                                                                 // cmd_demux:src6_data -> cmd_mux_006:sink0_data
	wire          cmd_demux_src6_ready;                                                                // cmd_mux_006:sink0_ready -> cmd_demux:src6_ready
	wire   [11:0] cmd_demux_src6_channel;                                                              // cmd_demux:src6_channel -> cmd_mux_006:sink0_channel
	wire          cmd_demux_src6_startofpacket;                                                        // cmd_demux:src6_startofpacket -> cmd_mux_006:sink0_startofpacket
	wire          cmd_demux_src6_endofpacket;                                                          // cmd_demux:src6_endofpacket -> cmd_mux_006:sink0_endofpacket
	wire          cmd_demux_src7_valid;                                                                // cmd_demux:src7_valid -> cmd_mux_007:sink0_valid
	wire  [116:0] cmd_demux_src7_data;                                                                 // cmd_demux:src7_data -> cmd_mux_007:sink0_data
	wire          cmd_demux_src7_ready;                                                                // cmd_mux_007:sink0_ready -> cmd_demux:src7_ready
	wire   [11:0] cmd_demux_src7_channel;                                                              // cmd_demux:src7_channel -> cmd_mux_007:sink0_channel
	wire          cmd_demux_src7_startofpacket;                                                        // cmd_demux:src7_startofpacket -> cmd_mux_007:sink0_startofpacket
	wire          cmd_demux_src7_endofpacket;                                                          // cmd_demux:src7_endofpacket -> cmd_mux_007:sink0_endofpacket
	wire          cmd_demux_src8_valid;                                                                // cmd_demux:src8_valid -> cmd_mux_008:sink0_valid
	wire  [116:0] cmd_demux_src8_data;                                                                 // cmd_demux:src8_data -> cmd_mux_008:sink0_data
	wire          cmd_demux_src8_ready;                                                                // cmd_mux_008:sink0_ready -> cmd_demux:src8_ready
	wire   [11:0] cmd_demux_src8_channel;                                                              // cmd_demux:src8_channel -> cmd_mux_008:sink0_channel
	wire          cmd_demux_src8_startofpacket;                                                        // cmd_demux:src8_startofpacket -> cmd_mux_008:sink0_startofpacket
	wire          cmd_demux_src8_endofpacket;                                                          // cmd_demux:src8_endofpacket -> cmd_mux_008:sink0_endofpacket
	wire          cmd_demux_src9_valid;                                                                // cmd_demux:src9_valid -> cmd_mux_009:sink0_valid
	wire  [116:0] cmd_demux_src9_data;                                                                 // cmd_demux:src9_data -> cmd_mux_009:sink0_data
	wire          cmd_demux_src9_ready;                                                                // cmd_mux_009:sink0_ready -> cmd_demux:src9_ready
	wire   [11:0] cmd_demux_src9_channel;                                                              // cmd_demux:src9_channel -> cmd_mux_009:sink0_channel
	wire          cmd_demux_src9_startofpacket;                                                        // cmd_demux:src9_startofpacket -> cmd_mux_009:sink0_startofpacket
	wire          cmd_demux_src9_endofpacket;                                                          // cmd_demux:src9_endofpacket -> cmd_mux_009:sink0_endofpacket
	wire          cmd_demux_src10_valid;                                                               // cmd_demux:src10_valid -> cmd_mux_010:sink0_valid
	wire  [116:0] cmd_demux_src10_data;                                                                // cmd_demux:src10_data -> cmd_mux_010:sink0_data
	wire          cmd_demux_src10_ready;                                                               // cmd_mux_010:sink0_ready -> cmd_demux:src10_ready
	wire   [11:0] cmd_demux_src10_channel;                                                             // cmd_demux:src10_channel -> cmd_mux_010:sink0_channel
	wire          cmd_demux_src10_startofpacket;                                                       // cmd_demux:src10_startofpacket -> cmd_mux_010:sink0_startofpacket
	wire          cmd_demux_src10_endofpacket;                                                         // cmd_demux:src10_endofpacket -> cmd_mux_010:sink0_endofpacket
	wire          cmd_demux_src11_valid;                                                               // cmd_demux:src11_valid -> cmd_mux_011:sink0_valid
	wire  [116:0] cmd_demux_src11_data;                                                                // cmd_demux:src11_data -> cmd_mux_011:sink0_data
	wire          cmd_demux_src11_ready;                                                               // cmd_mux_011:sink0_ready -> cmd_demux:src11_ready
	wire   [11:0] cmd_demux_src11_channel;                                                             // cmd_demux:src11_channel -> cmd_mux_011:sink0_channel
	wire          cmd_demux_src11_startofpacket;                                                       // cmd_demux:src11_startofpacket -> cmd_mux_011:sink0_startofpacket
	wire          cmd_demux_src11_endofpacket;                                                         // cmd_demux:src11_endofpacket -> cmd_mux_011:sink0_endofpacket
	wire          rsp_demux_src0_valid;                                                                // rsp_demux:src0_valid -> rsp_mux:sink0_valid
	wire  [116:0] rsp_demux_src0_data;                                                                 // rsp_demux:src0_data -> rsp_mux:sink0_data
	wire          rsp_demux_src0_ready;                                                                // rsp_mux:sink0_ready -> rsp_demux:src0_ready
	wire   [11:0] rsp_demux_src0_channel;                                                              // rsp_demux:src0_channel -> rsp_mux:sink0_channel
	wire          rsp_demux_src0_startofpacket;                                                        // rsp_demux:src0_startofpacket -> rsp_mux:sink0_startofpacket
	wire          rsp_demux_src0_endofpacket;                                                          // rsp_demux:src0_endofpacket -> rsp_mux:sink0_endofpacket
	wire          rsp_demux_001_src0_valid;                                                            // rsp_demux_001:src0_valid -> rsp_mux:sink1_valid
	wire  [116:0] rsp_demux_001_src0_data;                                                             // rsp_demux_001:src0_data -> rsp_mux:sink1_data
	wire          rsp_demux_001_src0_ready;                                                            // rsp_mux:sink1_ready -> rsp_demux_001:src0_ready
	wire   [11:0] rsp_demux_001_src0_channel;                                                          // rsp_demux_001:src0_channel -> rsp_mux:sink1_channel
	wire          rsp_demux_001_src0_startofpacket;                                                    // rsp_demux_001:src0_startofpacket -> rsp_mux:sink1_startofpacket
	wire          rsp_demux_001_src0_endofpacket;                                                      // rsp_demux_001:src0_endofpacket -> rsp_mux:sink1_endofpacket
	wire          rsp_demux_002_src0_valid;                                                            // rsp_demux_002:src0_valid -> rsp_mux:sink2_valid
	wire  [116:0] rsp_demux_002_src0_data;                                                             // rsp_demux_002:src0_data -> rsp_mux:sink2_data
	wire          rsp_demux_002_src0_ready;                                                            // rsp_mux:sink2_ready -> rsp_demux_002:src0_ready
	wire   [11:0] rsp_demux_002_src0_channel;                                                          // rsp_demux_002:src0_channel -> rsp_mux:sink2_channel
	wire          rsp_demux_002_src0_startofpacket;                                                    // rsp_demux_002:src0_startofpacket -> rsp_mux:sink2_startofpacket
	wire          rsp_demux_002_src0_endofpacket;                                                      // rsp_demux_002:src0_endofpacket -> rsp_mux:sink2_endofpacket
	wire          rsp_demux_003_src0_valid;                                                            // rsp_demux_003:src0_valid -> rsp_mux:sink3_valid
	wire  [116:0] rsp_demux_003_src0_data;                                                             // rsp_demux_003:src0_data -> rsp_mux:sink3_data
	wire          rsp_demux_003_src0_ready;                                                            // rsp_mux:sink3_ready -> rsp_demux_003:src0_ready
	wire   [11:0] rsp_demux_003_src0_channel;                                                          // rsp_demux_003:src0_channel -> rsp_mux:sink3_channel
	wire          rsp_demux_003_src0_startofpacket;                                                    // rsp_demux_003:src0_startofpacket -> rsp_mux:sink3_startofpacket
	wire          rsp_demux_003_src0_endofpacket;                                                      // rsp_demux_003:src0_endofpacket -> rsp_mux:sink3_endofpacket
	wire          rsp_demux_004_src0_valid;                                                            // rsp_demux_004:src0_valid -> rsp_mux:sink4_valid
	wire  [116:0] rsp_demux_004_src0_data;                                                             // rsp_demux_004:src0_data -> rsp_mux:sink4_data
	wire          rsp_demux_004_src0_ready;                                                            // rsp_mux:sink4_ready -> rsp_demux_004:src0_ready
	wire   [11:0] rsp_demux_004_src0_channel;                                                          // rsp_demux_004:src0_channel -> rsp_mux:sink4_channel
	wire          rsp_demux_004_src0_startofpacket;                                                    // rsp_demux_004:src0_startofpacket -> rsp_mux:sink4_startofpacket
	wire          rsp_demux_004_src0_endofpacket;                                                      // rsp_demux_004:src0_endofpacket -> rsp_mux:sink4_endofpacket
	wire          rsp_demux_005_src0_valid;                                                            // rsp_demux_005:src0_valid -> rsp_mux:sink5_valid
	wire  [116:0] rsp_demux_005_src0_data;                                                             // rsp_demux_005:src0_data -> rsp_mux:sink5_data
	wire          rsp_demux_005_src0_ready;                                                            // rsp_mux:sink5_ready -> rsp_demux_005:src0_ready
	wire   [11:0] rsp_demux_005_src0_channel;                                                          // rsp_demux_005:src0_channel -> rsp_mux:sink5_channel
	wire          rsp_demux_005_src0_startofpacket;                                                    // rsp_demux_005:src0_startofpacket -> rsp_mux:sink5_startofpacket
	wire          rsp_demux_005_src0_endofpacket;                                                      // rsp_demux_005:src0_endofpacket -> rsp_mux:sink5_endofpacket
	wire          rsp_demux_006_src0_valid;                                                            // rsp_demux_006:src0_valid -> rsp_mux:sink6_valid
	wire  [116:0] rsp_demux_006_src0_data;                                                             // rsp_demux_006:src0_data -> rsp_mux:sink6_data
	wire          rsp_demux_006_src0_ready;                                                            // rsp_mux:sink6_ready -> rsp_demux_006:src0_ready
	wire   [11:0] rsp_demux_006_src0_channel;                                                          // rsp_demux_006:src0_channel -> rsp_mux:sink6_channel
	wire          rsp_demux_006_src0_startofpacket;                                                    // rsp_demux_006:src0_startofpacket -> rsp_mux:sink6_startofpacket
	wire          rsp_demux_006_src0_endofpacket;                                                      // rsp_demux_006:src0_endofpacket -> rsp_mux:sink6_endofpacket
	wire          rsp_demux_007_src0_valid;                                                            // rsp_demux_007:src0_valid -> rsp_mux:sink7_valid
	wire  [116:0] rsp_demux_007_src0_data;                                                             // rsp_demux_007:src0_data -> rsp_mux:sink7_data
	wire          rsp_demux_007_src0_ready;                                                            // rsp_mux:sink7_ready -> rsp_demux_007:src0_ready
	wire   [11:0] rsp_demux_007_src0_channel;                                                          // rsp_demux_007:src0_channel -> rsp_mux:sink7_channel
	wire          rsp_demux_007_src0_startofpacket;                                                    // rsp_demux_007:src0_startofpacket -> rsp_mux:sink7_startofpacket
	wire          rsp_demux_007_src0_endofpacket;                                                      // rsp_demux_007:src0_endofpacket -> rsp_mux:sink7_endofpacket
	wire          rsp_demux_008_src0_valid;                                                            // rsp_demux_008:src0_valid -> rsp_mux:sink8_valid
	wire  [116:0] rsp_demux_008_src0_data;                                                             // rsp_demux_008:src0_data -> rsp_mux:sink8_data
	wire          rsp_demux_008_src0_ready;                                                            // rsp_mux:sink8_ready -> rsp_demux_008:src0_ready
	wire   [11:0] rsp_demux_008_src0_channel;                                                          // rsp_demux_008:src0_channel -> rsp_mux:sink8_channel
	wire          rsp_demux_008_src0_startofpacket;                                                    // rsp_demux_008:src0_startofpacket -> rsp_mux:sink8_startofpacket
	wire          rsp_demux_008_src0_endofpacket;                                                      // rsp_demux_008:src0_endofpacket -> rsp_mux:sink8_endofpacket
	wire          rsp_demux_009_src0_valid;                                                            // rsp_demux_009:src0_valid -> rsp_mux:sink9_valid
	wire  [116:0] rsp_demux_009_src0_data;                                                             // rsp_demux_009:src0_data -> rsp_mux:sink9_data
	wire          rsp_demux_009_src0_ready;                                                            // rsp_mux:sink9_ready -> rsp_demux_009:src0_ready
	wire   [11:0] rsp_demux_009_src0_channel;                                                          // rsp_demux_009:src0_channel -> rsp_mux:sink9_channel
	wire          rsp_demux_009_src0_startofpacket;                                                    // rsp_demux_009:src0_startofpacket -> rsp_mux:sink9_startofpacket
	wire          rsp_demux_009_src0_endofpacket;                                                      // rsp_demux_009:src0_endofpacket -> rsp_mux:sink9_endofpacket
	wire          rsp_demux_010_src0_valid;                                                            // rsp_demux_010:src0_valid -> rsp_mux:sink10_valid
	wire  [116:0] rsp_demux_010_src0_data;                                                             // rsp_demux_010:src0_data -> rsp_mux:sink10_data
	wire          rsp_demux_010_src0_ready;                                                            // rsp_mux:sink10_ready -> rsp_demux_010:src0_ready
	wire   [11:0] rsp_demux_010_src0_channel;                                                          // rsp_demux_010:src0_channel -> rsp_mux:sink10_channel
	wire          rsp_demux_010_src0_startofpacket;                                                    // rsp_demux_010:src0_startofpacket -> rsp_mux:sink10_startofpacket
	wire          rsp_demux_010_src0_endofpacket;                                                      // rsp_demux_010:src0_endofpacket -> rsp_mux:sink10_endofpacket
	wire          rsp_demux_011_src0_valid;                                                            // rsp_demux_011:src0_valid -> rsp_mux:sink11_valid
	wire  [116:0] rsp_demux_011_src0_data;                                                             // rsp_demux_011:src0_data -> rsp_mux:sink11_data
	wire          rsp_demux_011_src0_ready;                                                            // rsp_mux:sink11_ready -> rsp_demux_011:src0_ready
	wire   [11:0] rsp_demux_011_src0_channel;                                                          // rsp_demux_011:src0_channel -> rsp_mux:sink11_channel
	wire          rsp_demux_011_src0_startofpacket;                                                    // rsp_demux_011:src0_startofpacket -> rsp_mux:sink11_startofpacket
	wire          rsp_demux_011_src0_endofpacket;                                                      // rsp_demux_011:src0_endofpacket -> rsp_mux:sink11_endofpacket
	wire   [11:0] master_avalon_universal_master_0_limiter_cmd_valid_data;                             // master_avalon_universal_master_0_limiter:cmd_src_valid -> cmd_demux:sink_valid

	address_decoder_multi_channel_altera_merlin_master_translator_191_g7h47bq #(
		.AV_ADDRESS_W                (32),
		.AV_DATA_W                   (32),
		.AV_BURSTCOUNT_W             (3),
		.AV_BYTEENABLE_W             (4),
		.UAV_ADDRESS_W               (32),
		.UAV_BURSTCOUNT_W            (3),
		.USE_READ                    (1),
		.USE_WRITE                   (1),
		.USE_BEGINBURSTTRANSFER      (0),
		.USE_BEGINTRANSFER           (0),
		.USE_CHIPSELECT              (0),
		.USE_BURSTCOUNT              (1),
		.USE_READDATAVALID           (1),
		.USE_WAITREQUEST             (1),
		.USE_READRESPONSE            (0),
		.USE_WRITERESPONSE           (0),
		.AV_SYMBOLS_PER_WORD         (4),
		.AV_ADDRESS_SYMBOLS          (1),
		.AV_BURSTCOUNT_SYMBOLS       (1),
		.AV_CONSTANT_BURST_BEHAVIOR  (0),
		.UAV_CONSTANT_BURST_BEHAVIOR (0),
		.AV_LINEWRAPBURSTS           (0),
		.AV_REGISTERINCOMINGSIGNALS  (0),
		.SYNC_RESET                  (0),
		.WAITREQUEST_ALLOWANCE       (0)
	) master_avalon_universal_master_0_translator (
		.clk                    (csr_clk_clk_clk),                                                                     //   input,   width = 1,                       clk.clk
		.reset                  (master_reset_reset_bridge_in_reset_reset),                                            //   input,   width = 1,                     reset.reset
		.uav_address            (master_avalon_universal_master_0_translator_avalon_universal_master_0_address),       //  output,  width = 32, avalon_universal_master_0.address
		.uav_burstcount         (master_avalon_universal_master_0_translator_avalon_universal_master_0_burstcount),    //  output,   width = 3,                          .burstcount
		.uav_read               (master_avalon_universal_master_0_translator_avalon_universal_master_0_read),          //  output,   width = 1,                          .read
		.uav_write              (master_avalon_universal_master_0_translator_avalon_universal_master_0_write),         //  output,   width = 1,                          .write
		.uav_waitrequest        (master_avalon_universal_master_0_translator_avalon_universal_master_0_waitrequest),   //   input,   width = 1,                          .waitrequest
		.uav_readdatavalid      (master_avalon_universal_master_0_translator_avalon_universal_master_0_readdatavalid), //   input,   width = 1,                          .readdatavalid
		.uav_byteenable         (master_avalon_universal_master_0_translator_avalon_universal_master_0_byteenable),    //  output,   width = 4,                          .byteenable
		.uav_readdata           (master_avalon_universal_master_0_translator_avalon_universal_master_0_readdata),      //   input,  width = 32,                          .readdata
		.uav_writedata          (master_avalon_universal_master_0_translator_avalon_universal_master_0_writedata),     //  output,  width = 32,                          .writedata
		.uav_lock               (master_avalon_universal_master_0_translator_avalon_universal_master_0_lock),          //  output,   width = 1,                          .lock
		.uav_debugaccess        (master_avalon_universal_master_0_translator_avalon_universal_master_0_debugaccess),   //  output,   width = 1,                          .debugaccess
		.av_address             (master_avalon_universal_master_0_address),                                            //   input,  width = 32,      avalon_anti_master_0.address
		.av_waitrequest         (master_avalon_universal_master_0_waitrequest),                                        //  output,   width = 1,                          .waitrequest
		.av_burstcount          (master_avalon_universal_master_0_burstcount),                                         //   input,   width = 3,                          .burstcount
		.av_byteenable          (master_avalon_universal_master_0_byteenable),                                         //   input,   width = 4,                          .byteenable
		.av_read                (master_avalon_universal_master_0_read),                                               //   input,   width = 1,                          .read
		.av_readdata            (master_avalon_universal_master_0_readdata),                                           //  output,  width = 32,                          .readdata
		.av_readdatavalid       (master_avalon_universal_master_0_readdatavalid),                                      //  output,   width = 1,                          .readdatavalid
		.av_write               (master_avalon_universal_master_0_write),                                              //   input,   width = 1,                          .write
		.av_writedata           (master_avalon_universal_master_0_writedata),                                          //   input,  width = 32,                          .writedata
		.av_lock                (master_avalon_universal_master_0_lock),                                               //   input,   width = 1,                          .lock
		.av_debugaccess         (master_avalon_universal_master_0_debugaccess),                                        //   input,   width = 1,                          .debugaccess
		.av_beginbursttransfer  (1'b0),                                                                                // (terminated),                                        
		.av_begintransfer       (1'b0),                                                                                // (terminated),                                        
		.av_chipselect          (1'b0),                                                                                // (terminated),                                        
		.uav_clken              (),                                                                                    // (terminated),                                        
		.av_clken               (1'b1),                                                                                // (terminated),                                        
		.uav_response           (2'b00),                                                                               // (terminated),                                        
		.av_response            (),                                                                                    // (terminated),                                        
		.uav_writeresponsevalid (1'b0),                                                                                // (terminated),                                        
		.av_writeresponsevalid  ()                                                                                     // (terminated),                                        
	);

	address_decoder_multi_channel_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (16),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (3),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (1),
		.AV_BURSTCOUNT_SYMBOLS          (1),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (0),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) channel_1_avalon_universal_slave_0_translator (
		.clk                    (csr_clk_clk_clk),                                           //   input,   width = 1,                      clk.clk
		.reset                  (master_reset_reset_bridge_in_reset_reset),                  //   input,   width = 1,                    reset.reset
		.uav_address            (channel_1_avalon_universal_slave_0_agent_m0_address),       //   input,  width = 32, avalon_universal_slave_0.address
		.uav_burstcount         (channel_1_avalon_universal_slave_0_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (channel_1_avalon_universal_slave_0_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (channel_1_avalon_universal_slave_0_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (channel_1_avalon_universal_slave_0_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (channel_1_avalon_universal_slave_0_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (channel_1_avalon_universal_slave_0_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (channel_1_avalon_universal_slave_0_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (channel_1_avalon_universal_slave_0_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (channel_1_avalon_universal_slave_0_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (channel_1_avalon_universal_slave_0_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (channel_1_avalon_universal_slave_0_address),                //  output,  width = 16,      avalon_anti_slave_0.address
		.av_write               (channel_1_avalon_universal_slave_0_write),                  //  output,   width = 1,                         .write
		.av_read                (channel_1_avalon_universal_slave_0_read),                   //  output,   width = 1,                         .read
		.av_readdata            (channel_1_avalon_universal_slave_0_readdata),               //   input,  width = 32,                         .readdata
		.av_writedata           (channel_1_avalon_universal_slave_0_writedata),              //  output,  width = 32,                         .writedata
		.av_burstcount          (channel_1_avalon_universal_slave_0_burstcount),             //  output,   width = 3,                         .burstcount
		.av_byteenable          (channel_1_avalon_universal_slave_0_byteenable),             //  output,   width = 4,                         .byteenable
		.av_readdatavalid       (channel_1_avalon_universal_slave_0_readdatavalid),          //   input,   width = 1,                         .readdatavalid
		.av_waitrequest         (channel_1_avalon_universal_slave_0_waitrequest),            //   input,   width = 1,                         .waitrequest
		.av_lock                (channel_1_avalon_universal_slave_0_lock),                   //  output,   width = 1,                         .lock
		.av_debugaccess         (channel_1_avalon_universal_slave_0_debugaccess),            //  output,   width = 1,                         .debugaccess
		.av_begintransfer       (),                                                          // (terminated),                                       
		.av_beginbursttransfer  (),                                                          // (terminated),                                       
		.av_writebyteenable     (),                                                          // (terminated),                                       
		.av_chipselect          (),                                                          // (terminated),                                       
		.av_clken               (),                                                          // (terminated),                                       
		.uav_clken              (1'b0),                                                      // (terminated),                                       
		.av_outputenable        (),                                                          // (terminated),                                       
		.uav_response           (),                                                          // (terminated),                                       
		.av_response            (2'b00),                                                     // (terminated),                                       
		.uav_writeresponsevalid (),                                                          // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                       // (terminated),                                       
	);

	address_decoder_multi_channel_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (16),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (3),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (1),
		.AV_BURSTCOUNT_SYMBOLS          (1),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (0),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) channel_0_avalon_universal_slave_0_translator (
		.clk                    (csr_clk_clk_clk),                                           //   input,   width = 1,                      clk.clk
		.reset                  (master_reset_reset_bridge_in_reset_reset),                  //   input,   width = 1,                    reset.reset
		.uav_address            (channel_0_avalon_universal_slave_0_agent_m0_address),       //   input,  width = 32, avalon_universal_slave_0.address
		.uav_burstcount         (channel_0_avalon_universal_slave_0_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (channel_0_avalon_universal_slave_0_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (channel_0_avalon_universal_slave_0_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (channel_0_avalon_universal_slave_0_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (channel_0_avalon_universal_slave_0_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (channel_0_avalon_universal_slave_0_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (channel_0_avalon_universal_slave_0_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (channel_0_avalon_universal_slave_0_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (channel_0_avalon_universal_slave_0_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (channel_0_avalon_universal_slave_0_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (channel_0_avalon_universal_slave_0_address),                //  output,  width = 16,      avalon_anti_slave_0.address
		.av_write               (channel_0_avalon_universal_slave_0_write),                  //  output,   width = 1,                         .write
		.av_read                (channel_0_avalon_universal_slave_0_read),                   //  output,   width = 1,                         .read
		.av_readdata            (channel_0_avalon_universal_slave_0_readdata),               //   input,  width = 32,                         .readdata
		.av_writedata           (channel_0_avalon_universal_slave_0_writedata),              //  output,  width = 32,                         .writedata
		.av_burstcount          (channel_0_avalon_universal_slave_0_burstcount),             //  output,   width = 3,                         .burstcount
		.av_byteenable          (channel_0_avalon_universal_slave_0_byteenable),             //  output,   width = 4,                         .byteenable
		.av_readdatavalid       (channel_0_avalon_universal_slave_0_readdatavalid),          //   input,   width = 1,                         .readdatavalid
		.av_waitrequest         (channel_0_avalon_universal_slave_0_waitrequest),            //   input,   width = 1,                         .waitrequest
		.av_lock                (channel_0_avalon_universal_slave_0_lock),                   //  output,   width = 1,                         .lock
		.av_debugaccess         (channel_0_avalon_universal_slave_0_debugaccess),            //  output,   width = 1,                         .debugaccess
		.av_begintransfer       (),                                                          // (terminated),                                       
		.av_beginbursttransfer  (),                                                          // (terminated),                                       
		.av_writebyteenable     (),                                                          // (terminated),                                       
		.av_chipselect          (),                                                          // (terminated),                                       
		.av_clken               (),                                                          // (terminated),                                       
		.uav_clken              (1'b0),                                                      // (terminated),                                       
		.av_outputenable        (),                                                          // (terminated),                                       
		.uav_response           (),                                                          // (terminated),                                       
		.av_response            (2'b00),                                                     // (terminated),                                       
		.uav_writeresponsevalid (),                                                          // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                       // (terminated),                                       
	);

	address_decoder_multi_channel_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (16),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (3),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (1),
		.AV_BURSTCOUNT_SYMBOLS          (1),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (0),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) channel_2_avalon_universal_slave_0_translator (
		.clk                    (csr_clk_clk_clk),                                           //   input,   width = 1,                      clk.clk
		.reset                  (master_reset_reset_bridge_in_reset_reset),                  //   input,   width = 1,                    reset.reset
		.uav_address            (channel_2_avalon_universal_slave_0_agent_m0_address),       //   input,  width = 32, avalon_universal_slave_0.address
		.uav_burstcount         (channel_2_avalon_universal_slave_0_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (channel_2_avalon_universal_slave_0_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (channel_2_avalon_universal_slave_0_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (channel_2_avalon_universal_slave_0_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (channel_2_avalon_universal_slave_0_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (channel_2_avalon_universal_slave_0_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (channel_2_avalon_universal_slave_0_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (channel_2_avalon_universal_slave_0_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (channel_2_avalon_universal_slave_0_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (channel_2_avalon_universal_slave_0_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (channel_2_avalon_universal_slave_0_address),                //  output,  width = 16,      avalon_anti_slave_0.address
		.av_write               (channel_2_avalon_universal_slave_0_write),                  //  output,   width = 1,                         .write
		.av_read                (channel_2_avalon_universal_slave_0_read),                   //  output,   width = 1,                         .read
		.av_readdata            (channel_2_avalon_universal_slave_0_readdata),               //   input,  width = 32,                         .readdata
		.av_writedata           (channel_2_avalon_universal_slave_0_writedata),              //  output,  width = 32,                         .writedata
		.av_burstcount          (channel_2_avalon_universal_slave_0_burstcount),             //  output,   width = 3,                         .burstcount
		.av_byteenable          (channel_2_avalon_universal_slave_0_byteenable),             //  output,   width = 4,                         .byteenable
		.av_readdatavalid       (channel_2_avalon_universal_slave_0_readdatavalid),          //   input,   width = 1,                         .readdatavalid
		.av_waitrequest         (channel_2_avalon_universal_slave_0_waitrequest),            //   input,   width = 1,                         .waitrequest
		.av_lock                (channel_2_avalon_universal_slave_0_lock),                   //  output,   width = 1,                         .lock
		.av_debugaccess         (channel_2_avalon_universal_slave_0_debugaccess),            //  output,   width = 1,                         .debugaccess
		.av_begintransfer       (),                                                          // (terminated),                                       
		.av_beginbursttransfer  (),                                                          // (terminated),                                       
		.av_writebyteenable     (),                                                          // (terminated),                                       
		.av_chipselect          (),                                                          // (terminated),                                       
		.av_clken               (),                                                          // (terminated),                                       
		.uav_clken              (1'b0),                                                      // (terminated),                                       
		.av_outputenable        (),                                                          // (terminated),                                       
		.uav_response           (),                                                          // (terminated),                                       
		.av_response            (2'b00),                                                     // (terminated),                                       
		.uav_writeresponsevalid (),                                                          // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                       // (terminated),                                       
	);

	address_decoder_multi_channel_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (16),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (3),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (1),
		.AV_BURSTCOUNT_SYMBOLS          (1),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (0),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) channel_3_avalon_universal_slave_0_translator (
		.clk                    (csr_clk_clk_clk),                                           //   input,   width = 1,                      clk.clk
		.reset                  (master_reset_reset_bridge_in_reset_reset),                  //   input,   width = 1,                    reset.reset
		.uav_address            (channel_3_avalon_universal_slave_0_agent_m0_address),       //   input,  width = 32, avalon_universal_slave_0.address
		.uav_burstcount         (channel_3_avalon_universal_slave_0_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (channel_3_avalon_universal_slave_0_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (channel_3_avalon_universal_slave_0_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (channel_3_avalon_universal_slave_0_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (channel_3_avalon_universal_slave_0_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (channel_3_avalon_universal_slave_0_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (channel_3_avalon_universal_slave_0_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (channel_3_avalon_universal_slave_0_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (channel_3_avalon_universal_slave_0_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (channel_3_avalon_universal_slave_0_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (channel_3_avalon_universal_slave_0_address),                //  output,  width = 16,      avalon_anti_slave_0.address
		.av_write               (channel_3_avalon_universal_slave_0_write),                  //  output,   width = 1,                         .write
		.av_read                (channel_3_avalon_universal_slave_0_read),                   //  output,   width = 1,                         .read
		.av_readdata            (channel_3_avalon_universal_slave_0_readdata),               //   input,  width = 32,                         .readdata
		.av_writedata           (channel_3_avalon_universal_slave_0_writedata),              //  output,  width = 32,                         .writedata
		.av_burstcount          (channel_3_avalon_universal_slave_0_burstcount),             //  output,   width = 3,                         .burstcount
		.av_byteenable          (channel_3_avalon_universal_slave_0_byteenable),             //  output,   width = 4,                         .byteenable
		.av_readdatavalid       (channel_3_avalon_universal_slave_0_readdatavalid),          //   input,   width = 1,                         .readdatavalid
		.av_waitrequest         (channel_3_avalon_universal_slave_0_waitrequest),            //   input,   width = 1,                         .waitrequest
		.av_lock                (channel_3_avalon_universal_slave_0_lock),                   //  output,   width = 1,                         .lock
		.av_debugaccess         (channel_3_avalon_universal_slave_0_debugaccess),            //  output,   width = 1,                         .debugaccess
		.av_begintransfer       (),                                                          // (terminated),                                       
		.av_beginbursttransfer  (),                                                          // (terminated),                                       
		.av_writebyteenable     (),                                                          // (terminated),                                       
		.av_chipselect          (),                                                          // (terminated),                                       
		.av_clken               (),                                                          // (terminated),                                       
		.uav_clken              (1'b0),                                                      // (terminated),                                       
		.av_outputenable        (),                                                          // (terminated),                                       
		.uav_response           (),                                                          // (terminated),                                       
		.av_response            (2'b00),                                                     // (terminated),                                       
		.uav_writeresponsevalid (),                                                          // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                       // (terminated),                                       
	);

	address_decoder_multi_channel_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (16),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (3),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (1),
		.AV_BURSTCOUNT_SYMBOLS          (1),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (0),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) channel_4_avalon_universal_slave_0_translator (
		.clk                    (csr_clk_clk_clk),                                           //   input,   width = 1,                      clk.clk
		.reset                  (master_reset_reset_bridge_in_reset_reset),                  //   input,   width = 1,                    reset.reset
		.uav_address            (channel_4_avalon_universal_slave_0_agent_m0_address),       //   input,  width = 32, avalon_universal_slave_0.address
		.uav_burstcount         (channel_4_avalon_universal_slave_0_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (channel_4_avalon_universal_slave_0_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (channel_4_avalon_universal_slave_0_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (channel_4_avalon_universal_slave_0_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (channel_4_avalon_universal_slave_0_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (channel_4_avalon_universal_slave_0_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (channel_4_avalon_universal_slave_0_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (channel_4_avalon_universal_slave_0_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (channel_4_avalon_universal_slave_0_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (channel_4_avalon_universal_slave_0_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (channel_4_avalon_universal_slave_0_address),                //  output,  width = 16,      avalon_anti_slave_0.address
		.av_write               (channel_4_avalon_universal_slave_0_write),                  //  output,   width = 1,                         .write
		.av_read                (channel_4_avalon_universal_slave_0_read),                   //  output,   width = 1,                         .read
		.av_readdata            (channel_4_avalon_universal_slave_0_readdata),               //   input,  width = 32,                         .readdata
		.av_writedata           (channel_4_avalon_universal_slave_0_writedata),              //  output,  width = 32,                         .writedata
		.av_burstcount          (channel_4_avalon_universal_slave_0_burstcount),             //  output,   width = 3,                         .burstcount
		.av_byteenable          (channel_4_avalon_universal_slave_0_byteenable),             //  output,   width = 4,                         .byteenable
		.av_readdatavalid       (channel_4_avalon_universal_slave_0_readdatavalid),          //   input,   width = 1,                         .readdatavalid
		.av_waitrequest         (channel_4_avalon_universal_slave_0_waitrequest),            //   input,   width = 1,                         .waitrequest
		.av_lock                (channel_4_avalon_universal_slave_0_lock),                   //  output,   width = 1,                         .lock
		.av_debugaccess         (channel_4_avalon_universal_slave_0_debugaccess),            //  output,   width = 1,                         .debugaccess
		.av_begintransfer       (),                                                          // (terminated),                                       
		.av_beginbursttransfer  (),                                                          // (terminated),                                       
		.av_writebyteenable     (),                                                          // (terminated),                                       
		.av_chipselect          (),                                                          // (terminated),                                       
		.av_clken               (),                                                          // (terminated),                                       
		.uav_clken              (1'b0),                                                      // (terminated),                                       
		.av_outputenable        (),                                                          // (terminated),                                       
		.uav_response           (),                                                          // (terminated),                                       
		.av_response            (2'b00),                                                     // (terminated),                                       
		.uav_writeresponsevalid (),                                                          // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                       // (terminated),                                       
	);

	address_decoder_multi_channel_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (16),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (3),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (1),
		.AV_BURSTCOUNT_SYMBOLS          (1),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (0),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) channel_5_avalon_universal_slave_0_translator (
		.clk                    (csr_clk_clk_clk),                                           //   input,   width = 1,                      clk.clk
		.reset                  (master_reset_reset_bridge_in_reset_reset),                  //   input,   width = 1,                    reset.reset
		.uav_address            (channel_5_avalon_universal_slave_0_agent_m0_address),       //   input,  width = 32, avalon_universal_slave_0.address
		.uav_burstcount         (channel_5_avalon_universal_slave_0_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (channel_5_avalon_universal_slave_0_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (channel_5_avalon_universal_slave_0_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (channel_5_avalon_universal_slave_0_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (channel_5_avalon_universal_slave_0_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (channel_5_avalon_universal_slave_0_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (channel_5_avalon_universal_slave_0_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (channel_5_avalon_universal_slave_0_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (channel_5_avalon_universal_slave_0_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (channel_5_avalon_universal_slave_0_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (channel_5_avalon_universal_slave_0_address),                //  output,  width = 16,      avalon_anti_slave_0.address
		.av_write               (channel_5_avalon_universal_slave_0_write),                  //  output,   width = 1,                         .write
		.av_read                (channel_5_avalon_universal_slave_0_read),                   //  output,   width = 1,                         .read
		.av_readdata            (channel_5_avalon_universal_slave_0_readdata),               //   input,  width = 32,                         .readdata
		.av_writedata           (channel_5_avalon_universal_slave_0_writedata),              //  output,  width = 32,                         .writedata
		.av_burstcount          (channel_5_avalon_universal_slave_0_burstcount),             //  output,   width = 3,                         .burstcount
		.av_byteenable          (channel_5_avalon_universal_slave_0_byteenable),             //  output,   width = 4,                         .byteenable
		.av_readdatavalid       (channel_5_avalon_universal_slave_0_readdatavalid),          //   input,   width = 1,                         .readdatavalid
		.av_waitrequest         (channel_5_avalon_universal_slave_0_waitrequest),            //   input,   width = 1,                         .waitrequest
		.av_lock                (channel_5_avalon_universal_slave_0_lock),                   //  output,   width = 1,                         .lock
		.av_debugaccess         (channel_5_avalon_universal_slave_0_debugaccess),            //  output,   width = 1,                         .debugaccess
		.av_begintransfer       (),                                                          // (terminated),                                       
		.av_beginbursttransfer  (),                                                          // (terminated),                                       
		.av_writebyteenable     (),                                                          // (terminated),                                       
		.av_chipselect          (),                                                          // (terminated),                                       
		.av_clken               (),                                                          // (terminated),                                       
		.uav_clken              (1'b0),                                                      // (terminated),                                       
		.av_outputenable        (),                                                          // (terminated),                                       
		.uav_response           (),                                                          // (terminated),                                       
		.av_response            (2'b00),                                                     // (terminated),                                       
		.uav_writeresponsevalid (),                                                          // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                       // (terminated),                                       
	);

	address_decoder_multi_channel_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (16),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (3),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (1),
		.AV_BURSTCOUNT_SYMBOLS          (1),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (0),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) channel_6_avalon_universal_slave_0_translator (
		.clk                    (csr_clk_clk_clk),                                           //   input,   width = 1,                      clk.clk
		.reset                  (master_reset_reset_bridge_in_reset_reset),                  //   input,   width = 1,                    reset.reset
		.uav_address            (channel_6_avalon_universal_slave_0_agent_m0_address),       //   input,  width = 32, avalon_universal_slave_0.address
		.uav_burstcount         (channel_6_avalon_universal_slave_0_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (channel_6_avalon_universal_slave_0_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (channel_6_avalon_universal_slave_0_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (channel_6_avalon_universal_slave_0_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (channel_6_avalon_universal_slave_0_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (channel_6_avalon_universal_slave_0_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (channel_6_avalon_universal_slave_0_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (channel_6_avalon_universal_slave_0_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (channel_6_avalon_universal_slave_0_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (channel_6_avalon_universal_slave_0_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (channel_6_avalon_universal_slave_0_address),                //  output,  width = 16,      avalon_anti_slave_0.address
		.av_write               (channel_6_avalon_universal_slave_0_write),                  //  output,   width = 1,                         .write
		.av_read                (channel_6_avalon_universal_slave_0_read),                   //  output,   width = 1,                         .read
		.av_readdata            (channel_6_avalon_universal_slave_0_readdata),               //   input,  width = 32,                         .readdata
		.av_writedata           (channel_6_avalon_universal_slave_0_writedata),              //  output,  width = 32,                         .writedata
		.av_burstcount          (channel_6_avalon_universal_slave_0_burstcount),             //  output,   width = 3,                         .burstcount
		.av_byteenable          (channel_6_avalon_universal_slave_0_byteenable),             //  output,   width = 4,                         .byteenable
		.av_readdatavalid       (channel_6_avalon_universal_slave_0_readdatavalid),          //   input,   width = 1,                         .readdatavalid
		.av_waitrequest         (channel_6_avalon_universal_slave_0_waitrequest),            //   input,   width = 1,                         .waitrequest
		.av_lock                (channel_6_avalon_universal_slave_0_lock),                   //  output,   width = 1,                         .lock
		.av_debugaccess         (channel_6_avalon_universal_slave_0_debugaccess),            //  output,   width = 1,                         .debugaccess
		.av_begintransfer       (),                                                          // (terminated),                                       
		.av_beginbursttransfer  (),                                                          // (terminated),                                       
		.av_writebyteenable     (),                                                          // (terminated),                                       
		.av_chipselect          (),                                                          // (terminated),                                       
		.av_clken               (),                                                          // (terminated),                                       
		.uav_clken              (1'b0),                                                      // (terminated),                                       
		.av_outputenable        (),                                                          // (terminated),                                       
		.uav_response           (),                                                          // (terminated),                                       
		.av_response            (2'b00),                                                     // (terminated),                                       
		.uav_writeresponsevalid (),                                                          // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                       // (terminated),                                       
	);

	address_decoder_multi_channel_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (16),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (3),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (1),
		.AV_BURSTCOUNT_SYMBOLS          (1),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (0),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) channel_7_avalon_universal_slave_0_translator (
		.clk                    (csr_clk_clk_clk),                                           //   input,   width = 1,                      clk.clk
		.reset                  (master_reset_reset_bridge_in_reset_reset),                  //   input,   width = 1,                    reset.reset
		.uav_address            (channel_7_avalon_universal_slave_0_agent_m0_address),       //   input,  width = 32, avalon_universal_slave_0.address
		.uav_burstcount         (channel_7_avalon_universal_slave_0_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (channel_7_avalon_universal_slave_0_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (channel_7_avalon_universal_slave_0_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (channel_7_avalon_universal_slave_0_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (channel_7_avalon_universal_slave_0_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (channel_7_avalon_universal_slave_0_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (channel_7_avalon_universal_slave_0_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (channel_7_avalon_universal_slave_0_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (channel_7_avalon_universal_slave_0_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (channel_7_avalon_universal_slave_0_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (channel_7_avalon_universal_slave_0_address),                //  output,  width = 16,      avalon_anti_slave_0.address
		.av_write               (channel_7_avalon_universal_slave_0_write),                  //  output,   width = 1,                         .write
		.av_read                (channel_7_avalon_universal_slave_0_read),                   //  output,   width = 1,                         .read
		.av_readdata            (channel_7_avalon_universal_slave_0_readdata),               //   input,  width = 32,                         .readdata
		.av_writedata           (channel_7_avalon_universal_slave_0_writedata),              //  output,  width = 32,                         .writedata
		.av_burstcount          (channel_7_avalon_universal_slave_0_burstcount),             //  output,   width = 3,                         .burstcount
		.av_byteenable          (channel_7_avalon_universal_slave_0_byteenable),             //  output,   width = 4,                         .byteenable
		.av_readdatavalid       (channel_7_avalon_universal_slave_0_readdatavalid),          //   input,   width = 1,                         .readdatavalid
		.av_waitrequest         (channel_7_avalon_universal_slave_0_waitrequest),            //   input,   width = 1,                         .waitrequest
		.av_lock                (channel_7_avalon_universal_slave_0_lock),                   //  output,   width = 1,                         .lock
		.av_debugaccess         (channel_7_avalon_universal_slave_0_debugaccess),            //  output,   width = 1,                         .debugaccess
		.av_begintransfer       (),                                                          // (terminated),                                       
		.av_beginbursttransfer  (),                                                          // (terminated),                                       
		.av_writebyteenable     (),                                                          // (terminated),                                       
		.av_chipselect          (),                                                          // (terminated),                                       
		.av_clken               (),                                                          // (terminated),                                       
		.uav_clken              (1'b0),                                                      // (terminated),                                       
		.av_outputenable        (),                                                          // (terminated),                                       
		.uav_response           (),                                                          // (terminated),                                       
		.av_response            (2'b00),                                                     // (terminated),                                       
		.uav_writeresponsevalid (),                                                          // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                       // (terminated),                                       
	);

	address_decoder_multi_channel_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (16),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (3),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (1),
		.AV_BURSTCOUNT_SYMBOLS          (1),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (0),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) channel_8_avalon_universal_slave_0_translator (
		.clk                    (csr_clk_clk_clk),                                           //   input,   width = 1,                      clk.clk
		.reset                  (master_reset_reset_bridge_in_reset_reset),                  //   input,   width = 1,                    reset.reset
		.uav_address            (channel_8_avalon_universal_slave_0_agent_m0_address),       //   input,  width = 32, avalon_universal_slave_0.address
		.uav_burstcount         (channel_8_avalon_universal_slave_0_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (channel_8_avalon_universal_slave_0_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (channel_8_avalon_universal_slave_0_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (channel_8_avalon_universal_slave_0_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (channel_8_avalon_universal_slave_0_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (channel_8_avalon_universal_slave_0_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (channel_8_avalon_universal_slave_0_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (channel_8_avalon_universal_slave_0_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (channel_8_avalon_universal_slave_0_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (channel_8_avalon_universal_slave_0_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (channel_8_avalon_universal_slave_0_address),                //  output,  width = 16,      avalon_anti_slave_0.address
		.av_write               (channel_8_avalon_universal_slave_0_write),                  //  output,   width = 1,                         .write
		.av_read                (channel_8_avalon_universal_slave_0_read),                   //  output,   width = 1,                         .read
		.av_readdata            (channel_8_avalon_universal_slave_0_readdata),               //   input,  width = 32,                         .readdata
		.av_writedata           (channel_8_avalon_universal_slave_0_writedata),              //  output,  width = 32,                         .writedata
		.av_burstcount          (channel_8_avalon_universal_slave_0_burstcount),             //  output,   width = 3,                         .burstcount
		.av_byteenable          (channel_8_avalon_universal_slave_0_byteenable),             //  output,   width = 4,                         .byteenable
		.av_readdatavalid       (channel_8_avalon_universal_slave_0_readdatavalid),          //   input,   width = 1,                         .readdatavalid
		.av_waitrequest         (channel_8_avalon_universal_slave_0_waitrequest),            //   input,   width = 1,                         .waitrequest
		.av_lock                (channel_8_avalon_universal_slave_0_lock),                   //  output,   width = 1,                         .lock
		.av_debugaccess         (channel_8_avalon_universal_slave_0_debugaccess),            //  output,   width = 1,                         .debugaccess
		.av_begintransfer       (),                                                          // (terminated),                                       
		.av_beginbursttransfer  (),                                                          // (terminated),                                       
		.av_writebyteenable     (),                                                          // (terminated),                                       
		.av_chipselect          (),                                                          // (terminated),                                       
		.av_clken               (),                                                          // (terminated),                                       
		.uav_clken              (1'b0),                                                      // (terminated),                                       
		.av_outputenable        (),                                                          // (terminated),                                       
		.uav_response           (),                                                          // (terminated),                                       
		.av_response            (2'b00),                                                     // (terminated),                                       
		.uav_writeresponsevalid (),                                                          // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                       // (terminated),                                       
	);

	address_decoder_multi_channel_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (16),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (3),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (1),
		.AV_BURSTCOUNT_SYMBOLS          (1),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (0),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) channel_9_avalon_universal_slave_0_translator (
		.clk                    (csr_clk_clk_clk),                                           //   input,   width = 1,                      clk.clk
		.reset                  (master_reset_reset_bridge_in_reset_reset),                  //   input,   width = 1,                    reset.reset
		.uav_address            (channel_9_avalon_universal_slave_0_agent_m0_address),       //   input,  width = 32, avalon_universal_slave_0.address
		.uav_burstcount         (channel_9_avalon_universal_slave_0_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (channel_9_avalon_universal_slave_0_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (channel_9_avalon_universal_slave_0_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (channel_9_avalon_universal_slave_0_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (channel_9_avalon_universal_slave_0_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (channel_9_avalon_universal_slave_0_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (channel_9_avalon_universal_slave_0_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (channel_9_avalon_universal_slave_0_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (channel_9_avalon_universal_slave_0_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (channel_9_avalon_universal_slave_0_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (channel_9_avalon_universal_slave_0_address),                //  output,  width = 16,      avalon_anti_slave_0.address
		.av_write               (channel_9_avalon_universal_slave_0_write),                  //  output,   width = 1,                         .write
		.av_read                (channel_9_avalon_universal_slave_0_read),                   //  output,   width = 1,                         .read
		.av_readdata            (channel_9_avalon_universal_slave_0_readdata),               //   input,  width = 32,                         .readdata
		.av_writedata           (channel_9_avalon_universal_slave_0_writedata),              //  output,  width = 32,                         .writedata
		.av_burstcount          (channel_9_avalon_universal_slave_0_burstcount),             //  output,   width = 3,                         .burstcount
		.av_byteenable          (channel_9_avalon_universal_slave_0_byteenable),             //  output,   width = 4,                         .byteenable
		.av_readdatavalid       (channel_9_avalon_universal_slave_0_readdatavalid),          //   input,   width = 1,                         .readdatavalid
		.av_waitrequest         (channel_9_avalon_universal_slave_0_waitrequest),            //   input,   width = 1,                         .waitrequest
		.av_lock                (channel_9_avalon_universal_slave_0_lock),                   //  output,   width = 1,                         .lock
		.av_debugaccess         (channel_9_avalon_universal_slave_0_debugaccess),            //  output,   width = 1,                         .debugaccess
		.av_begintransfer       (),                                                          // (terminated),                                       
		.av_beginbursttransfer  (),                                                          // (terminated),                                       
		.av_writebyteenable     (),                                                          // (terminated),                                       
		.av_chipselect          (),                                                          // (terminated),                                       
		.av_clken               (),                                                          // (terminated),                                       
		.uav_clken              (1'b0),                                                      // (terminated),                                       
		.av_outputenable        (),                                                          // (terminated),                                       
		.uav_response           (),                                                          // (terminated),                                       
		.av_response            (2'b00),                                                     // (terminated),                                       
		.uav_writeresponsevalid (),                                                          // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                       // (terminated),                                       
	);

	address_decoder_multi_channel_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (16),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (3),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (1),
		.AV_BURSTCOUNT_SYMBOLS          (1),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (0),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) channel_10_avalon_universal_slave_0_translator (
		.clk                    (csr_clk_clk_clk),                                            //   input,   width = 1,                      clk.clk
		.reset                  (master_reset_reset_bridge_in_reset_reset),                   //   input,   width = 1,                    reset.reset
		.uav_address            (channel_10_avalon_universal_slave_0_agent_m0_address),       //   input,  width = 32, avalon_universal_slave_0.address
		.uav_burstcount         (channel_10_avalon_universal_slave_0_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (channel_10_avalon_universal_slave_0_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (channel_10_avalon_universal_slave_0_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (channel_10_avalon_universal_slave_0_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (channel_10_avalon_universal_slave_0_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (channel_10_avalon_universal_slave_0_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (channel_10_avalon_universal_slave_0_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (channel_10_avalon_universal_slave_0_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (channel_10_avalon_universal_slave_0_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (channel_10_avalon_universal_slave_0_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (channel_10_avalon_universal_slave_0_address),                //  output,  width = 16,      avalon_anti_slave_0.address
		.av_write               (channel_10_avalon_universal_slave_0_write),                  //  output,   width = 1,                         .write
		.av_read                (channel_10_avalon_universal_slave_0_read),                   //  output,   width = 1,                         .read
		.av_readdata            (channel_10_avalon_universal_slave_0_readdata),               //   input,  width = 32,                         .readdata
		.av_writedata           (channel_10_avalon_universal_slave_0_writedata),              //  output,  width = 32,                         .writedata
		.av_burstcount          (channel_10_avalon_universal_slave_0_burstcount),             //  output,   width = 3,                         .burstcount
		.av_byteenable          (channel_10_avalon_universal_slave_0_byteenable),             //  output,   width = 4,                         .byteenable
		.av_readdatavalid       (channel_10_avalon_universal_slave_0_readdatavalid),          //   input,   width = 1,                         .readdatavalid
		.av_waitrequest         (channel_10_avalon_universal_slave_0_waitrequest),            //   input,   width = 1,                         .waitrequest
		.av_lock                (channel_10_avalon_universal_slave_0_lock),                   //  output,   width = 1,                         .lock
		.av_debugaccess         (channel_10_avalon_universal_slave_0_debugaccess),            //  output,   width = 1,                         .debugaccess
		.av_begintransfer       (),                                                           // (terminated),                                       
		.av_beginbursttransfer  (),                                                           // (terminated),                                       
		.av_writebyteenable     (),                                                           // (terminated),                                       
		.av_chipselect          (),                                                           // (terminated),                                       
		.av_clken               (),                                                           // (terminated),                                       
		.uav_clken              (1'b0),                                                       // (terminated),                                       
		.av_outputenable        (),                                                           // (terminated),                                       
		.uav_response           (),                                                           // (terminated),                                       
		.av_response            (2'b00),                                                      // (terminated),                                       
		.uav_writeresponsevalid (),                                                           // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                        // (terminated),                                       
	);

	address_decoder_multi_channel_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (16),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (3),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (32),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (1),
		.AV_BURSTCOUNT_SYMBOLS          (1),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (0),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) channel_11_avalon_universal_slave_0_translator (
		.clk                    (csr_clk_clk_clk),                                            //   input,   width = 1,                      clk.clk
		.reset                  (master_reset_reset_bridge_in_reset_reset),                   //   input,   width = 1,                    reset.reset
		.uav_address            (channel_11_avalon_universal_slave_0_agent_m0_address),       //   input,  width = 32, avalon_universal_slave_0.address
		.uav_burstcount         (channel_11_avalon_universal_slave_0_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (channel_11_avalon_universal_slave_0_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (channel_11_avalon_universal_slave_0_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (channel_11_avalon_universal_slave_0_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (channel_11_avalon_universal_slave_0_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (channel_11_avalon_universal_slave_0_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (channel_11_avalon_universal_slave_0_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (channel_11_avalon_universal_slave_0_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (channel_11_avalon_universal_slave_0_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (channel_11_avalon_universal_slave_0_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (channel_11_avalon_universal_slave_0_address),                //  output,  width = 16,      avalon_anti_slave_0.address
		.av_write               (channel_11_avalon_universal_slave_0_write),                  //  output,   width = 1,                         .write
		.av_read                (channel_11_avalon_universal_slave_0_read),                   //  output,   width = 1,                         .read
		.av_readdata            (channel_11_avalon_universal_slave_0_readdata),               //   input,  width = 32,                         .readdata
		.av_writedata           (channel_11_avalon_universal_slave_0_writedata),              //  output,  width = 32,                         .writedata
		.av_burstcount          (channel_11_avalon_universal_slave_0_burstcount),             //  output,   width = 3,                         .burstcount
		.av_byteenable          (channel_11_avalon_universal_slave_0_byteenable),             //  output,   width = 4,                         .byteenable
		.av_readdatavalid       (channel_11_avalon_universal_slave_0_readdatavalid),          //   input,   width = 1,                         .readdatavalid
		.av_waitrequest         (channel_11_avalon_universal_slave_0_waitrequest),            //   input,   width = 1,                         .waitrequest
		.av_lock                (channel_11_avalon_universal_slave_0_lock),                   //  output,   width = 1,                         .lock
		.av_debugaccess         (channel_11_avalon_universal_slave_0_debugaccess),            //  output,   width = 1,                         .debugaccess
		.av_begintransfer       (),                                                           // (terminated),                                       
		.av_beginbursttransfer  (),                                                           // (terminated),                                       
		.av_writebyteenable     (),                                                           // (terminated),                                       
		.av_chipselect          (),                                                           // (terminated),                                       
		.av_clken               (),                                                           // (terminated),                                       
		.uav_clken              (1'b0),                                                       // (terminated),                                       
		.av_outputenable        (),                                                           // (terminated),                                       
		.uav_response           (),                                                           // (terminated),                                       
		.av_response            (2'b00),                                                      // (terminated),                                       
		.uav_writeresponsevalid (),                                                           // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                        // (terminated),                                       
	);

	address_decoder_multi_channel_altera_merlin_master_agent_191_mpbm6tq #(
		.PKT_WUNIQUE               (116),
		.PKT_DOMAIN_H              (115),
		.PKT_DOMAIN_L              (114),
		.PKT_SNOOP_H               (113),
		.PKT_SNOOP_L               (110),
		.PKT_BARRIER_H             (109),
		.PKT_BARRIER_L             (108),
		.PKT_ORI_BURST_SIZE_H      (107),
		.PKT_ORI_BURST_SIZE_L      (105),
		.PKT_RESPONSE_STATUS_H     (104),
		.PKT_RESPONSE_STATUS_L     (103),
		.PKT_QOS_H                 (86),
		.PKT_QOS_L                 (86),
		.PKT_DATA_SIDEBAND_H       (84),
		.PKT_DATA_SIDEBAND_L       (84),
		.PKT_ADDR_SIDEBAND_H       (83),
		.PKT_ADDR_SIDEBAND_L       (83),
		.PKT_BURST_TYPE_H          (82),
		.PKT_BURST_TYPE_L          (81),
		.PKT_CACHE_H               (102),
		.PKT_CACHE_L               (99),
		.PKT_THREAD_ID_H           (95),
		.PKT_THREAD_ID_L           (95),
		.PKT_BURST_SIZE_H          (80),
		.PKT_BURST_SIZE_L          (78),
		.PKT_TRANS_EXCLUSIVE       (73),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (85),
		.PKT_PROTECTION_H          (98),
		.PKT_PROTECTION_L          (96),
		.PKT_BURSTWRAP_H           (77),
		.PKT_BURSTWRAP_L           (77),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (90),
		.PKT_SRC_ID_L              (87),
		.PKT_DEST_ID_H             (94),
		.PKT_DEST_ID_L             (91),
		.ST_DATA_W                 (117),
		.ST_CHANNEL_W              (12),
		.AV_BURSTCOUNT_W           (3),
		.SUPPRESS_0_BYTEEN_RSP     (0),
		.ID                        (0),
		.BURSTWRAP_VALUE           (1),
		.CACHE_VALUE               (0),
		.SECURE_ACCESS_BIT         (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.DOMAIN_VALUE              (3),
		.BARRIER_VALUE             (0),
		.SNOOP_VALUE               (0),
		.WUNIQUE_VALUE             (0),
		.SYNC_RESET                (0)
	) master_avalon_universal_master_0_agent (
		.clk                   (csr_clk_clk_clk),                                                                     //   input,    width = 1,       clk.clk
		.reset                 (master_reset_reset_bridge_in_reset_reset),                                            //   input,    width = 1, clk_reset.reset
		.av_address            (master_avalon_universal_master_0_translator_avalon_universal_master_0_address),       //   input,   width = 32,        av.address
		.av_write              (master_avalon_universal_master_0_translator_avalon_universal_master_0_write),         //   input,    width = 1,          .write
		.av_read               (master_avalon_universal_master_0_translator_avalon_universal_master_0_read),          //   input,    width = 1,          .read
		.av_writedata          (master_avalon_universal_master_0_translator_avalon_universal_master_0_writedata),     //   input,   width = 32,          .writedata
		.av_readdata           (master_avalon_universal_master_0_translator_avalon_universal_master_0_readdata),      //  output,   width = 32,          .readdata
		.av_waitrequest        (master_avalon_universal_master_0_translator_avalon_universal_master_0_waitrequest),   //  output,    width = 1,          .waitrequest
		.av_readdatavalid      (master_avalon_universal_master_0_translator_avalon_universal_master_0_readdatavalid), //  output,    width = 1,          .readdatavalid
		.av_byteenable         (master_avalon_universal_master_0_translator_avalon_universal_master_0_byteenable),    //   input,    width = 4,          .byteenable
		.av_burstcount         (master_avalon_universal_master_0_translator_avalon_universal_master_0_burstcount),    //   input,    width = 3,          .burstcount
		.av_debugaccess        (master_avalon_universal_master_0_translator_avalon_universal_master_0_debugaccess),   //   input,    width = 1,          .debugaccess
		.av_lock               (master_avalon_universal_master_0_translator_avalon_universal_master_0_lock),          //   input,    width = 1,          .lock
		.cp_valid              (master_avalon_universal_master_0_agent_cp_valid),                                     //  output,    width = 1,        cp.valid
		.cp_data               (master_avalon_universal_master_0_agent_cp_data),                                      //  output,  width = 117,          .data
		.cp_startofpacket      (master_avalon_universal_master_0_agent_cp_startofpacket),                             //  output,    width = 1,          .startofpacket
		.cp_endofpacket        (master_avalon_universal_master_0_agent_cp_endofpacket),                               //  output,    width = 1,          .endofpacket
		.cp_ready              (master_avalon_universal_master_0_agent_cp_ready),                                     //   input,    width = 1,          .ready
		.rp_valid              (master_avalon_universal_master_0_limiter_rsp_src_valid),                              //   input,    width = 1,        rp.valid
		.rp_data               (master_avalon_universal_master_0_limiter_rsp_src_data),                               //   input,  width = 117,          .data
		.rp_channel            (master_avalon_universal_master_0_limiter_rsp_src_channel),                            //   input,   width = 12,          .channel
		.rp_startofpacket      (master_avalon_universal_master_0_limiter_rsp_src_startofpacket),                      //   input,    width = 1,          .startofpacket
		.rp_endofpacket        (master_avalon_universal_master_0_limiter_rsp_src_endofpacket),                        //   input,    width = 1,          .endofpacket
		.rp_ready              (master_avalon_universal_master_0_limiter_rsp_src_ready),                              //  output,    width = 1,          .ready
		.av_response           (),                                                                                    // (terminated),                         
		.av_writeresponsevalid ()                                                                                     // (terminated),                         
	);

	address_decoder_multi_channel_altera_merlin_slave_agent_191_ncfkfri #(
		.PKT_ORI_BURST_SIZE_H      (107),
		.PKT_ORI_BURST_SIZE_L      (105),
		.PKT_RESPONSE_STATUS_H     (104),
		.PKT_RESPONSE_STATUS_L     (103),
		.PKT_BURST_SIZE_H          (80),
		.PKT_BURST_SIZE_L          (78),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (85),
		.PKT_PROTECTION_H          (98),
		.PKT_PROTECTION_L          (96),
		.PKT_BURSTWRAP_H           (77),
		.PKT_BURSTWRAP_L           (77),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (90),
		.PKT_SRC_ID_L              (87),
		.PKT_DEST_ID_H             (94),
		.PKT_DEST_ID_L             (91),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (12),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0)
	) channel_1_avalon_universal_slave_0_agent (
		.clk                     (csr_clk_clk_clk),                                                     //   input,    width = 1,             clk.clk
		.reset                   (master_reset_reset_bridge_in_reset_reset),                            //   input,    width = 1,       clk_reset.reset
		.m0_address              (channel_1_avalon_universal_slave_0_agent_m0_address),                 //  output,   width = 32,              m0.address
		.m0_burstcount           (channel_1_avalon_universal_slave_0_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (channel_1_avalon_universal_slave_0_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (channel_1_avalon_universal_slave_0_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (channel_1_avalon_universal_slave_0_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (channel_1_avalon_universal_slave_0_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (channel_1_avalon_universal_slave_0_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (channel_1_avalon_universal_slave_0_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (channel_1_avalon_universal_slave_0_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (channel_1_avalon_universal_slave_0_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (channel_1_avalon_universal_slave_0_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (channel_1_avalon_universal_slave_0_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (channel_1_avalon_universal_slave_0_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (channel_1_avalon_universal_slave_0_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (channel_1_avalon_universal_slave_0_agent_rp_data),                    //  output,  width = 117,                .data
		.rp_startofpacket        (channel_1_avalon_universal_slave_0_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_src_ready),                                                   //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_src_valid),                                                   //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_src_data),                                                    //   input,  width = 117,                .data
		.cp_startofpacket        (cmd_mux_src_startofpacket),                                           //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_src_endofpacket),                                             //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_src_channel),                                                 //   input,   width = 12,                .channel
		.rf_sink_ready           (channel_1_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (channel_1_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (channel_1_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (channel_1_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (channel_1_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //   input,  width = 118,                .data
		.rf_source_ready         (channel_1_avalon_universal_slave_0_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (channel_1_avalon_universal_slave_0_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (channel_1_avalon_universal_slave_0_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (channel_1_avalon_universal_slave_0_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (channel_1_avalon_universal_slave_0_agent_rf_source_data),             //  output,  width = 118,                .data
		.rdata_fifo_sink_ready   (channel_1_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (channel_1_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (channel_1_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (channel_1_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (channel_1_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (channel_1_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                               // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                                // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                                 // (terminated),                               
	);

	address_decoder_multi_channel_altera_avalon_sc_fifo_191_e5eqkcq #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) channel_1_avalon_universal_slave_0_agent_rsp_fifo (
		.clk               (csr_clk_clk_clk),                                                     //   input,    width = 1,       clk.clk
		.reset             (master_reset_reset_bridge_in_reset_reset),                            //   input,    width = 1, clk_reset.reset
		.in_data           (channel_1_avalon_universal_slave_0_agent_rf_source_data),             //   input,  width = 118,        in.data
		.in_valid          (channel_1_avalon_universal_slave_0_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (channel_1_avalon_universal_slave_0_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (channel_1_avalon_universal_slave_0_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (channel_1_avalon_universal_slave_0_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (channel_1_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //  output,  width = 118,       out.data
		.out_valid         (channel_1_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (channel_1_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (channel_1_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (channel_1_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                               // (terminated),                         
		.csr_read          (1'b0),                                                                // (terminated),                         
		.csr_write         (1'b0),                                                                // (terminated),                         
		.csr_readdata      (),                                                                    // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                                // (terminated),                         
		.almost_full_data  (),                                                                    // (terminated),                         
		.almost_empty_data (),                                                                    // (terminated),                         
		.in_empty          (1'b0),                                                                // (terminated),                         
		.out_empty         (),                                                                    // (terminated),                         
		.in_error          (1'b0),                                                                // (terminated),                         
		.out_error         (),                                                                    // (terminated),                         
		.in_channel        (1'b0),                                                                // (terminated),                         
		.out_channel       ()                                                                     // (terminated),                         
	);

	address_decoder_multi_channel_altera_merlin_slave_agent_191_ncfkfri #(
		.PKT_ORI_BURST_SIZE_H      (107),
		.PKT_ORI_BURST_SIZE_L      (105),
		.PKT_RESPONSE_STATUS_H     (104),
		.PKT_RESPONSE_STATUS_L     (103),
		.PKT_BURST_SIZE_H          (80),
		.PKT_BURST_SIZE_L          (78),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (85),
		.PKT_PROTECTION_H          (98),
		.PKT_PROTECTION_L          (96),
		.PKT_BURSTWRAP_H           (77),
		.PKT_BURSTWRAP_L           (77),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (90),
		.PKT_SRC_ID_L              (87),
		.PKT_DEST_ID_H             (94),
		.PKT_DEST_ID_L             (91),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (12),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0)
	) channel_0_avalon_universal_slave_0_agent (
		.clk                     (csr_clk_clk_clk),                                                     //   input,    width = 1,             clk.clk
		.reset                   (master_reset_reset_bridge_in_reset_reset),                            //   input,    width = 1,       clk_reset.reset
		.m0_address              (channel_0_avalon_universal_slave_0_agent_m0_address),                 //  output,   width = 32,              m0.address
		.m0_burstcount           (channel_0_avalon_universal_slave_0_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (channel_0_avalon_universal_slave_0_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (channel_0_avalon_universal_slave_0_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (channel_0_avalon_universal_slave_0_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (channel_0_avalon_universal_slave_0_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (channel_0_avalon_universal_slave_0_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (channel_0_avalon_universal_slave_0_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (channel_0_avalon_universal_slave_0_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (channel_0_avalon_universal_slave_0_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (channel_0_avalon_universal_slave_0_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (channel_0_avalon_universal_slave_0_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (channel_0_avalon_universal_slave_0_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (channel_0_avalon_universal_slave_0_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (channel_0_avalon_universal_slave_0_agent_rp_data),                    //  output,  width = 117,                .data
		.rp_startofpacket        (channel_0_avalon_universal_slave_0_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_001_src_ready),                                               //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_001_src_valid),                                               //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_001_src_data),                                                //   input,  width = 117,                .data
		.cp_startofpacket        (cmd_mux_001_src_startofpacket),                                       //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_001_src_endofpacket),                                         //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_001_src_channel),                                             //   input,   width = 12,                .channel
		.rf_sink_ready           (channel_0_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (channel_0_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (channel_0_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (channel_0_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (channel_0_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //   input,  width = 118,                .data
		.rf_source_ready         (channel_0_avalon_universal_slave_0_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (channel_0_avalon_universal_slave_0_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (channel_0_avalon_universal_slave_0_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (channel_0_avalon_universal_slave_0_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (channel_0_avalon_universal_slave_0_agent_rf_source_data),             //  output,  width = 118,                .data
		.rdata_fifo_sink_ready   (channel_0_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (channel_0_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (channel_0_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (channel_0_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (channel_0_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (channel_0_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                               // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                                // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                                 // (terminated),                               
	);

	address_decoder_multi_channel_altera_avalon_sc_fifo_191_e5eqkcq #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) channel_0_avalon_universal_slave_0_agent_rsp_fifo (
		.clk               (csr_clk_clk_clk),                                                     //   input,    width = 1,       clk.clk
		.reset             (master_reset_reset_bridge_in_reset_reset),                            //   input,    width = 1, clk_reset.reset
		.in_data           (channel_0_avalon_universal_slave_0_agent_rf_source_data),             //   input,  width = 118,        in.data
		.in_valid          (channel_0_avalon_universal_slave_0_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (channel_0_avalon_universal_slave_0_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (channel_0_avalon_universal_slave_0_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (channel_0_avalon_universal_slave_0_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (channel_0_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //  output,  width = 118,       out.data
		.out_valid         (channel_0_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (channel_0_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (channel_0_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (channel_0_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                               // (terminated),                         
		.csr_read          (1'b0),                                                                // (terminated),                         
		.csr_write         (1'b0),                                                                // (terminated),                         
		.csr_readdata      (),                                                                    // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                                // (terminated),                         
		.almost_full_data  (),                                                                    // (terminated),                         
		.almost_empty_data (),                                                                    // (terminated),                         
		.in_empty          (1'b0),                                                                // (terminated),                         
		.out_empty         (),                                                                    // (terminated),                         
		.in_error          (1'b0),                                                                // (terminated),                         
		.out_error         (),                                                                    // (terminated),                         
		.in_channel        (1'b0),                                                                // (terminated),                         
		.out_channel       ()                                                                     // (terminated),                         
	);

	address_decoder_multi_channel_altera_merlin_slave_agent_191_ncfkfri #(
		.PKT_ORI_BURST_SIZE_H      (107),
		.PKT_ORI_BURST_SIZE_L      (105),
		.PKT_RESPONSE_STATUS_H     (104),
		.PKT_RESPONSE_STATUS_L     (103),
		.PKT_BURST_SIZE_H          (80),
		.PKT_BURST_SIZE_L          (78),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (85),
		.PKT_PROTECTION_H          (98),
		.PKT_PROTECTION_L          (96),
		.PKT_BURSTWRAP_H           (77),
		.PKT_BURSTWRAP_L           (77),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (90),
		.PKT_SRC_ID_L              (87),
		.PKT_DEST_ID_H             (94),
		.PKT_DEST_ID_L             (91),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (12),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0)
	) channel_2_avalon_universal_slave_0_agent (
		.clk                     (csr_clk_clk_clk),                                                     //   input,    width = 1,             clk.clk
		.reset                   (master_reset_reset_bridge_in_reset_reset),                            //   input,    width = 1,       clk_reset.reset
		.m0_address              (channel_2_avalon_universal_slave_0_agent_m0_address),                 //  output,   width = 32,              m0.address
		.m0_burstcount           (channel_2_avalon_universal_slave_0_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (channel_2_avalon_universal_slave_0_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (channel_2_avalon_universal_slave_0_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (channel_2_avalon_universal_slave_0_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (channel_2_avalon_universal_slave_0_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (channel_2_avalon_universal_slave_0_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (channel_2_avalon_universal_slave_0_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (channel_2_avalon_universal_slave_0_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (channel_2_avalon_universal_slave_0_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (channel_2_avalon_universal_slave_0_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (channel_2_avalon_universal_slave_0_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (channel_2_avalon_universal_slave_0_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (channel_2_avalon_universal_slave_0_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (channel_2_avalon_universal_slave_0_agent_rp_data),                    //  output,  width = 117,                .data
		.rp_startofpacket        (channel_2_avalon_universal_slave_0_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_002_src_ready),                                               //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_002_src_valid),                                               //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_002_src_data),                                                //   input,  width = 117,                .data
		.cp_startofpacket        (cmd_mux_002_src_startofpacket),                                       //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_002_src_endofpacket),                                         //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_002_src_channel),                                             //   input,   width = 12,                .channel
		.rf_sink_ready           (channel_2_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (channel_2_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (channel_2_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (channel_2_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (channel_2_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //   input,  width = 118,                .data
		.rf_source_ready         (channel_2_avalon_universal_slave_0_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (channel_2_avalon_universal_slave_0_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (channel_2_avalon_universal_slave_0_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (channel_2_avalon_universal_slave_0_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (channel_2_avalon_universal_slave_0_agent_rf_source_data),             //  output,  width = 118,                .data
		.rdata_fifo_sink_ready   (channel_2_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (channel_2_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (channel_2_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (channel_2_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (channel_2_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (channel_2_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                               // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                                // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                                 // (terminated),                               
	);

	address_decoder_multi_channel_altera_avalon_sc_fifo_191_e5eqkcq #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) channel_2_avalon_universal_slave_0_agent_rsp_fifo (
		.clk               (csr_clk_clk_clk),                                                     //   input,    width = 1,       clk.clk
		.reset             (master_reset_reset_bridge_in_reset_reset),                            //   input,    width = 1, clk_reset.reset
		.in_data           (channel_2_avalon_universal_slave_0_agent_rf_source_data),             //   input,  width = 118,        in.data
		.in_valid          (channel_2_avalon_universal_slave_0_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (channel_2_avalon_universal_slave_0_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (channel_2_avalon_universal_slave_0_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (channel_2_avalon_universal_slave_0_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (channel_2_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //  output,  width = 118,       out.data
		.out_valid         (channel_2_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (channel_2_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (channel_2_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (channel_2_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                               // (terminated),                         
		.csr_read          (1'b0),                                                                // (terminated),                         
		.csr_write         (1'b0),                                                                // (terminated),                         
		.csr_readdata      (),                                                                    // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                                // (terminated),                         
		.almost_full_data  (),                                                                    // (terminated),                         
		.almost_empty_data (),                                                                    // (terminated),                         
		.in_empty          (1'b0),                                                                // (terminated),                         
		.out_empty         (),                                                                    // (terminated),                         
		.in_error          (1'b0),                                                                // (terminated),                         
		.out_error         (),                                                                    // (terminated),                         
		.in_channel        (1'b0),                                                                // (terminated),                         
		.out_channel       ()                                                                     // (terminated),                         
	);

	address_decoder_multi_channel_altera_merlin_slave_agent_191_ncfkfri #(
		.PKT_ORI_BURST_SIZE_H      (107),
		.PKT_ORI_BURST_SIZE_L      (105),
		.PKT_RESPONSE_STATUS_H     (104),
		.PKT_RESPONSE_STATUS_L     (103),
		.PKT_BURST_SIZE_H          (80),
		.PKT_BURST_SIZE_L          (78),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (85),
		.PKT_PROTECTION_H          (98),
		.PKT_PROTECTION_L          (96),
		.PKT_BURSTWRAP_H           (77),
		.PKT_BURSTWRAP_L           (77),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (90),
		.PKT_SRC_ID_L              (87),
		.PKT_DEST_ID_H             (94),
		.PKT_DEST_ID_L             (91),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (12),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0)
	) channel_3_avalon_universal_slave_0_agent (
		.clk                     (csr_clk_clk_clk),                                                     //   input,    width = 1,             clk.clk
		.reset                   (master_reset_reset_bridge_in_reset_reset),                            //   input,    width = 1,       clk_reset.reset
		.m0_address              (channel_3_avalon_universal_slave_0_agent_m0_address),                 //  output,   width = 32,              m0.address
		.m0_burstcount           (channel_3_avalon_universal_slave_0_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (channel_3_avalon_universal_slave_0_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (channel_3_avalon_universal_slave_0_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (channel_3_avalon_universal_slave_0_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (channel_3_avalon_universal_slave_0_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (channel_3_avalon_universal_slave_0_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (channel_3_avalon_universal_slave_0_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (channel_3_avalon_universal_slave_0_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (channel_3_avalon_universal_slave_0_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (channel_3_avalon_universal_slave_0_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (channel_3_avalon_universal_slave_0_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (channel_3_avalon_universal_slave_0_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (channel_3_avalon_universal_slave_0_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (channel_3_avalon_universal_slave_0_agent_rp_data),                    //  output,  width = 117,                .data
		.rp_startofpacket        (channel_3_avalon_universal_slave_0_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_003_src_ready),                                               //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_003_src_valid),                                               //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_003_src_data),                                                //   input,  width = 117,                .data
		.cp_startofpacket        (cmd_mux_003_src_startofpacket),                                       //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_003_src_endofpacket),                                         //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_003_src_channel),                                             //   input,   width = 12,                .channel
		.rf_sink_ready           (channel_3_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (channel_3_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (channel_3_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (channel_3_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (channel_3_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //   input,  width = 118,                .data
		.rf_source_ready         (channel_3_avalon_universal_slave_0_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (channel_3_avalon_universal_slave_0_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (channel_3_avalon_universal_slave_0_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (channel_3_avalon_universal_slave_0_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (channel_3_avalon_universal_slave_0_agent_rf_source_data),             //  output,  width = 118,                .data
		.rdata_fifo_sink_ready   (channel_3_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (channel_3_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (channel_3_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (channel_3_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (channel_3_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (channel_3_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                               // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                                // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                                 // (terminated),                               
	);

	address_decoder_multi_channel_altera_avalon_sc_fifo_191_e5eqkcq #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) channel_3_avalon_universal_slave_0_agent_rsp_fifo (
		.clk               (csr_clk_clk_clk),                                                     //   input,    width = 1,       clk.clk
		.reset             (master_reset_reset_bridge_in_reset_reset),                            //   input,    width = 1, clk_reset.reset
		.in_data           (channel_3_avalon_universal_slave_0_agent_rf_source_data),             //   input,  width = 118,        in.data
		.in_valid          (channel_3_avalon_universal_slave_0_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (channel_3_avalon_universal_slave_0_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (channel_3_avalon_universal_slave_0_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (channel_3_avalon_universal_slave_0_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (channel_3_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //  output,  width = 118,       out.data
		.out_valid         (channel_3_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (channel_3_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (channel_3_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (channel_3_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                               // (terminated),                         
		.csr_read          (1'b0),                                                                // (terminated),                         
		.csr_write         (1'b0),                                                                // (terminated),                         
		.csr_readdata      (),                                                                    // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                                // (terminated),                         
		.almost_full_data  (),                                                                    // (terminated),                         
		.almost_empty_data (),                                                                    // (terminated),                         
		.in_empty          (1'b0),                                                                // (terminated),                         
		.out_empty         (),                                                                    // (terminated),                         
		.in_error          (1'b0),                                                                // (terminated),                         
		.out_error         (),                                                                    // (terminated),                         
		.in_channel        (1'b0),                                                                // (terminated),                         
		.out_channel       ()                                                                     // (terminated),                         
	);

	address_decoder_multi_channel_altera_merlin_slave_agent_191_ncfkfri #(
		.PKT_ORI_BURST_SIZE_H      (107),
		.PKT_ORI_BURST_SIZE_L      (105),
		.PKT_RESPONSE_STATUS_H     (104),
		.PKT_RESPONSE_STATUS_L     (103),
		.PKT_BURST_SIZE_H          (80),
		.PKT_BURST_SIZE_L          (78),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (85),
		.PKT_PROTECTION_H          (98),
		.PKT_PROTECTION_L          (96),
		.PKT_BURSTWRAP_H           (77),
		.PKT_BURSTWRAP_L           (77),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (90),
		.PKT_SRC_ID_L              (87),
		.PKT_DEST_ID_H             (94),
		.PKT_DEST_ID_L             (91),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (12),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0)
	) channel_4_avalon_universal_slave_0_agent (
		.clk                     (csr_clk_clk_clk),                                                     //   input,    width = 1,             clk.clk
		.reset                   (master_reset_reset_bridge_in_reset_reset),                            //   input,    width = 1,       clk_reset.reset
		.m0_address              (channel_4_avalon_universal_slave_0_agent_m0_address),                 //  output,   width = 32,              m0.address
		.m0_burstcount           (channel_4_avalon_universal_slave_0_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (channel_4_avalon_universal_slave_0_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (channel_4_avalon_universal_slave_0_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (channel_4_avalon_universal_slave_0_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (channel_4_avalon_universal_slave_0_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (channel_4_avalon_universal_slave_0_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (channel_4_avalon_universal_slave_0_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (channel_4_avalon_universal_slave_0_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (channel_4_avalon_universal_slave_0_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (channel_4_avalon_universal_slave_0_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (channel_4_avalon_universal_slave_0_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (channel_4_avalon_universal_slave_0_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (channel_4_avalon_universal_slave_0_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (channel_4_avalon_universal_slave_0_agent_rp_data),                    //  output,  width = 117,                .data
		.rp_startofpacket        (channel_4_avalon_universal_slave_0_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_004_src_ready),                                               //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_004_src_valid),                                               //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_004_src_data),                                                //   input,  width = 117,                .data
		.cp_startofpacket        (cmd_mux_004_src_startofpacket),                                       //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_004_src_endofpacket),                                         //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_004_src_channel),                                             //   input,   width = 12,                .channel
		.rf_sink_ready           (channel_4_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (channel_4_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (channel_4_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (channel_4_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (channel_4_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //   input,  width = 118,                .data
		.rf_source_ready         (channel_4_avalon_universal_slave_0_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (channel_4_avalon_universal_slave_0_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (channel_4_avalon_universal_slave_0_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (channel_4_avalon_universal_slave_0_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (channel_4_avalon_universal_slave_0_agent_rf_source_data),             //  output,  width = 118,                .data
		.rdata_fifo_sink_ready   (channel_4_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (channel_4_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (channel_4_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (channel_4_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (channel_4_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (channel_4_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                               // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                                // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                                 // (terminated),                               
	);

	address_decoder_multi_channel_altera_avalon_sc_fifo_191_e5eqkcq #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) channel_4_avalon_universal_slave_0_agent_rsp_fifo (
		.clk               (csr_clk_clk_clk),                                                     //   input,    width = 1,       clk.clk
		.reset             (master_reset_reset_bridge_in_reset_reset),                            //   input,    width = 1, clk_reset.reset
		.in_data           (channel_4_avalon_universal_slave_0_agent_rf_source_data),             //   input,  width = 118,        in.data
		.in_valid          (channel_4_avalon_universal_slave_0_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (channel_4_avalon_universal_slave_0_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (channel_4_avalon_universal_slave_0_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (channel_4_avalon_universal_slave_0_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (channel_4_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //  output,  width = 118,       out.data
		.out_valid         (channel_4_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (channel_4_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (channel_4_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (channel_4_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                               // (terminated),                         
		.csr_read          (1'b0),                                                                // (terminated),                         
		.csr_write         (1'b0),                                                                // (terminated),                         
		.csr_readdata      (),                                                                    // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                                // (terminated),                         
		.almost_full_data  (),                                                                    // (terminated),                         
		.almost_empty_data (),                                                                    // (terminated),                         
		.in_empty          (1'b0),                                                                // (terminated),                         
		.out_empty         (),                                                                    // (terminated),                         
		.in_error          (1'b0),                                                                // (terminated),                         
		.out_error         (),                                                                    // (terminated),                         
		.in_channel        (1'b0),                                                                // (terminated),                         
		.out_channel       ()                                                                     // (terminated),                         
	);

	address_decoder_multi_channel_altera_merlin_slave_agent_191_ncfkfri #(
		.PKT_ORI_BURST_SIZE_H      (107),
		.PKT_ORI_BURST_SIZE_L      (105),
		.PKT_RESPONSE_STATUS_H     (104),
		.PKT_RESPONSE_STATUS_L     (103),
		.PKT_BURST_SIZE_H          (80),
		.PKT_BURST_SIZE_L          (78),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (85),
		.PKT_PROTECTION_H          (98),
		.PKT_PROTECTION_L          (96),
		.PKT_BURSTWRAP_H           (77),
		.PKT_BURSTWRAP_L           (77),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (90),
		.PKT_SRC_ID_L              (87),
		.PKT_DEST_ID_H             (94),
		.PKT_DEST_ID_L             (91),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (12),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0)
	) channel_5_avalon_universal_slave_0_agent (
		.clk                     (csr_clk_clk_clk),                                                     //   input,    width = 1,             clk.clk
		.reset                   (master_reset_reset_bridge_in_reset_reset),                            //   input,    width = 1,       clk_reset.reset
		.m0_address              (channel_5_avalon_universal_slave_0_agent_m0_address),                 //  output,   width = 32,              m0.address
		.m0_burstcount           (channel_5_avalon_universal_slave_0_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (channel_5_avalon_universal_slave_0_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (channel_5_avalon_universal_slave_0_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (channel_5_avalon_universal_slave_0_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (channel_5_avalon_universal_slave_0_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (channel_5_avalon_universal_slave_0_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (channel_5_avalon_universal_slave_0_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (channel_5_avalon_universal_slave_0_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (channel_5_avalon_universal_slave_0_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (channel_5_avalon_universal_slave_0_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (channel_5_avalon_universal_slave_0_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (channel_5_avalon_universal_slave_0_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (channel_5_avalon_universal_slave_0_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (channel_5_avalon_universal_slave_0_agent_rp_data),                    //  output,  width = 117,                .data
		.rp_startofpacket        (channel_5_avalon_universal_slave_0_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_005_src_ready),                                               //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_005_src_valid),                                               //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_005_src_data),                                                //   input,  width = 117,                .data
		.cp_startofpacket        (cmd_mux_005_src_startofpacket),                                       //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_005_src_endofpacket),                                         //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_005_src_channel),                                             //   input,   width = 12,                .channel
		.rf_sink_ready           (channel_5_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (channel_5_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (channel_5_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (channel_5_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (channel_5_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //   input,  width = 118,                .data
		.rf_source_ready         (channel_5_avalon_universal_slave_0_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (channel_5_avalon_universal_slave_0_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (channel_5_avalon_universal_slave_0_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (channel_5_avalon_universal_slave_0_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (channel_5_avalon_universal_slave_0_agent_rf_source_data),             //  output,  width = 118,                .data
		.rdata_fifo_sink_ready   (channel_5_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (channel_5_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (channel_5_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (channel_5_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (channel_5_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (channel_5_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                               // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                                // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                                 // (terminated),                               
	);

	address_decoder_multi_channel_altera_avalon_sc_fifo_191_e5eqkcq #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) channel_5_avalon_universal_slave_0_agent_rsp_fifo (
		.clk               (csr_clk_clk_clk),                                                     //   input,    width = 1,       clk.clk
		.reset             (master_reset_reset_bridge_in_reset_reset),                            //   input,    width = 1, clk_reset.reset
		.in_data           (channel_5_avalon_universal_slave_0_agent_rf_source_data),             //   input,  width = 118,        in.data
		.in_valid          (channel_5_avalon_universal_slave_0_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (channel_5_avalon_universal_slave_0_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (channel_5_avalon_universal_slave_0_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (channel_5_avalon_universal_slave_0_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (channel_5_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //  output,  width = 118,       out.data
		.out_valid         (channel_5_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (channel_5_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (channel_5_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (channel_5_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                               // (terminated),                         
		.csr_read          (1'b0),                                                                // (terminated),                         
		.csr_write         (1'b0),                                                                // (terminated),                         
		.csr_readdata      (),                                                                    // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                                // (terminated),                         
		.almost_full_data  (),                                                                    // (terminated),                         
		.almost_empty_data (),                                                                    // (terminated),                         
		.in_empty          (1'b0),                                                                // (terminated),                         
		.out_empty         (),                                                                    // (terminated),                         
		.in_error          (1'b0),                                                                // (terminated),                         
		.out_error         (),                                                                    // (terminated),                         
		.in_channel        (1'b0),                                                                // (terminated),                         
		.out_channel       ()                                                                     // (terminated),                         
	);

	address_decoder_multi_channel_altera_merlin_slave_agent_191_ncfkfri #(
		.PKT_ORI_BURST_SIZE_H      (107),
		.PKT_ORI_BURST_SIZE_L      (105),
		.PKT_RESPONSE_STATUS_H     (104),
		.PKT_RESPONSE_STATUS_L     (103),
		.PKT_BURST_SIZE_H          (80),
		.PKT_BURST_SIZE_L          (78),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (85),
		.PKT_PROTECTION_H          (98),
		.PKT_PROTECTION_L          (96),
		.PKT_BURSTWRAP_H           (77),
		.PKT_BURSTWRAP_L           (77),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (90),
		.PKT_SRC_ID_L              (87),
		.PKT_DEST_ID_H             (94),
		.PKT_DEST_ID_L             (91),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (12),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0)
	) channel_6_avalon_universal_slave_0_agent (
		.clk                     (csr_clk_clk_clk),                                                     //   input,    width = 1,             clk.clk
		.reset                   (master_reset_reset_bridge_in_reset_reset),                            //   input,    width = 1,       clk_reset.reset
		.m0_address              (channel_6_avalon_universal_slave_0_agent_m0_address),                 //  output,   width = 32,              m0.address
		.m0_burstcount           (channel_6_avalon_universal_slave_0_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (channel_6_avalon_universal_slave_0_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (channel_6_avalon_universal_slave_0_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (channel_6_avalon_universal_slave_0_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (channel_6_avalon_universal_slave_0_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (channel_6_avalon_universal_slave_0_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (channel_6_avalon_universal_slave_0_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (channel_6_avalon_universal_slave_0_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (channel_6_avalon_universal_slave_0_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (channel_6_avalon_universal_slave_0_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (channel_6_avalon_universal_slave_0_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (channel_6_avalon_universal_slave_0_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (channel_6_avalon_universal_slave_0_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (channel_6_avalon_universal_slave_0_agent_rp_data),                    //  output,  width = 117,                .data
		.rp_startofpacket        (channel_6_avalon_universal_slave_0_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_006_src_ready),                                               //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_006_src_valid),                                               //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_006_src_data),                                                //   input,  width = 117,                .data
		.cp_startofpacket        (cmd_mux_006_src_startofpacket),                                       //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_006_src_endofpacket),                                         //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_006_src_channel),                                             //   input,   width = 12,                .channel
		.rf_sink_ready           (channel_6_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (channel_6_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (channel_6_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (channel_6_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (channel_6_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //   input,  width = 118,                .data
		.rf_source_ready         (channel_6_avalon_universal_slave_0_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (channel_6_avalon_universal_slave_0_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (channel_6_avalon_universal_slave_0_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (channel_6_avalon_universal_slave_0_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (channel_6_avalon_universal_slave_0_agent_rf_source_data),             //  output,  width = 118,                .data
		.rdata_fifo_sink_ready   (channel_6_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (channel_6_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (channel_6_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (channel_6_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (channel_6_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (channel_6_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                               // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                                // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                                 // (terminated),                               
	);

	address_decoder_multi_channel_altera_avalon_sc_fifo_191_e5eqkcq #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) channel_6_avalon_universal_slave_0_agent_rsp_fifo (
		.clk               (csr_clk_clk_clk),                                                     //   input,    width = 1,       clk.clk
		.reset             (master_reset_reset_bridge_in_reset_reset),                            //   input,    width = 1, clk_reset.reset
		.in_data           (channel_6_avalon_universal_slave_0_agent_rf_source_data),             //   input,  width = 118,        in.data
		.in_valid          (channel_6_avalon_universal_slave_0_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (channel_6_avalon_universal_slave_0_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (channel_6_avalon_universal_slave_0_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (channel_6_avalon_universal_slave_0_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (channel_6_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //  output,  width = 118,       out.data
		.out_valid         (channel_6_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (channel_6_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (channel_6_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (channel_6_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                               // (terminated),                         
		.csr_read          (1'b0),                                                                // (terminated),                         
		.csr_write         (1'b0),                                                                // (terminated),                         
		.csr_readdata      (),                                                                    // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                                // (terminated),                         
		.almost_full_data  (),                                                                    // (terminated),                         
		.almost_empty_data (),                                                                    // (terminated),                         
		.in_empty          (1'b0),                                                                // (terminated),                         
		.out_empty         (),                                                                    // (terminated),                         
		.in_error          (1'b0),                                                                // (terminated),                         
		.out_error         (),                                                                    // (terminated),                         
		.in_channel        (1'b0),                                                                // (terminated),                         
		.out_channel       ()                                                                     // (terminated),                         
	);

	address_decoder_multi_channel_altera_merlin_slave_agent_191_ncfkfri #(
		.PKT_ORI_BURST_SIZE_H      (107),
		.PKT_ORI_BURST_SIZE_L      (105),
		.PKT_RESPONSE_STATUS_H     (104),
		.PKT_RESPONSE_STATUS_L     (103),
		.PKT_BURST_SIZE_H          (80),
		.PKT_BURST_SIZE_L          (78),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (85),
		.PKT_PROTECTION_H          (98),
		.PKT_PROTECTION_L          (96),
		.PKT_BURSTWRAP_H           (77),
		.PKT_BURSTWRAP_L           (77),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (90),
		.PKT_SRC_ID_L              (87),
		.PKT_DEST_ID_H             (94),
		.PKT_DEST_ID_L             (91),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (12),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0)
	) channel_7_avalon_universal_slave_0_agent (
		.clk                     (csr_clk_clk_clk),                                                     //   input,    width = 1,             clk.clk
		.reset                   (master_reset_reset_bridge_in_reset_reset),                            //   input,    width = 1,       clk_reset.reset
		.m0_address              (channel_7_avalon_universal_slave_0_agent_m0_address),                 //  output,   width = 32,              m0.address
		.m0_burstcount           (channel_7_avalon_universal_slave_0_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (channel_7_avalon_universal_slave_0_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (channel_7_avalon_universal_slave_0_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (channel_7_avalon_universal_slave_0_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (channel_7_avalon_universal_slave_0_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (channel_7_avalon_universal_slave_0_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (channel_7_avalon_universal_slave_0_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (channel_7_avalon_universal_slave_0_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (channel_7_avalon_universal_slave_0_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (channel_7_avalon_universal_slave_0_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (channel_7_avalon_universal_slave_0_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (channel_7_avalon_universal_slave_0_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (channel_7_avalon_universal_slave_0_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (channel_7_avalon_universal_slave_0_agent_rp_data),                    //  output,  width = 117,                .data
		.rp_startofpacket        (channel_7_avalon_universal_slave_0_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_007_src_ready),                                               //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_007_src_valid),                                               //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_007_src_data),                                                //   input,  width = 117,                .data
		.cp_startofpacket        (cmd_mux_007_src_startofpacket),                                       //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_007_src_endofpacket),                                         //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_007_src_channel),                                             //   input,   width = 12,                .channel
		.rf_sink_ready           (channel_7_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (channel_7_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (channel_7_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (channel_7_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (channel_7_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //   input,  width = 118,                .data
		.rf_source_ready         (channel_7_avalon_universal_slave_0_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (channel_7_avalon_universal_slave_0_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (channel_7_avalon_universal_slave_0_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (channel_7_avalon_universal_slave_0_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (channel_7_avalon_universal_slave_0_agent_rf_source_data),             //  output,  width = 118,                .data
		.rdata_fifo_sink_ready   (channel_7_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (channel_7_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (channel_7_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (channel_7_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (channel_7_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (channel_7_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                               // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                                // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                                 // (terminated),                               
	);

	address_decoder_multi_channel_altera_avalon_sc_fifo_191_e5eqkcq #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) channel_7_avalon_universal_slave_0_agent_rsp_fifo (
		.clk               (csr_clk_clk_clk),                                                     //   input,    width = 1,       clk.clk
		.reset             (master_reset_reset_bridge_in_reset_reset),                            //   input,    width = 1, clk_reset.reset
		.in_data           (channel_7_avalon_universal_slave_0_agent_rf_source_data),             //   input,  width = 118,        in.data
		.in_valid          (channel_7_avalon_universal_slave_0_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (channel_7_avalon_universal_slave_0_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (channel_7_avalon_universal_slave_0_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (channel_7_avalon_universal_slave_0_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (channel_7_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //  output,  width = 118,       out.data
		.out_valid         (channel_7_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (channel_7_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (channel_7_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (channel_7_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                               // (terminated),                         
		.csr_read          (1'b0),                                                                // (terminated),                         
		.csr_write         (1'b0),                                                                // (terminated),                         
		.csr_readdata      (),                                                                    // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                                // (terminated),                         
		.almost_full_data  (),                                                                    // (terminated),                         
		.almost_empty_data (),                                                                    // (terminated),                         
		.in_empty          (1'b0),                                                                // (terminated),                         
		.out_empty         (),                                                                    // (terminated),                         
		.in_error          (1'b0),                                                                // (terminated),                         
		.out_error         (),                                                                    // (terminated),                         
		.in_channel        (1'b0),                                                                // (terminated),                         
		.out_channel       ()                                                                     // (terminated),                         
	);

	address_decoder_multi_channel_altera_merlin_slave_agent_191_ncfkfri #(
		.PKT_ORI_BURST_SIZE_H      (107),
		.PKT_ORI_BURST_SIZE_L      (105),
		.PKT_RESPONSE_STATUS_H     (104),
		.PKT_RESPONSE_STATUS_L     (103),
		.PKT_BURST_SIZE_H          (80),
		.PKT_BURST_SIZE_L          (78),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (85),
		.PKT_PROTECTION_H          (98),
		.PKT_PROTECTION_L          (96),
		.PKT_BURSTWRAP_H           (77),
		.PKT_BURSTWRAP_L           (77),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (90),
		.PKT_SRC_ID_L              (87),
		.PKT_DEST_ID_H             (94),
		.PKT_DEST_ID_L             (91),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (12),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0)
	) channel_8_avalon_universal_slave_0_agent (
		.clk                     (csr_clk_clk_clk),                                                     //   input,    width = 1,             clk.clk
		.reset                   (master_reset_reset_bridge_in_reset_reset),                            //   input,    width = 1,       clk_reset.reset
		.m0_address              (channel_8_avalon_universal_slave_0_agent_m0_address),                 //  output,   width = 32,              m0.address
		.m0_burstcount           (channel_8_avalon_universal_slave_0_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (channel_8_avalon_universal_slave_0_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (channel_8_avalon_universal_slave_0_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (channel_8_avalon_universal_slave_0_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (channel_8_avalon_universal_slave_0_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (channel_8_avalon_universal_slave_0_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (channel_8_avalon_universal_slave_0_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (channel_8_avalon_universal_slave_0_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (channel_8_avalon_universal_slave_0_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (channel_8_avalon_universal_slave_0_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (channel_8_avalon_universal_slave_0_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (channel_8_avalon_universal_slave_0_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (channel_8_avalon_universal_slave_0_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (channel_8_avalon_universal_slave_0_agent_rp_data),                    //  output,  width = 117,                .data
		.rp_startofpacket        (channel_8_avalon_universal_slave_0_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_008_src_ready),                                               //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_008_src_valid),                                               //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_008_src_data),                                                //   input,  width = 117,                .data
		.cp_startofpacket        (cmd_mux_008_src_startofpacket),                                       //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_008_src_endofpacket),                                         //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_008_src_channel),                                             //   input,   width = 12,                .channel
		.rf_sink_ready           (channel_8_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (channel_8_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (channel_8_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (channel_8_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (channel_8_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //   input,  width = 118,                .data
		.rf_source_ready         (channel_8_avalon_universal_slave_0_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (channel_8_avalon_universal_slave_0_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (channel_8_avalon_universal_slave_0_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (channel_8_avalon_universal_slave_0_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (channel_8_avalon_universal_slave_0_agent_rf_source_data),             //  output,  width = 118,                .data
		.rdata_fifo_sink_ready   (channel_8_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (channel_8_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (channel_8_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (channel_8_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (channel_8_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (channel_8_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                               // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                                // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                                 // (terminated),                               
	);

	address_decoder_multi_channel_altera_avalon_sc_fifo_191_e5eqkcq #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) channel_8_avalon_universal_slave_0_agent_rsp_fifo (
		.clk               (csr_clk_clk_clk),                                                     //   input,    width = 1,       clk.clk
		.reset             (master_reset_reset_bridge_in_reset_reset),                            //   input,    width = 1, clk_reset.reset
		.in_data           (channel_8_avalon_universal_slave_0_agent_rf_source_data),             //   input,  width = 118,        in.data
		.in_valid          (channel_8_avalon_universal_slave_0_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (channel_8_avalon_universal_slave_0_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (channel_8_avalon_universal_slave_0_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (channel_8_avalon_universal_slave_0_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (channel_8_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //  output,  width = 118,       out.data
		.out_valid         (channel_8_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (channel_8_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (channel_8_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (channel_8_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                               // (terminated),                         
		.csr_read          (1'b0),                                                                // (terminated),                         
		.csr_write         (1'b0),                                                                // (terminated),                         
		.csr_readdata      (),                                                                    // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                                // (terminated),                         
		.almost_full_data  (),                                                                    // (terminated),                         
		.almost_empty_data (),                                                                    // (terminated),                         
		.in_empty          (1'b0),                                                                // (terminated),                         
		.out_empty         (),                                                                    // (terminated),                         
		.in_error          (1'b0),                                                                // (terminated),                         
		.out_error         (),                                                                    // (terminated),                         
		.in_channel        (1'b0),                                                                // (terminated),                         
		.out_channel       ()                                                                     // (terminated),                         
	);

	address_decoder_multi_channel_altera_merlin_slave_agent_191_ncfkfri #(
		.PKT_ORI_BURST_SIZE_H      (107),
		.PKT_ORI_BURST_SIZE_L      (105),
		.PKT_RESPONSE_STATUS_H     (104),
		.PKT_RESPONSE_STATUS_L     (103),
		.PKT_BURST_SIZE_H          (80),
		.PKT_BURST_SIZE_L          (78),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (85),
		.PKT_PROTECTION_H          (98),
		.PKT_PROTECTION_L          (96),
		.PKT_BURSTWRAP_H           (77),
		.PKT_BURSTWRAP_L           (77),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (90),
		.PKT_SRC_ID_L              (87),
		.PKT_DEST_ID_H             (94),
		.PKT_DEST_ID_L             (91),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (12),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0)
	) channel_9_avalon_universal_slave_0_agent (
		.clk                     (csr_clk_clk_clk),                                                     //   input,    width = 1,             clk.clk
		.reset                   (master_reset_reset_bridge_in_reset_reset),                            //   input,    width = 1,       clk_reset.reset
		.m0_address              (channel_9_avalon_universal_slave_0_agent_m0_address),                 //  output,   width = 32,              m0.address
		.m0_burstcount           (channel_9_avalon_universal_slave_0_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (channel_9_avalon_universal_slave_0_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (channel_9_avalon_universal_slave_0_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (channel_9_avalon_universal_slave_0_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (channel_9_avalon_universal_slave_0_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (channel_9_avalon_universal_slave_0_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (channel_9_avalon_universal_slave_0_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (channel_9_avalon_universal_slave_0_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (channel_9_avalon_universal_slave_0_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (channel_9_avalon_universal_slave_0_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (channel_9_avalon_universal_slave_0_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (channel_9_avalon_universal_slave_0_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (channel_9_avalon_universal_slave_0_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (channel_9_avalon_universal_slave_0_agent_rp_data),                    //  output,  width = 117,                .data
		.rp_startofpacket        (channel_9_avalon_universal_slave_0_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_009_src_ready),                                               //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_009_src_valid),                                               //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_009_src_data),                                                //   input,  width = 117,                .data
		.cp_startofpacket        (cmd_mux_009_src_startofpacket),                                       //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_009_src_endofpacket),                                         //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_009_src_channel),                                             //   input,   width = 12,                .channel
		.rf_sink_ready           (channel_9_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (channel_9_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (channel_9_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (channel_9_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (channel_9_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //   input,  width = 118,                .data
		.rf_source_ready         (channel_9_avalon_universal_slave_0_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (channel_9_avalon_universal_slave_0_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (channel_9_avalon_universal_slave_0_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (channel_9_avalon_universal_slave_0_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (channel_9_avalon_universal_slave_0_agent_rf_source_data),             //  output,  width = 118,                .data
		.rdata_fifo_sink_ready   (channel_9_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (channel_9_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (channel_9_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (channel_9_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (channel_9_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (channel_9_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                               // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                                // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                                 // (terminated),                               
	);

	address_decoder_multi_channel_altera_avalon_sc_fifo_191_e5eqkcq #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) channel_9_avalon_universal_slave_0_agent_rsp_fifo (
		.clk               (csr_clk_clk_clk),                                                     //   input,    width = 1,       clk.clk
		.reset             (master_reset_reset_bridge_in_reset_reset),                            //   input,    width = 1, clk_reset.reset
		.in_data           (channel_9_avalon_universal_slave_0_agent_rf_source_data),             //   input,  width = 118,        in.data
		.in_valid          (channel_9_avalon_universal_slave_0_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (channel_9_avalon_universal_slave_0_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (channel_9_avalon_universal_slave_0_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (channel_9_avalon_universal_slave_0_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (channel_9_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //  output,  width = 118,       out.data
		.out_valid         (channel_9_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (channel_9_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (channel_9_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (channel_9_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                               // (terminated),                         
		.csr_read          (1'b0),                                                                // (terminated),                         
		.csr_write         (1'b0),                                                                // (terminated),                         
		.csr_readdata      (),                                                                    // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                                // (terminated),                         
		.almost_full_data  (),                                                                    // (terminated),                         
		.almost_empty_data (),                                                                    // (terminated),                         
		.in_empty          (1'b0),                                                                // (terminated),                         
		.out_empty         (),                                                                    // (terminated),                         
		.in_error          (1'b0),                                                                // (terminated),                         
		.out_error         (),                                                                    // (terminated),                         
		.in_channel        (1'b0),                                                                // (terminated),                         
		.out_channel       ()                                                                     // (terminated),                         
	);

	address_decoder_multi_channel_altera_merlin_slave_agent_191_ncfkfri #(
		.PKT_ORI_BURST_SIZE_H      (107),
		.PKT_ORI_BURST_SIZE_L      (105),
		.PKT_RESPONSE_STATUS_H     (104),
		.PKT_RESPONSE_STATUS_L     (103),
		.PKT_BURST_SIZE_H          (80),
		.PKT_BURST_SIZE_L          (78),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (85),
		.PKT_PROTECTION_H          (98),
		.PKT_PROTECTION_L          (96),
		.PKT_BURSTWRAP_H           (77),
		.PKT_BURSTWRAP_L           (77),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (90),
		.PKT_SRC_ID_L              (87),
		.PKT_DEST_ID_H             (94),
		.PKT_DEST_ID_L             (91),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (12),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0)
	) channel_10_avalon_universal_slave_0_agent (
		.clk                     (csr_clk_clk_clk),                                                      //   input,    width = 1,             clk.clk
		.reset                   (master_reset_reset_bridge_in_reset_reset),                             //   input,    width = 1,       clk_reset.reset
		.m0_address              (channel_10_avalon_universal_slave_0_agent_m0_address),                 //  output,   width = 32,              m0.address
		.m0_burstcount           (channel_10_avalon_universal_slave_0_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (channel_10_avalon_universal_slave_0_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (channel_10_avalon_universal_slave_0_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (channel_10_avalon_universal_slave_0_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (channel_10_avalon_universal_slave_0_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (channel_10_avalon_universal_slave_0_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (channel_10_avalon_universal_slave_0_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (channel_10_avalon_universal_slave_0_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (channel_10_avalon_universal_slave_0_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (channel_10_avalon_universal_slave_0_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (channel_10_avalon_universal_slave_0_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (channel_10_avalon_universal_slave_0_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (channel_10_avalon_universal_slave_0_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (channel_10_avalon_universal_slave_0_agent_rp_data),                    //  output,  width = 117,                .data
		.rp_startofpacket        (channel_10_avalon_universal_slave_0_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_010_src_ready),                                                //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_010_src_valid),                                                //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_010_src_data),                                                 //   input,  width = 117,                .data
		.cp_startofpacket        (cmd_mux_010_src_startofpacket),                                        //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_010_src_endofpacket),                                          //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_010_src_channel),                                              //   input,   width = 12,                .channel
		.rf_sink_ready           (channel_10_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (channel_10_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (channel_10_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (channel_10_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (channel_10_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //   input,  width = 118,                .data
		.rf_source_ready         (channel_10_avalon_universal_slave_0_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (channel_10_avalon_universal_slave_0_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (channel_10_avalon_universal_slave_0_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (channel_10_avalon_universal_slave_0_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (channel_10_avalon_universal_slave_0_agent_rf_source_data),             //  output,  width = 118,                .data
		.rdata_fifo_sink_ready   (channel_10_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (channel_10_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (channel_10_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (channel_10_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (channel_10_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (channel_10_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                                // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                                 // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                                  // (terminated),                               
	);

	address_decoder_multi_channel_altera_avalon_sc_fifo_191_e5eqkcq #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) channel_10_avalon_universal_slave_0_agent_rsp_fifo (
		.clk               (csr_clk_clk_clk),                                                      //   input,    width = 1,       clk.clk
		.reset             (master_reset_reset_bridge_in_reset_reset),                             //   input,    width = 1, clk_reset.reset
		.in_data           (channel_10_avalon_universal_slave_0_agent_rf_source_data),             //   input,  width = 118,        in.data
		.in_valid          (channel_10_avalon_universal_slave_0_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (channel_10_avalon_universal_slave_0_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (channel_10_avalon_universal_slave_0_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (channel_10_avalon_universal_slave_0_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (channel_10_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //  output,  width = 118,       out.data
		.out_valid         (channel_10_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (channel_10_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (channel_10_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (channel_10_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                                // (terminated),                         
		.csr_read          (1'b0),                                                                 // (terminated),                         
		.csr_write         (1'b0),                                                                 // (terminated),                         
		.csr_readdata      (),                                                                     // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                                 // (terminated),                         
		.almost_full_data  (),                                                                     // (terminated),                         
		.almost_empty_data (),                                                                     // (terminated),                         
		.in_empty          (1'b0),                                                                 // (terminated),                         
		.out_empty         (),                                                                     // (terminated),                         
		.in_error          (1'b0),                                                                 // (terminated),                         
		.out_error         (),                                                                     // (terminated),                         
		.in_channel        (1'b0),                                                                 // (terminated),                         
		.out_channel       ()                                                                      // (terminated),                         
	);

	address_decoder_multi_channel_altera_merlin_slave_agent_191_ncfkfri #(
		.PKT_ORI_BURST_SIZE_H      (107),
		.PKT_ORI_BURST_SIZE_L      (105),
		.PKT_RESPONSE_STATUS_H     (104),
		.PKT_RESPONSE_STATUS_L     (103),
		.PKT_BURST_SIZE_H          (80),
		.PKT_BURST_SIZE_L          (78),
		.PKT_TRANS_LOCK            (72),
		.PKT_BEGIN_BURST           (85),
		.PKT_PROTECTION_H          (98),
		.PKT_PROTECTION_L          (96),
		.PKT_BURSTWRAP_H           (77),
		.PKT_BURSTWRAP_L           (77),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (74),
		.PKT_ADDR_H                (67),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (68),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.PKT_TRANS_READ            (71),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (90),
		.PKT_SRC_ID_L              (87),
		.PKT_DEST_ID_H             (94),
		.PKT_DEST_ID_L             (91),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (12),
		.ST_DATA_W                 (117),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0)
	) channel_11_avalon_universal_slave_0_agent (
		.clk                     (csr_clk_clk_clk),                                                      //   input,    width = 1,             clk.clk
		.reset                   (master_reset_reset_bridge_in_reset_reset),                             //   input,    width = 1,       clk_reset.reset
		.m0_address              (channel_11_avalon_universal_slave_0_agent_m0_address),                 //  output,   width = 32,              m0.address
		.m0_burstcount           (channel_11_avalon_universal_slave_0_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (channel_11_avalon_universal_slave_0_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (channel_11_avalon_universal_slave_0_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (channel_11_avalon_universal_slave_0_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (channel_11_avalon_universal_slave_0_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (channel_11_avalon_universal_slave_0_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (channel_11_avalon_universal_slave_0_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (channel_11_avalon_universal_slave_0_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (channel_11_avalon_universal_slave_0_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (channel_11_avalon_universal_slave_0_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (channel_11_avalon_universal_slave_0_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (channel_11_avalon_universal_slave_0_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (channel_11_avalon_universal_slave_0_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (channel_11_avalon_universal_slave_0_agent_rp_data),                    //  output,  width = 117,                .data
		.rp_startofpacket        (channel_11_avalon_universal_slave_0_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_011_src_ready),                                                //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_011_src_valid),                                                //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_011_src_data),                                                 //   input,  width = 117,                .data
		.cp_startofpacket        (cmd_mux_011_src_startofpacket),                                        //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_011_src_endofpacket),                                          //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_011_src_channel),                                              //   input,   width = 12,                .channel
		.rf_sink_ready           (channel_11_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (channel_11_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (channel_11_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (channel_11_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (channel_11_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //   input,  width = 118,                .data
		.rf_source_ready         (channel_11_avalon_universal_slave_0_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (channel_11_avalon_universal_slave_0_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (channel_11_avalon_universal_slave_0_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (channel_11_avalon_universal_slave_0_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (channel_11_avalon_universal_slave_0_agent_rf_source_data),             //  output,  width = 118,                .data
		.rdata_fifo_sink_ready   (channel_11_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (channel_11_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (channel_11_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (channel_11_avalon_universal_slave_0_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (channel_11_avalon_universal_slave_0_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (channel_11_avalon_universal_slave_0_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                                // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                                 // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                                  // (terminated),                               
	);

	address_decoder_multi_channel_altera_avalon_sc_fifo_191_e5eqkcq #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (118),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) channel_11_avalon_universal_slave_0_agent_rsp_fifo (
		.clk               (csr_clk_clk_clk),                                                      //   input,    width = 1,       clk.clk
		.reset             (master_reset_reset_bridge_in_reset_reset),                             //   input,    width = 1, clk_reset.reset
		.in_data           (channel_11_avalon_universal_slave_0_agent_rf_source_data),             //   input,  width = 118,        in.data
		.in_valid          (channel_11_avalon_universal_slave_0_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (channel_11_avalon_universal_slave_0_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (channel_11_avalon_universal_slave_0_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (channel_11_avalon_universal_slave_0_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (channel_11_avalon_universal_slave_0_agent_rsp_fifo_out_data),          //  output,  width = 118,       out.data
		.out_valid         (channel_11_avalon_universal_slave_0_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (channel_11_avalon_universal_slave_0_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (channel_11_avalon_universal_slave_0_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (channel_11_avalon_universal_slave_0_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                                // (terminated),                         
		.csr_read          (1'b0),                                                                 // (terminated),                         
		.csr_write         (1'b0),                                                                 // (terminated),                         
		.csr_readdata      (),                                                                     // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                                 // (terminated),                         
		.almost_full_data  (),                                                                     // (terminated),                         
		.almost_empty_data (),                                                                     // (terminated),                         
		.in_empty          (1'b0),                                                                 // (terminated),                         
		.out_empty         (),                                                                     // (terminated),                         
		.in_error          (1'b0),                                                                 // (terminated),                         
		.out_error         (),                                                                     // (terminated),                         
		.in_channel        (1'b0),                                                                 // (terminated),                         
		.out_channel       ()                                                                      // (terminated),                         
	);

	address_decoder_multi_channel_altera_merlin_router_191_32egg6a router (
		.sink_ready         (master_avalon_universal_master_0_agent_cp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (master_avalon_universal_master_0_agent_cp_valid),         //   input,    width = 1,          .valid
		.sink_data          (master_avalon_universal_master_0_agent_cp_data),          //   input,  width = 117,          .data
		.sink_startofpacket (master_avalon_universal_master_0_agent_cp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (master_avalon_universal_master_0_agent_cp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (csr_clk_clk_clk),                                         //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset),                //   input,    width = 1, clk_reset.reset
		.src_ready          (router_src_ready),                                        //   input,    width = 1,       src.ready
		.src_valid          (router_src_valid),                                        //  output,    width = 1,          .valid
		.src_data           (router_src_data),                                         //  output,  width = 117,          .data
		.src_channel        (router_src_channel),                                      //  output,   width = 12,          .channel
		.src_startofpacket  (router_src_startofpacket),                                //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_src_endofpacket)                                   //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_router_191_4vwofdq router_001 (
		.sink_ready         (channel_1_avalon_universal_slave_0_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (channel_1_avalon_universal_slave_0_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (channel_1_avalon_universal_slave_0_agent_rp_data),          //   input,  width = 117,          .data
		.sink_startofpacket (channel_1_avalon_universal_slave_0_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (channel_1_avalon_universal_slave_0_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (csr_clk_clk_clk),                                           //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset),                  //   input,    width = 1, clk_reset.reset
		.src_ready          (router_001_src_ready),                                      //   input,    width = 1,       src.ready
		.src_valid          (router_001_src_valid),                                      //  output,    width = 1,          .valid
		.src_data           (router_001_src_data),                                       //  output,  width = 117,          .data
		.src_channel        (router_001_src_channel),                                    //  output,   width = 12,          .channel
		.src_startofpacket  (router_001_src_startofpacket),                              //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_001_src_endofpacket)                                 //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_router_191_4vwofdq router_002 (
		.sink_ready         (channel_0_avalon_universal_slave_0_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (channel_0_avalon_universal_slave_0_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (channel_0_avalon_universal_slave_0_agent_rp_data),          //   input,  width = 117,          .data
		.sink_startofpacket (channel_0_avalon_universal_slave_0_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (channel_0_avalon_universal_slave_0_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (csr_clk_clk_clk),                                           //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset),                  //   input,    width = 1, clk_reset.reset
		.src_ready          (router_002_src_ready),                                      //   input,    width = 1,       src.ready
		.src_valid          (router_002_src_valid),                                      //  output,    width = 1,          .valid
		.src_data           (router_002_src_data),                                       //  output,  width = 117,          .data
		.src_channel        (router_002_src_channel),                                    //  output,   width = 12,          .channel
		.src_startofpacket  (router_002_src_startofpacket),                              //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_002_src_endofpacket)                                 //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_router_191_4vwofdq router_003 (
		.sink_ready         (channel_2_avalon_universal_slave_0_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (channel_2_avalon_universal_slave_0_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (channel_2_avalon_universal_slave_0_agent_rp_data),          //   input,  width = 117,          .data
		.sink_startofpacket (channel_2_avalon_universal_slave_0_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (channel_2_avalon_universal_slave_0_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (csr_clk_clk_clk),                                           //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset),                  //   input,    width = 1, clk_reset.reset
		.src_ready          (router_003_src_ready),                                      //   input,    width = 1,       src.ready
		.src_valid          (router_003_src_valid),                                      //  output,    width = 1,          .valid
		.src_data           (router_003_src_data),                                       //  output,  width = 117,          .data
		.src_channel        (router_003_src_channel),                                    //  output,   width = 12,          .channel
		.src_startofpacket  (router_003_src_startofpacket),                              //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_003_src_endofpacket)                                 //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_router_191_4vwofdq router_004 (
		.sink_ready         (channel_3_avalon_universal_slave_0_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (channel_3_avalon_universal_slave_0_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (channel_3_avalon_universal_slave_0_agent_rp_data),          //   input,  width = 117,          .data
		.sink_startofpacket (channel_3_avalon_universal_slave_0_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (channel_3_avalon_universal_slave_0_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (csr_clk_clk_clk),                                           //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset),                  //   input,    width = 1, clk_reset.reset
		.src_ready          (router_004_src_ready),                                      //   input,    width = 1,       src.ready
		.src_valid          (router_004_src_valid),                                      //  output,    width = 1,          .valid
		.src_data           (router_004_src_data),                                       //  output,  width = 117,          .data
		.src_channel        (router_004_src_channel),                                    //  output,   width = 12,          .channel
		.src_startofpacket  (router_004_src_startofpacket),                              //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_004_src_endofpacket)                                 //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_router_191_4vwofdq router_005 (
		.sink_ready         (channel_4_avalon_universal_slave_0_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (channel_4_avalon_universal_slave_0_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (channel_4_avalon_universal_slave_0_agent_rp_data),          //   input,  width = 117,          .data
		.sink_startofpacket (channel_4_avalon_universal_slave_0_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (channel_4_avalon_universal_slave_0_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (csr_clk_clk_clk),                                           //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset),                  //   input,    width = 1, clk_reset.reset
		.src_ready          (router_005_src_ready),                                      //   input,    width = 1,       src.ready
		.src_valid          (router_005_src_valid),                                      //  output,    width = 1,          .valid
		.src_data           (router_005_src_data),                                       //  output,  width = 117,          .data
		.src_channel        (router_005_src_channel),                                    //  output,   width = 12,          .channel
		.src_startofpacket  (router_005_src_startofpacket),                              //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_005_src_endofpacket)                                 //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_router_191_4vwofdq router_006 (
		.sink_ready         (channel_5_avalon_universal_slave_0_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (channel_5_avalon_universal_slave_0_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (channel_5_avalon_universal_slave_0_agent_rp_data),          //   input,  width = 117,          .data
		.sink_startofpacket (channel_5_avalon_universal_slave_0_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (channel_5_avalon_universal_slave_0_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (csr_clk_clk_clk),                                           //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset),                  //   input,    width = 1, clk_reset.reset
		.src_ready          (router_006_src_ready),                                      //   input,    width = 1,       src.ready
		.src_valid          (router_006_src_valid),                                      //  output,    width = 1,          .valid
		.src_data           (router_006_src_data),                                       //  output,  width = 117,          .data
		.src_channel        (router_006_src_channel),                                    //  output,   width = 12,          .channel
		.src_startofpacket  (router_006_src_startofpacket),                              //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_006_src_endofpacket)                                 //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_router_191_4vwofdq router_007 (
		.sink_ready         (channel_6_avalon_universal_slave_0_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (channel_6_avalon_universal_slave_0_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (channel_6_avalon_universal_slave_0_agent_rp_data),          //   input,  width = 117,          .data
		.sink_startofpacket (channel_6_avalon_universal_slave_0_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (channel_6_avalon_universal_slave_0_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (csr_clk_clk_clk),                                           //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset),                  //   input,    width = 1, clk_reset.reset
		.src_ready          (router_007_src_ready),                                      //   input,    width = 1,       src.ready
		.src_valid          (router_007_src_valid),                                      //  output,    width = 1,          .valid
		.src_data           (router_007_src_data),                                       //  output,  width = 117,          .data
		.src_channel        (router_007_src_channel),                                    //  output,   width = 12,          .channel
		.src_startofpacket  (router_007_src_startofpacket),                              //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_007_src_endofpacket)                                 //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_router_191_4vwofdq router_008 (
		.sink_ready         (channel_7_avalon_universal_slave_0_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (channel_7_avalon_universal_slave_0_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (channel_7_avalon_universal_slave_0_agent_rp_data),          //   input,  width = 117,          .data
		.sink_startofpacket (channel_7_avalon_universal_slave_0_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (channel_7_avalon_universal_slave_0_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (csr_clk_clk_clk),                                           //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset),                  //   input,    width = 1, clk_reset.reset
		.src_ready          (router_008_src_ready),                                      //   input,    width = 1,       src.ready
		.src_valid          (router_008_src_valid),                                      //  output,    width = 1,          .valid
		.src_data           (router_008_src_data),                                       //  output,  width = 117,          .data
		.src_channel        (router_008_src_channel),                                    //  output,   width = 12,          .channel
		.src_startofpacket  (router_008_src_startofpacket),                              //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_008_src_endofpacket)                                 //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_router_191_4vwofdq router_009 (
		.sink_ready         (channel_8_avalon_universal_slave_0_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (channel_8_avalon_universal_slave_0_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (channel_8_avalon_universal_slave_0_agent_rp_data),          //   input,  width = 117,          .data
		.sink_startofpacket (channel_8_avalon_universal_slave_0_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (channel_8_avalon_universal_slave_0_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (csr_clk_clk_clk),                                           //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset),                  //   input,    width = 1, clk_reset.reset
		.src_ready          (router_009_src_ready),                                      //   input,    width = 1,       src.ready
		.src_valid          (router_009_src_valid),                                      //  output,    width = 1,          .valid
		.src_data           (router_009_src_data),                                       //  output,  width = 117,          .data
		.src_channel        (router_009_src_channel),                                    //  output,   width = 12,          .channel
		.src_startofpacket  (router_009_src_startofpacket),                              //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_009_src_endofpacket)                                 //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_router_191_4vwofdq router_010 (
		.sink_ready         (channel_9_avalon_universal_slave_0_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (channel_9_avalon_universal_slave_0_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (channel_9_avalon_universal_slave_0_agent_rp_data),          //   input,  width = 117,          .data
		.sink_startofpacket (channel_9_avalon_universal_slave_0_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (channel_9_avalon_universal_slave_0_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (csr_clk_clk_clk),                                           //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset),                  //   input,    width = 1, clk_reset.reset
		.src_ready          (router_010_src_ready),                                      //   input,    width = 1,       src.ready
		.src_valid          (router_010_src_valid),                                      //  output,    width = 1,          .valid
		.src_data           (router_010_src_data),                                       //  output,  width = 117,          .data
		.src_channel        (router_010_src_channel),                                    //  output,   width = 12,          .channel
		.src_startofpacket  (router_010_src_startofpacket),                              //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_010_src_endofpacket)                                 //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_router_191_4vwofdq router_011 (
		.sink_ready         (channel_10_avalon_universal_slave_0_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (channel_10_avalon_universal_slave_0_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (channel_10_avalon_universal_slave_0_agent_rp_data),          //   input,  width = 117,          .data
		.sink_startofpacket (channel_10_avalon_universal_slave_0_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (channel_10_avalon_universal_slave_0_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (csr_clk_clk_clk),                                            //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset),                   //   input,    width = 1, clk_reset.reset
		.src_ready          (router_011_src_ready),                                       //   input,    width = 1,       src.ready
		.src_valid          (router_011_src_valid),                                       //  output,    width = 1,          .valid
		.src_data           (router_011_src_data),                                        //  output,  width = 117,          .data
		.src_channel        (router_011_src_channel),                                     //  output,   width = 12,          .channel
		.src_startofpacket  (router_011_src_startofpacket),                               //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_011_src_endofpacket)                                  //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_router_191_4vwofdq router_012 (
		.sink_ready         (channel_11_avalon_universal_slave_0_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (channel_11_avalon_universal_slave_0_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (channel_11_avalon_universal_slave_0_agent_rp_data),          //   input,  width = 117,          .data
		.sink_startofpacket (channel_11_avalon_universal_slave_0_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (channel_11_avalon_universal_slave_0_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (csr_clk_clk_clk),                                            //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset),                   //   input,    width = 1, clk_reset.reset
		.src_ready          (router_012_src_ready),                                       //   input,    width = 1,       src.ready
		.src_valid          (router_012_src_valid),                                       //  output,    width = 1,          .valid
		.src_data           (router_012_src_data),                                        //  output,  width = 117,          .data
		.src_channel        (router_012_src_channel),                                     //  output,   width = 12,          .channel
		.src_startofpacket  (router_012_src_startofpacket),                               //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_012_src_endofpacket)                                  //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_traffic_limiter_191_kcba44q #(
		.SYNC_RESET                (0),
		.PKT_DEST_ID_H             (94),
		.PKT_DEST_ID_L             (91),
		.PKT_SRC_ID_H              (90),
		.PKT_SRC_ID_L              (87),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (74),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_TRANS_POSTED          (69),
		.PKT_TRANS_WRITE           (70),
		.MAX_OUTSTANDING_RESPONSES (2),
		.PIPELINED                 (0),
		.ST_DATA_W                 (117),
		.ST_CHANNEL_W              (12),
		.VALID_WIDTH               (12),
		.ENFORCE_ORDER             (1),
		.PREVENT_HAZARDS           (0),
		.SUPPORTS_POSTED_WRITES    (1),
		.SUPPORTS_NONPOSTED_WRITES (0),
		.REORDER                   (0)
	) master_avalon_universal_master_0_limiter (
		.clk                    (csr_clk_clk_clk),                                                //   input,    width = 1,       clk.clk
		.reset                  (master_reset_reset_bridge_in_reset_reset),                       //   input,    width = 1, clk_reset.reset
		.cmd_sink_ready         (router_src_ready),                                               //  output,    width = 1,  cmd_sink.ready
		.cmd_sink_valid         (router_src_valid),                                               //   input,    width = 1,          .valid
		.cmd_sink_data          (router_src_data),                                                //   input,  width = 117,          .data
		.cmd_sink_channel       (router_src_channel),                                             //   input,   width = 12,          .channel
		.cmd_sink_startofpacket (router_src_startofpacket),                                       //   input,    width = 1,          .startofpacket
		.cmd_sink_endofpacket   (router_src_endofpacket),                                         //   input,    width = 1,          .endofpacket
		.cmd_src_ready          (master_avalon_universal_master_0_limiter_cmd_src_ready),         //   input,    width = 1,   cmd_src.ready
		.cmd_src_data           (master_avalon_universal_master_0_limiter_cmd_src_data),          //  output,  width = 117,          .data
		.cmd_src_channel        (master_avalon_universal_master_0_limiter_cmd_src_channel),       //  output,   width = 12,          .channel
		.cmd_src_startofpacket  (master_avalon_universal_master_0_limiter_cmd_src_startofpacket), //  output,    width = 1,          .startofpacket
		.cmd_src_endofpacket    (master_avalon_universal_master_0_limiter_cmd_src_endofpacket),   //  output,    width = 1,          .endofpacket
		.rsp_sink_ready         (rsp_mux_src_ready),                                              //  output,    width = 1,  rsp_sink.ready
		.rsp_sink_valid         (rsp_mux_src_valid),                                              //   input,    width = 1,          .valid
		.rsp_sink_channel       (rsp_mux_src_channel),                                            //   input,   width = 12,          .channel
		.rsp_sink_data          (rsp_mux_src_data),                                               //   input,  width = 117,          .data
		.rsp_sink_startofpacket (rsp_mux_src_startofpacket),                                      //   input,    width = 1,          .startofpacket
		.rsp_sink_endofpacket   (rsp_mux_src_endofpacket),                                        //   input,    width = 1,          .endofpacket
		.rsp_src_ready          (master_avalon_universal_master_0_limiter_rsp_src_ready),         //   input,    width = 1,   rsp_src.ready
		.rsp_src_valid          (master_avalon_universal_master_0_limiter_rsp_src_valid),         //  output,    width = 1,          .valid
		.rsp_src_data           (master_avalon_universal_master_0_limiter_rsp_src_data),          //  output,  width = 117,          .data
		.rsp_src_channel        (master_avalon_universal_master_0_limiter_rsp_src_channel),       //  output,   width = 12,          .channel
		.rsp_src_startofpacket  (master_avalon_universal_master_0_limiter_rsp_src_startofpacket), //  output,    width = 1,          .startofpacket
		.rsp_src_endofpacket    (master_avalon_universal_master_0_limiter_rsp_src_endofpacket),   //  output,    width = 1,          .endofpacket
		.cmd_src_valid          (master_avalon_universal_master_0_limiter_cmd_valid_data)         //  output,   width = 12, cmd_valid.data
	);

	address_decoder_multi_channel_altera_merlin_demultiplexer_191_vs5t6hy cmd_demux (
		.clk                 (csr_clk_clk_clk),                                                //   input,    width = 1,        clk.clk
		.reset               (master_reset_reset_bridge_in_reset_reset),                       //   input,    width = 1,  clk_reset.reset
		.sink_ready          (master_avalon_universal_master_0_limiter_cmd_src_ready),         //  output,    width = 1,       sink.ready
		.sink_channel        (master_avalon_universal_master_0_limiter_cmd_src_channel),       //   input,   width = 12,           .channel
		.sink_data           (master_avalon_universal_master_0_limiter_cmd_src_data),          //   input,  width = 117,           .data
		.sink_startofpacket  (master_avalon_universal_master_0_limiter_cmd_src_startofpacket), //   input,    width = 1,           .startofpacket
		.sink_endofpacket    (master_avalon_universal_master_0_limiter_cmd_src_endofpacket),   //   input,    width = 1,           .endofpacket
		.sink_valid          (master_avalon_universal_master_0_limiter_cmd_valid_data),        //   input,   width = 12, sink_valid.data
		.src0_ready          (cmd_demux_src0_ready),                                           //   input,    width = 1,       src0.ready
		.src0_valid          (cmd_demux_src0_valid),                                           //  output,    width = 1,           .valid
		.src0_data           (cmd_demux_src0_data),                                            //  output,  width = 117,           .data
		.src0_channel        (cmd_demux_src0_channel),                                         //  output,   width = 12,           .channel
		.src0_startofpacket  (cmd_demux_src0_startofpacket),                                   //  output,    width = 1,           .startofpacket
		.src0_endofpacket    (cmd_demux_src0_endofpacket),                                     //  output,    width = 1,           .endofpacket
		.src1_ready          (cmd_demux_src1_ready),                                           //   input,    width = 1,       src1.ready
		.src1_valid          (cmd_demux_src1_valid),                                           //  output,    width = 1,           .valid
		.src1_data           (cmd_demux_src1_data),                                            //  output,  width = 117,           .data
		.src1_channel        (cmd_demux_src1_channel),                                         //  output,   width = 12,           .channel
		.src1_startofpacket  (cmd_demux_src1_startofpacket),                                   //  output,    width = 1,           .startofpacket
		.src1_endofpacket    (cmd_demux_src1_endofpacket),                                     //  output,    width = 1,           .endofpacket
		.src2_ready          (cmd_demux_src2_ready),                                           //   input,    width = 1,       src2.ready
		.src2_valid          (cmd_demux_src2_valid),                                           //  output,    width = 1,           .valid
		.src2_data           (cmd_demux_src2_data),                                            //  output,  width = 117,           .data
		.src2_channel        (cmd_demux_src2_channel),                                         //  output,   width = 12,           .channel
		.src2_startofpacket  (cmd_demux_src2_startofpacket),                                   //  output,    width = 1,           .startofpacket
		.src2_endofpacket    (cmd_demux_src2_endofpacket),                                     //  output,    width = 1,           .endofpacket
		.src3_ready          (cmd_demux_src3_ready),                                           //   input,    width = 1,       src3.ready
		.src3_valid          (cmd_demux_src3_valid),                                           //  output,    width = 1,           .valid
		.src3_data           (cmd_demux_src3_data),                                            //  output,  width = 117,           .data
		.src3_channel        (cmd_demux_src3_channel),                                         //  output,   width = 12,           .channel
		.src3_startofpacket  (cmd_demux_src3_startofpacket),                                   //  output,    width = 1,           .startofpacket
		.src3_endofpacket    (cmd_demux_src3_endofpacket),                                     //  output,    width = 1,           .endofpacket
		.src4_ready          (cmd_demux_src4_ready),                                           //   input,    width = 1,       src4.ready
		.src4_valid          (cmd_demux_src4_valid),                                           //  output,    width = 1,           .valid
		.src4_data           (cmd_demux_src4_data),                                            //  output,  width = 117,           .data
		.src4_channel        (cmd_demux_src4_channel),                                         //  output,   width = 12,           .channel
		.src4_startofpacket  (cmd_demux_src4_startofpacket),                                   //  output,    width = 1,           .startofpacket
		.src4_endofpacket    (cmd_demux_src4_endofpacket),                                     //  output,    width = 1,           .endofpacket
		.src5_ready          (cmd_demux_src5_ready),                                           //   input,    width = 1,       src5.ready
		.src5_valid          (cmd_demux_src5_valid),                                           //  output,    width = 1,           .valid
		.src5_data           (cmd_demux_src5_data),                                            //  output,  width = 117,           .data
		.src5_channel        (cmd_demux_src5_channel),                                         //  output,   width = 12,           .channel
		.src5_startofpacket  (cmd_demux_src5_startofpacket),                                   //  output,    width = 1,           .startofpacket
		.src5_endofpacket    (cmd_demux_src5_endofpacket),                                     //  output,    width = 1,           .endofpacket
		.src6_ready          (cmd_demux_src6_ready),                                           //   input,    width = 1,       src6.ready
		.src6_valid          (cmd_demux_src6_valid),                                           //  output,    width = 1,           .valid
		.src6_data           (cmd_demux_src6_data),                                            //  output,  width = 117,           .data
		.src6_channel        (cmd_demux_src6_channel),                                         //  output,   width = 12,           .channel
		.src6_startofpacket  (cmd_demux_src6_startofpacket),                                   //  output,    width = 1,           .startofpacket
		.src6_endofpacket    (cmd_demux_src6_endofpacket),                                     //  output,    width = 1,           .endofpacket
		.src7_ready          (cmd_demux_src7_ready),                                           //   input,    width = 1,       src7.ready
		.src7_valid          (cmd_demux_src7_valid),                                           //  output,    width = 1,           .valid
		.src7_data           (cmd_demux_src7_data),                                            //  output,  width = 117,           .data
		.src7_channel        (cmd_demux_src7_channel),                                         //  output,   width = 12,           .channel
		.src7_startofpacket  (cmd_demux_src7_startofpacket),                                   //  output,    width = 1,           .startofpacket
		.src7_endofpacket    (cmd_demux_src7_endofpacket),                                     //  output,    width = 1,           .endofpacket
		.src8_ready          (cmd_demux_src8_ready),                                           //   input,    width = 1,       src8.ready
		.src8_valid          (cmd_demux_src8_valid),                                           //  output,    width = 1,           .valid
		.src8_data           (cmd_demux_src8_data),                                            //  output,  width = 117,           .data
		.src8_channel        (cmd_demux_src8_channel),                                         //  output,   width = 12,           .channel
		.src8_startofpacket  (cmd_demux_src8_startofpacket),                                   //  output,    width = 1,           .startofpacket
		.src8_endofpacket    (cmd_demux_src8_endofpacket),                                     //  output,    width = 1,           .endofpacket
		.src9_ready          (cmd_demux_src9_ready),                                           //   input,    width = 1,       src9.ready
		.src9_valid          (cmd_demux_src9_valid),                                           //  output,    width = 1,           .valid
		.src9_data           (cmd_demux_src9_data),                                            //  output,  width = 117,           .data
		.src9_channel        (cmd_demux_src9_channel),                                         //  output,   width = 12,           .channel
		.src9_startofpacket  (cmd_demux_src9_startofpacket),                                   //  output,    width = 1,           .startofpacket
		.src9_endofpacket    (cmd_demux_src9_endofpacket),                                     //  output,    width = 1,           .endofpacket
		.src10_ready         (cmd_demux_src10_ready),                                          //   input,    width = 1,      src10.ready
		.src10_valid         (cmd_demux_src10_valid),                                          //  output,    width = 1,           .valid
		.src10_data          (cmd_demux_src10_data),                                           //  output,  width = 117,           .data
		.src10_channel       (cmd_demux_src10_channel),                                        //  output,   width = 12,           .channel
		.src10_startofpacket (cmd_demux_src10_startofpacket),                                  //  output,    width = 1,           .startofpacket
		.src10_endofpacket   (cmd_demux_src10_endofpacket),                                    //  output,    width = 1,           .endofpacket
		.src11_ready         (cmd_demux_src11_ready),                                          //   input,    width = 1,      src11.ready
		.src11_valid         (cmd_demux_src11_valid),                                          //  output,    width = 1,           .valid
		.src11_data          (cmd_demux_src11_data),                                           //  output,  width = 117,           .data
		.src11_channel       (cmd_demux_src11_channel),                                        //  output,   width = 12,           .channel
		.src11_startofpacket (cmd_demux_src11_startofpacket),                                  //  output,    width = 1,           .startofpacket
		.src11_endofpacket   (cmd_demux_src11_endofpacket)                                     //  output,    width = 1,           .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_multiplexer_191_fc2mo2q cmd_mux (
		.clk                 (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset               (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_src_ready),                        //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_src_valid),                        //  output,    width = 1,          .valid
		.src_data            (cmd_mux_src_data),                         //  output,  width = 117,          .data
		.src_channel         (cmd_mux_src_channel),                      //  output,   width = 12,          .channel
		.src_startofpacket   (cmd_mux_src_startofpacket),                //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_src_endofpacket),                  //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src0_ready),                     //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src0_valid),                     //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src0_channel),                   //   input,   width = 12,          .channel
		.sink0_data          (cmd_demux_src0_data),                      //   input,  width = 117,          .data
		.sink0_startofpacket (cmd_demux_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src0_endofpacket)                //   input,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_multiplexer_191_fc2mo2q cmd_mux_001 (
		.clk                 (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset               (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_001_src_ready),                    //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_001_src_valid),                    //  output,    width = 1,          .valid
		.src_data            (cmd_mux_001_src_data),                     //  output,  width = 117,          .data
		.src_channel         (cmd_mux_001_src_channel),                  //  output,   width = 12,          .channel
		.src_startofpacket   (cmd_mux_001_src_startofpacket),            //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_001_src_endofpacket),              //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src1_ready),                     //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src1_valid),                     //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src1_channel),                   //   input,   width = 12,          .channel
		.sink0_data          (cmd_demux_src1_data),                      //   input,  width = 117,          .data
		.sink0_startofpacket (cmd_demux_src1_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src1_endofpacket)                //   input,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_multiplexer_191_fc2mo2q cmd_mux_002 (
		.clk                 (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset               (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_002_src_ready),                    //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_002_src_valid),                    //  output,    width = 1,          .valid
		.src_data            (cmd_mux_002_src_data),                     //  output,  width = 117,          .data
		.src_channel         (cmd_mux_002_src_channel),                  //  output,   width = 12,          .channel
		.src_startofpacket   (cmd_mux_002_src_startofpacket),            //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_002_src_endofpacket),              //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src2_ready),                     //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src2_valid),                     //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src2_channel),                   //   input,   width = 12,          .channel
		.sink0_data          (cmd_demux_src2_data),                      //   input,  width = 117,          .data
		.sink0_startofpacket (cmd_demux_src2_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src2_endofpacket)                //   input,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_multiplexer_191_fc2mo2q cmd_mux_003 (
		.clk                 (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset               (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_003_src_ready),                    //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_003_src_valid),                    //  output,    width = 1,          .valid
		.src_data            (cmd_mux_003_src_data),                     //  output,  width = 117,          .data
		.src_channel         (cmd_mux_003_src_channel),                  //  output,   width = 12,          .channel
		.src_startofpacket   (cmd_mux_003_src_startofpacket),            //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_003_src_endofpacket),              //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src3_ready),                     //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src3_valid),                     //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src3_channel),                   //   input,   width = 12,          .channel
		.sink0_data          (cmd_demux_src3_data),                      //   input,  width = 117,          .data
		.sink0_startofpacket (cmd_demux_src3_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src3_endofpacket)                //   input,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_multiplexer_191_fc2mo2q cmd_mux_004 (
		.clk                 (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset               (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_004_src_ready),                    //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_004_src_valid),                    //  output,    width = 1,          .valid
		.src_data            (cmd_mux_004_src_data),                     //  output,  width = 117,          .data
		.src_channel         (cmd_mux_004_src_channel),                  //  output,   width = 12,          .channel
		.src_startofpacket   (cmd_mux_004_src_startofpacket),            //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_004_src_endofpacket),              //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src4_ready),                     //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src4_valid),                     //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src4_channel),                   //   input,   width = 12,          .channel
		.sink0_data          (cmd_demux_src4_data),                      //   input,  width = 117,          .data
		.sink0_startofpacket (cmd_demux_src4_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src4_endofpacket)                //   input,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_multiplexer_191_fc2mo2q cmd_mux_005 (
		.clk                 (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset               (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_005_src_ready),                    //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_005_src_valid),                    //  output,    width = 1,          .valid
		.src_data            (cmd_mux_005_src_data),                     //  output,  width = 117,          .data
		.src_channel         (cmd_mux_005_src_channel),                  //  output,   width = 12,          .channel
		.src_startofpacket   (cmd_mux_005_src_startofpacket),            //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_005_src_endofpacket),              //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src5_ready),                     //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src5_valid),                     //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src5_channel),                   //   input,   width = 12,          .channel
		.sink0_data          (cmd_demux_src5_data),                      //   input,  width = 117,          .data
		.sink0_startofpacket (cmd_demux_src5_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src5_endofpacket)                //   input,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_multiplexer_191_fc2mo2q cmd_mux_006 (
		.clk                 (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset               (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_006_src_ready),                    //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_006_src_valid),                    //  output,    width = 1,          .valid
		.src_data            (cmd_mux_006_src_data),                     //  output,  width = 117,          .data
		.src_channel         (cmd_mux_006_src_channel),                  //  output,   width = 12,          .channel
		.src_startofpacket   (cmd_mux_006_src_startofpacket),            //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_006_src_endofpacket),              //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src6_ready),                     //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src6_valid),                     //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src6_channel),                   //   input,   width = 12,          .channel
		.sink0_data          (cmd_demux_src6_data),                      //   input,  width = 117,          .data
		.sink0_startofpacket (cmd_demux_src6_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src6_endofpacket)                //   input,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_multiplexer_191_fc2mo2q cmd_mux_007 (
		.clk                 (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset               (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_007_src_ready),                    //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_007_src_valid),                    //  output,    width = 1,          .valid
		.src_data            (cmd_mux_007_src_data),                     //  output,  width = 117,          .data
		.src_channel         (cmd_mux_007_src_channel),                  //  output,   width = 12,          .channel
		.src_startofpacket   (cmd_mux_007_src_startofpacket),            //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_007_src_endofpacket),              //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src7_ready),                     //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src7_valid),                     //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src7_channel),                   //   input,   width = 12,          .channel
		.sink0_data          (cmd_demux_src7_data),                      //   input,  width = 117,          .data
		.sink0_startofpacket (cmd_demux_src7_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src7_endofpacket)                //   input,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_multiplexer_191_fc2mo2q cmd_mux_008 (
		.clk                 (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset               (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_008_src_ready),                    //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_008_src_valid),                    //  output,    width = 1,          .valid
		.src_data            (cmd_mux_008_src_data),                     //  output,  width = 117,          .data
		.src_channel         (cmd_mux_008_src_channel),                  //  output,   width = 12,          .channel
		.src_startofpacket   (cmd_mux_008_src_startofpacket),            //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_008_src_endofpacket),              //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src8_ready),                     //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src8_valid),                     //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src8_channel),                   //   input,   width = 12,          .channel
		.sink0_data          (cmd_demux_src8_data),                      //   input,  width = 117,          .data
		.sink0_startofpacket (cmd_demux_src8_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src8_endofpacket)                //   input,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_multiplexer_191_fc2mo2q cmd_mux_009 (
		.clk                 (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset               (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_009_src_ready),                    //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_009_src_valid),                    //  output,    width = 1,          .valid
		.src_data            (cmd_mux_009_src_data),                     //  output,  width = 117,          .data
		.src_channel         (cmd_mux_009_src_channel),                  //  output,   width = 12,          .channel
		.src_startofpacket   (cmd_mux_009_src_startofpacket),            //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_009_src_endofpacket),              //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src9_ready),                     //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src9_valid),                     //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src9_channel),                   //   input,   width = 12,          .channel
		.sink0_data          (cmd_demux_src9_data),                      //   input,  width = 117,          .data
		.sink0_startofpacket (cmd_demux_src9_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src9_endofpacket)                //   input,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_multiplexer_191_fc2mo2q cmd_mux_010 (
		.clk                 (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset               (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_010_src_ready),                    //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_010_src_valid),                    //  output,    width = 1,          .valid
		.src_data            (cmd_mux_010_src_data),                     //  output,  width = 117,          .data
		.src_channel         (cmd_mux_010_src_channel),                  //  output,   width = 12,          .channel
		.src_startofpacket   (cmd_mux_010_src_startofpacket),            //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_010_src_endofpacket),              //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src10_ready),                    //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src10_valid),                    //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src10_channel),                  //   input,   width = 12,          .channel
		.sink0_data          (cmd_demux_src10_data),                     //   input,  width = 117,          .data
		.sink0_startofpacket (cmd_demux_src10_startofpacket),            //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src10_endofpacket)               //   input,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_multiplexer_191_fc2mo2q cmd_mux_011 (
		.clk                 (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset               (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_011_src_ready),                    //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_011_src_valid),                    //  output,    width = 1,          .valid
		.src_data            (cmd_mux_011_src_data),                     //  output,  width = 117,          .data
		.src_channel         (cmd_mux_011_src_channel),                  //  output,   width = 12,          .channel
		.src_startofpacket   (cmd_mux_011_src_startofpacket),            //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_011_src_endofpacket),              //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src11_ready),                    //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src11_valid),                    //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src11_channel),                  //   input,   width = 12,          .channel
		.sink0_data          (cmd_demux_src11_data),                     //   input,  width = 117,          .data
		.sink0_startofpacket (cmd_demux_src11_startofpacket),            //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src11_endofpacket)               //   input,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_demultiplexer_191_dhpl4fi rsp_demux (
		.clk                (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_001_src_ready),                     //  output,    width = 1,      sink.ready
		.sink_channel       (router_001_src_channel),                   //   input,   width = 12,          .channel
		.sink_data          (router_001_src_data),                      //   input,  width = 117,          .data
		.sink_startofpacket (router_001_src_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_001_src_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink_valid         (router_001_src_valid),                     //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_src0_ready),                     //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_src0_valid),                     //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_src0_data),                      //  output,  width = 117,          .data
		.src0_channel       (rsp_demux_src0_channel),                   //  output,   width = 12,          .channel
		.src0_startofpacket (rsp_demux_src0_startofpacket),             //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_src0_endofpacket)                //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_demultiplexer_191_dhpl4fi rsp_demux_001 (
		.clk                (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_002_src_ready),                     //  output,    width = 1,      sink.ready
		.sink_channel       (router_002_src_channel),                   //   input,   width = 12,          .channel
		.sink_data          (router_002_src_data),                      //   input,  width = 117,          .data
		.sink_startofpacket (router_002_src_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_002_src_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink_valid         (router_002_src_valid),                     //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_001_src0_ready),                 //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_001_src0_valid),                 //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_001_src0_data),                  //  output,  width = 117,          .data
		.src0_channel       (rsp_demux_001_src0_channel),               //  output,   width = 12,          .channel
		.src0_startofpacket (rsp_demux_001_src0_startofpacket),         //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_001_src0_endofpacket)            //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_demultiplexer_191_dhpl4fi rsp_demux_002 (
		.clk                (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_003_src_ready),                     //  output,    width = 1,      sink.ready
		.sink_channel       (router_003_src_channel),                   //   input,   width = 12,          .channel
		.sink_data          (router_003_src_data),                      //   input,  width = 117,          .data
		.sink_startofpacket (router_003_src_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_003_src_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink_valid         (router_003_src_valid),                     //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_002_src0_ready),                 //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_002_src0_valid),                 //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_002_src0_data),                  //  output,  width = 117,          .data
		.src0_channel       (rsp_demux_002_src0_channel),               //  output,   width = 12,          .channel
		.src0_startofpacket (rsp_demux_002_src0_startofpacket),         //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_002_src0_endofpacket)            //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_demultiplexer_191_dhpl4fi rsp_demux_003 (
		.clk                (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_004_src_ready),                     //  output,    width = 1,      sink.ready
		.sink_channel       (router_004_src_channel),                   //   input,   width = 12,          .channel
		.sink_data          (router_004_src_data),                      //   input,  width = 117,          .data
		.sink_startofpacket (router_004_src_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_004_src_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink_valid         (router_004_src_valid),                     //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_003_src0_ready),                 //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_003_src0_valid),                 //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_003_src0_data),                  //  output,  width = 117,          .data
		.src0_channel       (rsp_demux_003_src0_channel),               //  output,   width = 12,          .channel
		.src0_startofpacket (rsp_demux_003_src0_startofpacket),         //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_003_src0_endofpacket)            //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_demultiplexer_191_dhpl4fi rsp_demux_004 (
		.clk                (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_005_src_ready),                     //  output,    width = 1,      sink.ready
		.sink_channel       (router_005_src_channel),                   //   input,   width = 12,          .channel
		.sink_data          (router_005_src_data),                      //   input,  width = 117,          .data
		.sink_startofpacket (router_005_src_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_005_src_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink_valid         (router_005_src_valid),                     //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_004_src0_ready),                 //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_004_src0_valid),                 //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_004_src0_data),                  //  output,  width = 117,          .data
		.src0_channel       (rsp_demux_004_src0_channel),               //  output,   width = 12,          .channel
		.src0_startofpacket (rsp_demux_004_src0_startofpacket),         //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_004_src0_endofpacket)            //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_demultiplexer_191_dhpl4fi rsp_demux_005 (
		.clk                (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_006_src_ready),                     //  output,    width = 1,      sink.ready
		.sink_channel       (router_006_src_channel),                   //   input,   width = 12,          .channel
		.sink_data          (router_006_src_data),                      //   input,  width = 117,          .data
		.sink_startofpacket (router_006_src_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_006_src_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink_valid         (router_006_src_valid),                     //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_005_src0_ready),                 //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_005_src0_valid),                 //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_005_src0_data),                  //  output,  width = 117,          .data
		.src0_channel       (rsp_demux_005_src0_channel),               //  output,   width = 12,          .channel
		.src0_startofpacket (rsp_demux_005_src0_startofpacket),         //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_005_src0_endofpacket)            //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_demultiplexer_191_dhpl4fi rsp_demux_006 (
		.clk                (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_007_src_ready),                     //  output,    width = 1,      sink.ready
		.sink_channel       (router_007_src_channel),                   //   input,   width = 12,          .channel
		.sink_data          (router_007_src_data),                      //   input,  width = 117,          .data
		.sink_startofpacket (router_007_src_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_007_src_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink_valid         (router_007_src_valid),                     //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_006_src0_ready),                 //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_006_src0_valid),                 //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_006_src0_data),                  //  output,  width = 117,          .data
		.src0_channel       (rsp_demux_006_src0_channel),               //  output,   width = 12,          .channel
		.src0_startofpacket (rsp_demux_006_src0_startofpacket),         //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_006_src0_endofpacket)            //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_demultiplexer_191_dhpl4fi rsp_demux_007 (
		.clk                (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_008_src_ready),                     //  output,    width = 1,      sink.ready
		.sink_channel       (router_008_src_channel),                   //   input,   width = 12,          .channel
		.sink_data          (router_008_src_data),                      //   input,  width = 117,          .data
		.sink_startofpacket (router_008_src_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_008_src_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink_valid         (router_008_src_valid),                     //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_007_src0_ready),                 //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_007_src0_valid),                 //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_007_src0_data),                  //  output,  width = 117,          .data
		.src0_channel       (rsp_demux_007_src0_channel),               //  output,   width = 12,          .channel
		.src0_startofpacket (rsp_demux_007_src0_startofpacket),         //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_007_src0_endofpacket)            //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_demultiplexer_191_dhpl4fi rsp_demux_008 (
		.clk                (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_009_src_ready),                     //  output,    width = 1,      sink.ready
		.sink_channel       (router_009_src_channel),                   //   input,   width = 12,          .channel
		.sink_data          (router_009_src_data),                      //   input,  width = 117,          .data
		.sink_startofpacket (router_009_src_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_009_src_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink_valid         (router_009_src_valid),                     //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_008_src0_ready),                 //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_008_src0_valid),                 //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_008_src0_data),                  //  output,  width = 117,          .data
		.src0_channel       (rsp_demux_008_src0_channel),               //  output,   width = 12,          .channel
		.src0_startofpacket (rsp_demux_008_src0_startofpacket),         //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_008_src0_endofpacket)            //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_demultiplexer_191_dhpl4fi rsp_demux_009 (
		.clk                (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_010_src_ready),                     //  output,    width = 1,      sink.ready
		.sink_channel       (router_010_src_channel),                   //   input,   width = 12,          .channel
		.sink_data          (router_010_src_data),                      //   input,  width = 117,          .data
		.sink_startofpacket (router_010_src_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_010_src_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink_valid         (router_010_src_valid),                     //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_009_src0_ready),                 //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_009_src0_valid),                 //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_009_src0_data),                  //  output,  width = 117,          .data
		.src0_channel       (rsp_demux_009_src0_channel),               //  output,   width = 12,          .channel
		.src0_startofpacket (rsp_demux_009_src0_startofpacket),         //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_009_src0_endofpacket)            //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_demultiplexer_191_dhpl4fi rsp_demux_010 (
		.clk                (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_011_src_ready),                     //  output,    width = 1,      sink.ready
		.sink_channel       (router_011_src_channel),                   //   input,   width = 12,          .channel
		.sink_data          (router_011_src_data),                      //   input,  width = 117,          .data
		.sink_startofpacket (router_011_src_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_011_src_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink_valid         (router_011_src_valid),                     //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_010_src0_ready),                 //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_010_src0_valid),                 //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_010_src0_data),                  //  output,  width = 117,          .data
		.src0_channel       (rsp_demux_010_src0_channel),               //  output,   width = 12,          .channel
		.src0_startofpacket (rsp_demux_010_src0_startofpacket),         //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_010_src0_endofpacket)            //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_demultiplexer_191_dhpl4fi rsp_demux_011 (
		.clk                (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset              (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_012_src_ready),                     //  output,    width = 1,      sink.ready
		.sink_channel       (router_012_src_channel),                   //   input,   width = 12,          .channel
		.sink_data          (router_012_src_data),                      //   input,  width = 117,          .data
		.sink_startofpacket (router_012_src_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_012_src_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink_valid         (router_012_src_valid),                     //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_011_src0_ready),                 //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_011_src0_valid),                 //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_011_src0_data),                  //  output,  width = 117,          .data
		.src0_channel       (rsp_demux_011_src0_channel),               //  output,   width = 12,          .channel
		.src0_startofpacket (rsp_demux_011_src0_startofpacket),         //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_011_src0_endofpacket)            //  output,    width = 1,          .endofpacket
	);

	address_decoder_multi_channel_altera_merlin_multiplexer_191_qznn4dq rsp_mux (
		.clk                  (csr_clk_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset                (master_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready            (rsp_mux_src_ready),                        //   input,    width = 1,       src.ready
		.src_valid            (rsp_mux_src_valid),                        //  output,    width = 1,          .valid
		.src_data             (rsp_mux_src_data),                         //  output,  width = 117,          .data
		.src_channel          (rsp_mux_src_channel),                      //  output,   width = 12,          .channel
		.src_startofpacket    (rsp_mux_src_startofpacket),                //  output,    width = 1,          .startofpacket
		.src_endofpacket      (rsp_mux_src_endofpacket),                  //  output,    width = 1,          .endofpacket
		.sink0_ready          (rsp_demux_src0_ready),                     //  output,    width = 1,     sink0.ready
		.sink0_valid          (rsp_demux_src0_valid),                     //   input,    width = 1,          .valid
		.sink0_channel        (rsp_demux_src0_channel),                   //   input,   width = 12,          .channel
		.sink0_data           (rsp_demux_src0_data),                      //   input,  width = 117,          .data
		.sink0_startofpacket  (rsp_demux_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink0_endofpacket    (rsp_demux_src0_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink1_ready          (rsp_demux_001_src0_ready),                 //  output,    width = 1,     sink1.ready
		.sink1_valid          (rsp_demux_001_src0_valid),                 //   input,    width = 1,          .valid
		.sink1_channel        (rsp_demux_001_src0_channel),               //   input,   width = 12,          .channel
		.sink1_data           (rsp_demux_001_src0_data),                  //   input,  width = 117,          .data
		.sink1_startofpacket  (rsp_demux_001_src0_startofpacket),         //   input,    width = 1,          .startofpacket
		.sink1_endofpacket    (rsp_demux_001_src0_endofpacket),           //   input,    width = 1,          .endofpacket
		.sink2_ready          (rsp_demux_002_src0_ready),                 //  output,    width = 1,     sink2.ready
		.sink2_valid          (rsp_demux_002_src0_valid),                 //   input,    width = 1,          .valid
		.sink2_channel        (rsp_demux_002_src0_channel),               //   input,   width = 12,          .channel
		.sink2_data           (rsp_demux_002_src0_data),                  //   input,  width = 117,          .data
		.sink2_startofpacket  (rsp_demux_002_src0_startofpacket),         //   input,    width = 1,          .startofpacket
		.sink2_endofpacket    (rsp_demux_002_src0_endofpacket),           //   input,    width = 1,          .endofpacket
		.sink3_ready          (rsp_demux_003_src0_ready),                 //  output,    width = 1,     sink3.ready
		.sink3_valid          (rsp_demux_003_src0_valid),                 //   input,    width = 1,          .valid
		.sink3_channel        (rsp_demux_003_src0_channel),               //   input,   width = 12,          .channel
		.sink3_data           (rsp_demux_003_src0_data),                  //   input,  width = 117,          .data
		.sink3_startofpacket  (rsp_demux_003_src0_startofpacket),         //   input,    width = 1,          .startofpacket
		.sink3_endofpacket    (rsp_demux_003_src0_endofpacket),           //   input,    width = 1,          .endofpacket
		.sink4_ready          (rsp_demux_004_src0_ready),                 //  output,    width = 1,     sink4.ready
		.sink4_valid          (rsp_demux_004_src0_valid),                 //   input,    width = 1,          .valid
		.sink4_channel        (rsp_demux_004_src0_channel),               //   input,   width = 12,          .channel
		.sink4_data           (rsp_demux_004_src0_data),                  //   input,  width = 117,          .data
		.sink4_startofpacket  (rsp_demux_004_src0_startofpacket),         //   input,    width = 1,          .startofpacket
		.sink4_endofpacket    (rsp_demux_004_src0_endofpacket),           //   input,    width = 1,          .endofpacket
		.sink5_ready          (rsp_demux_005_src0_ready),                 //  output,    width = 1,     sink5.ready
		.sink5_valid          (rsp_demux_005_src0_valid),                 //   input,    width = 1,          .valid
		.sink5_channel        (rsp_demux_005_src0_channel),               //   input,   width = 12,          .channel
		.sink5_data           (rsp_demux_005_src0_data),                  //   input,  width = 117,          .data
		.sink5_startofpacket  (rsp_demux_005_src0_startofpacket),         //   input,    width = 1,          .startofpacket
		.sink5_endofpacket    (rsp_demux_005_src0_endofpacket),           //   input,    width = 1,          .endofpacket
		.sink6_ready          (rsp_demux_006_src0_ready),                 //  output,    width = 1,     sink6.ready
		.sink6_valid          (rsp_demux_006_src0_valid),                 //   input,    width = 1,          .valid
		.sink6_channel        (rsp_demux_006_src0_channel),               //   input,   width = 12,          .channel
		.sink6_data           (rsp_demux_006_src0_data),                  //   input,  width = 117,          .data
		.sink6_startofpacket  (rsp_demux_006_src0_startofpacket),         //   input,    width = 1,          .startofpacket
		.sink6_endofpacket    (rsp_demux_006_src0_endofpacket),           //   input,    width = 1,          .endofpacket
		.sink7_ready          (rsp_demux_007_src0_ready),                 //  output,    width = 1,     sink7.ready
		.sink7_valid          (rsp_demux_007_src0_valid),                 //   input,    width = 1,          .valid
		.sink7_channel        (rsp_demux_007_src0_channel),               //   input,   width = 12,          .channel
		.sink7_data           (rsp_demux_007_src0_data),                  //   input,  width = 117,          .data
		.sink7_startofpacket  (rsp_demux_007_src0_startofpacket),         //   input,    width = 1,          .startofpacket
		.sink7_endofpacket    (rsp_demux_007_src0_endofpacket),           //   input,    width = 1,          .endofpacket
		.sink8_ready          (rsp_demux_008_src0_ready),                 //  output,    width = 1,     sink8.ready
		.sink8_valid          (rsp_demux_008_src0_valid),                 //   input,    width = 1,          .valid
		.sink8_channel        (rsp_demux_008_src0_channel),               //   input,   width = 12,          .channel
		.sink8_data           (rsp_demux_008_src0_data),                  //   input,  width = 117,          .data
		.sink8_startofpacket  (rsp_demux_008_src0_startofpacket),         //   input,    width = 1,          .startofpacket
		.sink8_endofpacket    (rsp_demux_008_src0_endofpacket),           //   input,    width = 1,          .endofpacket
		.sink9_ready          (rsp_demux_009_src0_ready),                 //  output,    width = 1,     sink9.ready
		.sink9_valid          (rsp_demux_009_src0_valid),                 //   input,    width = 1,          .valid
		.sink9_channel        (rsp_demux_009_src0_channel),               //   input,   width = 12,          .channel
		.sink9_data           (rsp_demux_009_src0_data),                  //   input,  width = 117,          .data
		.sink9_startofpacket  (rsp_demux_009_src0_startofpacket),         //   input,    width = 1,          .startofpacket
		.sink9_endofpacket    (rsp_demux_009_src0_endofpacket),           //   input,    width = 1,          .endofpacket
		.sink10_ready         (rsp_demux_010_src0_ready),                 //  output,    width = 1,    sink10.ready
		.sink10_valid         (rsp_demux_010_src0_valid),                 //   input,    width = 1,          .valid
		.sink10_channel       (rsp_demux_010_src0_channel),               //   input,   width = 12,          .channel
		.sink10_data          (rsp_demux_010_src0_data),                  //   input,  width = 117,          .data
		.sink10_startofpacket (rsp_demux_010_src0_startofpacket),         //   input,    width = 1,          .startofpacket
		.sink10_endofpacket   (rsp_demux_010_src0_endofpacket),           //   input,    width = 1,          .endofpacket
		.sink11_ready         (rsp_demux_011_src0_ready),                 //  output,    width = 1,    sink11.ready
		.sink11_valid         (rsp_demux_011_src0_valid),                 //   input,    width = 1,          .valid
		.sink11_channel       (rsp_demux_011_src0_channel),               //   input,   width = 12,          .channel
		.sink11_data          (rsp_demux_011_src0_data),                  //   input,  width = 117,          .data
		.sink11_startofpacket (rsp_demux_011_src0_startofpacket),         //   input,    width = 1,          .startofpacket
		.sink11_endofpacket   (rsp_demux_011_src0_endofpacket)            //   input,    width = 1,          .endofpacket
	);

endmodule
