`celldefine
`timescale 1ns/10ps
module aa21 (Q,A,B);
   output Q;
   input A,B;

   and (Q,A,B);

   specify

      specparam TDR_A_Q = 0.1;
      specparam TDF_A_Q = 0.1;
      specparam TDR_B_Q = 0.1;
      specparam TDF_B_Q = 0.1;

      //module path declarations

      (A => Q)=(TDR_A_Q,TDF_A_Q,TDR_A_Q,TDR_A_Q,TDF_A_Q,TDF_A_Q);
      (B => Q)=(TDR_B_Q,TDF_B_Q,TDR_B_Q,TDR_B_Q,TDF_B_Q,TDF_B_Q);

   endspecify
endmodule
`endcelldefine
`celldefine
`timescale 1ns/10ps
module aa22 (Q,A,B);
   output Q;
   input A,B;

   and (Q,A,B);

   specify
      specparam TDR_A_Q = 0.1;
      specparam TDF_A_Q = 0.1;
      specparam TDR_B_Q = 0.1;
      specparam TDF_B_Q = 0.1;

      //module path declarations

      (A => Q)=(TDR_A_Q,TDF_A_Q,TDR_A_Q,TDR_A_Q,TDF_A_Q,TDF_A_Q);
      (B => Q)=(TDR_B_Q,TDF_B_Q,TDR_B_Q,TDR_B_Q,TDF_B_Q,TDF_B_Q);

   endspecify
endmodule
`endcelldefine
`celldefine
`timescale 1ns/10ps
module aa31 (Q,A,B,C);
   output Q;
   input A,B,C;

   and (Q,A,B,C);

   specify
      specparam TDR_A_Q = 0.1;
      specparam TDF_A_Q = 0.1;
      specparam TDR_B_Q = 0.1;
      specparam TDF_B_Q = 0.1;
      specparam TDR_C_Q = 0.1;
      specparam TDF_C_Q = 0.1;
		    	       
      //module path declarations

      (A => Q)=(TDR_A_Q,TDF_A_Q,TDR_A_Q,TDR_A_Q,TDF_A_Q,TDF_A_Q);
      (B => Q)=(TDR_B_Q,TDF_B_Q,TDR_B_Q,TDR_B_Q,TDF_B_Q,TDF_B_Q);
      (C => Q)=(TDR_C_Q,TDF_C_Q,TDR_C_Q,TDR_C_Q,TDF_C_Q,TDF_C_Q);

   endspecify
endmodule