<?xml version="1.0" encoding="UTF-8"?>
<deploy
 date="2020.02.21.15:03:06"
 outputDirectory="K:/Work/SP100/PROG/FPGA/gflish2/gflish/">
 <perimeter>
  <parameter
     name="AUTO_GENERATION_ID"
     type="Integer"
     defaultValue="0"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_UNIQUE_ID"
     type="String"
     defaultValue=""
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_DEVICE_FAMILY"
     type="String"
     defaultValue="Arria 10"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_DEVICE"
     type="String"
     defaultValue="10AS048H4F34E3SG"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_DEVICE_SPEEDGRADE"
     type="String"
     defaultValue="3"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_CLK_CLOCK_RATE"
     type="Long"
     defaultValue="-1"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_CLK_CLOCK_DOMAIN"
     type="Integer"
     defaultValue="-1"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_CLK_RESET_DOMAIN"
     type="Integer"
     defaultValue="-1"
     onHdl="0"
     affectsHdl="1" />
  <interface name="clk" kind="clock" start="0">
   <property name="clockRate" value="0" />
   <property name="externallyDriven" value="false" />
   <property name="ptfSchematicName" value="" />
   <port name="clk_clk" direction="input" role="clk" width="1" />
  </interface>
  <interface name="reset" kind="reset" start="0">
   <property name="associatedClock" value="clk" />
   <property name="synchronousEdges" value="DEASSERT" />
   <port name="reset_reset" direction="input" role="reset" width="1" />
  </interface>
 </perimeter>
 <entity kind="gflish" version="1.0" name="gflish">
  <parameter name="AUTO_CLK_CLOCK_RATE" value="-1" />
  <parameter name="AUTO_GENERATION_ID" value="0" />
  <parameter name="AUTO_DEVICE" value="10AS048H4F34E3SG" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
  <parameter name="AUTO_CLK_RESET_DOMAIN" value="-1" />
  <parameter name="AUTO_CLK_CLOCK_DOMAIN" value="-1" />
  <parameter name="AUTO_UNIQUE_ID" value="" />
  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="3" />
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\synth\gflish.v"
       attributes="CONTAINS_INLINE_CONFIGURATION" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\synth\gflish.v"
       attributes="CONTAINS_INLINE_CONFIGURATION" />
  </childGeneratedFiles>
  <sourceFiles>
   <file path="K:/Work/SP100/PROG/FPGA/gflish2/gflish.qsys" />
  </sourceFiles>
  <childSourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_master_agent/altera_merlin_master_agent_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo.v" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_traffic_limiter/altera_merlin_traffic_limiter_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_irq_mapper/altera_irq_mapper_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_reset_controller/altera_reset_controller_hw.tcl" />
  </childSourceFiles>
  <messages>
   <message level="Info" culprit="gflish">"Generating: gflish"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_intel_generic_serial_flash_interface_top_0"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_jtag_uart_0"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_onchip_memory2_0"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_nios2_gen2_0"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_reset_in"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_clock_in"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_mm_interconnect_180_sbymbyi"</message>
   <message level="Info" culprit="gflish">"Generating: altera_merlin_master_translator"</message>
   <message level="Info" culprit="gflish">"Generating: altera_merlin_slave_translator"</message>
   <message level="Info" culprit="gflish">"Generating: altera_merlin_master_agent"</message>
   <message level="Info" culprit="gflish">"Generating: altera_merlin_slave_agent"</message>
   <message level="Info" culprit="gflish">"Generating: altera_avalon_sc_fifo"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_router_180_bjaw4fa"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_router_180_is6rdqq"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_router_180_ybibjaq"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_router_180_gsrlchi"</message>
   <message level="Info" culprit="gflish">"Generating: altera_merlin_traffic_limiter"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_demultiplexer_180_p2labsi"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_demultiplexer_180_aatoqcy"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_multiplexer_180_as5qbey"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_multiplexer_180_3szy6ni"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_demultiplexer_180_gshcsda"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_demultiplexer_180_w6uc27i"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_multiplexer_180_4rddq6i"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_multiplexer_180_3hdgx4a"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_irq_mapper_180_grgmmai"</message>
   <message level="Info" culprit="gflish">"Generating: altera_reset_controller"</message>
  </messages>
 </entity>
 <entity
   kind="altera_generic_component"
   version="1.0"
   name="gflish_intel_generic_serial_flash_interface_top_0">
  <parameter name="hlsFile" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="AUTO_DEVICE" value="10AS048H4F34E3SG" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
  <parameter name="DEVICE_FAMILY" value="Arria 10" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;avl_csr&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;avl_csr_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;6&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;avl_csr_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;avl_csr_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;avl_csr_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;avl_csr_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;avl_csr_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;avl_csr_readdatavalid&lt;/name&gt;
                        &lt;role&gt;readdatavalid&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressAlignment&lt;/key&gt;
                            &lt;value&gt;DYNAMIC&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressSpan&lt;/key&gt;
                            &lt;value&gt;256&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToMaster&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isFlash&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;printableDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitStates&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;transparentBridge&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;avl_mem&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;avl_mem_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;avl_mem_burstcount&lt;/name&gt;
                        &lt;role&gt;burstcount&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;7&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;avl_mem_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;avl_mem_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;avl_mem_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;23&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;avl_mem_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;avl_mem_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;avl_mem_readdatavalid&lt;/name&gt;
                        &lt;role&gt;readdatavalid&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;avl_mem_byteenable&lt;/name&gt;
                        &lt;role&gt;byteenable&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;4&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressAlignment&lt;/key&gt;
                            &lt;value&gt;DYNAMIC&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressSpan&lt;/key&gt;
                            &lt;value&gt;33554432&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToMaster&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;true&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isFlash&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;true&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;printableDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;transparentBridge&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;clk_clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset_reset&lt;/name&gt;
                        &lt;role&gt;reset&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;NONE&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;intel_generic_serial_flash_interface_top&lt;/className&gt;
        &lt;version&gt;18.0&lt;/version&gt;
        &lt;displayName&gt;Generic Serial Flash Interface Intel FPGA IP&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;AUTO_DEVICE&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfotype&gt;DEVICE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;AUTO_DEVICE_SPEEDGRADE&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfotype&gt;DEVICE_SPEEDGRADE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;DEVICE_FAMILY&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfotype&gt;DEVICE_FAMILY&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;INTENDED_DEVICE_FAMILY&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfotype&gt;DEVICE_FAMILY&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;avl_csr&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;avl_csr&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_MAP&lt;/key&gt;
                            &lt;value&gt;&amp;lt;address-map&amp;gt;&amp;lt;slave name=&apos;avl_csr&apos; start=&apos;0x0&apos; end=&apos;0x100&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;/address-map&amp;gt;&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;MAX_SLAVE_DATA_WIDTH&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;avl_mem&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;avl_mem&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_MAP&lt;/key&gt;
                            &lt;value&gt;&amp;lt;address-map&amp;gt;&amp;lt;slave name=&apos;avl_mem&apos; start=&apos;0x0&apos; end=&apos;0x2000000&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;/address-map&amp;gt;&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                            &lt;value&gt;25&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;MAX_SLAVE_DATA_WIDTH&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="3" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;gflish_intel_generic_serial_flash_interface_top_0&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;gflish_intel_generic_serial_flash_interface_top_0&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;gflish_intel_generic_serial_flash_interface_top_0&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;gflish_intel_generic_serial_flash_interface_top_0&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;gflish_intel_generic_serial_flash_interface_top_0&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;gflish_intel_generic_serial_flash_interface_top_0&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;gflish_intel_generic_serial_flash_interface_top_0&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter
     name="logicalView"
     value="ip/gflish/gflish_intel_generic_serial_flash_interface_top_0.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap/&gt;
&lt;/assignmentDefinition&gt;" />
  <parameter name="INTENDED_DEVICE_FAMILY" value="Arria 10" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="gflish" as="gfilsh" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: gflish_intel_generic_serial_flash_interface_top_0"</message>
  </messages>
 </entity>
 <entity
   kind="altera_generic_component"
   version="1.0"
   name="gflish_jtag_uart_0">
  <parameter name="hlsFile" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="clkFreq" value="100000000" />
  <parameter name="AUTO_DEVICE" value="10AS048H4F34E3SG" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;avalon_jtag_slave&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_chipselect&lt;/name&gt;
                        &lt;role&gt;chipselect&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_read_n&lt;/name&gt;
                        &lt;role&gt;read_n&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_write_n&lt;/name&gt;
                        &lt;role&gt;write_n&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressAlignment&lt;/key&gt;
                            &lt;value&gt;NATIVE&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressSpan&lt;/key&gt;
                            &lt;value&gt;2&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToMaster&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isFlash&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;printableDevice&lt;/key&gt;
                            &lt;value&gt;true&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitStates&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;transparentBridge&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
                &lt;cmsisInfo&gt;
                    &lt;cmsisSrcFileContents&gt;&amp;lt;?xml version=&quot;1.0&quot; encoding=&quot;utf-8&quot;?&amp;gt;    
&amp;lt;device schemaVersion=&quot;1.1&quot; xmlns:xs=&quot;http://www.w3.org/2001/XMLSchema-instance&quot; xs:noNamespaceSchemaLocation=&quot;CMSIS-SVD_Schema_1_1.xsd&quot; &amp;gt;
  &amp;lt;peripherals&amp;gt;
   &amp;lt;peripheral&amp;gt;
      &amp;lt;name&amp;gt;altera_avalon_jtag_uart&amp;lt;/name&amp;gt;&amp;lt;baseAddress&amp;gt;0x00000000&amp;lt;/baseAddress&amp;gt; 
      &amp;lt;addressBlock&amp;gt;
        &amp;lt;offset&amp;gt;0x0&amp;lt;/offset&amp;gt;
        &amp;lt;size&amp;gt;8&amp;lt;/size&amp;gt;
        &amp;lt;usage&amp;gt;registers&amp;lt;/usage&amp;gt;
      &amp;lt;/addressBlock&amp;gt;
      &amp;lt;registers&amp;gt;
        &amp;lt;register&amp;gt;     
         &amp;lt;name&amp;gt;DATA&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;Data&amp;lt;/displayName&amp;gt;
         &amp;lt;description&amp;gt;Embedded software accesses the read and write FIFOs via the data register. A read from the data register returns the first character from the FIFO (if one is available) in the DATA field. Reading also returns information about the number of characters remaining in the FIFO in the RAVAIL field. A write to the data register stores the value of the DATA field in the write FIFO. If the write FIFO is full, the character is lost.&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0x0&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;0x0&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;data&amp;lt;/name&amp;gt;
           &amp;lt;description&amp;gt;The value to transfer to/from the JTAG core. When writing, the DATA field holds a character to be written to the write FIFO. When reading, the DATA field holds a character read from the read FIFO.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;8&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;rvalid&amp;lt;/name&amp;gt;
           &amp;lt;description&amp;gt;Indicates whether the DATA field is valid. If RVALID=1, the DATA field is valid, otherwise DATA is undefined.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0xf&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;1&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-only&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;ravail&amp;lt;/name&amp;gt;
           &amp;lt;description&amp;gt;The number of characters remaining in the read FIFO (after the current read).&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x10&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;16&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-only&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt; 
        &amp;lt;register&amp;gt;     
         &amp;lt;name&amp;gt;CONTROL&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;Control&amp;lt;/displayName&amp;gt;
         &amp;lt;description&amp;gt;Embedded software controls the JTAG UART core&apos;s interrupt generation and reads status information via the control register. A read from the control register returns the status of the read and write FIFOs. Writes to the register can be used to enable/disable interrupts, or clear the AC bit.&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0x4&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;0x0&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;re&amp;lt;/name&amp;gt;
            &amp;lt;description&amp;gt;Interrupt-enable bit for read interrupts.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;1&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;we&amp;lt;/name&amp;gt;
            &amp;lt;description&amp;gt;Interrupt-enable bit for write interrupts&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x1&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;1&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;ri&amp;lt;/name&amp;gt;
            &amp;lt;description&amp;gt;Indicates that the read interrupt is pending.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x8&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;1&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-only&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;wi&amp;lt;/name&amp;gt;
            &amp;lt;description&amp;gt;Indicates that the write interrupt is pending.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x9&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;1&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-only&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;ac&amp;lt;/name&amp;gt;
            &amp;lt;description&amp;gt;Indicates that there has been JTAG activity since the bit was cleared. Writing 1 to AC clears it to 0.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0xa&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;1&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;wspace&amp;lt;/name&amp;gt;
            &amp;lt;description&amp;gt;The number of spaces available in the write FIFO&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x10&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;16&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-only&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt;            
    &amp;lt;/registers&amp;gt;
   &amp;lt;/peripheral&amp;gt;
  &amp;lt;/peripherals&amp;gt;
&amp;lt;/device&amp;gt; &lt;/cmsisSrcFileContents&gt;
                    &lt;addressGroup&gt;&lt;/addressGroup&gt;
                    &lt;cmsisVars/&gt;
                &lt;/cmsisInfo&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;irq&lt;/name&gt;
                &lt;type&gt;interrupt&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;av_irq&lt;/name&gt;
                        &lt;role&gt;irq&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedAddressablePoint&lt;/key&gt;
                            &lt;value&gt;jtag_uart.avalon_jtag_slave&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedReceiverOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToReceiver&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;irqScheme&lt;/key&gt;
                            &lt;value&gt;NONE&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;rst_n&lt;/name&gt;
                        &lt;role&gt;reset_n&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;DEASSERT&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;altera_avalon_jtag_uart&lt;/className&gt;
        &lt;version&gt;18.0&lt;/version&gt;
        &lt;displayName&gt;JTAG UART Intel FPGA IP&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;avalonSpec&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfotype&gt;AVALON_SPEC&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;0&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;clkFreq&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Long&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;clk&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CLOCK_RATE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;avalon_jtag_slave&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;avalon_jtag_slave&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_MAP&lt;/key&gt;
                            &lt;value&gt;&amp;lt;address-map&amp;gt;&amp;lt;slave name=&apos;avalon_jtag_slave&apos; start=&apos;0x0&apos; end=&apos;0x8&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;/address-map&amp;gt;&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                            &lt;value&gt;3&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;MAX_SLAVE_DATA_WIDTH&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;clk&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;clk&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_RATE&lt;/key&gt;
                            &lt;value&gt;100000000&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter name="avalonSpec" value="2.0" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;gflish_jtag_uart_0&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;gflish_jtag_uart_0&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;gflish_jtag_uart_0&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;gflish_jtag_uart_0&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;gflish_jtag_uart_0&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;gflish_jtag_uart_0&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;gflish_jtag_uart_0&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter name="logicalView" value="ip/gflish/gflish_jtag_uart_0.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.READ_DEPTH&lt;/key&gt;
            &lt;value&gt;64&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.READ_THRESHOLD&lt;/key&gt;
            &lt;value&gt;8&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.WRITE_DEPTH&lt;/key&gt;
            &lt;value&gt;64&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.WRITE_THRESHOLD&lt;/key&gt;
            &lt;value&gt;8&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.compatible&lt;/key&gt;
            &lt;value&gt;altr,juart-1.0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.group&lt;/key&gt;
            &lt;value&gt;serial&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.name&lt;/key&gt;
            &lt;value&gt;juart&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.vendor&lt;/key&gt;
            &lt;value&gt;altr&lt;/value&gt;
        &lt;/entry&gt;
    &lt;/assignmentValueMap&gt;
&lt;/assignmentDefinition&gt;" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="gflish" as="jtag_uart" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: gflish_jtag_uart_0"</message>
  </messages>
 </entity>
 <entity
   kind="altera_generic_component"
   version="1.0"
   name="gflish_onchip_memory2_0">
  <parameter name="hlsFile" value="" />
  <parameter
     name="deviceFeatures"
     value="ADDRESS_STALL 0 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 0 ALLOW_DIFF_SUFFIX_MIGRATION 0 ASSERT_TIMING_ROUTING_DELAYS_HAS_ALL_EXPECTED_DATA 0 ASSERT_TIMING_ROUTING_DELAYS_NO_AUTOFILL 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DISABLE_CRC_ERROR_DETECTION 0 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_HIGH_SPEED_HSSI 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 0 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BCM_PIN_BASED_AIOT_SUPPORT 0 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 0 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 0 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 0 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 0 HAS_FITTER_ECO_SUPPORT 0 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIER_PARTIAL_RECONFIG_SUPPORT 1 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 0 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_BLOCK 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 1 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 0 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 0 HAS_MISSING_PAD_INFO 0 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 1 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 1 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QHD_INCREMENTAL_TIMING_CLOSURE_SUPPORT 1 HAS_QHD_IP_REUSE_INTEGRATION_SUPPORT 1 HAS_QHD_PARTITIONS_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_REVC_IO 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 0 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMPLIFIED_PARTIAL_RECONFIG_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SIP_TILE_SUPPORT 0 HAS_SPEED_GRADE_OFFSET 1 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 1 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 1 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 1 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_DQS_IN_BUFFER_REDUCTION 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_REVE_SILICON 0 IS_SDM_LITE 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LUTRAM_DATA_IN_FF_MUST_BE_HIPI 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 1 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MAC_NEGATE_SUPPORT_DISABLED 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_CLOCK_REGION 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PCF 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 PINTABLE_OPTIONAL 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 0 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 0 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_PW0 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 1 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_MIN_CORNER_DMF_GENERATION 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 0 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_TIMING_CLOSURE_CORNERS 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 SUPPORT_UIB 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 U2B2_SUPPORT_NOT_READY 0 USES_ACV_FOR_FLED 0 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 0 USES_DETAILED_REDTAX_WITH_DSPF_ROUTING_MODELS 0 USES_DEV 1 USES_DSPF_ROUTING_MODELS 0 USES_DSP_FROM_PREVIOUS_FAMILY 0 USES_ESTIMATED_TIMING 0 USES_EXTRACTION_CORNERS_WITH_DSPF_ROUTING_MODELS 0 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 1 USES_PARASITIC_LOADS_WITH_DSPF_ROUTING_MODELS 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 1 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 1 USES_RAM_FROM_PREVIOUS_FAMILY 0 USES_SECOND_GENERATION_PART_INFO 1 USES_SECOND_GENERATION_POWER_ANALYZER 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_TIMING_ROUTING_DELAYS 0 USES_U2B2_TIMING_MODELS 1 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SDM_CONFIGURATION 0 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WORKS_AROUND_MISSING_RED_FLAGS_IN_DSPF_ROUTING_MODELS 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="AUTO_DEVICE" value="10AS048H4F34E3SG" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
  <parameter name="autoInitializationFileName" value="gflish_main_memory" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;clk1&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;reset1&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset&lt;/name&gt;
                        &lt;role&gt;reset&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset_req&lt;/name&gt;
                        &lt;role&gt;reset_req&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;DEASSERT&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;s1&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;15&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;clken&lt;/name&gt;
                        &lt;role&gt;clken&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;chipselect&lt;/name&gt;
                        &lt;role&gt;chipselect&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;byteenable&lt;/name&gt;
                        &lt;role&gt;byteenable&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;4&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressAlignment&lt;/key&gt;
                            &lt;value&gt;DYNAMIC&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressSpan&lt;/key&gt;
                            &lt;value&gt;102400&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToMaster&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                            &lt;value&gt;102400&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isFlash&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;true&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;printableDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;transparentBridge&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;altera_avalon_onchip_memory2&lt;/className&gt;
        &lt;version&gt;18.0&lt;/version&gt;
        &lt;displayName&gt;On-Chip Memory (RAM or ROM) Intel FPGA IP&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;autoInitializationFileName&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfotype&gt;UNIQUE_ID&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;NONE&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;deviceFamily&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfotype&gt;DEVICE_FAMILY&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;NONE&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;deviceFeatures&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfotype&gt;DEVICE_FEATURES&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;s1&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;s1&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_MAP&lt;/key&gt;
                            &lt;value&gt;&amp;lt;address-map&amp;gt;&amp;lt;slave name=&apos;s1&apos; start=&apos;0x0&apos; end=&apos;0x19000&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;/address-map&amp;gt;&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                            &lt;value&gt;17&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;MAX_SLAVE_DATA_WIDTH&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter name="deviceFamily" value="Arria 10" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;gflish_onchip_memory2_0&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;gflish_onchip_memory2_0&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;gflish_onchip_memory2_0&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;gflish_onchip_memory2_0&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;gflish_onchip_memory2_0&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;gflish_onchip_memory2_0&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;gflish_onchip_memory2_0&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter name="logicalView" value="ip/gflish/gflish_onchip_memory2_0.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.ALLOW_IN_SYSTEM_MEMORY_CONTENT_EDITOR&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.ALLOW_MRAM_SIM_CONTENTS_ONLY_FILE&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.CONTENTS_INFO&lt;/key&gt;
            &lt;value&gt;&quot;&quot;&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.DUAL_PORT&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.GUI_RAM_BLOCK_TYPE&lt;/key&gt;
            &lt;value&gt;AUTO&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.INIT_CONTENTS_FILE&lt;/key&gt;
            &lt;value&gt;gflish_onchip_memory2_0_onchip_memory2_0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.INIT_MEM_CONTENT&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.INSTANCE_ID&lt;/key&gt;
            &lt;value&gt;NONE&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.NON_DEFAULT_INIT_FILE_ENABLED&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.RAM_BLOCK_TYPE&lt;/key&gt;
            &lt;value&gt;AUTO&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.READ_DURING_WRITE_MODE&lt;/key&gt;
            &lt;value&gt;DONT_CARE&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.SINGLE_CLOCK_OP&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.SIZE_MULTIPLE&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.SIZE_VALUE&lt;/key&gt;
            &lt;value&gt;102400&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.WRITABLE&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.memoryInfo.DAT_SYM_INSTALL_DIR&lt;/key&gt;
            &lt;value&gt;SIM_DIR&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.memoryInfo.GENERATE_DAT_SYM&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.memoryInfo.GENERATE_HEX&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.memoryInfo.HAS_BYTE_LANE&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.memoryInfo.HEX_INSTALL_DIR&lt;/key&gt;
            &lt;value&gt;QPF_DIR&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.memoryInfo.MEM_INIT_DATA_WIDTH&lt;/key&gt;
            &lt;value&gt;32&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.memoryInfo.MEM_INIT_FILENAME&lt;/key&gt;
            &lt;value&gt;gflish_onchip_memory2_0_onchip_memory2_0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;postgeneration.simulation.init_file.param_name&lt;/key&gt;
            &lt;value&gt;INIT_FILE&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;postgeneration.simulation.init_file.type&lt;/key&gt;
            &lt;value&gt;MEM_INIT&lt;/value&gt;
        &lt;/entry&gt;
    &lt;/assignmentValueMap&gt;
&lt;/assignmentDefinition&gt;" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="gflish" as="main_memory" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: gflish_onchip_memory2_0"</message>
  </messages>
 </entity>
 <entity
   kind="altera_generic_component"
   version="1.0"
   name="gflish_nios2_gen2_0">
  <parameter name="dataMasterHighPerformanceMapParam" value="" />
  <parameter name="internalIrqMaskSystemInfo" value="1" />
  <parameter name="hlsFile" value="" />
  <parameter name="faSlaveMapParam" value="" />
  <parameter name="tightlyCoupledInstructionMaster1AddrWidth" value="1" />
  <parameter name="customInstSlavesSystemInfo_nios_c" value="" />
  <parameter name="customInstSlavesSystemInfo_nios_b" value="" />
  <parameter name="tightlyCoupledDataMaster0AddrWidth" value="1" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;custom_instruction_master&lt;/name&gt;
                &lt;type&gt;nios_custom_instruction&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;dummy_ci_port&lt;/name&gt;
                        &lt;role&gt;readra&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CIName&lt;/key&gt;
                            &lt;value&gt;&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressWidth&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockCycle&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;enabled&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maxAddressWidth&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;opcodeExtension&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;sharedCombinationalAndMulticycle&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;data_master&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;d_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;26&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;d_byteenable&lt;/name&gt;
                        &lt;role&gt;byteenable&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;4&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;d_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;d_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;d_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;d_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;d_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;d_readdatavalid&lt;/name&gt;
                        &lt;role&gt;readdatavalid&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;debug_mem_slave_debugaccess_to_roms&lt;/name&gt;
                        &lt;role&gt;debugaccess&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;debug.providesServices&lt;/key&gt;
                            &lt;value&gt;master&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;adaptsTo&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;true&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dBSBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamReads&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamWrites&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isAsynchronous&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isReadable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isWriteable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maxAddressWidth&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;debug_mem_slave&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;debug_mem_slave_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;9&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;debug_mem_slave_byteenable&lt;/name&gt;
                        &lt;role&gt;byteenable&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;4&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;debug_mem_slave_debugaccess&lt;/name&gt;
                        &lt;role&gt;debugaccess&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;debug_mem_slave_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;debug_mem_slave_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;debug_mem_slave_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;debug_mem_slave_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;debug_mem_slave_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.hideDevice&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;qsys.ui.connect&lt;/key&gt;
                            &lt;value&gt;instruction_master,data_master&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressAlignment&lt;/key&gt;
                            &lt;value&gt;DYNAMIC&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressSpan&lt;/key&gt;
                            &lt;value&gt;2048&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToMaster&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isFlash&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;true&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;printableDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitStates&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;true&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;transparentBridge&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;debug_reset_request&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;debug_reset_request&lt;/name&gt;
                        &lt;role&gt;reset&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedDirectReset&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedResetSinks&lt;/key&gt;
                            &lt;value&gt;none&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;DEASSERT&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;instruction_master&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;i_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;26&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;i_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;i_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;i_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;i_readdatavalid&lt;/name&gt;
                        &lt;role&gt;readdatavalid&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;adaptsTo&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;true&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dBSBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamReads&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamWrites&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isAsynchronous&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isReadable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isWriteable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;true&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maxAddressWidth&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;irq&lt;/name&gt;
                &lt;type&gt;interrupt&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;irq&lt;/name&gt;
                        &lt;role&gt;irq&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedAddressablePoint&lt;/key&gt;
                            &lt;value&gt;nios2.data_master&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;irqMap&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;irqScheme&lt;/key&gt;
                            &lt;value&gt;INDIVIDUAL_REQUESTS&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset_n&lt;/name&gt;
                        &lt;role&gt;reset_n&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset_req&lt;/name&gt;
                        &lt;role&gt;reset_req&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;DEASSERT&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;altera_nios2_gen2&lt;/className&gt;
        &lt;version&gt;18.0&lt;/version&gt;
        &lt;displayName&gt;Nios II Processor&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;-1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;AUTO_CLK_CLOCK_DOMAIN&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;clk&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CLOCK_DOMAIN&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;-1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;AUTO_CLK_RESET_DOMAIN&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;clk&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;RESET_DOMAIN&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;AUTO_DEVICE&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfotype&gt;DEVICE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;AUTO_DEVICE_SPEEDGRADE&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfotype&gt;DEVICE_SPEEDGRADE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;50000000&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;clockFrequency&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Long&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;clk&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CLOCK_RATE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;customInstSlavesSystemInfo&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;custom_instruction_master&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CUSTOM_INSTRUCTION_SLAVES&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;customInstSlavesSystemInfo_nios_a&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;custom_instruction_master_a&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CUSTOM_INSTRUCTION_SLAVES&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;customInstSlavesSystemInfo_nios_b&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;custom_instruction_master_b&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CUSTOM_INSTRUCTION_SLAVES&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;customInstSlavesSystemInfo_nios_c&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;custom_instruction_master_c&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CUSTOM_INSTRUCTION_SLAVES&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;dataAddrWidth&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;data_master&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_WIDTH&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;dataMasterHighPerformanceAddrWidth&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;data_master_high_performance&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_WIDTH&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;dataMasterHighPerformanceMapParam&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;data_master_high_performance&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_MAP&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;dataSlaveMapParam&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;data_master&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_MAP&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;STRATIXIV&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;deviceFamilyName&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfotype&gt;DEVICE_FAMILY&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;deviceFeaturesSystemInfo&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfotype&gt;DEVICE_FEATURES&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;faAddrWidth&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;flash_instruction_master&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_WIDTH&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;faSlaveMapParam&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;flash_instruction_master&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_MAP&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;instAddrWidth&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;instruction_master&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_WIDTH&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;instSlaveMapParam&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;instruction_master&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_MAP&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;instructionMasterHighPerformanceAddrWidth&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;instruction_master_high_performance&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_WIDTH&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;instructionMasterHighPerformanceMapParam&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;instruction_master_high_performance&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_MAP&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;0&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;internalIrqMaskSystemInfo&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Long&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;irq&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;INTERRUPTS_USED&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;tightlyCoupledDataMaster0AddrWidth&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;tightly_coupled_data_master_0&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_WIDTH&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;tightlyCoupledDataMaster0MapParam&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;tightly_coupled_data_master_0&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_MAP&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;tightlyCoupledDataMaster1AddrWidth&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;tightly_coupled_data_master_1&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_WIDTH&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;tightlyCoupledDataMaster1MapParam&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;tightly_coupled_data_master_1&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_MAP&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;tightlyCoupledDataMaster2AddrWidth&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;tightly_coupled_data_master_2&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_WIDTH&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;tightlyCoupledDataMaster2MapParam&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;tightly_coupled_data_master_2&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_MAP&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;tightlyCoupledDataMaster3AddrWidth&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;tightly_coupled_data_master_3&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_WIDTH&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;tightlyCoupledDataMaster3MapParam&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;tightly_coupled_data_master_3&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_MAP&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;tightlyCoupledInstructionMaster0AddrWidth&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;tightly_coupled_instruction_master_0&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_WIDTH&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;tightlyCoupledInstructionMaster0MapParam&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;tightly_coupled_instruction_master_0&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_MAP&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;tightlyCoupledInstructionMaster1AddrWidth&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;tightly_coupled_instruction_master_1&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_WIDTH&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;tightlyCoupledInstructionMaster1MapParam&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;tightly_coupled_instruction_master_1&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_MAP&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;tightlyCoupledInstructionMaster2AddrWidth&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;tightly_coupled_instruction_master_2&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_WIDTH&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;tightlyCoupledInstructionMaster2MapParam&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;tightly_coupled_instruction_master_2&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_MAP&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;tightlyCoupledInstructionMaster3AddrWidth&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;tightly_coupled_instruction_master_3&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_WIDTH&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;tightlyCoupledInstructionMaster3MapParam&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;tightly_coupled_instruction_master_3&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_MAP&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;clk&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;clk&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_DOMAIN&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_RATE&lt;/key&gt;
                            &lt;value&gt;100000000&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;RESET_DOMAIN&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;custom_instruction_master&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;custom_instruction_master&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CUSTOM_INSTRUCTION_SLAVES&lt;/key&gt;
                            &lt;value&gt;&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;data_master&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;data_master&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_MAP&lt;/key&gt;
                            &lt;value&gt;&amp;lt;address-map&amp;gt;&amp;lt;slave name=&apos;gfilsh.avl_mem&apos; start=&apos;0x0&apos; end=&apos;0x2000000&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;slave name=&apos;main_memory.s1&apos; start=&apos;0x2020000&apos; end=&apos;0x2039000&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;slave name=&apos;nios2.debug_mem_slave&apos; start=&apos;0x2040800&apos; end=&apos;0x2041000&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;slave name=&apos;gfilsh.avl_csr&apos; start=&apos;0x2041100&apos; end=&apos;0x2041200&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;slave name=&apos;jtag_uart.avalon_jtag_slave&apos; start=&apos;0x2041200&apos; end=&apos;0x2041208&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;/address-map&amp;gt;&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                            &lt;value&gt;26&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;debug_mem_slave&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;debug_mem_slave&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_MAP&lt;/key&gt;
                            &lt;value&gt;&amp;lt;address-map&amp;gt;&amp;lt;slave name=&apos;debug_mem_slave&apos; start=&apos;0x0&apos; end=&apos;0x800&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;/address-map&amp;gt;&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                            &lt;value&gt;11&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;MAX_SLAVE_DATA_WIDTH&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;instruction_master&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;instruction_master&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_MAP&lt;/key&gt;
                            &lt;value&gt;&amp;lt;address-map&amp;gt;&amp;lt;slave name=&apos;main_memory.s1&apos; start=&apos;0x2020000&apos; end=&apos;0x2039000&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;slave name=&apos;nios2.debug_mem_slave&apos; start=&apos;0x2040800&apos; end=&apos;0x2041000&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;slave name=&apos;gfilsh.avl_csr&apos; start=&apos;0x2041100&apos; end=&apos;0x2041200&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;/address-map&amp;gt;&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                            &lt;value&gt;26&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;irq&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;irq&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;INTERRUPTS_USED&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter name="customInstSlavesSystemInfo_nios_a" value="" />
  <parameter
     name="deviceFeaturesSystemInfo"
     value="ADDRESS_STALL 0 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 0 ALLOW_DIFF_SUFFIX_MIGRATION 0 ASSERT_TIMING_ROUTING_DELAYS_HAS_ALL_EXPECTED_DATA 0 ASSERT_TIMING_ROUTING_DELAYS_NO_AUTOFILL 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DISABLE_CRC_ERROR_DETECTION 0 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_HIGH_SPEED_HSSI 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 0 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BCM_PIN_BASED_AIOT_SUPPORT 0 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 0 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 0 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 0 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 0 HAS_FITTER_ECO_SUPPORT 0 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIER_PARTIAL_RECONFIG_SUPPORT 1 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 0 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_BLOCK 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 1 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 0 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 0 HAS_MISSING_PAD_INFO 0 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 1 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 1 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QHD_INCREMENTAL_TIMING_CLOSURE_SUPPORT 1 HAS_QHD_IP_REUSE_INTEGRATION_SUPPORT 1 HAS_QHD_PARTITIONS_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_REVC_IO 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 0 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMPLIFIED_PARTIAL_RECONFIG_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SIP_TILE_SUPPORT 0 HAS_SPEED_GRADE_OFFSET 1 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 1 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 1 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 1 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_DQS_IN_BUFFER_REDUCTION 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_REVE_SILICON 0 IS_SDM_LITE 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LUTRAM_DATA_IN_FF_MUST_BE_HIPI 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 1 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MAC_NEGATE_SUPPORT_DISABLED 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_CLOCK_REGION 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PCF 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 PINTABLE_OPTIONAL 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 0 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 0 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_PW0 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 1 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_MIN_CORNER_DMF_GENERATION 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 0 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_TIMING_CLOSURE_CORNERS 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 SUPPORT_UIB 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 U2B2_SUPPORT_NOT_READY 0 USES_ACV_FOR_FLED 0 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 0 USES_DETAILED_REDTAX_WITH_DSPF_ROUTING_MODELS 0 USES_DEV 1 USES_DSPF_ROUTING_MODELS 0 USES_DSP_FROM_PREVIOUS_FAMILY 0 USES_ESTIMATED_TIMING 0 USES_EXTRACTION_CORNERS_WITH_DSPF_ROUTING_MODELS 0 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 1 USES_PARASITIC_LOADS_WITH_DSPF_ROUTING_MODELS 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 1 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 1 USES_RAM_FROM_PREVIOUS_FAMILY 0 USES_SECOND_GENERATION_PART_INFO 1 USES_SECOND_GENERATION_POWER_ANALYZER 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_TIMING_ROUTING_DELAYS 0 USES_U2B2_TIMING_MODELS 1 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SDM_CONFIGURATION 0 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WORKS_AROUND_MISSING_RED_FLAGS_IN_DSPF_ROUTING_MODELS 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0" />
  <parameter name="instructionMasterHighPerformanceMapParam" value="" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap&gt;
        &lt;entry&gt;
            &lt;key&gt;debug.hostConnection&lt;/key&gt;
            &lt;value&gt;type jtag id 70:34|110:135&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.BIG_ENDIAN&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.BREAK_ADDR&lt;/key&gt;
            &lt;value&gt;0x02040820&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.CPU_ARCH_NIOS2_R1&lt;/key&gt;
            &lt;value&gt;&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.CPU_FREQ&lt;/key&gt;
            &lt;value&gt;100000000u&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.CPU_ID_SIZE&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.CPU_ID_VALUE&lt;/key&gt;
            &lt;value&gt;0x00000000&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.CPU_IMPLEMENTATION&lt;/key&gt;
            &lt;value&gt;&quot;fast&quot;&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.DATA_ADDR_WIDTH&lt;/key&gt;
            &lt;value&gt;26&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.DCACHE_BYPASS_MASK&lt;/key&gt;
            &lt;value&gt;0x80000000&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.DCACHE_LINE_SIZE&lt;/key&gt;
            &lt;value&gt;32&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.DCACHE_LINE_SIZE_LOG2&lt;/key&gt;
            &lt;value&gt;5&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.DCACHE_SIZE&lt;/key&gt;
            &lt;value&gt;2048&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.EXCEPTION_ADDR&lt;/key&gt;
            &lt;value&gt;0x02020020&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.FLASH_ACCELERATOR_LINES&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.FLASH_ACCELERATOR_LINE_SIZE&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.FLUSHDA_SUPPORTED&lt;/key&gt;
            &lt;value&gt;&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.HARDWARE_DIVIDE_PRESENT&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.HARDWARE_MULTIPLY_PRESENT&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.HARDWARE_MULX_PRESENT&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.HAS_DEBUG_CORE&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.HAS_DEBUG_STUB&lt;/key&gt;
            &lt;value&gt;&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.HAS_EXTRA_EXCEPTION_INFO&lt;/key&gt;
            &lt;value&gt;&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.HAS_ILLEGAL_INSTRUCTION_EXCEPTION&lt;/key&gt;
            &lt;value&gt;&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.HAS_JMPI_INSTRUCTION&lt;/key&gt;
            &lt;value&gt;&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.ICACHE_LINE_SIZE&lt;/key&gt;
            &lt;value&gt;32&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.ICACHE_LINE_SIZE_LOG2&lt;/key&gt;
            &lt;value&gt;5&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.ICACHE_SIZE&lt;/key&gt;
            &lt;value&gt;2048&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.INITDA_SUPPORTED&lt;/key&gt;
            &lt;value&gt;&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.INST_ADDR_WIDTH&lt;/key&gt;
            &lt;value&gt;26&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.NUM_OF_SHADOW_REG_SETS&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.OCI_VERSION&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.RESET_ADDR&lt;/key&gt;
            &lt;value&gt;0x02020000&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.configuration.DataCacheVictimBufImpl&lt;/key&gt;
            &lt;value&gt;ram&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.configuration.HDLSimCachesCleared&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.configuration.breakOffset&lt;/key&gt;
            &lt;value&gt;32&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.configuration.breakSlave&lt;/key&gt;
            &lt;value&gt;nios2.debug_mem_slave&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.configuration.cpuArchitecture&lt;/key&gt;
            &lt;value&gt;Nios II&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.configuration.exceptionOffset&lt;/key&gt;
            &lt;value&gt;32&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.configuration.exceptionSlave&lt;/key&gt;
            &lt;value&gt;main_memory.s1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.configuration.resetOffset&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.configuration.resetSlave&lt;/key&gt;
            &lt;value&gt;main_memory.s1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.compatible&lt;/key&gt;
            &lt;value&gt;altr,nios2-1.1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.group&lt;/key&gt;
            &lt;value&gt;cpu&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.name&lt;/key&gt;
            &lt;value&gt;nios2&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.altr,exception-addr&lt;/key&gt;
            &lt;value&gt;0x02020020&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.altr,has-initda&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.altr,has-mul&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.altr,implementation&lt;/key&gt;
            &lt;value&gt;&quot;fast&quot;&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.altr,reset-addr&lt;/key&gt;
            &lt;value&gt;0x02020000&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.clock-frequency&lt;/key&gt;
            &lt;value&gt;100000000u&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.dcache-line-size&lt;/key&gt;
            &lt;value&gt;32&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.dcache-size&lt;/key&gt;
            &lt;value&gt;2048&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.icache-line-size&lt;/key&gt;
            &lt;value&gt;32&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.icache-size&lt;/key&gt;
            &lt;value&gt;2048&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.vendor&lt;/key&gt;
            &lt;value&gt;altr&lt;/value&gt;
        &lt;/entry&gt;
    &lt;/assignmentValueMap&gt;
&lt;/assignmentDefinition&gt;" />
  <parameter
     name="dataSlaveMapParam"
     value="&lt;address-map&gt;&lt;slave name=&apos;gfilsh.avl_mem&apos; start=&apos;0x0&apos; end=&apos;0x2000000&apos; datawidth=&apos;32&apos; /&gt;&lt;slave name=&apos;main_memory.s1&apos; start=&apos;0x2020000&apos; end=&apos;0x2039000&apos; datawidth=&apos;32&apos; /&gt;&lt;slave name=&apos;nios2.debug_mem_slave&apos; start=&apos;0x2040800&apos; end=&apos;0x2041000&apos; datawidth=&apos;32&apos; /&gt;&lt;slave name=&apos;gfilsh.avl_csr&apos; start=&apos;0x2041100&apos; end=&apos;0x2041200&apos; datawidth=&apos;32&apos; /&gt;&lt;slave name=&apos;jtag_uart.avalon_jtag_slave&apos; start=&apos;0x2041200&apos; end=&apos;0x2041208&apos; datawidth=&apos;32&apos; /&gt;&lt;/address-map&gt;" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="clockFrequency" value="100000000" />
  <parameter name="tightlyCoupledDataMaster3MapParam" value="" />
  <parameter name="AUTO_CLK_RESET_DOMAIN" value="1" />
  <parameter name="dataMasterHighPerformanceAddrWidth" value="1" />
  <parameter name="deviceFamilyName" value="Arria 10" />
  <parameter name="tightlyCoupledDataMaster2AddrWidth" value="1" />
  <parameter name="tightlyCoupledDataMaster2MapParam" value="" />
  <parameter name="tightlyCoupledInstructionMaster2AddrWidth" value="1" />
  <parameter name="tightlyCoupledDataMaster1MapParam" value="" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;gflish_nios2_gen2_0&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;gflish_nios2_gen2_0&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;gflish_nios2_gen2_0&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;gflish_nios2_gen2_0&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;gflish_nios2_gen2_0&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;gflish_nios2_gen2_0&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;gflish_nios2_gen2_0&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter
     name="instSlaveMapParam"
     value="&lt;address-map&gt;&lt;slave name=&apos;main_memory.s1&apos; start=&apos;0x2020000&apos; end=&apos;0x2039000&apos; datawidth=&apos;32&apos; /&gt;&lt;slave name=&apos;nios2.debug_mem_slave&apos; start=&apos;0x2040800&apos; end=&apos;0x2041000&apos; datawidth=&apos;32&apos; /&gt;&lt;slave name=&apos;gfilsh.avl_csr&apos; start=&apos;0x2041100&apos; end=&apos;0x2041200&apos; datawidth=&apos;32&apos; /&gt;&lt;/address-map&gt;" />
  <parameter name="tightlyCoupledDataMaster0MapParam" value="" />
  <parameter name="faAddrWidth" value="1" />
  <parameter name="tightlyCoupledInstructionMaster2MapParam" value="" />
  <parameter name="tightlyCoupledInstructionMaster1MapParam" value="" />
  <parameter name="tightlyCoupledDataMaster1AddrWidth" value="1" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
  <parameter name="tightlyCoupledInstructionMaster3AddrWidth" value="1" />
  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="3" />
  <parameter name="logicalView" value="ip/gflish/gflish_nios2_gen2_0.ip" />
  <parameter name="customInstSlavesSystemInfo" value="" />
  <parameter name="tightlyCoupledInstructionMaster0AddrWidth" value="1" />
  <parameter name="tightlyCoupledInstructionMaster0MapParam" value="" />
  <parameter name="dataAddrWidth" value="26" />
  <parameter name="instAddrWidth" value="26" />
  <parameter name="instructionMasterHighPerformanceAddrWidth" value="1" />
  <parameter name="AUTO_DEVICE" value="10AS048H4F34E3SG" />
  <parameter name="AUTO_CLK_CLOCK_DOMAIN" value="1" />
  <parameter name="tightlyCoupledDataMaster3AddrWidth" value="1" />
  <parameter name="tightlyCoupledInstructionMaster3MapParam" value="" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="gflish" as="nios2" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: gflish_nios2_gen2_0"</message>
  </messages>
 </entity>
 <entity kind="altera_generic_component" version="1.0" name="gflish_reset_in">
  <parameter name="AUTO_CLK_CLOCK_RATE" value="100000000" />
  <parameter name="hlsFile" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="AUTO_DEVICE" value="10AS048H4F34E3SG" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;in_reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;in_reset&lt;/name&gt;
                        &lt;role&gt;reset&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;DEASSERT&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;out_reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;out_reset&lt;/name&gt;
                        &lt;role&gt;reset&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedDirectReset&lt;/key&gt;
                            &lt;value&gt;in_reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedResetSinks&lt;/key&gt;
                            &lt;value&gt;in_reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;DEASSERT&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;altera_reset_bridge&lt;/className&gt;
        &lt;version&gt;18.0&lt;/version&gt;
        &lt;displayName&gt;Reset Bridge Intel FPGA IP&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;-1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;AUTO_CLK_CLOCK_RATE&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Long&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;clk&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CLOCK_RATE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;clk&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;clk&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_RATE&lt;/key&gt;
                            &lt;value&gt;100000000&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;gflish_reset_in&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;gflish_reset_in&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;gflish_reset_in&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;gflish_reset_in&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;gflish_reset_in&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;gflish_reset_in&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;gflish_reset_in&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter name="logicalView" value="ip/gflish/gflish_reset_in.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap/&gt;
&lt;/assignmentDefinition&gt;" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="gflish" as="reset_in" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: gflish_reset_in"</message>
  </messages>
 </entity>
 <entity kind="altera_generic_component" version="1.0" name="gflish_clock_in">
  <parameter name="hlsFile" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="AUTO_DEVICE" value="10AS048H4F34E3SG" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;in_clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;in_clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;out_clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;out_clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedDirectClock&lt;/key&gt;
                            &lt;value&gt;in_clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;100000000&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRateKnown&lt;/key&gt;
                            &lt;value&gt;true&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;altera_clock_bridge&lt;/className&gt;
        &lt;version&gt;18.0&lt;/version&gt;
        &lt;displayName&gt;Clock Bridge Intel FPGA IP&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;0&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;DERIVED_CLOCK_RATE&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Long&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;in_clk&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CLOCK_RATE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;in_clk&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;in_clk&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_RATE&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;out_clk&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;out_clk&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_RATE&lt;/key&gt;
                            &lt;value&gt;100000000&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter name="DERIVED_CLOCK_RATE" value="0" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;gflish_clock_in&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;gflish_clock_in&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;gflish_clock_in&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;gflish_clock_in&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;gflish_clock_in&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;gflish_clock_in&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;gflish_clock_in&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter name="logicalView" value="ip/gflish/gflish_clock_in.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap/&gt;
&lt;/assignmentDefinition&gt;" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="gflish" as="sys_clk" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: gflish_clock_in"</message>
  </messages>
 </entity>
 <entity
   kind="altera_mm_interconnect"
   version="18.0"
   name="gflish_altera_mm_interconnect_180_sbymbyi">
  <parameter name="AUTO_DEVICE" value="10AS048H4F34E3SG" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="" />
  <parameter
     name="COMPOSE_CONTENTS"
     value="add_instance {nios2_data_master_translator} {altera_merlin_master_translator};set_instance_parameter_value {nios2_data_master_translator} {AV_ADDRESS_W} {26};set_instance_parameter_value {nios2_data_master_translator} {AV_DATA_W} {32};set_instance_parameter_value {nios2_data_master_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {nios2_data_master_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {nios2_data_master_translator} {UAV_ADDRESS_W} {26};set_instance_parameter_value {nios2_data_master_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {nios2_data_master_translator} {AV_READLATENCY} {0};set_instance_parameter_value {nios2_data_master_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {nios2_data_master_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {nios2_data_master_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {nios2_data_master_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {nios2_data_master_translator} {USE_READDATA} {1};set_instance_parameter_value {nios2_data_master_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {nios2_data_master_translator} {USE_READ} {1};set_instance_parameter_value {nios2_data_master_translator} {USE_WRITE} {1};set_instance_parameter_value {nios2_data_master_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {nios2_data_master_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {nios2_data_master_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {nios2_data_master_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {nios2_data_master_translator} {USE_ADDRESS} {1};set_instance_parameter_value {nios2_data_master_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {nios2_data_master_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {nios2_data_master_translator} {USE_CLKEN} {0};set_instance_parameter_value {nios2_data_master_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {nios2_data_master_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {nios2_data_master_translator} {USE_LOCK} {0};set_instance_parameter_value {nios2_data_master_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_data_master_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {nios2_data_master_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {nios2_data_master_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {nios2_data_master_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {nios2_data_master_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_data_master_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_data_master_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {nios2_data_master_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {nios2_data_master_translator} {AV_BURSTBOUNDARIES} {1};set_instance_parameter_value {nios2_data_master_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {nios2_data_master_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {nios2_data_master_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {nios2_data_master_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_data_master_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_data_master_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {nios2_data_master_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {nios2_data_master_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {nios2_data_master_translator} {SYNC_RESET} {0};set_instance_parameter_value {nios2_data_master_translator} {WAITREQUEST_ALLOWANCE} {0};add_instance {nios2_instruction_master_translator} {altera_merlin_master_translator};set_instance_parameter_value {nios2_instruction_master_translator} {AV_ADDRESS_W} {26};set_instance_parameter_value {nios2_instruction_master_translator} {AV_DATA_W} {32};set_instance_parameter_value {nios2_instruction_master_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {nios2_instruction_master_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {nios2_instruction_master_translator} {UAV_ADDRESS_W} {26};set_instance_parameter_value {nios2_instruction_master_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {nios2_instruction_master_translator} {AV_READLATENCY} {0};set_instance_parameter_value {nios2_instruction_master_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {nios2_instruction_master_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {nios2_instruction_master_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {nios2_instruction_master_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {nios2_instruction_master_translator} {USE_READDATA} {1};set_instance_parameter_value {nios2_instruction_master_translator} {USE_WRITEDATA} {0};set_instance_parameter_value {nios2_instruction_master_translator} {USE_READ} {1};set_instance_parameter_value {nios2_instruction_master_translator} {USE_WRITE} {0};set_instance_parameter_value {nios2_instruction_master_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {nios2_instruction_master_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {nios2_instruction_master_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {nios2_instruction_master_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {nios2_instruction_master_translator} {USE_ADDRESS} {1};set_instance_parameter_value {nios2_instruction_master_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {nios2_instruction_master_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {nios2_instruction_master_translator} {USE_CLKEN} {0};set_instance_parameter_value {nios2_instruction_master_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {nios2_instruction_master_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {nios2_instruction_master_translator} {USE_LOCK} {0};set_instance_parameter_value {nios2_instruction_master_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_instruction_master_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {nios2_instruction_master_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {nios2_instruction_master_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {nios2_instruction_master_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {nios2_instruction_master_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_instruction_master_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_instruction_master_translator} {AV_LINEWRAPBURSTS} {1};set_instance_parameter_value {nios2_instruction_master_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {nios2_instruction_master_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {nios2_instruction_master_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {nios2_instruction_master_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {nios2_instruction_master_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {nios2_instruction_master_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_instruction_master_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_instruction_master_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {nios2_instruction_master_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {nios2_instruction_master_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {nios2_instruction_master_translator} {SYNC_RESET} {0};set_instance_parameter_value {nios2_instruction_master_translator} {WAITREQUEST_ALLOWANCE} {0};add_instance {jtag_uart_avalon_jtag_slave_translator} {altera_merlin_slave_translator};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_ADDRESS_W} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_DATA_W} {32};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {UAV_DATA_W} {32};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {UAV_ADDRESS_W} {26};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_READLATENCY} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_READDATA} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_READ} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_WRITE} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_ADDRESS} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_LOCK} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {WAITREQUEST_ALLOWANCE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {SYNC_RESET} {0};add_instance {gfilsh_avl_csr_translator} {altera_merlin_slave_translator};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_ADDRESS_W} {6};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_DATA_W} {32};set_instance_parameter_value {gfilsh_avl_csr_translator} {UAV_DATA_W} {32};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {gfilsh_avl_csr_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {gfilsh_avl_csr_translator} {UAV_ADDRESS_W} {26};set_instance_parameter_value {gfilsh_avl_csr_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_READLATENCY} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {gfilsh_avl_csr_translator} {USE_READDATA} {1};set_instance_parameter_value {gfilsh_avl_csr_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {gfilsh_avl_csr_translator} {USE_READ} {1};set_instance_parameter_value {gfilsh_avl_csr_translator} {USE_WRITE} {1};set_instance_parameter_value {gfilsh_avl_csr_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {USE_ADDRESS} {1};set_instance_parameter_value {gfilsh_avl_csr_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {gfilsh_avl_csr_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {gfilsh_avl_csr_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {USE_LOCK} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {WAITREQUEST_ALLOWANCE} {0};set_instance_parameter_value {gfilsh_avl_csr_translator} {SYNC_RESET} {0};add_instance {gfilsh_avl_mem_translator} {altera_merlin_slave_translator};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_ADDRESS_W} {23};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_DATA_W} {32};set_instance_parameter_value {gfilsh_avl_mem_translator} {UAV_DATA_W} {32};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_BURSTCOUNT_W} {7};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {gfilsh_avl_mem_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {gfilsh_avl_mem_translator} {UAV_ADDRESS_W} {26};set_instance_parameter_value {gfilsh_avl_mem_translator} {UAV_BURSTCOUNT_W} {9};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_READLATENCY} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_READ_WAIT} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {gfilsh_avl_mem_translator} {USE_READDATA} {1};set_instance_parameter_value {gfilsh_avl_mem_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {gfilsh_avl_mem_translator} {USE_READ} {1};set_instance_parameter_value {gfilsh_avl_mem_translator} {USE_WRITE} {1};set_instance_parameter_value {gfilsh_avl_mem_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {gfilsh_avl_mem_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {USE_ADDRESS} {1};set_instance_parameter_value {gfilsh_avl_mem_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {gfilsh_avl_mem_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {gfilsh_avl_mem_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {gfilsh_avl_mem_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {USE_LOCK} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_CONSTANT_BURST_BEHAVIOR} {1};set_instance_parameter_value {gfilsh_avl_mem_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_LINEWRAPBURSTS} {1};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {WAITREQUEST_ALLOWANCE} {0};set_instance_parameter_value {gfilsh_avl_mem_translator} {SYNC_RESET} {0};add_instance {nios2_debug_mem_slave_translator} {altera_merlin_slave_translator};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_ADDRESS_W} {9};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_DATA_W} {32};set_instance_parameter_value {nios2_debug_mem_slave_translator} {UAV_DATA_W} {32};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {nios2_debug_mem_slave_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {nios2_debug_mem_slave_translator} {UAV_ADDRESS_W} {26};set_instance_parameter_value {nios2_debug_mem_slave_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_READLATENCY} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {nios2_debug_mem_slave_translator} {USE_READDATA} {1};set_instance_parameter_value {nios2_debug_mem_slave_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {nios2_debug_mem_slave_translator} {USE_READ} {1};set_instance_parameter_value {nios2_debug_mem_slave_translator} {USE_WRITE} {1};set_instance_parameter_value {nios2_debug_mem_slave_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {nios2_debug_mem_slave_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {USE_ADDRESS} {1};set_instance_parameter_value {nios2_debug_mem_slave_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {nios2_debug_mem_slave_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {USE_LOCK} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {nios2_debug_mem_slave_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_REGISTERINCOMINGSIGNALS} {1};set_instance_parameter_value {nios2_debug_mem_slave_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {WAITREQUEST_ALLOWANCE} {0};set_instance_parameter_value {nios2_debug_mem_slave_translator} {SYNC_RESET} {0};add_instance {main_memory_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {main_memory_s1_translator} {AV_ADDRESS_W} {15};set_instance_parameter_value {main_memory_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {main_memory_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {main_memory_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {main_memory_s1_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {main_memory_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {main_memory_s1_translator} {UAV_ADDRESS_W} {26};set_instance_parameter_value {main_memory_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {main_memory_s1_translator} {AV_READLATENCY} {1};set_instance_parameter_value {main_memory_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {main_memory_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {main_memory_s1_translator} {AV_READ_WAIT} {0};set_instance_parameter_value {main_memory_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {main_memory_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {main_memory_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {main_memory_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {main_memory_s1_translator} {USE_READ} {0};set_instance_parameter_value {main_memory_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {main_memory_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {main_memory_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {main_memory_s1_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {main_memory_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {main_memory_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {main_memory_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {main_memory_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {main_memory_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {main_memory_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {main_memory_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {main_memory_s1_translator} {USE_AV_CLKEN} {1};set_instance_parameter_value {main_memory_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {main_memory_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {main_memory_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {main_memory_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {main_memory_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {main_memory_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {main_memory_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {main_memory_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {main_memory_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {main_memory_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {main_memory_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {main_memory_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {main_memory_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {main_memory_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {main_memory_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {main_memory_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {main_memory_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {main_memory_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {main_memory_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {main_memory_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {main_memory_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {main_memory_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {main_memory_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {main_memory_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};set_instance_parameter_value {main_memory_s1_translator} {WAITREQUEST_ALLOWANCE} {0};set_instance_parameter_value {main_memory_s1_translator} {SYNC_RESET} {0};add_instance {nios2_data_master_agent} {altera_merlin_master_agent};set_instance_parameter_value {nios2_data_master_agent} {PKT_WUNIQUE} {122};set_instance_parameter_value {nios2_data_master_agent} {PKT_DOMAIN_H} {121};set_instance_parameter_value {nios2_data_master_agent} {PKT_DOMAIN_L} {120};set_instance_parameter_value {nios2_data_master_agent} {PKT_SNOOP_H} {119};set_instance_parameter_value {nios2_data_master_agent} {PKT_SNOOP_L} {116};set_instance_parameter_value {nios2_data_master_agent} {PKT_BARRIER_H} {115};set_instance_parameter_value {nios2_data_master_agent} {PKT_BARRIER_L} {114};set_instance_parameter_value {nios2_data_master_agent} {PKT_ORI_BURST_SIZE_H} {113};set_instance_parameter_value {nios2_data_master_agent} {PKT_ORI_BURST_SIZE_L} {111};set_instance_parameter_value {nios2_data_master_agent} {PKT_RESPONSE_STATUS_H} {110};set_instance_parameter_value {nios2_data_master_agent} {PKT_RESPONSE_STATUS_L} {109};set_instance_parameter_value {nios2_data_master_agent} {PKT_QOS_H} {94};set_instance_parameter_value {nios2_data_master_agent} {PKT_QOS_L} {94};set_instance_parameter_value {nios2_data_master_agent} {PKT_DATA_SIDEBAND_H} {92};set_instance_parameter_value {nios2_data_master_agent} {PKT_DATA_SIDEBAND_L} {92};set_instance_parameter_value {nios2_data_master_agent} {PKT_ADDR_SIDEBAND_H} {91};set_instance_parameter_value {nios2_data_master_agent} {PKT_ADDR_SIDEBAND_L} {91};set_instance_parameter_value {nios2_data_master_agent} {PKT_BURST_TYPE_H} {90};set_instance_parameter_value {nios2_data_master_agent} {PKT_BURST_TYPE_L} {89};set_instance_parameter_value {nios2_data_master_agent} {PKT_CACHE_H} {108};set_instance_parameter_value {nios2_data_master_agent} {PKT_CACHE_L} {105};set_instance_parameter_value {nios2_data_master_agent} {PKT_THREAD_ID_H} {101};set_instance_parameter_value {nios2_data_master_agent} {PKT_THREAD_ID_L} {101};set_instance_parameter_value {nios2_data_master_agent} {PKT_BURST_SIZE_H} {88};set_instance_parameter_value {nios2_data_master_agent} {PKT_BURST_SIZE_L} {86};set_instance_parameter_value {nios2_data_master_agent} {PKT_TRANS_EXCLUSIVE} {67};set_instance_parameter_value {nios2_data_master_agent} {PKT_TRANS_LOCK} {66};set_instance_parameter_value {nios2_data_master_agent} {PKT_BEGIN_BURST} {93};set_instance_parameter_value {nios2_data_master_agent} {PKT_PROTECTION_H} {104};set_instance_parameter_value {nios2_data_master_agent} {PKT_PROTECTION_L} {102};set_instance_parameter_value {nios2_data_master_agent} {PKT_BURSTWRAP_H} {85};set_instance_parameter_value {nios2_data_master_agent} {PKT_BURSTWRAP_L} {77};set_instance_parameter_value {nios2_data_master_agent} {PKT_BYTE_CNT_H} {76};set_instance_parameter_value {nios2_data_master_agent} {PKT_BYTE_CNT_L} {68};set_instance_parameter_value {nios2_data_master_agent} {PKT_ADDR_H} {61};set_instance_parameter_value {nios2_data_master_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {nios2_data_master_agent} {PKT_TRANS_COMPRESSED_READ} {62};set_instance_parameter_value {nios2_data_master_agent} {PKT_TRANS_POSTED} {63};set_instance_parameter_value {nios2_data_master_agent} {PKT_TRANS_WRITE} {64};set_instance_parameter_value {nios2_data_master_agent} {PKT_TRANS_READ} {65};set_instance_parameter_value {nios2_data_master_agent} {PKT_DATA_H} {31};set_instance_parameter_value {nios2_data_master_agent} {PKT_DATA_L} {0};set_instance_parameter_value {nios2_data_master_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {nios2_data_master_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {nios2_data_master_agent} {PKT_SRC_ID_H} {97};set_instance_parameter_value {nios2_data_master_agent} {PKT_SRC_ID_L} {95};set_instance_parameter_value {nios2_data_master_agent} {PKT_DEST_ID_H} {100};set_instance_parameter_value {nios2_data_master_agent} {PKT_DEST_ID_L} {98};set_instance_parameter_value {nios2_data_master_agent} {ST_DATA_W} {123};set_instance_parameter_value {nios2_data_master_agent} {ST_CHANNEL_W} {5};set_instance_parameter_value {nios2_data_master_agent} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {nios2_data_master_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {nios2_data_master_agent} {AV_BURSTBOUNDARIES} {1};set_instance_parameter_value {nios2_data_master_agent} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {nios2_data_master_agent} {ADDR_MAP} {&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?&gt;
&lt;address_map&gt;
 &lt;slave
   id=&quot;2&quot;
   name=&quot;jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0&quot;
   start=&quot;0x0000000002041200&quot;
   end=&quot;0x00000000002041208&quot;
   responds=&quot;1&quot;
   user_default=&quot;0&quot; /&gt;
 &lt;slave
   id=&quot;0&quot;
   name=&quot;gfilsh_avl_csr_translator.avalon_universal_slave_0&quot;
   start=&quot;0x0000000002041100&quot;
   end=&quot;0x00000000002041200&quot;
   responds=&quot;1&quot;
   user_default=&quot;0&quot; /&gt;
 &lt;slave
   id=&quot;1&quot;
   name=&quot;gfilsh_avl_mem_translator.avalon_universal_slave_0&quot;
   start=&quot;0x0000000000000000&quot;
   end=&quot;0x00000000002000000&quot;
   responds=&quot;1&quot;
   user_default=&quot;0&quot; /&gt;
 &lt;slave
   id=&quot;4&quot;
   name=&quot;nios2_debug_mem_slave_translator.avalon_universal_slave_0&quot;
   start=&quot;0x0000000002040800&quot;
   end=&quot;0x00000000002041000&quot;
   responds=&quot;1&quot;
   user_default=&quot;0&quot; /&gt;
 &lt;slave
   id=&quot;3&quot;
   name=&quot;main_memory_s1_translator.avalon_universal_slave_0&quot;
   start=&quot;0x0000000002020000&quot;
   end=&quot;0x00000000002040000&quot;
   responds=&quot;1&quot;
   user_default=&quot;0&quot; /&gt;
&lt;/address_map&gt;
};set_instance_parameter_value {nios2_data_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {nios2_data_master_agent} {ID} {0};set_instance_parameter_value {nios2_data_master_agent} {BURSTWRAP_VALUE} {511};set_instance_parameter_value {nios2_data_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {nios2_data_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {nios2_data_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_data_master_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {nios2_data_master_agent} {DOMAIN_VALUE} {3};set_instance_parameter_value {nios2_data_master_agent} {BARRIER_VALUE} {0};set_instance_parameter_value {nios2_data_master_agent} {SNOOP_VALUE} {0};set_instance_parameter_value {nios2_data_master_agent} {WUNIQUE_VALUE} {0};set_instance_parameter_value {nios2_data_master_agent} {SYNC_RESET} {0};add_instance {nios2_instruction_master_agent} {altera_merlin_master_agent};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_WUNIQUE} {122};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_DOMAIN_H} {121};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_DOMAIN_L} {120};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_SNOOP_H} {119};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_SNOOP_L} {116};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_BARRIER_H} {115};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_BARRIER_L} {114};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_ORI_BURST_SIZE_H} {113};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_ORI_BURST_SIZE_L} {111};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_RESPONSE_STATUS_H} {110};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_RESPONSE_STATUS_L} {109};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_QOS_H} {94};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_QOS_L} {94};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_DATA_SIDEBAND_H} {92};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_DATA_SIDEBAND_L} {92};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_ADDR_SIDEBAND_H} {91};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_ADDR_SIDEBAND_L} {91};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_BURST_TYPE_H} {90};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_BURST_TYPE_L} {89};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_CACHE_H} {108};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_CACHE_L} {105};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_THREAD_ID_H} {101};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_THREAD_ID_L} {101};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_BURST_SIZE_H} {88};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_BURST_SIZE_L} {86};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_TRANS_EXCLUSIVE} {67};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_TRANS_LOCK} {66};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_BEGIN_BURST} {93};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_PROTECTION_H} {104};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_PROTECTION_L} {102};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_BURSTWRAP_H} {85};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_BURSTWRAP_L} {77};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_BYTE_CNT_H} {76};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_BYTE_CNT_L} {68};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_ADDR_H} {61};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_TRANS_COMPRESSED_READ} {62};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_TRANS_POSTED} {63};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_TRANS_WRITE} {64};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_TRANS_READ} {65};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_DATA_H} {31};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_DATA_L} {0};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_SRC_ID_H} {97};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_SRC_ID_L} {95};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_DEST_ID_H} {100};set_instance_parameter_value {nios2_instruction_master_agent} {PKT_DEST_ID_L} {98};set_instance_parameter_value {nios2_instruction_master_agent} {ST_DATA_W} {123};set_instance_parameter_value {nios2_instruction_master_agent} {ST_CHANNEL_W} {5};set_instance_parameter_value {nios2_instruction_master_agent} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {nios2_instruction_master_agent} {AV_LINEWRAPBURSTS} {1};set_instance_parameter_value {nios2_instruction_master_agent} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {nios2_instruction_master_agent} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {nios2_instruction_master_agent} {ADDR_MAP} {&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?&gt;
&lt;address_map&gt;
 &lt;slave
   id=&quot;3&quot;
   name=&quot;main_memory_s1_translator.avalon_universal_slave_0&quot;
   start=&quot;0x0000000002020000&quot;
   end=&quot;0x00000000002040000&quot;
   responds=&quot;1&quot;
   user_default=&quot;0&quot; /&gt;
 &lt;slave
   id=&quot;0&quot;
   name=&quot;gfilsh_avl_csr_translator.avalon_universal_slave_0&quot;
   start=&quot;0x0000000002041100&quot;
   end=&quot;0x00000000002041200&quot;
   responds=&quot;1&quot;
   user_default=&quot;0&quot; /&gt;
 &lt;slave
   id=&quot;4&quot;
   name=&quot;nios2_debug_mem_slave_translator.avalon_universal_slave_0&quot;
   start=&quot;0x0000000002040800&quot;
   end=&quot;0x00000000002041000&quot;
   responds=&quot;1&quot;
   user_default=&quot;0&quot; /&gt;
&lt;/address_map&gt;
};set_instance_parameter_value {nios2_instruction_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {nios2_instruction_master_agent} {ID} {1};set_instance_parameter_value {nios2_instruction_master_agent} {BURSTWRAP_VALUE} {3};set_instance_parameter_value {nios2_instruction_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {nios2_instruction_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {nios2_instruction_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_instruction_master_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {nios2_instruction_master_agent} {DOMAIN_VALUE} {3};set_instance_parameter_value {nios2_instruction_master_agent} {BARRIER_VALUE} {0};set_instance_parameter_value {nios2_instruction_master_agent} {SNOOP_VALUE} {0};set_instance_parameter_value {nios2_instruction_master_agent} {WUNIQUE_VALUE} {0};set_instance_parameter_value {nios2_instruction_master_agent} {SYNC_RESET} {0};add_instance {jtag_uart_avalon_jtag_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ORI_BURST_SIZE_H} {113};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ORI_BURST_SIZE_L} {111};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_RESPONSE_STATUS_H} {110};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_RESPONSE_STATUS_L} {109};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURST_SIZE_H} {88};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURST_SIZE_L} {86};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_LOCK} {66};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BEGIN_BURST} {93};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_PROTECTION_H} {104};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_PROTECTION_L} {102};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURSTWRAP_H} {85};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURSTWRAP_L} {77};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTE_CNT_H} {76};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTE_CNT_L} {68};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ADDR_H} {61};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_COMPRESSED_READ} {62};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_POSTED} {63};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_WRITE} {64};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_READ} {65};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SRC_ID_H} {97};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SRC_ID_L} {95};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DEST_ID_H} {100};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DEST_ID_L} {98};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ST_CHANNEL_W} {5};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ST_DATA_W} {123};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {MAX_BURSTWRAP} {511};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ID} {2};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ECC_ENABLE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {SYNC_RESET} {0};add_instance {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {124};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {gfilsh_avl_csr_agent} {altera_merlin_slave_agent};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_ORI_BURST_SIZE_H} {113};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_ORI_BURST_SIZE_L} {111};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_RESPONSE_STATUS_H} {110};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_RESPONSE_STATUS_L} {109};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_BURST_SIZE_H} {88};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_BURST_SIZE_L} {86};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_TRANS_LOCK} {66};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_BEGIN_BURST} {93};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_PROTECTION_H} {104};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_PROTECTION_L} {102};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_BURSTWRAP_H} {85};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_BURSTWRAP_L} {77};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_BYTE_CNT_H} {76};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_BYTE_CNT_L} {68};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_ADDR_H} {61};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_TRANS_COMPRESSED_READ} {62};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_TRANS_POSTED} {63};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_TRANS_WRITE} {64};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_TRANS_READ} {65};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_DATA_H} {31};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_DATA_L} {0};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_SRC_ID_H} {97};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_SRC_ID_L} {95};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_DEST_ID_H} {100};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_DEST_ID_L} {98};set_instance_parameter_value {gfilsh_avl_csr_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {gfilsh_avl_csr_agent} {ST_CHANNEL_W} {5};set_instance_parameter_value {gfilsh_avl_csr_agent} {ST_DATA_W} {123};set_instance_parameter_value {gfilsh_avl_csr_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {gfilsh_avl_csr_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {gfilsh_avl_csr_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {gfilsh_avl_csr_agent} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {gfilsh_avl_csr_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {gfilsh_avl_csr_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {gfilsh_avl_csr_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {gfilsh_avl_csr_agent} {MAX_BURSTWRAP} {511};set_instance_parameter_value {gfilsh_avl_csr_agent} {ID} {0};set_instance_parameter_value {gfilsh_avl_csr_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {gfilsh_avl_csr_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {gfilsh_avl_csr_agent} {ECC_ENABLE} {0};set_instance_parameter_value {gfilsh_avl_csr_agent} {SYNC_RESET} {0};add_instance {gfilsh_avl_csr_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {gfilsh_avl_csr_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {gfilsh_avl_csr_agent_rsp_fifo} {BITS_PER_SYMBOL} {124};set_instance_parameter_value {gfilsh_avl_csr_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {gfilsh_avl_csr_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {gfilsh_avl_csr_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {gfilsh_avl_csr_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {gfilsh_avl_csr_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {gfilsh_avl_csr_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {gfilsh_avl_csr_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {gfilsh_avl_csr_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {gfilsh_avl_csr_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {gfilsh_avl_csr_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {gfilsh_avl_csr_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {gfilsh_avl_csr_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {gfilsh_avl_mem_agent} {altera_merlin_slave_agent};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_ORI_BURST_SIZE_H} {113};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_ORI_BURST_SIZE_L} {111};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_RESPONSE_STATUS_H} {110};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_RESPONSE_STATUS_L} {109};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_BURST_SIZE_H} {88};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_BURST_SIZE_L} {86};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_TRANS_LOCK} {66};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_BEGIN_BURST} {93};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_PROTECTION_H} {104};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_PROTECTION_L} {102};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_BURSTWRAP_H} {85};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_BURSTWRAP_L} {77};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_BYTE_CNT_H} {76};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_BYTE_CNT_L} {68};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_ADDR_H} {61};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_TRANS_COMPRESSED_READ} {62};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_TRANS_POSTED} {63};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_TRANS_WRITE} {64};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_TRANS_READ} {65};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_DATA_H} {31};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_DATA_L} {0};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_SRC_ID_H} {97};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_SRC_ID_L} {95};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_DEST_ID_H} {100};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_DEST_ID_L} {98};set_instance_parameter_value {gfilsh_avl_mem_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {gfilsh_avl_mem_agent} {ST_CHANNEL_W} {5};set_instance_parameter_value {gfilsh_avl_mem_agent} {ST_DATA_W} {123};set_instance_parameter_value {gfilsh_avl_mem_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {gfilsh_avl_mem_agent} {AVS_BURSTCOUNT_W} {9};set_instance_parameter_value {gfilsh_avl_mem_agent} {AV_LINEWRAPBURSTS} {1};set_instance_parameter_value {gfilsh_avl_mem_agent} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {gfilsh_avl_mem_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {gfilsh_avl_mem_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {gfilsh_avl_mem_agent} {MAX_BYTE_CNT} {256};set_instance_parameter_value {gfilsh_avl_mem_agent} {MAX_BURSTWRAP} {255};set_instance_parameter_value {gfilsh_avl_mem_agent} {ID} {1};set_instance_parameter_value {gfilsh_avl_mem_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {gfilsh_avl_mem_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {gfilsh_avl_mem_agent} {ECC_ENABLE} {0};set_instance_parameter_value {gfilsh_avl_mem_agent} {SYNC_RESET} {0};add_instance {gfilsh_avl_mem_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {gfilsh_avl_mem_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {gfilsh_avl_mem_agent_rsp_fifo} {BITS_PER_SYMBOL} {124};set_instance_parameter_value {gfilsh_avl_mem_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {gfilsh_avl_mem_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {gfilsh_avl_mem_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {gfilsh_avl_mem_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {gfilsh_avl_mem_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {gfilsh_avl_mem_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {gfilsh_avl_mem_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {gfilsh_avl_mem_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {gfilsh_avl_mem_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {gfilsh_avl_mem_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {gfilsh_avl_mem_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {gfilsh_avl_mem_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {nios2_debug_mem_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_ORI_BURST_SIZE_H} {113};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_ORI_BURST_SIZE_L} {111};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_RESPONSE_STATUS_H} {110};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_RESPONSE_STATUS_L} {109};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_BURST_SIZE_H} {88};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_BURST_SIZE_L} {86};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_TRANS_LOCK} {66};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_BEGIN_BURST} {93};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_PROTECTION_H} {104};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_PROTECTION_L} {102};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_BURSTWRAP_H} {85};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_BURSTWRAP_L} {77};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_BYTE_CNT_H} {76};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_BYTE_CNT_L} {68};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_ADDR_H} {61};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_TRANS_COMPRESSED_READ} {62};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_TRANS_POSTED} {63};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_TRANS_WRITE} {64};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_TRANS_READ} {65};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_SRC_ID_H} {97};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_SRC_ID_L} {95};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_DEST_ID_H} {100};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_DEST_ID_L} {98};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {nios2_debug_mem_slave_agent} {ST_CHANNEL_W} {5};set_instance_parameter_value {nios2_debug_mem_slave_agent} {ST_DATA_W} {123};set_instance_parameter_value {nios2_debug_mem_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {nios2_debug_mem_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {nios2_debug_mem_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {nios2_debug_mem_slave_agent} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {nios2_debug_mem_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {nios2_debug_mem_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {nios2_debug_mem_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {nios2_debug_mem_slave_agent} {MAX_BURSTWRAP} {511};set_instance_parameter_value {nios2_debug_mem_slave_agent} {ID} {4};set_instance_parameter_value {nios2_debug_mem_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_debug_mem_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {nios2_debug_mem_slave_agent} {ECC_ENABLE} {0};set_instance_parameter_value {nios2_debug_mem_slave_agent} {SYNC_RESET} {0};add_instance {nios2_debug_mem_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {nios2_debug_mem_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {nios2_debug_mem_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {124};set_instance_parameter_value {nios2_debug_mem_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {nios2_debug_mem_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {nios2_debug_mem_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {nios2_debug_mem_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {nios2_debug_mem_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {nios2_debug_mem_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {nios2_debug_mem_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {nios2_debug_mem_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {nios2_debug_mem_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {nios2_debug_mem_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {nios2_debug_mem_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {nios2_debug_mem_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {main_memory_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {main_memory_s1_agent} {PKT_ORI_BURST_SIZE_H} {113};set_instance_parameter_value {main_memory_s1_agent} {PKT_ORI_BURST_SIZE_L} {111};set_instance_parameter_value {main_memory_s1_agent} {PKT_RESPONSE_STATUS_H} {110};set_instance_parameter_value {main_memory_s1_agent} {PKT_RESPONSE_STATUS_L} {109};set_instance_parameter_value {main_memory_s1_agent} {PKT_BURST_SIZE_H} {88};set_instance_parameter_value {main_memory_s1_agent} {PKT_BURST_SIZE_L} {86};set_instance_parameter_value {main_memory_s1_agent} {PKT_TRANS_LOCK} {66};set_instance_parameter_value {main_memory_s1_agent} {PKT_BEGIN_BURST} {93};set_instance_parameter_value {main_memory_s1_agent} {PKT_PROTECTION_H} {104};set_instance_parameter_value {main_memory_s1_agent} {PKT_PROTECTION_L} {102};set_instance_parameter_value {main_memory_s1_agent} {PKT_BURSTWRAP_H} {85};set_instance_parameter_value {main_memory_s1_agent} {PKT_BURSTWRAP_L} {77};set_instance_parameter_value {main_memory_s1_agent} {PKT_BYTE_CNT_H} {76};set_instance_parameter_value {main_memory_s1_agent} {PKT_BYTE_CNT_L} {68};set_instance_parameter_value {main_memory_s1_agent} {PKT_ADDR_H} {61};set_instance_parameter_value {main_memory_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {main_memory_s1_agent} {PKT_TRANS_COMPRESSED_READ} {62};set_instance_parameter_value {main_memory_s1_agent} {PKT_TRANS_POSTED} {63};set_instance_parameter_value {main_memory_s1_agent} {PKT_TRANS_WRITE} {64};set_instance_parameter_value {main_memory_s1_agent} {PKT_TRANS_READ} {65};set_instance_parameter_value {main_memory_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {main_memory_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {main_memory_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {main_memory_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {main_memory_s1_agent} {PKT_SRC_ID_H} {97};set_instance_parameter_value {main_memory_s1_agent} {PKT_SRC_ID_L} {95};set_instance_parameter_value {main_memory_s1_agent} {PKT_DEST_ID_H} {100};set_instance_parameter_value {main_memory_s1_agent} {PKT_DEST_ID_L} {98};set_instance_parameter_value {main_memory_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {main_memory_s1_agent} {ST_CHANNEL_W} {5};set_instance_parameter_value {main_memory_s1_agent} {ST_DATA_W} {123};set_instance_parameter_value {main_memory_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {main_memory_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {main_memory_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {main_memory_s1_agent} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {main_memory_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {main_memory_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {main_memory_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {main_memory_s1_agent} {MAX_BURSTWRAP} {511};set_instance_parameter_value {main_memory_s1_agent} {ID} {3};set_instance_parameter_value {main_memory_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {main_memory_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {main_memory_s1_agent} {ECC_ENABLE} {0};set_instance_parameter_value {main_memory_s1_agent} {SYNC_RESET} {0};add_instance {main_memory_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {main_memory_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {main_memory_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {124};set_instance_parameter_value {main_memory_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {main_memory_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {main_memory_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {main_memory_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {main_memory_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {main_memory_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {main_memory_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {main_memory_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {main_memory_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {main_memory_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {main_memory_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {main_memory_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {router} {altera_merlin_router};set_instance_parameter_value {router} {DESTINATION_ID} {1 3 4 0 2 };set_instance_parameter_value {router} {CHANNEL_ID} {00100 10000 01000 00010 00001 };set_instance_parameter_value {router} {TYPE_OF_TRANSACTION} {both both both both both };set_instance_parameter_value {router} {START_ADDRESS} {0x0 0x2020000 0x2040800 0x2041100 0x2041200 };set_instance_parameter_value {router} {END_ADDRESS} {0x2000000 0x2040000 0x2041000 0x2041200 0x2041208 };set_instance_parameter_value {router} {NON_SECURED_TAG} {1 1 1 1 1 };set_instance_parameter_value {router} {SECURED_RANGE_PAIRS} {0 0 0 0 0 };set_instance_parameter_value {router} {SECURED_RANGE_LIST} {0 0 0 0 0 };set_instance_parameter_value {router} {SPAN_OFFSET} {};set_instance_parameter_value {router} {PKT_ADDR_H} {61};set_instance_parameter_value {router} {PKT_ADDR_L} {36};set_instance_parameter_value {router} {PKT_PROTECTION_H} {104};set_instance_parameter_value {router} {PKT_PROTECTION_L} {102};set_instance_parameter_value {router} {PKT_DEST_ID_H} {100};set_instance_parameter_value {router} {PKT_DEST_ID_L} {98};set_instance_parameter_value {router} {PKT_TRANS_WRITE} {64};set_instance_parameter_value {router} {PKT_TRANS_READ} {65};set_instance_parameter_value {router} {ST_DATA_W} {123};set_instance_parameter_value {router} {ST_CHANNEL_W} {5};set_instance_parameter_value {router} {DECODER_TYPE} {0};set_instance_parameter_value {router} {DEFAULT_CHANNEL} {2};set_instance_parameter_value {router} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_DESTID} {1};set_instance_parameter_value {router} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router} {SYNC_RESET} {0};add_instance {router_001} {altera_merlin_router};set_instance_parameter_value {router_001} {DESTINATION_ID} {3 4 0 };set_instance_parameter_value {router_001} {CHANNEL_ID} {100 010 001 };set_instance_parameter_value {router_001} {TYPE_OF_TRANSACTION} {both both both };set_instance_parameter_value {router_001} {START_ADDRESS} {0x2020000 0x2040800 0x2041100 };set_instance_parameter_value {router_001} {END_ADDRESS} {0x2040000 0x2041000 0x2041200 };set_instance_parameter_value {router_001} {NON_SECURED_TAG} {1 1 1 };set_instance_parameter_value {router_001} {SECURED_RANGE_PAIRS} {0 0 0 };set_instance_parameter_value {router_001} {SECURED_RANGE_LIST} {0 0 0 };set_instance_parameter_value {router_001} {SPAN_OFFSET} {};set_instance_parameter_value {router_001} {PKT_ADDR_H} {61};set_instance_parameter_value {router_001} {PKT_ADDR_L} {36};set_instance_parameter_value {router_001} {PKT_PROTECTION_H} {104};set_instance_parameter_value {router_001} {PKT_PROTECTION_L} {102};set_instance_parameter_value {router_001} {PKT_DEST_ID_H} {100};set_instance_parameter_value {router_001} {PKT_DEST_ID_L} {98};set_instance_parameter_value {router_001} {PKT_TRANS_WRITE} {64};set_instance_parameter_value {router_001} {PKT_TRANS_READ} {65};set_instance_parameter_value {router_001} {ST_DATA_W} {123};set_instance_parameter_value {router_001} {ST_CHANNEL_W} {5};set_instance_parameter_value {router_001} {DECODER_TYPE} {0};set_instance_parameter_value {router_001} {DEFAULT_CHANNEL} {2};set_instance_parameter_value {router_001} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_DESTID} {3};set_instance_parameter_value {router_001} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_001} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router_001} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router_001} {SYNC_RESET} {0};add_instance {router_002} {altera_merlin_router};set_instance_parameter_value {router_002} {DESTINATION_ID} {0 };set_instance_parameter_value {router_002} {CHANNEL_ID} {1 };set_instance_parameter_value {router_002} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_002} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_002} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_002} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_002} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_002} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_002} {SPAN_OFFSET} {};set_instance_parameter_value {router_002} {PKT_ADDR_H} {61};set_instance_parameter_value {router_002} {PKT_ADDR_L} {36};set_instance_parameter_value {router_002} {PKT_PROTECTION_H} {104};set_instance_parameter_value {router_002} {PKT_PROTECTION_L} {102};set_instance_parameter_value {router_002} {PKT_DEST_ID_H} {100};set_instance_parameter_value {router_002} {PKT_DEST_ID_L} {98};set_instance_parameter_value {router_002} {PKT_TRANS_WRITE} {64};set_instance_parameter_value {router_002} {PKT_TRANS_READ} {65};set_instance_parameter_value {router_002} {ST_DATA_W} {123};set_instance_parameter_value {router_002} {ST_CHANNEL_W} {5};set_instance_parameter_value {router_002} {DECODER_TYPE} {1};set_instance_parameter_value {router_002} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_002} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_002} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_002} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router_002} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router_002} {SYNC_RESET} {0};add_instance {router_003} {altera_merlin_router};set_instance_parameter_value {router_003} {DESTINATION_ID} {0 1 };set_instance_parameter_value {router_003} {CHANNEL_ID} {01 10 };set_instance_parameter_value {router_003} {TYPE_OF_TRANSACTION} {both read };set_instance_parameter_value {router_003} {START_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_003} {END_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_003} {NON_SECURED_TAG} {1 1 };set_instance_parameter_value {router_003} {SECURED_RANGE_PAIRS} {0 0 };set_instance_parameter_value {router_003} {SECURED_RANGE_LIST} {0 0 };set_instance_parameter_value {router_003} {SPAN_OFFSET} {};set_instance_parameter_value {router_003} {PKT_ADDR_H} {61};set_instance_parameter_value {router_003} {PKT_ADDR_L} {36};set_instance_parameter_value {router_003} {PKT_PROTECTION_H} {104};set_instance_parameter_value {router_003} {PKT_PROTECTION_L} {102};set_instance_parameter_value {router_003} {PKT_DEST_ID_H} {100};set_instance_parameter_value {router_003} {PKT_DEST_ID_L} {98};set_instance_parameter_value {router_003} {PKT_TRANS_WRITE} {64};set_instance_parameter_value {router_003} {PKT_TRANS_READ} {65};set_instance_parameter_value {router_003} {ST_DATA_W} {123};set_instance_parameter_value {router_003} {ST_CHANNEL_W} {5};set_instance_parameter_value {router_003} {DECODER_TYPE} {1};set_instance_parameter_value {router_003} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_003} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_003} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_003} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_003} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_003} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router_003} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router_003} {SYNC_RESET} {0};add_instance {router_004} {altera_merlin_router};set_instance_parameter_value {router_004} {DESTINATION_ID} {0 };set_instance_parameter_value {router_004} {CHANNEL_ID} {1 };set_instance_parameter_value {router_004} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_004} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_004} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_004} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_004} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_004} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_004} {SPAN_OFFSET} {};set_instance_parameter_value {router_004} {PKT_ADDR_H} {61};set_instance_parameter_value {router_004} {PKT_ADDR_L} {36};set_instance_parameter_value {router_004} {PKT_PROTECTION_H} {104};set_instance_parameter_value {router_004} {PKT_PROTECTION_L} {102};set_instance_parameter_value {router_004} {PKT_DEST_ID_H} {100};set_instance_parameter_value {router_004} {PKT_DEST_ID_L} {98};set_instance_parameter_value {router_004} {PKT_TRANS_WRITE} {64};set_instance_parameter_value {router_004} {PKT_TRANS_READ} {65};set_instance_parameter_value {router_004} {ST_DATA_W} {123};set_instance_parameter_value {router_004} {ST_CHANNEL_W} {5};set_instance_parameter_value {router_004} {DECODER_TYPE} {1};set_instance_parameter_value {router_004} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_004} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_004} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_004} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_004} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_004} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router_004} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router_004} {SYNC_RESET} {0};add_instance {router_005} {altera_merlin_router};set_instance_parameter_value {router_005} {DESTINATION_ID} {0 1 };set_instance_parameter_value {router_005} {CHANNEL_ID} {01 10 };set_instance_parameter_value {router_005} {TYPE_OF_TRANSACTION} {both read };set_instance_parameter_value {router_005} {START_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_005} {END_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_005} {NON_SECURED_TAG} {1 1 };set_instance_parameter_value {router_005} {SECURED_RANGE_PAIRS} {0 0 };set_instance_parameter_value {router_005} {SECURED_RANGE_LIST} {0 0 };set_instance_parameter_value {router_005} {SPAN_OFFSET} {};set_instance_parameter_value {router_005} {PKT_ADDR_H} {61};set_instance_parameter_value {router_005} {PKT_ADDR_L} {36};set_instance_parameter_value {router_005} {PKT_PROTECTION_H} {104};set_instance_parameter_value {router_005} {PKT_PROTECTION_L} {102};set_instance_parameter_value {router_005} {PKT_DEST_ID_H} {100};set_instance_parameter_value {router_005} {PKT_DEST_ID_L} {98};set_instance_parameter_value {router_005} {PKT_TRANS_WRITE} {64};set_instance_parameter_value {router_005} {PKT_TRANS_READ} {65};set_instance_parameter_value {router_005} {ST_DATA_W} {123};set_instance_parameter_value {router_005} {ST_CHANNEL_W} {5};set_instance_parameter_value {router_005} {DECODER_TYPE} {1};set_instance_parameter_value {router_005} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_005} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_005} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_005} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_005} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_005} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router_005} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router_005} {SYNC_RESET} {0};add_instance {router_006} {altera_merlin_router};set_instance_parameter_value {router_006} {DESTINATION_ID} {0 1 };set_instance_parameter_value {router_006} {CHANNEL_ID} {01 10 };set_instance_parameter_value {router_006} {TYPE_OF_TRANSACTION} {both read };set_instance_parameter_value {router_006} {START_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_006} {END_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_006} {NON_SECURED_TAG} {1 1 };set_instance_parameter_value {router_006} {SECURED_RANGE_PAIRS} {0 0 };set_instance_parameter_value {router_006} {SECURED_RANGE_LIST} {0 0 };set_instance_parameter_value {router_006} {SPAN_OFFSET} {};set_instance_parameter_value {router_006} {PKT_ADDR_H} {61};set_instance_parameter_value {router_006} {PKT_ADDR_L} {36};set_instance_parameter_value {router_006} {PKT_PROTECTION_H} {104};set_instance_parameter_value {router_006} {PKT_PROTECTION_L} {102};set_instance_parameter_value {router_006} {PKT_DEST_ID_H} {100};set_instance_parameter_value {router_006} {PKT_DEST_ID_L} {98};set_instance_parameter_value {router_006} {PKT_TRANS_WRITE} {64};set_instance_parameter_value {router_006} {PKT_TRANS_READ} {65};set_instance_parameter_value {router_006} {ST_DATA_W} {123};set_instance_parameter_value {router_006} {ST_CHANNEL_W} {5};set_instance_parameter_value {router_006} {DECODER_TYPE} {1};set_instance_parameter_value {router_006} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_006} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_006} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_006} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_006} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_006} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router_006} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router_006} {SYNC_RESET} {0};add_instance {nios2_data_master_limiter} {altera_merlin_traffic_limiter};set_instance_parameter_value {nios2_data_master_limiter} {SYNC_RESET} {0};set_instance_parameter_value {nios2_data_master_limiter} {PKT_DEST_ID_H} {100};set_instance_parameter_value {nios2_data_master_limiter} {PKT_DEST_ID_L} {98};set_instance_parameter_value {nios2_data_master_limiter} {PKT_SRC_ID_H} {97};set_instance_parameter_value {nios2_data_master_limiter} {PKT_SRC_ID_L} {95};set_instance_parameter_value {nios2_data_master_limiter} {PKT_BYTE_CNT_H} {76};set_instance_parameter_value {nios2_data_master_limiter} {PKT_BYTE_CNT_L} {68};set_instance_parameter_value {nios2_data_master_limiter} {PKT_BYTEEN_H} {35};set_instance_parameter_value {nios2_data_master_limiter} {PKT_BYTEEN_L} {32};set_instance_parameter_value {nios2_data_master_limiter} {PKT_TRANS_POSTED} {63};set_instance_parameter_value {nios2_data_master_limiter} {PKT_TRANS_WRITE} {64};set_instance_parameter_value {nios2_data_master_limiter} {PKT_THREAD_ID_H} {101};set_instance_parameter_value {nios2_data_master_limiter} {PKT_THREAD_ID_L} {101};set_instance_parameter_value {nios2_data_master_limiter} {MAX_BURST_LENGTH} {1};set_instance_parameter_value {nios2_data_master_limiter} {MAX_OUTSTANDING_RESPONSES} {2};set_instance_parameter_value {nios2_data_master_limiter} {PIPELINED} {0};set_instance_parameter_value {nios2_data_master_limiter} {ST_DATA_W} {123};set_instance_parameter_value {nios2_data_master_limiter} {ST_CHANNEL_W} {5};set_instance_parameter_value {nios2_data_master_limiter} {VALID_WIDTH} {5};set_instance_parameter_value {nios2_data_master_limiter} {ENFORCE_ORDER} {1};set_instance_parameter_value {nios2_data_master_limiter} {PREVENT_HAZARDS} {0};set_instance_parameter_value {nios2_data_master_limiter} {SUPPORTS_POSTED_WRITES} {1};set_instance_parameter_value {nios2_data_master_limiter} {SUPPORTS_NONPOSTED_WRITES} {0};set_instance_parameter_value {nios2_data_master_limiter} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {nios2_data_master_limiter} {REORDER} {0};add_instance {nios2_instruction_master_limiter} {altera_merlin_traffic_limiter};set_instance_parameter_value {nios2_instruction_master_limiter} {SYNC_RESET} {0};set_instance_parameter_value {nios2_instruction_master_limiter} {PKT_DEST_ID_H} {100};set_instance_parameter_value {nios2_instruction_master_limiter} {PKT_DEST_ID_L} {98};set_instance_parameter_value {nios2_instruction_master_limiter} {PKT_SRC_ID_H} {97};set_instance_parameter_value {nios2_instruction_master_limiter} {PKT_SRC_ID_L} {95};set_instance_parameter_value {nios2_instruction_master_limiter} {PKT_BYTE_CNT_H} {76};set_instance_parameter_value {nios2_instruction_master_limiter} {PKT_BYTE_CNT_L} {68};set_instance_parameter_value {nios2_instruction_master_limiter} {PKT_BYTEEN_H} {35};set_instance_parameter_value {nios2_instruction_master_limiter} {PKT_BYTEEN_L} {32};set_instance_parameter_value {nios2_instruction_master_limiter} {PKT_TRANS_POSTED} {63};set_instance_parameter_value {nios2_instruction_master_limiter} {PKT_TRANS_WRITE} {64};set_instance_parameter_value {nios2_instruction_master_limiter} {PKT_THREAD_ID_H} {101};set_instance_parameter_value {nios2_instruction_master_limiter} {PKT_THREAD_ID_L} {101};set_instance_parameter_value {nios2_instruction_master_limiter} {MAX_BURST_LENGTH} {1};set_instance_parameter_value {nios2_instruction_master_limiter} {MAX_OUTSTANDING_RESPONSES} {2};set_instance_parameter_value {nios2_instruction_master_limiter} {PIPELINED} {0};set_instance_parameter_value {nios2_instruction_master_limiter} {ST_DATA_W} {123};set_instance_parameter_value {nios2_instruction_master_limiter} {ST_CHANNEL_W} {5};set_instance_parameter_value {nios2_instruction_master_limiter} {VALID_WIDTH} {5};set_instance_parameter_value {nios2_instruction_master_limiter} {ENFORCE_ORDER} {1};set_instance_parameter_value {nios2_instruction_master_limiter} {PREVENT_HAZARDS} {0};set_instance_parameter_value {nios2_instruction_master_limiter} {SUPPORTS_POSTED_WRITES} {1};set_instance_parameter_value {nios2_instruction_master_limiter} {SUPPORTS_NONPOSTED_WRITES} {0};set_instance_parameter_value {nios2_instruction_master_limiter} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {nios2_instruction_master_limiter} {REORDER} {0};add_instance {cmd_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {cmd_demux} {ST_DATA_W} {123};set_instance_parameter_value {cmd_demux} {ST_CHANNEL_W} {5};set_instance_parameter_value {cmd_demux} {NUM_OUTPUTS} {5};set_instance_parameter_value {cmd_demux} {VALID_WIDTH} {5};set_instance_parameter_value {cmd_demux} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_demux} {SYNC_RESET} {0};add_instance {cmd_demux_001} {altera_merlin_demultiplexer};set_instance_parameter_value {cmd_demux_001} {ST_DATA_W} {123};set_instance_parameter_value {cmd_demux_001} {ST_CHANNEL_W} {5};set_instance_parameter_value {cmd_demux_001} {NUM_OUTPUTS} {3};set_instance_parameter_value {cmd_demux_001} {VALID_WIDTH} {5};set_instance_parameter_value {cmd_demux_001} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_demux_001} {SYNC_RESET} {0};add_instance {cmd_mux} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux} {ST_DATA_W} {123};set_instance_parameter_value {cmd_mux} {ST_CHANNEL_W} {5};set_instance_parameter_value {cmd_mux} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux} {PKT_TRANS_LOCK} {66};set_instance_parameter_value {cmd_mux} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_mux} {SYNC_RESET} {0};add_instance {cmd_mux_001} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_001} {ST_DATA_W} {123};set_instance_parameter_value {cmd_mux_001} {ST_CHANNEL_W} {5};set_instance_parameter_value {cmd_mux_001} {NUM_INPUTS} {2};set_instance_parameter_value {cmd_mux_001} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_001} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_001} {PKT_TRANS_LOCK} {66};set_instance_parameter_value {cmd_mux_001} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_001} {ARBITRATION_SHARES} {1 1 };set_instance_parameter_value {cmd_mux_001} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_mux_001} {SYNC_RESET} {0};add_instance {cmd_mux_002} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_002} {ST_DATA_W} {123};set_instance_parameter_value {cmd_mux_002} {ST_CHANNEL_W} {5};set_instance_parameter_value {cmd_mux_002} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_002} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_002} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_002} {PKT_TRANS_LOCK} {66};set_instance_parameter_value {cmd_mux_002} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_002} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_002} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_mux_002} {SYNC_RESET} {0};add_instance {cmd_mux_003} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_003} {ST_DATA_W} {123};set_instance_parameter_value {cmd_mux_003} {ST_CHANNEL_W} {5};set_instance_parameter_value {cmd_mux_003} {NUM_INPUTS} {2};set_instance_parameter_value {cmd_mux_003} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_003} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_003} {PKT_TRANS_LOCK} {66};set_instance_parameter_value {cmd_mux_003} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_003} {ARBITRATION_SHARES} {1 1 };set_instance_parameter_value {cmd_mux_003} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_mux_003} {SYNC_RESET} {0};add_instance {cmd_mux_004} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_004} {ST_DATA_W} {123};set_instance_parameter_value {cmd_mux_004} {ST_CHANNEL_W} {5};set_instance_parameter_value {cmd_mux_004} {NUM_INPUTS} {2};set_instance_parameter_value {cmd_mux_004} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_004} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_004} {PKT_TRANS_LOCK} {66};set_instance_parameter_value {cmd_mux_004} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_004} {ARBITRATION_SHARES} {1 1 };set_instance_parameter_value {cmd_mux_004} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_mux_004} {SYNC_RESET} {0};add_instance {rsp_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux} {ST_DATA_W} {123};set_instance_parameter_value {rsp_demux} {ST_CHANNEL_W} {5};set_instance_parameter_value {rsp_demux} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_demux} {SYNC_RESET} {0};add_instance {rsp_demux_001} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_001} {ST_DATA_W} {123};set_instance_parameter_value {rsp_demux_001} {ST_CHANNEL_W} {5};set_instance_parameter_value {rsp_demux_001} {NUM_OUTPUTS} {2};set_instance_parameter_value {rsp_demux_001} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_001} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_demux_001} {SYNC_RESET} {0};add_instance {rsp_demux_002} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_002} {ST_DATA_W} {123};set_instance_parameter_value {rsp_demux_002} {ST_CHANNEL_W} {5};set_instance_parameter_value {rsp_demux_002} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_002} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_002} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_demux_002} {SYNC_RESET} {0};add_instance {rsp_demux_003} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_003} {ST_DATA_W} {123};set_instance_parameter_value {rsp_demux_003} {ST_CHANNEL_W} {5};set_instance_parameter_value {rsp_demux_003} {NUM_OUTPUTS} {2};set_instance_parameter_value {rsp_demux_003} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_003} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_demux_003} {SYNC_RESET} {0};add_instance {rsp_demux_004} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_004} {ST_DATA_W} {123};set_instance_parameter_value {rsp_demux_004} {ST_CHANNEL_W} {5};set_instance_parameter_value {rsp_demux_004} {NUM_OUTPUTS} {2};set_instance_parameter_value {rsp_demux_004} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_004} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_demux_004} {SYNC_RESET} {0};add_instance {rsp_mux} {altera_merlin_multiplexer};set_instance_parameter_value {rsp_mux} {ST_DATA_W} {123};set_instance_parameter_value {rsp_mux} {ST_CHANNEL_W} {5};set_instance_parameter_value {rsp_mux} {NUM_INPUTS} {5};set_instance_parameter_value {rsp_mux} {PIPELINE_ARB} {0};set_instance_parameter_value {rsp_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {rsp_mux} {PKT_TRANS_LOCK} {66};set_instance_parameter_value {rsp_mux} {ARBITRATION_SCHEME} {no-arb};set_instance_parameter_value {rsp_mux} {ARBITRATION_SHARES} {1 1 1 1 1 };set_instance_parameter_value {rsp_mux} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_mux} {SYNC_RESET} {0};add_instance {rsp_mux_001} {altera_merlin_multiplexer};set_instance_parameter_value {rsp_mux_001} {ST_DATA_W} {123};set_instance_parameter_value {rsp_mux_001} {ST_CHANNEL_W} {5};set_instance_parameter_value {rsp_mux_001} {NUM_INPUTS} {3};set_instance_parameter_value {rsp_mux_001} {PIPELINE_ARB} {0};set_instance_parameter_value {rsp_mux_001} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {rsp_mux_001} {PKT_TRANS_LOCK} {66};set_instance_parameter_value {rsp_mux_001} {ARBITRATION_SCHEME} {no-arb};set_instance_parameter_value {rsp_mux_001} {ARBITRATION_SHARES} {1 1 1 };set_instance_parameter_value {rsp_mux_001} {MERLIN_PACKET_FORMAT} {wunique(122) domain(121:120) snoop(119:116) barrier(115:114) ori_burst_size(113:111) response_status(110:109) cache(108:105) protection(104:102) thread_id(101) dest_id(100:98) src_id(97:95) qos(94) begin_burst(93) data_sideband(92) addr_sideband(91) burst_type(90:89) burst_size(88:86) burstwrap(85:77) byte_cnt(76:68) trans_exclusive(67) trans_lock(66) trans_read(65) trans_write(64) trans_posted(63) trans_compressed_read(62) addr(61:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_mux_001} {SYNC_RESET} {0};add_instance {nios2_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {nios2_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {nios2_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {nios2_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {nios2_reset_reset_bridge} {USE_RESET_REQUEST} {0};set_instance_parameter_value {nios2_reset_reset_bridge} {SYNC_RESET} {0};add_instance {sys_clk_out_clk_clock_bridge} {altera_clock_bridge};set_instance_parameter_value {sys_clk_out_clk_clock_bridge} {EXPLICIT_CLOCK_RATE} {100000000};set_instance_parameter_value {sys_clk_out_clk_clock_bridge} {NUM_CLOCK_OUTPUTS} {1};add_connection {nios2_data_master_translator.avalon_universal_master_0} {nios2_data_master_agent.av} {avalon};set_connection_parameter_value {nios2_data_master_translator.avalon_universal_master_0/nios2_data_master_agent.av} {arbitrationPriority} {1};set_connection_parameter_value {nios2_data_master_translator.avalon_universal_master_0/nios2_data_master_agent.av} {baseAddress} {0x0000};set_connection_parameter_value {nios2_data_master_translator.avalon_universal_master_0/nios2_data_master_agent.av} {defaultConnection} {false};set_connection_parameter_value {nios2_data_master_translator.avalon_universal_master_0/nios2_data_master_agent.av} {domainAlias} {};set_connection_parameter_value {nios2_data_master_translator.avalon_universal_master_0/nios2_data_master_agent.av} {maximumAdditionalLatency} {0};set_connection_parameter_value {nios2_data_master_translator.avalon_universal_master_0/nios2_data_master_agent.av} {clockCrossingAdapter} {AUTO};set_connection_parameter_value {nios2_data_master_translator.avalon_universal_master_0/nios2_data_master_agent.av} {insertDefaultSlave} {FALSE};set_connection_parameter_value {nios2_data_master_translator.avalon_universal_master_0/nios2_data_master_agent.av} {interconnectResetSource} {DEFAULT};set_connection_parameter_value {nios2_data_master_translator.avalon_universal_master_0/nios2_data_master_agent.av} {burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {nios2_data_master_translator.avalon_universal_master_0/nios2_data_master_agent.av} {enableEccProtection} {FALSE};set_connection_parameter_value {nios2_data_master_translator.avalon_universal_master_0/nios2_data_master_agent.av} {interconnectType} {STANDARD};set_connection_parameter_value {nios2_data_master_translator.avalon_universal_master_0/nios2_data_master_agent.av} {syncResets} {FALSE};add_connection {nios2_instruction_master_translator.avalon_universal_master_0} {nios2_instruction_master_agent.av} {avalon};set_connection_parameter_value {nios2_instruction_master_translator.avalon_universal_master_0/nios2_instruction_master_agent.av} {arbitrationPriority} {1};set_connection_parameter_value {nios2_instruction_master_translator.avalon_universal_master_0/nios2_instruction_master_agent.av} {baseAddress} {0x0000};set_connection_parameter_value {nios2_instruction_master_translator.avalon_universal_master_0/nios2_instruction_master_agent.av} {defaultConnection} {false};set_connection_parameter_value {nios2_instruction_master_translator.avalon_universal_master_0/nios2_instruction_master_agent.av} {domainAlias} {};set_connection_parameter_value {nios2_instruction_master_translator.avalon_universal_master_0/nios2_instruction_master_agent.av} {maximumAdditionalLatency} {0};set_connection_parameter_value {nios2_instruction_master_translator.avalon_universal_master_0/nios2_instruction_master_agent.av} {clockCrossingAdapter} {AUTO};set_connection_parameter_value {nios2_instruction_master_translator.avalon_universal_master_0/nios2_instruction_master_agent.av} {insertDefaultSlave} {FALSE};set_connection_parameter_value {nios2_instruction_master_translator.avalon_universal_master_0/nios2_instruction_master_agent.av} {interconnectResetSource} {DEFAULT};set_connection_parameter_value {nios2_instruction_master_translator.avalon_universal_master_0/nios2_instruction_master_agent.av} {burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {nios2_instruction_master_translator.avalon_universal_master_0/nios2_instruction_master_agent.av} {enableEccProtection} {FALSE};set_connection_parameter_value {nios2_instruction_master_translator.avalon_universal_master_0/nios2_instruction_master_agent.av} {interconnectType} {STANDARD};set_connection_parameter_value {nios2_instruction_master_translator.avalon_universal_master_0/nios2_instruction_master_agent.av} {syncResets} {FALSE};add_connection {jtag_uart_avalon_jtag_slave_agent.m0} {jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {maximumAdditionalLatency} {0};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {clockCrossingAdapter} {AUTO};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {insertDefaultSlave} {FALSE};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {interconnectResetSource} {DEFAULT};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {enableEccProtection} {FALSE};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {interconnectType} {STANDARD};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {syncResets} {FALSE};add_connection {jtag_uart_avalon_jtag_slave_agent.rf_source} {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.out} {jtag_uart_avalon_jtag_slave_agent.rf_sink} {avalon_streaming};add_connection {jtag_uart_avalon_jtag_slave_agent.rdata_fifo_src} {jtag_uart_avalon_jtag_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux.src} {jtag_uart_avalon_jtag_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux.src/jtag_uart_avalon_jtag_slave_agent.cp} {qsys_mm.command};add_connection {gfilsh_avl_csr_agent.m0} {gfilsh_avl_csr_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {gfilsh_avl_csr_agent.m0/gfilsh_avl_csr_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {gfilsh_avl_csr_agent.m0/gfilsh_avl_csr_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {gfilsh_avl_csr_agent.m0/gfilsh_avl_csr_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {gfilsh_avl_csr_agent.m0/gfilsh_avl_csr_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {gfilsh_avl_csr_agent.m0/gfilsh_avl_csr_translator.avalon_universal_slave_0} {maximumAdditionalLatency} {0};set_connection_parameter_value {gfilsh_avl_csr_agent.m0/gfilsh_avl_csr_translator.avalon_universal_slave_0} {clockCrossingAdapter} {AUTO};set_connection_parameter_value {gfilsh_avl_csr_agent.m0/gfilsh_avl_csr_translator.avalon_universal_slave_0} {insertDefaultSlave} {FALSE};set_connection_parameter_value {gfilsh_avl_csr_agent.m0/gfilsh_avl_csr_translator.avalon_universal_slave_0} {interconnectResetSource} {DEFAULT};set_connection_parameter_value {gfilsh_avl_csr_agent.m0/gfilsh_avl_csr_translator.avalon_universal_slave_0} {burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {gfilsh_avl_csr_agent.m0/gfilsh_avl_csr_translator.avalon_universal_slave_0} {enableEccProtection} {FALSE};set_connection_parameter_value {gfilsh_avl_csr_agent.m0/gfilsh_avl_csr_translator.avalon_universal_slave_0} {interconnectType} {STANDARD};set_connection_parameter_value {gfilsh_avl_csr_agent.m0/gfilsh_avl_csr_translator.avalon_universal_slave_0} {syncResets} {FALSE};add_connection {gfilsh_avl_csr_agent.rf_source} {gfilsh_avl_csr_agent_rsp_fifo.in} {avalon_streaming};add_connection {gfilsh_avl_csr_agent_rsp_fifo.out} {gfilsh_avl_csr_agent.rf_sink} {avalon_streaming};add_connection {gfilsh_avl_csr_agent.rdata_fifo_src} {gfilsh_avl_csr_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_001.src} {gfilsh_avl_csr_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_001.src/gfilsh_avl_csr_agent.cp} {qsys_mm.command};add_connection {gfilsh_avl_mem_agent.m0} {gfilsh_avl_mem_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {gfilsh_avl_mem_agent.m0/gfilsh_avl_mem_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {gfilsh_avl_mem_agent.m0/gfilsh_avl_mem_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {gfilsh_avl_mem_agent.m0/gfilsh_avl_mem_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {gfilsh_avl_mem_agent.m0/gfilsh_avl_mem_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {gfilsh_avl_mem_agent.m0/gfilsh_avl_mem_translator.avalon_universal_slave_0} {maximumAdditionalLatency} {0};set_connection_parameter_value {gfilsh_avl_mem_agent.m0/gfilsh_avl_mem_translator.avalon_universal_slave_0} {clockCrossingAdapter} {AUTO};set_connection_parameter_value {gfilsh_avl_mem_agent.m0/gfilsh_avl_mem_translator.avalon_universal_slave_0} {insertDefaultSlave} {FALSE};set_connection_parameter_value {gfilsh_avl_mem_agent.m0/gfilsh_avl_mem_translator.avalon_universal_slave_0} {interconnectResetSource} {DEFAULT};set_connection_parameter_value {gfilsh_avl_mem_agent.m0/gfilsh_avl_mem_translator.avalon_universal_slave_0} {burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {gfilsh_avl_mem_agent.m0/gfilsh_avl_mem_translator.avalon_universal_slave_0} {enableEccProtection} {FALSE};set_connection_parameter_value {gfilsh_avl_mem_agent.m0/gfilsh_avl_mem_translator.avalon_universal_slave_0} {interconnectType} {STANDARD};set_connection_parameter_value {gfilsh_avl_mem_agent.m0/gfilsh_avl_mem_translator.avalon_universal_slave_0} {syncResets} {FALSE};add_connection {gfilsh_avl_mem_agent.rf_source} {gfilsh_avl_mem_agent_rsp_fifo.in} {avalon_streaming};add_connection {gfilsh_avl_mem_agent_rsp_fifo.out} {gfilsh_avl_mem_agent.rf_sink} {avalon_streaming};add_connection {gfilsh_avl_mem_agent.rdata_fifo_src} {gfilsh_avl_mem_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_002.src} {gfilsh_avl_mem_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_002.src/gfilsh_avl_mem_agent.cp} {qsys_mm.command};add_connection {nios2_debug_mem_slave_agent.m0} {nios2_debug_mem_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {nios2_debug_mem_slave_agent.m0/nios2_debug_mem_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {nios2_debug_mem_slave_agent.m0/nios2_debug_mem_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {nios2_debug_mem_slave_agent.m0/nios2_debug_mem_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {nios2_debug_mem_slave_agent.m0/nios2_debug_mem_slave_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {nios2_debug_mem_slave_agent.m0/nios2_debug_mem_slave_translator.avalon_universal_slave_0} {maximumAdditionalLatency} {0};set_connection_parameter_value {nios2_debug_mem_slave_agent.m0/nios2_debug_mem_slave_translator.avalon_universal_slave_0} {clockCrossingAdapter} {AUTO};set_connection_parameter_value {nios2_debug_mem_slave_agent.m0/nios2_debug_mem_slave_translator.avalon_universal_slave_0} {insertDefaultSlave} {FALSE};set_connection_parameter_value {nios2_debug_mem_slave_agent.m0/nios2_debug_mem_slave_translator.avalon_universal_slave_0} {interconnectResetSource} {DEFAULT};set_connection_parameter_value {nios2_debug_mem_slave_agent.m0/nios2_debug_mem_slave_translator.avalon_universal_slave_0} {burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {nios2_debug_mem_slave_agent.m0/nios2_debug_mem_slave_translator.avalon_universal_slave_0} {enableEccProtection} {FALSE};set_connection_parameter_value {nios2_debug_mem_slave_agent.m0/nios2_debug_mem_slave_translator.avalon_universal_slave_0} {interconnectType} {STANDARD};set_connection_parameter_value {nios2_debug_mem_slave_agent.m0/nios2_debug_mem_slave_translator.avalon_universal_slave_0} {syncResets} {FALSE};add_connection {nios2_debug_mem_slave_agent.rf_source} {nios2_debug_mem_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {nios2_debug_mem_slave_agent_rsp_fifo.out} {nios2_debug_mem_slave_agent.rf_sink} {avalon_streaming};add_connection {nios2_debug_mem_slave_agent.rdata_fifo_src} {nios2_debug_mem_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_003.src} {nios2_debug_mem_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_003.src/nios2_debug_mem_slave_agent.cp} {qsys_mm.command};add_connection {main_memory_s1_agent.m0} {main_memory_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {main_memory_s1_agent.m0/main_memory_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {main_memory_s1_agent.m0/main_memory_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {main_memory_s1_agent.m0/main_memory_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {main_memory_s1_agent.m0/main_memory_s1_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {main_memory_s1_agent.m0/main_memory_s1_translator.avalon_universal_slave_0} {maximumAdditionalLatency} {0};set_connection_parameter_value {main_memory_s1_agent.m0/main_memory_s1_translator.avalon_universal_slave_0} {clockCrossingAdapter} {AUTO};set_connection_parameter_value {main_memory_s1_agent.m0/main_memory_s1_translator.avalon_universal_slave_0} {insertDefaultSlave} {FALSE};set_connection_parameter_value {main_memory_s1_agent.m0/main_memory_s1_translator.avalon_universal_slave_0} {interconnectResetSource} {DEFAULT};set_connection_parameter_value {main_memory_s1_agent.m0/main_memory_s1_translator.avalon_universal_slave_0} {burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {main_memory_s1_agent.m0/main_memory_s1_translator.avalon_universal_slave_0} {enableEccProtection} {FALSE};set_connection_parameter_value {main_memory_s1_agent.m0/main_memory_s1_translator.avalon_universal_slave_0} {interconnectType} {STANDARD};set_connection_parameter_value {main_memory_s1_agent.m0/main_memory_s1_translator.avalon_universal_slave_0} {syncResets} {FALSE};add_connection {main_memory_s1_agent.rf_source} {main_memory_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {main_memory_s1_agent_rsp_fifo.out} {main_memory_s1_agent.rf_sink} {avalon_streaming};add_connection {main_memory_s1_agent.rdata_fifo_src} {main_memory_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_004.src} {main_memory_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_004.src/main_memory_s1_agent.cp} {qsys_mm.command};add_connection {nios2_data_master_agent.cp} {router.sink} {avalon_streaming};preview_set_connection_tag {nios2_data_master_agent.cp/router.sink} {qsys_mm.command};add_connection {nios2_instruction_master_agent.cp} {router_001.sink} {avalon_streaming};preview_set_connection_tag {nios2_instruction_master_agent.cp/router_001.sink} {qsys_mm.command};add_connection {jtag_uart_avalon_jtag_slave_agent.rp} {router_002.sink} {avalon_streaming};preview_set_connection_tag {jtag_uart_avalon_jtag_slave_agent.rp/router_002.sink} {qsys_mm.response};add_connection {router_002.src} {rsp_demux.sink} {avalon_streaming};preview_set_connection_tag {router_002.src/rsp_demux.sink} {qsys_mm.response};add_connection {gfilsh_avl_csr_agent.rp} {router_003.sink} {avalon_streaming};preview_set_connection_tag {gfilsh_avl_csr_agent.rp/router_003.sink} {qsys_mm.response};add_connection {router_003.src} {rsp_demux_001.sink} {avalon_streaming};preview_set_connection_tag {router_003.src/rsp_demux_001.sink} {qsys_mm.response};add_connection {gfilsh_avl_mem_agent.rp} {router_004.sink} {avalon_streaming};preview_set_connection_tag {gfilsh_avl_mem_agent.rp/router_004.sink} {qsys_mm.response};add_connection {router_004.src} {rsp_demux_002.sink} {avalon_streaming};preview_set_connection_tag {router_004.src/rsp_demux_002.sink} {qsys_mm.response};add_connection {nios2_debug_mem_slave_agent.rp} {router_005.sink} {avalon_streaming};preview_set_connection_tag {nios2_debug_mem_slave_agent.rp/router_005.sink} {qsys_mm.response};add_connection {router_005.src} {rsp_demux_003.sink} {avalon_streaming};preview_set_connection_tag {router_005.src/rsp_demux_003.sink} {qsys_mm.response};add_connection {main_memory_s1_agent.rp} {router_006.sink} {avalon_streaming};preview_set_connection_tag {main_memory_s1_agent.rp/router_006.sink} {qsys_mm.response};add_connection {router_006.src} {rsp_demux_004.sink} {avalon_streaming};preview_set_connection_tag {router_006.src/rsp_demux_004.sink} {qsys_mm.response};add_connection {router.src} {nios2_data_master_limiter.cmd_sink} {avalon_streaming};preview_set_connection_tag {router.src/nios2_data_master_limiter.cmd_sink} {qsys_mm.command};add_connection {nios2_data_master_limiter.cmd_src} {cmd_demux.sink} {avalon_streaming};preview_set_connection_tag {nios2_data_master_limiter.cmd_src/cmd_demux.sink} {qsys_mm.command};add_connection {rsp_mux.src} {nios2_data_master_limiter.rsp_sink} {avalon_streaming};preview_set_connection_tag {rsp_mux.src/nios2_data_master_limiter.rsp_sink} {qsys_mm.response};add_connection {nios2_data_master_limiter.rsp_src} {nios2_data_master_agent.rp} {avalon_streaming};preview_set_connection_tag {nios2_data_master_limiter.rsp_src/nios2_data_master_agent.rp} {qsys_mm.response};add_connection {router_001.src} {nios2_instruction_master_limiter.cmd_sink} {avalon_streaming};preview_set_connection_tag {router_001.src/nios2_instruction_master_limiter.cmd_sink} {qsys_mm.command};add_connection {nios2_instruction_master_limiter.cmd_src} {cmd_demux_001.sink} {avalon_streaming};preview_set_connection_tag {nios2_instruction_master_limiter.cmd_src/cmd_demux_001.sink} {qsys_mm.command};add_connection {rsp_mux_001.src} {nios2_instruction_master_limiter.rsp_sink} {avalon_streaming};preview_set_connection_tag {rsp_mux_001.src/nios2_instruction_master_limiter.rsp_sink} {qsys_mm.response};add_connection {nios2_instruction_master_limiter.rsp_src} {nios2_instruction_master_agent.rp} {avalon_streaming};preview_set_connection_tag {nios2_instruction_master_limiter.rsp_src/nios2_instruction_master_agent.rp} {qsys_mm.response};add_connection {cmd_demux.src0} {cmd_mux.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.command};add_connection {cmd_demux.src1} {cmd_mux_001.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.command};add_connection {cmd_demux.src2} {cmd_mux_002.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.command};add_connection {cmd_demux.src3} {cmd_mux_003.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.command};add_connection {cmd_demux.src4} {cmd_mux_004.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src4/cmd_mux_004.sink0} {qsys_mm.command};add_connection {cmd_demux_001.src0} {cmd_mux_001.sink1} {avalon_streaming};preview_set_connection_tag {cmd_demux_001.src0/cmd_mux_001.sink1} {qsys_mm.command};add_connection {cmd_demux_001.src1} {cmd_mux_003.sink1} {avalon_streaming};preview_set_connection_tag {cmd_demux_001.src1/cmd_mux_003.sink1} {qsys_mm.command};add_connection {cmd_demux_001.src2} {cmd_mux_004.sink1} {avalon_streaming};preview_set_connection_tag {cmd_demux_001.src2/cmd_mux_004.sink1} {qsys_mm.command};add_connection {rsp_demux.src0} {rsp_mux.sink0} {avalon_streaming};preview_set_connection_tag {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.response};add_connection {rsp_demux_001.src0} {rsp_mux.sink1} {avalon_streaming};preview_set_connection_tag {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.response};add_connection {rsp_demux_001.src1} {rsp_mux_001.sink0} {avalon_streaming};preview_set_connection_tag {rsp_demux_001.src1/rsp_mux_001.sink0} {qsys_mm.response};add_connection {rsp_demux_002.src0} {rsp_mux.sink2} {avalon_streaming};preview_set_connection_tag {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.response};add_connection {rsp_demux_003.src0} {rsp_mux.sink3} {avalon_streaming};preview_set_connection_tag {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.response};add_connection {rsp_demux_003.src1} {rsp_mux_001.sink1} {avalon_streaming};preview_set_connection_tag {rsp_demux_003.src1/rsp_mux_001.sink1} {qsys_mm.response};add_connection {rsp_demux_004.src0} {rsp_mux.sink4} {avalon_streaming};preview_set_connection_tag {rsp_demux_004.src0/rsp_mux.sink4} {qsys_mm.response};add_connection {rsp_demux_004.src1} {rsp_mux_001.sink2} {avalon_streaming};preview_set_connection_tag {rsp_demux_004.src1/rsp_mux_001.sink2} {qsys_mm.response};add_connection {nios2_data_master_limiter.cmd_valid} {cmd_demux.sink_valid} {avalon_streaming};add_connection {nios2_instruction_master_limiter.cmd_valid} {cmd_demux_001.sink_valid} {avalon_streaming};add_connection {nios2_reset_reset_bridge.out_reset} {nios2_data_master_translator.reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {nios2_instruction_master_translator.reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {jtag_uart_avalon_jtag_slave_translator.reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {gfilsh_avl_csr_translator.reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {gfilsh_avl_mem_translator.reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {nios2_debug_mem_slave_translator.reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {main_memory_s1_translator.reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {nios2_data_master_agent.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {nios2_instruction_master_agent.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {jtag_uart_avalon_jtag_slave_agent.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {gfilsh_avl_csr_agent.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {gfilsh_avl_csr_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {gfilsh_avl_mem_agent.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {gfilsh_avl_mem_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {nios2_debug_mem_slave_agent.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {nios2_debug_mem_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {main_memory_s1_agent.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {main_memory_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {router.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {router_001.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {router_002.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {router_003.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {router_004.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {router_005.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {router_006.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {nios2_data_master_limiter.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {nios2_instruction_master_limiter.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {cmd_demux.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {cmd_demux_001.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {cmd_mux.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {cmd_mux_001.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {cmd_mux_002.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {cmd_mux_003.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {cmd_mux_004.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {rsp_demux.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {rsp_demux_001.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {rsp_demux_002.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {rsp_demux_003.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {rsp_demux_004.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {rsp_mux.clk_reset} {reset};add_connection {nios2_reset_reset_bridge.out_reset} {rsp_mux_001.clk_reset} {reset};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {nios2_data_master_translator.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {nios2_instruction_master_translator.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {jtag_uart_avalon_jtag_slave_translator.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {gfilsh_avl_csr_translator.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {gfilsh_avl_mem_translator.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {nios2_debug_mem_slave_translator.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {main_memory_s1_translator.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {nios2_data_master_agent.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {nios2_instruction_master_agent.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {jtag_uart_avalon_jtag_slave_agent.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {gfilsh_avl_csr_agent.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {gfilsh_avl_csr_agent_rsp_fifo.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {gfilsh_avl_mem_agent.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {gfilsh_avl_mem_agent_rsp_fifo.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {nios2_debug_mem_slave_agent.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {nios2_debug_mem_slave_agent_rsp_fifo.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {main_memory_s1_agent.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {main_memory_s1_agent_rsp_fifo.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {router.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {router_001.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {router_002.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {router_003.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {router_004.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {router_005.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {router_006.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {nios2_data_master_limiter.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {nios2_instruction_master_limiter.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {cmd_demux.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {rsp_mux.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {cmd_demux_001.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {rsp_mux_001.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {cmd_mux.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {rsp_demux.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {cmd_mux_001.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {rsp_demux_001.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {cmd_mux_002.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {rsp_demux_002.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {cmd_mux_003.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {rsp_demux_003.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {cmd_mux_004.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {rsp_demux_004.clk} {clock};add_connection {sys_clk_out_clk_clock_bridge.out_clk} {nios2_reset_reset_bridge.clk} {clock};add_interface {gfilsh_avl_csr} {avalon} {master};set_interface_property {gfilsh_avl_csr} {EXPORT_OF} {gfilsh_avl_csr_translator.avalon_anti_slave_0};add_interface {gfilsh_avl_mem} {avalon} {master};set_interface_property {gfilsh_avl_mem} {EXPORT_OF} {gfilsh_avl_mem_translator.avalon_anti_slave_0};add_interface {jtag_uart_avalon_jtag_slave} {avalon} {master};set_interface_property {jtag_uart_avalon_jtag_slave} {EXPORT_OF} {jtag_uart_avalon_jtag_slave_translator.avalon_anti_slave_0};add_interface {main_memory_s1} {avalon} {master};set_interface_property {main_memory_s1} {EXPORT_OF} {main_memory_s1_translator.avalon_anti_slave_0};add_interface {nios2_data_master} {avalon} {slave};set_interface_property {nios2_data_master} {EXPORT_OF} {nios2_data_master_translator.avalon_anti_master_0};add_interface {nios2_debug_mem_slave} {avalon} {master};set_interface_property {nios2_debug_mem_slave} {EXPORT_OF} {nios2_debug_mem_slave_translator.avalon_anti_slave_0};add_interface {nios2_instruction_master} {avalon} {slave};set_interface_property {nios2_instruction_master} {EXPORT_OF} {nios2_instruction_master_translator.avalon_anti_master_0};add_interface {nios2_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {nios2_reset_reset_bridge_in_reset} {EXPORT_OF} {nios2_reset_reset_bridge.in_reset};add_interface {sys_clk_out_clk} {clock} {slave};set_interface_property {sys_clk_out_clk} {EXPORT_OF} {sys_clk_out_clk_clock_bridge.in_clk};set_module_assignment {interconnect_id.gfilsh.avl_csr} {0};set_module_assignment {interconnect_id.gfilsh.avl_mem} {1};set_module_assignment {interconnect_id.jtag_uart.avalon_jtag_slave} {2};set_module_assignment {interconnect_id.main_memory.s1} {3};set_module_assignment {interconnect_id.nios2.data_master} {0};set_module_assignment {interconnect_id.nios2.debug_mem_slave} {4};set_module_assignment {interconnect_id.nios2.instruction_master} {1};" />
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_mm_interconnect_180\synth\gflish_altera_mm_interconnect_180_sbymbyi.v"
       attributes="CONTAINS_INLINE_CONFIGURATION" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_mm_interconnect_180\synth\gflish_altera_mm_interconnect_180_sbymbyi.v"
       attributes="CONTAINS_INLINE_CONFIGURATION" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
  </sourceFiles>
  <childSourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_master_agent/altera_merlin_master_agent_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo.v" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_traffic_limiter/altera_merlin_traffic_limiter_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
  </childSourceFiles>
  <instantiator instantiator="gflish" as="mm_interconnect_0" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_mm_interconnect_180_sbymbyi"</message>
   <message level="Info" culprit="gflish">"Generating: altera_merlin_master_translator"</message>
   <message level="Info" culprit="gflish">"Generating: altera_merlin_slave_translator"</message>
   <message level="Info" culprit="gflish">"Generating: altera_merlin_master_agent"</message>
   <message level="Info" culprit="gflish">"Generating: altera_merlin_slave_agent"</message>
   <message level="Info" culprit="gflish">"Generating: altera_avalon_sc_fifo"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_router_180_bjaw4fa"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_router_180_is6rdqq"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_router_180_ybibjaq"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_router_180_gsrlchi"</message>
   <message level="Info" culprit="gflish">"Generating: altera_merlin_traffic_limiter"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_demultiplexer_180_p2labsi"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_demultiplexer_180_aatoqcy"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_multiplexer_180_as5qbey"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_multiplexer_180_3szy6ni"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_demultiplexer_180_gshcsda"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_demultiplexer_180_w6uc27i"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_multiplexer_180_4rddq6i"</message>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_multiplexer_180_3hdgx4a"</message>
  </messages>
 </entity>
 <entity
   kind="altera_irq_mapper"
   version="18.0"
   name="gflish_altera_irq_mapper_180_grgmmai">
  <parameter name="NUM_RCVRS" value="1" />
  <parameter name="AUTO_CLK_CLOCK_RATE" value="-1" />
  <parameter name="IRQ_MAP" value="0:0" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
  <parameter name="SYNC_RESET" value="0" />
  <parameter name="SENDER_IRQ_WIDTH" value="32" />
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_irq_mapper_180\synth\gflish_altera_irq_mapper_180_grgmmai.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_irq_mapper_180\synth\gflish_altera_irq_mapper_180_grgmmai.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_irq_mapper/altera_irq_mapper_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator instantiator="gflish" as="irq_mapper" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_irq_mapper_180_grgmmai"</message>
  </messages>
 </entity>
 <entity
   kind="altera_reset_controller"
   version="18.0"
   name="altera_reset_controller">
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_reset_controller_180\synth\altera_reset_controller.v"
       attributes="" />
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_reset_controller_180\synth\altera_reset_synchronizer.v"
       attributes="" />
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_reset_controller_180\synth\altera_reset_controller.sdc"
       attributes="NO_AUTO_INSTANCE_DISCOVERY NO_SDC_PROMOTION" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_reset_controller_180\synth\altera_reset_controller.v"
       attributes="" />
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_reset_controller_180\synth\altera_reset_synchronizer.v"
       attributes="" />
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_reset_controller_180\synth\altera_reset_controller.sdc"
       attributes="NO_AUTO_INSTANCE_DISCOVERY NO_SDC_PROMOTION" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_reset_controller/altera_reset_controller_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator instantiator="gflish" as="rst_controller,rst_controller_001" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: altera_reset_controller"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_master_translator"
   version="18.0"
   name="altera_merlin_master_translator">
  <parameter name="WAITREQUEST_ALLOWANCE" value="0" />
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_master_translator_180\synth\altera_merlin_master_translator.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_master_translator_180\synth\altera_merlin_master_translator.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="gflish_altera_mm_interconnect_180_sbymbyi"
     as="nios2_data_master_translator,nios2_instruction_master_translator" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: altera_merlin_master_translator"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_slave_translator"
   version="18.0"
   name="altera_merlin_slave_translator">
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_slave_translator_180\synth\altera_merlin_slave_translator.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_slave_translator_180\synth\altera_merlin_slave_translator.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="gflish_altera_mm_interconnect_180_sbymbyi"
     as="jtag_uart_avalon_jtag_slave_translator,gfilsh_avl_csr_translator,gfilsh_avl_mem_translator,nios2_debug_mem_slave_translator,main_memory_s1_translator" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: altera_merlin_slave_translator"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_master_agent"
   version="18.0"
   name="altera_merlin_master_agent">
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_master_agent_180\synth\altera_merlin_master_agent.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_master_agent_180\synth\altera_merlin_master_agent.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_master_agent/altera_merlin_master_agent_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="gflish_altera_mm_interconnect_180_sbymbyi"
     as="nios2_data_master_agent,nios2_instruction_master_agent" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: altera_merlin_master_agent"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_slave_agent"
   version="18.0"
   name="altera_merlin_slave_agent">
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_slave_agent_180\synth\altera_merlin_slave_agent.sv"
       attributes="" />
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_slave_agent_180\synth\altera_merlin_burst_uncompressor.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_slave_agent_180\synth\altera_merlin_slave_agent.sv"
       attributes="" />
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_slave_agent_180\synth\altera_merlin_burst_uncompressor.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="gflish_altera_mm_interconnect_180_sbymbyi"
     as="jtag_uart_avalon_jtag_slave_agent,gfilsh_avl_csr_agent,gfilsh_avl_mem_agent,nios2_debug_mem_slave_agent,main_memory_s1_agent" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: altera_merlin_slave_agent"</message>
  </messages>
 </entity>
 <entity
   kind="altera_avalon_sc_fifo"
   version="18.0"
   name="altera_avalon_sc_fifo">
  <parameter name="EXPLICIT_MAXCHANNEL" value="0" />
  <parameter name="ENABLE_EXPLICIT_MAXCHANNEL" value="false" />
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_avalon_sc_fifo_180\synth\altera_avalon_sc_fifo.v"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_avalon_sc_fifo_180\synth\altera_avalon_sc_fifo.v"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo.v" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="gflish_altera_mm_interconnect_180_sbymbyi"
     as="jtag_uart_avalon_jtag_slave_agent_rsp_fifo,gfilsh_avl_csr_agent_rsp_fifo,gfilsh_avl_mem_agent_rsp_fifo,nios2_debug_mem_slave_agent_rsp_fifo,main_memory_s1_agent_rsp_fifo" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: altera_avalon_sc_fifo"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_router"
   version="18.0"
   name="gflish_altera_merlin_router_180_bjaw4fa">
  <parameter name="ST_CHANNEL_W" value="5" />
  <parameter name="DEFAULT_WR_CHANNEL" value="-1" />
  <parameter name="PKT_TRANS_READ" value="65" />
  <parameter
     name="START_ADDRESS"
     value="0x0,0x2020000,0x2040800,0x2041100,0x2041200" />
  <parameter name="DEFAULT_CHANNEL" value="2" />
  <parameter name="MEMORY_ALIASING_DECODE" value="0" />
  <parameter name="HAS_USER_DEFAULT_SLAVE" value="0" />
  <parameter
     name="SLAVES_INFO"
     value="1:00100:0x0:0x2000000:both:1:0:0:1,3:10000:0x2020000:0x2040000:both:1:0:0:1,4:01000:0x2040800:0x2041000:both:1:0:0:1,0:00010:0x2041100:0x2041200:both:1:0:0:1,2:00001:0x2041200:0x2041208:both:1:0:0:1" />
  <parameter name="DEFAULT_RD_CHANNEL" value="-1" />
  <parameter name="PKT_ADDR_H" value="61" />
  <parameter name="PKT_DEST_ID_H" value="100" />
  <parameter name="PKT_ADDR_L" value="36" />
  <parameter name="PKT_DEST_ID_L" value="98" />
  <parameter name="CHANNEL_ID" value="00100,10000,01000,00010,00001" />
  <parameter name="TYPE_OF_TRANSACTION" value="both,both,both,both,both" />
  <parameter name="SECURED_RANGE_PAIRS" value="0,0,0,0,0" />
  <parameter name="SPAN_OFFSET" value="" />
  <parameter name="ST_DATA_W" value="123" />
  <parameter name="SECURED_RANGE_LIST" value="0,0,0,0,0" />
  <parameter name="DECODER_TYPE" value="0" />
  <parameter name="PKT_PROTECTION_H" value="104" />
  <parameter
     name="END_ADDRESS"
     value="0x2000000,0x2040000,0x2041000,0x2041200,0x2041208" />
  <parameter name="PKT_PROTECTION_L" value="102" />
  <parameter name="PKT_TRANS_WRITE" value="64" />
  <parameter name="DEFAULT_DESTID" value="1" />
  <parameter name="DESTINATION_ID" value="1,3,4,0,2" />
  <parameter name="NON_SECURED_TAG" value="1,1,1,1,1" />
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_router_180\synth\gflish_altera_merlin_router_180_bjaw4fa.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_router_180\synth\gflish_altera_merlin_router_180_bjaw4fa.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator instantiator="gflish_altera_mm_interconnect_180_sbymbyi" as="router" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_router_180_bjaw4fa"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_router"
   version="18.0"
   name="gflish_altera_merlin_router_180_is6rdqq">
  <parameter name="ST_CHANNEL_W" value="5" />
  <parameter name="DEFAULT_WR_CHANNEL" value="-1" />
  <parameter name="PKT_TRANS_READ" value="65" />
  <parameter name="START_ADDRESS" value="0x2020000,0x2040800,0x2041100" />
  <parameter name="DEFAULT_CHANNEL" value="2" />
  <parameter name="MEMORY_ALIASING_DECODE" value="0" />
  <parameter name="HAS_USER_DEFAULT_SLAVE" value="0" />
  <parameter
     name="SLAVES_INFO"
     value="3:100:0x2020000:0x2040000:both:1:0:0:1,4:010:0x2040800:0x2041000:both:1:0:0:1,0:001:0x2041100:0x2041200:both:1:0:0:1" />
  <parameter name="DEFAULT_RD_CHANNEL" value="-1" />
  <parameter name="PKT_ADDR_H" value="61" />
  <parameter name="PKT_DEST_ID_H" value="100" />
  <parameter name="PKT_ADDR_L" value="36" />
  <parameter name="PKT_DEST_ID_L" value="98" />
  <parameter name="CHANNEL_ID" value="100,010,001" />
  <parameter name="TYPE_OF_TRANSACTION" value="both,both,both" />
  <parameter name="SECURED_RANGE_PAIRS" value="0,0,0" />
  <parameter name="SPAN_OFFSET" value="" />
  <parameter name="ST_DATA_W" value="123" />
  <parameter name="SECURED_RANGE_LIST" value="0,0,0" />
  <parameter name="DECODER_TYPE" value="0" />
  <parameter name="PKT_PROTECTION_H" value="104" />
  <parameter name="END_ADDRESS" value="0x2040000,0x2041000,0x2041200" />
  <parameter name="PKT_PROTECTION_L" value="102" />
  <parameter name="PKT_TRANS_WRITE" value="64" />
  <parameter name="DEFAULT_DESTID" value="3" />
  <parameter name="DESTINATION_ID" value="3,4,0" />
  <parameter name="NON_SECURED_TAG" value="1,1,1" />
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_router_180\synth\gflish_altera_merlin_router_180_is6rdqq.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_router_180\synth\gflish_altera_merlin_router_180_is6rdqq.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="gflish_altera_mm_interconnect_180_sbymbyi"
     as="router_001" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_router_180_is6rdqq"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_router"
   version="18.0"
   name="gflish_altera_merlin_router_180_ybibjaq">
  <parameter name="ST_CHANNEL_W" value="5" />
  <parameter name="DEFAULT_WR_CHANNEL" value="-1" />
  <parameter name="PKT_TRANS_READ" value="65" />
  <parameter name="START_ADDRESS" value="0x0" />
  <parameter name="DEFAULT_CHANNEL" value="0" />
  <parameter name="MEMORY_ALIASING_DECODE" value="0" />
  <parameter name="HAS_USER_DEFAULT_SLAVE" value="0" />
  <parameter name="SLAVES_INFO" value="0:1:0x0:0x0:both:1:0:0:1" />
  <parameter name="DEFAULT_RD_CHANNEL" value="-1" />
  <parameter name="PKT_ADDR_H" value="61" />
  <parameter name="PKT_DEST_ID_H" value="100" />
  <parameter name="PKT_ADDR_L" value="36" />
  <parameter name="PKT_DEST_ID_L" value="98" />
  <parameter name="CHANNEL_ID" value="1" />
  <parameter name="TYPE_OF_TRANSACTION" value="both" />
  <parameter name="SECURED_RANGE_PAIRS" value="0" />
  <parameter name="SPAN_OFFSET" value="" />
  <parameter name="ST_DATA_W" value="123" />
  <parameter name="SECURED_RANGE_LIST" value="0" />
  <parameter name="DECODER_TYPE" value="1" />
  <parameter name="PKT_PROTECTION_H" value="104" />
  <parameter name="END_ADDRESS" value="0x0" />
  <parameter name="PKT_PROTECTION_L" value="102" />
  <parameter name="PKT_TRANS_WRITE" value="64" />
  <parameter name="DEFAULT_DESTID" value="0" />
  <parameter name="DESTINATION_ID" value="0" />
  <parameter name="NON_SECURED_TAG" value="1" />
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_router_180\synth\gflish_altera_merlin_router_180_ybibjaq.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_router_180\synth\gflish_altera_merlin_router_180_ybibjaq.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="gflish_altera_mm_interconnect_180_sbymbyi"
     as="router_002,router_004" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_router_180_ybibjaq"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_router"
   version="18.0"
   name="gflish_altera_merlin_router_180_gsrlchi">
  <parameter name="ST_CHANNEL_W" value="5" />
  <parameter name="DEFAULT_WR_CHANNEL" value="-1" />
  <parameter name="PKT_TRANS_READ" value="65" />
  <parameter name="START_ADDRESS" value="0x0,0x0" />
  <parameter name="DEFAULT_CHANNEL" value="0" />
  <parameter name="MEMORY_ALIASING_DECODE" value="0" />
  <parameter name="HAS_USER_DEFAULT_SLAVE" value="0" />
  <parameter
     name="SLAVES_INFO"
     value="0:01:0x0:0x0:both:1:0:0:1,1:10:0x0:0x0:read:1:0:0:1" />
  <parameter name="DEFAULT_RD_CHANNEL" value="-1" />
  <parameter name="PKT_ADDR_H" value="61" />
  <parameter name="PKT_DEST_ID_H" value="100" />
  <parameter name="PKT_ADDR_L" value="36" />
  <parameter name="PKT_DEST_ID_L" value="98" />
  <parameter name="CHANNEL_ID" value="01,10" />
  <parameter name="TYPE_OF_TRANSACTION" value="both,read" />
  <parameter name="SECURED_RANGE_PAIRS" value="0,0" />
  <parameter name="SPAN_OFFSET" value="" />
  <parameter name="ST_DATA_W" value="123" />
  <parameter name="SECURED_RANGE_LIST" value="0,0" />
  <parameter name="DECODER_TYPE" value="1" />
  <parameter name="PKT_PROTECTION_H" value="104" />
  <parameter name="END_ADDRESS" value="0x0,0x0" />
  <parameter name="PKT_PROTECTION_L" value="102" />
  <parameter name="PKT_TRANS_WRITE" value="64" />
  <parameter name="DEFAULT_DESTID" value="0" />
  <parameter name="DESTINATION_ID" value="0,1" />
  <parameter name="NON_SECURED_TAG" value="1,1" />
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_router_180\synth\gflish_altera_merlin_router_180_gsrlchi.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_router_180\synth\gflish_altera_merlin_router_180_gsrlchi.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="gflish_altera_mm_interconnect_180_sbymbyi"
     as="router_003,router_005,router_006" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_router_180_gsrlchi"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_traffic_limiter"
   version="18.0"
   name="altera_merlin_traffic_limiter">
  <parameter name="SYNC_RESET" value="0" />
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_traffic_limiter_180\synth\altera_merlin_traffic_limiter.sv"
       attributes="" />
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_traffic_limiter_180\synth\altera_merlin_reorder_memory.sv"
       attributes="" />
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_traffic_limiter_180\synth\altera_avalon_st_pipeline_base.v"
       attributes="" />
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_traffic_limiter_180\synth\altera_avalon_sc_fifo.v"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_traffic_limiter_180\synth\altera_merlin_traffic_limiter.sv"
       attributes="" />
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_traffic_limiter_180\synth\altera_merlin_reorder_memory.sv"
       attributes="" />
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_traffic_limiter_180\synth\altera_avalon_st_pipeline_base.v"
       attributes="" />
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_traffic_limiter_180\synth\altera_avalon_sc_fifo.v"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_traffic_limiter/altera_merlin_traffic_limiter_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="gflish_altera_mm_interconnect_180_sbymbyi"
     as="nios2_data_master_limiter,nios2_instruction_master_limiter" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: altera_merlin_traffic_limiter"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_demultiplexer"
   version="18.0"
   name="gflish_altera_merlin_demultiplexer_180_p2labsi">
  <parameter name="ST_CHANNEL_W" value="5" />
  <parameter name="AUTO_CLK_CLOCK_RATE" value="100000000" />
  <parameter name="VALID_WIDTH" value="5" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
  <parameter name="ST_DATA_W" value="123" />
  <parameter name="NUM_OUTPUTS" value="5" />
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_demultiplexer_180\synth\gflish_altera_merlin_demultiplexer_180_p2labsi.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_demultiplexer_180\synth\gflish_altera_merlin_demultiplexer_180_p2labsi.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="gflish_altera_mm_interconnect_180_sbymbyi"
     as="cmd_demux" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_demultiplexer_180_p2labsi"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_demultiplexer"
   version="18.0"
   name="gflish_altera_merlin_demultiplexer_180_aatoqcy">
  <parameter name="ST_CHANNEL_W" value="5" />
  <parameter name="AUTO_CLK_CLOCK_RATE" value="100000000" />
  <parameter name="VALID_WIDTH" value="5" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
  <parameter name="ST_DATA_W" value="123" />
  <parameter name="NUM_OUTPUTS" value="3" />
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_demultiplexer_180\synth\gflish_altera_merlin_demultiplexer_180_aatoqcy.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_demultiplexer_180\synth\gflish_altera_merlin_demultiplexer_180_aatoqcy.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="gflish_altera_mm_interconnect_180_sbymbyi"
     as="cmd_demux_001" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_demultiplexer_180_aatoqcy"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_multiplexer"
   version="18.0"
   name="gflish_altera_merlin_multiplexer_180_as5qbey">
  <parameter name="ST_CHANNEL_W" value="5" />
  <parameter name="ARBITRATION_SHARES" value="1" />
  <parameter name="NUM_INPUTS" value="1" />
  <parameter name="PIPELINE_ARB" value="1" />
  <parameter name="ARBITRATION_SCHEME" value="round-robin" />
  <parameter name="ST_DATA_W" value="123" />
  <parameter name="USE_EXTERNAL_ARB" value="0" />
  <parameter name="PKT_TRANS_LOCK" value="66" />
  <parameter name="SYNC_RESET" value="0" />
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_multiplexer_180\synth\gflish_altera_merlin_multiplexer_180_as5qbey.sv"
       attributes="" />
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_multiplexer_180\synth\altera_merlin_arbitrator.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_multiplexer_180\synth\gflish_altera_merlin_multiplexer_180_as5qbey.sv"
       attributes="" />
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_multiplexer_180\synth\altera_merlin_arbitrator.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="gflish_altera_mm_interconnect_180_sbymbyi"
     as="cmd_mux,cmd_mux_002" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_multiplexer_180_as5qbey"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_multiplexer"
   version="18.0"
   name="gflish_altera_merlin_multiplexer_180_3szy6ni">
  <parameter name="ST_CHANNEL_W" value="5" />
  <parameter name="ARBITRATION_SHARES" value="1,1" />
  <parameter name="NUM_INPUTS" value="2" />
  <parameter name="PIPELINE_ARB" value="1" />
  <parameter name="ARBITRATION_SCHEME" value="round-robin" />
  <parameter name="ST_DATA_W" value="123" />
  <parameter name="USE_EXTERNAL_ARB" value="0" />
  <parameter name="PKT_TRANS_LOCK" value="66" />
  <parameter name="SYNC_RESET" value="0" />
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_multiplexer_180\synth\gflish_altera_merlin_multiplexer_180_3szy6ni.sv"
       attributes="" />
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_multiplexer_180\synth\altera_merlin_arbitrator.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_multiplexer_180\synth\gflish_altera_merlin_multiplexer_180_3szy6ni.sv"
       attributes="" />
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_multiplexer_180\synth\altera_merlin_arbitrator.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="gflish_altera_mm_interconnect_180_sbymbyi"
     as="cmd_mux_001,cmd_mux_003,cmd_mux_004" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_multiplexer_180_3szy6ni"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_demultiplexer"
   version="18.0"
   name="gflish_altera_merlin_demultiplexer_180_gshcsda">
  <parameter name="ST_CHANNEL_W" value="5" />
  <parameter name="AUTO_CLK_CLOCK_RATE" value="100000000" />
  <parameter name="VALID_WIDTH" value="1" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
  <parameter name="ST_DATA_W" value="123" />
  <parameter name="NUM_OUTPUTS" value="1" />
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_demultiplexer_180\synth\gflish_altera_merlin_demultiplexer_180_gshcsda.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_demultiplexer_180\synth\gflish_altera_merlin_demultiplexer_180_gshcsda.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="gflish_altera_mm_interconnect_180_sbymbyi"
     as="rsp_demux,rsp_demux_002" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_demultiplexer_180_gshcsda"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_demultiplexer"
   version="18.0"
   name="gflish_altera_merlin_demultiplexer_180_w6uc27i">
  <parameter name="ST_CHANNEL_W" value="5" />
  <parameter name="AUTO_CLK_CLOCK_RATE" value="100000000" />
  <parameter name="VALID_WIDTH" value="1" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
  <parameter name="ST_DATA_W" value="123" />
  <parameter name="NUM_OUTPUTS" value="2" />
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_demultiplexer_180\synth\gflish_altera_merlin_demultiplexer_180_w6uc27i.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_demultiplexer_180\synth\gflish_altera_merlin_demultiplexer_180_w6uc27i.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="gflish_altera_mm_interconnect_180_sbymbyi"
     as="rsp_demux_001,rsp_demux_003,rsp_demux_004" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_demultiplexer_180_w6uc27i"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_multiplexer"
   version="18.0"
   name="gflish_altera_merlin_multiplexer_180_4rddq6i">
  <parameter name="ST_CHANNEL_W" value="5" />
  <parameter name="ARBITRATION_SHARES" value="1,1,1,1,1" />
  <parameter name="NUM_INPUTS" value="5" />
  <parameter name="PIPELINE_ARB" value="0" />
  <parameter name="ARBITRATION_SCHEME" value="no-arb" />
  <parameter name="ST_DATA_W" value="123" />
  <parameter name="USE_EXTERNAL_ARB" value="0" />
  <parameter name="PKT_TRANS_LOCK" value="66" />
  <parameter name="SYNC_RESET" value="0" />
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_multiplexer_180\synth\gflish_altera_merlin_multiplexer_180_4rddq6i.sv"
       attributes="" />
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_multiplexer_180\synth\altera_merlin_arbitrator.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_multiplexer_180\synth\gflish_altera_merlin_multiplexer_180_4rddq6i.sv"
       attributes="" />
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_multiplexer_180\synth\altera_merlin_arbitrator.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator instantiator="gflish_altera_mm_interconnect_180_sbymbyi" as="rsp_mux" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_multiplexer_180_4rddq6i"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_multiplexer"
   version="18.0"
   name="gflish_altera_merlin_multiplexer_180_3hdgx4a">
  <parameter name="ST_CHANNEL_W" value="5" />
  <parameter name="ARBITRATION_SHARES" value="1,1,1" />
  <parameter name="NUM_INPUTS" value="3" />
  <parameter name="PIPELINE_ARB" value="0" />
  <parameter name="ARBITRATION_SCHEME" value="no-arb" />
  <parameter name="ST_DATA_W" value="123" />
  <parameter name="USE_EXTERNAL_ARB" value="0" />
  <parameter name="PKT_TRANS_LOCK" value="66" />
  <parameter name="SYNC_RESET" value="0" />
  <generatedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_multiplexer_180\synth\gflish_altera_merlin_multiplexer_180_3hdgx4a.sv"
       attributes="" />
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_multiplexer_180\synth\altera_merlin_arbitrator.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_multiplexer_180\synth\gflish_altera_merlin_multiplexer_180_3hdgx4a.sv"
       attributes="" />
   <file
       path="K:\Work\SP100\PROG\FPGA\gflish2\gflish\altera_merlin_multiplexer_180\synth\altera_merlin_arbitrator.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="E:/intelfpga_pro/18.0/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="gflish_altera_mm_interconnect_180_sbymbyi"
     as="rsp_mux_001" />
  <messages>
   <message level="Info" culprit="gflish">"Generating: gflish_altera_merlin_multiplexer_180_3hdgx4a"</message>
  </messages>
 </entity>
</deploy>
