// gflish_altera_mm_interconnect_180_sbymbyi.v

// This file was auto-generated from altera_mm_interconnect_hw.tcl.  If you edit it your changes
// will probably be lost.
// 
// Generated using ACDS version 18.0 219

`timescale 1 ps / 1 ps
module gflish_altera_mm_interconnect_180_sbymbyi (
		output wire [5:0]  gfilsh_avl_csr_address,                  //                    gfilsh_avl_csr.address
		output wire        gfilsh_avl_csr_write,                    //                                  .write
		output wire        gfilsh_avl_csr_read,                     //                                  .read
		input  wire [31:0] gfilsh_avl_csr_readdata,                 //                                  .readdata
		output wire [31:0] gfilsh_avl_csr_writedata,                //                                  .writedata
		input  wire        gfilsh_avl_csr_readdatavalid,            //                                  .readdatavalid
		input  wire        gfilsh_avl_csr_waitrequest,              //                                  .waitrequest
		output wire [22:0] gfilsh_avl_mem_address,                  //                    gfilsh_avl_mem.address
		output wire        gfilsh_avl_mem_write,                    //                                  .write
		output wire        gfilsh_avl_mem_read,                     //                                  .read
		input  wire [31:0] gfilsh_avl_mem_readdata,                 //                                  .readdata
		output wire [31:0] gfilsh_avl_mem_writedata,                //                                  .writedata
		output wire [6:0]  gfilsh_avl_mem_burstcount,               //                                  .burstcount
		output wire [3:0]  gfilsh_avl_mem_byteenable,               //                                  .byteenable
		input  wire        gfilsh_avl_mem_readdatavalid,            //                                  .readdatavalid
		input  wire        gfilsh_avl_mem_waitrequest,              //                                  .waitrequest
		output wire [0:0]  jtag_uart_avalon_jtag_slave_address,     //       jtag_uart_avalon_jtag_slave.address
		output wire        jtag_uart_avalon_jtag_slave_write,       //                                  .write
		output wire        jtag_uart_avalon_jtag_slave_read,        //                                  .read
		input  wire [31:0] jtag_uart_avalon_jtag_slave_readdata,    //                                  .readdata
		output wire [31:0] jtag_uart_avalon_jtag_slave_writedata,   //                                  .writedata
		input  wire        jtag_uart_avalon_jtag_slave_waitrequest, //                                  .waitrequest
		output wire        jtag_uart_avalon_jtag_slave_chipselect,  //                                  .chipselect
		output wire [14:0] main_memory_s1_address,                  //                    main_memory_s1.address
		output wire        main_memory_s1_write,                    //                                  .write
		input  wire [31:0] main_memory_s1_readdata,                 //                                  .readdata
		output wire [31:0] main_memory_s1_writedata,                //                                  .writedata
		output wire [3:0]  main_memory_s1_byteenable,               //                                  .byteenable
		output wire        main_memory_s1_chipselect,               //                                  .chipselect
		output wire        main_memory_s1_clken,                    //                                  .clken
		input  wire [25:0] nios2_data_master_address,               //                 nios2_data_master.address
		output wire        nios2_data_master_waitrequest,           //                                  .waitrequest
		input  wire [3:0]  nios2_data_master_byteenable,            //                                  .byteenable
		input  wire        nios2_data_master_read,                  //                                  .read
		output wire [31:0] nios2_data_master_readdata,              //                                  .readdata
		output wire        nios2_data_master_readdatavalid,         //                                  .readdatavalid
		input  wire        nios2_data_master_write,                 //                                  .write
		input  wire [31:0] nios2_data_master_writedata,             //                                  .writedata
		input  wire        nios2_data_master_debugaccess,           //                                  .debugaccess
		output wire [8:0]  nios2_debug_mem_slave_address,           //             nios2_debug_mem_slave.address
		output wire        nios2_debug_mem_slave_write,             //                                  .write
		output wire        nios2_debug_mem_slave_read,              //                                  .read
		input  wire [31:0] nios2_debug_mem_slave_readdata,          //                                  .readdata
		output wire [31:0] nios2_debug_mem_slave_writedata,         //                                  .writedata
		output wire [3:0]  nios2_debug_mem_slave_byteenable,        //                                  .byteenable
		input  wire        nios2_debug_mem_slave_waitrequest,       //                                  .waitrequest
		output wire        nios2_debug_mem_slave_debugaccess,       //                                  .debugaccess
		input  wire [25:0] nios2_instruction_master_address,        //          nios2_instruction_master.address
		output wire        nios2_instruction_master_waitrequest,    //                                  .waitrequest
		input  wire        nios2_instruction_master_read,           //                                  .read
		output wire [31:0] nios2_instruction_master_readdata,       //                                  .readdata
		output wire        nios2_instruction_master_readdatavalid,  //                                  .readdatavalid
		input  wire        nios2_reset_reset_bridge_in_reset_reset, // nios2_reset_reset_bridge_in_reset.reset
		input  wire        sys_clk_out_clk_clk                      //                   sys_clk_out_clk.clk
	);

	wire          nios2_data_master_translator_avalon_universal_master_0_waitrequest;          // nios2_data_master_agent:av_waitrequest -> nios2_data_master_translator:uav_waitrequest
	wire   [31:0] nios2_data_master_translator_avalon_universal_master_0_readdata;             // nios2_data_master_agent:av_readdata -> nios2_data_master_translator:uav_readdata
	wire          nios2_data_master_translator_avalon_universal_master_0_debugaccess;          // nios2_data_master_translator:uav_debugaccess -> nios2_data_master_agent:av_debugaccess
	wire   [25:0] nios2_data_master_translator_avalon_universal_master_0_address;              // nios2_data_master_translator:uav_address -> nios2_data_master_agent:av_address
	wire          nios2_data_master_translator_avalon_universal_master_0_read;                 // nios2_data_master_translator:uav_read -> nios2_data_master_agent:av_read
	wire    [3:0] nios2_data_master_translator_avalon_universal_master_0_byteenable;           // nios2_data_master_translator:uav_byteenable -> nios2_data_master_agent:av_byteenable
	wire          nios2_data_master_translator_avalon_universal_master_0_readdatavalid;        // nios2_data_master_agent:av_readdatavalid -> nios2_data_master_translator:uav_readdatavalid
	wire          nios2_data_master_translator_avalon_universal_master_0_lock;                 // nios2_data_master_translator:uav_lock -> nios2_data_master_agent:av_lock
	wire          nios2_data_master_translator_avalon_universal_master_0_write;                // nios2_data_master_translator:uav_write -> nios2_data_master_agent:av_write
	wire   [31:0] nios2_data_master_translator_avalon_universal_master_0_writedata;            // nios2_data_master_translator:uav_writedata -> nios2_data_master_agent:av_writedata
	wire    [2:0] nios2_data_master_translator_avalon_universal_master_0_burstcount;           // nios2_data_master_translator:uav_burstcount -> nios2_data_master_agent:av_burstcount
	wire          nios2_instruction_master_translator_avalon_universal_master_0_waitrequest;   // nios2_instruction_master_agent:av_waitrequest -> nios2_instruction_master_translator:uav_waitrequest
	wire   [31:0] nios2_instruction_master_translator_avalon_universal_master_0_readdata;      // nios2_instruction_master_agent:av_readdata -> nios2_instruction_master_translator:uav_readdata
	wire          nios2_instruction_master_translator_avalon_universal_master_0_debugaccess;   // nios2_instruction_master_translator:uav_debugaccess -> nios2_instruction_master_agent:av_debugaccess
	wire   [25:0] nios2_instruction_master_translator_avalon_universal_master_0_address;       // nios2_instruction_master_translator:uav_address -> nios2_instruction_master_agent:av_address
	wire          nios2_instruction_master_translator_avalon_universal_master_0_read;          // nios2_instruction_master_translator:uav_read -> nios2_instruction_master_agent:av_read
	wire    [3:0] nios2_instruction_master_translator_avalon_universal_master_0_byteenable;    // nios2_instruction_master_translator:uav_byteenable -> nios2_instruction_master_agent:av_byteenable
	wire          nios2_instruction_master_translator_avalon_universal_master_0_readdatavalid; // nios2_instruction_master_agent:av_readdatavalid -> nios2_instruction_master_translator:uav_readdatavalid
	wire          nios2_instruction_master_translator_avalon_universal_master_0_lock;          // nios2_instruction_master_translator:uav_lock -> nios2_instruction_master_agent:av_lock
	wire          nios2_instruction_master_translator_avalon_universal_master_0_write;         // nios2_instruction_master_translator:uav_write -> nios2_instruction_master_agent:av_write
	wire   [31:0] nios2_instruction_master_translator_avalon_universal_master_0_writedata;     // nios2_instruction_master_translator:uav_writedata -> nios2_instruction_master_agent:av_writedata
	wire    [2:0] nios2_instruction_master_translator_avalon_universal_master_0_burstcount;    // nios2_instruction_master_translator:uav_burstcount -> nios2_instruction_master_agent:av_burstcount
	wire   [31:0] jtag_uart_avalon_jtag_slave_agent_m0_readdata;                               // jtag_uart_avalon_jtag_slave_translator:uav_readdata -> jtag_uart_avalon_jtag_slave_agent:m0_readdata
	wire          jtag_uart_avalon_jtag_slave_agent_m0_waitrequest;                            // jtag_uart_avalon_jtag_slave_translator:uav_waitrequest -> jtag_uart_avalon_jtag_slave_agent:m0_waitrequest
	wire          jtag_uart_avalon_jtag_slave_agent_m0_debugaccess;                            // jtag_uart_avalon_jtag_slave_agent:m0_debugaccess -> jtag_uart_avalon_jtag_slave_translator:uav_debugaccess
	wire   [25:0] jtag_uart_avalon_jtag_slave_agent_m0_address;                                // jtag_uart_avalon_jtag_slave_agent:m0_address -> jtag_uart_avalon_jtag_slave_translator:uav_address
	wire    [3:0] jtag_uart_avalon_jtag_slave_agent_m0_byteenable;                             // jtag_uart_avalon_jtag_slave_agent:m0_byteenable -> jtag_uart_avalon_jtag_slave_translator:uav_byteenable
	wire          jtag_uart_avalon_jtag_slave_agent_m0_read;                                   // jtag_uart_avalon_jtag_slave_agent:m0_read -> jtag_uart_avalon_jtag_slave_translator:uav_read
	wire          jtag_uart_avalon_jtag_slave_agent_m0_readdatavalid;                          // jtag_uart_avalon_jtag_slave_translator:uav_readdatavalid -> jtag_uart_avalon_jtag_slave_agent:m0_readdatavalid
	wire          jtag_uart_avalon_jtag_slave_agent_m0_lock;                                   // jtag_uart_avalon_jtag_slave_agent:m0_lock -> jtag_uart_avalon_jtag_slave_translator:uav_lock
	wire   [31:0] jtag_uart_avalon_jtag_slave_agent_m0_writedata;                              // jtag_uart_avalon_jtag_slave_agent:m0_writedata -> jtag_uart_avalon_jtag_slave_translator:uav_writedata
	wire          jtag_uart_avalon_jtag_slave_agent_m0_write;                                  // jtag_uart_avalon_jtag_slave_agent:m0_write -> jtag_uart_avalon_jtag_slave_translator:uav_write
	wire    [2:0] jtag_uart_avalon_jtag_slave_agent_m0_burstcount;                             // jtag_uart_avalon_jtag_slave_agent:m0_burstcount -> jtag_uart_avalon_jtag_slave_translator:uav_burstcount
	wire          jtag_uart_avalon_jtag_slave_agent_rf_source_valid;                           // jtag_uart_avalon_jtag_slave_agent:rf_source_valid -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_valid
	wire  [123:0] jtag_uart_avalon_jtag_slave_agent_rf_source_data;                            // jtag_uart_avalon_jtag_slave_agent:rf_source_data -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_data
	wire          jtag_uart_avalon_jtag_slave_agent_rf_source_ready;                           // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_ready -> jtag_uart_avalon_jtag_slave_agent:rf_source_ready
	wire          jtag_uart_avalon_jtag_slave_agent_rf_source_startofpacket;                   // jtag_uart_avalon_jtag_slave_agent:rf_source_startofpacket -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_startofpacket
	wire          jtag_uart_avalon_jtag_slave_agent_rf_source_endofpacket;                     // jtag_uart_avalon_jtag_slave_agent:rf_source_endofpacket -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_endofpacket
	wire          jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_valid;                        // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_valid -> jtag_uart_avalon_jtag_slave_agent:rf_sink_valid
	wire  [123:0] jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_data;                         // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_data -> jtag_uart_avalon_jtag_slave_agent:rf_sink_data
	wire          jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_ready;                        // jtag_uart_avalon_jtag_slave_agent:rf_sink_ready -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_ready
	wire          jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_startofpacket;                // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_startofpacket -> jtag_uart_avalon_jtag_slave_agent:rf_sink_startofpacket
	wire          jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_endofpacket;                  // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_endofpacket -> jtag_uart_avalon_jtag_slave_agent:rf_sink_endofpacket
	wire          jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_valid;                      // jtag_uart_avalon_jtag_slave_agent:rdata_fifo_src_valid -> jtag_uart_avalon_jtag_slave_agent:rdata_fifo_sink_valid
	wire   [33:0] jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_data;                       // jtag_uart_avalon_jtag_slave_agent:rdata_fifo_src_data -> jtag_uart_avalon_jtag_slave_agent:rdata_fifo_sink_data
	wire          jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_ready;                      // jtag_uart_avalon_jtag_slave_agent:rdata_fifo_sink_ready -> jtag_uart_avalon_jtag_slave_agent:rdata_fifo_src_ready
	wire          cmd_mux_src_valid;                                                           // cmd_mux:src_valid -> jtag_uart_avalon_jtag_slave_agent:cp_valid
	wire  [122:0] cmd_mux_src_data;                                                            // cmd_mux:src_data -> jtag_uart_avalon_jtag_slave_agent:cp_data
	wire          cmd_mux_src_ready;                                                           // jtag_uart_avalon_jtag_slave_agent:cp_ready -> cmd_mux:src_ready
	wire    [4:0] cmd_mux_src_channel;                                                         // cmd_mux:src_channel -> jtag_uart_avalon_jtag_slave_agent:cp_channel
	wire          cmd_mux_src_startofpacket;                                                   // cmd_mux:src_startofpacket -> jtag_uart_avalon_jtag_slave_agent:cp_startofpacket
	wire          cmd_mux_src_endofpacket;                                                     // cmd_mux:src_endofpacket -> jtag_uart_avalon_jtag_slave_agent:cp_endofpacket
	wire   [31:0] gfilsh_avl_csr_agent_m0_readdata;                                            // gfilsh_avl_csr_translator:uav_readdata -> gfilsh_avl_csr_agent:m0_readdata
	wire          gfilsh_avl_csr_agent_m0_waitrequest;                                         // gfilsh_avl_csr_translator:uav_waitrequest -> gfilsh_avl_csr_agent:m0_waitrequest
	wire          gfilsh_avl_csr_agent_m0_debugaccess;                                         // gfilsh_avl_csr_agent:m0_debugaccess -> gfilsh_avl_csr_translator:uav_debugaccess
	wire   [25:0] gfilsh_avl_csr_agent_m0_address;                                             // gfilsh_avl_csr_agent:m0_address -> gfilsh_avl_csr_translator:uav_address
	wire    [3:0] gfilsh_avl_csr_agent_m0_byteenable;                                          // gfilsh_avl_csr_agent:m0_byteenable -> gfilsh_avl_csr_translator:uav_byteenable
	wire          gfilsh_avl_csr_agent_m0_read;                                                // gfilsh_avl_csr_agent:m0_read -> gfilsh_avl_csr_translator:uav_read
	wire          gfilsh_avl_csr_agent_m0_readdatavalid;                                       // gfilsh_avl_csr_translator:uav_readdatavalid -> gfilsh_avl_csr_agent:m0_readdatavalid
	wire          gfilsh_avl_csr_agent_m0_lock;                                                // gfilsh_avl_csr_agent:m0_lock -> gfilsh_avl_csr_translator:uav_lock
	wire   [31:0] gfilsh_avl_csr_agent_m0_writedata;                                           // gfilsh_avl_csr_agent:m0_writedata -> gfilsh_avl_csr_translator:uav_writedata
	wire          gfilsh_avl_csr_agent_m0_write;                                               // gfilsh_avl_csr_agent:m0_write -> gfilsh_avl_csr_translator:uav_write
	wire    [2:0] gfilsh_avl_csr_agent_m0_burstcount;                                          // gfilsh_avl_csr_agent:m0_burstcount -> gfilsh_avl_csr_translator:uav_burstcount
	wire          gfilsh_avl_csr_agent_rf_source_valid;                                        // gfilsh_avl_csr_agent:rf_source_valid -> gfilsh_avl_csr_agent_rsp_fifo:in_valid
	wire  [123:0] gfilsh_avl_csr_agent_rf_source_data;                                         // gfilsh_avl_csr_agent:rf_source_data -> gfilsh_avl_csr_agent_rsp_fifo:in_data
	wire          gfilsh_avl_csr_agent_rf_source_ready;                                        // gfilsh_avl_csr_agent_rsp_fifo:in_ready -> gfilsh_avl_csr_agent:rf_source_ready
	wire          gfilsh_avl_csr_agent_rf_source_startofpacket;                                // gfilsh_avl_csr_agent:rf_source_startofpacket -> gfilsh_avl_csr_agent_rsp_fifo:in_startofpacket
	wire          gfilsh_avl_csr_agent_rf_source_endofpacket;                                  // gfilsh_avl_csr_agent:rf_source_endofpacket -> gfilsh_avl_csr_agent_rsp_fifo:in_endofpacket
	wire          gfilsh_avl_csr_agent_rsp_fifo_out_valid;                                     // gfilsh_avl_csr_agent_rsp_fifo:out_valid -> gfilsh_avl_csr_agent:rf_sink_valid
	wire  [123:0] gfilsh_avl_csr_agent_rsp_fifo_out_data;                                      // gfilsh_avl_csr_agent_rsp_fifo:out_data -> gfilsh_avl_csr_agent:rf_sink_data
	wire          gfilsh_avl_csr_agent_rsp_fifo_out_ready;                                     // gfilsh_avl_csr_agent:rf_sink_ready -> gfilsh_avl_csr_agent_rsp_fifo:out_ready
	wire          gfilsh_avl_csr_agent_rsp_fifo_out_startofpacket;                             // gfilsh_avl_csr_agent_rsp_fifo:out_startofpacket -> gfilsh_avl_csr_agent:rf_sink_startofpacket
	wire          gfilsh_avl_csr_agent_rsp_fifo_out_endofpacket;                               // gfilsh_avl_csr_agent_rsp_fifo:out_endofpacket -> gfilsh_avl_csr_agent:rf_sink_endofpacket
	wire          gfilsh_avl_csr_agent_rdata_fifo_src_valid;                                   // gfilsh_avl_csr_agent:rdata_fifo_src_valid -> gfilsh_avl_csr_agent:rdata_fifo_sink_valid
	wire   [33:0] gfilsh_avl_csr_agent_rdata_fifo_src_data;                                    // gfilsh_avl_csr_agent:rdata_fifo_src_data -> gfilsh_avl_csr_agent:rdata_fifo_sink_data
	wire          gfilsh_avl_csr_agent_rdata_fifo_src_ready;                                   // gfilsh_avl_csr_agent:rdata_fifo_sink_ready -> gfilsh_avl_csr_agent:rdata_fifo_src_ready
	wire          cmd_mux_001_src_valid;                                                       // cmd_mux_001:src_valid -> gfilsh_avl_csr_agent:cp_valid
	wire  [122:0] cmd_mux_001_src_data;                                                        // cmd_mux_001:src_data -> gfilsh_avl_csr_agent:cp_data
	wire          cmd_mux_001_src_ready;                                                       // gfilsh_avl_csr_agent:cp_ready -> cmd_mux_001:src_ready
	wire    [4:0] cmd_mux_001_src_channel;                                                     // cmd_mux_001:src_channel -> gfilsh_avl_csr_agent:cp_channel
	wire          cmd_mux_001_src_startofpacket;                                               // cmd_mux_001:src_startofpacket -> gfilsh_avl_csr_agent:cp_startofpacket
	wire          cmd_mux_001_src_endofpacket;                                                 // cmd_mux_001:src_endofpacket -> gfilsh_avl_csr_agent:cp_endofpacket
	wire   [31:0] gfilsh_avl_mem_agent_m0_readdata;                                            // gfilsh_avl_mem_translator:uav_readdata -> gfilsh_avl_mem_agent:m0_readdata
	wire          gfilsh_avl_mem_agent_m0_waitrequest;                                         // gfilsh_avl_mem_translator:uav_waitrequest -> gfilsh_avl_mem_agent:m0_waitrequest
	wire          gfilsh_avl_mem_agent_m0_debugaccess;                                         // gfilsh_avl_mem_agent:m0_debugaccess -> gfilsh_avl_mem_translator:uav_debugaccess
	wire   [25:0] gfilsh_avl_mem_agent_m0_address;                                             // gfilsh_avl_mem_agent:m0_address -> gfilsh_avl_mem_translator:uav_address
	wire    [3:0] gfilsh_avl_mem_agent_m0_byteenable;                                          // gfilsh_avl_mem_agent:m0_byteenable -> gfilsh_avl_mem_translator:uav_byteenable
	wire          gfilsh_avl_mem_agent_m0_read;                                                // gfilsh_avl_mem_agent:m0_read -> gfilsh_avl_mem_translator:uav_read
	wire          gfilsh_avl_mem_agent_m0_readdatavalid;                                       // gfilsh_avl_mem_translator:uav_readdatavalid -> gfilsh_avl_mem_agent:m0_readdatavalid
	wire          gfilsh_avl_mem_agent_m0_lock;                                                // gfilsh_avl_mem_agent:m0_lock -> gfilsh_avl_mem_translator:uav_lock
	wire   [31:0] gfilsh_avl_mem_agent_m0_writedata;                                           // gfilsh_avl_mem_agent:m0_writedata -> gfilsh_avl_mem_translator:uav_writedata
	wire          gfilsh_avl_mem_agent_m0_write;                                               // gfilsh_avl_mem_agent:m0_write -> gfilsh_avl_mem_translator:uav_write
	wire    [8:0] gfilsh_avl_mem_agent_m0_burstcount;                                          // gfilsh_avl_mem_agent:m0_burstcount -> gfilsh_avl_mem_translator:uav_burstcount
	wire          gfilsh_avl_mem_agent_rf_source_valid;                                        // gfilsh_avl_mem_agent:rf_source_valid -> gfilsh_avl_mem_agent_rsp_fifo:in_valid
	wire  [123:0] gfilsh_avl_mem_agent_rf_source_data;                                         // gfilsh_avl_mem_agent:rf_source_data -> gfilsh_avl_mem_agent_rsp_fifo:in_data
	wire          gfilsh_avl_mem_agent_rf_source_ready;                                        // gfilsh_avl_mem_agent_rsp_fifo:in_ready -> gfilsh_avl_mem_agent:rf_source_ready
	wire          gfilsh_avl_mem_agent_rf_source_startofpacket;                                // gfilsh_avl_mem_agent:rf_source_startofpacket -> gfilsh_avl_mem_agent_rsp_fifo:in_startofpacket
	wire          gfilsh_avl_mem_agent_rf_source_endofpacket;                                  // gfilsh_avl_mem_agent:rf_source_endofpacket -> gfilsh_avl_mem_agent_rsp_fifo:in_endofpacket
	wire          gfilsh_avl_mem_agent_rsp_fifo_out_valid;                                     // gfilsh_avl_mem_agent_rsp_fifo:out_valid -> gfilsh_avl_mem_agent:rf_sink_valid
	wire  [123:0] gfilsh_avl_mem_agent_rsp_fifo_out_data;                                      // gfilsh_avl_mem_agent_rsp_fifo:out_data -> gfilsh_avl_mem_agent:rf_sink_data
	wire          gfilsh_avl_mem_agent_rsp_fifo_out_ready;                                     // gfilsh_avl_mem_agent:rf_sink_ready -> gfilsh_avl_mem_agent_rsp_fifo:out_ready
	wire          gfilsh_avl_mem_agent_rsp_fifo_out_startofpacket;                             // gfilsh_avl_mem_agent_rsp_fifo:out_startofpacket -> gfilsh_avl_mem_agent:rf_sink_startofpacket
	wire          gfilsh_avl_mem_agent_rsp_fifo_out_endofpacket;                               // gfilsh_avl_mem_agent_rsp_fifo:out_endofpacket -> gfilsh_avl_mem_agent:rf_sink_endofpacket
	wire          gfilsh_avl_mem_agent_rdata_fifo_src_valid;                                   // gfilsh_avl_mem_agent:rdata_fifo_src_valid -> gfilsh_avl_mem_agent:rdata_fifo_sink_valid
	wire   [33:0] gfilsh_avl_mem_agent_rdata_fifo_src_data;                                    // gfilsh_avl_mem_agent:rdata_fifo_src_data -> gfilsh_avl_mem_agent:rdata_fifo_sink_data
	wire          gfilsh_avl_mem_agent_rdata_fifo_src_ready;                                   // gfilsh_avl_mem_agent:rdata_fifo_sink_ready -> gfilsh_avl_mem_agent:rdata_fifo_src_ready
	wire          cmd_mux_002_src_valid;                                                       // cmd_mux_002:src_valid -> gfilsh_avl_mem_agent:cp_valid
	wire  [122:0] cmd_mux_002_src_data;                                                        // cmd_mux_002:src_data -> gfilsh_avl_mem_agent:cp_data
	wire          cmd_mux_002_src_ready;                                                       // gfilsh_avl_mem_agent:cp_ready -> cmd_mux_002:src_ready
	wire    [4:0] cmd_mux_002_src_channel;                                                     // cmd_mux_002:src_channel -> gfilsh_avl_mem_agent:cp_channel
	wire          cmd_mux_002_src_startofpacket;                                               // cmd_mux_002:src_startofpacket -> gfilsh_avl_mem_agent:cp_startofpacket
	wire          cmd_mux_002_src_endofpacket;                                                 // cmd_mux_002:src_endofpacket -> gfilsh_avl_mem_agent:cp_endofpacket
	wire   [31:0] nios2_debug_mem_slave_agent_m0_readdata;                                     // nios2_debug_mem_slave_translator:uav_readdata -> nios2_debug_mem_slave_agent:m0_readdata
	wire          nios2_debug_mem_slave_agent_m0_waitrequest;                                  // nios2_debug_mem_slave_translator:uav_waitrequest -> nios2_debug_mem_slave_agent:m0_waitrequest
	wire          nios2_debug_mem_slave_agent_m0_debugaccess;                                  // nios2_debug_mem_slave_agent:m0_debugaccess -> nios2_debug_mem_slave_translator:uav_debugaccess
	wire   [25:0] nios2_debug_mem_slave_agent_m0_address;                                      // nios2_debug_mem_slave_agent:m0_address -> nios2_debug_mem_slave_translator:uav_address
	wire    [3:0] nios2_debug_mem_slave_agent_m0_byteenable;                                   // nios2_debug_mem_slave_agent:m0_byteenable -> nios2_debug_mem_slave_translator:uav_byteenable
	wire          nios2_debug_mem_slave_agent_m0_read;                                         // nios2_debug_mem_slave_agent:m0_read -> nios2_debug_mem_slave_translator:uav_read
	wire          nios2_debug_mem_slave_agent_m0_readdatavalid;                                // nios2_debug_mem_slave_translator:uav_readdatavalid -> nios2_debug_mem_slave_agent:m0_readdatavalid
	wire          nios2_debug_mem_slave_agent_m0_lock;                                         // nios2_debug_mem_slave_agent:m0_lock -> nios2_debug_mem_slave_translator:uav_lock
	wire   [31:0] nios2_debug_mem_slave_agent_m0_writedata;                                    // nios2_debug_mem_slave_agent:m0_writedata -> nios2_debug_mem_slave_translator:uav_writedata
	wire          nios2_debug_mem_slave_agent_m0_write;                                        // nios2_debug_mem_slave_agent:m0_write -> nios2_debug_mem_slave_translator:uav_write
	wire    [2:0] nios2_debug_mem_slave_agent_m0_burstcount;                                   // nios2_debug_mem_slave_agent:m0_burstcount -> nios2_debug_mem_slave_translator:uav_burstcount
	wire          nios2_debug_mem_slave_agent_rf_source_valid;                                 // nios2_debug_mem_slave_agent:rf_source_valid -> nios2_debug_mem_slave_agent_rsp_fifo:in_valid
	wire  [123:0] nios2_debug_mem_slave_agent_rf_source_data;                                  // nios2_debug_mem_slave_agent:rf_source_data -> nios2_debug_mem_slave_agent_rsp_fifo:in_data
	wire          nios2_debug_mem_slave_agent_rf_source_ready;                                 // nios2_debug_mem_slave_agent_rsp_fifo:in_ready -> nios2_debug_mem_slave_agent:rf_source_ready
	wire          nios2_debug_mem_slave_agent_rf_source_startofpacket;                         // nios2_debug_mem_slave_agent:rf_source_startofpacket -> nios2_debug_mem_slave_agent_rsp_fifo:in_startofpacket
	wire          nios2_debug_mem_slave_agent_rf_source_endofpacket;                           // nios2_debug_mem_slave_agent:rf_source_endofpacket -> nios2_debug_mem_slave_agent_rsp_fifo:in_endofpacket
	wire          nios2_debug_mem_slave_agent_rsp_fifo_out_valid;                              // nios2_debug_mem_slave_agent_rsp_fifo:out_valid -> nios2_debug_mem_slave_agent:rf_sink_valid
	wire  [123:0] nios2_debug_mem_slave_agent_rsp_fifo_out_data;                               // nios2_debug_mem_slave_agent_rsp_fifo:out_data -> nios2_debug_mem_slave_agent:rf_sink_data
	wire          nios2_debug_mem_slave_agent_rsp_fifo_out_ready;                              // nios2_debug_mem_slave_agent:rf_sink_ready -> nios2_debug_mem_slave_agent_rsp_fifo:out_ready
	wire          nios2_debug_mem_slave_agent_rsp_fifo_out_startofpacket;                      // nios2_debug_mem_slave_agent_rsp_fifo:out_startofpacket -> nios2_debug_mem_slave_agent:rf_sink_startofpacket
	wire          nios2_debug_mem_slave_agent_rsp_fifo_out_endofpacket;                        // nios2_debug_mem_slave_agent_rsp_fifo:out_endofpacket -> nios2_debug_mem_slave_agent:rf_sink_endofpacket
	wire          nios2_debug_mem_slave_agent_rdata_fifo_src_valid;                            // nios2_debug_mem_slave_agent:rdata_fifo_src_valid -> nios2_debug_mem_slave_agent:rdata_fifo_sink_valid
	wire   [33:0] nios2_debug_mem_slave_agent_rdata_fifo_src_data;                             // nios2_debug_mem_slave_agent:rdata_fifo_src_data -> nios2_debug_mem_slave_agent:rdata_fifo_sink_data
	wire          nios2_debug_mem_slave_agent_rdata_fifo_src_ready;                            // nios2_debug_mem_slave_agent:rdata_fifo_sink_ready -> nios2_debug_mem_slave_agent:rdata_fifo_src_ready
	wire          cmd_mux_003_src_valid;                                                       // cmd_mux_003:src_valid -> nios2_debug_mem_slave_agent:cp_valid
	wire  [122:0] cmd_mux_003_src_data;                                                        // cmd_mux_003:src_data -> nios2_debug_mem_slave_agent:cp_data
	wire          cmd_mux_003_src_ready;                                                       // nios2_debug_mem_slave_agent:cp_ready -> cmd_mux_003:src_ready
	wire    [4:0] cmd_mux_003_src_channel;                                                     // cmd_mux_003:src_channel -> nios2_debug_mem_slave_agent:cp_channel
	wire          cmd_mux_003_src_startofpacket;                                               // cmd_mux_003:src_startofpacket -> nios2_debug_mem_slave_agent:cp_startofpacket
	wire          cmd_mux_003_src_endofpacket;                                                 // cmd_mux_003:src_endofpacket -> nios2_debug_mem_slave_agent:cp_endofpacket
	wire   [31:0] main_memory_s1_agent_m0_readdata;                                            // main_memory_s1_translator:uav_readdata -> main_memory_s1_agent:m0_readdata
	wire          main_memory_s1_agent_m0_waitrequest;                                         // main_memory_s1_translator:uav_waitrequest -> main_memory_s1_agent:m0_waitrequest
	wire          main_memory_s1_agent_m0_debugaccess;                                         // main_memory_s1_agent:m0_debugaccess -> main_memory_s1_translator:uav_debugaccess
	wire   [25:0] main_memory_s1_agent_m0_address;                                             // main_memory_s1_agent:m0_address -> main_memory_s1_translator:uav_address
	wire    [3:0] main_memory_s1_agent_m0_byteenable;                                          // main_memory_s1_agent:m0_byteenable -> main_memory_s1_translator:uav_byteenable
	wire          main_memory_s1_agent_m0_read;                                                // main_memory_s1_agent:m0_read -> main_memory_s1_translator:uav_read
	wire          main_memory_s1_agent_m0_readdatavalid;                                       // main_memory_s1_translator:uav_readdatavalid -> main_memory_s1_agent:m0_readdatavalid
	wire          main_memory_s1_agent_m0_lock;                                                // main_memory_s1_agent:m0_lock -> main_memory_s1_translator:uav_lock
	wire   [31:0] main_memory_s1_agent_m0_writedata;                                           // main_memory_s1_agent:m0_writedata -> main_memory_s1_translator:uav_writedata
	wire          main_memory_s1_agent_m0_write;                                               // main_memory_s1_agent:m0_write -> main_memory_s1_translator:uav_write
	wire    [2:0] main_memory_s1_agent_m0_burstcount;                                          // main_memory_s1_agent:m0_burstcount -> main_memory_s1_translator:uav_burstcount
	wire          main_memory_s1_agent_rf_source_valid;                                        // main_memory_s1_agent:rf_source_valid -> main_memory_s1_agent_rsp_fifo:in_valid
	wire  [123:0] main_memory_s1_agent_rf_source_data;                                         // main_memory_s1_agent:rf_source_data -> main_memory_s1_agent_rsp_fifo:in_data
	wire          main_memory_s1_agent_rf_source_ready;                                        // main_memory_s1_agent_rsp_fifo:in_ready -> main_memory_s1_agent:rf_source_ready
	wire          main_memory_s1_agent_rf_source_startofpacket;                                // main_memory_s1_agent:rf_source_startofpacket -> main_memory_s1_agent_rsp_fifo:in_startofpacket
	wire          main_memory_s1_agent_rf_source_endofpacket;                                  // main_memory_s1_agent:rf_source_endofpacket -> main_memory_s1_agent_rsp_fifo:in_endofpacket
	wire          main_memory_s1_agent_rsp_fifo_out_valid;                                     // main_memory_s1_agent_rsp_fifo:out_valid -> main_memory_s1_agent:rf_sink_valid
	wire  [123:0] main_memory_s1_agent_rsp_fifo_out_data;                                      // main_memory_s1_agent_rsp_fifo:out_data -> main_memory_s1_agent:rf_sink_data
	wire          main_memory_s1_agent_rsp_fifo_out_ready;                                     // main_memory_s1_agent:rf_sink_ready -> main_memory_s1_agent_rsp_fifo:out_ready
	wire          main_memory_s1_agent_rsp_fifo_out_startofpacket;                             // main_memory_s1_agent_rsp_fifo:out_startofpacket -> main_memory_s1_agent:rf_sink_startofpacket
	wire          main_memory_s1_agent_rsp_fifo_out_endofpacket;                               // main_memory_s1_agent_rsp_fifo:out_endofpacket -> main_memory_s1_agent:rf_sink_endofpacket
	wire          main_memory_s1_agent_rdata_fifo_src_valid;                                   // main_memory_s1_agent:rdata_fifo_src_valid -> main_memory_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] main_memory_s1_agent_rdata_fifo_src_data;                                    // main_memory_s1_agent:rdata_fifo_src_data -> main_memory_s1_agent:rdata_fifo_sink_data
	wire          main_memory_s1_agent_rdata_fifo_src_ready;                                   // main_memory_s1_agent:rdata_fifo_sink_ready -> main_memory_s1_agent:rdata_fifo_src_ready
	wire          cmd_mux_004_src_valid;                                                       // cmd_mux_004:src_valid -> main_memory_s1_agent:cp_valid
	wire  [122:0] cmd_mux_004_src_data;                                                        // cmd_mux_004:src_data -> main_memory_s1_agent:cp_data
	wire          cmd_mux_004_src_ready;                                                       // main_memory_s1_agent:cp_ready -> cmd_mux_004:src_ready
	wire    [4:0] cmd_mux_004_src_channel;                                                     // cmd_mux_004:src_channel -> main_memory_s1_agent:cp_channel
	wire          cmd_mux_004_src_startofpacket;                                               // cmd_mux_004:src_startofpacket -> main_memory_s1_agent:cp_startofpacket
	wire          cmd_mux_004_src_endofpacket;                                                 // cmd_mux_004:src_endofpacket -> main_memory_s1_agent:cp_endofpacket
	wire          nios2_data_master_agent_cp_valid;                                            // nios2_data_master_agent:cp_valid -> router:sink_valid
	wire  [122:0] nios2_data_master_agent_cp_data;                                             // nios2_data_master_agent:cp_data -> router:sink_data
	wire          nios2_data_master_agent_cp_ready;                                            // router:sink_ready -> nios2_data_master_agent:cp_ready
	wire          nios2_data_master_agent_cp_startofpacket;                                    // nios2_data_master_agent:cp_startofpacket -> router:sink_startofpacket
	wire          nios2_data_master_agent_cp_endofpacket;                                      // nios2_data_master_agent:cp_endofpacket -> router:sink_endofpacket
	wire          nios2_instruction_master_agent_cp_valid;                                     // nios2_instruction_master_agent:cp_valid -> router_001:sink_valid
	wire  [122:0] nios2_instruction_master_agent_cp_data;                                      // nios2_instruction_master_agent:cp_data -> router_001:sink_data
	wire          nios2_instruction_master_agent_cp_ready;                                     // router_001:sink_ready -> nios2_instruction_master_agent:cp_ready
	wire          nios2_instruction_master_agent_cp_startofpacket;                             // nios2_instruction_master_agent:cp_startofpacket -> router_001:sink_startofpacket
	wire          nios2_instruction_master_agent_cp_endofpacket;                               // nios2_instruction_master_agent:cp_endofpacket -> router_001:sink_endofpacket
	wire          jtag_uart_avalon_jtag_slave_agent_rp_valid;                                  // jtag_uart_avalon_jtag_slave_agent:rp_valid -> router_002:sink_valid
	wire  [122:0] jtag_uart_avalon_jtag_slave_agent_rp_data;                                   // jtag_uart_avalon_jtag_slave_agent:rp_data -> router_002:sink_data
	wire          jtag_uart_avalon_jtag_slave_agent_rp_ready;                                  // router_002:sink_ready -> jtag_uart_avalon_jtag_slave_agent:rp_ready
	wire          jtag_uart_avalon_jtag_slave_agent_rp_startofpacket;                          // jtag_uart_avalon_jtag_slave_agent:rp_startofpacket -> router_002:sink_startofpacket
	wire          jtag_uart_avalon_jtag_slave_agent_rp_endofpacket;                            // jtag_uart_avalon_jtag_slave_agent:rp_endofpacket -> router_002:sink_endofpacket
	wire          router_002_src_valid;                                                        // router_002:src_valid -> rsp_demux:sink_valid
	wire  [122:0] router_002_src_data;                                                         // router_002:src_data -> rsp_demux:sink_data
	wire          router_002_src_ready;                                                        // rsp_demux:sink_ready -> router_002:src_ready
	wire    [4:0] router_002_src_channel;                                                      // router_002:src_channel -> rsp_demux:sink_channel
	wire          router_002_src_startofpacket;                                                // router_002:src_startofpacket -> rsp_demux:sink_startofpacket
	wire          router_002_src_endofpacket;                                                  // router_002:src_endofpacket -> rsp_demux:sink_endofpacket
	wire          gfilsh_avl_csr_agent_rp_valid;                                               // gfilsh_avl_csr_agent:rp_valid -> router_003:sink_valid
	wire  [122:0] gfilsh_avl_csr_agent_rp_data;                                                // gfilsh_avl_csr_agent:rp_data -> router_003:sink_data
	wire          gfilsh_avl_csr_agent_rp_ready;                                               // router_003:sink_ready -> gfilsh_avl_csr_agent:rp_ready
	wire          gfilsh_avl_csr_agent_rp_startofpacket;                                       // gfilsh_avl_csr_agent:rp_startofpacket -> router_003:sink_startofpacket
	wire          gfilsh_avl_csr_agent_rp_endofpacket;                                         // gfilsh_avl_csr_agent:rp_endofpacket -> router_003:sink_endofpacket
	wire          router_003_src_valid;                                                        // router_003:src_valid -> rsp_demux_001:sink_valid
	wire  [122:0] router_003_src_data;                                                         // router_003:src_data -> rsp_demux_001:sink_data
	wire          router_003_src_ready;                                                        // rsp_demux_001:sink_ready -> router_003:src_ready
	wire    [4:0] router_003_src_channel;                                                      // router_003:src_channel -> rsp_demux_001:sink_channel
	wire          router_003_src_startofpacket;                                                // router_003:src_startofpacket -> rsp_demux_001:sink_startofpacket
	wire          router_003_src_endofpacket;                                                  // router_003:src_endofpacket -> rsp_demux_001:sink_endofpacket
	wire          gfilsh_avl_mem_agent_rp_valid;                                               // gfilsh_avl_mem_agent:rp_valid -> router_004:sink_valid
	wire  [122:0] gfilsh_avl_mem_agent_rp_data;                                                // gfilsh_avl_mem_agent:rp_data -> router_004:sink_data
	wire          gfilsh_avl_mem_agent_rp_ready;                                               // router_004:sink_ready -> gfilsh_avl_mem_agent:rp_ready
	wire          gfilsh_avl_mem_agent_rp_startofpacket;                                       // gfilsh_avl_mem_agent:rp_startofpacket -> router_004:sink_startofpacket
	wire          gfilsh_avl_mem_agent_rp_endofpacket;                                         // gfilsh_avl_mem_agent:rp_endofpacket -> router_004:sink_endofpacket
	wire          router_004_src_valid;                                                        // router_004:src_valid -> rsp_demux_002:sink_valid
	wire  [122:0] router_004_src_data;                                                         // router_004:src_data -> rsp_demux_002:sink_data
	wire          router_004_src_ready;                                                        // rsp_demux_002:sink_ready -> router_004:src_ready
	wire    [4:0] router_004_src_channel;                                                      // router_004:src_channel -> rsp_demux_002:sink_channel
	wire          router_004_src_startofpacket;                                                // router_004:src_startofpacket -> rsp_demux_002:sink_startofpacket
	wire          router_004_src_endofpacket;                                                  // router_004:src_endofpacket -> rsp_demux_002:sink_endofpacket
	wire          nios2_debug_mem_slave_agent_rp_valid;                                        // nios2_debug_mem_slave_agent:rp_valid -> router_005:sink_valid
	wire  [122:0] nios2_debug_mem_slave_agent_rp_data;                                         // nios2_debug_mem_slave_agent:rp_data -> router_005:sink_data
	wire          nios2_debug_mem_slave_agent_rp_ready;                                        // router_005:sink_ready -> nios2_debug_mem_slave_agent:rp_ready
	wire          nios2_debug_mem_slave_agent_rp_startofpacket;                                // nios2_debug_mem_slave_agent:rp_startofpacket -> router_005:sink_startofpacket
	wire          nios2_debug_mem_slave_agent_rp_endofpacket;                                  // nios2_debug_mem_slave_agent:rp_endofpacket -> router_005:sink_endofpacket
	wire          router_005_src_valid;                                                        // router_005:src_valid -> rsp_demux_003:sink_valid
	wire  [122:0] router_005_src_data;                                                         // router_005:src_data -> rsp_demux_003:sink_data
	wire          router_005_src_ready;                                                        // rsp_demux_003:sink_ready -> router_005:src_ready
	wire    [4:0] router_005_src_channel;                                                      // router_005:src_channel -> rsp_demux_003:sink_channel
	wire          router_005_src_startofpacket;                                                // router_005:src_startofpacket -> rsp_demux_003:sink_startofpacket
	wire          router_005_src_endofpacket;                                                  // router_005:src_endofpacket -> rsp_demux_003:sink_endofpacket
	wire          main_memory_s1_agent_rp_valid;                                               // main_memory_s1_agent:rp_valid -> router_006:sink_valid
	wire  [122:0] main_memory_s1_agent_rp_data;                                                // main_memory_s1_agent:rp_data -> router_006:sink_data
	wire          main_memory_s1_agent_rp_ready;                                               // router_006:sink_ready -> main_memory_s1_agent:rp_ready
	wire          main_memory_s1_agent_rp_startofpacket;                                       // main_memory_s1_agent:rp_startofpacket -> router_006:sink_startofpacket
	wire          main_memory_s1_agent_rp_endofpacket;                                         // main_memory_s1_agent:rp_endofpacket -> router_006:sink_endofpacket
	wire          router_006_src_valid;                                                        // router_006:src_valid -> rsp_demux_004:sink_valid
	wire  [122:0] router_006_src_data;                                                         // router_006:src_data -> rsp_demux_004:sink_data
	wire          router_006_src_ready;                                                        // rsp_demux_004:sink_ready -> router_006:src_ready
	wire    [4:0] router_006_src_channel;                                                      // router_006:src_channel -> rsp_demux_004:sink_channel
	wire          router_006_src_startofpacket;                                                // router_006:src_startofpacket -> rsp_demux_004:sink_startofpacket
	wire          router_006_src_endofpacket;                                                  // router_006:src_endofpacket -> rsp_demux_004:sink_endofpacket
	wire          router_src_valid;                                                            // router:src_valid -> nios2_data_master_limiter:cmd_sink_valid
	wire  [122:0] router_src_data;                                                             // router:src_data -> nios2_data_master_limiter:cmd_sink_data
	wire          router_src_ready;                                                            // nios2_data_master_limiter:cmd_sink_ready -> router:src_ready
	wire    [4:0] router_src_channel;                                                          // router:src_channel -> nios2_data_master_limiter:cmd_sink_channel
	wire          router_src_startofpacket;                                                    // router:src_startofpacket -> nios2_data_master_limiter:cmd_sink_startofpacket
	wire          router_src_endofpacket;                                                      // router:src_endofpacket -> nios2_data_master_limiter:cmd_sink_endofpacket
	wire  [122:0] nios2_data_master_limiter_cmd_src_data;                                      // nios2_data_master_limiter:cmd_src_data -> cmd_demux:sink_data
	wire          nios2_data_master_limiter_cmd_src_ready;                                     // cmd_demux:sink_ready -> nios2_data_master_limiter:cmd_src_ready
	wire    [4:0] nios2_data_master_limiter_cmd_src_channel;                                   // nios2_data_master_limiter:cmd_src_channel -> cmd_demux:sink_channel
	wire          nios2_data_master_limiter_cmd_src_startofpacket;                             // nios2_data_master_limiter:cmd_src_startofpacket -> cmd_demux:sink_startofpacket
	wire          nios2_data_master_limiter_cmd_src_endofpacket;                               // nios2_data_master_limiter:cmd_src_endofpacket -> cmd_demux:sink_endofpacket
	wire          rsp_mux_src_valid;                                                           // rsp_mux:src_valid -> nios2_data_master_limiter:rsp_sink_valid
	wire  [122:0] rsp_mux_src_data;                                                            // rsp_mux:src_data -> nios2_data_master_limiter:rsp_sink_data
	wire          rsp_mux_src_ready;                                                           // nios2_data_master_limiter:rsp_sink_ready -> rsp_mux:src_ready
	wire    [4:0] rsp_mux_src_channel;                                                         // rsp_mux:src_channel -> nios2_data_master_limiter:rsp_sink_channel
	wire          rsp_mux_src_startofpacket;                                                   // rsp_mux:src_startofpacket -> nios2_data_master_limiter:rsp_sink_startofpacket
	wire          rsp_mux_src_endofpacket;                                                     // rsp_mux:src_endofpacket -> nios2_data_master_limiter:rsp_sink_endofpacket
	wire          nios2_data_master_limiter_rsp_src_valid;                                     // nios2_data_master_limiter:rsp_src_valid -> nios2_data_master_agent:rp_valid
	wire  [122:0] nios2_data_master_limiter_rsp_src_data;                                      // nios2_data_master_limiter:rsp_src_data -> nios2_data_master_agent:rp_data
	wire          nios2_data_master_limiter_rsp_src_ready;                                     // nios2_data_master_agent:rp_ready -> nios2_data_master_limiter:rsp_src_ready
	wire    [4:0] nios2_data_master_limiter_rsp_src_channel;                                   // nios2_data_master_limiter:rsp_src_channel -> nios2_data_master_agent:rp_channel
	wire          nios2_data_master_limiter_rsp_src_startofpacket;                             // nios2_data_master_limiter:rsp_src_startofpacket -> nios2_data_master_agent:rp_startofpacket
	wire          nios2_data_master_limiter_rsp_src_endofpacket;                               // nios2_data_master_limiter:rsp_src_endofpacket -> nios2_data_master_agent:rp_endofpacket
	wire          router_001_src_valid;                                                        // router_001:src_valid -> nios2_instruction_master_limiter:cmd_sink_valid
	wire  [122:0] router_001_src_data;                                                         // router_001:src_data -> nios2_instruction_master_limiter:cmd_sink_data
	wire          router_001_src_ready;                                                        // nios2_instruction_master_limiter:cmd_sink_ready -> router_001:src_ready
	wire    [4:0] router_001_src_channel;                                                      // router_001:src_channel -> nios2_instruction_master_limiter:cmd_sink_channel
	wire          router_001_src_startofpacket;                                                // router_001:src_startofpacket -> nios2_instruction_master_limiter:cmd_sink_startofpacket
	wire          router_001_src_endofpacket;                                                  // router_001:src_endofpacket -> nios2_instruction_master_limiter:cmd_sink_endofpacket
	wire  [122:0] nios2_instruction_master_limiter_cmd_src_data;                               // nios2_instruction_master_limiter:cmd_src_data -> cmd_demux_001:sink_data
	wire          nios2_instruction_master_limiter_cmd_src_ready;                              // cmd_demux_001:sink_ready -> nios2_instruction_master_limiter:cmd_src_ready
	wire    [4:0] nios2_instruction_master_limiter_cmd_src_channel;                            // nios2_instruction_master_limiter:cmd_src_channel -> cmd_demux_001:sink_channel
	wire          nios2_instruction_master_limiter_cmd_src_startofpacket;                      // nios2_instruction_master_limiter:cmd_src_startofpacket -> cmd_demux_001:sink_startofpacket
	wire          nios2_instruction_master_limiter_cmd_src_endofpacket;                        // nios2_instruction_master_limiter:cmd_src_endofpacket -> cmd_demux_001:sink_endofpacket
	wire          rsp_mux_001_src_valid;                                                       // rsp_mux_001:src_valid -> nios2_instruction_master_limiter:rsp_sink_valid
	wire  [122:0] rsp_mux_001_src_data;                                                        // rsp_mux_001:src_data -> nios2_instruction_master_limiter:rsp_sink_data
	wire          rsp_mux_001_src_ready;                                                       // nios2_instruction_master_limiter:rsp_sink_ready -> rsp_mux_001:src_ready
	wire    [4:0] rsp_mux_001_src_channel;                                                     // rsp_mux_001:src_channel -> nios2_instruction_master_limiter:rsp_sink_channel
	wire          rsp_mux_001_src_startofpacket;                                               // rsp_mux_001:src_startofpacket -> nios2_instruction_master_limiter:rsp_sink_startofpacket
	wire          rsp_mux_001_src_endofpacket;                                                 // rsp_mux_001:src_endofpacket -> nios2_instruction_master_limiter:rsp_sink_endofpacket
	wire          nios2_instruction_master_limiter_rsp_src_valid;                              // nios2_instruction_master_limiter:rsp_src_valid -> nios2_instruction_master_agent:rp_valid
	wire  [122:0] nios2_instruction_master_limiter_rsp_src_data;                               // nios2_instruction_master_limiter:rsp_src_data -> nios2_instruction_master_agent:rp_data
	wire          nios2_instruction_master_limiter_rsp_src_ready;                              // nios2_instruction_master_agent:rp_ready -> nios2_instruction_master_limiter:rsp_src_ready
	wire    [4:0] nios2_instruction_master_limiter_rsp_src_channel;                            // nios2_instruction_master_limiter:rsp_src_channel -> nios2_instruction_master_agent:rp_channel
	wire          nios2_instruction_master_limiter_rsp_src_startofpacket;                      // nios2_instruction_master_limiter:rsp_src_startofpacket -> nios2_instruction_master_agent:rp_startofpacket
	wire          nios2_instruction_master_limiter_rsp_src_endofpacket;                        // nios2_instruction_master_limiter:rsp_src_endofpacket -> nios2_instruction_master_agent:rp_endofpacket
	wire          cmd_demux_src0_valid;                                                        // cmd_demux:src0_valid -> cmd_mux:sink0_valid
	wire  [122:0] cmd_demux_src0_data;                                                         // cmd_demux:src0_data -> cmd_mux:sink0_data
	wire          cmd_demux_src0_ready;                                                        // cmd_mux:sink0_ready -> cmd_demux:src0_ready
	wire    [4:0] cmd_demux_src0_channel;                                                      // cmd_demux:src0_channel -> cmd_mux:sink0_channel
	wire          cmd_demux_src0_startofpacket;                                                // cmd_demux:src0_startofpacket -> cmd_mux:sink0_startofpacket
	wire          cmd_demux_src0_endofpacket;                                                  // cmd_demux:src0_endofpacket -> cmd_mux:sink0_endofpacket
	wire          cmd_demux_src1_valid;                                                        // cmd_demux:src1_valid -> cmd_mux_001:sink0_valid
	wire  [122:0] cmd_demux_src1_data;                                                         // cmd_demux:src1_data -> cmd_mux_001:sink0_data
	wire          cmd_demux_src1_ready;                                                        // cmd_mux_001:sink0_ready -> cmd_demux:src1_ready
	wire    [4:0] cmd_demux_src1_channel;                                                      // cmd_demux:src1_channel -> cmd_mux_001:sink0_channel
	wire          cmd_demux_src1_startofpacket;                                                // cmd_demux:src1_startofpacket -> cmd_mux_001:sink0_startofpacket
	wire          cmd_demux_src1_endofpacket;                                                  // cmd_demux:src1_endofpacket -> cmd_mux_001:sink0_endofpacket
	wire          cmd_demux_src2_valid;                                                        // cmd_demux:src2_valid -> cmd_mux_002:sink0_valid
	wire  [122:0] cmd_demux_src2_data;                                                         // cmd_demux:src2_data -> cmd_mux_002:sink0_data
	wire          cmd_demux_src2_ready;                                                        // cmd_mux_002:sink0_ready -> cmd_demux:src2_ready
	wire    [4:0] cmd_demux_src2_channel;                                                      // cmd_demux:src2_channel -> cmd_mux_002:sink0_channel
	wire          cmd_demux_src2_startofpacket;                                                // cmd_demux:src2_startofpacket -> cmd_mux_002:sink0_startofpacket
	wire          cmd_demux_src2_endofpacket;                                                  // cmd_demux:src2_endofpacket -> cmd_mux_002:sink0_endofpacket
	wire          cmd_demux_src3_valid;                                                        // cmd_demux:src3_valid -> cmd_mux_003:sink0_valid
	wire  [122:0] cmd_demux_src3_data;                                                         // cmd_demux:src3_data -> cmd_mux_003:sink0_data
	wire          cmd_demux_src3_ready;                                                        // cmd_mux_003:sink0_ready -> cmd_demux:src3_ready
	wire    [4:0] cmd_demux_src3_channel;                                                      // cmd_demux:src3_channel -> cmd_mux_003:sink0_channel
	wire          cmd_demux_src3_startofpacket;                                                // cmd_demux:src3_startofpacket -> cmd_mux_003:sink0_startofpacket
	wire          cmd_demux_src3_endofpacket;                                                  // cmd_demux:src3_endofpacket -> cmd_mux_003:sink0_endofpacket
	wire          cmd_demux_src4_valid;                                                        // cmd_demux:src4_valid -> cmd_mux_004:sink0_valid
	wire  [122:0] cmd_demux_src4_data;                                                         // cmd_demux:src4_data -> cmd_mux_004:sink0_data
	wire          cmd_demux_src4_ready;                                                        // cmd_mux_004:sink0_ready -> cmd_demux:src4_ready
	wire    [4:0] cmd_demux_src4_channel;                                                      // cmd_demux:src4_channel -> cmd_mux_004:sink0_channel
	wire          cmd_demux_src4_startofpacket;                                                // cmd_demux:src4_startofpacket -> cmd_mux_004:sink0_startofpacket
	wire          cmd_demux_src4_endofpacket;                                                  // cmd_demux:src4_endofpacket -> cmd_mux_004:sink0_endofpacket
	wire          cmd_demux_001_src0_valid;                                                    // cmd_demux_001:src0_valid -> cmd_mux_001:sink1_valid
	wire  [122:0] cmd_demux_001_src0_data;                                                     // cmd_demux_001:src0_data -> cmd_mux_001:sink1_data
	wire          cmd_demux_001_src0_ready;                                                    // cmd_mux_001:sink1_ready -> cmd_demux_001:src0_ready
	wire    [4:0] cmd_demux_001_src0_channel;                                                  // cmd_demux_001:src0_channel -> cmd_mux_001:sink1_channel
	wire          cmd_demux_001_src0_startofpacket;                                            // cmd_demux_001:src0_startofpacket -> cmd_mux_001:sink1_startofpacket
	wire          cmd_demux_001_src0_endofpacket;                                              // cmd_demux_001:src0_endofpacket -> cmd_mux_001:sink1_endofpacket
	wire          cmd_demux_001_src1_valid;                                                    // cmd_demux_001:src1_valid -> cmd_mux_003:sink1_valid
	wire  [122:0] cmd_demux_001_src1_data;                                                     // cmd_demux_001:src1_data -> cmd_mux_003:sink1_data
	wire          cmd_demux_001_src1_ready;                                                    // cmd_mux_003:sink1_ready -> cmd_demux_001:src1_ready
	wire    [4:0] cmd_demux_001_src1_channel;                                                  // cmd_demux_001:src1_channel -> cmd_mux_003:sink1_channel
	wire          cmd_demux_001_src1_startofpacket;                                            // cmd_demux_001:src1_startofpacket -> cmd_mux_003:sink1_startofpacket
	wire          cmd_demux_001_src1_endofpacket;                                              // cmd_demux_001:src1_endofpacket -> cmd_mux_003:sink1_endofpacket
	wire          cmd_demux_001_src2_valid;                                                    // cmd_demux_001:src2_valid -> cmd_mux_004:sink1_valid
	wire  [122:0] cmd_demux_001_src2_data;                                                     // cmd_demux_001:src2_data -> cmd_mux_004:sink1_data
	wire          cmd_demux_001_src2_ready;                                                    // cmd_mux_004:sink1_ready -> cmd_demux_001:src2_ready
	wire    [4:0] cmd_demux_001_src2_channel;                                                  // cmd_demux_001:src2_channel -> cmd_mux_004:sink1_channel
	wire          cmd_demux_001_src2_startofpacket;                                            // cmd_demux_001:src2_startofpacket -> cmd_mux_004:sink1_startofpacket
	wire          cmd_demux_001_src2_endofpacket;                                              // cmd_demux_001:src2_endofpacket -> cmd_mux_004:sink1_endofpacket
	wire          rsp_demux_src0_valid;                                                        // rsp_demux:src0_valid -> rsp_mux:sink0_valid
	wire  [122:0] rsp_demux_src0_data;                                                         // rsp_demux:src0_data -> rsp_mux:sink0_data
	wire          rsp_demux_src0_ready;                                                        // rsp_mux:sink0_ready -> rsp_demux:src0_ready
	wire    [4:0] rsp_demux_src0_channel;                                                      // rsp_demux:src0_channel -> rsp_mux:sink0_channel
	wire          rsp_demux_src0_startofpacket;                                                // rsp_demux:src0_startofpacket -> rsp_mux:sink0_startofpacket
	wire          rsp_demux_src0_endofpacket;                                                  // rsp_demux:src0_endofpacket -> rsp_mux:sink0_endofpacket
	wire          rsp_demux_001_src0_valid;                                                    // rsp_demux_001:src0_valid -> rsp_mux:sink1_valid
	wire  [122:0] rsp_demux_001_src0_data;                                                     // rsp_demux_001:src0_data -> rsp_mux:sink1_data
	wire          rsp_demux_001_src0_ready;                                                    // rsp_mux:sink1_ready -> rsp_demux_001:src0_ready
	wire    [4:0] rsp_demux_001_src0_channel;                                                  // rsp_demux_001:src0_channel -> rsp_mux:sink1_channel
	wire          rsp_demux_001_src0_startofpacket;                                            // rsp_demux_001:src0_startofpacket -> rsp_mux:sink1_startofpacket
	wire          rsp_demux_001_src0_endofpacket;                                              // rsp_demux_001:src0_endofpacket -> rsp_mux:sink1_endofpacket
	wire          rsp_demux_001_src1_valid;                                                    // rsp_demux_001:src1_valid -> rsp_mux_001:sink0_valid
	wire  [122:0] rsp_demux_001_src1_data;                                                     // rsp_demux_001:src1_data -> rsp_mux_001:sink0_data
	wire          rsp_demux_001_src1_ready;                                                    // rsp_mux_001:sink0_ready -> rsp_demux_001:src1_ready
	wire    [4:0] rsp_demux_001_src1_channel;                                                  // rsp_demux_001:src1_channel -> rsp_mux_001:sink0_channel
	wire          rsp_demux_001_src1_startofpacket;                                            // rsp_demux_001:src1_startofpacket -> rsp_mux_001:sink0_startofpacket
	wire          rsp_demux_001_src1_endofpacket;                                              // rsp_demux_001:src1_endofpacket -> rsp_mux_001:sink0_endofpacket
	wire          rsp_demux_002_src0_valid;                                                    // rsp_demux_002:src0_valid -> rsp_mux:sink2_valid
	wire  [122:0] rsp_demux_002_src0_data;                                                     // rsp_demux_002:src0_data -> rsp_mux:sink2_data
	wire          rsp_demux_002_src0_ready;                                                    // rsp_mux:sink2_ready -> rsp_demux_002:src0_ready
	wire    [4:0] rsp_demux_002_src0_channel;                                                  // rsp_demux_002:src0_channel -> rsp_mux:sink2_channel
	wire          rsp_demux_002_src0_startofpacket;                                            // rsp_demux_002:src0_startofpacket -> rsp_mux:sink2_startofpacket
	wire          rsp_demux_002_src0_endofpacket;                                              // rsp_demux_002:src0_endofpacket -> rsp_mux:sink2_endofpacket
	wire          rsp_demux_003_src0_valid;                                                    // rsp_demux_003:src0_valid -> rsp_mux:sink3_valid
	wire  [122:0] rsp_demux_003_src0_data;                                                     // rsp_demux_003:src0_data -> rsp_mux:sink3_data
	wire          rsp_demux_003_src0_ready;                                                    // rsp_mux:sink3_ready -> rsp_demux_003:src0_ready
	wire    [4:0] rsp_demux_003_src0_channel;                                                  // rsp_demux_003:src0_channel -> rsp_mux:sink3_channel
	wire          rsp_demux_003_src0_startofpacket;                                            // rsp_demux_003:src0_startofpacket -> rsp_mux:sink3_startofpacket
	wire          rsp_demux_003_src0_endofpacket;                                              // rsp_demux_003:src0_endofpacket -> rsp_mux:sink3_endofpacket
	wire          rsp_demux_003_src1_valid;                                                    // rsp_demux_003:src1_valid -> rsp_mux_001:sink1_valid
	wire  [122:0] rsp_demux_003_src1_data;                                                     // rsp_demux_003:src1_data -> rsp_mux_001:sink1_data
	wire          rsp_demux_003_src1_ready;                                                    // rsp_mux_001:sink1_ready -> rsp_demux_003:src1_ready
	wire    [4:0] rsp_demux_003_src1_channel;                                                  // rsp_demux_003:src1_channel -> rsp_mux_001:sink1_channel
	wire          rsp_demux_003_src1_startofpacket;                                            // rsp_demux_003:src1_startofpacket -> rsp_mux_001:sink1_startofpacket
	wire          rsp_demux_003_src1_endofpacket;                                              // rsp_demux_003:src1_endofpacket -> rsp_mux_001:sink1_endofpacket
	wire          rsp_demux_004_src0_valid;                                                    // rsp_demux_004:src0_valid -> rsp_mux:sink4_valid
	wire  [122:0] rsp_demux_004_src0_data;                                                     // rsp_demux_004:src0_data -> rsp_mux:sink4_data
	wire          rsp_demux_004_src0_ready;                                                    // rsp_mux:sink4_ready -> rsp_demux_004:src0_ready
	wire    [4:0] rsp_demux_004_src0_channel;                                                  // rsp_demux_004:src0_channel -> rsp_mux:sink4_channel
	wire          rsp_demux_004_src0_startofpacket;                                            // rsp_demux_004:src0_startofpacket -> rsp_mux:sink4_startofpacket
	wire          rsp_demux_004_src0_endofpacket;                                              // rsp_demux_004:src0_endofpacket -> rsp_mux:sink4_endofpacket
	wire          rsp_demux_004_src1_valid;                                                    // rsp_demux_004:src1_valid -> rsp_mux_001:sink2_valid
	wire  [122:0] rsp_demux_004_src1_data;                                                     // rsp_demux_004:src1_data -> rsp_mux_001:sink2_data
	wire          rsp_demux_004_src1_ready;                                                    // rsp_mux_001:sink2_ready -> rsp_demux_004:src1_ready
	wire    [4:0] rsp_demux_004_src1_channel;                                                  // rsp_demux_004:src1_channel -> rsp_mux_001:sink2_channel
	wire          rsp_demux_004_src1_startofpacket;                                            // rsp_demux_004:src1_startofpacket -> rsp_mux_001:sink2_startofpacket
	wire          rsp_demux_004_src1_endofpacket;                                              // rsp_demux_004:src1_endofpacket -> rsp_mux_001:sink2_endofpacket
	wire    [4:0] nios2_data_master_limiter_cmd_valid_data;                                    // nios2_data_master_limiter:cmd_src_valid -> cmd_demux:sink_valid
	wire    [4:0] nios2_instruction_master_limiter_cmd_valid_data;                             // nios2_instruction_master_limiter:cmd_src_valid -> cmd_demux_001:sink_valid

	altera_merlin_master_translator #(
		.AV_ADDRESS_W                (26),
		.AV_DATA_W                   (32),
		.AV_BURSTCOUNT_W             (1),
		.AV_BYTEENABLE_W             (4),
		.UAV_ADDRESS_W               (26),
		.UAV_BURSTCOUNT_W            (3),
		.USE_READ                    (1),
		.USE_WRITE                   (1),
		.USE_BEGINBURSTTRANSFER      (0),
		.USE_BEGINTRANSFER           (0),
		.USE_CHIPSELECT              (0),
		.USE_BURSTCOUNT              (0),
		.USE_READDATAVALID           (1),
		.USE_WAITREQUEST             (1),
		.USE_READRESPONSE            (0),
		.USE_WRITERESPONSE           (0),
		.AV_SYMBOLS_PER_WORD         (4),
		.AV_ADDRESS_SYMBOLS          (1),
		.AV_BURSTCOUNT_SYMBOLS       (0),
		.AV_CONSTANT_BURST_BEHAVIOR  (0),
		.UAV_CONSTANT_BURST_BEHAVIOR (0),
		.AV_LINEWRAPBURSTS           (0),
		.AV_REGISTERINCOMINGSIGNALS  (0),
		.SYNC_RESET                  (0),
		.WAITREQUEST_ALLOWANCE       (0)
	) nios2_data_master_translator (
		.clk                    (sys_clk_out_clk_clk),                                                  //   input,   width = 1,                       clk.clk
		.reset                  (nios2_reset_reset_bridge_in_reset_reset),                              //   input,   width = 1,                     reset.reset
		.uav_address            (nios2_data_master_translator_avalon_universal_master_0_address),       //  output,  width = 26, avalon_universal_master_0.address
		.uav_burstcount         (nios2_data_master_translator_avalon_universal_master_0_burstcount),    //  output,   width = 3,                          .burstcount
		.uav_read               (nios2_data_master_translator_avalon_universal_master_0_read),          //  output,   width = 1,                          .read
		.uav_write              (nios2_data_master_translator_avalon_universal_master_0_write),         //  output,   width = 1,                          .write
		.uav_waitrequest        (nios2_data_master_translator_avalon_universal_master_0_waitrequest),   //   input,   width = 1,                          .waitrequest
		.uav_readdatavalid      (nios2_data_master_translator_avalon_universal_master_0_readdatavalid), //   input,   width = 1,                          .readdatavalid
		.uav_byteenable         (nios2_data_master_translator_avalon_universal_master_0_byteenable),    //  output,   width = 4,                          .byteenable
		.uav_readdata           (nios2_data_master_translator_avalon_universal_master_0_readdata),      //   input,  width = 32,                          .readdata
		.uav_writedata          (nios2_data_master_translator_avalon_universal_master_0_writedata),     //  output,  width = 32,                          .writedata
		.uav_lock               (nios2_data_master_translator_avalon_universal_master_0_lock),          //  output,   width = 1,                          .lock
		.uav_debugaccess        (nios2_data_master_translator_avalon_universal_master_0_debugaccess),   //  output,   width = 1,                          .debugaccess
		.av_address             (nios2_data_master_address),                                            //   input,  width = 26,      avalon_anti_master_0.address
		.av_waitrequest         (nios2_data_master_waitrequest),                                        //  output,   width = 1,                          .waitrequest
		.av_byteenable          (nios2_data_master_byteenable),                                         //   input,   width = 4,                          .byteenable
		.av_read                (nios2_data_master_read),                                               //   input,   width = 1,                          .read
		.av_readdata            (nios2_data_master_readdata),                                           //  output,  width = 32,                          .readdata
		.av_readdatavalid       (nios2_data_master_readdatavalid),                                      //  output,   width = 1,                          .readdatavalid
		.av_write               (nios2_data_master_write),                                              //   input,   width = 1,                          .write
		.av_writedata           (nios2_data_master_writedata),                                          //   input,  width = 32,                          .writedata
		.av_debugaccess         (nios2_data_master_debugaccess),                                        //   input,   width = 1,                          .debugaccess
		.av_burstcount          (1'b1),                                                                 // (terminated),                                        
		.av_beginbursttransfer  (1'b0),                                                                 // (terminated),                                        
		.av_begintransfer       (1'b0),                                                                 // (terminated),                                        
		.av_chipselect          (1'b0),                                                                 // (terminated),                                        
		.av_lock                (1'b0),                                                                 // (terminated),                                        
		.uav_clken              (),                                                                     // (terminated),                                        
		.av_clken               (1'b1),                                                                 // (terminated),                                        
		.uav_response           (2'b00),                                                                // (terminated),                                        
		.av_response            (),                                                                     // (terminated),                                        
		.uav_writeresponsevalid (1'b0),                                                                 // (terminated),                                        
		.av_writeresponsevalid  ()                                                                      // (terminated),                                        
	);

	altera_merlin_master_translator #(
		.AV_ADDRESS_W                (26),
		.AV_DATA_W                   (32),
		.AV_BURSTCOUNT_W             (1),
		.AV_BYTEENABLE_W             (4),
		.UAV_ADDRESS_W               (26),
		.UAV_BURSTCOUNT_W            (3),
		.USE_READ                    (1),
		.USE_WRITE                   (0),
		.USE_BEGINBURSTTRANSFER      (0),
		.USE_BEGINTRANSFER           (0),
		.USE_CHIPSELECT              (0),
		.USE_BURSTCOUNT              (0),
		.USE_READDATAVALID           (1),
		.USE_WAITREQUEST             (1),
		.USE_READRESPONSE            (0),
		.USE_WRITERESPONSE           (0),
		.AV_SYMBOLS_PER_WORD         (4),
		.AV_ADDRESS_SYMBOLS          (1),
		.AV_BURSTCOUNT_SYMBOLS       (0),
		.AV_CONSTANT_BURST_BEHAVIOR  (0),
		.UAV_CONSTANT_BURST_BEHAVIOR (0),
		.AV_LINEWRAPBURSTS           (1),
		.AV_REGISTERINCOMINGSIGNALS  (0),
		.SYNC_RESET                  (0),
		.WAITREQUEST_ALLOWANCE       (0)
	) nios2_instruction_master_translator (
		.clk                    (sys_clk_out_clk_clk),                                                         //   input,   width = 1,                       clk.clk
		.reset                  (nios2_reset_reset_bridge_in_reset_reset),                                     //   input,   width = 1,                     reset.reset
		.uav_address            (nios2_instruction_master_translator_avalon_universal_master_0_address),       //  output,  width = 26, avalon_universal_master_0.address
		.uav_burstcount         (nios2_instruction_master_translator_avalon_universal_master_0_burstcount),    //  output,   width = 3,                          .burstcount
		.uav_read               (nios2_instruction_master_translator_avalon_universal_master_0_read),          //  output,   width = 1,                          .read
		.uav_write              (nios2_instruction_master_translator_avalon_universal_master_0_write),         //  output,   width = 1,                          .write
		.uav_waitrequest        (nios2_instruction_master_translator_avalon_universal_master_0_waitrequest),   //   input,   width = 1,                          .waitrequest
		.uav_readdatavalid      (nios2_instruction_master_translator_avalon_universal_master_0_readdatavalid), //   input,   width = 1,                          .readdatavalid
		.uav_byteenable         (nios2_instruction_master_translator_avalon_universal_master_0_byteenable),    //  output,   width = 4,                          .byteenable
		.uav_readdata           (nios2_instruction_master_translator_avalon_universal_master_0_readdata),      //   input,  width = 32,                          .readdata
		.uav_writedata          (nios2_instruction_master_translator_avalon_universal_master_0_writedata),     //  output,  width = 32,                          .writedata
		.uav_lock               (nios2_instruction_master_translator_avalon_universal_master_0_lock),          //  output,   width = 1,                          .lock
		.uav_debugaccess        (nios2_instruction_master_translator_avalon_universal_master_0_debugaccess),   //  output,   width = 1,                          .debugaccess
		.av_address             (nios2_instruction_master_address),                                            //   input,  width = 26,      avalon_anti_master_0.address
		.av_waitrequest         (nios2_instruction_master_waitrequest),                                        //  output,   width = 1,                          .waitrequest
		.av_read                (nios2_instruction_master_read),                                               //   input,   width = 1,                          .read
		.av_readdata            (nios2_instruction_master_readdata),                                           //  output,  width = 32,                          .readdata
		.av_readdatavalid       (nios2_instruction_master_readdatavalid),                                      //  output,   width = 1,                          .readdatavalid
		.av_burstcount          (1'b1),                                                                        // (terminated),                                        
		.av_byteenable          (4'b1111),                                                                     // (terminated),                                        
		.av_beginbursttransfer  (1'b0),                                                                        // (terminated),                                        
		.av_begintransfer       (1'b0),                                                                        // (terminated),                                        
		.av_chipselect          (1'b0),                                                                        // (terminated),                                        
		.av_write               (1'b0),                                                                        // (terminated),                                        
		.av_writedata           (32'b00000000000000000000000000000000),                                        // (terminated),                                        
		.av_lock                (1'b0),                                                                        // (terminated),                                        
		.av_debugaccess         (1'b0),                                                                        // (terminated),                                        
		.uav_clken              (),                                                                            // (terminated),                                        
		.av_clken               (1'b1),                                                                        // (terminated),                                        
		.uav_response           (2'b00),                                                                       // (terminated),                                        
		.av_response            (),                                                                            // (terminated),                                        
		.uav_writeresponsevalid (1'b0),                                                                        // (terminated),                                        
		.av_writeresponsevalid  ()                                                                             // (terminated),                                        
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (1),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (26),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) jtag_uart_avalon_jtag_slave_translator (
		.clk                    (sys_clk_out_clk_clk),                                //   input,   width = 1,                      clk.clk
		.reset                  (nios2_reset_reset_bridge_in_reset_reset),            //   input,   width = 1,                    reset.reset
		.uav_address            (jtag_uart_avalon_jtag_slave_agent_m0_address),       //   input,  width = 26, avalon_universal_slave_0.address
		.uav_burstcount         (jtag_uart_avalon_jtag_slave_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (jtag_uart_avalon_jtag_slave_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (jtag_uart_avalon_jtag_slave_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (jtag_uart_avalon_jtag_slave_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (jtag_uart_avalon_jtag_slave_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (jtag_uart_avalon_jtag_slave_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (jtag_uart_avalon_jtag_slave_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (jtag_uart_avalon_jtag_slave_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (jtag_uart_avalon_jtag_slave_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (jtag_uart_avalon_jtag_slave_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (jtag_uart_avalon_jtag_slave_address),                //  output,   width = 1,      avalon_anti_slave_0.address
		.av_write               (jtag_uart_avalon_jtag_slave_write),                  //  output,   width = 1,                         .write
		.av_read                (jtag_uart_avalon_jtag_slave_read),                   //  output,   width = 1,                         .read
		.av_readdata            (jtag_uart_avalon_jtag_slave_readdata),               //   input,  width = 32,                         .readdata
		.av_writedata           (jtag_uart_avalon_jtag_slave_writedata),              //  output,  width = 32,                         .writedata
		.av_waitrequest         (jtag_uart_avalon_jtag_slave_waitrequest),            //   input,   width = 1,                         .waitrequest
		.av_chipselect          (jtag_uart_avalon_jtag_slave_chipselect),             //  output,   width = 1,                         .chipselect
		.av_begintransfer       (),                                                   // (terminated),                                       
		.av_beginbursttransfer  (),                                                   // (terminated),                                       
		.av_burstcount          (),                                                   // (terminated),                                       
		.av_byteenable          (),                                                   // (terminated),                                       
		.av_readdatavalid       (1'b0),                                               // (terminated),                                       
		.av_writebyteenable     (),                                                   // (terminated),                                       
		.av_lock                (),                                                   // (terminated),                                       
		.av_clken               (),                                                   // (terminated),                                       
		.uav_clken              (1'b0),                                               // (terminated),                                       
		.av_debugaccess         (),                                                   // (terminated),                                       
		.av_outputenable        (),                                                   // (terminated),                                       
		.uav_response           (),                                                   // (terminated),                                       
		.av_response            (2'b00),                                              // (terminated),                                       
		.uav_writeresponsevalid (),                                                   // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                // (terminated),                                       
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (6),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (26),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) gfilsh_avl_csr_translator (
		.clk                    (sys_clk_out_clk_clk),                     //   input,   width = 1,                      clk.clk
		.reset                  (nios2_reset_reset_bridge_in_reset_reset), //   input,   width = 1,                    reset.reset
		.uav_address            (gfilsh_avl_csr_agent_m0_address),         //   input,  width = 26, avalon_universal_slave_0.address
		.uav_burstcount         (gfilsh_avl_csr_agent_m0_burstcount),      //   input,   width = 3,                         .burstcount
		.uav_read               (gfilsh_avl_csr_agent_m0_read),            //   input,   width = 1,                         .read
		.uav_write              (gfilsh_avl_csr_agent_m0_write),           //   input,   width = 1,                         .write
		.uav_waitrequest        (gfilsh_avl_csr_agent_m0_waitrequest),     //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (gfilsh_avl_csr_agent_m0_readdatavalid),   //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (gfilsh_avl_csr_agent_m0_byteenable),      //   input,   width = 4,                         .byteenable
		.uav_readdata           (gfilsh_avl_csr_agent_m0_readdata),        //  output,  width = 32,                         .readdata
		.uav_writedata          (gfilsh_avl_csr_agent_m0_writedata),       //   input,  width = 32,                         .writedata
		.uav_lock               (gfilsh_avl_csr_agent_m0_lock),            //   input,   width = 1,                         .lock
		.uav_debugaccess        (gfilsh_avl_csr_agent_m0_debugaccess),     //   input,   width = 1,                         .debugaccess
		.av_address             (gfilsh_avl_csr_address),                  //  output,   width = 6,      avalon_anti_slave_0.address
		.av_write               (gfilsh_avl_csr_write),                    //  output,   width = 1,                         .write
		.av_read                (gfilsh_avl_csr_read),                     //  output,   width = 1,                         .read
		.av_readdata            (gfilsh_avl_csr_readdata),                 //   input,  width = 32,                         .readdata
		.av_writedata           (gfilsh_avl_csr_writedata),                //  output,  width = 32,                         .writedata
		.av_readdatavalid       (gfilsh_avl_csr_readdatavalid),            //   input,   width = 1,                         .readdatavalid
		.av_waitrequest         (gfilsh_avl_csr_waitrequest),              //   input,   width = 1,                         .waitrequest
		.av_begintransfer       (),                                        // (terminated),                                       
		.av_beginbursttransfer  (),                                        // (terminated),                                       
		.av_burstcount          (),                                        // (terminated),                                       
		.av_byteenable          (),                                        // (terminated),                                       
		.av_writebyteenable     (),                                        // (terminated),                                       
		.av_lock                (),                                        // (terminated),                                       
		.av_chipselect          (),                                        // (terminated),                                       
		.av_clken               (),                                        // (terminated),                                       
		.uav_clken              (1'b0),                                    // (terminated),                                       
		.av_debugaccess         (),                                        // (terminated),                                       
		.av_outputenable        (),                                        // (terminated),                                       
		.uav_response           (),                                        // (terminated),                                       
		.av_response            (2'b00),                                   // (terminated),                                       
		.uav_writeresponsevalid (),                                        // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                     // (terminated),                                       
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (23),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (7),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (26),
		.UAV_BURSTCOUNT_W               (9),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (1),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (1),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (0),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) gfilsh_avl_mem_translator (
		.clk                    (sys_clk_out_clk_clk),                     //   input,   width = 1,                      clk.clk
		.reset                  (nios2_reset_reset_bridge_in_reset_reset), //   input,   width = 1,                    reset.reset
		.uav_address            (gfilsh_avl_mem_agent_m0_address),         //   input,  width = 26, avalon_universal_slave_0.address
		.uav_burstcount         (gfilsh_avl_mem_agent_m0_burstcount),      //   input,   width = 9,                         .burstcount
		.uav_read               (gfilsh_avl_mem_agent_m0_read),            //   input,   width = 1,                         .read
		.uav_write              (gfilsh_avl_mem_agent_m0_write),           //   input,   width = 1,                         .write
		.uav_waitrequest        (gfilsh_avl_mem_agent_m0_waitrequest),     //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (gfilsh_avl_mem_agent_m0_readdatavalid),   //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (gfilsh_avl_mem_agent_m0_byteenable),      //   input,   width = 4,                         .byteenable
		.uav_readdata           (gfilsh_avl_mem_agent_m0_readdata),        //  output,  width = 32,                         .readdata
		.uav_writedata          (gfilsh_avl_mem_agent_m0_writedata),       //   input,  width = 32,                         .writedata
		.uav_lock               (gfilsh_avl_mem_agent_m0_lock),            //   input,   width = 1,                         .lock
		.uav_debugaccess        (gfilsh_avl_mem_agent_m0_debugaccess),     //   input,   width = 1,                         .debugaccess
		.av_address             (gfilsh_avl_mem_address),                  //  output,  width = 23,      avalon_anti_slave_0.address
		.av_write               (gfilsh_avl_mem_write),                    //  output,   width = 1,                         .write
		.av_read                (gfilsh_avl_mem_read),                     //  output,   width = 1,                         .read
		.av_readdata            (gfilsh_avl_mem_readdata),                 //   input,  width = 32,                         .readdata
		.av_writedata           (gfilsh_avl_mem_writedata),                //  output,  width = 32,                         .writedata
		.av_burstcount          (gfilsh_avl_mem_burstcount),               //  output,   width = 7,                         .burstcount
		.av_byteenable          (gfilsh_avl_mem_byteenable),               //  output,   width = 4,                         .byteenable
		.av_readdatavalid       (gfilsh_avl_mem_readdatavalid),            //   input,   width = 1,                         .readdatavalid
		.av_waitrequest         (gfilsh_avl_mem_waitrequest),              //   input,   width = 1,                         .waitrequest
		.av_begintransfer       (),                                        // (terminated),                                       
		.av_beginbursttransfer  (),                                        // (terminated),                                       
		.av_writebyteenable     (),                                        // (terminated),                                       
		.av_lock                (),                                        // (terminated),                                       
		.av_chipselect          (),                                        // (terminated),                                       
		.av_clken               (),                                        // (terminated),                                       
		.uav_clken              (1'b0),                                    // (terminated),                                       
		.av_debugaccess         (),                                        // (terminated),                                       
		.av_outputenable        (),                                        // (terminated),                                       
		.uav_response           (),                                        // (terminated),                                       
		.av_response            (2'b00),                                   // (terminated),                                       
		.uav_writeresponsevalid (),                                        // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                     // (terminated),                                       
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (9),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (26),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) nios2_debug_mem_slave_translator (
		.clk                    (sys_clk_out_clk_clk),                          //   input,   width = 1,                      clk.clk
		.reset                  (nios2_reset_reset_bridge_in_reset_reset),      //   input,   width = 1,                    reset.reset
		.uav_address            (nios2_debug_mem_slave_agent_m0_address),       //   input,  width = 26, avalon_universal_slave_0.address
		.uav_burstcount         (nios2_debug_mem_slave_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (nios2_debug_mem_slave_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (nios2_debug_mem_slave_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (nios2_debug_mem_slave_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (nios2_debug_mem_slave_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (nios2_debug_mem_slave_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (nios2_debug_mem_slave_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (nios2_debug_mem_slave_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (nios2_debug_mem_slave_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (nios2_debug_mem_slave_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (nios2_debug_mem_slave_address),                //  output,   width = 9,      avalon_anti_slave_0.address
		.av_write               (nios2_debug_mem_slave_write),                  //  output,   width = 1,                         .write
		.av_read                (nios2_debug_mem_slave_read),                   //  output,   width = 1,                         .read
		.av_readdata            (nios2_debug_mem_slave_readdata),               //   input,  width = 32,                         .readdata
		.av_writedata           (nios2_debug_mem_slave_writedata),              //  output,  width = 32,                         .writedata
		.av_byteenable          (nios2_debug_mem_slave_byteenable),             //  output,   width = 4,                         .byteenable
		.av_waitrequest         (nios2_debug_mem_slave_waitrequest),            //   input,   width = 1,                         .waitrequest
		.av_debugaccess         (nios2_debug_mem_slave_debugaccess),            //  output,   width = 1,                         .debugaccess
		.av_begintransfer       (),                                             // (terminated),                                       
		.av_beginbursttransfer  (),                                             // (terminated),                                       
		.av_burstcount          (),                                             // (terminated),                                       
		.av_readdatavalid       (1'b0),                                         // (terminated),                                       
		.av_writebyteenable     (),                                             // (terminated),                                       
		.av_lock                (),                                             // (terminated),                                       
		.av_chipselect          (),                                             // (terminated),                                       
		.av_clken               (),                                             // (terminated),                                       
		.uav_clken              (1'b0),                                         // (terminated),                                       
		.av_outputenable        (),                                             // (terminated),                                       
		.uav_response           (),                                             // (terminated),                                       
		.av_response            (2'b00),                                        // (terminated),                                       
		.uav_writeresponsevalid (),                                             // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                          // (terminated),                                       
	);

	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (15),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (26),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (1),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (0),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) main_memory_s1_translator (
		.clk                    (sys_clk_out_clk_clk),                     //   input,   width = 1,                      clk.clk
		.reset                  (nios2_reset_reset_bridge_in_reset_reset), //   input,   width = 1,                    reset.reset
		.uav_address            (main_memory_s1_agent_m0_address),         //   input,  width = 26, avalon_universal_slave_0.address
		.uav_burstcount         (main_memory_s1_agent_m0_burstcount),      //   input,   width = 3,                         .burstcount
		.uav_read               (main_memory_s1_agent_m0_read),            //   input,   width = 1,                         .read
		.uav_write              (main_memory_s1_agent_m0_write),           //   input,   width = 1,                         .write
		.uav_waitrequest        (main_memory_s1_agent_m0_waitrequest),     //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (main_memory_s1_agent_m0_readdatavalid),   //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (main_memory_s1_agent_m0_byteenable),      //   input,   width = 4,                         .byteenable
		.uav_readdata           (main_memory_s1_agent_m0_readdata),        //  output,  width = 32,                         .readdata
		.uav_writedata          (main_memory_s1_agent_m0_writedata),       //   input,  width = 32,                         .writedata
		.uav_lock               (main_memory_s1_agent_m0_lock),            //   input,   width = 1,                         .lock
		.uav_debugaccess        (main_memory_s1_agent_m0_debugaccess),     //   input,   width = 1,                         .debugaccess
		.av_address             (main_memory_s1_address),                  //  output,  width = 15,      avalon_anti_slave_0.address
		.av_write               (main_memory_s1_write),                    //  output,   width = 1,                         .write
		.av_readdata            (main_memory_s1_readdata),                 //   input,  width = 32,                         .readdata
		.av_writedata           (main_memory_s1_writedata),                //  output,  width = 32,                         .writedata
		.av_byteenable          (main_memory_s1_byteenable),               //  output,   width = 4,                         .byteenable
		.av_chipselect          (main_memory_s1_chipselect),               //  output,   width = 1,                         .chipselect
		.av_clken               (main_memory_s1_clken),                    //  output,   width = 1,                         .clken
		.av_read                (),                                        // (terminated),                                       
		.av_begintransfer       (),                                        // (terminated),                                       
		.av_beginbursttransfer  (),                                        // (terminated),                                       
		.av_burstcount          (),                                        // (terminated),                                       
		.av_readdatavalid       (1'b0),                                    // (terminated),                                       
		.av_waitrequest         (1'b0),                                    // (terminated),                                       
		.av_writebyteenable     (),                                        // (terminated),                                       
		.av_lock                (),                                        // (terminated),                                       
		.uav_clken              (1'b0),                                    // (terminated),                                       
		.av_debugaccess         (),                                        // (terminated),                                       
		.av_outputenable        (),                                        // (terminated),                                       
		.uav_response           (),                                        // (terminated),                                       
		.av_response            (2'b00),                                   // (terminated),                                       
		.uav_writeresponsevalid (),                                        // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                     // (terminated),                                       
	);

	altera_merlin_master_agent #(
		.PKT_WUNIQUE               (122),
		.PKT_DOMAIN_H              (121),
		.PKT_DOMAIN_L              (120),
		.PKT_SNOOP_H               (119),
		.PKT_SNOOP_L               (116),
		.PKT_BARRIER_H             (115),
		.PKT_BARRIER_L             (114),
		.PKT_ORI_BURST_SIZE_H      (113),
		.PKT_ORI_BURST_SIZE_L      (111),
		.PKT_RESPONSE_STATUS_H     (110),
		.PKT_RESPONSE_STATUS_L     (109),
		.PKT_QOS_H                 (94),
		.PKT_QOS_L                 (94),
		.PKT_DATA_SIDEBAND_H       (92),
		.PKT_DATA_SIDEBAND_L       (92),
		.PKT_ADDR_SIDEBAND_H       (91),
		.PKT_ADDR_SIDEBAND_L       (91),
		.PKT_BURST_TYPE_H          (90),
		.PKT_BURST_TYPE_L          (89),
		.PKT_CACHE_H               (108),
		.PKT_CACHE_L               (105),
		.PKT_THREAD_ID_H           (101),
		.PKT_THREAD_ID_L           (101),
		.PKT_BURST_SIZE_H          (88),
		.PKT_BURST_SIZE_L          (86),
		.PKT_TRANS_EXCLUSIVE       (67),
		.PKT_TRANS_LOCK            (66),
		.PKT_BEGIN_BURST           (93),
		.PKT_PROTECTION_H          (104),
		.PKT_PROTECTION_L          (102),
		.PKT_BURSTWRAP_H           (85),
		.PKT_BURSTWRAP_L           (77),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (68),
		.PKT_ADDR_H                (61),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (62),
		.PKT_TRANS_POSTED          (63),
		.PKT_TRANS_WRITE           (64),
		.PKT_TRANS_READ            (65),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (97),
		.PKT_SRC_ID_L              (95),
		.PKT_DEST_ID_H             (100),
		.PKT_DEST_ID_L             (98),
		.ST_DATA_W                 (123),
		.ST_CHANNEL_W              (5),
		.AV_BURSTCOUNT_W           (3),
		.SUPPRESS_0_BYTEEN_RSP     (0),
		.ID                        (0),
		.BURSTWRAP_VALUE           (511),
		.CACHE_VALUE               (0),
		.SECURE_ACCESS_BIT         (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.DOMAIN_VALUE              (3),
		.BARRIER_VALUE             (0),
		.SNOOP_VALUE               (0),
		.WUNIQUE_VALUE             (0),
		.SYNC_RESET                (0)
	) nios2_data_master_agent (
		.clk                   (sys_clk_out_clk_clk),                                                  //   input,    width = 1,       clk.clk
		.reset                 (nios2_reset_reset_bridge_in_reset_reset),                              //   input,    width = 1, clk_reset.reset
		.av_address            (nios2_data_master_translator_avalon_universal_master_0_address),       //   input,   width = 26,        av.address
		.av_write              (nios2_data_master_translator_avalon_universal_master_0_write),         //   input,    width = 1,          .write
		.av_read               (nios2_data_master_translator_avalon_universal_master_0_read),          //   input,    width = 1,          .read
		.av_writedata          (nios2_data_master_translator_avalon_universal_master_0_writedata),     //   input,   width = 32,          .writedata
		.av_readdata           (nios2_data_master_translator_avalon_universal_master_0_readdata),      //  output,   width = 32,          .readdata
		.av_waitrequest        (nios2_data_master_translator_avalon_universal_master_0_waitrequest),   //  output,    width = 1,          .waitrequest
		.av_readdatavalid      (nios2_data_master_translator_avalon_universal_master_0_readdatavalid), //  output,    width = 1,          .readdatavalid
		.av_byteenable         (nios2_data_master_translator_avalon_universal_master_0_byteenable),    //   input,    width = 4,          .byteenable
		.av_burstcount         (nios2_data_master_translator_avalon_universal_master_0_burstcount),    //   input,    width = 3,          .burstcount
		.av_debugaccess        (nios2_data_master_translator_avalon_universal_master_0_debugaccess),   //   input,    width = 1,          .debugaccess
		.av_lock               (nios2_data_master_translator_avalon_universal_master_0_lock),          //   input,    width = 1,          .lock
		.cp_valid              (nios2_data_master_agent_cp_valid),                                     //  output,    width = 1,        cp.valid
		.cp_data               (nios2_data_master_agent_cp_data),                                      //  output,  width = 123,          .data
		.cp_startofpacket      (nios2_data_master_agent_cp_startofpacket),                             //  output,    width = 1,          .startofpacket
		.cp_endofpacket        (nios2_data_master_agent_cp_endofpacket),                               //  output,    width = 1,          .endofpacket
		.cp_ready              (nios2_data_master_agent_cp_ready),                                     //   input,    width = 1,          .ready
		.rp_valid              (nios2_data_master_limiter_rsp_src_valid),                              //   input,    width = 1,        rp.valid
		.rp_data               (nios2_data_master_limiter_rsp_src_data),                               //   input,  width = 123,          .data
		.rp_channel            (nios2_data_master_limiter_rsp_src_channel),                            //   input,    width = 5,          .channel
		.rp_startofpacket      (nios2_data_master_limiter_rsp_src_startofpacket),                      //   input,    width = 1,          .startofpacket
		.rp_endofpacket        (nios2_data_master_limiter_rsp_src_endofpacket),                        //   input,    width = 1,          .endofpacket
		.rp_ready              (nios2_data_master_limiter_rsp_src_ready),                              //  output,    width = 1,          .ready
		.av_response           (),                                                                     // (terminated),                         
		.av_writeresponsevalid ()                                                                      // (terminated),                         
	);

	altera_merlin_master_agent #(
		.PKT_WUNIQUE               (122),
		.PKT_DOMAIN_H              (121),
		.PKT_DOMAIN_L              (120),
		.PKT_SNOOP_H               (119),
		.PKT_SNOOP_L               (116),
		.PKT_BARRIER_H             (115),
		.PKT_BARRIER_L             (114),
		.PKT_ORI_BURST_SIZE_H      (113),
		.PKT_ORI_BURST_SIZE_L      (111),
		.PKT_RESPONSE_STATUS_H     (110),
		.PKT_RESPONSE_STATUS_L     (109),
		.PKT_QOS_H                 (94),
		.PKT_QOS_L                 (94),
		.PKT_DATA_SIDEBAND_H       (92),
		.PKT_DATA_SIDEBAND_L       (92),
		.PKT_ADDR_SIDEBAND_H       (91),
		.PKT_ADDR_SIDEBAND_L       (91),
		.PKT_BURST_TYPE_H          (90),
		.PKT_BURST_TYPE_L          (89),
		.PKT_CACHE_H               (108),
		.PKT_CACHE_L               (105),
		.PKT_THREAD_ID_H           (101),
		.PKT_THREAD_ID_L           (101),
		.PKT_BURST_SIZE_H          (88),
		.PKT_BURST_SIZE_L          (86),
		.PKT_TRANS_EXCLUSIVE       (67),
		.PKT_TRANS_LOCK            (66),
		.PKT_BEGIN_BURST           (93),
		.PKT_PROTECTION_H          (104),
		.PKT_PROTECTION_L          (102),
		.PKT_BURSTWRAP_H           (85),
		.PKT_BURSTWRAP_L           (77),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (68),
		.PKT_ADDR_H                (61),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (62),
		.PKT_TRANS_POSTED          (63),
		.PKT_TRANS_WRITE           (64),
		.PKT_TRANS_READ            (65),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (97),
		.PKT_SRC_ID_L              (95),
		.PKT_DEST_ID_H             (100),
		.PKT_DEST_ID_L             (98),
		.ST_DATA_W                 (123),
		.ST_CHANNEL_W              (5),
		.AV_BURSTCOUNT_W           (3),
		.SUPPRESS_0_BYTEEN_RSP     (0),
		.ID                        (1),
		.BURSTWRAP_VALUE           (3),
		.CACHE_VALUE               (0),
		.SECURE_ACCESS_BIT         (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.DOMAIN_VALUE              (3),
		.BARRIER_VALUE             (0),
		.SNOOP_VALUE               (0),
		.WUNIQUE_VALUE             (0),
		.SYNC_RESET                (0)
	) nios2_instruction_master_agent (
		.clk                   (sys_clk_out_clk_clk),                                                         //   input,    width = 1,       clk.clk
		.reset                 (nios2_reset_reset_bridge_in_reset_reset),                                     //   input,    width = 1, clk_reset.reset
		.av_address            (nios2_instruction_master_translator_avalon_universal_master_0_address),       //   input,   width = 26,        av.address
		.av_write              (nios2_instruction_master_translator_avalon_universal_master_0_write),         //   input,    width = 1,          .write
		.av_read               (nios2_instruction_master_translator_avalon_universal_master_0_read),          //   input,    width = 1,          .read
		.av_writedata          (nios2_instruction_master_translator_avalon_universal_master_0_writedata),     //   input,   width = 32,          .writedata
		.av_readdata           (nios2_instruction_master_translator_avalon_universal_master_0_readdata),      //  output,   width = 32,          .readdata
		.av_waitrequest        (nios2_instruction_master_translator_avalon_universal_master_0_waitrequest),   //  output,    width = 1,          .waitrequest
		.av_readdatavalid      (nios2_instruction_master_translator_avalon_universal_master_0_readdatavalid), //  output,    width = 1,          .readdatavalid
		.av_byteenable         (nios2_instruction_master_translator_avalon_universal_master_0_byteenable),    //   input,    width = 4,          .byteenable
		.av_burstcount         (nios2_instruction_master_translator_avalon_universal_master_0_burstcount),    //   input,    width = 3,          .burstcount
		.av_debugaccess        (nios2_instruction_master_translator_avalon_universal_master_0_debugaccess),   //   input,    width = 1,          .debugaccess
		.av_lock               (nios2_instruction_master_translator_avalon_universal_master_0_lock),          //   input,    width = 1,          .lock
		.cp_valid              (nios2_instruction_master_agent_cp_valid),                                     //  output,    width = 1,        cp.valid
		.cp_data               (nios2_instruction_master_agent_cp_data),                                      //  output,  width = 123,          .data
		.cp_startofpacket      (nios2_instruction_master_agent_cp_startofpacket),                             //  output,    width = 1,          .startofpacket
		.cp_endofpacket        (nios2_instruction_master_agent_cp_endofpacket),                               //  output,    width = 1,          .endofpacket
		.cp_ready              (nios2_instruction_master_agent_cp_ready),                                     //   input,    width = 1,          .ready
		.rp_valid              (nios2_instruction_master_limiter_rsp_src_valid),                              //   input,    width = 1,        rp.valid
		.rp_data               (nios2_instruction_master_limiter_rsp_src_data),                               //   input,  width = 123,          .data
		.rp_channel            (nios2_instruction_master_limiter_rsp_src_channel),                            //   input,    width = 5,          .channel
		.rp_startofpacket      (nios2_instruction_master_limiter_rsp_src_startofpacket),                      //   input,    width = 1,          .startofpacket
		.rp_endofpacket        (nios2_instruction_master_limiter_rsp_src_endofpacket),                        //   input,    width = 1,          .endofpacket
		.rp_ready              (nios2_instruction_master_limiter_rsp_src_ready),                              //  output,    width = 1,          .ready
		.av_response           (),                                                                            // (terminated),                         
		.av_writeresponsevalid ()                                                                             // (terminated),                         
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (113),
		.PKT_ORI_BURST_SIZE_L      (111),
		.PKT_RESPONSE_STATUS_H     (110),
		.PKT_RESPONSE_STATUS_L     (109),
		.PKT_BURST_SIZE_H          (88),
		.PKT_BURST_SIZE_L          (86),
		.PKT_TRANS_LOCK            (66),
		.PKT_BEGIN_BURST           (93),
		.PKT_PROTECTION_H          (104),
		.PKT_PROTECTION_L          (102),
		.PKT_BURSTWRAP_H           (85),
		.PKT_BURSTWRAP_L           (77),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (68),
		.PKT_ADDR_H                (61),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (62),
		.PKT_TRANS_POSTED          (63),
		.PKT_TRANS_WRITE           (64),
		.PKT_TRANS_READ            (65),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (97),
		.PKT_SRC_ID_L              (95),
		.PKT_DEST_ID_H             (100),
		.PKT_DEST_ID_L             (98),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (5),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0)
	) jtag_uart_avalon_jtag_slave_agent (
		.clk                     (sys_clk_out_clk_clk),                                          //   input,    width = 1,             clk.clk
		.reset                   (nios2_reset_reset_bridge_in_reset_reset),                      //   input,    width = 1,       clk_reset.reset
		.m0_address              (jtag_uart_avalon_jtag_slave_agent_m0_address),                 //  output,   width = 26,              m0.address
		.m0_burstcount           (jtag_uart_avalon_jtag_slave_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (jtag_uart_avalon_jtag_slave_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (jtag_uart_avalon_jtag_slave_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (jtag_uart_avalon_jtag_slave_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (jtag_uart_avalon_jtag_slave_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (jtag_uart_avalon_jtag_slave_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (jtag_uart_avalon_jtag_slave_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (jtag_uart_avalon_jtag_slave_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (jtag_uart_avalon_jtag_slave_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (jtag_uart_avalon_jtag_slave_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (jtag_uart_avalon_jtag_slave_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (jtag_uart_avalon_jtag_slave_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (jtag_uart_avalon_jtag_slave_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (jtag_uart_avalon_jtag_slave_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (jtag_uart_avalon_jtag_slave_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_src_ready),                                            //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_src_valid),                                            //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_src_data),                                             //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_src_startofpacket),                                    //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_src_endofpacket),                                      //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_src_channel),                                          //   input,    width = 5,                .channel
		.rf_sink_ready           (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (jtag_uart_avalon_jtag_slave_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (jtag_uart_avalon_jtag_slave_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (jtag_uart_avalon_jtag_slave_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (jtag_uart_avalon_jtag_slave_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (jtag_uart_avalon_jtag_slave_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                        // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                         // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                          // (terminated),                               
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) jtag_uart_avalon_jtag_slave_agent_rsp_fifo (
		.clk               (sys_clk_out_clk_clk),                                          //   input,    width = 1,       clk.clk
		.reset             (nios2_reset_reset_bridge_in_reset_reset),                      //   input,    width = 1, clk_reset.reset
		.in_data           (jtag_uart_avalon_jtag_slave_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (jtag_uart_avalon_jtag_slave_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (jtag_uart_avalon_jtag_slave_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (jtag_uart_avalon_jtag_slave_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (jtag_uart_avalon_jtag_slave_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                        // (terminated),                         
		.csr_read          (1'b0),                                                         // (terminated),                         
		.csr_write         (1'b0),                                                         // (terminated),                         
		.csr_readdata      (),                                                             // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                         // (terminated),                         
		.almost_full_data  (),                                                             // (terminated),                         
		.almost_empty_data (),                                                             // (terminated),                         
		.in_empty          (1'b0),                                                         // (terminated),                         
		.out_empty         (),                                                             // (terminated),                         
		.in_error          (1'b0),                                                         // (terminated),                         
		.out_error         (),                                                             // (terminated),                         
		.in_channel        (1'b0),                                                         // (terminated),                         
		.out_channel       ()                                                              // (terminated),                         
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (113),
		.PKT_ORI_BURST_SIZE_L      (111),
		.PKT_RESPONSE_STATUS_H     (110),
		.PKT_RESPONSE_STATUS_L     (109),
		.PKT_BURST_SIZE_H          (88),
		.PKT_BURST_SIZE_L          (86),
		.PKT_TRANS_LOCK            (66),
		.PKT_BEGIN_BURST           (93),
		.PKT_PROTECTION_H          (104),
		.PKT_PROTECTION_L          (102),
		.PKT_BURSTWRAP_H           (85),
		.PKT_BURSTWRAP_L           (77),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (68),
		.PKT_ADDR_H                (61),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (62),
		.PKT_TRANS_POSTED          (63),
		.PKT_TRANS_WRITE           (64),
		.PKT_TRANS_READ            (65),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (97),
		.PKT_SRC_ID_L              (95),
		.PKT_DEST_ID_H             (100),
		.PKT_DEST_ID_L             (98),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (5),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0)
	) gfilsh_avl_csr_agent (
		.clk                     (sys_clk_out_clk_clk),                             //   input,    width = 1,             clk.clk
		.reset                   (nios2_reset_reset_bridge_in_reset_reset),         //   input,    width = 1,       clk_reset.reset
		.m0_address              (gfilsh_avl_csr_agent_m0_address),                 //  output,   width = 26,              m0.address
		.m0_burstcount           (gfilsh_avl_csr_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (gfilsh_avl_csr_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (gfilsh_avl_csr_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (gfilsh_avl_csr_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (gfilsh_avl_csr_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (gfilsh_avl_csr_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (gfilsh_avl_csr_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (gfilsh_avl_csr_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (gfilsh_avl_csr_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (gfilsh_avl_csr_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (gfilsh_avl_csr_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (gfilsh_avl_csr_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (gfilsh_avl_csr_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (gfilsh_avl_csr_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (gfilsh_avl_csr_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_001_src_ready),                           //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_001_src_valid),                           //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_001_src_data),                            //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_001_src_startofpacket),                   //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_001_src_endofpacket),                     //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_001_src_channel),                         //   input,    width = 5,                .channel
		.rf_sink_ready           (gfilsh_avl_csr_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (gfilsh_avl_csr_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (gfilsh_avl_csr_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (gfilsh_avl_csr_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (gfilsh_avl_csr_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (gfilsh_avl_csr_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (gfilsh_avl_csr_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (gfilsh_avl_csr_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (gfilsh_avl_csr_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (gfilsh_avl_csr_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (gfilsh_avl_csr_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (gfilsh_avl_csr_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (gfilsh_avl_csr_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (gfilsh_avl_csr_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (gfilsh_avl_csr_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (gfilsh_avl_csr_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                           // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                            // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                             // (terminated),                               
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) gfilsh_avl_csr_agent_rsp_fifo (
		.clk               (sys_clk_out_clk_clk),                             //   input,    width = 1,       clk.clk
		.reset             (nios2_reset_reset_bridge_in_reset_reset),         //   input,    width = 1, clk_reset.reset
		.in_data           (gfilsh_avl_csr_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (gfilsh_avl_csr_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (gfilsh_avl_csr_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (gfilsh_avl_csr_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (gfilsh_avl_csr_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (gfilsh_avl_csr_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (gfilsh_avl_csr_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (gfilsh_avl_csr_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (gfilsh_avl_csr_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (gfilsh_avl_csr_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                           // (terminated),                         
		.csr_read          (1'b0),                                            // (terminated),                         
		.csr_write         (1'b0),                                            // (terminated),                         
		.csr_readdata      (),                                                // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),            // (terminated),                         
		.almost_full_data  (),                                                // (terminated),                         
		.almost_empty_data (),                                                // (terminated),                         
		.in_empty          (1'b0),                                            // (terminated),                         
		.out_empty         (),                                                // (terminated),                         
		.in_error          (1'b0),                                            // (terminated),                         
		.out_error         (),                                                // (terminated),                         
		.in_channel        (1'b0),                                            // (terminated),                         
		.out_channel       ()                                                 // (terminated),                         
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (113),
		.PKT_ORI_BURST_SIZE_L      (111),
		.PKT_RESPONSE_STATUS_H     (110),
		.PKT_RESPONSE_STATUS_L     (109),
		.PKT_BURST_SIZE_H          (88),
		.PKT_BURST_SIZE_L          (86),
		.PKT_TRANS_LOCK            (66),
		.PKT_BEGIN_BURST           (93),
		.PKT_PROTECTION_H          (104),
		.PKT_PROTECTION_L          (102),
		.PKT_BURSTWRAP_H           (85),
		.PKT_BURSTWRAP_L           (77),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (68),
		.PKT_ADDR_H                (61),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (62),
		.PKT_TRANS_POSTED          (63),
		.PKT_TRANS_WRITE           (64),
		.PKT_TRANS_READ            (65),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (97),
		.PKT_SRC_ID_L              (95),
		.PKT_DEST_ID_H             (100),
		.PKT_DEST_ID_L             (98),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (5),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (9),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0)
	) gfilsh_avl_mem_agent (
		.clk                     (sys_clk_out_clk_clk),                             //   input,    width = 1,             clk.clk
		.reset                   (nios2_reset_reset_bridge_in_reset_reset),         //   input,    width = 1,       clk_reset.reset
		.m0_address              (gfilsh_avl_mem_agent_m0_address),                 //  output,   width = 26,              m0.address
		.m0_burstcount           (gfilsh_avl_mem_agent_m0_burstcount),              //  output,    width = 9,                .burstcount
		.m0_byteenable           (gfilsh_avl_mem_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (gfilsh_avl_mem_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (gfilsh_avl_mem_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (gfilsh_avl_mem_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (gfilsh_avl_mem_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (gfilsh_avl_mem_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (gfilsh_avl_mem_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (gfilsh_avl_mem_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (gfilsh_avl_mem_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (gfilsh_avl_mem_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (gfilsh_avl_mem_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (gfilsh_avl_mem_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (gfilsh_avl_mem_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (gfilsh_avl_mem_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_002_src_ready),                           //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_002_src_valid),                           //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_002_src_data),                            //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_002_src_startofpacket),                   //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_002_src_endofpacket),                     //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_002_src_channel),                         //   input,    width = 5,                .channel
		.rf_sink_ready           (gfilsh_avl_mem_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (gfilsh_avl_mem_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (gfilsh_avl_mem_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (gfilsh_avl_mem_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (gfilsh_avl_mem_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (gfilsh_avl_mem_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (gfilsh_avl_mem_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (gfilsh_avl_mem_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (gfilsh_avl_mem_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (gfilsh_avl_mem_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (gfilsh_avl_mem_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (gfilsh_avl_mem_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (gfilsh_avl_mem_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (gfilsh_avl_mem_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (gfilsh_avl_mem_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (gfilsh_avl_mem_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                           // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                            // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                             // (terminated),                               
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) gfilsh_avl_mem_agent_rsp_fifo (
		.clk               (sys_clk_out_clk_clk),                             //   input,    width = 1,       clk.clk
		.reset             (nios2_reset_reset_bridge_in_reset_reset),         //   input,    width = 1, clk_reset.reset
		.in_data           (gfilsh_avl_mem_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (gfilsh_avl_mem_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (gfilsh_avl_mem_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (gfilsh_avl_mem_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (gfilsh_avl_mem_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (gfilsh_avl_mem_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (gfilsh_avl_mem_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (gfilsh_avl_mem_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (gfilsh_avl_mem_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (gfilsh_avl_mem_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                           // (terminated),                         
		.csr_read          (1'b0),                                            // (terminated),                         
		.csr_write         (1'b0),                                            // (terminated),                         
		.csr_readdata      (),                                                // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),            // (terminated),                         
		.almost_full_data  (),                                                // (terminated),                         
		.almost_empty_data (),                                                // (terminated),                         
		.in_empty          (1'b0),                                            // (terminated),                         
		.out_empty         (),                                                // (terminated),                         
		.in_error          (1'b0),                                            // (terminated),                         
		.out_error         (),                                                // (terminated),                         
		.in_channel        (1'b0),                                            // (terminated),                         
		.out_channel       ()                                                 // (terminated),                         
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (113),
		.PKT_ORI_BURST_SIZE_L      (111),
		.PKT_RESPONSE_STATUS_H     (110),
		.PKT_RESPONSE_STATUS_L     (109),
		.PKT_BURST_SIZE_H          (88),
		.PKT_BURST_SIZE_L          (86),
		.PKT_TRANS_LOCK            (66),
		.PKT_BEGIN_BURST           (93),
		.PKT_PROTECTION_H          (104),
		.PKT_PROTECTION_L          (102),
		.PKT_BURSTWRAP_H           (85),
		.PKT_BURSTWRAP_L           (77),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (68),
		.PKT_ADDR_H                (61),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (62),
		.PKT_TRANS_POSTED          (63),
		.PKT_TRANS_WRITE           (64),
		.PKT_TRANS_READ            (65),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (97),
		.PKT_SRC_ID_L              (95),
		.PKT_DEST_ID_H             (100),
		.PKT_DEST_ID_L             (98),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (5),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0)
	) nios2_debug_mem_slave_agent (
		.clk                     (sys_clk_out_clk_clk),                                    //   input,    width = 1,             clk.clk
		.reset                   (nios2_reset_reset_bridge_in_reset_reset),                //   input,    width = 1,       clk_reset.reset
		.m0_address              (nios2_debug_mem_slave_agent_m0_address),                 //  output,   width = 26,              m0.address
		.m0_burstcount           (nios2_debug_mem_slave_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (nios2_debug_mem_slave_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (nios2_debug_mem_slave_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (nios2_debug_mem_slave_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (nios2_debug_mem_slave_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (nios2_debug_mem_slave_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (nios2_debug_mem_slave_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (nios2_debug_mem_slave_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (nios2_debug_mem_slave_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (nios2_debug_mem_slave_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (nios2_debug_mem_slave_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (nios2_debug_mem_slave_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (nios2_debug_mem_slave_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (nios2_debug_mem_slave_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (nios2_debug_mem_slave_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_003_src_ready),                                  //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_003_src_valid),                                  //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_003_src_data),                                   //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_003_src_startofpacket),                          //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_003_src_endofpacket),                            //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_003_src_channel),                                //   input,    width = 5,                .channel
		.rf_sink_ready           (nios2_debug_mem_slave_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (nios2_debug_mem_slave_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (nios2_debug_mem_slave_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (nios2_debug_mem_slave_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (nios2_debug_mem_slave_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (nios2_debug_mem_slave_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (nios2_debug_mem_slave_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (nios2_debug_mem_slave_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (nios2_debug_mem_slave_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (nios2_debug_mem_slave_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (nios2_debug_mem_slave_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (nios2_debug_mem_slave_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (nios2_debug_mem_slave_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (nios2_debug_mem_slave_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (nios2_debug_mem_slave_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (nios2_debug_mem_slave_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                  // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                   // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                    // (terminated),                               
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) nios2_debug_mem_slave_agent_rsp_fifo (
		.clk               (sys_clk_out_clk_clk),                                    //   input,    width = 1,       clk.clk
		.reset             (nios2_reset_reset_bridge_in_reset_reset),                //   input,    width = 1, clk_reset.reset
		.in_data           (nios2_debug_mem_slave_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (nios2_debug_mem_slave_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (nios2_debug_mem_slave_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (nios2_debug_mem_slave_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (nios2_debug_mem_slave_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (nios2_debug_mem_slave_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (nios2_debug_mem_slave_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (nios2_debug_mem_slave_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (nios2_debug_mem_slave_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (nios2_debug_mem_slave_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                  // (terminated),                         
		.csr_read          (1'b0),                                                   // (terminated),                         
		.csr_write         (1'b0),                                                   // (terminated),                         
		.csr_readdata      (),                                                       // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                   // (terminated),                         
		.almost_full_data  (),                                                       // (terminated),                         
		.almost_empty_data (),                                                       // (terminated),                         
		.in_empty          (1'b0),                                                   // (terminated),                         
		.out_empty         (),                                                       // (terminated),                         
		.in_error          (1'b0),                                                   // (terminated),                         
		.out_error         (),                                                       // (terminated),                         
		.in_channel        (1'b0),                                                   // (terminated),                         
		.out_channel       ()                                                        // (terminated),                         
	);

	altera_merlin_slave_agent #(
		.PKT_ORI_BURST_SIZE_H      (113),
		.PKT_ORI_BURST_SIZE_L      (111),
		.PKT_RESPONSE_STATUS_H     (110),
		.PKT_RESPONSE_STATUS_L     (109),
		.PKT_BURST_SIZE_H          (88),
		.PKT_BURST_SIZE_L          (86),
		.PKT_TRANS_LOCK            (66),
		.PKT_BEGIN_BURST           (93),
		.PKT_PROTECTION_H          (104),
		.PKT_PROTECTION_L          (102),
		.PKT_BURSTWRAP_H           (85),
		.PKT_BURSTWRAP_L           (77),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (68),
		.PKT_ADDR_H                (61),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (62),
		.PKT_TRANS_POSTED          (63),
		.PKT_TRANS_WRITE           (64),
		.PKT_TRANS_READ            (65),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (97),
		.PKT_SRC_ID_L              (95),
		.PKT_DEST_ID_H             (100),
		.PKT_DEST_ID_L             (98),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (5),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0)
	) main_memory_s1_agent (
		.clk                     (sys_clk_out_clk_clk),                             //   input,    width = 1,             clk.clk
		.reset                   (nios2_reset_reset_bridge_in_reset_reset),         //   input,    width = 1,       clk_reset.reset
		.m0_address              (main_memory_s1_agent_m0_address),                 //  output,   width = 26,              m0.address
		.m0_burstcount           (main_memory_s1_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (main_memory_s1_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (main_memory_s1_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (main_memory_s1_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (main_memory_s1_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (main_memory_s1_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (main_memory_s1_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (main_memory_s1_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (main_memory_s1_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (main_memory_s1_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (main_memory_s1_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (main_memory_s1_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (main_memory_s1_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (main_memory_s1_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (main_memory_s1_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_004_src_ready),                           //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_004_src_valid),                           //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_004_src_data),                            //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_004_src_startofpacket),                   //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_004_src_endofpacket),                     //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_004_src_channel),                         //   input,    width = 5,                .channel
		.rf_sink_ready           (main_memory_s1_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (main_memory_s1_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (main_memory_s1_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (main_memory_s1_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (main_memory_s1_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (main_memory_s1_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (main_memory_s1_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (main_memory_s1_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (main_memory_s1_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (main_memory_s1_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (main_memory_s1_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (main_memory_s1_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (main_memory_s1_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (main_memory_s1_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (main_memory_s1_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (main_memory_s1_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                           // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                            // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                             // (terminated),                               
	);

	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) main_memory_s1_agent_rsp_fifo (
		.clk               (sys_clk_out_clk_clk),                             //   input,    width = 1,       clk.clk
		.reset             (nios2_reset_reset_bridge_in_reset_reset),         //   input,    width = 1, clk_reset.reset
		.in_data           (main_memory_s1_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (main_memory_s1_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (main_memory_s1_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (main_memory_s1_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (main_memory_s1_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (main_memory_s1_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (main_memory_s1_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (main_memory_s1_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (main_memory_s1_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (main_memory_s1_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                           // (terminated),                         
		.csr_read          (1'b0),                                            // (terminated),                         
		.csr_write         (1'b0),                                            // (terminated),                         
		.csr_readdata      (),                                                // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),            // (terminated),                         
		.almost_full_data  (),                                                // (terminated),                         
		.almost_empty_data (),                                                // (terminated),                         
		.in_empty          (1'b0),                                            // (terminated),                         
		.out_empty         (),                                                // (terminated),                         
		.in_error          (1'b0),                                            // (terminated),                         
		.out_error         (),                                                // (terminated),                         
		.in_channel        (1'b0),                                            // (terminated),                         
		.out_channel       ()                                                 // (terminated),                         
	);

	gflish_altera_merlin_router_180_bjaw4fa router (
		.sink_ready         (nios2_data_master_agent_cp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (nios2_data_master_agent_cp_valid),         //   input,    width = 1,          .valid
		.sink_data          (nios2_data_master_agent_cp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (nios2_data_master_agent_cp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (nios2_data_master_agent_cp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (sys_clk_out_clk_clk),                      //   input,    width = 1,       clk.clk
		.reset              (nios2_reset_reset_bridge_in_reset_reset),  //   input,    width = 1, clk_reset.reset
		.src_ready          (router_src_ready),                         //   input,    width = 1,       src.ready
		.src_valid          (router_src_valid),                         //  output,    width = 1,          .valid
		.src_data           (router_src_data),                          //  output,  width = 123,          .data
		.src_channel        (router_src_channel),                       //  output,    width = 5,          .channel
		.src_startofpacket  (router_src_startofpacket),                 //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_src_endofpacket)                    //  output,    width = 1,          .endofpacket
	);

	gflish_altera_merlin_router_180_is6rdqq router_001 (
		.sink_ready         (nios2_instruction_master_agent_cp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (nios2_instruction_master_agent_cp_valid),         //   input,    width = 1,          .valid
		.sink_data          (nios2_instruction_master_agent_cp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (nios2_instruction_master_agent_cp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (nios2_instruction_master_agent_cp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (sys_clk_out_clk_clk),                             //   input,    width = 1,       clk.clk
		.reset              (nios2_reset_reset_bridge_in_reset_reset),         //   input,    width = 1, clk_reset.reset
		.src_ready          (router_001_src_ready),                            //   input,    width = 1,       src.ready
		.src_valid          (router_001_src_valid),                            //  output,    width = 1,          .valid
		.src_data           (router_001_src_data),                             //  output,  width = 123,          .data
		.src_channel        (router_001_src_channel),                          //  output,    width = 5,          .channel
		.src_startofpacket  (router_001_src_startofpacket),                    //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_001_src_endofpacket)                       //  output,    width = 1,          .endofpacket
	);

	gflish_altera_merlin_router_180_ybibjaq router_002 (
		.sink_ready         (jtag_uart_avalon_jtag_slave_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (jtag_uart_avalon_jtag_slave_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (jtag_uart_avalon_jtag_slave_agent_rp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (jtag_uart_avalon_jtag_slave_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (jtag_uart_avalon_jtag_slave_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (sys_clk_out_clk_clk),                                //   input,    width = 1,       clk.clk
		.reset              (nios2_reset_reset_bridge_in_reset_reset),            //   input,    width = 1, clk_reset.reset
		.src_ready          (router_002_src_ready),                               //   input,    width = 1,       src.ready
		.src_valid          (router_002_src_valid),                               //  output,    width = 1,          .valid
		.src_data           (router_002_src_data),                                //  output,  width = 123,          .data
		.src_channel        (router_002_src_channel),                             //  output,    width = 5,          .channel
		.src_startofpacket  (router_002_src_startofpacket),                       //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_002_src_endofpacket)                          //  output,    width = 1,          .endofpacket
	);

	gflish_altera_merlin_router_180_gsrlchi router_003 (
		.sink_ready         (gfilsh_avl_csr_agent_rp_ready),           //  output,    width = 1,      sink.ready
		.sink_valid         (gfilsh_avl_csr_agent_rp_valid),           //   input,    width = 1,          .valid
		.sink_data          (gfilsh_avl_csr_agent_rp_data),            //   input,  width = 123,          .data
		.sink_startofpacket (gfilsh_avl_csr_agent_rp_startofpacket),   //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (gfilsh_avl_csr_agent_rp_endofpacket),     //   input,    width = 1,          .endofpacket
		.clk                (sys_clk_out_clk_clk),                     //   input,    width = 1,       clk.clk
		.reset              (nios2_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready          (router_003_src_ready),                    //   input,    width = 1,       src.ready
		.src_valid          (router_003_src_valid),                    //  output,    width = 1,          .valid
		.src_data           (router_003_src_data),                     //  output,  width = 123,          .data
		.src_channel        (router_003_src_channel),                  //  output,    width = 5,          .channel
		.src_startofpacket  (router_003_src_startofpacket),            //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_003_src_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	gflish_altera_merlin_router_180_ybibjaq router_004 (
		.sink_ready         (gfilsh_avl_mem_agent_rp_ready),           //  output,    width = 1,      sink.ready
		.sink_valid         (gfilsh_avl_mem_agent_rp_valid),           //   input,    width = 1,          .valid
		.sink_data          (gfilsh_avl_mem_agent_rp_data),            //   input,  width = 123,          .data
		.sink_startofpacket (gfilsh_avl_mem_agent_rp_startofpacket),   //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (gfilsh_avl_mem_agent_rp_endofpacket),     //   input,    width = 1,          .endofpacket
		.clk                (sys_clk_out_clk_clk),                     //   input,    width = 1,       clk.clk
		.reset              (nios2_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready          (router_004_src_ready),                    //   input,    width = 1,       src.ready
		.src_valid          (router_004_src_valid),                    //  output,    width = 1,          .valid
		.src_data           (router_004_src_data),                     //  output,  width = 123,          .data
		.src_channel        (router_004_src_channel),                  //  output,    width = 5,          .channel
		.src_startofpacket  (router_004_src_startofpacket),            //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_004_src_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	gflish_altera_merlin_router_180_gsrlchi router_005 (
		.sink_ready         (nios2_debug_mem_slave_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (nios2_debug_mem_slave_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (nios2_debug_mem_slave_agent_rp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (nios2_debug_mem_slave_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (nios2_debug_mem_slave_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (sys_clk_out_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset              (nios2_reset_reset_bridge_in_reset_reset),      //   input,    width = 1, clk_reset.reset
		.src_ready          (router_005_src_ready),                         //   input,    width = 1,       src.ready
		.src_valid          (router_005_src_valid),                         //  output,    width = 1,          .valid
		.src_data           (router_005_src_data),                          //  output,  width = 123,          .data
		.src_channel        (router_005_src_channel),                       //  output,    width = 5,          .channel
		.src_startofpacket  (router_005_src_startofpacket),                 //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_005_src_endofpacket)                    //  output,    width = 1,          .endofpacket
	);

	gflish_altera_merlin_router_180_gsrlchi router_006 (
		.sink_ready         (main_memory_s1_agent_rp_ready),           //  output,    width = 1,      sink.ready
		.sink_valid         (main_memory_s1_agent_rp_valid),           //   input,    width = 1,          .valid
		.sink_data          (main_memory_s1_agent_rp_data),            //   input,  width = 123,          .data
		.sink_startofpacket (main_memory_s1_agent_rp_startofpacket),   //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (main_memory_s1_agent_rp_endofpacket),     //   input,    width = 1,          .endofpacket
		.clk                (sys_clk_out_clk_clk),                     //   input,    width = 1,       clk.clk
		.reset              (nios2_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready          (router_006_src_ready),                    //   input,    width = 1,       src.ready
		.src_valid          (router_006_src_valid),                    //  output,    width = 1,          .valid
		.src_data           (router_006_src_data),                     //  output,  width = 123,          .data
		.src_channel        (router_006_src_channel),                  //  output,    width = 5,          .channel
		.src_startofpacket  (router_006_src_startofpacket),            //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_006_src_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	altera_merlin_traffic_limiter #(
		.SYNC_RESET                (0),
		.PKT_DEST_ID_H             (100),
		.PKT_DEST_ID_L             (98),
		.PKT_SRC_ID_H              (97),
		.PKT_SRC_ID_L              (95),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (68),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_TRANS_POSTED          (63),
		.PKT_TRANS_WRITE           (64),
		.MAX_OUTSTANDING_RESPONSES (2),
		.PIPELINED                 (0),
		.ST_DATA_W                 (123),
		.ST_CHANNEL_W              (5),
		.VALID_WIDTH               (5),
		.ENFORCE_ORDER             (1),
		.PREVENT_HAZARDS           (0),
		.SUPPORTS_POSTED_WRITES    (1),
		.SUPPORTS_NONPOSTED_WRITES (0),
		.REORDER                   (0)
	) nios2_data_master_limiter (
		.clk                    (sys_clk_out_clk_clk),                             //   input,    width = 1,       clk.clk
		.reset                  (nios2_reset_reset_bridge_in_reset_reset),         //   input,    width = 1, clk_reset.reset
		.cmd_sink_ready         (router_src_ready),                                //  output,    width = 1,  cmd_sink.ready
		.cmd_sink_valid         (router_src_valid),                                //   input,    width = 1,          .valid
		.cmd_sink_data          (router_src_data),                                 //   input,  width = 123,          .data
		.cmd_sink_channel       (router_src_channel),                              //   input,    width = 5,          .channel
		.cmd_sink_startofpacket (router_src_startofpacket),                        //   input,    width = 1,          .startofpacket
		.cmd_sink_endofpacket   (router_src_endofpacket),                          //   input,    width = 1,          .endofpacket
		.cmd_src_ready          (nios2_data_master_limiter_cmd_src_ready),         //   input,    width = 1,   cmd_src.ready
		.cmd_src_data           (nios2_data_master_limiter_cmd_src_data),          //  output,  width = 123,          .data
		.cmd_src_channel        (nios2_data_master_limiter_cmd_src_channel),       //  output,    width = 5,          .channel
		.cmd_src_startofpacket  (nios2_data_master_limiter_cmd_src_startofpacket), //  output,    width = 1,          .startofpacket
		.cmd_src_endofpacket    (nios2_data_master_limiter_cmd_src_endofpacket),   //  output,    width = 1,          .endofpacket
		.rsp_sink_ready         (rsp_mux_src_ready),                               //  output,    width = 1,  rsp_sink.ready
		.rsp_sink_valid         (rsp_mux_src_valid),                               //   input,    width = 1,          .valid
		.rsp_sink_channel       (rsp_mux_src_channel),                             //   input,    width = 5,          .channel
		.rsp_sink_data          (rsp_mux_src_data),                                //   input,  width = 123,          .data
		.rsp_sink_startofpacket (rsp_mux_src_startofpacket),                       //   input,    width = 1,          .startofpacket
		.rsp_sink_endofpacket   (rsp_mux_src_endofpacket),                         //   input,    width = 1,          .endofpacket
		.rsp_src_ready          (nios2_data_master_limiter_rsp_src_ready),         //   input,    width = 1,   rsp_src.ready
		.rsp_src_valid          (nios2_data_master_limiter_rsp_src_valid),         //  output,    width = 1,          .valid
		.rsp_src_data           (nios2_data_master_limiter_rsp_src_data),          //  output,  width = 123,          .data
		.rsp_src_channel        (nios2_data_master_limiter_rsp_src_channel),       //  output,    width = 5,          .channel
		.rsp_src_startofpacket  (nios2_data_master_limiter_rsp_src_startofpacket), //  output,    width = 1,          .startofpacket
		.rsp_src_endofpacket    (nios2_data_master_limiter_rsp_src_endofpacket),   //  output,    width = 1,          .endofpacket
		.cmd_src_valid          (nios2_data_master_limiter_cmd_valid_data)         //  output,    width = 5, cmd_valid.data
	);

	altera_merlin_traffic_limiter #(
		.SYNC_RESET                (0),
		.PKT_DEST_ID_H             (100),
		.PKT_DEST_ID_L             (98),
		.PKT_SRC_ID_H              (97),
		.PKT_SRC_ID_L              (95),
		.PKT_BYTE_CNT_H            (76),
		.PKT_BYTE_CNT_L            (68),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_TRANS_POSTED          (63),
		.PKT_TRANS_WRITE           (64),
		.MAX_OUTSTANDING_RESPONSES (2),
		.PIPELINED                 (0),
		.ST_DATA_W                 (123),
		.ST_CHANNEL_W              (5),
		.VALID_WIDTH               (5),
		.ENFORCE_ORDER             (1),
		.PREVENT_HAZARDS           (0),
		.SUPPORTS_POSTED_WRITES    (1),
		.SUPPORTS_NONPOSTED_WRITES (0),
		.REORDER                   (0)
	) nios2_instruction_master_limiter (
		.clk                    (sys_clk_out_clk_clk),                                    //   input,    width = 1,       clk.clk
		.reset                  (nios2_reset_reset_bridge_in_reset_reset),                //   input,    width = 1, clk_reset.reset
		.cmd_sink_ready         (router_001_src_ready),                                   //  output,    width = 1,  cmd_sink.ready
		.cmd_sink_valid         (router_001_src_valid),                                   //   input,    width = 1,          .valid
		.cmd_sink_data          (router_001_src_data),                                    //   input,  width = 123,          .data
		.cmd_sink_channel       (router_001_src_channel),                                 //   input,    width = 5,          .channel
		.cmd_sink_startofpacket (router_001_src_startofpacket),                           //   input,    width = 1,          .startofpacket
		.cmd_sink_endofpacket   (router_001_src_endofpacket),                             //   input,    width = 1,          .endofpacket
		.cmd_src_ready          (nios2_instruction_master_limiter_cmd_src_ready),         //   input,    width = 1,   cmd_src.ready
		.cmd_src_data           (nios2_instruction_master_limiter_cmd_src_data),          //  output,  width = 123,          .data
		.cmd_src_channel        (nios2_instruction_master_limiter_cmd_src_channel),       //  output,    width = 5,          .channel
		.cmd_src_startofpacket  (nios2_instruction_master_limiter_cmd_src_startofpacket), //  output,    width = 1,          .startofpacket
		.cmd_src_endofpacket    (nios2_instruction_master_limiter_cmd_src_endofpacket),   //  output,    width = 1,          .endofpacket
		.rsp_sink_ready         (rsp_mux_001_src_ready),                                  //  output,    width = 1,  rsp_sink.ready
		.rsp_sink_valid         (rsp_mux_001_src_valid),                                  //   input,    width = 1,          .valid
		.rsp_sink_channel       (rsp_mux_001_src_channel),                                //   input,    width = 5,          .channel
		.rsp_sink_data          (rsp_mux_001_src_data),                                   //   input,  width = 123,          .data
		.rsp_sink_startofpacket (rsp_mux_001_src_startofpacket),                          //   input,    width = 1,          .startofpacket
		.rsp_sink_endofpacket   (rsp_mux_001_src_endofpacket),                            //   input,    width = 1,          .endofpacket
		.rsp_src_ready          (nios2_instruction_master_limiter_rsp_src_ready),         //   input,    width = 1,   rsp_src.ready
		.rsp_src_valid          (nios2_instruction_master_limiter_rsp_src_valid),         //  output,    width = 1,          .valid
		.rsp_src_data           (nios2_instruction_master_limiter_rsp_src_data),          //  output,  width = 123,          .data
		.rsp_src_channel        (nios2_instruction_master_limiter_rsp_src_channel),       //  output,    width = 5,          .channel
		.rsp_src_startofpacket  (nios2_instruction_master_limiter_rsp_src_startofpacket), //  output,    width = 1,          .startofpacket
		.rsp_src_endofpacket    (nios2_instruction_master_limiter_rsp_src_endofpacket),   //  output,    width = 1,          .endofpacket
		.cmd_src_valid          (nios2_instruction_master_limiter_cmd_valid_data)         //  output,    width = 5, cmd_valid.data
	);

	gflish_altera_merlin_demultiplexer_180_p2labsi cmd_demux (
		.clk                (sys_clk_out_clk_clk),                             //   input,    width = 1,        clk.clk
		.reset              (nios2_reset_reset_bridge_in_reset_reset),         //   input,    width = 1,  clk_reset.reset
		.sink_ready         (nios2_data_master_limiter_cmd_src_ready),         //  output,    width = 1,       sink.ready
		.sink_channel       (nios2_data_master_limiter_cmd_src_channel),       //   input,    width = 5,           .channel
		.sink_data          (nios2_data_master_limiter_cmd_src_data),          //   input,  width = 123,           .data
		.sink_startofpacket (nios2_data_master_limiter_cmd_src_startofpacket), //   input,    width = 1,           .startofpacket
		.sink_endofpacket   (nios2_data_master_limiter_cmd_src_endofpacket),   //   input,    width = 1,           .endofpacket
		.sink_valid         (nios2_data_master_limiter_cmd_valid_data),        //   input,    width = 5, sink_valid.data
		.src0_ready         (cmd_demux_src0_ready),                            //   input,    width = 1,       src0.ready
		.src0_valid         (cmd_demux_src0_valid),                            //  output,    width = 1,           .valid
		.src0_data          (cmd_demux_src0_data),                             //  output,  width = 123,           .data
		.src0_channel       (cmd_demux_src0_channel),                          //  output,    width = 5,           .channel
		.src0_startofpacket (cmd_demux_src0_startofpacket),                    //  output,    width = 1,           .startofpacket
		.src0_endofpacket   (cmd_demux_src0_endofpacket),                      //  output,    width = 1,           .endofpacket
		.src1_ready         (cmd_demux_src1_ready),                            //   input,    width = 1,       src1.ready
		.src1_valid         (cmd_demux_src1_valid),                            //  output,    width = 1,           .valid
		.src1_data          (cmd_demux_src1_data),                             //  output,  width = 123,           .data
		.src1_channel       (cmd_demux_src1_channel),                          //  output,    width = 5,           .channel
		.src1_startofpacket (cmd_demux_src1_startofpacket),                    //  output,    width = 1,           .startofpacket
		.src1_endofpacket   (cmd_demux_src1_endofpacket),                      //  output,    width = 1,           .endofpacket
		.src2_ready         (cmd_demux_src2_ready),                            //   input,    width = 1,       src2.ready
		.src2_valid         (cmd_demux_src2_valid),                            //  output,    width = 1,           .valid
		.src2_data          (cmd_demux_src2_data),                             //  output,  width = 123,           .data
		.src2_channel       (cmd_demux_src2_channel),                          //  output,    width = 5,           .channel
		.src2_startofpacket (cmd_demux_src2_startofpacket),                    //  output,    width = 1,           .startofpacket
		.src2_endofpacket   (cmd_demux_src2_endofpacket),                      //  output,    width = 1,           .endofpacket
		.src3_ready         (cmd_demux_src3_ready),                            //   input,    width = 1,       src3.ready
		.src3_valid         (cmd_demux_src3_valid),                            //  output,    width = 1,           .valid
		.src3_data          (cmd_demux_src3_data),                             //  output,  width = 123,           .data
		.src3_channel       (cmd_demux_src3_channel),                          //  output,    width = 5,           .channel
		.src3_startofpacket (cmd_demux_src3_startofpacket),                    //  output,    width = 1,           .startofpacket
		.src3_endofpacket   (cmd_demux_src3_endofpacket),                      //  output,    width = 1,           .endofpacket
		.src4_ready         (cmd_demux_src4_ready),                            //   input,    width = 1,       src4.ready
		.src4_valid         (cmd_demux_src4_valid),                            //  output,    width = 1,           .valid
		.src4_data          (cmd_demux_src4_data),                             //  output,  width = 123,           .data
		.src4_channel       (cmd_demux_src4_channel),                          //  output,    width = 5,           .channel
		.src4_startofpacket (cmd_demux_src4_startofpacket),                    //  output,    width = 1,           .startofpacket
		.src4_endofpacket   (cmd_demux_src4_endofpacket)                       //  output,    width = 1,           .endofpacket
	);

	gflish_altera_merlin_demultiplexer_180_aatoqcy cmd_demux_001 (
		.clk                (sys_clk_out_clk_clk),                                    //   input,    width = 1,        clk.clk
		.reset              (nios2_reset_reset_bridge_in_reset_reset),                //   input,    width = 1,  clk_reset.reset
		.sink_ready         (nios2_instruction_master_limiter_cmd_src_ready),         //  output,    width = 1,       sink.ready
		.sink_channel       (nios2_instruction_master_limiter_cmd_src_channel),       //   input,    width = 5,           .channel
		.sink_data          (nios2_instruction_master_limiter_cmd_src_data),          //   input,  width = 123,           .data
		.sink_startofpacket (nios2_instruction_master_limiter_cmd_src_startofpacket), //   input,    width = 1,           .startofpacket
		.sink_endofpacket   (nios2_instruction_master_limiter_cmd_src_endofpacket),   //   input,    width = 1,           .endofpacket
		.sink_valid         (nios2_instruction_master_limiter_cmd_valid_data),        //   input,    width = 5, sink_valid.data
		.src0_ready         (cmd_demux_001_src0_ready),                               //   input,    width = 1,       src0.ready
		.src0_valid         (cmd_demux_001_src0_valid),                               //  output,    width = 1,           .valid
		.src0_data          (cmd_demux_001_src0_data),                                //  output,  width = 123,           .data
		.src0_channel       (cmd_demux_001_src0_channel),                             //  output,    width = 5,           .channel
		.src0_startofpacket (cmd_demux_001_src0_startofpacket),                       //  output,    width = 1,           .startofpacket
		.src0_endofpacket   (cmd_demux_001_src0_endofpacket),                         //  output,    width = 1,           .endofpacket
		.src1_ready         (cmd_demux_001_src1_ready),                               //   input,    width = 1,       src1.ready
		.src1_valid         (cmd_demux_001_src1_valid),                               //  output,    width = 1,           .valid
		.src1_data          (cmd_demux_001_src1_data),                                //  output,  width = 123,           .data
		.src1_channel       (cmd_demux_001_src1_channel),                             //  output,    width = 5,           .channel
		.src1_startofpacket (cmd_demux_001_src1_startofpacket),                       //  output,    width = 1,           .startofpacket
		.src1_endofpacket   (cmd_demux_001_src1_endofpacket),                         //  output,    width = 1,           .endofpacket
		.src2_ready         (cmd_demux_001_src2_ready),                               //   input,    width = 1,       src2.ready
		.src2_valid         (cmd_demux_001_src2_valid),                               //  output,    width = 1,           .valid
		.src2_data          (cmd_demux_001_src2_data),                                //  output,  width = 123,           .data
		.src2_channel       (cmd_demux_001_src2_channel),                             //  output,    width = 5,           .channel
		.src2_startofpacket (cmd_demux_001_src2_startofpacket),                       //  output,    width = 1,           .startofpacket
		.src2_endofpacket   (cmd_demux_001_src2_endofpacket)                          //  output,    width = 1,           .endofpacket
	);

	gflish_altera_merlin_multiplexer_180_as5qbey cmd_mux (
		.clk                 (sys_clk_out_clk_clk),                     //   input,    width = 1,       clk.clk
		.reset               (nios2_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_src_ready),                       //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_src_valid),                       //  output,    width = 1,          .valid
		.src_data            (cmd_mux_src_data),                        //  output,  width = 123,          .data
		.src_channel         (cmd_mux_src_channel),                     //  output,    width = 5,          .channel
		.src_startofpacket   (cmd_mux_src_startofpacket),               //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_src_endofpacket),                 //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src0_ready),                    //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src0_valid),                    //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src0_channel),                  //   input,    width = 5,          .channel
		.sink0_data          (cmd_demux_src0_data),                     //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src0_startofpacket),            //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src0_endofpacket)               //   input,    width = 1,          .endofpacket
	);

	gflish_altera_merlin_multiplexer_180_3szy6ni cmd_mux_001 (
		.clk                 (sys_clk_out_clk_clk),                     //   input,    width = 1,       clk.clk
		.reset               (nios2_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_001_src_ready),                   //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_001_src_valid),                   //  output,    width = 1,          .valid
		.src_data            (cmd_mux_001_src_data),                    //  output,  width = 123,          .data
		.src_channel         (cmd_mux_001_src_channel),                 //  output,    width = 5,          .channel
		.src_startofpacket   (cmd_mux_001_src_startofpacket),           //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_001_src_endofpacket),             //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src1_ready),                    //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src1_valid),                    //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src1_channel),                  //   input,    width = 5,          .channel
		.sink0_data          (cmd_demux_src1_data),                     //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src1_startofpacket),            //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src1_endofpacket),              //   input,    width = 1,          .endofpacket
		.sink1_ready         (cmd_demux_001_src0_ready),                //  output,    width = 1,     sink1.ready
		.sink1_valid         (cmd_demux_001_src0_valid),                //   input,    width = 1,          .valid
		.sink1_channel       (cmd_demux_001_src0_channel),              //   input,    width = 5,          .channel
		.sink1_data          (cmd_demux_001_src0_data),                 //   input,  width = 123,          .data
		.sink1_startofpacket (cmd_demux_001_src0_startofpacket),        //   input,    width = 1,          .startofpacket
		.sink1_endofpacket   (cmd_demux_001_src0_endofpacket)           //   input,    width = 1,          .endofpacket
	);

	gflish_altera_merlin_multiplexer_180_as5qbey cmd_mux_002 (
		.clk                 (sys_clk_out_clk_clk),                     //   input,    width = 1,       clk.clk
		.reset               (nios2_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_002_src_ready),                   //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_002_src_valid),                   //  output,    width = 1,          .valid
		.src_data            (cmd_mux_002_src_data),                    //  output,  width = 123,          .data
		.src_channel         (cmd_mux_002_src_channel),                 //  output,    width = 5,          .channel
		.src_startofpacket   (cmd_mux_002_src_startofpacket),           //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_002_src_endofpacket),             //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src2_ready),                    //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src2_valid),                    //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src2_channel),                  //   input,    width = 5,          .channel
		.sink0_data          (cmd_demux_src2_data),                     //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src2_startofpacket),            //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src2_endofpacket)               //   input,    width = 1,          .endofpacket
	);

	gflish_altera_merlin_multiplexer_180_3szy6ni cmd_mux_003 (
		.clk                 (sys_clk_out_clk_clk),                     //   input,    width = 1,       clk.clk
		.reset               (nios2_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_003_src_ready),                   //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_003_src_valid),                   //  output,    width = 1,          .valid
		.src_data            (cmd_mux_003_src_data),                    //  output,  width = 123,          .data
		.src_channel         (cmd_mux_003_src_channel),                 //  output,    width = 5,          .channel
		.src_startofpacket   (cmd_mux_003_src_startofpacket),           //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_003_src_endofpacket),             //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src3_ready),                    //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src3_valid),                    //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src3_channel),                  //   input,    width = 5,          .channel
		.sink0_data          (cmd_demux_src3_data),                     //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src3_startofpacket),            //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src3_endofpacket),              //   input,    width = 1,          .endofpacket
		.sink1_ready         (cmd_demux_001_src1_ready),                //  output,    width = 1,     sink1.ready
		.sink1_valid         (cmd_demux_001_src1_valid),                //   input,    width = 1,          .valid
		.sink1_channel       (cmd_demux_001_src1_channel),              //   input,    width = 5,          .channel
		.sink1_data          (cmd_demux_001_src1_data),                 //   input,  width = 123,          .data
		.sink1_startofpacket (cmd_demux_001_src1_startofpacket),        //   input,    width = 1,          .startofpacket
		.sink1_endofpacket   (cmd_demux_001_src1_endofpacket)           //   input,    width = 1,          .endofpacket
	);

	gflish_altera_merlin_multiplexer_180_3szy6ni cmd_mux_004 (
		.clk                 (sys_clk_out_clk_clk),                     //   input,    width = 1,       clk.clk
		.reset               (nios2_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_004_src_ready),                   //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_004_src_valid),                   //  output,    width = 1,          .valid
		.src_data            (cmd_mux_004_src_data),                    //  output,  width = 123,          .data
		.src_channel         (cmd_mux_004_src_channel),                 //  output,    width = 5,          .channel
		.src_startofpacket   (cmd_mux_004_src_startofpacket),           //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_004_src_endofpacket),             //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src4_ready),                    //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src4_valid),                    //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src4_channel),                  //   input,    width = 5,          .channel
		.sink0_data          (cmd_demux_src4_data),                     //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src4_startofpacket),            //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src4_endofpacket),              //   input,    width = 1,          .endofpacket
		.sink1_ready         (cmd_demux_001_src2_ready),                //  output,    width = 1,     sink1.ready
		.sink1_valid         (cmd_demux_001_src2_valid),                //   input,    width = 1,          .valid
		.sink1_channel       (cmd_demux_001_src2_channel),              //   input,    width = 5,          .channel
		.sink1_data          (cmd_demux_001_src2_data),                 //   input,  width = 123,          .data
		.sink1_startofpacket (cmd_demux_001_src2_startofpacket),        //   input,    width = 1,          .startofpacket
		.sink1_endofpacket   (cmd_demux_001_src2_endofpacket)           //   input,    width = 1,          .endofpacket
	);

	gflish_altera_merlin_demultiplexer_180_gshcsda rsp_demux (
		.clk                (sys_clk_out_clk_clk),                     //   input,    width = 1,       clk.clk
		.reset              (nios2_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_002_src_ready),                    //  output,    width = 1,      sink.ready
		.sink_channel       (router_002_src_channel),                  //   input,    width = 5,          .channel
		.sink_data          (router_002_src_data),                     //   input,  width = 123,          .data
		.sink_startofpacket (router_002_src_startofpacket),            //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_002_src_endofpacket),              //   input,    width = 1,          .endofpacket
		.sink_valid         (router_002_src_valid),                    //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_src0_ready),                    //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_src0_valid),                    //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_src0_data),                     //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_src0_channel),                  //  output,    width = 5,          .channel
		.src0_startofpacket (rsp_demux_src0_startofpacket),            //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_src0_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	gflish_altera_merlin_demultiplexer_180_w6uc27i rsp_demux_001 (
		.clk                (sys_clk_out_clk_clk),                     //   input,    width = 1,       clk.clk
		.reset              (nios2_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_003_src_ready),                    //  output,    width = 1,      sink.ready
		.sink_channel       (router_003_src_channel),                  //   input,    width = 5,          .channel
		.sink_data          (router_003_src_data),                     //   input,  width = 123,          .data
		.sink_startofpacket (router_003_src_startofpacket),            //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_003_src_endofpacket),              //   input,    width = 1,          .endofpacket
		.sink_valid         (router_003_src_valid),                    //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_001_src0_ready),                //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_001_src0_valid),                //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_001_src0_data),                 //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_001_src0_channel),              //  output,    width = 5,          .channel
		.src0_startofpacket (rsp_demux_001_src0_startofpacket),        //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_001_src0_endofpacket),          //  output,    width = 1,          .endofpacket
		.src1_ready         (rsp_demux_001_src1_ready),                //   input,    width = 1,      src1.ready
		.src1_valid         (rsp_demux_001_src1_valid),                //  output,    width = 1,          .valid
		.src1_data          (rsp_demux_001_src1_data),                 //  output,  width = 123,          .data
		.src1_channel       (rsp_demux_001_src1_channel),              //  output,    width = 5,          .channel
		.src1_startofpacket (rsp_demux_001_src1_startofpacket),        //  output,    width = 1,          .startofpacket
		.src1_endofpacket   (rsp_demux_001_src1_endofpacket)           //  output,    width = 1,          .endofpacket
	);

	gflish_altera_merlin_demultiplexer_180_gshcsda rsp_demux_002 (
		.clk                (sys_clk_out_clk_clk),                     //   input,    width = 1,       clk.clk
		.reset              (nios2_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_004_src_ready),                    //  output,    width = 1,      sink.ready
		.sink_channel       (router_004_src_channel),                  //   input,    width = 5,          .channel
		.sink_data          (router_004_src_data),                     //   input,  width = 123,          .data
		.sink_startofpacket (router_004_src_startofpacket),            //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_004_src_endofpacket),              //   input,    width = 1,          .endofpacket
		.sink_valid         (router_004_src_valid),                    //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_002_src0_ready),                //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_002_src0_valid),                //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_002_src0_data),                 //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_002_src0_channel),              //  output,    width = 5,          .channel
		.src0_startofpacket (rsp_demux_002_src0_startofpacket),        //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_002_src0_endofpacket)           //  output,    width = 1,          .endofpacket
	);

	gflish_altera_merlin_demultiplexer_180_w6uc27i rsp_demux_003 (
		.clk                (sys_clk_out_clk_clk),                     //   input,    width = 1,       clk.clk
		.reset              (nios2_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_005_src_ready),                    //  output,    width = 1,      sink.ready
		.sink_channel       (router_005_src_channel),                  //   input,    width = 5,          .channel
		.sink_data          (router_005_src_data),                     //   input,  width = 123,          .data
		.sink_startofpacket (router_005_src_startofpacket),            //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_005_src_endofpacket),              //   input,    width = 1,          .endofpacket
		.sink_valid         (router_005_src_valid),                    //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_003_src0_ready),                //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_003_src0_valid),                //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_003_src0_data),                 //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_003_src0_channel),              //  output,    width = 5,          .channel
		.src0_startofpacket (rsp_demux_003_src0_startofpacket),        //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_003_src0_endofpacket),          //  output,    width = 1,          .endofpacket
		.src1_ready         (rsp_demux_003_src1_ready),                //   input,    width = 1,      src1.ready
		.src1_valid         (rsp_demux_003_src1_valid),                //  output,    width = 1,          .valid
		.src1_data          (rsp_demux_003_src1_data),                 //  output,  width = 123,          .data
		.src1_channel       (rsp_demux_003_src1_channel),              //  output,    width = 5,          .channel
		.src1_startofpacket (rsp_demux_003_src1_startofpacket),        //  output,    width = 1,          .startofpacket
		.src1_endofpacket   (rsp_demux_003_src1_endofpacket)           //  output,    width = 1,          .endofpacket
	);

	gflish_altera_merlin_demultiplexer_180_w6uc27i rsp_demux_004 (
		.clk                (sys_clk_out_clk_clk),                     //   input,    width = 1,       clk.clk
		.reset              (nios2_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_006_src_ready),                    //  output,    width = 1,      sink.ready
		.sink_channel       (router_006_src_channel),                  //   input,    width = 5,          .channel
		.sink_data          (router_006_src_data),                     //   input,  width = 123,          .data
		.sink_startofpacket (router_006_src_startofpacket),            //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_006_src_endofpacket),              //   input,    width = 1,          .endofpacket
		.sink_valid         (router_006_src_valid),                    //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_004_src0_ready),                //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_004_src0_valid),                //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_004_src0_data),                 //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_004_src0_channel),              //  output,    width = 5,          .channel
		.src0_startofpacket (rsp_demux_004_src0_startofpacket),        //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_004_src0_endofpacket),          //  output,    width = 1,          .endofpacket
		.src1_ready         (rsp_demux_004_src1_ready),                //   input,    width = 1,      src1.ready
		.src1_valid         (rsp_demux_004_src1_valid),                //  output,    width = 1,          .valid
		.src1_data          (rsp_demux_004_src1_data),                 //  output,  width = 123,          .data
		.src1_channel       (rsp_demux_004_src1_channel),              //  output,    width = 5,          .channel
		.src1_startofpacket (rsp_demux_004_src1_startofpacket),        //  output,    width = 1,          .startofpacket
		.src1_endofpacket   (rsp_demux_004_src1_endofpacket)           //  output,    width = 1,          .endofpacket
	);

	gflish_altera_merlin_multiplexer_180_4rddq6i rsp_mux (
		.clk                 (sys_clk_out_clk_clk),                     //   input,    width = 1,       clk.clk
		.reset               (nios2_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (rsp_mux_src_ready),                       //   input,    width = 1,       src.ready
		.src_valid           (rsp_mux_src_valid),                       //  output,    width = 1,          .valid
		.src_data            (rsp_mux_src_data),                        //  output,  width = 123,          .data
		.src_channel         (rsp_mux_src_channel),                     //  output,    width = 5,          .channel
		.src_startofpacket   (rsp_mux_src_startofpacket),               //  output,    width = 1,          .startofpacket
		.src_endofpacket     (rsp_mux_src_endofpacket),                 //  output,    width = 1,          .endofpacket
		.sink0_ready         (rsp_demux_src0_ready),                    //  output,    width = 1,     sink0.ready
		.sink0_valid         (rsp_demux_src0_valid),                    //   input,    width = 1,          .valid
		.sink0_channel       (rsp_demux_src0_channel),                  //   input,    width = 5,          .channel
		.sink0_data          (rsp_demux_src0_data),                     //   input,  width = 123,          .data
		.sink0_startofpacket (rsp_demux_src0_startofpacket),            //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (rsp_demux_src0_endofpacket),              //   input,    width = 1,          .endofpacket
		.sink1_ready         (rsp_demux_001_src0_ready),                //  output,    width = 1,     sink1.ready
		.sink1_valid         (rsp_demux_001_src0_valid),                //   input,    width = 1,          .valid
		.sink1_channel       (rsp_demux_001_src0_channel),              //   input,    width = 5,          .channel
		.sink1_data          (rsp_demux_001_src0_data),                 //   input,  width = 123,          .data
		.sink1_startofpacket (rsp_demux_001_src0_startofpacket),        //   input,    width = 1,          .startofpacket
		.sink1_endofpacket   (rsp_demux_001_src0_endofpacket),          //   input,    width = 1,          .endofpacket
		.sink2_ready         (rsp_demux_002_src0_ready),                //  output,    width = 1,     sink2.ready
		.sink2_valid         (rsp_demux_002_src0_valid),                //   input,    width = 1,          .valid
		.sink2_channel       (rsp_demux_002_src0_channel),              //   input,    width = 5,          .channel
		.sink2_data          (rsp_demux_002_src0_data),                 //   input,  width = 123,          .data
		.sink2_startofpacket (rsp_demux_002_src0_startofpacket),        //   input,    width = 1,          .startofpacket
		.sink2_endofpacket   (rsp_demux_002_src0_endofpacket),          //   input,    width = 1,          .endofpacket
		.sink3_ready         (rsp_demux_003_src0_ready),                //  output,    width = 1,     sink3.ready
		.sink3_valid         (rsp_demux_003_src0_valid),                //   input,    width = 1,          .valid
		.sink3_channel       (rsp_demux_003_src0_channel),              //   input,    width = 5,          .channel
		.sink3_data          (rsp_demux_003_src0_data),                 //   input,  width = 123,          .data
		.sink3_startofpacket (rsp_demux_003_src0_startofpacket),        //   input,    width = 1,          .startofpacket
		.sink3_endofpacket   (rsp_demux_003_src0_endofpacket),          //   input,    width = 1,          .endofpacket
		.sink4_ready         (rsp_demux_004_src0_ready),                //  output,    width = 1,     sink4.ready
		.sink4_valid         (rsp_demux_004_src0_valid),                //   input,    width = 1,          .valid
		.sink4_channel       (rsp_demux_004_src0_channel),              //   input,    width = 5,          .channel
		.sink4_data          (rsp_demux_004_src0_data),                 //   input,  width = 123,          .data
		.sink4_startofpacket (rsp_demux_004_src0_startofpacket),        //   input,    width = 1,          .startofpacket
		.sink4_endofpacket   (rsp_demux_004_src0_endofpacket)           //   input,    width = 1,          .endofpacket
	);

	gflish_altera_merlin_multiplexer_180_3hdgx4a rsp_mux_001 (
		.clk                 (sys_clk_out_clk_clk),                     //   input,    width = 1,       clk.clk
		.reset               (nios2_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (rsp_mux_001_src_ready),                   //   input,    width = 1,       src.ready
		.src_valid           (rsp_mux_001_src_valid),                   //  output,    width = 1,          .valid
		.src_data            (rsp_mux_001_src_data),                    //  output,  width = 123,          .data
		.src_channel         (rsp_mux_001_src_channel),                 //  output,    width = 5,          .channel
		.src_startofpacket   (rsp_mux_001_src_startofpacket),           //  output,    width = 1,          .startofpacket
		.src_endofpacket     (rsp_mux_001_src_endofpacket),             //  output,    width = 1,          .endofpacket
		.sink0_ready         (rsp_demux_001_src1_ready),                //  output,    width = 1,     sink0.ready
		.sink0_valid         (rsp_demux_001_src1_valid),                //   input,    width = 1,          .valid
		.sink0_channel       (rsp_demux_001_src1_channel),              //   input,    width = 5,          .channel
		.sink0_data          (rsp_demux_001_src1_data),                 //   input,  width = 123,          .data
		.sink0_startofpacket (rsp_demux_001_src1_startofpacket),        //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (rsp_demux_001_src1_endofpacket),          //   input,    width = 1,          .endofpacket
		.sink1_ready         (rsp_demux_003_src1_ready),                //  output,    width = 1,     sink1.ready
		.sink1_valid         (rsp_demux_003_src1_valid),                //   input,    width = 1,          .valid
		.sink1_channel       (rsp_demux_003_src1_channel),              //   input,    width = 5,          .channel
		.sink1_data          (rsp_demux_003_src1_data),                 //   input,  width = 123,          .data
		.sink1_startofpacket (rsp_demux_003_src1_startofpacket),        //   input,    width = 1,          .startofpacket
		.sink1_endofpacket   (rsp_demux_003_src1_endofpacket),          //   input,    width = 1,          .endofpacket
		.sink2_ready         (rsp_demux_004_src1_ready),                //  output,    width = 1,     sink2.ready
		.sink2_valid         (rsp_demux_004_src1_valid),                //   input,    width = 1,          .valid
		.sink2_channel       (rsp_demux_004_src1_channel),              //   input,    width = 5,          .channel
		.sink2_data          (rsp_demux_004_src1_data),                 //   input,  width = 123,          .data
		.sink2_startofpacket (rsp_demux_004_src1_startofpacket),        //   input,    width = 1,          .startofpacket
		.sink2_endofpacket   (rsp_demux_004_src1_endofpacket)           //   input,    width = 1,          .endofpacket
	);

endmodule
