Assignment name 					value					default value
--------------------------------------------------------------------------------------------------------------
ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP			On					Off	
ALLOW_ANY_RAM_SIZE_FOR_RECOGNITION			On					Off	
ALLOW_ANY_ROM_SIZE_FOR_RECOGNITION			On					Off	
ALLOW_ANY_SHIFT_REGISTER_SIZE_FOR_RECOGNITION		On					Off	
ALLOW_DSP_RETIMING					On					Off	
ALLOW_POWER_UP_DONT_CARE				Off					On	
ALLOW_RAM_RETIMING					On					Off	
ALLOW_SYNCH_CTRL_USAGE					Off					On	
AUTO_CLOCK_ENABLE_RECOGNITION				Off					On	
AUTO_DELAY_CHAINS_FOR_HIGH_FANOUT_INPUT_PINS		On					Off	
AUTO_GLOBAL_CLOCK					Off					On	
AUTO_GLOBAL_REGISTER_CONTROLS				Off					On	
AUTO_OPEN_DRAIN_PINS					Off					On	
BLOCK_DESIGN_NAMING					QuartusII				Auto	
BLOCK_RAM_AND_MLAB_EQUIVALENT_POWER_UP_CONDITIONS	Care					Auto	
DISABLE_DSP_NEGATE_INFERENCING				On					Off	
DISABLE_REGISTER_MERGING_ACROSS_HIERARCHIES		On					Auto	
EDA_DESIGN_ENTRY_SYNTHESIS_TOOL				Synplify Pro				<None>	
EDA_INPUT_DATA_FORMAT					Vqm					--	
ENABLE_TIME_BORROWING_OPTIMIZATION			On					Off	
FAST_PRESERVE						Off					--	
FITTER_EFFORT						Standard Fit				Auto Fit
FLOW_ENABLE_INTERACTIVE_TIMING_ANALYZER			Off					On	
HDL_MESSAGE_LEVEL					Level1					Level2	
IGNORE_SOFT_BUFFERS					Off					On	
INFER_RAMS_FROM_RAW_LOGIC				Off					On	
MAX_CORE_JUNCTION_TEMP					100					--	
MIN_CORE_JUNCTION_TEMP					0					--	
NOT_GATE_PUSH_BACK					Off					On	
NUM_PARALLEL_PROCESSORS					6					--	
OPTIMIZATION_MODE					Optimize Netlist for Routability	Balanced
OPTIMIZATION_TECHNIQUE					Speed					Balanced
OPTIMIZE_FOR_METASTABILITY				Off					On	
OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING		Off					Normal	
OPTIMIZE_MULTI_CORNER_TIMING				Off					On	
OPTIMIZE_POWER_DURING_SYNTHESIS				Off					Normal compilation
PERIPHERY_TO_CORE_PLACEMENT_AND_ROUTING_OPTIMIZATION	Auto					Off	
PHYSICAL_SYNTHESIS					On					Off	
PLACEMENT_EFFORT_MULTIPLIER				4.0					1.0	
POWER_BOARD_TEMPERATURE					30					25	
POWER_BOARD_THERMAL_MODEL				Typical					--	
POWER_PRESET_COOLING_SOLUTION				23 MM HEAT SINK WITH 200 LFPM AIRFLOW	--
POWER_USE_TA_VALUE					30					25
REMOVE_DUPLICATE_REGISTERS				Off					On	
ROUTER_CLOCKING_TOPOLOGY_ANALYSIS			On					Off	
ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION		Off					Auto	
SEARCH_PATH						../../ram_rom				--	
SEED							4					1	
STATE_MACHINE_PROCESSING				One-Hot					Auto	
STRICT_RAM_RECOGNITION					On					Off	
SYNCHRONIZATION_REGISTER_CHAIN_LENGTH			2					3	
SYNTHESIS_AVAILABLE_RESOURCE_MULTIPLIER			0					1	
SYNTH_MESSAGE_LEVEL					Low					Medium	
SYNTH_PROTECT_SDC_CONSTRAINT				On					Off	
TIMING_ANALYZER_MULTICORNER_ANALYSIS			Off					On	
TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS	Off					On	
TIMING_ANALYZER_REPORT_WORST_CASE_TIMING_PATHS		Off					On	
VERILOG_INPUT_VERSION					SystemVerilog_2005			Verilog_2001	
VERILOG_SHOW_LMF_MAPPING_MESSAGES			Off					--	
WEAK_PULL_UP_RESISTOR					On					Off