//
//  AECTECH AP-0001 under S.O. Linux Angstrom 2018.06 first test applications
//
//  18/06/2019 - first attempts to access AXI BUS INTERFACE
//  20/06/2019 - problems under Environment due to compiler selection

//  ENVIRONMENT ISSUES  - TRY ARM-5 TOOLCHAIN
//
//  Compiler problem: using GCC-linux compiler, strange errors are made for "unused variables" !!! If you use error persists!
//  Try with ARM-5 : but select it, some libraries appears not linked. So I'll copy them searching on Linaro 2018.04 folders and put it on this proj folder!
//  Manually selection : see COMMENTS NEAR EACH LIBRARIES
//
//
//

//  1) find virtual base memory address (using mmap function) that linux assign to equivalent HPS physical address
//  2) so, perform mmap() of FPGA slaves and HPS peripherals into virtual address space
//  3) Linux represents everything as a file: /dev/mem file is the content of whole system memory


//   LIBC LIBRARIES                       WHERE FOUND AND COPIED

#include <stdio.h>                 // <-- linaro 2014.08..\arm-linux.gnueabihf\libc\usr\include
#include <stdlib.h>                //     "                     "
#include <string.h>                //     "                     "
//


// Library from Linux Linaro distro , needed to use dev/mem device!

#include <mman.h>                   // <-- linaro 2014.08..\arm-linux.gnueabihf\libc\usr\include\sys   -- LINUX MEMORY MANAGEMENT library
#include <libc/fcntl.h>             // <-- linaro 2014.08..\arm-linux.gnueabihf\libc\usr\include
#include <libc/alt_types.h>         // altera hw related types declaration

// HPS libs

#include "hwlib/include/hwlib.h"           			// Hwlib must be copied on DS-5 workspace from DS-5 install dir/embedded/ip/altera/hps/hwlib/src!

#include "hwlib/include/soc_cv_av/socal/hps.h"
#include "hwlib/include/soc_cv_av/socal/alt_f2h.h"  // Fpga to Hps axi bus addresses?
#include "hps_0.h"                        			// HERE ARE base addresses and spans for QSYS peripherals

int main(int argc, char** argv) {

	printf("Hello SoC AP-0001 Cyclone5 FPGA!\n");

	void *virtual_base;
	int fd = 0;
	int i;


	int onchip_memory [32] ;     // A local mirror of on_chip memory (20KB)


    for ( i=0 ; i==31 ; i++ ) {
    	onchip_memory[i] = 2*i;
    	onchip_memory[i] = 0;
    }


	// Open  the mem address space into user space so we can interact with them.
	// Starting from equivalent virtual address, map the entire CSR span of the HPS since we want to access various registers within that span :-0

	// After checking open, try the functions open_physical described on Linux app tutorial.pdf..


	printf( "Try to open Whole HPS system Memory space...\n" );

  	if( ( fd = open( "/dev/mem", ( O_RDWR | O_DSYNC ) ) ) == -1 ) {        // nb, O_ are included manually on fcntl.h....
		printf( "ERROR: could not open \"/dev/mem\"...\n" );
		return( 1 );
	}


  	// Now identify our pher. address starting from Linux virtual base address and add our AXI BUS base,span, etc
  	// It create virtual memory access to ONCHIP shared memory area...

	virtual_base = mmap( NULL, ONCHIP_MEMORY_SPAN, ( PROT_READ | PROT_WRITE ), MAP_SHARED, fd, ONCHIP_MEMORY_BASE );


	volatile unsigned int *mem_ptr;


	if( virtual_base == MAP_FAILED ) {
		printf( "ERROR: mmap() failed...\n" );
//		close( fd );
		return(1);
	} else {
		mem_ptr = (unsigned int *) (virtual_base);    // Assign to mem_ptr the  address of virtual base

	    for (i=0 ;i<32 ;i++) {
	    	onchip_memory[i] = 1; //*mem_ptr ++ ;
	    }
    }



  //if ( munmap( virtual_base, ONCHIP_MEMORY_SPAN ) != 0 ) {
//	  printf( "ERROR: munmap() failed...\n" );
//	  return( 1 );
 //  }
 //  close( fd );



	return 0;
}