Intel(r) Performance Counter Monitor V2.5.1 (2013-06-25 13:44:03 +0200 ID=76b6d1f) Copyright (c) 2009-2012 Intel Corporation Num logical cores: 16 Num sockets: 2 Threads per core: 1 Core PMU (perfmon) version: 3 Number of core PMU generic (programmable) counters: 8 Width of generic (programmable) counters: 48 bits Number of core PMU fixed counters: 3 Width of fixed counters: 48 bits Nominal core frequency: 3100000000 Hz Package thermal spec power: 150 Watt; Package minimum power: 65 Watt; Package maximum power: 230 Watt; WARNING: Requested bus number 64 is larger than the max bus number 63 Using PCM on your system might have a performance impact as per http://software.intel.com/en-us/articles/performance-impact-when-sampling-certain-llc-events-on-snb-ep-with-vtune You can avoid the performance impact by using the option --noJKTWA, however the cache metrics might be wrong then. ERROR: QPI LL counter programming seems not to work. Q_P0_PCI_PMON_BOX_CTL=0xffffffff Please see BIOS options to enable the export of performance monitoring devices (devices 8 and 9: function 2). ERROR: QPI LL counter programming seems not to work. Q_P1_PCI_PMON_BOX_CTL=0xffffffff Please see BIOS options to enable the export of performance monitoring devices (devices 8 and 9: function 2). ERROR: QPI LL counter programming seems not to work. Q_P0_PCI_PMON_BOX_CTL=0xffffffff Please see BIOS options to enable the export of performance monitoring devices (devices 8 and 9: function 2). ERROR: QPI LL counter programming seems not to work. Q_P1_PCI_PMON_BOX_CTL=0xffffffff Please see BIOS options to enable the export of performance monitoring devices (devices 8 and 9: function 2). Max QPI link speed: 16.0 GBytes/second (8.0 GT/second) Detected Intel(R) Xeon(R) CPU E5-2687W 0 @ 3.10GHz "Intel(r) microarchitecture codename Sandy Bridge-EP/Jaketown" EXEC : instructions per nominal CPU cycle IPC : instructions per CPU cycle FREQ : relation to nominal CPU frequency='unhalted clock ticks'/'invariant timer ticks' (includes Intel Turbo Boost) AFREQ : relation to nominal CPU frequency while in active state (not in power-saving C state)='unhalted clock ticks'/'invariant timer ticks while in C0-state' (includes Intel Turbo Boost) L3MISS: L3 cache misses L2MISS: L2 cache misses (including other core's L2 cache *hits*) L3HIT : L3 cache hit ratio (0.00-1.00) L2HIT : L2 cache hit ratio (0.00-1.00) L3CLK : ratio of CPU cycles lost due to L3 cache misses (0.00-1.00), in some cases could be >1.0 due to a higher memory latency L2CLK : ratio of CPU cycles lost due to missing L2 cache but still hitting L3 cache (0.00-1.00) READ : bytes read from memory controller (in GBytes) WRITE : bytes written to memory controller (in GBytes) TEMP : Temperature reading in 1 degree Celsius relative to the TjMax temperature (thermal headroom): 0 corresponds to the max temperature Core (SKT) | EXEC | IPC | FREQ | AFREQ | L3MISS | L2MISS | L3HIT | L2HIT | L3CLK | L2CLK | READ | WRITE | TEMP 0 0 0.00 0.42 0.00 1.00 1901 5452 0.65 0.29 0.20 0.09 N/A N/A 36 1 0 0.00 0.52 0.00 1.00 1784 22 K 0.92 0.39 0.07 0.16 N/A N/A 33 2 0 0.00 0.86 0.00 1.00 2063 4843 0.57 0.37 0.21 0.06 N/A N/A 34 3 0 0.00 0.72 0.00 1.00 328 2149 0.85 0.26 0.13 0.16 N/A N/A 33 4 0 0.00 1.13 0.00 1.00 5 157 0.97 0.41 0.01 0.10 N/A N/A 35 5 0 0.00 1.11 0.00 1.00 9 150 0.94 0.39 0.02 0.10 N/A N/A 32 6 0 0.00 0.87 0.00 1.00 2456 16 K 0.85 0.50 0.09 0.10 N/A N/A 32 7 0 0.00 0.91 0.00 1.00 54 201 0.73 0.38 0.10 0.07 N/A N/A 34 8 1 0.01 1.12 0.01 1.00 23 K 123 K 0.81 0.45 0.12 0.11 N/A N/A 22 9 1 0.00 1.15 0.00 1.00 5802 19 K 0.70 0.44 0.15 0.08 N/A N/A 22 a 1 0.00 0.71 0.00 1.00 216 1102 0.80 0.43 0.16 0.15 N/A N/A 23 b 1 0.00 1.17 0.00 1.00 2521 12 K 0.79 0.45 0.08 0.06 N/A N/A 21 c 1 0.00 1.11 0.00 1.00 9 155 0.94 0.35 0.02 0.10 N/A N/A 22 d 1 0.00 1.08 0.00 1.00 15 163 0.91 0.37 0.04 0.10 N/A N/A 22 e 1 0.00 1.11 0.00 1.00 9 152 0.94 0.37 0.02 0.10 N/A N/A 23 f 1 0.00 0.49 0.00 1.00 532 2076 0.74 0.33 0.13 0.08 N/A N/A 22 ------------------------------------------------------------------------------------------------------------------- SKT 0 0.00 0.69 0.00 1.00 8600 51 K 0.83 0.42 0.11 0.12 0.02 0.01 31 SKT 1 0.00 1.12 0.00 1.00 32 K 158 K 0.80 0.45 0.12 0.10 0.01 0.01 21 ------------------------------------------------------------------------------------------------------------------- TOTAL * 0.00 1.02 0.00 1.00 40 K 210 K 0.81 0.44 0.12 0.10 0.03 0.01 N/A Instructions retired: 62 M ; Active cycles: 60 M ; Time (TSC): 3094 Mticks ; C0 (active,non-halted) core residency: 0.12 % C1 core residency: 99.88 %; C3 core residency: 0.00 %; C6 core residency: 0.00 %; C7 core residency: 0.00 % C2 package residency: 0.00 %; C3 package residency: 0.00 %; C6 package residency: 0.00 %; C7 package residency: 0.00 % PHYSICAL CORE IPC : 1.02 => corresponds to 25.50 % utilization for cores in active state Instructions per nominal CPU cycle: 0.00 => corresponds to 0.03 % core utilization over time interval Intel(r) QPI data traffic estimation in bytes (data traffic coming to CPU/socket through QPI links): QPI0 QPI1 | QPI0 QPI1 ---------------------------------------------------------------------------------------------- SKT 0 0 0 | 0% 0% SKT 1 0 0 | 0% 0% ---------------------------------------------------------------------------------------------- Total QPI incoming data traffic: 0 QPI data traffic/Memory controller traffic: 0.00 Intel(r) QPI traffic estimation in bytes (data and non-data traffic outgoing from CPU/socket through QPI links): QPI0 QPI1 | QPI0 QPI1 ---------------------------------------------------------------------------------------------- SKT 0 0 0 | 0% 0% SKT 1 0 0 | 0% 0% ---------------------------------------------------------------------------------------------- Total QPI outgoing data and non-data traffic: 0 ---------------------------------------------------------------------------------------------- SKT 0 package consumed 53.47 Joules SKT 1 package consumed 56.10 Joules ---------------------------------------------------------------------------------------------- TOTAL: 109.57 Joules ---------------------------------------------------------------------------------------------- SKT 0 DIMMs consumed 0.00 Joules SKT 1 DIMMs consumed 0.00 Joules ---------------------------------------------------------------------------------------------- TOTAL: 0.00 Joules EXEC : instructions per nominal CPU cycle IPC : instructions per CPU cycle FREQ : relation to nominal CPU frequency='unhalted clock ticks'/'invariant timer ticks' (includes Intel Turbo Boost) AFREQ : relation to nominal CPU frequency while in active state (not in power-saving C state)='unhalted clock ticks'/'invariant timer ticks while in C0-state' (includes Intel Turbo Boost) L3MISS: L3 cache misses L2MISS: L2 cache misses (including other core's L2 cache *hits*) L3HIT : L3 cache hit ratio (0.00-1.00) L2HIT : L2 cache hit ratio (0.00-1.00) L3CLK : ratio of CPU cycles lost due to L3 cache misses (0.00-1.00), in some cases could be >1.0 due to a higher memory latency L2CLK : ratio of CPU cycles lost due to missing L2 cache but still hitting L3 cache (0.00-1.00) READ : bytes read from memory controller (in GBytes) WRITE : bytes written to memory controller (in GBytes) TEMP : Temperature reading in 1 degree Celsius relative to the TjMax temperature (thermal headroom): 0 corresponds to the max temperature Core (SKT) | EXEC | IPC | FREQ | AFREQ | L3MISS | L2MISS | L3HIT | L2HIT | L3CLK | L2CLK | READ | WRITE | TEMP 0 0 0.00 0.63 0.00 1.00 2230 6623 0.66 0.45 0.25 0.11 N/A N/A 35 1 0 0.00 0.77 0.00 1.00 4948 25 K 0.81 0.51 0.10 0.09 N/A N/A 33 2 0 0.00 1.11 0.00 1.00 2928 11 K 0.75 0.49 0.13 0.09 N/A N/A 34 3 0 0.00 0.68 0.00 1.00 744 5187 0.86 0.36 0.10 0.14 N/A N/A 32 4 0 0.00 0.81 0.00 1.00 66 369 0.82 0.38 0.09 0.10 N/A N/A 34 5 0 0.00 0.70 0.00 1.00 233 749 0.69 0.43 0.20 0.10 N/A N/A 32 6 0 0.00 0.74 0.00 1.00 7819 27 K 0.72 0.47 0.18 0.09 N/A N/A 32 7 0 0.00 0.76 0.00 1.00 93 310 0.70 0.38 0.12 0.07 N/A N/A 34 8 1 0.10 1.42 0.07 1.00 42 K 468 K 0.91 0.66 0.03 0.07 N/A N/A 22 9 1 0.03 0.95 0.03 1.00 20 K 490 K 0.96 0.42 0.04 0.17 N/A N/A 22 10 1 0.01 0.89 0.01 1.00 9309 102 K 0.91 0.42 0.08 0.16 N/A N/A 23 11 1 0.00 0.78 0.00 1.00 4167 15 K 0.74 0.52 0.10 0.07 N/A N/A 22 12 1 0.00 0.68 0.00 1.00 5319 23 K 0.77 0.36 0.16 0.11 N/A N/A 22 13 1 0.00 0.50 0.00 1.00 499 1714 0.71 0.36 0.19 0.11 N/A N/A 21 14 1 0.00 0.46 0.00 1.00 291 1002 0.71 0.30 0.16 0.09 N/A N/A 23 15 1 0.00 0.92 0.00 1.00 995 2093 0.52 0.27 0.19 0.04 N/A N/A 21 ------------------------------------------------------------------------------------------------------------------- SKT 0 0.00 0.80 0.00 1.00 19 K 78 K 0.76 0.48 0.14 0.09 0.01 0.01 32 SKT 1 0.02 1.23 0.01 1.00 83 K 1105 K 0.92 0.55 0.04 0.10 0.01 0.01 21 ------------------------------------------------------------------------------------------------------------------- TOTAL * 0.01 1.20 0.01 1.00 102 K 1184 K 0.91 0.55 0.05 0.10 0.02 0.02 N/A Instructions retired: 471 M ; Active cycles: 391 M ; Time (TSC): 3094 Mticks ; C0 (active,non-halted) core residency: 0.79 % C1 core residency: 99.21 %; C3 core residency: 0.00 %; C6 core residency: 0.00 %; C7 core residency: 0.00 % C2 package residency: 0.00 %; C3 package residency: 0.00 %; C6 package residency: 0.00 %; C7 package residency: 0.00 % PHYSICAL CORE IPC : 1.20 => corresponds to 30.06 % utilization for cores in active state Instructions per nominal CPU cycle: 0.01 => corresponds to 0.24 % core utilization over time interval Intel(r) QPI data traffic estimation in bytes (data traffic coming to CPU/socket through QPI links): QPI0 QPI1 | QPI0 QPI1 ---------------------------------------------------------------------------------------------- SKT 0 0 0 | 0% 0% SKT 1 0 0 | 0% 0% ---------------------------------------------------------------------------------------------- Total QPI incoming data traffic: 0 QPI data traffic/Memory controller traffic: 0.00 Intel(r) QPI traffic estimation in bytes (data and non-data traffic outgoing from CPU/socket through QPI links): QPI0 QPI1 | QPI0 QPI1 ---------------------------------------------------------------------------------------------- SKT 0 0 0 | 0% 0% SKT 1 0 0 | 0% 0% ---------------------------------------------------------------------------------------------- Total QPI outgoing data and non-data traffic: 0 ---------------------------------------------------------------------------------------------- SKT 0 package consumed 53.49 Joules SKT 1 package consumed 56.75 Joules ---------------------------------------------------------------------------------------------- TOTAL: 110.23 Joules ---------------------------------------------------------------------------------------------- SKT 0 DIMMs consumed 0.00 Joules SKT 1 DIMMs consumed 0.00 Joules ---------------------------------------------------------------------------------------------- TOTAL: 0.00 Joules EXEC : instructions per nominal CPU cycle IPC : instructions per CPU cycle FREQ : relation to nominal CPU frequency='unhalted clock ticks'/'invariant timer ticks' (includes Intel Turbo Boost) AFREQ : relation to nominal CPU frequency while in active state (not in power-saving C state)='unhalted clock ticks'/'invariant timer ticks while in C0-state' (includes Intel Turbo Boost) L3MISS: L3 cache misses L2MISS: L2 cache misses (including other core's L2 cache *hits*) L3HIT : L3 cache hit ratio (0.00-1.00) L2HIT : L2 cache hit ratio (0.00-1.00) L3CLK : ratio of CPU cycles lost due to L3 cache misses (0.00-1.00), in some cases could be >1.0 due to a higher memory latency L2CLK : ratio of CPU cycles lost due to missing L2 cache but still hitting L3 cache (0.00-1.00) READ : bytes read from memory controller (in GBytes) WRITE : bytes written to memory controller (in GBytes) TEMP : Temperature reading in 1 degree Celsius relative to the TjMax temperature (thermal headroom): 0 corresponds to the max temperature Core (SKT) | EXEC | IPC | FREQ | AFREQ | L3MISS | L2MISS | L3HIT | L2HIT | L3CLK | L2CLK | READ | WRITE | TEMP 0 0 0.00 0.62 0.00 1.00 1039 3360 0.69 0.49 0.18 0.09 N/A N/A 36 1 0 0.00 0.53 0.00 1.00 1111 19 K 0.94 0.42 0.05 0.15 N/A N/A 33 2 0 0.00 0.43 0.00 1.00 385 805 0.52 0.24 0.25 0.06 N/A N/A 34 3 0 0.00 0.75 0.00 1.00 69 1489 0.95 0.24 0.05 0.21 N/A N/A 33 4 0 0.00 1.17 0.00 1.00 163 1509 0.89 0.25 0.09 0.16 N/A N/A 34 5 0 0.00 0.68 0.00 1.00 149 1040 0.86 0.46 0.11 0.15 N/A N/A 31 6 0 0.00 0.78 0.00 1.00 4074 22 K 0.82 0.49 0.11 0.10 N/A N/A 32 7 0 0.00 0.79 0.00 1.00 61 267 0.77 0.43 0.09 0.07 N/A N/A 34 8 1 0.01 0.83 0.01 1.00 8540 139 K 0.94 0.55 0.05 0.17 N/A N/A 22 9 1 0.00 0.63 0.00 1.00 840 4226 0.80 0.37 0.13 0.12 N/A N/A 22 10 1 0.00 0.63 0.00 1.00 629 3676 0.83 0.41 0.16 0.17 N/A N/A 23 11 1 0.00 0.75 0.00 1.00 1941 13 K 0.86 0.59 0.04 0.06 N/A N/A 21 12 1 0.00 0.77 0.00 1.00 1398 62 K 0.98 0.40 0.02 0.15 N/A N/A 22 13 1 0.00 0.77 0.00 1.00 286 78 K 1.00 0.29 0.01 0.31 N/A N/A 22 14 1 0.00 0.79 0.00 1.00 81 331 0.76 0.32 0.12 0.09 N/A N/A 23 15 1 0.00 1.08 0.00 1.00 518 1378 0.62 0.30 0.12 0.04 N/A N/A 21 ------------------------------------------------------------------------------------------------------------------- SKT 0 0.00 0.69 0.00 1.00 7051 50 K 0.86 0.45 0.10 0.12 0.01 0.01 31 SKT 1 0.00 0.79 0.00 1.00 14 K 304 K 0.95 0.47 0.04 0.17 0.01 0.01 21 ------------------------------------------------------------------------------------------------------------------- TOTAL * 0.00 0.77 0.00 1.00 21 K 355 K 0.94 0.47 0.05 0.16 0.02 0.01 N/A Instructions retired: 60 M ; Active cycles: 77 M ; Time (TSC): 3094 Mticks ; C0 (active,non-halted) core residency: 0.16 % C1 core residency: 99.84 %; C3 core residency: 0.00 %; C6 core residency: 0.00 %; C7 core residency: 0.00 % C2 package residency: 0.00 %; C3 package residency: 0.00 %; C6 package residency: 0.00 %; C7 package residency: 0.00 % PHYSICAL CORE IPC : 0.77 => corresponds to 19.37 % utilization for cores in active state Instructions per nominal CPU cycle: 0.00 => corresponds to 0.03 % core utilization over time interval Intel(r) QPI data traffic estimation in bytes (data traffic coming to CPU/socket through QPI links): QPI0 QPI1 | QPI0 QPI1 ---------------------------------------------------------------------------------------------- SKT 0 0 0 | 0% 0% SKT 1 0 0 | 0% 0% ---------------------------------------------------------------------------------------------- Total QPI incoming data traffic: 0 QPI data traffic/Memory controller traffic: 0.00 Intel(r) QPI traffic estimation in bytes (data and non-data traffic outgoing from CPU/socket through QPI links): QPI0 QPI1 | QPI0 QPI1 ---------------------------------------------------------------------------------------------- SKT 0 0 0 | 0% 0% SKT 1 0 0 | 0% 0% ---------------------------------------------------------------------------------------------- Total QPI outgoing data and non-data traffic: 0 ---------------------------------------------------------------------------------------------- SKT 0 package consumed 53.40 Joules SKT 1 package consumed 56.08 Joules ---------------------------------------------------------------------------------------------- TOTAL: 109.47 Joules ---------------------------------------------------------------------------------------------- SKT 0 DIMMs consumed 0.00 Joules SKT 1 DIMMs consumed 0.00 Joules ---------------------------------------------------------------------------------------------- TOTAL: 0.00 Joules EXEC : instructions per nominal CPU cycle IPC : instructions per CPU cycle FREQ : relation to nominal CPU frequency='unhalted clock ticks'/'invariant timer ticks' (includes Intel Turbo Boost) AFREQ : relation to nominal CPU frequency while in active state (not in power-saving C state)='unhalted clock ticks'/'invariant timer ticks while in C0-state' (includes Intel Turbo Boost) L3MISS: L3 cache misses L2MISS: L2 cache misses (including other core's L2 cache *hits*) L3HIT : L3 cache hit ratio (0.00-1.00) L2HIT : L2 cache hit ratio (0.00-1.00) L3CLK : ratio of CPU cycles lost due to L3 cache misses (0.00-1.00), in some cases could be >1.0 due to a higher memory latency L2CLK : ratio of CPU cycles lost due to missing L2 cache but still hitting L3 cache (0.00-1.00) READ : bytes read from memory controller (in GBytes) WRITE : bytes written to memory controller (in GBytes) TEMP : Temperature reading in 1 degree Celsius relative to the TjMax temperature (thermal headroom): 0 corresponds to the max temperature Core (SKT) | EXEC | IPC | FREQ | AFREQ | L3MISS | L2MISS | L3HIT | L2HIT | L3CLK | L2CLK | READ | WRITE | TEMP 0 0 0.00 0.61 0.00 1.00 2299 6011 0.62 0.51 0.23 0.08 N/A N/A 36 1 0 0.00 0.88 0.00 1.00 2101 16 K 0.87 0.55 0.06 0.08 N/A N/A 33 2 0 0.00 1.07 0.00 1.00 17 154 0.89 0.49 0.04 0.09 N/A N/A 34 3 0 0.00 1.11 0.00 1.00 8 178 0.96 0.42 0.02 0.11 N/A N/A 32 4 0 0.00 1.12 0.00 1.00 16 173 0.91 0.44 0.04 0.10 N/A N/A 34 5 0 0.00 0.99 0.00 1.00 288 2358 0.88 0.42 0.10 0.15 N/A N/A 32 6 0 0.00 0.84 0.00 1.00 2658 24 K 0.89 0.48 0.08 0.13 N/A N/A 31 7 0 0.00 0.81 0.00 1.00 56 261 0.79 0.36 0.09 0.08 N/A N/A 34 8 1 0.01 0.88 0.01 1.00 8468 133 K 0.94 0.56 0.05 0.17 N/A N/A 21 9 1 0.00 0.90 0.00 1.00 649 4561 0.86 0.45 0.03 0.04 N/A N/A 22 10 1 0.00 0.73 0.00 1.00 326 4404 0.93 0.52 0.06 0.17 N/A N/A 23 11 1 0.00 0.76 0.00 1.00 1216 9955 0.88 0.61 0.04 0.06 N/A N/A 21 12 1 0.00 0.77 0.00 1.00 954 30 K 0.97 0.43 0.02 0.12 N/A N/A 22 13 1 0.00 0.79 0.00 1.00 184 96 K 1.00 0.31 0.00 0.29 N/A N/A 22 14 1 0.00 1.15 0.00 1.00 10 145 0.93 0.41 0.03 0.10 N/A N/A 23 15 1 0.00 1.20 0.00 1.00 317 1056 0.70 0.36 0.08 0.04 N/A N/A 21 ------------------------------------------------------------------------------------------------------------------- SKT 0 0.00 0.84 0.00 1.00 7443 50 K 0.85 0.51 0.09 0.10 0.01 0.01 32 SKT 1 0.00 0.84 0.00 1.00 12 K 281 K 0.96 0.48 0.04 0.16 0.01 0.01 21 ------------------------------------------------------------------------------------------------------------------- TOTAL * 0.00 0.84 0.00 1.00 19 K 332 K 0.94 0.48 0.05 0.15 0.02 0.01 N/A Instructions retired: 63 M ; Active cycles: 76 M ; Time (TSC): 3094 Mticks ; C0 (active,non-halted) core residency: 0.15 % C1 core residency: 99.85 %; C3 core residency: 0.00 %; C6 core residency: 0.00 %; C7 core residency: 0.00 % C2 package residency: 0.00 %; C3 package residency: 0.00 %; C6 package residency: 0.00 %; C7 package residency: 0.00 % PHYSICAL CORE IPC : 0.84 => corresponds to 20.94 % utilization for cores in active state Instructions per nominal CPU cycle: 0.00 => corresponds to 0.03 % core utilization over time interval Intel(r) QPI data traffic estimation in bytes (data traffic coming to CPU/socket through QPI links): QPI0 QPI1 | QPI0 QPI1 ---------------------------------------------------------------------------------------------- SKT 0 0 0 | 0% 0% SKT 1 0 0 | 0% 0% ---------------------------------------------------------------------------------------------- Total QPI incoming data traffic: 0 QPI data traffic/Memory controller traffic: 0.00 Intel(r) QPI traffic estimation in bytes (data and non-data traffic outgoing from CPU/socket through QPI links): QPI0 QPI1 | QPI0 QPI1 ---------------------------------------------------------------------------------------------- SKT 0 0 0 | 0% 0% SKT 1 0 0 | 0% 0% ---------------------------------------------------------------------------------------------- Total QPI outgoing data and non-data traffic: 0 ---------------------------------------------------------------------------------------------- SKT 0 package consumed 53.44 Joules SKT 1 package consumed 56.13 Joules ---------------------------------------------------------------------------------------------- TOTAL: 109.57 Joules ---------------------------------------------------------------------------------------------- SKT 0 DIMMs consumed 0.00 Joules SKT 1 DIMMs consumed 0.00 Joules ---------------------------------------------------------------------------------------------- TOTAL: 0.00 Joules EXEC : instructions per nominal CPU cycle IPC : instructions per CPU cycle FREQ : relation to nominal CPU frequency='unhalted clock ticks'/'invariant timer ticks' (includes Intel Turbo Boost) AFREQ : relation to nominal CPU frequency while in active state (not in power-saving C state)='unhalted clock ticks'/'invariant timer ticks while in C0-state' (includes Intel Turbo Boost) L3MISS: L3 cache misses L2MISS: L2 cache misses (including other core's L2 cache *hits*) L3HIT : L3 cache hit ratio (0.00-1.00) L2HIT : L2 cache hit ratio (0.00-1.00) L3CLK : ratio of CPU cycles lost due to L3 cache misses (0.00-1.00), in some cases could be >1.0 due to a higher memory latency L2CLK : ratio of CPU cycles lost due to missing L2 cache but still hitting L3 cache (0.00-1.00) READ : bytes read from memory controller (in GBytes) WRITE : bytes written to memory controller (in GBytes) TEMP : Temperature reading in 1 degree Celsius relative to the TjMax temperature (thermal headroom): 0 corresponds to the max temperature Core (SKT) | EXEC | IPC | FREQ | AFREQ | L3MISS | L2MISS | L3HIT | L2HIT | L3CLK | L2CLK | READ | WRITE | TEMP 0 0 0.00 0.72 0.00 1.00 327 3130 0.90 0.33 0.08 0.16 N/A N/A 36 1 0 0.00 0.54 0.00 1.00 802 20 K 0.96 0.45 0.03 0.15 N/A N/A 33 2 0 0.00 0.62 0.00 1.00 232 1272 0.82 0.27 0.18 0.18 N/A N/A 33 3 0 0.00 0.78 0.00 1.00 178 1902 0.91 0.23 0.10 0.20 N/A N/A 33 4 0 0.00 1.15 0.00 1.00 10 160 0.94 0.39 0.03 0.10 N/A N/A 35 5 0 0.00 1.10 0.00 1.00 5 184 0.97 0.40 0.01 0.11 N/A N/A 32 6 0 0.00 0.96 0.00 1.00 890 12 K 0.93 0.51 0.04 0.11 N/A N/A 32 7 0 0.00 1.13 0.00 1.00 123 1256 0.90 0.27 0.07 0.14 N/A N/A 34 8 1 0.00 0.77 0.00 1.00 875 5946 0.85 0.46 0.13 0.16 N/A N/A 22 9 1 0.00 0.68 0.00 1.00 854 4878 0.82 0.34 0.13 0.14 N/A N/A 23 10 1 0.00 0.78 0.00 1.00 50 822 0.94 0.49 0.04 0.16 N/A N/A 22 11 1 0.00 0.69 0.00 1.00 726 4268 0.83 0.46 0.11 0.11 N/A N/A 22 12 1 0.00 0.99 0.00 1.00 14 202 0.93 0.34 0.03 0.10 N/A N/A 23 13 1 0.00 0.68 0.00 1.00 162 2475 0.93 0.39 0.05 0.15 N/A N/A 22 14 1 0.00 1.15 0.00 1.00 11 157 0.93 0.37 0.03 0.11 N/A N/A 23 15 1 0.00 1.21 0.00 1.00 342 1078 0.68 0.38 0.09 0.04 N/A N/A 21 ------------------------------------------------------------------------------------------------------------------- SKT 0 0.00 0.74 0.00 1.00 2567 41 K 0.94 0.45 0.04 0.14 0.01 0.01 32 SKT 1 0.00 0.79 0.00 1.00 3034 19 K 0.85 0.42 0.10 0.12 0.01 0.01 21 ------------------------------------------------------------------------------------------------------------------- TOTAL * 0.00 0.76 0.00 1.00 5601 60 K 0.91 0.44 0.06 0.13 0.01 0.01 N/A Instructions retired: 11 M ; Active cycles: 15 M ; Time (TSC): 3094 Mticks ; C0 (active,non-halted) core residency: 0.03 % C1 core residency: 99.97 %; C3 core residency: 0.00 %; C6 core residency: 0.00 %; C7 core residency: 0.00 % C2 package residency: 0.00 %; C3 package residency: 0.00 %; C6 package residency: 0.00 %; C7 package residency: 0.00 % PHYSICAL CORE IPC : 0.76 => corresponds to 18.91 % utilization for cores in active state Instructions per nominal CPU cycle: 0.00 => corresponds to 0.01 % core utilization over time interval Intel(r) QPI data traffic estimation in bytes (data traffic coming to CPU/socket through QPI links): QPI0 QPI1 | QPI0 QPI1 ---------------------------------------------------------------------------------------------- SKT 0 0 0 | 0% 0% SKT 1 0 0 | 0% 0% ---------------------------------------------------------------------------------------------- Total QPI incoming data traffic: 0 QPI data traffic/Memory controller traffic: 0.00 Intel(r) QPI traffic estimation in bytes (data and non-data traffic outgoing from CPU/socket through QPI links): QPI0 QPI1 | QPI0 QPI1 ---------------------------------------------------------------------------------------------- SKT 0 0 0 | 0% 0% SKT 1 0 0 | 0% 0% ---------------------------------------------------------------------------------------------- Total QPI outgoing data and non-data traffic: 0 ---------------------------------------------------------------------------------------------- SKT 0 package consumed 53.36 Joules SKT 1 package consumed 56.03 Joules ---------------------------------------------------------------------------------------------- TOTAL: 109.40 Joules ---------------------------------------------------------------------------------------------- SKT 0 DIMMs consumed 0.00 Joules SKT 1 DIMMs consumed 0.00 Joules ---------------------------------------------------------------------------------------------- TOTAL: 0.00 Joules EXEC : instructions per nominal CPU cycle IPC : instructions per CPU cycle FREQ : relation to nominal CPU frequency='unhalted clock ticks'/'invariant timer ticks' (includes Intel Turbo Boost) AFREQ : relation to nominal CPU frequency while in active state (not in power-saving C state)='unhalted clock ticks'/'invariant timer ticks while in C0-state' (includes Intel Turbo Boost) L3MISS: L3 cache misses L2MISS: L2 cache misses (including other core's L2 cache *hits*) L3HIT : L3 cache hit ratio (0.00-1.00) L2HIT : L2 cache hit ratio (0.00-1.00) L3CLK : ratio of CPU cycles lost due to L3 cache misses (0.00-1.00), in some cases could be >1.0 due to a higher memory latency L2CLK : ratio of CPU cycles lost due to missing L2 cache but still hitting L3 cache (0.00-1.00) READ : bytes read from memory controller (in GBytes) WRITE : bytes written to memory controller (in GBytes) TEMP : Temperature reading in 1 degree Celsius relative to the TjMax temperature (thermal headroom): 0 corresponds to the max temperature Core (SKT) | EXEC | IPC | FREQ | AFREQ | L3MISS | L2MISS | L3HIT | L2HIT | L3CLK | L2CLK | READ | WRITE | TEMP 0 0 0.00 0.26 0.00 1.00 1856 3354 0.45 0.33 0.17 0.04 N/A N/A 36 1 0 0.00 0.86 0.00 1.00 1457 15 K 0.91 0.56 0.04 0.08 N/A N/A 33 2 0 0.00 0.77 0.00 1.00 2649 6244 0.58 0.39 0.37 0.10 N/A N/A 34 3 0 0.00 0.98 0.00 1.00 74 579 0.87 0.41 0.07 0.12 N/A N/A 31 4 0 0.00 0.66 0.00 1.00 23 368 0.94 0.39 0.02 0.09 N/A N/A 34 5 0 0.00 0.85 0.00 1.00 15 277 0.95 0.37 0.02 0.10 N/A N/A 31 6 0 0.00 0.88 0.00 1.00 1672 17 K 0.90 0.51 0.06 0.11 N/A N/A 32 7 0 0.00 0.75 0.00 1.00 91 332 0.73 0.41 0.12 0.07 N/A N/A 33 8 1 0.00 0.91 0.00 1.00 3142 23 K 0.86 0.64 0.13 0.18 N/A N/A 22 9 1 0.01 1.32 0.01 1.00 15 K 38 K 0.60 0.39 0.13 0.04 N/A N/A 22 10 1 0.00 0.69 0.00 1.00 292 1917 0.85 0.19 0.11 0.14 N/A N/A 22 11 1 0.00 0.55 0.00 1.00 2791 11 K 0.76 0.47 0.13 0.10 N/A N/A 21 12 1 0.00 0.79 0.00 1.00 25 276 0.91 0.34 0.04 0.09 N/A N/A 23 13 1 0.00 0.64 0.00 1.00 1924 3808 0.49 0.18 0.41 0.09 N/A N/A 23 14 1 0.00 0.60 0.00 1.00 54 584 0.91 0.54 0.04 0.09 N/A N/A 23 15 1 0.00 1.04 0.00 1.00 648 2701 0.76 0.25 0.11 0.08 N/A N/A 21 ------------------------------------------------------------------------------------------------------------------- SKT 0 0.00 0.78 0.00 1.00 7837 43 K 0.82 0.50 0.09 0.09 0.02 0.01 31 SKT 1 0.00 1.13 0.00 1.00 24 K 82 K 0.70 0.49 0.13 0.07 0.01 0.01 21 ------------------------------------------------------------------------------------------------------------------- TOTAL * 0.00 1.02 0.00 1.00 32 K 126 K 0.74 0.49 0.12 0.07 0.03 0.01 N/A Instructions retired: 49 M ; Active cycles: 48 M ; Time (TSC): 3094 Mticks ; C0 (active,non-halted) core residency: 0.10 % C1 core residency: 99.90 %; C3 core residency: 0.00 %; C6 core residency: 0.00 %; C7 core residency: 0.00 % C2 package residency: 0.00 %; C3 package residency: 0.00 %; C6 package residency: 0.00 %; C7 package residency: 0.00 % PHYSICAL CORE IPC : 1.02 => corresponds to 25.55 % utilization for cores in active state Instructions per nominal CPU cycle: 0.00 => corresponds to 0.03 % core utilization over time interval Intel(r) QPI data traffic estimation in bytes (data traffic coming to CPU/socket through QPI links): QPI0 QPI1 | QPI0 QPI1 ---------------------------------------------------------------------------------------------- SKT 0 0 0 | 0% 0% SKT 1 0 0 | 0% 0% ---------------------------------------------------------------------------------------------- Total QPI incoming data traffic: 0 QPI data traffic/Memory controller traffic: 0.00 Intel(r) QPI traffic estimation in bytes (data and non-data traffic outgoing from CPU/socket through QPI links): QPI0 QPI1 | QPI0 QPI1 ---------------------------------------------------------------------------------------------- SKT 0 0 0 | 0% 0% SKT 1 0 0 | 0% 0% ---------------------------------------------------------------------------------------------- Total QPI outgoing data and non-data traffic: 0 ---------------------------------------------------------------------------------------------- SKT 0 package consumed 53.34 Joules SKT 1 package consumed 56.04 Joules ---------------------------------------------------------------------------------------------- TOTAL: 109.38 Joules ---------------------------------------------------------------------------------------------- SKT 0 DIMMs consumed 0.00 Joules SKT 1 DIMMs consumed 0.00 Joules ---------------------------------------------------------------------------------------------- TOTAL: 0.00 Joules EXEC : instructions per nominal CPU cycle IPC : instructions per CPU cycle FREQ : relation to nominal CPU frequency='unhalted clock ticks'/'invariant timer ticks' (includes Intel Turbo Boost) AFREQ : relation to nominal CPU frequency while in active state (not in power-saving C state)='unhalted clock ticks'/'invariant timer ticks while in C0-state' (includes Intel Turbo Boost) L3MISS: L3 cache misses L2MISS: L2 cache misses (including other core's L2 cache *hits*) L3HIT : L3 cache hit ratio (0.00-1.00) L2HIT : L2 cache hit ratio (0.00-1.00) L3CLK : ratio of CPU cycles lost due to L3 cache misses (0.00-1.00), in some cases could be >1.0 due to a higher memory latency L2CLK : ratio of CPU cycles lost due to missing L2 cache but still hitting L3 cache (0.00-1.00) READ : bytes read from memory controller (in GBytes) WRITE : bytes written to memory controller (in GBytes) TEMP : Temperature reading in 1 degree Celsius relative to the TjMax temperature (thermal headroom): 0 corresponds to the max temperature Core (SKT) | EXEC | IPC | FREQ | AFREQ | L3MISS | L2MISS | L3HIT | L2HIT | L3CLK | L2CLK | READ | WRITE | TEMP 0 0 0.00 0.61 0.00 1.00 359 1531 0.77 0.56 0.12 0.10 N/A N/A 35 1 0 0.00 0.55 0.00 1.00 1065 20 K 0.95 0.45 0.04 0.15 N/A N/A 33 2 0 0.00 0.74 0.00 1.00 2422 4513 0.46 0.43 0.39 0.07 N/A N/A 35 3 0 0.00 0.72 0.00 1.00 59 1122 0.95 0.35 0.04 0.16 N/A N/A 32 4 0 0.00 1.15 0.00 1.00 11 127 0.91 0.48 0.03 0.08 N/A N/A 34 5 0 0.00 1.10 0.00 1.00 7 236 0.97 0.43 0.01 0.12 N/A N/A 32 6 0 0.00 0.87 0.00 1.00 1958 18 K 0.89 0.54 0.06 0.09 N/A N/A 31 7 0 0.00 0.65 0.00 1.00 73 271 0.73 0.46 0.08 0.06 N/A N/A 34 8 1 0.00 0.92 0.00 1.00 1255 17 K 0.93 0.72 0.06 0.19 N/A N/A 21 9 1 0.00 0.52 0.00 1.00 828 3286 0.75 0.31 0.15 0.10 N/A N/A 22 10 1 0.00 0.82 0.00 1.00 30 314 0.90 0.32 0.05 0.11 N/A N/A 23 11 1 0.00 0.55 0.00 1.00 2704 11 K 0.76 0.46 0.13 0.10 N/A N/A 22 12 1 0.00 0.72 0.00 1.00 111 1559 0.93 0.20 0.06 0.15 N/A N/A 22 13 1 0.00 0.80 0.00 1.00 64 766 0.92 0.31 0.08 0.20 N/A N/A 22 14 1 0.00 0.82 0.00 1.00 33 288 0.89 0.38 0.05 0.10 N/A N/A 24 15 1 0.00 1.13 0.00 1.00 321 1154 0.72 0.34 0.08 0.04 N/A N/A 21 ------------------------------------------------------------------------------------------------------------------- SKT 0 0.00 0.74 0.00 1.00 5954 46 K 0.87 0.49 0.08 0.11 0.01 0.01 32 SKT 1 0.00 0.74 0.00 1.00 5346 35 K 0.85 0.61 0.10 0.13 0.01 0.01 21 ------------------------------------------------------------------------------------------------------------------- TOTAL * 0.00 0.74 0.00 1.00 11 K 82 K 0.86 0.55 0.09 0.12 0.02 0.01 N/A Instructions retired: 16 M ; Active cycles: 22 M ; Time (TSC): 3095 Mticks ; C0 (active,non-halted) core residency: 0.05 % C1 core residency: 99.95 %; C3 core residency: 0.00 %; C6 core residency: 0.00 %; C7 core residency: 0.00 % C2 package residency: 0.00 %; C3 package residency: 0.00 %; C6 package residency: 0.00 %; C7 package residency: 0.00 % PHYSICAL CORE IPC : 0.74 => corresponds to 18.42 % utilization for cores in active state Instructions per nominal CPU cycle: 0.00 => corresponds to 0.01 % core utilization over time interval Intel(r) QPI data traffic estimation in bytes (data traffic coming to CPU/socket through QPI links): QPI0 QPI1 | QPI0 QPI1 ---------------------------------------------------------------------------------------------- SKT 0 0 0 | 0% 0% SKT 1 0 0 | 0% 0% ---------------------------------------------------------------------------------------------- Total QPI incoming data traffic: 0 QPI data traffic/Memory controller traffic: 0.00 Intel(r) QPI traffic estimation in bytes (data and non-data traffic outgoing from CPU/socket through QPI links): QPI0 QPI1 | QPI0 QPI1 ---------------------------------------------------------------------------------------------- SKT 0 0 0 | 0% 0% SKT 1 0 0 | 0% 0% ---------------------------------------------------------------------------------------------- Total QPI outgoing data and non-data traffic: 0 ---------------------------------------------------------------------------------------------- SKT 0 package consumed 53.40 Joules SKT 1 package consumed 56.06 Joules ---------------------------------------------------------------------------------------------- TOTAL: 109.46 Joules ---------------------------------------------------------------------------------------------- SKT 0 DIMMs consumed 0.00 Joules SKT 1 DIMMs consumed 0.00 Joules ---------------------------------------------------------------------------------------------- TOTAL: 0.00 Joules Cleaning up Using PCM on your system might have a performance impact as per http://software.intel.com/en-us/articles/performance-impact-when-sampling-certain-llc-events-on-snb-ep-with-vtune You can avoid the performance impact by using the option --noJKTWA, however the cache metrics might be wrong then.