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    <title>topic Re:need to run dpdk-crypto-perf-test on Intel(R) Xeon(R) Platinum 8480+ in Intel® QuickAssist Technology (Intel® QAT)</title>
    <link>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1615565#M396</link>
    <description>&lt;P&gt;JCK1,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;For the built-in QAT processor it still requires specifying the correct PCIe address.&amp;nbsp;The syntax hasn’t changed. It uses bus:slot:function&lt;/P&gt;&lt;P&gt;Note as before you will need to bind the QAT VFs to the vfio-pci driver before they can be used with DPDK.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Ronny G&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;BR /&gt;</description>
    <pubDate>Tue, 16 Jul 2024 22:00:01 GMT</pubDate>
    <dc:creator>Ronny_G_Intel</dc:creator>
    <dc:date>2024-07-16T22:00:01Z</dc:date>
    <item>
      <title>need to run dpdk-crypto-perf-test on Intel(R) Xeon(R) Platinum 8480+</title>
      <link>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1614609#M392</link>
      <description>&lt;P&gt;Hi Intel expert&lt;/P&gt;&lt;P&gt;I have&amp;nbsp;Intel(R) Xeon(R) Platinum 8480+ based HW, like to run&amp;nbsp; dpdk-crypto-perf-test , since the QAT is built into the processor, no longer a PCIe device. How to specify in&amp;nbsp; dpdk-crypto-perf-test with options like -a, --devicetype etc? the -a is used to specify the VF for the QAT card, what is right option for the built-in QAT engine in 8480 processor.&lt;BR /&gt;&lt;BR /&gt;Thanks in advance&lt;/P&gt;&lt;P&gt;JCK&lt;/P&gt;</description>
      <pubDate>Fri, 12 Jul 2024 17:49:07 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1614609#M392</guid>
      <dc:creator>JCK1</dc:creator>
      <dc:date>2024-07-12T17:49:07Z</dc:date>
    </item>
    <item>
      <title>Re:need to run dpdk-crypto-perf-test on Intel(R) Xeon(R) Platinum 8480+</title>
      <link>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1615565#M396</link>
      <description>&lt;P&gt;JCK1,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;For the built-in QAT processor it still requires specifying the correct PCIe address.&amp;nbsp;The syntax hasn’t changed. It uses bus:slot:function&lt;/P&gt;&lt;P&gt;Note as before you will need to bind the QAT VFs to the vfio-pci driver before they can be used with DPDK.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Ronny G&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Tue, 16 Jul 2024 22:00:01 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1615565#M396</guid>
      <dc:creator>Ronny_G_Intel</dc:creator>
      <dc:date>2024-07-16T22:00:01Z</dc:date>
    </item>
    <item>
      <title>Re: need to run dpdk-crypto-perf-test on Intel(R) Xeon(R) Platinum 8480+</title>
      <link>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1615839#M397</link>
      <description>&lt;P&gt;Ronny&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for the confirmation.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I attached the issue I am facing here (your forum does not allow me to post directly so I put them into a text file.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Do you know what the problem I am getting?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks&lt;BR /&gt;JCK&lt;/P&gt;</description>
      <pubDate>Wed, 17 Jul 2024 18:59:36 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1615839#M397</guid>
      <dc:creator>JCK1</dc:creator>
      <dc:date>2024-07-17T18:59:36Z</dc:date>
    </item>
    <item>
      <title>Re:need to run dpdk-crypto-perf-test on Intel(R) Xeon(R) Platinum 8480+</title>
      <link>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1617141#M401</link>
      <description>&lt;P&gt;Hi JCK,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;The dmesg output indicates that two QAT devices (qat_dev0 and qat_dev1) have successfully started with 9 acceleration engines each. This suggests that the QAT hardware is recognized by the system and the QAT driver is loaded.&lt;/P&gt;&lt;P&gt;The lsmod command shows that the qat_4xxx and intel_qat modules are loaded, but there are no services currently using these modules (0 usage count). This is expected before the DPDK application binds to the devices.&lt;/P&gt;&lt;P&gt;Driver Bindings (ll /sys/bus/pci/drivers/4xxx), QAT PCI driver shows two devices bound to the driver, which aligns with the dmesg output.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;After binding the QAT devices to the DPDK-compatible vfio-pci driver, the dpdk-devbind tool lists the devices as available for DPDK applications. However, they are marked as unused, indicating that no DPDK application is currently using them.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;The output from the dpdk-test-crypto-perf application shows that the DPDK Environment Abstraction Layer (EAL) is able to detect the QAT devices and attempts to bind to them. However, it fails with the message qat_pf2vf_exch_msg(): ACK not received from remote, followed by qat_pci_device_allocate(): Cannot acquire ring configuration for QAT_0. This indicates a communication issue between the Physical Function (PF) and the Virtual Function (VF) of the QAT device.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;I would assume intel_iommu is enabled because VFS are visible.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Do you have any error when running DPDK compilation and installation?&lt;/P&gt;&lt;P&gt;$ meson setup &amp;lt;options&amp;gt; build&lt;/P&gt;&lt;P&gt;$ ninja&lt;/P&gt;&lt;P&gt;$ meson install&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;How are you binding the VF to DPDK?&lt;/P&gt;&lt;P&gt;$ ./dpdk-devbind.py -b vfio-pci 0000:B:S:F&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Ronny G&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Mon, 22 Jul 2024 21:33:59 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1617141#M401</guid>
      <dc:creator>Ronny_G_Intel</dc:creator>
      <dc:date>2024-07-22T21:33:59Z</dc:date>
    </item>
    <item>
      <title>Re: Re:need to run dpdk-crypto-perf-test on Intel(R) Xeon(R) Platinum 8480+</title>
      <link>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1617417#M404</link>
      <description>&lt;P&gt;Hi Ronny&lt;/P&gt;&lt;P&gt;Thanks for your reply&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;gt;&amp;gt;&amp;gt; I would assume intel_iommu is enabled because VFS are visible.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Yes, here is the kernel setting:&lt;BR /&gt;intel_pstate=disable console=ttyS0,115200n8 kpti=off default_hugepagesz=1G hugepagesz=1G hugepages=64 isolcpus=1-69 nohz_full=1-69 irqaffinity=0 rcu_nocbs=1-69 rcu_nocb_poll nosoftlockup intel_iommu=on iommu.passthrough=1 transparent_hugepage=always&lt;BR /&gt;&lt;BR /&gt;&amp;gt;&amp;gt;&amp;gt;&amp;nbsp;How are you binding the VF to DPDK?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I used this to bind:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;DEVBIND_PATH=/home/ubuntu/dpdk/usertools/dpdk-devbind.py&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;sudo ${DEVBIND_PATH} --bind=vfio-pci 6b:00.0&lt;BR /&gt;sudo ${DEVBIND_PATH} --bind=vfio-pci 6b:00.1&lt;BR /&gt;sudo ${DEVBIND_PATH} --bind=vfio-pci 6b:00.2&lt;BR /&gt;sudo ${DEVBIND_PATH} --bind=vfio-pci 6b:00.3&lt;BR /&gt;sudo ${DEVBIND_PATH} --bind=vfio-pci 6b:00.4&lt;BR /&gt;sudo ${DEVBIND_PATH} --bind=vfio-pci 6b:00.5&lt;BR /&gt;sudo ${DEVBIND_PATH} --bind=vfio-pci 6b:00.6&lt;BR /&gt;sudo ${DEVBIND_PATH} --bind=vfio-pci 6b:00.7&lt;BR /&gt;sudo ${DEVBIND_PATH} --bind=vfio-pci 6b:01.0&lt;BR /&gt;sudo ${DEVBIND_PATH} --bind=vfio-pci 6b:01.1&lt;BR /&gt;sudo ${DEVBIND_PATH} --bind=vfio-pci 6b:01.2&lt;BR /&gt;sudo ${DEVBIND_PATH} --bind=vfio-pci 6b:01.3&lt;BR /&gt;sudo ${DEVBIND_PATH} --bind=vfio-pci 6b:01.4&lt;BR /&gt;sudo ${DEVBIND_PATH} --bind=vfio-pci 6b:01.5&lt;BR /&gt;sudo ${DEVBIND_PATH} --bind=vfio-pci 6b:01.6&lt;BR /&gt;sudo ${DEVBIND_PATH} --bind=vfio-pci 6b:01.7&lt;BR /&gt;sudo ${DEVBIND_PATH} --bind=vfio-pci 6b:02.0&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;There are two PFs of QAT:&lt;BR /&gt;Crypto devices using kernel driver&lt;BR /&gt;==================================&lt;BR /&gt;0000:6b:00.0 'Device 4940' drv=4xxx unused=qat_4xxx,vfio-pci&lt;BR /&gt;0000:e8:00.0 'Device 4940' drv=4xxx unused=qat_4xxx,vfio-pci&lt;BR /&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Should we do anything about it?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;As for the dpdk, I did not see any error in building it.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thanks&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;JCK&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 23 Jul 2024 14:06:25 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1617417#M404</guid>
      <dc:creator>JCK1</dc:creator>
      <dc:date>2024-07-23T14:06:25Z</dc:date>
    </item>
    <item>
      <title>Re: Re:need to run dpdk-crypto-perf-test on Intel(R) Xeon(R) Platinum 8480+</title>
      <link>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1617460#M405</link>
      <description>&lt;P&gt;Hi Ronny&lt;/P&gt;&lt;P&gt;I attached my new message in attached as your message system does not allow me post it directly&lt;/P&gt;&lt;P&gt;thanks&lt;/P&gt;&lt;P&gt;JCK&lt;/P&gt;</description>
      <pubDate>Tue, 23 Jul 2024 16:34:13 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1617460#M405</guid>
      <dc:creator>JCK1</dc:creator>
      <dc:date>2024-07-23T16:34:13Z</dc:date>
    </item>
    <item>
      <title>Re:need to run dpdk-crypto-perf-test on Intel(R) Xeon(R) Platinum 8480+</title>
      <link>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1618540#M409</link>
      <description>&lt;P&gt;Hi JCK1,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;I am glad to hear that you were to resolve the original DPDK binding issue.&lt;/P&gt;&lt;P&gt;I checked your new report and I believe that in order to get a better understanding of the system configurations, how specific parameters are set,&amp;nbsp;and what QAT package version you are running, we would need the icp_dump?&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;This script is located in the following location of the QAT SDK package: ICP_ROOT/quickassist/utilities/release-files/debug_tool/icp_dump.sh&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Can you please share this information?&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;We look forward to hearing back from you.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Ronny G&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Fri, 26 Jul 2024 23:07:59 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1618540#M409</guid>
      <dc:creator>Ronny_G_Intel</dc:creator>
      <dc:date>2024-07-26T23:07:59Z</dc:date>
    </item>
    <item>
      <title>Re: Re:need to run dpdk-crypto-perf-test on Intel(R) Xeon(R) Platinum 8480+</title>
      <link>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1618554#M411</link>
      <description>&lt;P&gt;Hi Ronny&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for your reply.&lt;/P&gt;&lt;P&gt;I was able to run the same test as AES-CBC/SHA2-256-HMAC and AES-GCM. However AES-CBC/SHA1-HMAC gave me an error:&lt;/P&gt;&lt;P&gt;# Crypto Performance Application Options:&lt;BR /&gt;#&lt;BR /&gt;# cperf test: throughput&lt;BR /&gt;#&lt;BR /&gt;# cperf operation type: cipher-then-auth&lt;BR /&gt;#&lt;BR /&gt;# size of crypto op / mbuf pool: 8192&lt;BR /&gt;# total number of ops: 30000000&lt;BR /&gt;# buffer sizes: 64 128 256 512 1024 2048&lt;BR /&gt;# burst sizes: 32&lt;/P&gt;&lt;P&gt;# segment size: 2068&lt;BR /&gt;#&lt;BR /&gt;# cryptodev type: crypto_qat&lt;BR /&gt;#&lt;BR /&gt;# number of queue pairs per device: 2&lt;BR /&gt;# crypto operation: cipher-then-auth&lt;BR /&gt;# sessionless: no&lt;BR /&gt;# out of place: no&lt;BR /&gt;#&lt;BR /&gt;# auth algorithm: sha1-hmac&lt;BR /&gt;# auth operation: generate&lt;BR /&gt;# auth key size: 64&lt;BR /&gt;# auth iv size: 0&lt;BR /&gt;# auth digest size: 20&lt;BR /&gt;#&lt;BR /&gt;# cipher algorithm: aes-cbc&lt;BR /&gt;# cipher operation: encrypt&lt;BR /&gt;# cipher key size: 16&lt;BR /&gt;# cipher iv size: 16&lt;BR /&gt;#&lt;BR /&gt;USER1: Crypto device type does not support capabilities requested&lt;BR /&gt;USER1: Unsupported case: errno: 2&lt;BR /&gt;&lt;BR /&gt;I attached the output from icp_dump.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;thanks&lt;/P&gt;&lt;P&gt;JCK&lt;/P&gt;</description>
      <pubDate>Sat, 27 Jul 2024 01:09:40 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1618554#M411</guid>
      <dc:creator>JCK1</dc:creator>
      <dc:date>2024-07-27T01:09:40Z</dc:date>
    </item>
    <item>
      <title>Re:need to run dpdk-crypto-perf-test on Intel(R) Xeon(R) Platinum 8480+</title>
      <link>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1624892#M417</link>
      <description>&lt;P&gt;Hi JCK1,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;I have been trying to replicate this error message that you are getting but I haven't had any luck, I believe this is mostly on the DPDK side but it could be a combination of QAT and DPDK. &lt;/P&gt;&lt;P&gt;Can you tell me what are you trying to accomplish and if you have tried QAT only and have issues?&lt;/P&gt;&lt;P&gt;Can you also provide me with a screenshot when you run AES-CBC/SHA2-256-HMAC and AES-GCM showing the error message for AES-CBC/SHA2-256-HMAC? I will need to bring this up to the DPDK team and will need as much detail as possible.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Ronny G&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Wed, 21 Aug 2024 21:39:04 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1624892#M417</guid>
      <dc:creator>Ronny_G_Intel</dc:creator>
      <dc:date>2024-08-21T21:39:04Z</dc:date>
    </item>
    <item>
      <title>Re: Re:need to run dpdk-crypto-perf-test on Intel(R) Xeon(R) Platinum 8480+</title>
      <link>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1624929#M418</link>
      <description>&lt;P&gt;Hi Ronny&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I was trying to test same crypto test we have done with QAT PCIe card on the Intel SoC QAT engin.&lt;/P&gt;&lt;P&gt;this is command I have done (same on PCIe QAT):&lt;/P&gt;&lt;P&gt;sudo /home/ubuntu/dpdk/build/app/dpdk-test-crypto-perf --socket-mem 2048,0 --legacy-mem -a 6b:00.1 -a 6b:00.2 -a 6b:00.3 -a 6b:00.4 -a 6b:00.5 -a 6b:00.6 -a 6b:00.7 -a 6b:01.0 -a 6b:01.1 -a 6b:01.2 -l 2,4,6,8,10,12,14,16,18,20,22 -n 10 -- --buffer-sz 64,128,256,512,1024,2048 --optype cipher-then-auth --ptest throughput --auth-key-sz 64 --cipher-key-sz 16 --devtype crypto_qat --cipher-iv-sz 16 --auth-op generate --burst-sz 32 --total-ops 30000000 --digest-sz 20 --auth-algo sha1-hmac --cipher-algo aes-cbc --cipher-op encrypt&lt;BR /&gt;EAL: Detected CPU lcores: 24&lt;BR /&gt;EAL: Detected NUMA nodes: 2&lt;BR /&gt;EAL: Detected static linkage of DPDK&lt;BR /&gt;EAL: Multi-process socket /var/run/dpdk/rte/mp_socket&lt;BR /&gt;EAL: Selected IOVA mode 'VA'&lt;BR /&gt;EAL: VFIO support initialized&lt;BR /&gt;EAL: Using IOMMU type 1 (Type 1)&lt;BR /&gt;CRYPTODEV: Creating cryptodev 0000:6b:00.1_qat_asym&lt;BR /&gt;CRYPTODEV: Initialisation parameters - name: 0000:6b:00.1_qat_asym,socket id: 0, max queue pairs: 0&lt;BR /&gt;CRYPTODEV: Creating cryptodev 0000:6b:00.1_qat_sym&lt;BR /&gt;CRYPTODEV: Initialisation parameters - name: 0000:6b:00.1_qat_sym,socket id: 0, max queue pairs: 0&lt;BR /&gt;CRYPTODEV: Creating cryptodev 0000:6b:00.2_qat_asym&lt;BR /&gt;CRYPTODEV: Initialisation parameters - name: 0000:6b:00.2_qat_asym,socket id: 0, max queue pairs: 0&lt;BR /&gt;CRYPTODEV: Creating cryptodev 0000:6b:00.2_qat_sym&lt;BR /&gt;CRYPTODEV: Initialisation parameters - name: 0000:6b:00.2_qat_sym,socket id: 0, max queue pairs: 0&lt;BR /&gt;CRYPTODEV: Creating cryptodev 0000:6b:00.3_qat_asym&lt;BR /&gt;CRYPTODEV: Initialisation parameters - name: 0000:6b:00.3_qat_asym,socket id: 0, max queue pairs: 0&lt;BR /&gt;CRYPTODEV: Creating cryptodev 0000:6b:00.3_qat_sym&lt;BR /&gt;CRYPTODEV: Initialisation parameters - name: 0000:6b:00.3_qat_sym,socket id: 0, max queue pairs: 0&lt;BR /&gt;CRYPTODEV: Creating cryptodev 0000:6b:00.4_qat_asym&lt;BR /&gt;CRYPTODEV: Initialisation parameters - name: 0000:6b:00.4_qat_asym,socket id: 0, max queue pairs: 0&lt;BR /&gt;CRYPTODEV: Creating cryptodev 0000:6b:00.4_qat_sym&lt;BR /&gt;CRYPTODEV: Initialisation parameters - name: 0000:6b:00.4_qat_sym,socket id: 0, max queue pairs: 0&lt;BR /&gt;CRYPTODEV: Creating cryptodev 0000:6b:00.5_qat_asym&lt;BR /&gt;CRYPTODEV: Initialisation parameters - name: 0000:6b:00.5_qat_asym,socket id: 0, max queue pairs: 0&lt;BR /&gt;CRYPTODEV: Creating cryptodev 0000:6b:00.5_qat_sym&lt;BR /&gt;CRYPTODEV: Initialisation parameters - name: 0000:6b:00.5_qat_sym,socket id: 0, max queue pairs: 0&lt;BR /&gt;CRYPTODEV: Creating cryptodev 0000:6b:00.6_qat_asym&lt;BR /&gt;CRYPTODEV: Initialisation parameters - name: 0000:6b:00.6_qat_asym,socket id: 0, max queue pairs: 0&lt;BR /&gt;CRYPTODEV: Creating cryptodev 0000:6b:00.6_qat_sym&lt;BR /&gt;CRYPTODEV: Initialisation parameters - name: 0000:6b:00.6_qat_sym,socket id: 0, max queue pairs: 0&lt;BR /&gt;CRYPTODEV: Creating cryptodev 0000:6b:00.7_qat_asym&lt;BR /&gt;CRYPTODEV: Initialisation parameters - name: 0000:6b:00.7_qat_asym,socket id: 0, max queue pairs: 0&lt;BR /&gt;CRYPTODEV: Creating cryptodev 0000:6b:00.7_qat_sym&lt;BR /&gt;CRYPTODEV: Initialisation parameters - name: 0000:6b:00.7_qat_sym,socket id: 0, max queue pairs: 0&lt;BR /&gt;CRYPTODEV: Creating cryptodev 0000:6b:01.0_qat_asym&lt;BR /&gt;CRYPTODEV: Initialisation parameters - name: 0000:6b:01.0_qat_asym,socket id: 0, max queue pairs: 0&lt;BR /&gt;CRYPTODEV: Creating cryptodev 0000:6b:01.0_qat_sym&lt;BR /&gt;CRYPTODEV: Initialisation parameters - name: 0000:6b:01.0_qat_sym,socket id: 0, max queue pairs: 0&lt;BR /&gt;CRYPTODEV: Creating cryptodev 0000:6b:01.1_qat_asym&lt;BR /&gt;CRYPTODEV: Initialisation parameters - name: 0000:6b:01.1_qat_asym,socket id: 0, max queue pairs: 0&lt;BR /&gt;CRYPTODEV: Creating cryptodev 0000:6b:01.1_qat_sym&lt;BR /&gt;CRYPTODEV: Initialisation parameters - name: 0000:6b:01.1_qat_sym,socket id: 0, max queue pairs: 0&lt;BR /&gt;CRYPTODEV: Creating cryptodev 0000:6b:01.2_qat_asym&lt;BR /&gt;CRYPTODEV: Initialisation parameters - name: 0000:6b:01.2_qat_asym,socket id: 0, max queue pairs: 0&lt;BR /&gt;CRYPTODEV: Creating cryptodev 0000:6b:01.2_qat_sym&lt;BR /&gt;CRYPTODEV: Initialisation parameters - name: 0000:6b:01.2_qat_sym,socket id: 0, max queue pairs: 0&lt;BR /&gt;Allocated pool "sess_mp_0" on socket 0&lt;BR /&gt;# Crypto Performance Application Options:&lt;BR /&gt;#&lt;BR /&gt;# cperf test: throughput&lt;BR /&gt;#&lt;BR /&gt;# cperf operation type: cipher-then-auth&lt;BR /&gt;#&lt;BR /&gt;# size of crypto op / mbuf pool: 8192&lt;BR /&gt;# total number of ops: 30000000&lt;BR /&gt;# buffer sizes: 64 128 256 512 1024 2048&lt;BR /&gt;# burst sizes: 32&lt;/P&gt;&lt;P&gt;# segment size: 2068&lt;BR /&gt;#&lt;BR /&gt;# cryptodev type: crypto_qat&lt;BR /&gt;#&lt;BR /&gt;# number of queue pairs per device: 1&lt;BR /&gt;# crypto operation: cipher-then-auth&lt;BR /&gt;# sessionless: no&lt;BR /&gt;# out of place: no&lt;BR /&gt;#&lt;BR /&gt;# auth algorithm: sha1-hmac&lt;BR /&gt;# auth operation: generate&lt;BR /&gt;# auth key size: 64&lt;BR /&gt;# auth iv size: 0&lt;BR /&gt;# auth digest size: 20&lt;BR /&gt;#&lt;BR /&gt;# cipher algorithm: aes-cbc&lt;BR /&gt;# cipher operation: encrypt&lt;BR /&gt;# cipher key size: 16&lt;BR /&gt;# cipher iv size: 16&lt;BR /&gt;#&lt;BR /&gt;USER1: Crypto device type does not support capabilities requested&lt;BR /&gt;USER1: Unsupported case: errno: 2&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;If I just changed&amp;nbsp;--optype cipher-then-auth in above command to&amp;nbsp;--optype cipher-only, then it worked. this is AES-CBC with SHA1-HMAC. However we do not have issue with AES-CBC/SHA2-256-HMAC.&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;thanks&lt;/P&gt;&lt;P&gt;JCK&lt;/P&gt;</description>
      <pubDate>Thu, 22 Aug 2024 00:57:04 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1624929#M418</guid>
      <dc:creator>JCK1</dc:creator>
      <dc:date>2024-08-22T00:57:04Z</dc:date>
    </item>
    <item>
      <title>Re: need to run dpdk-crypto-perf-test on Intel(R) Xeon(R) Platinum 8480+</title>
      <link>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1627243#M422</link>
      <description>&lt;P&gt;Hi JCK1,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I see that you have the following kernel and QAT device:&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Linux 2p8480-501 6.2.0-36-generic #37~22.04.1-Ubuntu SMP PREEMPT_DYNAMIC Mon Oct&amp;nbsp;9 15:34:04 UTC 2 x86_64 x86_64 x86_64 GNU/Linux&lt;/P&gt;
&lt;P&gt;Number of 4xxxvf devices=32&lt;/P&gt;
&lt;P&gt;Number of 4xxx devices=2&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Can you please tell me the QAT driver version that you are using?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks,&lt;/P&gt;
&lt;P&gt;Ronny G&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 30 Aug 2024 01:27:46 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1627243#M422</guid>
      <dc:creator>Ronny_G_Intel</dc:creator>
      <dc:date>2024-08-30T01:27:46Z</dc:date>
    </item>
    <item>
      <title>Re: need to run dpdk-crypto-perf-test on Intel(R) Xeon(R) Platinum 8480+</title>
      <link>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1627423#M423</link>
      <description>&lt;P&gt;Hi Ronny&lt;/P&gt;&lt;P&gt;$ lsmod | grep qat&lt;BR /&gt;qat_4xxx 20480 0&lt;BR /&gt;intel_qat 270336 1 qat_4xxx&lt;BR /&gt;crc8 16384 1 intel_qat&lt;BR /&gt;authenc 16384 1 intel_qat&lt;BR /&gt;$ modinfo qat_4xxx&lt;BR /&gt;filename: /lib/modules/6.2.0-36-generic/kernel/drivers/crypto/qat/qat_4xxx/qat_4xxx.ko&lt;BR /&gt;softdep: pre: crypto-intel_qat&lt;BR /&gt;version: 0.6.0&lt;BR /&gt;description: Intel(R) QuickAssist Technology&lt;BR /&gt;firmware: qat_4xxx_mmp.bin&lt;BR /&gt;firmware: qat_4xxx.bin&lt;BR /&gt;author: Intel&lt;BR /&gt;license: Dual BSD/GPL&lt;BR /&gt;srcversion: 0AA4DF0E993F750524173E2&lt;BR /&gt;alias: pci:v00008086d00004942sv*sd*bc*sc*i*&lt;BR /&gt;alias: pci:v00008086d00004940sv*sd*bc*sc*i*&lt;BR /&gt;depends: intel_qat&lt;BR /&gt;retpoline: Y&lt;BR /&gt;intree: Y&lt;BR /&gt;name: qat_4xxx&lt;/P&gt;&lt;P&gt;thanks&lt;/P&gt;&lt;P&gt;JCK&lt;/P&gt;</description>
      <pubDate>Fri, 30 Aug 2024 14:47:45 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1627423#M423</guid>
      <dc:creator>JCK1</dc:creator>
      <dc:date>2024-08-30T14:47:45Z</dc:date>
    </item>
    <item>
      <title>Re:need to run dpdk-crypto-perf-test on Intel(R) Xeon(R) Platinum 8480+</title>
      <link>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1629420#M430</link>
      <description>&lt;P&gt;Hi JCK1,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;I am still trying to replicate this issue.&lt;/P&gt;&lt;P&gt;To confirm, are you currently trying to test against a QAT PF, or a QAT VF?&lt;/P&gt;&lt;P&gt;If it is a set of QAT VFs, can you also share the configuration file for the QAT PF?&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Ronny G&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Fri, 06 Sep 2024 22:43:11 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1629420#M430</guid>
      <dc:creator>Ronny_G_Intel</dc:creator>
      <dc:date>2024-09-06T22:43:11Z</dc:date>
    </item>
    <item>
      <title>Re:need to run dpdk-crypto-perf-test on Intel(R) Xeon(R) Platinum 8480+</title>
      <link>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1630801#M436</link>
      <description>&lt;P&gt;Hi JCK1,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;I need to confirm if you are currently trying to test against a QAT PF, or a QAT VF?&lt;/P&gt;&lt;P&gt;If it is a set of QAT VFs, can you also share the configuration file for the QAT PF?&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Ronny G&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Thu, 12 Sep 2024 19:45:53 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1630801#M436</guid>
      <dc:creator>Ronny_G_Intel</dc:creator>
      <dc:date>2024-09-12T19:45:53Z</dc:date>
    </item>
    <item>
      <title>Re:need to run dpdk-crypto-perf-test on Intel(R) Xeon(R) Platinum 8480+</title>
      <link>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1632016#M446</link>
      <description>&lt;P&gt;Hi JCK1,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;I hope all is well with you.&lt;/P&gt;&lt;P&gt;Do you have any update by any chance?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Ronny G&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Wed, 18 Sep 2024 15:37:29 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-QuickAssist-Technology/need-to-run-dpdk-crypto-perf-test-on-Intel-R-Xeon-R-Platinum/m-p/1632016#M446</guid>
      <dc:creator>Ronny_G_Intel</dc:creator>
      <dc:date>2024-09-18T15:37:29Z</dc:date>
    </item>
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