https://community.intel.com/t5/Analyzers/64k-Aliasing-Conflict/m-p/991904#M11276 Ruben, I noticed that you posted this question in this forum as well as the VTune Analyzer forum. I will provide an answer in the other forum.<BR /><BR />Paul Tue, 25 Feb 2003 09:36:35 GMT Paul_P_Intel1 2003-02-25T09:36:35Z https://community.intel.com/t5/Analyzers/64k-Aliasing-Conflict/m-p/991903#M11275 Hello,<BR /><BR />I have a problem. I dont understand the "64K Aliasing Conflict" in the "Intel Pentium 4 and Intel Xeon Processor Optimization (Reference manual)". I have also looked into the "VTune Performance Analyzer Help". My problem is that: in the explanation given by them, I cannot point any conflict with L1 cache. Could anybody help me? Attending to the VTune Performance Analyzer Im having serious problems with "64K Aliasing Conflicts" in my project.<BR /><BR />Thanks in advance,<BR /><BR />Ruben<BR /> Fri, 21 Feb 2003 01:45:11 GMT https://community.intel.com/t5/Analyzers/64k-Aliasing-Conflict/m-p/991903#M11275 rubendix1 2003-02-21T01:45:11Z https://community.intel.com/t5/Analyzers/64k-Aliasing-Conflict/m-p/991904#M11276 Ruben, I noticed that you posted this question in this forum as well as the VTune Analyzer forum. I will provide an answer in the other forum.<BR /><BR />Paul Tue, 25 Feb 2003 09:36:35 GMT https://community.intel.com/t5/Analyzers/64k-Aliasing-Conflict/m-p/991904#M11276 Paul_P_Intel1 2003-02-25T09:36:35Z