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    <title>topic VTune Counters Help in Analyzers</title>
    <link>https://community.intel.com/t5/Analyzers/VTune-Counters-Help/m-p/993897#M11629</link>
    <description>&lt;DIV&gt;I am looking for counters that will provide me the following.&lt;/DIV&gt;
&lt;DIV&gt;- How much front side bus is being utilized ? Basically what's the theoritical maximum rate and how much am I consuming in my app ?&lt;/DIV&gt;
&lt;DIV&gt;- What's the total duration of time being spent while the application is waiting for memory fetch ?&lt;/DIV&gt;
&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV&gt;Thanks&lt;/DIV&gt;
&lt;DIV&gt;G&lt;/DIV&gt;</description>
    <pubDate>Fri, 18 Mar 2005 07:06:00 GMT</pubDate>
    <dc:creator>gayu1</dc:creator>
    <dc:date>2005-03-18T07:06:00Z</dc:date>
    <item>
      <title>VTune Counters Help</title>
      <link>https://community.intel.com/t5/Analyzers/VTune-Counters-Help/m-p/993897#M11629</link>
      <description>&lt;DIV&gt;I am looking for counters that will provide me the following.&lt;/DIV&gt;
&lt;DIV&gt;- How much front side bus is being utilized ? Basically what's the theoritical maximum rate and how much am I consuming in my app ?&lt;/DIV&gt;
&lt;DIV&gt;- What's the total duration of time being spent while the application is waiting for memory fetch ?&lt;/DIV&gt;
&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV&gt;Thanks&lt;/DIV&gt;
&lt;DIV&gt;G&lt;/DIV&gt;</description>
      <pubDate>Fri, 18 Mar 2005 07:06:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/VTune-Counters-Help/m-p/993897#M11629</guid>
      <dc:creator>gayu1</dc:creator>
      <dc:date>2005-03-18T07:06:00Z</dc:date>
    </item>
    <item>
      <title>Re: VTune Counters Help</title>
      <link>https://community.intel.com/t5/Analyzers/VTune-Counters-Help/m-p/993898#M11630</link>
      <description>&lt;DIV&gt;I am following up on this post to see if anyone could help. On running VTune on a 3.4Ghz system, I notice the following on one particular module.&lt;/DIV&gt;
&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV&gt;Clocktick Events: 10,529,800,000&lt;/DIV&gt;
&lt;DIV&gt;Bus Data Ready from the processor events: 168,200,000&lt;/DIV&gt;
&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV&gt;Here's my analysis on this. The total time this module spends on "bus" (i.e getting data from memory onto cache) is 168,200,000/800Mhz (FSB is 800 MHz and the Bus data ready event is in bus clocks). Itturns out to be .21s. The total run was about ~4sec. Can I conclude that FSB is not being saturated because of this ? Are there any better ways to know how much of FSB is being used ?&lt;/DIV&gt;
&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV&gt;Any help is greatly appreciated.&lt;/DIV&gt;
&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV&gt;Thanks&lt;/DIV&gt;
&lt;DIV&gt;&lt;/DIV&gt;</description>
      <pubDate>Sat, 19 Mar 2005 01:21:33 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/VTune-Counters-Help/m-p/993898#M11630</guid>
      <dc:creator>gayu1</dc:creator>
      <dc:date>2005-03-19T01:21:33Z</dc:date>
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