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    <title>topic Really Helpful, Thanks a lot. in Analyzers</title>
    <link>https://community.intel.com/t5/Analyzers/Branch-Monitoring/m-p/1053315#M14324</link>
    <description>Really Helpful, Thanks a lot.</description>
    <pubDate>Wed, 14 Oct 2015 13:45:45 GMT</pubDate>
    <dc:creator>Marcus_B_</dc:creator>
    <dc:date>2015-10-14T13:45:45Z</dc:date>
    <item>
      <title>Branch Monitoring</title>
      <link>https://community.intel.com/t5/Analyzers/Branch-Monitoring/m-p/1053312#M14321</link>
      <description>Hi, I'm Marcus, I'm doing an academic research on branch monitoring using Branch Trace Store capabilities. Currently, i'm trying to implement a BTS monitor on Windows 7/8. I'm facing some challenges on such development and so I ask for any help.
I made a question on performance forum, but anyone was able to answer me, so I feel free to ask here, since Vtune uses BTS monitoring on Windows.
I intend to count taken branches within under specific conditions, so I developed a device driver to be interrupted when my DS buffer is full (threshold defined). I set up DS area properly and BTINT flag on MSR.
I checked: processor is already correctly filling my buffer. However, I don't know how to be interrupt properly.
From what I understood, processor will generate the interrupt on APIC performance counter defined vector, which, in my case, is 254. I can't register a line interrupt on 254 IRQ once it is in use by Windows APIC. I can register other IRQ numbers, but, of course, i'm not interrupted (I tested it, just for confirmation).
Any ideas of how to proceed would be very helpful

Thanks in Advance</description>
      <pubDate>Tue, 29 Sep 2015 17:10:28 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Branch-Monitoring/m-p/1053312#M14321</guid>
      <dc:creator>Marcus_B_</dc:creator>
      <dc:date>2015-09-29T17:10:28Z</dc:date>
    </item>
    <item>
      <title>I finally registered my ISR</title>
      <link>https://community.intel.com/t5/Analyzers/Branch-Monitoring/m-p/1053313#M14322</link>
      <description>I finally registered my ISR routine, but I am not being interrupted. I am looking to see if my configuration is correct.
I set DS MSR with the BTS structure, and I checked: addresses are correctly written.
I set DEBUGCTL MSR with BTS, BTINT and LBR flags. Is is enough to generate the interruption ?
Should I set something more, like MSR_PERF_GLOBAL MSR or other ?

Thanks,

Marcus</description>
      <pubDate>Tue, 13 Oct 2015 16:23:05 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Branch-Monitoring/m-p/1053313#M14322</guid>
      <dc:creator>Marcus_B_</dc:creator>
      <dc:date>2015-10-13T16:23:05Z</dc:date>
    </item>
    <item>
      <title>Hello Marcus,</title>
      <link>https://community.intel.com/t5/Analyzers/Branch-Monitoring/m-p/1053314#M14323</link>
      <description>&lt;P&gt;Hello Marcus,&lt;/P&gt;

&lt;P&gt;From VTune engineers we have the following output on the question you raised:&lt;/P&gt;

&lt;P&gt;1.&amp;nbsp;&amp;nbsp; &amp;nbsp;DEBUGCTL should have TR, BTS, and BTINT (bits 6, 7, 8) set.&lt;BR /&gt;
	2.&amp;nbsp;&amp;nbsp; &amp;nbsp;Default Windows PMI vector (0xFE) can be hooked using this function:&lt;BR /&gt;
	HalSetSystemInformation(HalProfileSourceInterruptHandler, sizeof(void*), &amp;amp;handler);&lt;BR /&gt;
	3.&amp;nbsp;&amp;nbsp; &amp;nbsp;In case interrupts stop arriving after the first PMI, you should manually unmask APIC’s PMI LVT entry in your PMI handler by writing 0xFE to IA32_X2APIC_LVT_PMI MSR (0x834) or through APIC memory, depending on your CPU version.&lt;/P&gt;

&lt;P&gt;Hope that helps,&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Thansk &amp;amp; Regards, Dmitry&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 14 Oct 2015 09:11:41 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Branch-Monitoring/m-p/1053314#M14323</guid>
      <dc:creator>Dmitry_P_Intel1</dc:creator>
      <dc:date>2015-10-14T09:11:41Z</dc:date>
    </item>
    <item>
      <title>Really Helpful, Thanks a lot.</title>
      <link>https://community.intel.com/t5/Analyzers/Branch-Monitoring/m-p/1053315#M14324</link>
      <description>Really Helpful, Thanks a lot.</description>
      <pubDate>Wed, 14 Oct 2015 13:45:45 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Branch-Monitoring/m-p/1053315#M14324</guid>
      <dc:creator>Marcus_B_</dc:creator>
      <dc:date>2015-10-14T13:45:45Z</dc:date>
    </item>
    <item>
      <title>Very helpful indeed.</title>
      <link>https://community.intel.com/t5/Analyzers/Branch-Monitoring/m-p/1053316#M14325</link>
      <description>&lt;P&gt;Very helpful indeed.&lt;/P&gt;

&lt;P&gt;But i have a problem with handler in:&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 12px; line-height: 18px;"&gt;HalSetSystemInformation(HalProfileSourceInterruptHandler, sizeof(void*), &amp;amp;handler);&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 12px; line-height: 18px;"&gt;since according to MSDN, handler should be a struct of type MCA_DRIVER_INFO. but when i do it, only the exception callback is called, and not my handler.&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 12px; line-height: 18px;"&gt;if i pass the handler directly (not via MCA_DRIVER_INFO), than i get INTERRUPT_EXCEPTION_NOT_HANDLED.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 26 Nov 2015 19:21:19 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Branch-Monitoring/m-p/1053316#M14325</guid>
      <dc:creator>Maor_H_</dc:creator>
      <dc:date>2015-11-26T19:21:19Z</dc:date>
    </item>
    <item>
      <title>In fact I did not tested this</title>
      <link>https://community.intel.com/t5/Analyzers/Branch-Monitoring/m-p/1053317#M14326</link>
      <description>In fact I did not tested this yet, but would be great to know how to make it work!</description>
      <pubDate>Mon, 30 Nov 2015 21:27:56 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Branch-Monitoring/m-p/1053317#M14326</guid>
      <dc:creator>Marcus_B_</dc:creator>
      <dc:date>2015-11-30T21:27:56Z</dc:date>
    </item>
    <item>
      <title>oh i see...</title>
      <link>https://community.intel.com/t5/Analyzers/Branch-Monitoring/m-p/1053318#M14327</link>
      <description>&lt;P&gt;oh i see...&lt;/P&gt;

&lt;P&gt;would be great to see how to make it work. up until now i only get BSODs :)&lt;/P&gt;

&lt;P&gt;i wonder what am i missing with this handler...&lt;/P&gt;</description>
      <pubDate>Tue, 01 Dec 2015 07:42:38 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Branch-Monitoring/m-p/1053318#M14327</guid>
      <dc:creator>Maor_H_</dc:creator>
      <dc:date>2015-12-01T07:42:38Z</dc:date>
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