<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re:Several questions about vtune memory access analysis in Analyzers</title>
    <link>https://community.intel.com/t5/Analyzers/Several-questions-about-vtune-memory-access-analysis/m-p/1356021#M21819</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;We assume that your issue is resolved. If you need any additional information, please post a new question as this thread will no longer be monitored by Intel.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Janani Chandran&lt;/P&gt;&lt;BR /&gt;</description>
    <pubDate>Mon, 31 Jan 2022 13:17:23 GMT</pubDate>
    <dc:creator>JananiC_Intel</dc:creator>
    <dc:date>2022-01-31T13:17:23Z</dc:date>
    <item>
      <title>Several questions about vtune memory access analysis</title>
      <link>https://community.intel.com/t5/Analyzers/Several-questions-about-vtune-memory-access-analysis/m-p/1348914#M21735</link>
      <description>&lt;P&gt;1 What is the term "Socket" in the Platform Diagram mean?&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="armorhu_2-1641440172159.png" style="width: 400px;"&gt;&lt;img src="https://community.intel.com/t5/image/serverpage/image-id/25364i0523CE55A473193E/image-size/medium/is-moderation-mode/true?v=v2&amp;amp;px=400&amp;amp;whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright" role="button" title="armorhu_2-1641440172159.png" alt="armorhu_2-1641440172159.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;2 What is&amp;nbsp; the term "Local DRAM" and "Remote DRAM" mean?&lt;LI-WRAPPER&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/LI-WRAPPER&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="armorhu_0-1641454491318.png" style="width: 400px;"&gt;&lt;img src="https://community.intel.com/t5/image/serverpage/image-id/25374i884FB4C62167B7BB/image-size/medium/is-moderation-mode/true?v=v2&amp;amp;px=400&amp;amp;whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright" role="button" title="armorhu_0-1641454491318.png" alt="armorhu_0-1641454491318.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;3&amp;nbsp;What is&amp;nbsp; the term "Package_0/1" and "Channel 0-4" mean?&lt;LI-WRAPPER&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/LI-WRAPPER&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="armorhu_1-1641454710418.png" style="width: 400px;"&gt;&lt;img src="https://community.intel.com/t5/image/serverpage/image-id/25375iA581DF6C5563FD95/image-size/medium/is-moderation-mode/true?v=v2&amp;amp;px=400&amp;amp;whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright" role="button" title="armorhu_1-1641454710418.png" alt="armorhu_1-1641454710418.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;4 What is the difference between "DRAM Bandwidth"&amp;nbsp; and "UPI Bandwidth" ?&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="armorhu_2-1641454808442.png" style="width: 400px;"&gt;&lt;img src="https://community.intel.com/t5/image/serverpage/image-id/25376iABAA63BCB8FAF75D/image-size/medium/is-moderation-mode/true?v=v2&amp;amp;px=400&amp;amp;whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright" role="button" title="armorhu_2-1641454808442.png" alt="armorhu_2-1641454808442.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;5 after I try use memory access , I found that there is no way to get memory access profile data of a certain function , I need a top down call stack organization data .&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="armorhu_4-1641440791774.png" style="width: 400px;"&gt;&lt;img src="https://community.intel.com/t5/image/serverpage/image-id/25368iC12C2B322ABF0690/image-size/medium/is-moderation-mode/true?v=v2&amp;amp;px=400&amp;amp;whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright" role="button" title="armorhu_4-1641440791774.png" alt="armorhu_4-1641440791774.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;6&amp;nbsp; In other words , is there any better tools for profile NUMA problem,which can be accurate to the specific code line and data structure, or draw all the memory addresses accessed by a piece of code , similar to this , so i can intuitivley see the problem in the code and slove it&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="armorhu_5-1641441321071.png" style="width: 400px;"&gt;&lt;img src="https://community.intel.com/t5/image/serverpage/image-id/25369i15F374A0E136780F/image-size/medium/is-moderation-mode/true?v=v2&amp;amp;px=400&amp;amp;whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright" role="button" title="armorhu_5-1641441321071.png" alt="armorhu_5-1641441321071.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 06 Jan 2022 07:40:38 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Several-questions-about-vtune-memory-access-analysis/m-p/1348914#M21735</guid>
      <dc:creator>armorhu</dc:creator>
      <dc:date>2022-01-06T07:40:38Z</dc:date>
    </item>
    <item>
      <title>Re:Several questions about vtune memory access analysis</title>
      <link>https://community.intel.com/t5/Analyzers/Several-questions-about-vtune-memory-access-analysis/m-p/1349010#M21738</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thanks for posting in Intel forums.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;We are checking on this. We will get back to you soon.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Janani Chandran&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Thu, 06 Jan 2022 12:36:47 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Several-questions-about-vtune-memory-access-analysis/m-p/1349010#M21738</guid>
      <dc:creator>JananiC_Intel</dc:creator>
      <dc:date>2022-01-06T12:36:47Z</dc:date>
    </item>
    <item>
      <title>Re: Several questions about vtune memory access analysis</title>
      <link>https://community.intel.com/t5/Analyzers/Several-questions-about-vtune-memory-access-analysis/m-p/1350681#M21766</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Sorry for the delay. Please find the below responses and let us know if you have any doubts.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;1)What is the term "Socket" in the Platform Diagram mean?&lt;/P&gt;
&lt;P&gt;Here Socket refers to cpu socket. Cpu socket is used to hold cpu in motherboard.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;2)What is&amp;nbsp;the term "Local DRAM" and "Remote DRAM" mean?&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;gt;Local DRAM metric that shows how often the CPU was stalled on loads from the local memory.&lt;/P&gt;
&lt;P&gt;&amp;gt;Remote DRAM metric that shows how often the CPU was stalled on loads from the remote memory.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;You can find this below documentation.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.intel.com/content/www/us/en/develop/documentation/vtune-help/top/analyze-performance/microarchitecture-analysis-group/memory-access-analysis.html" target="_blank" rel="noopener"&gt;https://www.intel.com/content/www/us/en/develop/documentation/vtune-help/top/analyze-performance/microarchitecture-analysis-group/memory-access-analysis.html&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;3)What is&amp;nbsp;the term "Package_0/1" and "Channel 0-4" mean?&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Package0/1 refers to socket here and the channel refers to memory channels on the system. Typically there will be many memory channels for a socket or cpu. Some configs will have 4 and some will have 8 or 16.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;4)What is the difference between "DRAM Bandwidth"&amp;nbsp;and "UPI Bandwidth" ?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;dram bandwidth-&amp;gt;They must be doubled or quadrupled to calculate the total memory bandwidth of a multiprocessor workstation or server.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;upi bandwidth-&amp;gt;There are typically two to three UPI links between CPU sockets, but this will vary by platform.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Based on processor, transfer speed will vary from model to model.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;5)after I try use memory access , I found that there is no way to get memory access profile data of a certain function , I need a top down call stack organization data .&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;To enable call stack build your application with debug and then enable call stack option by clicking the "collect stack" check box in vtune which will be available in how pane&amp;nbsp;under details section.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;6)In other words , is there any better tools for profile NUMA problem, which can be accurate to the specific code line and data structure, or draw all the memory addresses accessed by a piece of code , similar to this , so i can intuitivley see the problem in the code and solve it&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Vtune is the tool provided by Intel to profile NUMA problem. Refer the below link to know about it in detail.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.intel.com/content/www/us/en/developer/videos/how-numa-affects-your-workloads-intel-vtune-amplifier.html" target="_blank" rel="noopener"&gt;https://www.intel.com/content/www/us/en/developer/videos/how-numa-affects-your-workloads-intel-vtune-amplifier.html&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Janani Chandran&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 12 Jan 2022 06:03:49 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Several-questions-about-vtune-memory-access-analysis/m-p/1350681#M21766</guid>
      <dc:creator>JananiC_Intel</dc:creator>
      <dc:date>2022-01-12T06:03:49Z</dc:date>
    </item>
    <item>
      <title>Re: Several questions about vtune memory access analysis</title>
      <link>https://community.intel.com/t5/Analyzers/Several-questions-about-vtune-memory-access-analysis/m-p/1350806#M21770</link>
      <description>&lt;P&gt;Thanks for your Reply.&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;5)after I try use memory access , I found that there is no way to get memory access profile data of a certain function , I need a top down call stack organization data .&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;To enable call stack build your application with debug and then enable call stack option by clicking the "collect stack" check box in vtune which will be available in how pane&amp;nbsp;under details section.&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;----&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;can you give me the commandline ?&amp;nbsp; we are work in linux and no gui .&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;6) open the link i get this:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="armorhu_0-1641993778544.png" style="width: 400px;"&gt;&lt;img src="https://community.intel.com/t5/image/serverpage/image-id/25553i60FAB65F20269919/image-size/medium/is-moderation-mode/true?v=v2&amp;amp;px=400&amp;amp;whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright" role="button" title="armorhu_0-1641993778544.png" alt="armorhu_0-1641993778544.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 12 Jan 2022 13:23:46 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Several-questions-about-vtune-memory-access-analysis/m-p/1350806#M21770</guid>
      <dc:creator>armorhu</dc:creator>
      <dc:date>2022-01-12T13:23:46Z</dc:date>
    </item>
    <item>
      <title>Re:Several questions about vtune memory access analysis</title>
      <link>https://community.intel.com/t5/Analyzers/Several-questions-about-vtune-memory-access-analysis/m-p/1351476#M21776</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thanks for the update. &lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;1)To compile code with debug symbols use the below command line.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;icc  -g  &amp;lt;source.cxx&amp;gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;icc is Intel c++ compiler. You can replace it with your compiler.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;2)Regarding your video url issue, we suggest you to use google chrome to open the link as we opened from chrome and it was working.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Hope this helps!&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Janani Chandran&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Fri, 14 Jan 2022 11:42:56 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Several-questions-about-vtune-memory-access-analysis/m-p/1351476#M21776</guid>
      <dc:creator>JananiC_Intel</dc:creator>
      <dc:date>2022-01-14T11:42:56Z</dc:date>
    </item>
    <item>
      <title>Re:Several questions about vtune memory access analysis</title>
      <link>https://community.intel.com/t5/Analyzers/Several-questions-about-vtune-memory-access-analysis/m-p/1354314#M21796</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Is your issue resolved? Do you have any update?&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Janani Chandran&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Tue, 25 Jan 2022 05:40:17 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Several-questions-about-vtune-memory-access-analysis/m-p/1354314#M21796</guid>
      <dc:creator>JananiC_Intel</dc:creator>
      <dc:date>2022-01-25T05:40:17Z</dc:date>
    </item>
    <item>
      <title>Re:Several questions about vtune memory access analysis</title>
      <link>https://community.intel.com/t5/Analyzers/Several-questions-about-vtune-memory-access-analysis/m-p/1356021#M21819</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;We assume that your issue is resolved. If you need any additional information, please post a new question as this thread will no longer be monitored by Intel.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Janani Chandran&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Mon, 31 Jan 2022 13:17:23 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Several-questions-about-vtune-memory-access-analysis/m-p/1356021#M21819</guid>
      <dc:creator>JananiC_Intel</dc:creator>
      <dc:date>2022-01-31T13:17:23Z</dc:date>
    </item>
  </channel>
</rss>

