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    <title>topic Re:vtune top down microarchitecture metrics in Analyzers</title>
    <link>https://community.intel.com/t5/Analyzers/vtune-top-down-microarchitecture-metrics/m-p/1424779#M22637</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;We have not heard back from you. Could you please give us an update?&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;BR /&gt;</description>
    <pubDate>Tue, 25 Oct 2022 09:35:43 GMT</pubDate>
    <dc:creator>AthiraM_Intel</dc:creator>
    <dc:date>2022-10-25T09:35:43Z</dc:date>
    <item>
      <title>vtune top down microarchitecture metrics</title>
      <link>https://community.intel.com/t5/Analyzers/vtune-top-down-microarchitecture-metrics/m-p/1417517#M22579</link>
      <description>&lt;P&gt;I&amp;nbsp;&lt;SPAN&gt;multiple runs&lt;/SPAN&gt; the application many times to make sure the vtune collection time was long enough. The sum of Retiring,Front-End Bound,Bad Speculation,Back-End Bound of many functions in the collected results is over 100% a lot. Why?&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="zytsnlz_0-1664248114932.png" style="width: 400px;"&gt;&lt;img src="https://community.intel.com/t5/image/serverpage/image-id/33674iA5DB2E24BFF3399C/image-size/medium/is-moderation-mode/true?v=v2&amp;amp;px=400&amp;amp;whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright" role="button" title="zytsnlz_0-1664248114932.png" alt="zytsnlz_0-1664248114932.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 27 Sep 2022 09:12:57 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/vtune-top-down-microarchitecture-metrics/m-p/1417517#M22579</guid>
      <dc:creator>zytsnlz</dc:creator>
      <dc:date>2022-09-27T09:12:57Z</dc:date>
    </item>
    <item>
      <title>Re:vtune top down microarchitecture metrics</title>
      <link>https://community.intel.com/t5/Analyzers/vtune-top-down-microarchitecture-metrics/m-p/1417633#M22591</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thank you for posting in Intel Communities.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;We have observed the same issue and we are checking on this internally.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Meanwhile could you please share the below details:&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt; OS details&lt;/LI&gt;&lt;LI&gt;VTune version&lt;/LI&gt;&lt;LI&gt;Hardware details&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Tue, 27 Sep 2022 11:11:15 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/vtune-top-down-microarchitecture-metrics/m-p/1417633#M22591</guid>
      <dc:creator>AthiraM_Intel</dc:creator>
      <dc:date>2022-09-27T11:11:15Z</dc:date>
    </item>
    <item>
      <title>Re: Re:vtune top down microarchitecture metrics</title>
      <link>https://community.intel.com/t5/Analyzers/vtune-top-down-microarchitecture-metrics/m-p/1417647#M22594</link>
      <description>&lt;P&gt;OS details&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; Linux ICT-01 4.18.0-147.5.1.6.h605.eulerosv2r9.x86_64 #1 SMP Wed Nov 10 09:00:30 UTC 2021 x86_64 x86_64 x86_64 GNU/Linux&lt;/P&gt;
&lt;P&gt;VTune version&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;vtune_profiler_2022.3.0.624050&lt;/P&gt;
&lt;P&gt;Hardware details&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="zytsnlz_0-1664278789845.png" style="width: 400px;"&gt;&lt;img src="https://community.intel.com/t5/image/serverpage/image-id/33692i1969E233ADD79ED2/image-size/medium/is-moderation-mode/true?v=v2&amp;amp;px=400&amp;amp;whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright" role="button" title="zytsnlz_0-1664278789845.png" alt="zytsnlz_0-1664278789845.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="zytsnlz_1-1664279586150.png" style="width: 400px;"&gt;&lt;img src="https://community.intel.com/t5/image/serverpage/image-id/33693iCCE6E9BEC07AA939/image-size/medium/is-moderation-mode/true?v=v2&amp;amp;px=400&amp;amp;whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright" role="button" title="zytsnlz_1-1664279586150.png" alt="zytsnlz_1-1664279586150.png" /&gt;&lt;/span&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 27 Sep 2022 12:31:16 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/vtune-top-down-microarchitecture-metrics/m-p/1417647#M22594</guid>
      <dc:creator>zytsnlz</dc:creator>
      <dc:date>2022-09-27T12:31:16Z</dc:date>
    </item>
    <item>
      <title>Re:vtune top down microarchitecture metrics</title>
      <link>https://community.intel.com/t5/Analyzers/vtune-top-down-microarchitecture-metrics/m-p/1418225#M22597</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thanks for sharing the details. We are working on this internally. We will get back to you with an update.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Thu, 29 Sep 2022 06:57:28 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/vtune-top-down-microarchitecture-metrics/m-p/1418225#M22597</guid>
      <dc:creator>AthiraM_Intel</dc:creator>
      <dc:date>2022-09-29T06:57:28Z</dc:date>
    </item>
    <item>
      <title>Re:vtune top down microarchitecture metrics</title>
      <link>https://community.intel.com/t5/Analyzers/vtune-top-down-microarchitecture-metrics/m-p/1422900#M22623</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thank you for your patience.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;&amp;gt;&amp;nbsp;The sum of Retiring,Front-End Bound,Bad Speculation,Back-End Bound of many functions in the collected results is over 100% a lot. Why?&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;This can happen due to the nature of sampling methodology VTune take. In general, sampling methodology will not be able to provide 100% accurate data. Due to the complexities of implementation to cause underestimates or overestimates, use multiple runs option could help approximate more accurate data. In general, the statistical portions of pipeline categories classifications would be meaningful data to try categorizing the performance bottleneck problems.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Hope this clarifies your query. &lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Tue, 18 Oct 2022 10:03:49 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/vtune-top-down-microarchitecture-metrics/m-p/1422900#M22623</guid>
      <dc:creator>AthiraM_Intel</dc:creator>
      <dc:date>2022-10-18T10:03:49Z</dc:date>
    </item>
    <item>
      <title>Re:vtune top down microarchitecture metrics</title>
      <link>https://community.intel.com/t5/Analyzers/vtune-top-down-microarchitecture-metrics/m-p/1424779#M22637</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;We have not heard back from you. Could you please give us an update?&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Tue, 25 Oct 2022 09:35:43 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/vtune-top-down-microarchitecture-metrics/m-p/1424779#M22637</guid>
      <dc:creator>AthiraM_Intel</dc:creator>
      <dc:date>2022-10-25T09:35:43Z</dc:date>
    </item>
    <item>
      <title>Re:vtune top down microarchitecture metrics</title>
      <link>https://community.intel.com/t5/Analyzers/vtune-top-down-microarchitecture-metrics/m-p/1426659#M22656</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;We have not heard back from you. This thread will no longer be monitored by Intel. If you need further assistance, please post a new question.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Tue, 01 Nov 2022 04:45:12 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/vtune-top-down-microarchitecture-metrics/m-p/1426659#M22656</guid>
      <dc:creator>AthiraM_Intel</dc:creator>
      <dc:date>2022-11-01T04:45:12Z</dc:date>
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