<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: PCI Express 6.x Retimer specification Question about UIO in Analyzers</title>
    <link>https://community.intel.com/t5/Analyzers/PCI-Express-6-x-Retimer-specification-Question-about-UIO/m-p/1658208#M25541</link>
    <description>&lt;P&gt;Is this related pcie issue? If so, you can get help from the pcie forum:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.intel.com/t5/tag/PCIe/tg-p/tag-id/27" target="_blank"&gt;https://community.intel.com/t5/tag/PCIe/tg-p/tag-id/27&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Sat, 18 Jan 2025 13:13:44 GMT</pubDate>
    <dc:creator>yuzhang3_intel</dc:creator>
    <dc:date>2025-01-18T13:13:44Z</dc:date>
    <item>
      <title>PCI Express 6.x Retimer specification Question about UIO</title>
      <link>https://community.intel.com/t5/Analyzers/PCI-Express-6-x-Retimer-specification-Question-about-UIO/m-p/1657935#M25539</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; The PCIe Express 6.0 Retimer Supplemental Features and Standard BGA Footprint Specification Revision 1.0 mentioned that retimer supports Unordered IO (UIO) is required.&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; But UIO is not physical layer aware, can you help to point out what retimer need to do to support UIO?&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; Many thanks.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;BR,&lt;/P&gt;&lt;P&gt;Jerry&lt;/P&gt;</description>
      <pubDate>Fri, 17 Jan 2025 07:27:24 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/PCI-Express-6-x-Retimer-specification-Question-about-UIO/m-p/1657935#M25539</guid>
      <dc:creator>chingjui_hsiao</dc:creator>
      <dc:date>2025-01-17T07:27:24Z</dc:date>
    </item>
    <item>
      <title>Re: PCI Express 6.x Retimer specification Question about UIO</title>
      <link>https://community.intel.com/t5/Analyzers/PCI-Express-6-x-Retimer-specification-Question-about-UIO/m-p/1658208#M25541</link>
      <description>&lt;P&gt;Is this related pcie issue? If so, you can get help from the pcie forum:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.intel.com/t5/tag/PCIe/tg-p/tag-id/27" target="_blank"&gt;https://community.intel.com/t5/tag/PCIe/tg-p/tag-id/27&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sat, 18 Jan 2025 13:13:44 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/PCI-Express-6-x-Retimer-specification-Question-about-UIO/m-p/1658208#M25541</guid>
      <dc:creator>yuzhang3_intel</dc:creator>
      <dc:date>2025-01-18T13:13:44Z</dc:date>
    </item>
    <item>
      <title>Re: PCI Express 6.x Retimer specification Question about UIO</title>
      <link>https://community.intel.com/t5/Analyzers/PCI-Express-6-x-Retimer-specification-Question-about-UIO/m-p/1658451#M25545</link>
      <description>&lt;P&gt;This issue is related to the following spec that Intel published.&lt;/P&gt;&lt;P&gt;"&lt;SPAN&gt;PCIe Express 6.0 Retimer Supplemental Features and Standard BGA Footprint Specification Revision 1.0&lt;/SPAN&gt;"&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I did review the forum but nothing found related.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 20 Jan 2025 02:05:35 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/PCI-Express-6-x-Retimer-specification-Question-about-UIO/m-p/1658451#M25545</guid>
      <dc:creator>chingjui_hsiao</dc:creator>
      <dc:date>2025-01-20T02:05:35Z</dc:date>
    </item>
  </channel>
</rss>

