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    <title>topic Concurrency Problem with Intel MKL BLAS in Analyzers</title>
    <link>https://community.intel.com/t5/Analyzers/Concurrency-Problem-with-Intel-MKL-BLAS/m-p/830794#M2623</link>
    <description>Just one more question :&lt;DIV&gt;Will changing my code to C benefit the speed in any way ?&lt;/DIV&gt;</description>
    <pubDate>Sat, 17 Sep 2011 11:04:33 GMT</pubDate>
    <dc:creator>nunoxic</dc:creator>
    <dc:date>2011-09-17T11:04:33Z</dc:date>
    <item>
      <title>Concurrency Problem with Intel MKL BLAS</title>
      <link>https://community.intel.com/t5/Analyzers/Concurrency-Problem-with-Intel-MKL-BLAS/m-p/830787#M2616</link>
      <description>I am implementing a code (Iterative Matrix Solver : Language is Fortran) which basically works like this :&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;while (error &amp;lt; tolerance OR iterations &amp;lt; max iterations)&lt;/DIV&gt;&lt;DIV&gt;{&lt;/DIV&gt;&lt;DIV&gt;Few DGEMV&lt;/DIV&gt;&lt;DIV&gt;Few DDOT&lt;/DIV&gt;&lt;DIV&gt;Few DNRM&lt;/DIV&gt;&lt;DIV&gt;}&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;The problem is as follows :&lt;/DIV&gt;&lt;DIV&gt;1. The time required for solving increases erratically with the increase in number of threads.&lt;/DIV&gt;&lt;DIV&gt;I put it in a loop which works like (Not actual code)&lt;/DIV&gt;&lt;DIV&gt;export MKL_DYNAMIC=FALSE&lt;/DIV&gt;&lt;DIV&gt;for i=1 to 8&lt;/DIV&gt;&lt;DIV&gt;export MKL_NUM_THREADS=i&lt;/DIV&gt;&lt;DIV&gt;end&lt;/DIV&gt;&lt;DIV&gt;The CPU usage is in accordance with the number of threads at all times (For instance, 200% for 2 threads, 800% for 8 threads etc.) but the lowest time (and hence best performance) is observed at 2 Threads which is bothering me.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;2. I am linking my program as :&lt;/DIV&gt;&lt;DIV&gt;ifort -fp-model source ParaQMR.f90 -xSSE3 -lmkl_blas95 -lmkl_intel -lmkl_intel_thread -lmkl_core -liomp5 -lpthread -m32 &amp;amp;&amp;amp; time ./a.out&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;(I can attach the source code but it will be of no real use since the code reads data from a 2 GB text file which obviously I can't upload)&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;My hardware is Intel Xeon with 8 cores 8 threads. (32 bit Ubuntu 10.04 &amp;lt; I know 32 bit is a mistake but I doubt it will make a difference)&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;3. I tried VTune and although I am not a computer major or something, I tried my level best at interpreting the results and what I feel from the graph below is that most of the the time is spent creating and destroying threads each time a new iteration starts. But I am not so sure. Is there any way to circumvent this problem ?&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;I tried everything but nothing seems to work&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;I have tried :&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;1. Using my own Matrix-Vector Multiplication code. It suffers immensely when compared to MKL BLAS.&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;2. Intel Inspector. Didn't seem to make head or tail of what was happening.&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;3. Experiment with different flags, compiler (gfortran), gfortran and -fopenmp tag instead etc. Didn't work.&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;(By didn't work I mean, didn't produce the decrease in time as I expected)&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;IMG src="http://oi51.tinypic.com/xbcuav.jpg" width="799" height="449" /&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;IMG src="http://oi53.tinypic.com/33jjvdc.jpg" width="799" height="449" /&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;IMG src="http://oi52.tinypic.com/smagba.jpg" width="799" height="449" /&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;IMG src="http://oi52.tinypic.com/2hs6uza.jpg" width="799" height="449" /&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;Please help me out and let me know if I should upload more VTune Graphs.&lt;/DIV&gt;</description>
      <pubDate>Wed, 14 Sep 2011 15:14:56 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Concurrency-Problem-with-Intel-MKL-BLAS/m-p/830787#M2616</guid>
      <dc:creator>nunoxic</dc:creator>
      <dc:date>2011-09-14T15:14:56Z</dc:date>
    </item>
    <item>
      <title>Concurrency Problem with Intel MKL BLAS</title>
      <link>https://community.intel.com/t5/Analyzers/Concurrency-Problem-with-Intel-MKL-BLAS/m-p/830788#M2617</link>
      <description>Following comments might be more topical and get more expert suggestions on the MKL forum:&lt;BR /&gt;By resetting MKL_DYNAMIC, I believe you are disabling MKL's own effort to place threads efficiently, so you should be setting KMP_AFFINITY or MKL equivalent directly for each number of threads, according to your platform. Probably 1 thread per CPU, if a dual CPU, for 2 threads, 1 thread per cache, if a split cache CPU; never 2 threads per core when other cores are idle, ....&lt;BR /&gt;As you are using dgemv, you might expect performance to drop as soon as you run 2 threads each on 1 or more cores; are you trying to quantify that?&lt;BR /&gt;If your cache footprint is very large, it is possible to see your performance peak as soon as you have enough threads to use all of the cache. In such a case, VTune cache events could clarify it.</description>
      <pubDate>Wed, 14 Sep 2011 16:58:36 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Concurrency-Problem-with-Intel-MKL-BLAS/m-p/830788#M2617</guid>
      <dc:creator>TimP</dc:creator>
      <dc:date>2011-09-14T16:58:36Z</dc:date>
    </item>
    <item>
      <title>Concurrency Problem with Intel MKL BLAS</title>
      <link>https://community.intel.com/t5/Analyzers/Concurrency-Problem-with-Intel-MKL-BLAS/m-p/830789#M2618</link>
      <description>I used KMP_AFFINITY and set it as :&lt;DIV&gt;export MKL_DYNAMIC=FALSE&lt;/DIV&gt;&lt;DIV&gt;export MKL_NUM_THREADS=8&lt;/DIV&gt;&lt;DIV&gt;export KMP_AFFINITY="verbose,granularity=fine,proclist=[0,1,2,3,4,5,6,7],explicit"&lt;/DIV&gt;&lt;DIV&gt;ifort blah blah&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;It didn't help. As far as I know, cache was being managed optimally and a second thread was not started on any core if another core was sitting idle.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;I still belive that what is happening is&lt;/DIV&gt;&lt;DIV&gt;it = 0&lt;/DIV&gt;&lt;DIV&gt;create threads &amp;gt; carry out dgemv &amp;gt; destroy threads&lt;/DIV&gt;&lt;DIV&gt;&lt;META http-equiv="content-type" content="text/html; charset=utf-8" /&gt;create threads &amp;gt; carry out ddot &amp;gt; destroy threads&lt;/DIV&gt;&lt;DIV&gt;&lt;META http-equiv="content-type" content="text/html; charset=utf-8" /&gt;create threads &amp;gt; carry out dnrm &amp;gt; destroy threads&lt;/DIV&gt;&lt;DIV&gt;it = 1&lt;/DIV&gt;&lt;DIV&gt;create threads &amp;gt; carry out dgemv &amp;gt; destroy threads&lt;/DIV&gt;&lt;DIV&gt;.&lt;/DIV&gt;&lt;DIV&gt;.&lt;/DIV&gt;&lt;DIV&gt;.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Can this be the problem ? If yes, Can this be avoided ?&lt;/DIV&gt;</description>
      <pubDate>Wed, 14 Sep 2011 17:43:48 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Concurrency-Problem-with-Intel-MKL-BLAS/m-p/830789#M2618</guid>
      <dc:creator>nunoxic</dc:creator>
      <dc:date>2011-09-14T17:43:48Z</dc:date>
    </item>
    <item>
      <title>Concurrency Problem with Intel MKL BLAS</title>
      <link>https://community.intel.com/t5/Analyzers/Concurrency-Problem-with-Intel-MKL-BLAS/m-p/830790#M2619</link>
      <description>&lt;P&gt;Hi, &lt;/P&gt;&lt;P&gt;Have you tried export MKL_DYNAMIC=TRUE&lt;/P&gt;&lt;P&gt;It will suggest MKl to choose the good the threading number for the problem. As Tim noted, for the DGEMV, DDOT function, increasing the threading number may not improve the performance. If MKL_DYNAMIC is FALSE, it will force MKL to the threading you set. &lt;/P&gt;&lt;P&gt;Thanks,&lt;BR /&gt;Chao&lt;/P&gt;</description>
      <pubDate>Thu, 15 Sep 2011 03:30:50 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Concurrency-Problem-with-Intel-MKL-BLAS/m-p/830790#M2619</guid>
      <dc:creator>Chao_Y_Intel</dc:creator>
      <dc:date>2011-09-15T03:30:50Z</dc:date>
    </item>
    <item>
      <title>Concurrency Problem with Intel MKL BLAS</title>
      <link>https://community.intel.com/t5/Analyzers/Concurrency-Problem-with-Intel-MKL-BLAS/m-p/830791#M2620</link>
      <description>Hi,&lt;BR /&gt;&lt;BR /&gt;Overheadon joining OMP-threads can be significant if your data-volume in MKL functions is notbig enough.&lt;BR /&gt;IsSMT (hyper-threading) on?&lt;BR /&gt;So that 8 CPUs means: 4-cores with hyper-threading. Please clarify.</description>
      <pubDate>Thu, 15 Sep 2011 09:07:36 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Concurrency-Problem-with-Intel-MKL-BLAS/m-p/830791#M2620</guid>
      <dc:creator>barragan_villanueva_</dc:creator>
      <dc:date>2011-09-15T09:07:36Z</dc:date>
    </item>
    <item>
      <title>Concurrency Problem with Intel MKL BLAS</title>
      <link>https://community.intel.com/t5/Analyzers/Concurrency-Problem-with-Intel-MKL-BLAS/m-p/830792#M2621</link>
      <description>I didn't get your point on joining OMP threads. I have a 10000x10000 matrix being multiplied with a 10000x1 vector.&lt;DIV&gt;I don't think SMT is on (I googled and it gave me results related to BIOS settings which I swore never to fiddle with), the only settings I tweaked with are the ones mentioned (MKL_NUM_THREADS and MKL_DYNAMIC and more recently KMP_AFFINITY)&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Also,&lt;/DIV&gt;&lt;DIV&gt;MKL_DYNAMIC=TRUE uses 2 threads most of the times which is irritating since my goal is to create a code which uses max. system resources.&lt;/DIV&gt;</description>
      <pubDate>Thu, 15 Sep 2011 10:45:10 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Concurrency-Problem-with-Intel-MKL-BLAS/m-p/830792#M2621</guid>
      <dc:creator>nunoxic</dc:creator>
      <dc:date>2011-09-15T10:45:10Z</dc:date>
    </item>
    <item>
      <title>Concurrency Problem with Intel MKL BLAS</title>
      <link>https://community.intel.com/t5/Analyzers/Concurrency-Problem-with-Intel-MKL-BLAS/m-p/830793#M2622</link>
      <description>To see SMT setting from libiomp5 please add `verbose' to your KMP_AFFINITY setting:&lt;BR /&gt; KMP_AFFINITY=verbose,$KMP_AFFINITY&lt;BR /&gt;If logical thread is bound tonot oneCPUs (likely two) then SMT is ON.&lt;BR /&gt;&lt;BR /&gt;Also please look at related MKL articles/discussions:&lt;BR /&gt; &lt;A href="http://software.intel.com/en-us/articles/intel-math-kernel-library-intel-mkl-intel-mkl-100-threading/"&gt;http://software.intel.com/en-us/articles/intel-math-kernel-library-intel-mkl-intel-mkl-100-threading/&lt;/A&gt;&lt;BR /&gt; &lt;A href="http://software.intel.com/en-us/articles/setting-thread-affinity-on-smt-or-ht-enabled-systems/"&gt;http://software.intel.com/en-us/articles/setting-thread-affinity-on-smt-or-ht-enabled-systems/&lt;/A&gt;&lt;BR /&gt; &lt;A href="http://software.intel.com/en-us/forums/showthread.php?t=68141"&gt;http://software.intel.com/en-us/forums/showthread.php?t=68141&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;P&gt;&lt;STRONG&gt;BTW&lt;/STRONG&gt;, If Hyper-Threading technology is enabled on the systems, it is recommended that the threading numbers be set equal to the number of real processors or cores. That is only half number of the logical processors.&lt;/P&gt;&lt;BR /&gt;&lt;BR /&gt;</description>
      <pubDate>Fri, 16 Sep 2011 06:08:52 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Concurrency-Problem-with-Intel-MKL-BLAS/m-p/830793#M2622</guid>
      <dc:creator>barragan_villanueva_</dc:creator>
      <dc:date>2011-09-16T06:08:52Z</dc:date>
    </item>
    <item>
      <title>Concurrency Problem with Intel MKL BLAS</title>
      <link>https://community.intel.com/t5/Analyzers/Concurrency-Problem-with-Intel-MKL-BLAS/m-p/830794#M2623</link>
      <description>Just one more question :&lt;DIV&gt;Will changing my code to C benefit the speed in any way ?&lt;/DIV&gt;</description>
      <pubDate>Sat, 17 Sep 2011 11:04:33 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Concurrency-Problem-with-Intel-MKL-BLAS/m-p/830794#M2623</guid>
      <dc:creator>nunoxic</dc:creator>
      <dc:date>2011-09-17T11:04:33Z</dc:date>
    </item>
    <item>
      <title>Concurrency Problem with Intel MKL BLAS</title>
      <link>https://community.intel.com/t5/Analyzers/Concurrency-Problem-with-Intel-MKL-BLAS/m-p/830795#M2624</link>
      <description>&lt;DIV id="tiny_quote"&gt;
                &lt;DIV style="margin-left: 2px; margin-right: 2px;"&gt;Quoting &lt;A rel="/en-us/services/profile/quick_profile.php?is_paid=&amp;amp;user_id=523892" class="basic" href="https://community.intel.com/en-us/profile/523892/"&gt;nunoxic&lt;/A&gt;&lt;/DIV&gt;
                &lt;DIV style="background-color: #e5e5e5; padding: 5px; border: 1px; border-style: inset; margin-left: 2px; margin-right: 2px;"&gt;&lt;I&gt;&lt;BR /&gt;&lt;DIV&gt;Will changing my code to C benefit the speed in any way ?&lt;/DIV&gt;&lt;/I&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;Unlikely from what you have said so far.&lt;/P&gt;</description>
      <pubDate>Sat, 17 Sep 2011 14:55:12 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Concurrency-Problem-with-Intel-MKL-BLAS/m-p/830795#M2624</guid>
      <dc:creator>TimP</dc:creator>
      <dc:date>2011-09-17T14:55:12Z</dc:date>
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