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    <title>topic Re: Thread checker interlocked and volatile in Analyzers</title>
    <link>https://community.intel.com/t5/Analyzers/Thread-checker-interlocked-and-volatile/m-p/863740#M3477</link>
    <description>&lt;DIV style="margin:0px;"&gt;&lt;/DIV&gt;
Hi Marcel:&lt;BR /&gt;&lt;BR /&gt;
&lt;P class="MsoNormal"&gt;&lt;SPAN style="font-family: Arial; color: navy; font-size: x-small;"&gt;&lt;SPAN style="font-size: 10pt; color: navy; font-family: Arial;"&gt;Both accesses in  Thread1() and Thread2a() are lock-prefixed, so there is no conflict. The access in Thread2b() is  not lock-prefixed.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="MsoNormal"&gt;&lt;SPAN style="font-family: Arial; color: navy; font-size: x-small;"&gt;&lt;SPAN style="font-size: 10pt; color: navy; font-family: Arial;"&gt;Thread Checker reports a conflict when one of the accesses is locked but the other is not.  (regardless of hardware semantics)&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="MsoNormal"&gt;&lt;SPAN style="font-family: Arial; color: navy; font-size: x-small;"&gt;&lt;SPAN style="font-size: 10pt; color: navy; font-family: Arial;"&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Mon, 13 Apr 2009 20:07:49 GMT</pubDate>
    <dc:creator>David_A_Intel1</dc:creator>
    <dc:date>2009-04-13T20:07:49Z</dc:date>
    <item>
      <title>Thread checker interlocked and volatile</title>
      <link>https://community.intel.com/t5/Analyzers/Thread-checker-interlocked-and-volatile/m-p/863739#M3476</link>
      <description>HI,&lt;BR /&gt;&lt;BR /&gt;I'm currently evaluating Thread Checker and I have a question. In our software we use a Software Transactional Memory implementation (STM) that uses InterlockedCompareExchange a lot in combination with volatile pointers. This to my knowledge should workOK on x86 and x64 architectures in combination with VS2005. The checker warns about write -&amp;gt; read data races, which in itself is OK, but we know itwill not lead to problems in our code. The thing that surprises me is that the same code when also using interlockeds to read the pointers (but more than ten times as slow) does not give these warnings. Is there an explanation for this?&lt;BR /&gt;&lt;BR /&gt;To ilustrate the problem:&lt;BR /&gt;&lt;BR /&gt;static volatile int number;&lt;BR /&gt;&lt;BR /&gt;void Thread1()&lt;BR /&gt;{&lt;BR /&gt; ::InterlockedIncrement((LONG volatile*)(&amp;amp;number));&lt;BR /&gt;}&lt;BR /&gt;&lt;BR /&gt;void Thread2a() //does not give warnings&lt;BR /&gt;{&lt;BR /&gt; cout &amp;lt;&amp;lt; ::InterlockedCompareExchange((LONG volatile*)(&amp;amp;number), 0, 0) &amp;lt;&amp;lt; endl;&lt;BR /&gt;}&lt;BR /&gt;&lt;BR /&gt;void Thread2b() //does give warnings&lt;BR /&gt;{&lt;BR /&gt; cout &amp;lt;&amp;lt; number &amp;lt;&amp;lt; endl;&lt;BR /&gt;}&lt;BR /&gt;&lt;BR /&gt;When using thread1 in combination with thread 2a I do not get any warnings, when I use thread2b I do.&lt;BR /&gt;I know this will only work (and be faster) on certain processors icw certain compilers.&lt;BR /&gt;&lt;BR /&gt;Kind regards,&lt;BR /&gt;&lt;BR /&gt;Marcel Fransen</description>
      <pubDate>Wed, 08 Apr 2009 11:39:22 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Thread-checker-interlocked-and-volatile/m-p/863739#M3476</guid>
      <dc:creator>mfransen</dc:creator>
      <dc:date>2009-04-08T11:39:22Z</dc:date>
    </item>
    <item>
      <title>Re: Thread checker interlocked and volatile</title>
      <link>https://community.intel.com/t5/Analyzers/Thread-checker-interlocked-and-volatile/m-p/863740#M3477</link>
      <description>&lt;DIV style="margin:0px;"&gt;&lt;/DIV&gt;
Hi Marcel:&lt;BR /&gt;&lt;BR /&gt;
&lt;P class="MsoNormal"&gt;&lt;SPAN style="font-family: Arial; color: navy; font-size: x-small;"&gt;&lt;SPAN style="font-size: 10pt; color: navy; font-family: Arial;"&gt;Both accesses in  Thread1() and Thread2a() are lock-prefixed, so there is no conflict. The access in Thread2b() is  not lock-prefixed.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="MsoNormal"&gt;&lt;SPAN style="font-family: Arial; color: navy; font-size: x-small;"&gt;&lt;SPAN style="font-size: 10pt; color: navy; font-family: Arial;"&gt;Thread Checker reports a conflict when one of the accesses is locked but the other is not.  (regardless of hardware semantics)&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P class="MsoNormal"&gt;&lt;SPAN style="font-family: Arial; color: navy; font-size: x-small;"&gt;&lt;SPAN style="font-size: 10pt; color: navy; font-family: Arial;"&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 13 Apr 2009 20:07:49 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Thread-checker-interlocked-and-volatile/m-p/863740#M3477</guid>
      <dc:creator>David_A_Intel1</dc:creator>
      <dc:date>2009-04-13T20:07:49Z</dc:date>
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