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    <title>topic CPU Utilization &amp; Events Analysis. in Analyzers</title>
    <link>https://community.intel.com/t5/Analyzers/CPU-Utilization-Events-Analysis/m-p/868375#M3707</link>
    <description>Hi.&lt;BR /&gt;&lt;BR /&gt;I had used VTune(v-9.1) to understand EBS for a large exe (1180972 in size), If  I see the "Activity Summary by Core", I get below informaation -&lt;BR /&gt;&lt;BR /&gt;CPU ID             Idle time&lt;BR /&gt;0                         0.09%&lt;BR /&gt;1                         68.92%&lt;BR /&gt;2                         72.51%&lt;BR /&gt;3                         88.89%&lt;BR /&gt;4                         70.33%&lt;BR /&gt;5                         33.56%&lt;BR /&gt;6 66.47%&lt;BR /&gt;7                         35.92%&lt;BR /&gt;&lt;BR /&gt;The processor is Quad-Core Intel Xeon Processor 5300 Series &amp;amp; the architecture  is IA-32.&lt;BR /&gt;&lt;BR /&gt;I have following queries -&lt;BR /&gt;(a) Why I get different CPU utilization for all 8 cores? &lt;BR /&gt;&lt;BR /&gt;(b) How do I interpret each below events information -&lt;BR /&gt; Event                                                                                    Scale                       SAV                      Total Samples                       Duration&lt;BR /&gt; RS_UOPS_DISPATCHED.CYCLES_NONE                                               1e-10                  2,000,000                         75139                                10.397&lt;BR /&gt; CPU_CLK_UNHALTED.CORE                                                                    1e-09                  2,666,000                        11673                                 10.343&lt;BR /&gt; MEM_LOAD_RETIRED.L2_LINE_MISS                                                      0.0001                100,000                                8                                    10.327&lt;BR /&gt; MEM_LOAD_RETIRED.L1D_LINE_MISS                                                   1e-06 100,000                              973 10.269&lt;BR /&gt; MEM_LOAD_RETIRED.DTLB_MISS                                                          1e-05                   10,000                               189                                   10.372&lt;BR /&gt; DTLB_MISSES_ANY 1e-06                  10,000 2133                                   10.372&lt;BR /&gt; BR_INST_RETIRED.ANY                                                                            1e-09                   1,000,000 5987                                  10.343&lt;BR /&gt; INST_RETIRED 1e-09                   1,000,000                        12,837                                10.343&lt;BR /&gt;&lt;BR /&gt;Please do suggest what could be the &lt;STRONG&gt;optimal SAV&lt;/STRONG&gt; for each events, such that one can have better performances with above values?&lt;BR /&gt;&lt;BR /&gt;(c) My code involves too many &lt;STRONG&gt;doubles intensive datatypes&lt;/STRONG&gt;, which event will give component of stalls associated with FLOAT/DOUBLE  operations for assisting denormals and such?&lt;BR /&gt;&lt;BR /&gt;(d) What is the meaning of different values for Ring 0 &amp;amp; Ring 3?&lt;BR /&gt;&lt;BR /&gt;(e) I see high BUS UTILIZATION when compiler does auto-vectorization, how do I minimize this with CPI?&lt;BR /&gt;&lt;BR /&gt;&lt;STRONG&gt;Note&lt;/STRONG&gt;: I have already auto-vectorized the code using pragmas. &lt;BR /&gt;&lt;BR /&gt;~BR&lt;BR /&gt;</description>
    <pubDate>Mon, 12 Jan 2009 09:32:51 GMT</pubDate>
    <dc:creator>srimks</dc:creator>
    <dc:date>2009-01-12T09:32:51Z</dc:date>
    <item>
      <title>CPU Utilization &amp; Events Analysis.</title>
      <link>https://community.intel.com/t5/Analyzers/CPU-Utilization-Events-Analysis/m-p/868375#M3707</link>
      <description>Hi.&lt;BR /&gt;&lt;BR /&gt;I had used VTune(v-9.1) to understand EBS for a large exe (1180972 in size), If  I see the "Activity Summary by Core", I get below informaation -&lt;BR /&gt;&lt;BR /&gt;CPU ID             Idle time&lt;BR /&gt;0                         0.09%&lt;BR /&gt;1                         68.92%&lt;BR /&gt;2                         72.51%&lt;BR /&gt;3                         88.89%&lt;BR /&gt;4                         70.33%&lt;BR /&gt;5                         33.56%&lt;BR /&gt;6 66.47%&lt;BR /&gt;7                         35.92%&lt;BR /&gt;&lt;BR /&gt;The processor is Quad-Core Intel Xeon Processor 5300 Series &amp;amp; the architecture  is IA-32.&lt;BR /&gt;&lt;BR /&gt;I have following queries -&lt;BR /&gt;(a) Why I get different CPU utilization for all 8 cores? &lt;BR /&gt;&lt;BR /&gt;(b) How do I interpret each below events information -&lt;BR /&gt; Event                                                                                    Scale                       SAV                      Total Samples                       Duration&lt;BR /&gt; RS_UOPS_DISPATCHED.CYCLES_NONE                                               1e-10                  2,000,000                         75139                                10.397&lt;BR /&gt; CPU_CLK_UNHALTED.CORE                                                                    1e-09                  2,666,000                        11673                                 10.343&lt;BR /&gt; MEM_LOAD_RETIRED.L2_LINE_MISS                                                      0.0001                100,000                                8                                    10.327&lt;BR /&gt; MEM_LOAD_RETIRED.L1D_LINE_MISS                                                   1e-06 100,000                              973 10.269&lt;BR /&gt; MEM_LOAD_RETIRED.DTLB_MISS                                                          1e-05                   10,000                               189                                   10.372&lt;BR /&gt; DTLB_MISSES_ANY 1e-06                  10,000 2133                                   10.372&lt;BR /&gt; BR_INST_RETIRED.ANY                                                                            1e-09                   1,000,000 5987                                  10.343&lt;BR /&gt; INST_RETIRED 1e-09                   1,000,000                        12,837                                10.343&lt;BR /&gt;&lt;BR /&gt;Please do suggest what could be the &lt;STRONG&gt;optimal SAV&lt;/STRONG&gt; for each events, such that one can have better performances with above values?&lt;BR /&gt;&lt;BR /&gt;(c) My code involves too many &lt;STRONG&gt;doubles intensive datatypes&lt;/STRONG&gt;, which event will give component of stalls associated with FLOAT/DOUBLE  operations for assisting denormals and such?&lt;BR /&gt;&lt;BR /&gt;(d) What is the meaning of different values for Ring 0 &amp;amp; Ring 3?&lt;BR /&gt;&lt;BR /&gt;(e) I see high BUS UTILIZATION when compiler does auto-vectorization, how do I minimize this with CPI?&lt;BR /&gt;&lt;BR /&gt;&lt;STRONG&gt;Note&lt;/STRONG&gt;: I have already auto-vectorized the code using pragmas. &lt;BR /&gt;&lt;BR /&gt;~BR&lt;BR /&gt;</description>
      <pubDate>Mon, 12 Jan 2009 09:32:51 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/CPU-Utilization-Events-Analysis/m-p/868375#M3707</guid>
      <dc:creator>srimks</dc:creator>
      <dc:date>2009-01-12T09:32:51Z</dc:date>
    </item>
    <item>
      <title>Re: CPU Utilization &amp; Events Analysis.</title>
      <link>https://community.intel.com/t5/Analyzers/CPU-Utilization-Events-Analysis/m-p/868376#M3708</link>
      <description>&lt;DIV style="margin:0px;"&gt;&lt;/DIV&gt;
You don't give any information to begin to answer most of your questions. &lt;BR /&gt;With regard to (e), auto-vectorization can be expected to be associated with high bus utilization and higher CPI than equivalent non-vector code. This points up the fact that those measurements don't correlate with the efficiency of your code. It's almost in the same category with the idea of avoiding vectorization in order to inflate your threaded parallel scaling ratings. The most efficient way to lower CPI is to add useless instructions (the opposite approach to vectorization).&lt;BR /&gt;As to (c), if you turned on gradual underflow (e.g. by a compilation option such as /fp:source), you might get more information by comparing it with a run where you set abrupt underflow (e.g. by putting /Qftz after /fp:source for your main()), or by executing the SSE intrinsic).&lt;BR /&gt;Shooting in the dark on (a), does it make a difference when you use a good affinity mapping? Presumably, you are using some kind of multi-threading, but I can't imagine how you expect us to guess what it is.&lt;BR /&gt;</description>
      <pubDate>Mon, 12 Jan 2009 14:08:45 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/CPU-Utilization-Events-Analysis/m-p/868376#M3708</guid>
      <dc:creator>TimP</dc:creator>
      <dc:date>2009-01-12T14:08:45Z</dc:date>
    </item>
    <item>
      <title>Re: CPU Utilization &amp; Events Analysis.</title>
      <link>https://community.intel.com/t5/Analyzers/CPU-Utilization-Events-Analysis/m-p/868377#M3709</link>
      <description>&lt;DIV style="margin:0px;"&gt;
&lt;DIV id="quote_reply" style="width: 100%; margin-top: 5px;"&gt;
&lt;DIV style="margin-left:2px;margin-right:2px;"&gt;Quoting - &lt;A href="https://community.intel.com/en-us/profile/367365"&gt;tim18&lt;/A&gt;&lt;/DIV&gt;
&lt;DIV style="background-color:#E5E5E5; padding:5px;border: 1px; border-style: inset;margin-left:2px;margin-right:2px;"&gt;&lt;EM&gt; You don't give any information to begin to answer most of your questions.  &lt;BR /&gt;With regard to (e), auto-vectorization can be expected to be associated with high bus utilization and higher CPI than equivalent non-vector code.  This points up the fact that those measurements don't correlate with the efficiency of your code.  It's almost in the same category with the idea of avoiding vectorization in order to inflate your threaded parallel scaling ratings.   The most efficient way to lower CPI is to add useless instructions (the opposite approach to vectorization).&lt;BR /&gt;As to (c), if you turned on gradual underflow (e.g. by a compilation option such as /fp:source), you might get more information by comparing it with a run where you set abrupt underflow (e.g. by putting /Qftz after /fp:source for  your main()), or by executing the SSE intrinsic).&lt;BR /&gt;Shooting in the dark on (a), does it make a difference when you use a good affinity mapping?  Presumably, you are using some kind of multi-threading, but I can't imagine how you expect us to guess what it is.&lt;BR /&gt;&lt;/EM&gt;&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;
Hi All.&lt;BR /&gt;&lt;BR /&gt;Can anyone help further on above (a) - (d) queries, it's very urgent.&lt;BR /&gt;&lt;BR /&gt;~BR&lt;BR /&gt;</description>
      <pubDate>Tue, 13 Jan 2009 04:51:42 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/CPU-Utilization-Events-Analysis/m-p/868377#M3709</guid>
      <dc:creator>srimks</dc:creator>
      <dc:date>2009-01-13T04:51:42Z</dc:date>
    </item>
    <item>
      <title>Re: CPU Utilization &amp; Events Analysis.</title>
      <link>https://community.intel.com/t5/Analyzers/CPU-Utilization-Events-Analysis/m-p/868378#M3710</link>
      <description>&lt;DIV style="margin:0px;"&gt;
&lt;DIV id="quote_reply" style="margin-top: 5px; width: 100%;"&gt;
&lt;DIV style="margin-left:2px;margin-right:2px;"&gt;Quoting - &lt;A href="https://community.intel.com/en-us/profile/407152"&gt;srimks&lt;/A&gt;&lt;/DIV&gt;
&lt;DIV style="background-color:#E5E5E5; padding:5px;border: 1px; border-style: inset;margin-left:2px;margin-right:2px;"&gt;&lt;EM&gt;
&lt;DIV style="margin:0px;"&gt;&lt;/DIV&gt;
Hi All.&lt;BR /&gt;&lt;BR /&gt;Can anyone help further on above (a) - (d) queries, it's very urgent.&lt;BR /&gt;&lt;BR /&gt;~BR&lt;BR /&gt;&lt;/EM&gt;&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;BR /&gt;BR,&lt;BR /&gt;&lt;BR /&gt;The numbers in (a) suggest that you have a threading issue and you are leaving a lot of CPU time on the table. The best way to get some more insights is to use the "Thread Profiler" and/or the "Sampling Over Time View" in VTune. They should help you to see how and when the threads are working.&lt;BR /&gt;&lt;BR /&gt;Kind regards&lt;BR /&gt;Thomas</description>
      <pubDate>Thu, 15 Jan 2009 21:08:49 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/CPU-Utilization-Events-Analysis/m-p/868378#M3710</guid>
      <dc:creator>Thomas_W_Intel</dc:creator>
      <dc:date>2009-01-15T21:08:49Z</dc:date>
    </item>
    <item>
      <title>Re: CPU Utilization &amp; Events Analysis.</title>
      <link>https://community.intel.com/t5/Analyzers/CPU-Utilization-Events-Analysis/m-p/868379#M3711</link>
      <description>&lt;DIV style="margin:0px;"&gt;
&lt;DIV id="quote_reply" style="width: 100%; margin-top: 5px;"&gt;
&lt;DIV style="margin-left:2px;margin-right:2px;"&gt;Quoting - &lt;A href="https://community.intel.com/en-us/profile/123613"&gt;Thomas Willhalm (Intel)&lt;/A&gt;&lt;/DIV&gt;
&lt;DIV style="background-color:#E5E5E5; padding:5px;border: 1px; border-style: inset;margin-left:2px;margin-right:2px;"&gt;&lt;EM&gt; &lt;BR /&gt;BR,&lt;BR /&gt;&lt;BR /&gt;The numbers in (a) suggest that you have a threading issue and you are leaving a lot of CPU time on the table. The best way to get some more insights is to use the "Thread Profiler" and/or the "Sampling Over Time View" in VTune. They should help you to see how and when the threads are working.&lt;BR /&gt;&lt;BR /&gt;Kind regards&lt;BR /&gt;Thomas&lt;/EM&gt;&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;
Hi Thomas.&lt;BR /&gt;&lt;BR /&gt;Got the clue for above (a), TX.&lt;BR /&gt;&lt;BR /&gt;Out of curiosity was looking to ask - Is this a "&lt;STRONG&gt;Load balancing, the equal division of work among threads&lt;/STRONG&gt;" problem which is not being achieved here within all 8 cores of Quad Core 5300 processor which has 8 cpu cores (4 in each die)?&lt;BR /&gt;&lt;BR /&gt;Do you suggest use of OpenMP pragma's within the section of code for obtaining efficient &lt;STRONG&gt;Load Balancing&lt;/STRONG&gt;.&lt;BR /&gt;&lt;BR /&gt;~BR&lt;BR /&gt;Mukkaysh&lt;BR /&gt;</description>
      <pubDate>Fri, 16 Jan 2009 06:36:21 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/CPU-Utilization-Events-Analysis/m-p/868379#M3711</guid>
      <dc:creator>srimks</dc:creator>
      <dc:date>2009-01-16T06:36:21Z</dc:date>
    </item>
    <item>
      <title>Re: CPU Utilization &amp; Events Analysis.</title>
      <link>https://community.intel.com/t5/Analyzers/CPU-Utilization-Events-Analysis/m-p/868380#M3712</link>
      <description>&lt;DIV style="margin: 0px; height: auto;"&gt;&lt;/DIV&gt;
If you have OpenMP load balancing issues, you should see them in the summary you get when you link with -openmp_profile and run your tests. You might find it interesting to run those tests with various settings of KMP_AFFINITY or GOMP_CPU_AFFINITY. After that, the simplest solution, and often the appropriate one, is schedule(guided).&lt;BR /&gt;</description>
      <pubDate>Fri, 16 Jan 2009 14:03:14 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/CPU-Utilization-Events-Analysis/m-p/868380#M3712</guid>
      <dc:creator>TimP</dc:creator>
      <dc:date>2009-01-16T14:03:14Z</dc:date>
    </item>
    <item>
      <title>Re: CPU Utilization &amp; Events Analysis.</title>
      <link>https://community.intel.com/t5/Analyzers/CPU-Utilization-Events-Analysis/m-p/868381#M3713</link>
      <description>&lt;DIV style="margin:0px;"&gt;
&lt;DIV id="quote_reply" style="margin-top: 5px; width: 100%;"&gt;
&lt;DIV style="margin-left:2px;margin-right:2px;"&gt;Quoting - &lt;A href="https://community.intel.com/en-us/profile/367365"&gt;tim18&lt;/A&gt;&lt;/DIV&gt;
&lt;DIV style="background-color:#E5E5E5; padding:5px;border: 1px; border-style: inset;margin-left:2px;margin-right:2px;"&gt;&lt;EM&gt;If you have OpenMP load balancing issues, you should see them in the summary you get when you link with -openmp_profile and run your tests. You might find it interesting to run those tests with various settings of KMP_AFFINITY or GOMP_CPU_AFFINITY. After that, the simplest solution, and often the appropriate one, is schedule(guided).&lt;BR /&gt;&lt;/EM&gt;&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;BR /&gt;The original code doesn't have any OpenMP syntax nor semantic present currently now.&lt;BR /&gt;&lt;BR /&gt;I neither have worked on above &lt;STRONG&gt;Query - (a)&lt;/STRONG&gt; nor on &lt;STRONG&gt;LOAD BALANCING&lt;/STRONG&gt; for SMP system on all it's cores nor on &lt;STRONG&gt;OpenMP&lt;/STRONG&gt;, but while going through "Thomas W" response, thought to ask him - &lt;STRONG&gt;Is this a "Load balancing, the equal division of work among threads"?&lt;BR /&gt;&lt;BR /&gt;&lt;/STRONG&gt;What should be appropriate approach to resolve above&lt;STRONG&gt; Query - (a)&lt;/STRONG&gt; as asked earlier?&lt;BR /&gt;&lt;BR /&gt;&lt;STRONG&gt;~&lt;/STRONG&gt;BR</description>
      <pubDate>Fri, 16 Jan 2009 17:44:41 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/CPU-Utilization-Events-Analysis/m-p/868381#M3713</guid>
      <dc:creator>srimks</dc:creator>
      <dc:date>2009-01-16T17:44:41Z</dc:date>
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