<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Bus Utilization on Dual Processor Xeon in Analyzers</title>
    <link>https://community.intel.com/t5/Analyzers/Bus-Utilization-on-Dual-Processor-Xeon/m-p/894301#M5013</link>
    <description>&lt;DIV style="margin:0px;"&gt;&lt;/DIV&gt;
The CPU to bus clock speed ratio factors into this. VTune asks you to enter the CPU speed, but I think it guesses the bus speed. Also, if your formula uses a single socket bus capacity rating, that would be wrong for dual socket with balanced usage. If you get all the numbers right, you are unlikely to achieve even 80%.&lt;BR /&gt;</description>
    <pubDate>Wed, 25 Feb 2009 16:00:47 GMT</pubDate>
    <dc:creator>TimP</dc:creator>
    <dc:date>2009-02-25T16:00:47Z</dc:date>
    <item>
      <title>Bus Utilization on Dual Processor Xeon</title>
      <link>https://community.intel.com/t5/Analyzers/Bus-Utilization-on-Dual-Processor-Xeon/m-p/894300#M5012</link>
      <description>Hey all,&lt;BR /&gt;&lt;BR /&gt;I'm calcuating the bus utilization on a dual processor xeon machine (so i have 8 cores in total). &lt;BR /&gt;&lt;BR /&gt;However, when i come to calcuate the Bus utilisation i get values of up to 200% (I'm assuming it's %)&lt;BR /&gt;&lt;BR /&gt;I'm recorded the metrics as referenes in the vtune reference, i.e. BUS_TRANS_ANY.ALL_AGENTS and CPU_CLK_UNHALTED.BUS.&lt;BR /&gt;&lt;BR /&gt;Does this seem correct? To me this seems wrong.&lt;BR /&gt;&lt;BR /&gt;Any pointers will be great.&lt;BR /&gt;&lt;BR /&gt;Thanks</description>
      <pubDate>Wed, 25 Feb 2009 14:39:12 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Bus-Utilization-on-Dual-Processor-Xeon/m-p/894300#M5012</guid>
      <dc:creator>m_faulkner</dc:creator>
      <dc:date>2009-02-25T14:39:12Z</dc:date>
    </item>
    <item>
      <title>Re: Bus Utilization on Dual Processor Xeon</title>
      <link>https://community.intel.com/t5/Analyzers/Bus-Utilization-on-Dual-Processor-Xeon/m-p/894301#M5013</link>
      <description>&lt;DIV style="margin:0px;"&gt;&lt;/DIV&gt;
The CPU to bus clock speed ratio factors into this. VTune asks you to enter the CPU speed, but I think it guesses the bus speed. Also, if your formula uses a single socket bus capacity rating, that would be wrong for dual socket with balanced usage. If you get all the numbers right, you are unlikely to achieve even 80%.&lt;BR /&gt;</description>
      <pubDate>Wed, 25 Feb 2009 16:00:47 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Bus-Utilization-on-Dual-Processor-Xeon/m-p/894301#M5013</guid>
      <dc:creator>TimP</dc:creator>
      <dc:date>2009-02-25T16:00:47Z</dc:date>
    </item>
    <item>
      <title>Re: Bus Utilization on Dual Processor Xeon</title>
      <link>https://community.intel.com/t5/Analyzers/Bus-Utilization-on-Dual-Processor-Xeon/m-p/894302#M5014</link>
      <description>&lt;DIV style="margin:0px;"&gt;
&lt;DIV id="quote_reply" style="width: 100%; margin-top: 5px;"&gt;
&lt;DIV style="margin-left:2px;margin-right:2px;"&gt;Quoting - &lt;A href="https://community.intel.com/en-us/profile/367365"&gt;tim18&lt;/A&gt;&lt;/DIV&gt;
&lt;DIV style="background-color:#E5E5E5; padding:5px;border: 1px; border-style: inset;margin-left:2px;margin-right:2px;"&gt;&lt;EM&gt; The CPU to bus clock speed ratio factors into this. VTune asks you to enter the CPU speed, but I think it guesses the bus speed. Also, if your formula uses a single socket bus capacity rating, that would be wrong for dual socket with balanced usage. If you get all the numbers right, you are unlikely to achieve even 80%.&lt;BR /&gt;&lt;/EM&gt;&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;BR /&gt;Thanks for the reply.&lt;BR /&gt;&lt;BR /&gt;How does vtune factor in the CPU to bus speed ratio? I'd like to understand the exact forumlae used.&lt;BR /&gt;</description>
      <pubDate>Wed, 25 Feb 2009 16:42:18 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Bus-Utilization-on-Dual-Processor-Xeon/m-p/894302#M5014</guid>
      <dc:creator>m_faulkner</dc:creator>
      <dc:date>2009-02-25T16:42:18Z</dc:date>
    </item>
    <item>
      <title>Re: Bus Utilization on Dual Processor Xeon</title>
      <link>https://community.intel.com/t5/Analyzers/Bus-Utilization-on-Dual-Processor-Xeon/m-p/894303#M5015</link>
      <description>&lt;DIV style="margin:0px;"&gt;
&lt;DIV id="quote_reply" style="width: 100%; margin-top: 5px;"&gt;
&lt;DIV style="margin-left:2px;margin-right:2px;"&gt;Quoting - &lt;A href="https://community.intel.com/en-us/profile/291392"&gt;m.faulkner&lt;/A&gt;&lt;/DIV&gt;
&lt;DIV style="background-color:#E5E5E5; padding:5px;border: 1px; border-style: inset;margin-left:2px;margin-right:2px;"&gt;&lt;EM&gt;
&lt;DIV style="margin:0px;"&gt;
&lt;DIV id="quote_reply" style="width: 100%; margin-top: 5px; height: 0pt;"&gt;&lt;/DIV&gt;
&lt;/DIV&gt;
How does vtune factor in the CPU to bus speed ratio? I'd like to understand the exact forumlae used.&lt;BR /&gt;&lt;/EM&gt;&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;
Sorry, I may be thinking of some older machine. There surely is a lack of searchable references on this.&lt;BR /&gt;</description>
      <pubDate>Wed, 25 Feb 2009 19:48:54 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Bus-Utilization-on-Dual-Processor-Xeon/m-p/894303#M5015</guid>
      <dc:creator>TimP</dc:creator>
      <dc:date>2009-02-25T19:48:54Z</dc:date>
    </item>
    <item>
      <title>Re: Bus Utilization on Dual Processor Xeon</title>
      <link>https://community.intel.com/t5/Analyzers/Bus-Utilization-on-Dual-Processor-Xeon/m-p/894304#M5016</link>
      <description>&lt;DIV style="margin:0px;"&gt;
&lt;DIV id="quote_reply" style="width: 100%; margin-top: 5px;"&gt;
&lt;DIV style="margin-left:2px;margin-right:2px;"&gt;Quoting - &lt;A href="https://community.intel.com/en-us/profile/367365"&gt;tim18&lt;/A&gt;&lt;/DIV&gt;
&lt;DIV style="background-color:#E5E5E5; padding:5px;border: 1px; border-style: inset;margin-left:2px;margin-right:2px;"&gt;&lt;EM&gt;
&lt;DIV style="margin:0px;"&gt;&lt;/DIV&gt;
Sorry, I may be thinking of some older machine. There surely is a lack of searchable references on this.&lt;BR /&gt;&lt;/EM&gt;&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;
So we now think that the bus utilisation does use the ratio of bus speed / cpu speed? If so then i still don't understand why when i record the above metric i get a % utilisation of around 200%&lt;BR /&gt;</description>
      <pubDate>Thu, 26 Feb 2009 17:27:06 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Bus-Utilization-on-Dual-Processor-Xeon/m-p/894304#M5016</guid>
      <dc:creator>m_faulkner</dc:creator>
      <dc:date>2009-02-26T17:27:06Z</dc:date>
    </item>
    <item>
      <title>Re: Bus Utilization on Dual Processor Xeon</title>
      <link>https://community.intel.com/t5/Analyzers/Bus-Utilization-on-Dual-Processor-Xeon/m-p/894305#M5017</link>
      <description>&lt;DIV style="margin:0px;"&gt;
&lt;DIV id="quote_reply" style="width: 100%; margin-top: 5px;"&gt;
&lt;DIV style="margin-left:2px;margin-right:2px;"&gt;Quoting - &lt;A href="https://community.intel.com/en-us/profile/291392"&gt;m.faulkner&lt;/A&gt;&lt;/DIV&gt;
&lt;DIV style="background-color:#E5E5E5; padding:5px;border: 1px; border-style: inset;margin-left:2px;margin-right:2px;"&gt;&lt;EM&gt;
&lt;DIV style="margin:0px;"&gt;&lt;/DIV&gt;
So we now think that the bus utilisation does use the ratio of bus speed / cpu speed? If so then i still don't understand why when i record the above metric i get a % utilisation of around 200%&lt;BR /&gt;&lt;/EM&gt;&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;
Having looked in to this, i'm now wondering if it has to do with the fact that i'm recording on all my cores? Therefore having a figure which (because i've got 8 cores) is x8 greater than it should be? &lt;BR /&gt;&lt;BR /&gt;Any one any hints as to why i would have the BUS UTILIZATION &amp;gt; 100% (using the forumlae from the vtune docs)&lt;BR /&gt;</description>
      <pubDate>Mon, 02 Mar 2009 18:06:38 GMT</pubDate>
      <guid>https://community.intel.com/t5/Analyzers/Bus-Utilization-on-Dual-Processor-Xeon/m-p/894305#M5017</guid>
      <dc:creator>m_faulkner</dc:creator>
      <dc:date>2009-03-02T18:06:38Z</dc:date>
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  </channel>
</rss>

