https://community.intel.com/t5/Analyzers/memory-cycles/m-p/787210#M976 Hi Roel,<BR /><BR />You can countthe number ofsome MEM_LOAD_RETIRED's extensions(Intel? Core? i7 processor, for example)<BR /><BR />MEM_LOAD_RETIRED.<A>L1D_HIT</A>(Mask0x0)<BR />MEM_LOAD_RETIRED.L2HIT (Mask 0x2)<BR />MEM_LOAD_RETIRED.LLC_UNSHARED_HIT (Mask 0x4)<BR />MEM_LOAD_RETIRED.OTHER_CORE_L2_HIT_HITM (Mask 0x8)<BR />MEM_LOAD_RETIRED.LLC_MISS (Mask 0x10)<BR /><BR />Regards, Peter Fri, 02 Jul 2010 03:31:27 GMT Peter_W_Intel 2010-07-02T03:31:27Z https://community.intel.com/t5/Analyzers/memory-cycles/m-p/787209#M975 Hi there,<DIV></DIV><DIV>I was trying to figure out how to measure the number of cycles spent accessing memory. I consider all cycles including L1 hits and misses, L2 hits and misses, L3 hits and misses. am I missing any additional memory related events?</DIV><DIV></DIV><DIV>thanks in advance,</DIV><DIV></DIV><DIV>Roel</DIV><DIV></DIV> Thu, 01 Jul 2010 07:57:24 GMT https://community.intel.com/t5/Analyzers/memory-cycles/m-p/787209#M975 roeltje25 2010-07-01T07:57:24Z https://community.intel.com/t5/Analyzers/memory-cycles/m-p/787210#M976 Hi Roel,<BR /><BR />You can countthe number ofsome MEM_LOAD_RETIRED's extensions(Intel? Core? i7 processor, for example)<BR /><BR />MEM_LOAD_RETIRED.<A>L1D_HIT</A>(Mask0x0)<BR />MEM_LOAD_RETIRED.L2HIT (Mask 0x2)<BR />MEM_LOAD_RETIRED.LLC_UNSHARED_HIT (Mask 0x4)<BR />MEM_LOAD_RETIRED.OTHER_CORE_L2_HIT_HITM (Mask 0x8)<BR />MEM_LOAD_RETIRED.LLC_MISS (Mask 0x10)<BR /><BR />Regards, Peter Fri, 02 Jul 2010 03:31:27 GMT https://community.intel.com/t5/Analyzers/memory-cycles/m-p/787210#M976 Peter_W_Intel 2010-07-02T03:31:27Z