<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Xeon D 1559 in Embedded Server</title>
    <link>https://community.intel.com/t5/Embedded-Server/Xeon-D-1559/m-p/1201421#M604</link>
    <description>&lt;P&gt;Hello,&amp;nbsp;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/120078"&gt;@Jinto&lt;/a&gt;:&lt;/P&gt;
&lt;P&gt;Thank you for contacting Intel Embedded Community.&lt;/P&gt;
&lt;P&gt;The list showed in the second image attached to this thread is a partial list that shows the differences between the family processors listed on it. Due to this fact, it is unclear your observations listed on this thread.&lt;/P&gt;
&lt;P&gt;Based on our previous explanation, could you please give a more detailed description of this situation?&amp;nbsp;&lt;/P&gt;
&lt;P&gt;We are waiting for your answer.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/114"&gt;@CarlosAM_INTEL&lt;/a&gt;.&lt;/P&gt;</description>
    <pubDate>Tue, 18 Aug 2020 22:47:59 GMT</pubDate>
    <dc:creator>CarlosAM_INTEL</dc:creator>
    <dc:date>2020-08-18T22:47:59Z</dc:date>
    <item>
      <title>Xeon D 1559</title>
      <link>https://community.intel.com/t5/Embedded-Server/Xeon-D-1559/m-p/1201390#M603</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;As per Data sheet Volume 4, 10G base KR is supported on Xeon D 1559. Below is the screen shot.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Jinto_0-1597779340227.png" style="width: 651px;"&gt;&lt;img src="https://community.intel.com/t5/image/serverpage/image-id/11867i188B7E05E890A6B6/image-dimensions/651x254/is-moderation-mode/true?v=v2&amp;amp;whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright" width="651" height="254" role="button" title="Jinto_0-1597779340227.png" alt="Jinto_0-1597779340227.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;This is contradicting to the reply you have given to my colleague on this query&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.intel.com/t5/Embedded-Server/Xeon-D-BDW-DE-and-BDW-DE-NS/td-p/1200877/jump-to/first-unread-message" target="_blank"&gt;https://community.intel.com/t5/Embedded-Server/Xeon-D-BDW-DE-and-BDW-DE-NS/td-p/1200877/jump-to/first-unread-message&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Jinto_1-1597780667160.png" style="width: 400px;"&gt;&lt;img src="https://community.intel.com/t5/image/serverpage/image-id/11869i98E6D353D89E8C76/image-size/medium/is-moderation-mode/true?v=v2&amp;amp;px=400&amp;amp;whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright" role="button" title="Jinto_1-1597780667160.png" alt="Jinto_1-1597780667160.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;BDW_DE Ball Name does not show any pins for 10G Base KR.&amp;nbsp; Above 2 documents are contradicting each other. Can some one please clarify if Xeon D 1559 has 10G base KR support? If supported, which pins have to be used?&lt;/P&gt;</description>
      <pubDate>Tue, 18 Aug 2020 20:10:15 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Server/Xeon-D-1559/m-p/1201390#M603</guid>
      <dc:creator>Jinto</dc:creator>
      <dc:date>2020-08-18T20:10:15Z</dc:date>
    </item>
    <item>
      <title>Re: Xeon D 1559</title>
      <link>https://community.intel.com/t5/Embedded-Server/Xeon-D-1559/m-p/1201421#M604</link>
      <description>&lt;P&gt;Hello,&amp;nbsp;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/120078"&gt;@Jinto&lt;/a&gt;:&lt;/P&gt;
&lt;P&gt;Thank you for contacting Intel Embedded Community.&lt;/P&gt;
&lt;P&gt;The list showed in the second image attached to this thread is a partial list that shows the differences between the family processors listed on it. Due to this fact, it is unclear your observations listed on this thread.&lt;/P&gt;
&lt;P&gt;Based on our previous explanation, could you please give a more detailed description of this situation?&amp;nbsp;&lt;/P&gt;
&lt;P&gt;We are waiting for your answer.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/114"&gt;@CarlosAM_INTEL&lt;/a&gt;.&lt;/P&gt;</description>
      <pubDate>Tue, 18 Aug 2020 22:47:59 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Server/Xeon-D-1559/m-p/1201421#M604</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2020-08-18T22:47:59Z</dc:date>
    </item>
    <item>
      <title>Re: Xeon D 1559</title>
      <link>https://community.intel.com/t5/Embedded-Server/Xeon-D-1559/m-p/1201426#M605</link>
      <description>&lt;P&gt;&lt;STRONG&gt;Thanks for your suggestions!&lt;/STRONG&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 18 Aug 2020 22:25:51 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Server/Xeon-D-1559/m-p/1201426#M605</guid>
      <dc:creator>jamescrane</dc:creator>
      <dc:date>2020-08-18T22:25:51Z</dc:date>
    </item>
    <item>
      <title>Re: Xeon D 1559</title>
      <link>https://community.intel.com/t5/Embedded-Server/Xeon-D-1559/m-p/1201845#M611</link>
      <description>&lt;P&gt;Hi&lt;/P&gt;
&lt;P&gt;Here is the full link of second image.&lt;A href="http://www.intel.com/cd/edesign/library/asmo-na/eng/567993.htm" rel="nofollow noopener noreferrer" target="_blank"&gt;http://www.intel.com/cd/edesign/library/asmo-na/eng/567993.htm&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Please answer my queries&lt;/P&gt;
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      <pubDate>Wed, 19 Aug 2020 21:25:19 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Server/Xeon-D-1559/m-p/1201845#M611</guid>
      <dc:creator>Jinto</dc:creator>
      <dc:date>2020-08-19T21:25:19Z</dc:date>
    </item>
    <item>
      <title>Re: Xeon D 1559</title>
      <link>https://community.intel.com/t5/Embedded-Server/Xeon-D-1559/m-p/1201878#M612</link>
      <description>&lt;P&gt;Hello,&amp;nbsp;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/120078"&gt;@Jinto&lt;/a&gt;:&lt;/P&gt;
&lt;P&gt;Thanks for your reply.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Please let us paraphrase our previous message, reviewing the second image and the provided information on your last communication, we found a 54-pin list that has only the different pins between the Broadwell-DE and Broadwell-DE NS without any reference of 10G Base KR information.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;By the way, we have reviewed patiently but we cannot find any information related to incompatibility between 10G base KR and the processor Intel D-1559.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Based on this explanation, could you please explain to us in a detailed way the reasons to consider that the documents have inconsistencies and where we can find the cited incompatibility information that you have reported on your first communication?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;We are waiting for your clarification.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/114"&gt;@CarlosAM_INTEL&lt;/a&gt;.&lt;/P&gt;</description>
      <pubDate>Wed, 19 Aug 2020 23:26:55 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Server/Xeon-D-1559/m-p/1201878#M612</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2020-08-19T23:26:55Z</dc:date>
    </item>
    <item>
      <title>Re: Xeon D 1559</title>
      <link>https://community.intel.com/t5/Embedded-Server/Xeon-D-1559/m-p/1204013#M628</link>
      <description>&lt;P&gt;Let me rephrase the query.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Jinto_1-1598373080553.png" style="width: 400px;"&gt;&lt;img src="https://community.intel.com/t5/image/serverpage/image-id/12419i2739C931DE0A46B0/image-size/medium/is-moderation-mode/true?v=v2&amp;amp;px=400&amp;amp;whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright" role="button" title="Jinto_1-1598373080553.png" alt="Jinto_1-1598373080553.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;As per the above data sheet, Xeon D 1559 supports 2 ports of 10G Base KR.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;In the&amp;nbsp;bdw-de-ns-ballmap-567993-rev2-1.xls document&amp;nbsp;(After considering the column BDW_DE Ball Name in 2nd column for Xeon D 1559) we are seeing only 1 port of 10G Base KR.&amp;nbsp; Hence the inconsistency.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;We want to use 2 ports of 10G Base KR in Xeon D 1559. Please suggest which pins to use&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 25 Aug 2020 17:04:27 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Server/Xeon-D-1559/m-p/1204013#M628</guid>
      <dc:creator>Jinto</dc:creator>
      <dc:date>2020-08-25T17:04:27Z</dc:date>
    </item>
    <item>
      <title>Re: Xeon D 1559</title>
      <link>https://community.intel.com/t5/Embedded-Server/Xeon-D-1559/m-p/1204419#M631</link>
      <description>&lt;P&gt;Hello,&amp;nbsp;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/120078"&gt;@Jinto&lt;/a&gt;:&lt;/P&gt;
&lt;P&gt;Thanks for your reply.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Table 1-3 included the pins related to these interfaces. You can find this information &lt;SPAN style="font-size: calc(var(--rem) * 1px * 1.0625); letter-spacing: 0px;"&gt;when you are logged into your Resource &amp;amp; Design Center (RDC) privileged account &lt;/SPAN&gt;&lt;SPAN style="font-size: calc(var(--rem) * 1px * 1.0625); letter-spacing: 0px;"&gt;on page 19 of the Intel® Xeon® Processor D-1500 Product Family: Datasheet (Vol. 4 of 4) document # 335023 at the following website:&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;A href="http://www.intel.com/cd/edesign/library/asmo-na/eng/335023.htm" target="_blank"&gt; http://www.intel.com/cd/edesign/library/asmo-na/eng/335023.htm &lt;/A&gt;&lt;/P&gt;
&lt;P&gt;The RDC Account Support form is the channel to process your account update request or any inconveniences with the provided website. It can be found at:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.intel.com/content/www/us/en/forms/support/my-intel-sign-on-support.html" target="_blank"&gt;https://www.intel.com/content/www/us/en/forms/support/my-intel-sign-on-support.html &lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/114"&gt;@CarlosAM_INTEL&lt;/a&gt;.&lt;/P&gt;</description>
      <pubDate>Wed, 26 Aug 2020 20:42:16 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Server/Xeon-D-1559/m-p/1204419#M631</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2020-08-26T20:42:16Z</dc:date>
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  </channel>
</rss>

