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    <title>topic Re: XEON D 1559 PCB in Embedded Server</title>
    <link>https://community.intel.com/t5/Embedded-Server/XEON-D-1559-PCB/m-p/1232149#M691</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/114"&gt;@CarlosAM_INTEL&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;This issue is with the inside pins of the processor foot print. Outer pins position are seem correct. But inside pins pitch seams uneven in rows. Please find the attached footprint image.&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Fri, 27 Nov 2020 07:07:13 GMT</pubDate>
    <dc:creator>Athuljith</dc:creator>
    <dc:date>2020-11-27T07:07:13Z</dc:date>
    <item>
      <title>XEON D 1559 PCB</title>
      <link>https://community.intel.com/t5/Embedded-Server/XEON-D-1559-PCB/m-p/1209763#M658</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;can you please help me to create the PCB footprint of XEON D 1559. Which documents I should reffere.&lt;/P&gt;</description>
      <pubDate>Wed, 16 Sep 2020 04:05:27 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Server/XEON-D-1559-PCB/m-p/1209763#M658</guid>
      <dc:creator>Athuljith</dc:creator>
      <dc:date>2020-09-16T04:05:27Z</dc:date>
    </item>
    <item>
      <title>Re: XEON D 1559 PCB</title>
      <link>https://community.intel.com/t5/Embedded-Server/XEON-D-1559-PCB/m-p/1209906#M659</link>
      <description>&lt;P&gt;Hello,&amp;nbsp;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/122081"&gt;@Athuljith&lt;/a&gt;:&lt;/P&gt;
&lt;P&gt;Thank you for contacting Intel Embedded Community.&lt;/P&gt;
&lt;P&gt;You can find the information that may help you is stated in sections 2.4, 6.0.1, 8.1, 8.5,&amp;nbsp; 9.2.3, 9.2.7, 9.4.3, 9.4.7, 11.1, 14.2, 15.1, 19.1.2 of the&amp;nbsp;Grangeville with Intel Xeon Processor D 1500 Product Family Platform Design Guide (PDG) document # 543448, and in the&amp;nbsp;Intel Xeon D-1500 Product Family Reference Design Beverly Cove document # 544667. You can find them when you are logged into your Resource &amp;amp; Design Center (RDC) privileged account on the following websites:&lt;/P&gt;
&lt;P data-unlink="true"&gt;http://www.intel.com/cd/edesign/library/asmo-na/eng/543448.htm&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;A href="http://www.intel.com/cd/edesign/library/asmo-na/eng/544667.htm" target="_blank"&gt;http://www.intel.com/cd/edesign/library/asmo-na/eng/544667.htm&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;The RDC Account Support form is the channel to process your account update request or report any inconveniences with the provided sites. It can be found at:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.intel.com/content/www/us/en/forms/support/my-intel-sign-on-support.html" target="_blank"&gt;https://www.intel.com/content/www/us/en/forms/support/my-intel-sign-on-support.html&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/114"&gt;@CarlosAM_INTEL&lt;/a&gt;.&lt;/P&gt;</description>
      <pubDate>Wed, 16 Sep 2020 17:30:57 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Server/XEON-D-1559-PCB/m-p/1209906#M659</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2020-09-16T17:30:57Z</dc:date>
    </item>
    <item>
      <title>Re: XEON D 1559 PCB</title>
      <link>https://community.intel.com/t5/Embedded-Server/XEON-D-1559-PCB/m-p/1231586#M687</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/114"&gt;@CarlosAM_INTEL&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;We followed "Tlaquepaque Customer Reference Board [CRB] Alpha 2 Schematics" for creating Processor foot print. We are finding some uneven offsets in the pitch in that reference foot print. Can you please confirm the expected pitch? How much off set can be allowed? How can I verify the footprint?&lt;/P&gt;</description>
      <pubDate>Wed, 25 Nov 2020 11:27:30 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Server/XEON-D-1559-PCB/m-p/1231586#M687</guid>
      <dc:creator>Athuljith</dc:creator>
      <dc:date>2020-11-25T11:27:30Z</dc:date>
    </item>
    <item>
      <title>Re: XEON D 1559 PCB</title>
      <link>https://community.intel.com/t5/Embedded-Server/XEON-D-1559-PCB/m-p/1231748#M689</link>
      <description>&lt;P&gt;Hello,&amp;nbsp;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/122081"&gt;@Athuljith&lt;/a&gt;:&lt;/P&gt;
&lt;P&gt;Thanks for your reply.&lt;/P&gt;
&lt;P&gt;We want to help you.&lt;/P&gt;
&lt;P&gt;Could you please clarify if the cited situation happens on all your implementation or it is a portion?&lt;/P&gt;
&lt;P&gt;We are waiting for your answer.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/114"&gt;@CarlosAM_INTEL&lt;/a&gt;.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 25 Nov 2020 22:57:19 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Server/XEON-D-1559-PCB/m-p/1231748#M689</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2020-11-25T22:57:19Z</dc:date>
    </item>
    <item>
      <title>Re: XEON D 1559 PCB</title>
      <link>https://community.intel.com/t5/Embedded-Server/XEON-D-1559-PCB/m-p/1232149#M691</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/114"&gt;@CarlosAM_INTEL&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;This issue is with the inside pins of the processor foot print. Outer pins position are seem correct. But inside pins pitch seams uneven in rows. Please find the attached footprint image.&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 27 Nov 2020 07:07:13 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Server/XEON-D-1559-PCB/m-p/1232149#M691</guid>
      <dc:creator>Athuljith</dc:creator>
      <dc:date>2020-11-27T07:07:13Z</dc:date>
    </item>
    <item>
      <title>Re: XEON D 1559 PCB</title>
      <link>https://community.intel.com/t5/Embedded-Server/XEON-D-1559-PCB/m-p/1232228#M692</link>
      <description>&lt;P&gt;Hello,&amp;nbsp;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/122081"&gt;@Athuljith&lt;/a&gt;:&lt;/P&gt;
&lt;P&gt;Thanks for your reply.&lt;/P&gt;
&lt;P&gt;You can find the information that may help you on pages 19, 26, 27, and 9 through 15 of the Manufacturing with the Intel® Microserver Platform Code Named Grangeville (Intel® Xeon® Processor D-1500 Product Family) document # 544983. You can find this document when you are logged into your Resource &amp;amp; Design Center (RDC) privileged account on the following website:&lt;/P&gt;
&lt;P&gt;&lt;A href="http://www.intel.com/cd/edesign/library/asmo-na/eng/544983.htm" target="_blank"&gt;http://www.intel.com/cd/edesign/library/asmo-na/eng/544983.htm&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;The RDC Account Support form is the channel to process your account update request or report any inconveniences with the provided sites. It can be found at:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.intel.com/content/www/us/en/forms/support/my-intel-sign-on-support.html" target="_blank"&gt;https://www.intel.com/content/www/us/en/forms/support/my-intel-sign-on-support.html&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/114"&gt;@CarlosAM_INTEL&lt;/a&gt;.&lt;/P&gt;</description>
      <pubDate>Fri, 27 Nov 2020 14:31:25 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Server/XEON-D-1559-PCB/m-p/1232228#M692</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2020-11-27T14:31:25Z</dc:date>
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