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    <title>topic braswell hot-plug pcie in Embedded Intel Atom® Processors</title>
    <link>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/braswell-hot-plug-pcie/m-p/215950#M1072</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In datasheet " 18.2.2.1 Express Card Hot-Plug Events":&lt;/P&gt;&lt;P&gt;A full Hot-plug Controller is not implemented.&lt;/P&gt;&lt;P&gt;Presence detection occurs when a PCI Express* device is plugged in and power is&lt;/P&gt;&lt;P&gt;supplied. The physical layer will detect the presence of the device, and the root port will&lt;/P&gt;&lt;P&gt;set the SLSTS.PDS and SLSTS.PDC bits.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;if only :&lt;/P&gt;&lt;P&gt;SLCAP --&amp;gt; Hot-Plug Capable (HPC) &amp;amp; Hot-Plug Surprise (HPS) is set.&lt;/P&gt;&lt;P&gt;SLCTL_SLSTS --&amp;gt; Hot-Plug Interrupt Enable (HPE) &amp;amp; Presence Detect Changed Enable (PDE) is  set&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;SLSTS.PDS and SLSTS.PDC is set when detection ?&lt;/P&gt;&lt;P&gt;But training pcie is executed while detection or we must launch manually training ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In my case, i have fpga already connected, but not loaded with firmware. i can use hot plug detection, when fpga loaded ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;i tested:&lt;/P&gt;&lt;P&gt;set CLIST_XCAP.SI = 1&lt;/P&gt;&lt;P&gt;1/ check before  load fpga slsts.pds &amp;amp; slsts.pdc == 1&lt;/P&gt;&lt;P&gt;2/ load fpga&lt;/P&gt;&lt;P&gt;3/ check after , slsts.pds &amp;amp; slsts.pdc == 1&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Why before load fpga pds = 1 ? how to working detection ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards&lt;/P&gt;&lt;P&gt;Sébastien&lt;/P&gt;</description>
    <pubDate>Wed, 26 Apr 2017 10:41:09 GMT</pubDate>
    <dc:creator>sbass</dc:creator>
    <dc:date>2017-04-26T10:41:09Z</dc:date>
    <item>
      <title>braswell hot-plug pcie</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/braswell-hot-plug-pcie/m-p/215950#M1072</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In datasheet " 18.2.2.1 Express Card Hot-Plug Events":&lt;/P&gt;&lt;P&gt;A full Hot-plug Controller is not implemented.&lt;/P&gt;&lt;P&gt;Presence detection occurs when a PCI Express* device is plugged in and power is&lt;/P&gt;&lt;P&gt;supplied. The physical layer will detect the presence of the device, and the root port will&lt;/P&gt;&lt;P&gt;set the SLSTS.PDS and SLSTS.PDC bits.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;if only :&lt;/P&gt;&lt;P&gt;SLCAP --&amp;gt; Hot-Plug Capable (HPC) &amp;amp; Hot-Plug Surprise (HPS) is set.&lt;/P&gt;&lt;P&gt;SLCTL_SLSTS --&amp;gt; Hot-Plug Interrupt Enable (HPE) &amp;amp; Presence Detect Changed Enable (PDE) is  set&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;SLSTS.PDS and SLSTS.PDC is set when detection ?&lt;/P&gt;&lt;P&gt;But training pcie is executed while detection or we must launch manually training ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In my case, i have fpga already connected, but not loaded with firmware. i can use hot plug detection, when fpga loaded ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;i tested:&lt;/P&gt;&lt;P&gt;set CLIST_XCAP.SI = 1&lt;/P&gt;&lt;P&gt;1/ check before  load fpga slsts.pds &amp;amp; slsts.pdc == 1&lt;/P&gt;&lt;P&gt;2/ load fpga&lt;/P&gt;&lt;P&gt;3/ check after , slsts.pds &amp;amp; slsts.pdc == 1&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Why before load fpga pds = 1 ? how to working detection ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards&lt;/P&gt;&lt;P&gt;Sébastien&lt;/P&gt;</description>
      <pubDate>Wed, 26 Apr 2017 10:41:09 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/braswell-hot-plug-pcie/m-p/215950#M1072</guid>
      <dc:creator>sbass</dc:creator>
      <dc:date>2017-04-26T10:41:09Z</dc:date>
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    <item>
      <title>Re: braswell hot-plug pcie</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/braswell-hot-plug-pcie/m-p/215951#M1073</link>
      <description>&lt;P&gt;Hello, keziaha:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for contacting Intel Embedded Community. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In order to be on the same page, could you please tell me if this forum is related to the Carlos_A.&lt;/P&gt;</description>
      <pubDate>Wed, 26 Apr 2017 12:47:44 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/braswell-hot-plug-pcie/m-p/215951#M1073</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2017-04-26T12:47:44Z</dc:date>
    </item>
    <item>
      <title>Re: braswell hot-plug pcie</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/braswell-hot-plug-pcie/m-p/215952#M1074</link>
      <description>&lt;P&gt;hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;yes, it is related to the braswell pcie training thread, but i create another thread because it' another way for resolve my problem.&lt;/P&gt;&lt;P&gt;2 ways:&lt;/P&gt;&lt;P&gt;- launch training manually after loaded fpga.&lt;/P&gt;&lt;P&gt;- activate hot-plug for discover after loaded fpga ( hot-plug launch automatically training ...).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Sorry for convenience.&lt;/P&gt;&lt;P&gt;Sebastien&lt;/P&gt;</description>
      <pubDate>Wed, 26 Apr 2017 13:04:35 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/braswell-hot-plug-pcie/m-p/215952#M1074</guid>
      <dc:creator>sbass</dc:creator>
      <dc:date>2017-04-26T13:04:35Z</dc:date>
    </item>
    <item>
      <title>Re: braswell hot-plug pcie</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/braswell-hot-plug-pcie/m-p/215953#M1075</link>
      <description>&lt;P&gt;Hello, keziaha:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your clarification.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For tracking proposes and in order to avoid duplicate efforts,  we suggest you address this situation through the original thread (Carlos_A.&lt;/P&gt;</description>
      <pubDate>Wed, 26 Apr 2017 13:18:18 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/braswell-hot-plug-pcie/m-p/215953#M1075</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2017-04-26T13:18:18Z</dc:date>
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