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    <title>topic Change Host Control2 Register APL GP in Embedded Intel Atom® Processors</title>
    <link>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/Change-Host-Control2-Register-APL-GP/m-p/221760#M1216</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;From document number 557556 (EDS vol 2) there is at Offset 3Eh Host Control2 Register (hostcontrol2), I would like to change hostctrl2_driverstrength does someone has the configuration and how to apply to a ABL build?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Francesco &lt;/P&gt;</description>
    <pubDate>Fri, 04 Aug 2017 07:56:09 GMT</pubDate>
    <dc:creator>FCama1</dc:creator>
    <dc:date>2017-08-04T07:56:09Z</dc:date>
    <item>
      <title>Change Host Control2 Register APL GP</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/Change-Host-Control2-Register-APL-GP/m-p/221760#M1216</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;From document number 557556 (EDS vol 2) there is at Offset 3Eh Host Control2 Register (hostcontrol2), I would like to change hostctrl2_driverstrength does someone has the configuration and how to apply to a ABL build?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Francesco &lt;/P&gt;</description>
      <pubDate>Fri, 04 Aug 2017 07:56:09 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/Change-Host-Control2-Register-APL-GP/m-p/221760#M1216</guid>
      <dc:creator>FCama1</dc:creator>
      <dc:date>2017-08-04T07:56:09Z</dc:date>
    </item>
    <item>
      <title>Re: Change Host Control2 Register APL GP</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/Change-Host-Control2-Register-APL-GP/m-p/221761#M1217</link>
      <description>&lt;P&gt;Hello, fcamarda:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for contacting Intel Embedded Community.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The driver strength select field in Host Control 2 Register (bit 9 [hostctrl2_driverstrength_bit2]) defaults to "0" (3.3V mode drive strength [3.3V signaling]). Setting this bit to "1" selects the 1.8V mode drive strength [1.8V signaling].&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The driver strength depends on the setting of bit 15 (hostctrl2_presetvalueenable). If Preset Value Enable = 0, the driver strength is set by the host driver. If Preset Value Enable = 1, the driver strength is automatically set to the values specified in the Capabilities Register (capabilities)—Offset 40h (refer also to Capabilities Register (capabilities)—Offset 40h).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You can confirm this information in sections 22.5.29 and 22.5.30, on pages from 4511 to 4515 of the &lt;A href="https://edc.intel.com/Link.aspx?id=14201"&gt;https://edc.intel.com/Link.aspx?id=14201&lt;/A&gt; Apollo Lake SoC External Design Specification (EDS) Volume 2 of 3 document #  557556 that you have mentioned.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We hope that this information may help you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Carlos_A.&lt;/P&gt;</description>
      <pubDate>Fri, 04 Aug 2017 16:56:45 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/Change-Host-Control2-Register-APL-GP/m-p/221761#M1217</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2017-08-04T16:56:45Z</dc:date>
    </item>
    <item>
      <title>Re: Change Host Control2 Register APL GP</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/Change-Host-Control2-Register-APL-GP/m-p/221762#M1218</link>
      <description>&lt;P&gt;Hello  Carlos_A,&lt;/P&gt;&lt;P&gt;thank you for the details.&lt;/P&gt;&lt;P&gt;Now could you please tell me which is the file I have to change to implement hostctrl2_presetvalueenable = 1 (instead of 0) ? Where can I find the Host Control 2 Register config?&lt;/P&gt;&lt;P&gt;And then use the Capabilities Register  values that from my understanding came from the device (CAP) through the linux device driver ...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;  fcamarda&lt;/P&gt;</description>
      <pubDate>Mon, 07 Aug 2017 13:22:38 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/Change-Host-Control2-Register-APL-GP/m-p/221762#M1218</guid>
      <dc:creator>FCama1</dc:creator>
      <dc:date>2017-08-07T13:22:38Z</dc:date>
    </item>
    <item>
      <title>Re: Change Host Control2 Register APL GP</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/Change-Host-Control2-Register-APL-GP/m-p/221763#M1219</link>
      <description>&lt;P&gt;Hello, fcamarda:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your update.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In order to be on the same page, could you please tell me what Linux version and variant you are using for the cited propose?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Waiting for your clarification.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Carlos_A. &lt;/P&gt;</description>
      <pubDate>Mon, 07 Aug 2017 14:17:12 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/Change-Host-Control2-Register-APL-GP/m-p/221763#M1219</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2017-08-07T14:17:12Z</dc:date>
    </item>
    <item>
      <title>Re: Change Host Control2 Register APL GP</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/Change-Host-Control2-Register-APL-GP/m-p/221764#M1220</link>
      <description>&lt;P&gt;Hello  Carlos_A,&lt;/P&gt;&lt;P&gt;I am using the:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;linux-apl:&lt;/P&gt;&lt;P&gt;  meta-ias-gr-mrb-bsp  4.1.27&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;to build it I followed the guide Document Number: 567191-1.42 from the gp_bsp_ww23.5_ec31_pf_rc1.zip package for APL soc and GP board.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt; fcamarda&lt;/P&gt;</description>
      <pubDate>Mon, 07 Aug 2017 14:36:59 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/Change-Host-Control2-Register-APL-GP/m-p/221764#M1220</guid>
      <dc:creator>FCama1</dc:creator>
      <dc:date>2017-08-07T14:36:59Z</dc:date>
    </item>
    <item>
      <title>Re: Change Host Control2 Register APL GP</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/Change-Host-Control2-Register-APL-GP/m-p/221765#M1221</link>
      <description>&lt;P&gt;Hello, fcamarda:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your update.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In order to help you as a reference please address your last questions to the channels listed at the &lt;A href="http://git.yoctoproject.org/cgit/cgit.cgi/meta-intel/commit/"&gt;http://git.yoctoproject.org/cgit/cgit.cgi/meta-intel/commit/&lt;/A&gt; meta-intel - Layer containing Intel hardware support metadata website. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We hope that this information may help you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Carlos_A. &lt;/P&gt;</description>
      <pubDate>Mon, 07 Aug 2017 15:03:36 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/Change-Host-Control2-Register-APL-GP/m-p/221765#M1221</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2017-08-07T15:03:36Z</dc:date>
    </item>
    <item>
      <title>Re: Change Host Control2 Register APL GP</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/Change-Host-Control2-Register-APL-GP/m-p/221766#M1222</link>
      <description>&lt;P&gt;Hello  Carlos_A,&lt;/P&gt;&lt;P&gt;no feedback from meta-intel... Is there an other way to have this information?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks &amp;amp; Regards,&lt;/P&gt;&lt;P&gt; fcamarda&lt;/P&gt;</description>
      <pubDate>Fri, 11 Aug 2017 13:13:06 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/Change-Host-Control2-Register-APL-GP/m-p/221766#M1222</guid>
      <dc:creator>FCama1</dc:creator>
      <dc:date>2017-08-11T13:13:06Z</dc:date>
    </item>
    <item>
      <title>Re: Change Host Control2 Register APL GP</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/Change-Host-Control2-Register-APL-GP/m-p/221767#M1223</link>
      <description>&lt;P&gt;Hello, fcamarda:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your reply.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We suggest you address your consultations related to this topic at the channels listed at the following website as a reference:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://lists.yoctoproject.org/listinfo/meta-intel"&gt;https://lists.yoctoproject.org/listinfo/meta-intel&lt;/A&gt; &lt;A href="https://lists.yoctoproject.org/listinfo/meta-intel"&gt;https://lists.yoctoproject.org/listinfo/meta-intel&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We hope that this information may help you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Carlos_A.&lt;/P&gt;</description>
      <pubDate>Fri, 11 Aug 2017 13:24:35 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/Change-Host-Control2-Register-APL-GP/m-p/221767#M1223</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2017-08-11T13:24:35Z</dc:date>
    </item>
    <item>
      <title>Re: Change Host Control2 Register APL GP</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/Change-Host-Control2-Register-APL-GP/m-p/221768#M1224</link>
      <description>&lt;P&gt;Hi Carlos,&lt;/P&gt;&lt;P&gt;Could you also provide the decoding of the bit[5:4] hostctrl2_driverstrength value from 0x0 to 0x3? How it is mapped to the output impedance?&lt;/P&gt;&lt;P&gt;Thanks!&lt;/P&gt;</description>
      <pubDate>Wed, 22 Nov 2017 12:04:35 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/Change-Host-Control2-Register-APL-GP/m-p/221768#M1224</guid>
      <dc:creator>Jingyu_Z_Intel</dc:creator>
      <dc:date>2017-11-22T12:04:35Z</dc:date>
    </item>
    <item>
      <title>Re: Change Host Control2 Register APL GP</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/Change-Host-Control2-Register-APL-GP/m-p/221769#M1225</link>
      <description>&lt;P&gt;Hello, Maxzhou:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for contacting Intel Embedded Community.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In order to help you, we will contact you via email.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Carlos_A.&lt;/P&gt;</description>
      <pubDate>Wed, 22 Nov 2017 15:45:16 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/Change-Host-Control2-Register-APL-GP/m-p/221769#M1225</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2017-11-22T15:45:16Z</dc:date>
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