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    <title>topic Re: How to enable Secure Boot on Braswell? in Embedded Intel Atom® Processors</title>
    <link>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/How-to-enable-Secure-Boot-on-Braswell/m-p/668161#M3642</link>
    <description>&lt;P&gt;&lt;A href="https://community.intel.com/sfdc-users/Mæcenas_INTEL"&gt;@Mæcenas_INTEL&lt;/A&gt;​&amp;nbsp; thanks for your answer. I saw that document and roughly understand process. My main concern is about using it with coreboot as described for Bay Trail # 558081. Can anyone answer if procedure for Bay Trail will work on Braswell (of course assuming correct usage of FITc and other tools)?&lt;/P&gt;</description>
    <pubDate>Fri, 18 Jan 2019 08:11:39 GMT</pubDate>
    <dc:creator>pietrushnic</dc:creator>
    <dc:date>2019-01-18T08:11:39Z</dc:date>
    <item>
      <title>How to enable Secure Boot on Braswell?</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/How-to-enable-Secure-Boot-on-Braswell/m-p/668159#M3640</link>
      <description>&lt;P&gt;I'm looking for documents similar to 558081 "Enabling Secure Boot with Intel FSP&lt;/P&gt;&lt;P&gt;and coreboot for Intel Atom TM Processor E3800 Product Family" and&lt;/P&gt;&lt;P&gt;514966 "Bay Trail – M/D/T/I SoC Intel Trusted Execution Engine (Intel&lt;/P&gt;&lt;P&gt;TXE)", but instead Bay Trail I would like to understand how things work on Braswell.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;If procedure is the same or some way similar it would be great to get confirmation.&lt;/P&gt;</description>
      <pubDate>Wed, 16 Jan 2019 06:18:35 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/How-to-enable-Secure-Boot-on-Braswell/m-p/668159#M3640</guid>
      <dc:creator>pietrushnic</dc:creator>
      <dc:date>2019-01-16T06:18:35Z</dc:date>
    </item>
    <item>
      <title>Re: How to enable Secure Boot on Braswell?</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/How-to-enable-Secure-Boot-on-Braswell/m-p/668160#M3641</link>
      <description>&lt;P&gt;​Hello, &lt;A href="https://community.intel.com/sfdc-users/pietrushnic"&gt;@pietrushnic&lt;/A&gt;​&amp;nbsp;:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you for contacting Intel Embedded Community.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The information that may help you is stated on pages from 43 to 56 of the Braswell TXE Introduction document # 552582. This document should be accessible to you when you are logged into your Resource and Design Center (RDC) privileged account in the following website:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="http://www.intel.com/cd/edesign/library/asmo-na/eng/599923.htm"&gt;http://www.intel.com/cd/edesign/library/asmo-na/eng/599923.htm&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;In case that you want to update your RDC account, it should be processed by filling out the form stated at:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.intel.com/content/www/us/en/forms/design/contact-support.html"&gt;https://www.intel.com/content/www/us/en/forms/design/contact-support.html&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We hope that this information may help you.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.intel.com/sfdc-users/Mæcenas_INTEL"&gt;@Mæcenas_INTEL&lt;/A&gt;​.&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 17 Jan 2019 05:57:02 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/How-to-enable-Secure-Boot-on-Braswell/m-p/668160#M3641</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2019-01-17T05:57:02Z</dc:date>
    </item>
    <item>
      <title>Re: How to enable Secure Boot on Braswell?</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/How-to-enable-Secure-Boot-on-Braswell/m-p/668161#M3642</link>
      <description>&lt;P&gt;&lt;A href="https://community.intel.com/sfdc-users/Mæcenas_INTEL"&gt;@Mæcenas_INTEL&lt;/A&gt;​&amp;nbsp; thanks for your answer. I saw that document and roughly understand process. My main concern is about using it with coreboot as described for Bay Trail # 558081. Can anyone answer if procedure for Bay Trail will work on Braswell (of course assuming correct usage of FITc and other tools)?&lt;/P&gt;</description>
      <pubDate>Fri, 18 Jan 2019 08:11:39 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/How-to-enable-Secure-Boot-on-Braswell/m-p/668161#M3642</guid>
      <dc:creator>pietrushnic</dc:creator>
      <dc:date>2019-01-18T08:11:39Z</dc:date>
    </item>
    <item>
      <title>Re: How to enable Secure Boot on Braswell?</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/How-to-enable-Secure-Boot-on-Braswell/m-p/668162#M3643</link>
      <description>&lt;P&gt;​Hello, &lt;A href="https://community.intel.com/sfdc-users/pietrushnic"&gt;@pietrushnic&lt;/A&gt;​:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for your update.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Correct, Bay Trail's procedure&amp;nbsp;should work with Braswell as well, just using specific tools for each one.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We hope that this clarification is useful.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.intel.com/sfdc-users/Mæcenas_INTEL"&gt;@Mæcenas_INTEL&lt;/A&gt;​&lt;S&gt;.&lt;/S&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 29 Jan 2019 03:15:07 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Atom-Processors/How-to-enable-Secure-Boot-on-Braswell/m-p/668162#M3643</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2019-01-29T03:15:07Z</dc:date>
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