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    <title>topic Re: RMT process in Embedded Intel® Core™ Processors</title>
    <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/RMT-process/m-p/234913#M1813</link>
    <description>&lt;P&gt;Rank Margin Test&lt;/P&gt;</description>
    <pubDate>Fri, 17 Nov 2017 17:49:19 GMT</pubDate>
    <dc:creator>EKabi</dc:creator>
    <dc:date>2017-11-17T17:49:19Z</dc:date>
    <item>
      <title>RMT process</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/RMT-process/m-p/234911#M1811</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When RMT is data taken, wondering it's margining only one bit at a time OR multiple bits are margined simultaneously.&lt;/P&gt;&lt;P&gt;I would like to understand the sources of x-talk. Are only the nibble members are x-talk sources OR the byte members or only the associated strobe is the x-talk source?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Ehsan &lt;/P&gt;</description>
      <pubDate>Thu, 16 Nov 2017 23:39:58 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/RMT-process/m-p/234911#M1811</guid>
      <dc:creator>EKabi</dc:creator>
      <dc:date>2017-11-16T23:39:58Z</dc:date>
    </item>
    <item>
      <title>Re: RMT process</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/RMT-process/m-p/234912#M1812</link>
      <description>&lt;P&gt;Hello, EhsanK:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for contacting Intel Embedded Community.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In order to give you the proper information, could you please clarify us the meaning of the acronym RMT? Because it is associated with different technologies.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance for your clarification.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Carlos_A.&lt;/P&gt;</description>
      <pubDate>Fri, 17 Nov 2017 14:12:24 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/RMT-process/m-p/234912#M1812</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2017-11-17T14:12:24Z</dc:date>
    </item>
    <item>
      <title>Re: RMT process</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/RMT-process/m-p/234913#M1813</link>
      <description>&lt;P&gt;Rank Margin Test&lt;/P&gt;</description>
      <pubDate>Fri, 17 Nov 2017 17:49:19 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/RMT-process/m-p/234913#M1813</guid>
      <dc:creator>EKabi</dc:creator>
      <dc:date>2017-11-17T17:49:19Z</dc:date>
    </item>
    <item>
      <title>Re: RMT process</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/RMT-process/m-p/234914#M1814</link>
      <description>&lt;P&gt;Hello, EhsanK:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your clarification.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;However, could you please clarify us if the tool has been developed by Intel or a third party company? By the way, please give us the complete name and document or kit number associated with the mentioned tool.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We really appreciate your cooperation.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Carlos_A.&lt;/P&gt;</description>
      <pubDate>Mon, 20 Nov 2017 15:14:22 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/RMT-process/m-p/234914#M1814</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2017-11-20T15:14:22Z</dc:date>
    </item>
    <item>
      <title>Re: RMT process</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/RMT-process/m-p/234915#M1815</link>
      <description>&lt;P&gt;Hi Carlos,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It's developed by Intel. It does read, write DDR margining for voltage and timing axis.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Ehsan&lt;/P&gt;</description>
      <pubDate>Mon, 20 Nov 2017 17:53:39 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/RMT-process/m-p/234915#M1815</guid>
      <dc:creator>EKabi</dc:creator>
      <dc:date>2017-11-20T17:53:39Z</dc:date>
    </item>
    <item>
      <title>Re: RMT process</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/RMT-process/m-p/234916#M1816</link>
      <description>&lt;P&gt;Hello, EhsanK:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your clarification.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;However, it is still unclear what is the processor family related to this consultation, could you please give us at least the name of the family associated with this situation? In case that you have the document or kit please provide it as well.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We really appreciate your help.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Carlos_A.&lt;/P&gt;</description>
      <pubDate>Mon, 20 Nov 2017 18:00:36 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/RMT-process/m-p/234916#M1816</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2017-11-20T18:00:36Z</dc:date>
    </item>
    <item>
      <title>Re: RMT process</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/RMT-process/m-p/234917#M1817</link>
      <description>&lt;P&gt;Hi Carlos,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We run RMT in Skylake CPU as well as other CPUs.&lt;/P&gt;&lt;P&gt;One reference number for document is 555342.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Ehsan &lt;/P&gt;</description>
      <pubDate>Mon, 20 Nov 2017 19:14:14 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/RMT-process/m-p/234917#M1817</guid>
      <dc:creator>EKabi</dc:creator>
      <dc:date>2017-11-20T19:14:14Z</dc:date>
    </item>
    <item>
      <title>Re: RMT process</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/RMT-process/m-p/234918#M1818</link>
      <description>&lt;P&gt;Hello, EhsanK:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We really appreciate your replies.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In order to be on the same page, could you please clarify us if this trend is related to a technical problem of your design or RMT document #  555342 inconvenience?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks again for your collaboration.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Carlos_A.&lt;/P&gt;</description>
      <pubDate>Mon, 20 Nov 2017 19:30:15 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/RMT-process/m-p/234918#M1818</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2017-11-20T19:30:15Z</dc:date>
    </item>
    <item>
      <title>Re: RMT process</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/RMT-process/m-p/234919#M1819</link>
      <description>&lt;P&gt;Hi Carlos,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am not talking about any technical problem here. Doc #  I shared is for the purpose of letting you know what I mean by RMT.&lt;/P&gt;&lt;P&gt;I just asked a question about how RMT works; please see my original post.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Ehsan  &lt;/P&gt;</description>
      <pubDate>Mon, 20 Nov 2017 19:41:07 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/RMT-process/m-p/234919#M1819</guid>
      <dc:creator>EKabi</dc:creator>
      <dc:date>2017-11-20T19:41:07Z</dc:date>
    </item>
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