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    <title>topic Re: PCI Express TLP Hints ECN - any chipset support yet? in Embedded Intel® Core™ Processors</title>
    <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/PCI-Express-TLP-Hints-ECN-any-chipset-support-yet/m-p/247869#M2305</link>
    <description>&lt;P&gt;Hello Charles&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Welcome to the Intel® Embedded Community. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;TLP Hints is a feature of PCI Express 2.1.   Follow the link below to a paper that provides some additional info on PCIe 2.1 and 3.0: &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://www-ssl.intel.com/content/www/us/en/io/pci-express/intel-pci-pci-express-3-case-study.html?wapkw="&gt;https://www-ssl.intel.com/content/www/us/en/io/pci-express/intel-pci-pci-express-3-case-study.html?wapkw=&lt;/A&gt; &lt;A href="https://www-ssl.intel.com/content/www/us/en/io/pci-express/intel-pci-pci-express-3-case-study.html?wapkw="&gt;https://www-ssl.intel.com/content/www/us/en/io/pci-express/intel-pci-pci-express-3-case-study.html?wapkw=&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am told that the processor platforms currently shipping from Intel are at 2.0 level, not surprising considering the 3.0 spec was only recently published&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;While I can't make a direction statement on behalf of Intel, I think it's a no brainer that since Intel has spearheaded PCIe innovation ever since the inception of the original PCI that you will see 2.1 / 3.0 support in the processor future roadmap.  In fact if you Google "Intel PCI Express 3.0" you will find third-party articles on the subject.  &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Access to the Intel roadmap requires a Confidential Non-Disclosure Agreement (CNDA).   If you are interested in learning more, following is the best way:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Upgrade your community account to Privileged status with the following link.  This will initiate the CNDA process.  (If you are already a Privileged member, then you are already done with this step).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://edc.intel.com/My-Account.aspx"&gt;https://edc.intel.com/My-Account.aspx&lt;/A&gt; &lt;A href="https://edc.intel.com/My-Account.aspx"&gt;https://edc.intel.com/My-Account.aspx&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When you obtain Privileged status, please post another message to this thread and we will give you further directions.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I hope this helps.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Felix&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;J. Felix McNulty&lt;/P&gt;&lt;P&gt;Community Moderator (Intel contractor)&lt;/P&gt;</description>
    <pubDate>Wed, 07 Dec 2011 18:05:57 GMT</pubDate>
    <dc:creator>FMcNu1</dc:creator>
    <dc:date>2011-12-07T18:05:57Z</dc:date>
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      <title>PCI Express TLP Hints ECN - any chipset support yet?</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/PCI-Express-TLP-Hints-ECN-any-chipset-support-yet/m-p/247868#M2304</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;there is a PCI Express ECN called TLP Hints. Essentially it allows tagging data with a destination ID and a few attributes. One conceivable use would be to send critical data to a particular cache without writing through to memory and following this immediately by an MSI-MSI-X message. The IRP routine would then already find the critical data in the cache when it starts up: i.e. an improvement on Interrupt latency. Assuming the details of right target core, local memory (if NUMA) etc. etc. are set up correctly, of course.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So the real question, do any (preferrably high-end embedded for Xeon / Core ) chip sets currently support this feature. If not, are any scheduled for release in 2012?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Charles&lt;/P&gt;</description>
      <pubDate>Mon, 10 Oct 2011 22:27:58 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/PCI-Express-TLP-Hints-ECN-any-chipset-support-yet/m-p/247868#M2304</guid>
      <dc:creator>CGard3</dc:creator>
      <dc:date>2011-10-10T22:27:58Z</dc:date>
    </item>
    <item>
      <title>Re: PCI Express TLP Hints ECN - any chipset support yet?</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/PCI-Express-TLP-Hints-ECN-any-chipset-support-yet/m-p/247869#M2305</link>
      <description>&lt;P&gt;Hello Charles&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Welcome to the Intel® Embedded Community. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;TLP Hints is a feature of PCI Express 2.1.   Follow the link below to a paper that provides some additional info on PCIe 2.1 and 3.0: &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://www-ssl.intel.com/content/www/us/en/io/pci-express/intel-pci-pci-express-3-case-study.html?wapkw="&gt;https://www-ssl.intel.com/content/www/us/en/io/pci-express/intel-pci-pci-express-3-case-study.html?wapkw=&lt;/A&gt; &lt;A href="https://www-ssl.intel.com/content/www/us/en/io/pci-express/intel-pci-pci-express-3-case-study.html?wapkw="&gt;https://www-ssl.intel.com/content/www/us/en/io/pci-express/intel-pci-pci-express-3-case-study.html?wapkw=&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am told that the processor platforms currently shipping from Intel are at 2.0 level, not surprising considering the 3.0 spec was only recently published&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;While I can't make a direction statement on behalf of Intel, I think it's a no brainer that since Intel has spearheaded PCIe innovation ever since the inception of the original PCI that you will see 2.1 / 3.0 support in the processor future roadmap.  In fact if you Google "Intel PCI Express 3.0" you will find third-party articles on the subject.  &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Access to the Intel roadmap requires a Confidential Non-Disclosure Agreement (CNDA).   If you are interested in learning more, following is the best way:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Upgrade your community account to Privileged status with the following link.  This will initiate the CNDA process.  (If you are already a Privileged member, then you are already done with this step).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://edc.intel.com/My-Account.aspx"&gt;https://edc.intel.com/My-Account.aspx&lt;/A&gt; &lt;A href="https://edc.intel.com/My-Account.aspx"&gt;https://edc.intel.com/My-Account.aspx&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When you obtain Privileged status, please post another message to this thread and we will give you further directions.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I hope this helps.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Felix&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;J. Felix McNulty&lt;/P&gt;&lt;P&gt;Community Moderator (Intel contractor)&lt;/P&gt;</description>
      <pubDate>Wed, 07 Dec 2011 18:05:57 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/PCI-Express-TLP-Hints-ECN-any-chipset-support-yet/m-p/247869#M2305</guid>
      <dc:creator>FMcNu1</dc:creator>
      <dc:date>2011-12-07T18:05:57Z</dc:date>
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