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    <title>topic Why dose 82574 failed to read its PHY register？ in Embedded Intel® Core™ Processors</title>
    <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Why-dose-82574-failed-to-read-its-PHY-register/m-p/248381#M2317</link>
    <description>&lt;P&gt;Hi all,&lt;/P&gt;&lt;P&gt;    The 82574 under linux, failed to read its PHY registers through MDIC(0x00020 RW). The return value indicated that the bit30 of MDIC was set to 1. The datasheet describes : If the PHY does not generate a ZERO as the second bit of the turn-around cycle for reads, the MAC aborts the access, sets the E(error)bit, writes 0xFFFF to the data field to indicate an error condition, and sets the Ready bit.&lt;/P&gt;&lt;P&gt;   What does "generate a ZERO as...." mean? And how does it happen? Please help me if anyone knows that.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;  linwang&lt;/P&gt;</description>
    <pubDate>Fri, 02 Sep 2011 09:25:13 GMT</pubDate>
    <dc:creator>idata</dc:creator>
    <dc:date>2011-09-02T09:25:13Z</dc:date>
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      <title>Why dose 82574 failed to read its PHY register？</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Why-dose-82574-failed-to-read-its-PHY-register/m-p/248381#M2317</link>
      <description>&lt;P&gt;Hi all,&lt;/P&gt;&lt;P&gt;    The 82574 under linux, failed to read its PHY registers through MDIC(0x00020 RW). The return value indicated that the bit30 of MDIC was set to 1. The datasheet describes : If the PHY does not generate a ZERO as the second bit of the turn-around cycle for reads, the MAC aborts the access, sets the E(error)bit, writes 0xFFFF to the data field to indicate an error condition, and sets the Ready bit.&lt;/P&gt;&lt;P&gt;   What does "generate a ZERO as...." mean? And how does it happen? Please help me if anyone knows that.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;  linwang&lt;/P&gt;</description>
      <pubDate>Fri, 02 Sep 2011 09:25:13 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Why-dose-82574-failed-to-read-its-PHY-register/m-p/248381#M2317</guid>
      <dc:creator>idata</dc:creator>
      <dc:date>2011-09-02T09:25:13Z</dc:date>
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