<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Coreboot boot up on Serial port in Embedded Intel® Core™ Processors</title>
    <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Coreboot-boot-up-on-Serial-port/m-p/249612#M2356</link>
    <description>&lt;P&gt;Hello, IntelForum:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for contacting Intel Embedded Community.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We suggest you address this kind of consultations by filling out the &lt;A href="https://firmware.intel.com/content/support"&gt;https://firmware.intel.com/content/support&lt;/A&gt; Intel(R) Architecture Firmware Resource Center Support form.&lt;A href="https://firmware.intel.com/content/support"&gt;https://firmware.intel.com/content/support&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We hope that this information may help you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Carlos_A.&lt;/P&gt;</description>
    <pubDate>Fri, 03 Aug 2018 16:37:04 GMT</pubDate>
    <dc:creator>CarlosAM_INTEL</dc:creator>
    <dc:date>2018-08-03T16:37:04Z</dc:date>
    <item>
      <title>Coreboot boot up on Serial port</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Coreboot-boot-up-on-Serial-port/m-p/249611#M2355</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We would like to boot up the coreboot image in serial console. Our custom board contains a super I/O NCT5104D. We have done the below changes to enable the super I/O for our custom board. But no luck.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Added the below code line in \coreboot\src\mainboard\intel\leafhill\romstage.c&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;      # define SERIAL_DEV PNP_DEV(0x4E, NCT5104D_SP1)&lt;/P&gt;&lt;P&gt;nct5104d_enable_uartd(SERIAL_DEV);&lt;/P&gt;&lt;P&gt;             nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE)&lt;/P&gt;&lt;P&gt;             console_init();&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Added the PCI and IRQ details under &lt;B&gt;&lt;I&gt;device pci 1f.0 on #  - LPC bridge&lt;/I&gt;&lt;/B&gt; in \coreboot\src\mainboard\intel\leafhill\devicetree.cb&lt;/LI&gt;&lt;LI&gt;Selected "SUPERIO_NUVOTON_NCT5104D" under BOARD_SPECIFIC_OPTIONS in \coreboot\src\mainboard\intel\leafhill\Kconfig&lt;/LI&gt;&lt;LI&gt;Default console log level as 6 in \coreboot\src\console\Kconfig&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please advise if we are missing anything. &lt;/P&gt;&lt;P&gt;Please mention the serial console related configurations to be done in menuconfig.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Fri, 03 Aug 2018 09:00:18 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Coreboot-boot-up-on-Serial-port/m-p/249611#M2355</guid>
      <dc:creator>AAbee</dc:creator>
      <dc:date>2018-08-03T09:00:18Z</dc:date>
    </item>
    <item>
      <title>Re: Coreboot boot up on Serial port</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Coreboot-boot-up-on-Serial-port/m-p/249612#M2356</link>
      <description>&lt;P&gt;Hello, IntelForum:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for contacting Intel Embedded Community.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We suggest you address this kind of consultations by filling out the &lt;A href="https://firmware.intel.com/content/support"&gt;https://firmware.intel.com/content/support&lt;/A&gt; Intel(R) Architecture Firmware Resource Center Support form.&lt;A href="https://firmware.intel.com/content/support"&gt;https://firmware.intel.com/content/support&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We hope that this information may help you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Carlos_A.&lt;/P&gt;</description>
      <pubDate>Fri, 03 Aug 2018 16:37:04 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Coreboot-boot-up-on-Serial-port/m-p/249612#M2356</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2018-08-03T16:37:04Z</dc:date>
    </item>
  </channel>
</rss>

