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    <title>topic Re: Intel® Core™ i5-8500 Processor in Embedded Intel® Core™ Processors</title>
    <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Intel-Core-i5-8500-Processor/m-p/254174#M2568</link>
    <description>&lt;P&gt;Hello, akita_shoji:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for contacting Intel Embedded Community.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The Intel(R) Smart Cache refers to the architecture that allows all cores to dynamically share access to the last level cache. You may confirm this information and more details in the &lt;A href="https://software.intel.com/en-us/articles/software-techniques-for-shared-cache-multi-core-systems"&gt;https://software.intel.com/en-us/articles/software-techniques-for-shared-cache-multi-core-systems&lt;/A&gt; Software Techniques for Shared-Cache Multi-Core Systems article.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We hope that this information may help you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Carlos_A.&lt;/P&gt;</description>
    <pubDate>Thu, 29 Nov 2018 16:42:22 GMT</pubDate>
    <dc:creator>CarlosAM_INTEL</dc:creator>
    <dc:date>2018-11-29T16:42:22Z</dc:date>
    <item>
      <title>Intel® Core™ i5-8500 Processor</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Intel-Core-i5-8500-Processor/m-p/254173#M2567</link>
      <description>&lt;P&gt;Hello, Carlos_A&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you know what is smart cache mentioned in the ark site for this processor. I think I'll use this processor.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This is Akita.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a nice day.&lt;/P&gt;</description>
      <pubDate>Thu, 29 Nov 2018 15:58:18 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Intel-Core-i5-8500-Processor/m-p/254173#M2567</guid>
      <dc:creator>AShoj</dc:creator>
      <dc:date>2018-11-29T15:58:18Z</dc:date>
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    <item>
      <title>Re: Intel® Core™ i5-8500 Processor</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Intel-Core-i5-8500-Processor/m-p/254174#M2568</link>
      <description>&lt;P&gt;Hello, akita_shoji:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for contacting Intel Embedded Community.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The Intel(R) Smart Cache refers to the architecture that allows all cores to dynamically share access to the last level cache. You may confirm this information and more details in the &lt;A href="https://software.intel.com/en-us/articles/software-techniques-for-shared-cache-multi-core-systems"&gt;https://software.intel.com/en-us/articles/software-techniques-for-shared-cache-multi-core-systems&lt;/A&gt; Software Techniques for Shared-Cache Multi-Core Systems article.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We hope that this information may help you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Carlos_A.&lt;/P&gt;</description>
      <pubDate>Thu, 29 Nov 2018 16:42:22 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Intel-Core-i5-8500-Processor/m-p/254174#M2568</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2018-11-29T16:42:22Z</dc:date>
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