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    <title>topic Re: iASL (20140424) FPDT support not right ? in Embedded Intel® Core™ Processors</title>
    <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/iASL-20140424-FPDT-support-not-right/m-p/261799#M2768</link>
    <description>&lt;P&gt;I should mention that the iASL generated template subtype 0x0000 with a length of 0x30 corresponds to the structure shown in Table 5-109 which is described in section 5.2.23.7 as a record in a table that resides outside the FPDT table.&lt;/P&gt;</description>
    <pubDate>Wed, 30 Apr 2014 18:25:27 GMT</pubDate>
    <dc:creator>RMahn</dc:creator>
    <dc:date>2014-04-30T18:25:27Z</dc:date>
    <item>
      <title>iASL (20140424) FPDT support not right ?</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/iASL-20140424-FPDT-support-not-right/m-p/261798#M2767</link>
      <description>&lt;P&gt;It appears to me that the iASL 20140424 isn't properly handling the ACPI FPDT table.&lt;/P&gt;&lt;P&gt;The following information is the information that has lead me to the above conclusion.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This is my fist time looking at the FPDT table and would like some verification of my understanding and findings.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The AMI APTIO BIOS I'm working with has a FPDT table in the ACPI. When I use iASL to decompile the table I get an error that the table terminates in the middle of a data structure. When I have iASL generate a FPDT template file I see that the lengths of subtable type 0x0000 are different between the two.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Digging through the ACPI 5.0 spec it appears to me that the BIOS is correct and that iASL is making an illegal FPDT table template with the corresponding problem compiling and decompiling the BIOS table.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The ACPI 5.0 spec (5.2.23) covers the FPDT. That section is very, IMO, poorly organized which I believe has contributed to the problem in iASL. Table 5-101 shows that there are two active subtable types 0x0000 (Basic Boot Performance Pointer Record) and 0x0001 (S3 Performance Table Pointer Record).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The "Basic Boot Performance Pointer Record", subtype 0x0000, structure is detailed in table 5-104 and is 16 bytes in size (which is incorrectly labeled "S4 Performance Table Record Pointer" given the record type in the table is "Firmware Basic Boot Performance Pointer Record"). iASL in the generated template has a length of 48 (0x30) for this subtype.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The "S3 Performance Table Pointer Record", subtype 0x0001, structure is detailed in table 5-103 and is 16 bytes in size.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;RW-Everything is interpreting the same as what my understanding of the ACPI spec.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Here's what RW-Everything shows for the table.&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;Firmware Performance Data Table: 0x00000000DB908FD0&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;46 50 44 54 44 00 00 00 01 79 50 58 43 49 50 43 FPDTD....yPXCIPC&lt;/P&gt;&lt;P&gt;50 58 43 5F 43 49 53 5F 09 20 07 01 41 4D 49 20 PXC_CIS_. ..AMI &lt;/P&gt;&lt;P&gt;13 00 01 00 01 00 10 01 00 00 00 00 18 C0 F0 DB ................&lt;/P&gt;&lt;P&gt;00 00 00 00 00 00 10 01 00 00 00 00 38 C0 F0 DB ............8...&lt;/P&gt;&lt;P&gt;00 00 00 00                                     ....            &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Signature "FPDT"&lt;/P&gt;&lt;P&gt;Length 0x00000044 (68)&lt;/P&gt;&lt;P&gt;Revision 0x01 (1)&lt;/P&gt;&lt;P&gt;Checksum 0x79 (121)&lt;/P&gt;&lt;P&gt;OEM ID "PXCIPC"&lt;/P&gt;&lt;P&gt;OEM Table ID "PXC_CIS_"&lt;/P&gt;&lt;P&gt;OEM Revision 0x01072009 (17244169)&lt;/P&gt;&lt;P&gt;Creator ID "AMI "&lt;/P&gt;&lt;P&gt;Creator Revision 0x00010013 (65555)&lt;/P&gt;&lt;P&gt;Performance Records&lt;/P&gt;&lt;P&gt;  S3 Performance Table Pointer Record&lt;/P&gt;&lt;P&gt;    Record Type 0x0001 (1)&lt;/P&gt;&lt;P&gt;    Record Length 0x10 (16)&lt;/P&gt;&lt;P&gt;    Revision 0x01 (1)&lt;/P&gt;&lt;P&gt;    Reserved 0x00000000&lt;/P&gt;&lt;P&gt;    S3PT Pointer 0x00000000DBF0C018&lt;/P&gt;&lt;P&gt;      ...&lt;/P&gt;&lt;P&gt;  S4 Performance Table Pointer Record&lt;/P&gt;&lt;P&gt;    Record Type 0x0000 (0)&lt;/P&gt;&lt;P&gt;    Record Length 0x10 (16)&lt;/P&gt;&lt;P&gt;    Revision 0x01 (1)&lt;/P&gt;&lt;P&gt;    Reserved 0x00000000&lt;/P&gt;&lt;P&gt;    FBPT Pointer 0x00000000DBF0C038&lt;/P&gt;&lt;P&gt;      ...&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Here's the iASL decompile of the table shown above.&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;/*&lt;/P&gt;&lt;P&gt; * Intel ACPI Component Architecture&lt;/P&gt;&lt;P&gt; * AML Disassembler version 20140424-32 [Apr 24 2014]&lt;/P&gt;&lt;P&gt; * Copyright (c) 2000 - 2014 Intel Corporation&lt;/P&gt;&lt;P&gt; * &lt;/P&gt;&lt;P&gt; * Disassembly of DB908FD0_FPDT.bin, Wed Apr 30 09:39:53 2014&lt;/P&gt;&lt;P&gt; *&lt;/P&gt;&lt;P&gt; * ACPI Data Table [FPDT]&lt;/P&gt;&lt;P&gt; *&lt;/P&gt;&lt;P&gt; * Format: [HexOffset DecimalOffset ByteLength]  FieldName : FieldValue&lt;/P&gt;&lt;P&gt;&amp;lt;span style="font-family: 'co...&lt;/P&gt;</description>
      <pubDate>Wed, 30 Apr 2014 16:58:33 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/iASL-20140424-FPDT-support-not-right/m-p/261798#M2767</guid>
      <dc:creator>RMahn</dc:creator>
      <dc:date>2014-04-30T16:58:33Z</dc:date>
    </item>
    <item>
      <title>Re: iASL (20140424) FPDT support not right ?</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/iASL-20140424-FPDT-support-not-right/m-p/261799#M2768</link>
      <description>&lt;P&gt;I should mention that the iASL generated template subtype 0x0000 with a length of 0x30 corresponds to the structure shown in Table 5-109 which is described in section 5.2.23.7 as a record in a table that resides outside the FPDT table.&lt;/P&gt;</description>
      <pubDate>Wed, 30 Apr 2014 18:25:27 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/iASL-20140424-FPDT-support-not-right/m-p/261799#M2768</guid>
      <dc:creator>RMahn</dc:creator>
      <dc:date>2014-04-30T18:25:27Z</dc:date>
    </item>
    <item>
      <title>Re: iASL (20140424) FPDT support not right ?</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/iASL-20140424-FPDT-support-not-right/m-p/261800#M2769</link>
      <description>&lt;P&gt;Hello!  We are looking into this for you.  There has been a delay due to some holidays, but I wanted you to know that we will address this as soon as possible.  Lynn&lt;/P&gt;</description>
      <pubDate>Fri, 02 May 2014 16:57:26 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/iASL-20140424-FPDT-support-not-right/m-p/261800#M2769</guid>
      <dc:creator>Natalie_Z_Intel</dc:creator>
      <dc:date>2014-05-02T16:57:26Z</dc:date>
    </item>
    <item>
      <title>Re: iASL (20140424) FPDT support not right ?</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/iASL-20140424-FPDT-support-not-right/m-p/261801#M2770</link>
      <description>&lt;P&gt;Thank you for your posting. We will pass your findings on to our BIOS team. As BIOS code is the responsibility of each board manufacturer to provide or purchases a BIOS code based off a given BIOS vendor's code it is the&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;board manufacturer responsibility to make sure all code is verified on their platform.  We encourage customers to contact their board manufacturer and report issues to a specific platform or code base.  If the board manufacture determines an issue with their platform, they will work with Intel on a resolution.</description>
      <pubDate>Tue, 06 May 2014 16:04:10 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/iASL-20140424-FPDT-support-not-right/m-p/261801#M2770</guid>
      <dc:creator>Natalie_Z_Intel</dc:creator>
      <dc:date>2014-05-06T16:04:10Z</dc:date>
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