<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: S/W strap for x16 or x8/x8 on PEG in Embedded Intel® Core™ Processors</title>
    <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/S-W-strap-for-x16-or-x8-x8-on-PEG/m-p/675212#M3312</link>
    <description>&lt;P&gt;Hello, &lt;A href="https://community.intel.com/sfdc-users/JLin7"&gt;@JLin7&lt;/A&gt;​:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you for contacting Intel Embedded Community.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Could you please let us know the part number of the processors related to this thread?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We are waiting for your answer.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.intel.com/sfdc-users/Mæcenas_INTEL"&gt;@Mæcenas_INTEL&lt;/A&gt;​. &lt;/P&gt;</description>
    <pubDate>Tue, 15 Oct 2019 03:01:02 GMT</pubDate>
    <dc:creator>CarlosAM_INTEL</dc:creator>
    <dc:date>2019-10-15T03:01:02Z</dc:date>
    <item>
      <title>S/W strap for x16 or x8/x8 on PEG</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/S-W-strap-for-x16-or-x8-x8-on-PEG/m-p/675211#M3311</link>
      <description>&lt;P&gt;Currently, we change the CFG5&amp;amp;CFG6 Pull-up/Pull-down by hardware to configure the PEG with x16 or x8+x8(bifurcation).&lt;/P&gt;&lt;P&gt;I wonder is it possible to configure the PEG with x16 or x8+x8 only by BIOS setting?&lt;/P&gt;</description>
      <pubDate>Mon, 14 Oct 2019 16:03:21 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/S-W-strap-for-x16-or-x8-x8-on-PEG/m-p/675211#M3311</guid>
      <dc:creator>JLin7</dc:creator>
      <dc:date>2019-10-14T16:03:21Z</dc:date>
    </item>
    <item>
      <title>Re: S/W strap for x16 or x8/x8 on PEG</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/S-W-strap-for-x16-or-x8-x8-on-PEG/m-p/675212#M3312</link>
      <description>&lt;P&gt;Hello, &lt;A href="https://community.intel.com/sfdc-users/JLin7"&gt;@JLin7&lt;/A&gt;​:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you for contacting Intel Embedded Community.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Could you please let us know the part number of the processors related to this thread?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We are waiting for your answer.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.intel.com/sfdc-users/Mæcenas_INTEL"&gt;@Mæcenas_INTEL&lt;/A&gt;​. &lt;/P&gt;</description>
      <pubDate>Tue, 15 Oct 2019 03:01:02 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/S-W-strap-for-x16-or-x8-x8-on-PEG/m-p/675212#M3312</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2019-10-15T03:01:02Z</dc:date>
    </item>
    <item>
      <title>Re: S/W strap for x16 or x8/x8 on PEG</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/S-W-strap-for-x16-or-x8-x8-on-PEG/m-p/675213#M3313</link>
      <description>&lt;P&gt;Hi &lt;A href="https://community.intel.com/sfdc-users/Mæcenas_INTEL"&gt;@Mæcenas_INTEL&lt;/A&gt;​&amp;nbsp;,&lt;/P&gt;&lt;P&gt;   The CPU model is i3-7101TE.&lt;/P&gt;</description>
      <pubDate>Tue, 15 Oct 2019 09:12:50 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/S-W-strap-for-x16-or-x8-x8-on-PEG/m-p/675213#M3313</guid>
      <dc:creator>JLin7</dc:creator>
      <dc:date>2019-10-15T09:12:50Z</dc:date>
    </item>
    <item>
      <title>Re: S/W strap for x16 or x8/x8 on PEG</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/S-W-strap-for-x16-or-x8-x8-on-PEG/m-p/675214#M3314</link>
      <description>&lt;P&gt;Hello , &lt;A href="https://community.intel.com/sfdc-users/JLin7"&gt;@JLin7&lt;/A&gt;​:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for your clarification.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We suggest you review with the assistance of your BIOS vendor the information stated in sections 3.2, 12.13.2, 12.17.1, 14.6.4, 14.6.7, 14.6.20.1, 14.7.1.2.4, 14.11, 14.13, and 17.2; on pages 46, 175, 184, 205, 206, 212, 215, 222, 223, and 237 of the Skylake, Kaby Lake and Coffee Lake, Whiskey Lake and Comet Lake Processor Family Core and Uncore BIOS Specification document # 550049. It can be found when you are logged into your Resource &amp;amp; Design Center (RDC) privileged account at the following website:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="http://www.intel.com/cd/edesign/library/asmo-na/eng/550049.htm"&gt;http://www.intel.com/cd/edesign/library/asmo-na/eng/550049.htm&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The RDC Account Support form is the channel to process your account update request or any inconvenience related to the provided website. It can be found at:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.intel.com/content/www/us/en/forms/design/contact-support.html"&gt;https://www.intel.com/content/www/us/en/forms/design/contact-support.html&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.intel.com/sfdc-users/Mæcenas_INTEL"&gt;@Mæcenas_INTEL&lt;/A&gt;​.&lt;/P&gt;</description>
      <pubDate>Tue, 15 Oct 2019 20:56:53 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/S-W-strap-for-x16-or-x8-x8-on-PEG/m-p/675214#M3314</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2019-10-15T20:56:53Z</dc:date>
    </item>
  </channel>
</rss>

