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    <title>topic Re: CML PDG doc#612044 SODIMM questions in Embedded Intel® Core™ Processors</title>
    <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/CML-PDG-doc-612044-SODIMM-questions/m-p/691795#M3371</link>
    <description>&lt;P&gt;Hello, &lt;A href="https://community.intel.com/sfdc-users/佳蔡"&gt;@佳蔡&lt;/A&gt;​:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for your clarification.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The Comet Lake Platform Memory Interface I/O Package Trace Length document # 606072 may help you. This document can be found when you are logged into your Resource &amp;amp; Design Center (RDC) privileged account on the following website:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="http://www.intel.com/cd/edesign/library/asmo-na/eng/606072.htm"&gt;http://www.intel.com/cd/edesign/library/asmo-na/eng/606072.htm&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The RDC Account Support form is the channel to process your account update request or any inconvenience related to the provided websites. It can be found at:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.intel.com/content/www/us/en/forms/support/my-intel-sign-on-support.html"&gt;https://www.intel.com/content/www/us/en/forms/support/my-intel-sign-on-support.html&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.intel.com/sfdc-users/Mæcenas_INTEL"&gt;@Mæcenas_INTEL&lt;/A&gt;​.&lt;/P&gt;</description>
    <pubDate>Tue, 26 May 2020 04:13:05 GMT</pubDate>
    <dc:creator>CarlosAM_INTEL</dc:creator>
    <dc:date>2020-05-26T04:13:05Z</dc:date>
    <item>
      <title>CML PDG doc#612044 SODIMM questions</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/CML-PDG-doc-612044-SODIMM-questions/m-p/691792#M3368</link>
      <description>&lt;P&gt;Hi &lt;/P&gt;&lt;P&gt;Because I will use 4 SODIMM, I don't find the DDR4 SODIMM routing guide. Can you help to check this item?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="2020-05-22_143202.jpg"&gt;&lt;img src="https://community.intel.com/t5/image/serverpage/image-id/3133iF6824BA7B609D966/image-size/large?v=v2&amp;amp;px=999&amp;amp;whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright" role="button" title="2020-05-22_143202.jpg" alt="2020-05-22_143202.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;B.R&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 22 May 2020 13:36:21 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/CML-PDG-doc-612044-SODIMM-questions/m-p/691792#M3368</guid>
      <dc:creator>佳蔡</dc:creator>
      <dc:date>2020-05-22T13:36:21Z</dc:date>
    </item>
    <item>
      <title>Re: CML PDG doc#612044 SODIMM questions</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/CML-PDG-doc-612044-SODIMM-questions/m-p/691793#M3369</link>
      <description>&lt;P&gt;Hello, &lt;A href="https://community.intel.com/sfdc-users/佳蔡"&gt;@佳蔡&lt;/A&gt;​:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you for contacting Intel Embedded Community.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;It is important to clarify that there is no Platform Design Guide (PDG) associated with the document #612044. &lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Due to this fact, could you please let us know the part number of the processors associated with this forum? Because we want to be sure that the provided information is proper to help you.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We are waiting for your clarification.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.intel.com/sfdc-users/Mæcenas_INTEL"&gt;@Mæcenas_INTEL&lt;/A&gt;​.&lt;/P&gt;</description>
      <pubDate>Fri, 22 May 2020 23:15:10 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/CML-PDG-doc-612044-SODIMM-questions/m-p/691793#M3369</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2020-05-22T23:15:10Z</dc:date>
    </item>
    <item>
      <title>Re: CML PDG doc#612044 SODIMM questions</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/CML-PDG-doc-612044-SODIMM-questions/m-p/691794#M3370</link>
      <description>&lt;P&gt;Sorry!&lt;/P&gt;&lt;P&gt; The document number is  #610244.&lt;/P&gt;</description>
      <pubDate>Mon, 25 May 2020 08:34:58 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/CML-PDG-doc-612044-SODIMM-questions/m-p/691794#M3370</guid>
      <dc:creator>佳蔡</dc:creator>
      <dc:date>2020-05-25T08:34:58Z</dc:date>
    </item>
    <item>
      <title>Re: CML PDG doc#612044 SODIMM questions</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/CML-PDG-doc-612044-SODIMM-questions/m-p/691795#M3371</link>
      <description>&lt;P&gt;Hello, &lt;A href="https://community.intel.com/sfdc-users/佳蔡"&gt;@佳蔡&lt;/A&gt;​:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for your clarification.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The Comet Lake Platform Memory Interface I/O Package Trace Length document # 606072 may help you. This document can be found when you are logged into your Resource &amp;amp; Design Center (RDC) privileged account on the following website:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="http://www.intel.com/cd/edesign/library/asmo-na/eng/606072.htm"&gt;http://www.intel.com/cd/edesign/library/asmo-na/eng/606072.htm&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The RDC Account Support form is the channel to process your account update request or any inconvenience related to the provided websites. It can be found at:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.intel.com/content/www/us/en/forms/support/my-intel-sign-on-support.html"&gt;https://www.intel.com/content/www/us/en/forms/support/my-intel-sign-on-support.html&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.intel.com/sfdc-users/Mæcenas_INTEL"&gt;@Mæcenas_INTEL&lt;/A&gt;​.&lt;/P&gt;</description>
      <pubDate>Tue, 26 May 2020 04:13:05 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/CML-PDG-doc-612044-SODIMM-questions/m-p/691795#M3371</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2020-05-26T04:13:05Z</dc:date>
    </item>
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