topic Re: How to test the insertion loss following the delta L Methodology for Electrical Characterization in Embedded Intel® Core™ Processors

How to test the insertion loss following the delta L Methodology for Electrical Characterization

Pippen — Thu, 13 Aug 2020 11:08:55 GMT

Dear Intel team, Our company Sunshine global circuits is a Chinese based PCB maker located in Senzhen city, China. Many customer asked us to measure insertion loss or return loss of the trace on the board. From intel website, we know the delta L Methodology for Electrical Characterization, but we don't know how to design this kind of circuits on the testing board. Can we get more information about this technology or give us the contact window to talk? Brs, Pippen

Re: How to test the insertion loss following the delta L Methodology for Electrical Characterization

CarlosAM_INTEL — Thu, 13 Aug 2020 16:42:12 GMT

Hello, @Pippen:

Thank you for contacting Intel Embedded Community.

You can find the information that may help you on the following websites:

https://www.intel.com/content/dam/www/public/us/en/documents/guides/delta-l-methodology-for-electrical-characterization-guide.pdf

https://www.intel.com/content/dam/www/public/us/en/documents/guides/delta-l-plus-methodology-for-electrical-characterization-guide.pdf

Best Regards,

@CarlosAM_INTEL

Re: How to test the insertion loss following the delta L Methodology for Electrical Characterization

Pippen — Fri, 14 Aug 2020 09:02:46 GMT

Hi, @CarlosAM_INTEL ,

Thnaks for your reply. I got this two documents and read it detailly. For a designer with less experience on this technology, we want to know how to design a real circuits layout including impedence, line width, pad size and distacne, micro stripline, stripline, etc. I got news from my friend that we should get a licence from Intel Co., then we can get the detailed gerber file. Could you give me any idea about this?

Thank you

Brs,

Pippen

Re: How to test the insertion loss following the delta L Methodology for Electrical Characterization

CarlosAM_INTEL — Fri, 14 Aug 2020 14:27:03 GMT

Hello, @Pippen:

Thanks for your reply.

We suggest following the layout guidelines stated in the Platform Design Guide (PDG) document and any documents associated with it.

These documents and files that you have mentioned generally require that you have access to a Resource & Design Center (RDC) privileged account.

The RDC Account Support form is the channel to process your update account. You should fill it out on the following website:

https://www.intel.com/content/www/us/en/forms/support/my-intel-sign-on-support.html

Best regards,

@CarlosAM_INTEL.

Re: How to test the insertion loss following the delta L Methodology for Electrical Characterization

Pippen — Tue, 18 Aug 2020 00:28:44 GMT

@Mæcenas_INTEL.

Thanks for your reply, I follow your suggestion and try to send a request to get the RDC account. I filled all the items and want to press "submit request" button, but it can't press. I tried several times and finally I give up. What's my next step?

Re: How to test the insertion loss following the delta L Methodology for Electrical Characterization

CarlosAM_INTEL — Tue, 18 Aug 2020 15:27:58 GMT

Hello, @Pippen:

Thanks for your reply.

Once you have your RDC privileged account, you will have access to the documentation mentioned on our previous communication that can be found for each product in the following website:

https://ark.intel.com/content/www/us/en/ark.html#@Processors

Best regards,

@CarlosAM_INTEL.

Re: How to test the insertion loss following the delta L Methodology for Electrical Characterization

arios — Wed, 25 Oct 2023 19:04:41 GMT

Hello,

These links don't work. Are documents still available? thanks

https://www.intel.com/content/dam/www/public/us/en/documents/guides/delta-l-methodology-for-electrical-characterization-guide.pdf

https://www.intel.com/content/dam/www/public/us/en/documents/guides/delta-l-plus-methodology-for-electrical-characterization-guide.pdf

Re: How to test the insertion loss following the delta L Methodology for Electrical Characterization

Diego_INTEL — Sat, 28 Oct 2023 03:44:50 GMT

Hello @arios,

Thank you for contacting Intel Embedded Community.

You are right, these links are wrong, my apologies for the inconvenience.

In RDC, there are some documents regarding Delta-L methodology:

https://rdc.intel.com/

Document #527628 - Delta-L Methodology for Electrical Characterization

Document #568775 - Delta-L Study for PCB Electrical Characterization

Document #567187 - De-embedding Study for Delta-L Metrology in PCB Electrical Characterization

Also, these ones may be of help too:

Document #570615 - Intel® Transmission line De-embedding Tool (Intel® TDT) Software

Document #570616 - Intel® Transmission line De-embedding Tool (Intel® TDT) User Guide

You will need a Premier account in order to get access to these documents or you may ask to an Intel Sales Representative in any Authorized Distributor Partner near your zone.

https://www.intel.com/content/www/us/en/support/articles/000058073/programs/resource-and-documentation-center.html

https://www.intel.com/content/www/us/en/partner/showcase/partner-directory/distributor.html#sort=relevancy

Best regards,

@Diego_INTEL