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    <title>topic DPDK 20.11 compile issue in Embedded Intel® Core™ Processors</title>
    <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/DPDK-20-11-compile-issue/m-p/1274291#M3812</link>
    <description>&lt;P&gt;&lt;SPAN&gt;Trying to build DPDK 20.11. Build with default machine type ("native") works. But, got an error when setting a x86 machine type, e.g.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp;meson -Dmachine=silvermont build&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;The problem seems with compiler setting. File $(DPDK_ROOT)/config/x86/meson.build has code:&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;# we require SSE4.2 for DPDK&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;if cc.get_define('__SSE4_2__', args: machine_args) == ''&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;message('SSE 4.2 not enabled by default, explicitly enabling')&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;machine_args += '-msse4'&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;endif&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;The error is: "Could not get define '__SSE4_2__'&amp;nbsp;&amp;nbsp; "&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;How to resolve this issue?&amp;nbsp; What have I missed? Thanks.&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Fri, 16 Apr 2021 17:37:29 GMT</pubDate>
    <dc:creator>qlin2000</dc:creator>
    <dc:date>2021-04-16T17:37:29Z</dc:date>
    <item>
      <title>DPDK 20.11 compile issue</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/DPDK-20-11-compile-issue/m-p/1274291#M3812</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Trying to build DPDK 20.11. Build with default machine type ("native") works. But, got an error when setting a x86 machine type, e.g.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp;meson -Dmachine=silvermont build&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;The problem seems with compiler setting. File $(DPDK_ROOT)/config/x86/meson.build has code:&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;# we require SSE4.2 for DPDK&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;if cc.get_define('__SSE4_2__', args: machine_args) == ''&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;message('SSE 4.2 not enabled by default, explicitly enabling')&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;machine_args += '-msse4'&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;endif&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;The error is: "Could not get define '__SSE4_2__'&amp;nbsp;&amp;nbsp; "&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;How to resolve this issue?&amp;nbsp; What have I missed? Thanks.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 16 Apr 2021 17:37:29 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/DPDK-20-11-compile-issue/m-p/1274291#M3812</guid>
      <dc:creator>qlin2000</dc:creator>
      <dc:date>2021-04-16T17:37:29Z</dc:date>
    </item>
    <item>
      <title>Re: DPDK 20.11 compile issue</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/DPDK-20-11-compile-issue/m-p/1274313#M3813</link>
      <description>&lt;P&gt;Hello,&amp;nbsp;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/161037"&gt;@qlin2000&lt;/a&gt;:&lt;/P&gt;
&lt;P&gt;Thank you for contacting Intel Embedded Community.&lt;/P&gt;
&lt;P&gt;You should address your&amp;nbsp;Data Plane Development Kit (DPDK) consultations as a reference to the channels listed on the following website:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.dpdk.org/contribute/#mailing-lists" target="_blank"&gt;https://www.dpdk.org/contribute/#mailing-lists&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/114"&gt;@CarlosAM_INTEL&lt;/a&gt;.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 16 Apr 2021 19:49:36 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/DPDK-20-11-compile-issue/m-p/1274313#M3813</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2021-04-16T19:49:36Z</dc:date>
    </item>
    <item>
      <title>Re: DPDK 20.11 compile issue</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/DPDK-20-11-compile-issue/m-p/1281924#M3853</link>
      <description>&lt;P&gt;You might get help following this link&lt;/P&gt;
&lt;P&gt;&lt;A href="https://stackoverflow.com/questions/41293077/how-to-compile-tensorflow-with-sse4-2-and-avx-instructions" target="_self"&gt;https://stackoverflow.com/questions/41293077/how-to-compile-tensorflow-with-sse4-2-and-avx-instructions&lt;/A&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 17 May 2021 12:06:59 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/DPDK-20-11-compile-issue/m-p/1281924#M3853</guid>
      <dc:creator>ZeKay</dc:creator>
      <dc:date>2021-05-17T12:06:59Z</dc:date>
    </item>
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