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    <title>topic Re: Tiger Lake UP3 i7-1185GRE LPDDR4 IBIS simulation model in Embedded Intel® Core™ Processors</title>
    <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1444935#M4381</link>
    <description>&lt;P&gt;Yes.&amp;nbsp; that would be really wonderful.&amp;nbsp; could you please provide some leads ?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;best regards&lt;/P&gt;
&lt;P&gt;Husain&lt;/P&gt;</description>
    <pubDate>Mon, 09 Jan 2023 09:34:03 GMT</pubDate>
    <dc:creator>husainak</dc:creator>
    <dc:date>2023-01-09T09:34:03Z</dc:date>
    <item>
      <title>Tiger Lake UP3 i7-1185GRE LPDDR4 IBIS simulation model</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1375155#M4164</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;For a customer design with the&amp;nbsp;Intel Tiger Lake i7-1185GRE and dual x64 LPDDR4 I'm asked to perform Signal Integrity and LPDDR4 Timing analysis on short notice.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;For this&amp;nbsp;I need an IBIS model for the i7-1185GRE. Is it possible to obtain it through here? If NDA is needed please let me know. This can be arranged.&lt;/P&gt;
&lt;P&gt;Customer already has the NDA and model but is prohibited by the NDA to share it with us.&lt;/P&gt;
&lt;P&gt;Also if available we would like to get our hands on on-die decoupling models for Power Integrity analysis.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;And depending on how the package is modeled for (LP)DDR4 a s-parameter package model might also be needed.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;/P&gt;</description>
      <pubDate>Thu, 07 Apr 2022 10:16:02 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1375155#M4164</guid>
      <dc:creator>Wouter_Sintecs_NL</dc:creator>
      <dc:date>2022-04-07T10:16:02Z</dc:date>
    </item>
    <item>
      <title>Re: Tiger Lake UP3 i7-1185GRE LPDDR4 IBIS simulation model</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1375422#M4169</link>
      <description>&lt;P&gt;Hi Wouter,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Please check your registered email, as I sent you some feedback about your request.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Jaime L.&lt;/P&gt;
&lt;P&gt;Intel Customer Support Engineer&lt;/P&gt;</description>
      <pubDate>Fri, 08 Apr 2022 03:35:08 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1375422#M4169</guid>
      <dc:creator>Jaime_Lizarme</dc:creator>
      <dc:date>2022-04-08T03:35:08Z</dc:date>
    </item>
    <item>
      <title>Re: Tiger Lake UP3 i7-1185GRE LPDDR4 IBIS simulation model</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1444402#M4377</link>
      <description>&lt;P&gt;Hi Jaime,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I also have the same query can you update me on this.&lt;/P&gt;</description>
      <pubDate>Fri, 06 Jan 2023 07:33:39 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1444402#M4377</guid>
      <dc:creator>husainak</dc:creator>
      <dc:date>2023-01-06T07:33:39Z</dc:date>
    </item>
    <item>
      <title>Re: Tiger Lake UP3 i7-1185GRE LPDDR4 IBIS simulation model</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1444468#M4378</link>
      <description>&lt;P class="sub_section_element_selectors"&gt;Hello,&amp;nbsp;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/159196"&gt;@husainak&lt;/a&gt;:&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;Thank you for contacting Intel Embedded Community.&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;You need to update your profile to the premier option to help you. You should fill out the form stated on the following website:&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&lt;BR /&gt;&lt;A class="sub_section_element_selectors" href="https://www.intel.com/content/www/us/en/forms/developer/premier-registration.html" target="_blank" rel="nofollow noopener noreferrer"&gt;https://www.intel.com/content/www/us/en/forms/developer/premier-registration.html&lt;/A&gt;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&lt;BR /&gt;You should use a business email address to evade any inconvenience. Please avoid the free email provider's address (such as the one provided by Hotmail, Gmail, Yahoo, or others).&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;Best regards,&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/114"&gt;@CarlosAM_INTEL&lt;/a&gt;.&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 06 Jan 2023 14:01:10 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1444468#M4378</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2023-01-06T14:01:10Z</dc:date>
    </item>
    <item>
      <title>Re: Tiger Lake UP3 i7-1185GRE LPDDR4 IBIS simulation model</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1444901#M4379</link>
      <description>&lt;P&gt;Hello &lt;A class="sub_section_element_selectors" href="https://community.intel.com/t5/user/viewprofilepage/user-id/114" target="_blank"&gt;@CarlosAM_INTEL,&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;We are already have&amp;nbsp; " Developer Zone Premier"&amp;nbsp; rdc account .&amp;nbsp; Request to provide post layout signal integrity analysis support for our custom pcb design. &lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;regards&lt;/P&gt;
&lt;P&gt;Husain&lt;/P&gt;</description>
      <pubDate>Mon, 09 Jan 2023 07:27:46 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1444901#M4379</guid>
      <dc:creator>husainak</dc:creator>
      <dc:date>2023-01-09T07:27:46Z</dc:date>
    </item>
    <item>
      <title>Re: Tiger Lake UP3 i7-1185GRE LPDDR4 IBIS simulation model</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1444918#M4380</link>
      <description>&lt;P&gt;Hello Husain,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Are you looking for a service provider that can provide post layout signal integrity analysis on your custom PCB design?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;best regards Wouter&lt;/P&gt;</description>
      <pubDate>Mon, 09 Jan 2023 08:04:33 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1444918#M4380</guid>
      <dc:creator>Wouter_Sintecs_NL</dc:creator>
      <dc:date>2023-01-09T08:04:33Z</dc:date>
    </item>
    <item>
      <title>Re: Tiger Lake UP3 i7-1185GRE LPDDR4 IBIS simulation model</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1444935#M4381</link>
      <description>&lt;P&gt;Yes.&amp;nbsp; that would be really wonderful.&amp;nbsp; could you please provide some leads ?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;best regards&lt;/P&gt;
&lt;P&gt;Husain&lt;/P&gt;</description>
      <pubDate>Mon, 09 Jan 2023 09:34:03 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1444935#M4381</guid>
      <dc:creator>husainak</dc:creator>
      <dc:date>2023-01-09T09:34:03Z</dc:date>
    </item>
    <item>
      <title>Re: Tiger Lake UP3 i7-1185GRE LPDDR4 IBIS simulation model</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1444938#M4382</link>
      <description>&lt;P&gt;Hello Husain,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;We can perform SI analysis. You can contact us on &lt;A href="mailto:info@sintecs.nl" target="_blank"&gt;info@sintecs.nl&lt;/A&gt;.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;best regards Wouter&lt;/P&gt;</description>
      <pubDate>Mon, 09 Jan 2023 09:49:16 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1444938#M4382</guid>
      <dc:creator>Wouter_Sintecs_NL</dc:creator>
      <dc:date>2023-01-09T09:49:16Z</dc:date>
    </item>
    <item>
      <title>Re: Tiger Lake UP3 i7-1185GRE LPDDR4 IBIS simulation model</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1444986#M4383</link>
      <description>&lt;P&gt;Hello,&amp;nbsp;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/159196"&gt;@husainak&lt;/a&gt;:&lt;/P&gt;
&lt;P&gt;Thanks for your reply.&lt;/P&gt;
&lt;P&gt;We have sent an email to the address associated with this account with information that may help you.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/114"&gt;@CarlosAM_INTEL&lt;/a&gt;.&lt;/P&gt;</description>
      <pubDate>Mon, 09 Jan 2023 13:51:59 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1444986#M4383</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2023-01-09T13:51:59Z</dc:date>
    </item>
    <item>
      <title>Re: Tiger Lake UP3 i7-1185GRE LPDDR4 IBIS simulation model</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1493753#M4618</link>
      <description>&lt;P&gt;Hello Jaime,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am also looking for the IBIS model for this part. Could I please get assistance with this?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you&lt;/P&gt;</description>
      <pubDate>Wed, 07 Jun 2023 18:01:54 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1493753#M4618</guid>
      <dc:creator>rp19</dc:creator>
      <dc:date>2023-06-07T18:01:54Z</dc:date>
    </item>
    <item>
      <title>Re: Tiger Lake UP3 i7-1185GRE LPDDR4 IBIS simulation model</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1493761#M4619</link>
      <description>&lt;P class="sub_section_element_selectors"&gt;Hello&amp;nbsp;&lt;a href="https://community.intel.com/t5/user/viewprofilepage/user-id/297409"&gt;@rp19&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;Thank you for contacting Intel Embedded Community.&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;You must update your account to Premier, this will give you access to the documentation available in RDC.&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&lt;A href="https://www.intel.com/content/www/us/en/support/articles/000058073/programs/resource-and-documentation-center.html" target="_blank"&gt;https://www.intel.com/content/www/us/en/support/articles/000058073/programs/resource-and-documentation-center.html&lt;/A&gt;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;Best regards,&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P class="sub_section_element_selectors"&gt;&lt;A class="sub_section_element_selectors" href="https://community.intel.com/t5/user/viewprofilepage/user-id/266977" target="_blank" rel="noopener"&gt;@Diego_INTEL&lt;/A&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 07 Jun 2023 18:40:23 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Tiger-Lake-UP3-i7-1185GRE-LPDDR4-IBIS-simulation-model/m-p/1493761#M4619</guid>
      <dc:creator>Diego_INTEL</dc:creator>
      <dc:date>2023-06-07T18:40:23Z</dc:date>
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