<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: IBIS model for RX Buffer on CPU side in Embedded Intel® Core™ Processors</title>
    <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188035#M49</link>
    <description>&lt;P&gt;While jc further researches your question I just wanted to point out that &lt;A href="https://www-ssl.intel.com/content/www/us/en/secure/embedded/nda/products/glen-forest/mobile-4th-gen-core-ibis-models.html?wapkw=491321"&gt;https://www-ssl.intel.com/content/www/us/en/secure/embedded/nda/products/glen-forest/mobile-4th-gen-core-ibis-models.html?wapkw=491321&lt;/A&gt; 491321 is already on the EDC; it is categorized as Intel confidential.  The other 2 documents should be live on the EDC by the end of the day. LynnZ.&lt;/P&gt;</description>
    <pubDate>Mon, 30 Mar 2015 17:55:23 GMT</pubDate>
    <dc:creator>Natalie_Z_Intel</dc:creator>
    <dc:date>2015-03-30T17:55:23Z</dc:date>
    <item>
      <title>IBIS model for RX Buffer on CPU side</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188028#M42</link>
      <description>&lt;P&gt;I need to simulate the loss of a DMI signal from PCH to CPU using Sigwave; for this I need the RX buffer on CPU side, how can I get that?&lt;/P&gt;</description>
      <pubDate>Fri, 27 Mar 2015 17:22:30 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188028#M42</guid>
      <dc:creator>NFekr</dc:creator>
      <dc:date>2015-03-27T17:22:30Z</dc:date>
    </item>
    <item>
      <title>Re: IBIS model for RX Buffer on CPU side</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188029#M43</link>
      <description>&lt;P&gt;Hello Niloofar Fekri.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Welcome to Intel® Embedded Community.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Please review the following documents:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;501645&lt;I&gt;&lt;B&gt; 4th Gen Intel® Core™ Processor based on Mobile U-Processor Line (Haswell ULT) IBIS Model – I/O Buffer Information Specification (IBIS) Models – Rev. 1.0&lt;/B&gt;&lt;/I&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;491323 &lt;I&gt;&lt;B&gt;Haswell All-In-One – Signal Integrity Simulation Models Release Notes For Shark Bay Platform&lt;/B&gt;&lt;/I&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;491321  &lt;I&gt;&lt;B&gt;Haswell Mobile – Signal Integrity Simulation Models – Rev. 0.8&lt;/B&gt;&lt;/I&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;These files are confidential, we are going to upload them to EDC Library, as soon as your request for privilege account is approved we will let you know.&lt;/P&gt;&lt;P&gt; &lt;/P&gt;&lt;P&gt;Regards.&lt;/P&gt;&lt;P&gt;Josue.&lt;/P&gt;</description>
      <pubDate>Fri, 27 Mar 2015 17:37:32 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188029#M43</guid>
      <dc:creator>Josue_C_Intel</dc:creator>
      <dc:date>2015-03-27T17:37:32Z</dc:date>
    </item>
    <item>
      <title>Re: IBIS model for RX Buffer on CPU side</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188030#M44</link>
      <description>&lt;P&gt;Thanks a lot. I have some IBIS files for Shark Bay and similar, but they are all for PCH; I need the same files for CPU Haswell. I have some CPU files too, but they are HSPICE; I prefer IBIS models.&lt;/P&gt;&lt;P&gt;So I need an equivalent file to "pnv_ibis_nbook_rev20.ibs" for CPU Haswell; this file is for PCH.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Niloofar&lt;/P&gt;</description>
      <pubDate>Fri, 27 Mar 2015 17:45:29 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188030#M44</guid>
      <dc:creator>NFekr</dc:creator>
      <dc:date>2015-03-27T17:45:29Z</dc:date>
    </item>
    <item>
      <title>Re: IBIS model for RX Buffer on CPU side</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188031#M45</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I got the access now, but I cannot find these files.&lt;/P&gt;&lt;P&gt;The 2nd link I already have and that does not contain what I mentioned above.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Niloofar&lt;/P&gt;</description>
      <pubDate>Fri, 27 Mar 2015 19:47:05 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188031#M45</guid>
      <dc:creator>NFekr</dc:creator>
      <dc:date>2015-03-27T19:47:05Z</dc:date>
    </item>
    <item>
      <title>Re: IBIS model for RX Buffer on CPU side</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188032#M46</link>
      <description>&lt;P&gt;Hello Niloofar Fekri.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We will let you know when the files are available in the EDC Library.&lt;/P&gt;&lt;P&gt;Please stay tuned.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards.&lt;/P&gt;&lt;P&gt;Josue.&lt;/P&gt;</description>
      <pubDate>Fri, 27 Mar 2015 19:51:31 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188032#M46</guid>
      <dc:creator>Josue_C_Intel</dc:creator>
      <dc:date>2015-03-27T19:51:31Z</dc:date>
    </item>
    <item>
      <title>Re: IBIS model for RX Buffer on CPU side</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188033#M47</link>
      <description>&lt;P&gt;Hi Josue,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks a lot for your help. So these files would actually contain something similar to "pnv_ibis_nbook_rev20.ibs", but for CPU Haswell? Because that is what I really require, the other documents I already got from my manager and they are all for PCH or have HSPICE models for CPU.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Niloofar&lt;/P&gt;</description>
      <pubDate>Fri, 27 Mar 2015 19:54:12 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188033#M47</guid>
      <dc:creator>NFekr</dc:creator>
      <dc:date>2015-03-27T19:54:12Z</dc:date>
    </item>
    <item>
      <title>Re: IBIS model for RX Buffer on CPU side</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188034#M48</link>
      <description>&lt;P&gt;Any update for the question I asked above?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks a lot,&lt;/P&gt;&lt;P&gt;Niloofar&lt;/P&gt;</description>
      <pubDate>Mon, 30 Mar 2015 16:32:17 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188034#M48</guid>
      <dc:creator>NFekr</dc:creator>
      <dc:date>2015-03-30T16:32:17Z</dc:date>
    </item>
    <item>
      <title>Re: IBIS model for RX Buffer on CPU side</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188035#M49</link>
      <description>&lt;P&gt;While jc further researches your question I just wanted to point out that &lt;A href="https://www-ssl.intel.com/content/www/us/en/secure/embedded/nda/products/glen-forest/mobile-4th-gen-core-ibis-models.html?wapkw=491321"&gt;https://www-ssl.intel.com/content/www/us/en/secure/embedded/nda/products/glen-forest/mobile-4th-gen-core-ibis-models.html?wapkw=491321&lt;/A&gt; 491321 is already on the EDC; it is categorized as Intel confidential.  The other 2 documents should be live on the EDC by the end of the day. LynnZ.&lt;/P&gt;</description>
      <pubDate>Mon, 30 Mar 2015 17:55:23 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188035#M49</guid>
      <dc:creator>Natalie_Z_Intel</dc:creator>
      <dc:date>2015-03-30T17:55:23Z</dc:date>
    </item>
    <item>
      <title>Re: IBIS model for RX Buffer on CPU side</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188036#M50</link>
      <description>&lt;P&gt;Hello Niloofar Fekri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Files are now available in EDC Library:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;A href="https://www-ssl.intel.com/content/www/us/en/secure/embedded/nda/products/haswell/4th-gen-core-u-processor-ibis-models.html"&gt;https://www-ssl.intel.com/content/www/us/en/secure/embedded/nda/products/haswell/4th-gen-core-u-processor-ibis-models.html&lt;/A&gt; Mobile 4th Generation Intel® Core™ U-Processors: IBIS Models&lt;A href="https://www-ssl.intel.com/content/www/us/en/secure/embedded/nda/products/haswell/all-in-one-signal-integrity-simulation-models-for-4th-gen-core-with-q87-chipset.html"&gt;https://www-ssl.intel.com/content/www/us/en/secure/embedded/nda/products/haswell/all-in-one-signal-integrity-simulation-models-for-4th-gen-core-with-q87-chipset.html&lt;/A&gt; Signal Integrity Simulation for 4th Gen Intel® Core™ Processors&lt;A href="https://www-ssl.intel.com/content/www/us/en/secure/embedded/nda/products/glen-forest/mobile-4th-gen-core-ibis-models.html"&gt;https://www-ssl.intel.com/content/www/us/en/secure/embedded/nda/products/glen-forest/mobile-4th-gen-core-ibis-models.html&lt;/A&gt; Mobile 4th Generation Intel® Core™ Processors: IBIS Models&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please check them and let us now if you have any doubt.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your patience.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards.&lt;/P&gt;&lt;P&gt;Josue.&lt;/P&gt;</description>
      <pubDate>Mon, 30 Mar 2015 17:55:36 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188036#M50</guid>
      <dc:creator>Josue_C_Intel</dc:creator>
      <dc:date>2015-03-30T17:55:36Z</dc:date>
    </item>
    <item>
      <title>Re: IBIS model for RX Buffer on CPU side</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188037#M51</link>
      <description>&lt;P&gt;Hi Josue and Lynnz,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for the quick reply and the links. I already have links 2 and 3. The first link is what I need, but I need that for CPU DMI or PCIE, there are already files for USB, I2C, ect. The other files that are actually for PCIE or DMI (in the 2nd and 3rd links) are HSPICE and I do not want to convert SPICE models to IBIS models. &lt;/P&gt;&lt;P&gt;Also, when I try to use HSPICE models for both RX (CPU) and TX (PCH) using my OrCAD PCB designer Professional, for some reason it does not extract the necessary electrical parameters from those files (I guess those parameters are actually not stated in the files anyway and that is the reason); that is why I prefer IBIS model.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks a lot,&lt;/P&gt;&lt;P&gt;Niloofar&lt;/P&gt;</description>
      <pubDate>Mon, 30 Mar 2015 18:15:45 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188037#M51</guid>
      <dc:creator>NFekr</dc:creator>
      <dc:date>2015-03-30T18:15:45Z</dc:date>
    </item>
    <item>
      <title>Re: IBIS model for RX Buffer on CPU side</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188038#M52</link>
      <description>&lt;P&gt;Hi again,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any updates to the question I asked above?&lt;/P&gt;&lt;P&gt;If it happens that you do not have the IBIS model for what I asked, could you please let me know which .sp (spice) file I should use for DMI CPU RX side to convert to IBIS myself? Although, I prefer to get the IBIS from Intel rather than me converting it to IBIS myself.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks a lot,&lt;/P&gt;&lt;P&gt;Niloofar&lt;/P&gt;</description>
      <pubDate>Tue, 31 Mar 2015 17:19:15 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188038#M52</guid>
      <dc:creator>NFekr</dc:creator>
      <dc:date>2015-03-31T17:19:15Z</dc:date>
    </item>
    <item>
      <title>Re: IBIS model for RX Buffer on CPU side</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188039#M53</link>
      <description>&lt;P&gt;Hello Niloofar Fekri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We still working in your issue.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Please stay tuned.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best Regards.&lt;/P&gt;&lt;P&gt;Josue.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 31 Mar 2015 18:18:16 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188039#M53</guid>
      <dc:creator>Josue_C_Intel</dc:creator>
      <dc:date>2015-03-31T18:18:16Z</dc:date>
    </item>
    <item>
      <title>Re: IBIS model for RX Buffer on CPU side</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188040#M54</link>
      <description>&lt;P&gt;Hi Josue,&lt;/P&gt;&lt;P&gt;Great, thanks. I would appreciate the fast response, because currently my work is stuck with this.&lt;/P&gt;&lt;P&gt;Thank you so much,&lt;/P&gt;&lt;P&gt;Niloofar&lt;/P&gt;</description>
      <pubDate>Tue, 31 Mar 2015 18:33:57 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188040#M54</guid>
      <dc:creator>NFekr</dc:creator>
      <dc:date>2015-03-31T18:33:57Z</dc:date>
    </item>
    <item>
      <title>Re: IBIS model for RX Buffer on CPU side</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188041#M55</link>
      <description>&lt;P&gt;Hello Niloofar Fekri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Our next level support has confirmed that there is no IBIS model for the RX requested, the only models available for RX are included in the files already provided.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Please let me know if you have any other question.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best Regards.&lt;/P&gt;&lt;P&gt;Josue.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 01 Apr 2015 22:07:25 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188041#M55</guid>
      <dc:creator>Josue_C_Intel</dc:creator>
      <dc:date>2015-04-01T22:07:25Z</dc:date>
    </item>
    <item>
      <title>Re: IBIS model for RX Buffer on CPU side</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188042#M56</link>
      <description>&lt;P&gt;Hi Josue,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for the reply. The RX models provided are in HSPICE format, so I need to convert them to IBIS then, but I need to know which HSPICE (.sp) file is the one to use; there are different ones there and none seems to be complete. For me to convert HSPICE fiel to IBIS I need to have an input .sp file that contains the following: Header, pin list and SPICE Input deck and these .sp files do not have these included. I do not see any .sp files containing pin list for instance. &lt;/P&gt;&lt;P&gt;Could you please help me get a .sp file for RX having these contents I mentioned? My work is really stuck on this and I think Intel can only help.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks a lot,&lt;/P&gt;&lt;P&gt;Niloofar&lt;/P&gt;</description>
      <pubDate>Wed, 01 Apr 2015 23:09:20 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188042#M56</guid>
      <dc:creator>NFekr</dc:creator>
      <dc:date>2015-04-01T23:09:20Z</dc:date>
    </item>
    <item>
      <title>Re: IBIS model for RX Buffer on CPU side</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188043#M57</link>
      <description>&lt;P&gt;Hello Niloofar Fekri,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Unfortunately IBIS models provided by Intel offers basic signal integrity testing capability only. This is the reason why Intel provides HSPICE files for the high-speed interfaces.  &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Intel does not offer a complete IBIS model. However, customers are usually able to use the provided HSPICE models to compile IBIS compatible files using their own signal integrity analysis tools.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;In your case, the files available have been already sent to you.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best Regards.&lt;/P&gt;&lt;P&gt;Josue.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 02 Apr 2015 14:11:52 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188043#M57</guid>
      <dc:creator>Josue_C_Intel</dc:creator>
      <dc:date>2015-04-02T14:11:52Z</dc:date>
    </item>
    <item>
      <title>Re: IBIS model for RX Buffer on CPU side</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188044#M58</link>
      <description>&lt;P&gt;Hi, Niloo.&lt;/P&gt;&lt;P&gt;I have reached out to a field application engineer, Bill, who will be contacting you shortly to see if he can offer further assistance.  Hope this helps! LynnZ.&lt;/P&gt;</description>
      <pubDate>Thu, 02 Apr 2015 15:08:15 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188044#M58</guid>
      <dc:creator>Natalie_Z_Intel</dc:creator>
      <dc:date>2015-04-02T15:08:15Z</dc:date>
    </item>
    <item>
      <title>Re: IBIS model for RX Buffer on CPU side</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188045#M59</link>
      <description>&lt;P&gt;Hi Lynn,&lt;/P&gt;&lt;P&gt;He emailed me and I will talk to him for further assistance.&lt;/P&gt;&lt;P&gt;Thanks a lot,&lt;/P&gt;&lt;P&gt;Niloofar&lt;/P&gt;</description>
      <pubDate>Mon, 06 Apr 2015 16:57:52 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188045#M59</guid>
      <dc:creator>NFekr</dc:creator>
      <dc:date>2015-04-06T16:57:52Z</dc:date>
    </item>
    <item>
      <title>Re: IBIS model for RX Buffer on CPU side</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188046#M60</link>
      <description>&lt;P&gt;Thanks Josue,&lt;/P&gt;&lt;P&gt;So, now the problem is for me to convert to IBIS, I need the spice file to have a certain format and information and those spice files I have do not follow that. If they do, could you please direct me to them?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks a lot,&lt;/P&gt;&lt;P&gt;Niloofar&lt;/P&gt;</description>
      <pubDate>Mon, 06 Apr 2015 17:00:20 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188046#M60</guid>
      <dc:creator>NFekr</dc:creator>
      <dc:date>2015-04-06T17:00:20Z</dc:date>
    </item>
    <item>
      <title>Re: IBIS model for RX Buffer on CPU side</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188047#M61</link>
      <description>&lt;P&gt;Hello Niloofar Fekri,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Just to remind you, the files available for this platform are the following:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;A href="https://www-ssl.intel.com/content/www/us/en/secure/embedded/nda/products/haswell/4th-gen-core-u-processor-ibis-models.html"&gt;https://www-ssl.intel.com/content/www/us/en/secure/embedded/nda/products/haswell/4th-gen-core-u-processor-ibis-models.html&lt;/A&gt; Mobile 4th Generation Intel® Core™ U-Processors: IBIS Models&lt;A href="https://www-ssl.intel.com/content/www/us/en/secure/embedded/nda/products/haswell/all-in-one-signal-integrity-simulation-models-for-4th-gen-core-with-q87-chipset.html"&gt;https://www-ssl.intel.com/content/www/us/en/secure/embedded/nda/products/haswell/all-in-one-signal-integrity-simulation-models-for-4th-gen-core-with-q87-chipset.html&lt;/A&gt; Signal Integrity Simulation for 4th Gen Intel® Core™ Processors&lt;A href="https://www-ssl.intel.com/content/www/us/en/secure/embedded/nda/products/glen-forest/mobile-4th-gen-core-ibis-models.html"&gt;https://www-ssl.intel.com/content/www/us/en/secure/embedded/nda/products/glen-forest/mobile-4th-gen-core-ibis-models.html&lt;/A&gt; Mobile 4th Generation Intel® Core™ Processors: IBIS Models&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards.&lt;/P&gt;&lt;P&gt;Josue&lt;/P&gt;</description>
      <pubDate>Mon, 06 Apr 2015 18:25:28 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/IBIS-model-for-RX-Buffer-on-CPU-side/m-p/188047#M61</guid>
      <dc:creator>Josue_C_Intel</dc:creator>
      <dc:date>2015-04-06T18:25:28Z</dc:date>
    </item>
  </channel>
</rss>

