Operating system kernel-level FPGA bridge communication

Arun_Prabakar — Thu, 30 Oct 2025 06:47:24 GMT

We are using a custom (Agilex 5) platform and need to access the FPGA bridges from the Linux kernel. We are unable to locate the corresponding device tree nodes or modifications required to access these memory-mapped regions. We're aware of the devmem2 package, but we want to access the FPGA from the kernel side without relying on it. Please guide us on how to configure the device tree and use kernel-level commands or interfaces to access the HPS-to-FPGA and Lightweight HPS-to-FPGA bridges.
configuration from Linux.
CONFIG_OF_RESOLVE y
CONFIG_OF_OVERLAY y
CONFIG_OF_CONFIGFS y
CONFIG_FPGA_MGR_STRATIX10_SOC y
CONFIG_FPGA_BRIDGE y
CONFIG_FPGA_REGION y
CONFIG_OF_FPGA_REGION y
CONFIG_OVERLAY_FS y

Re: Operating system kernel-level FPGA bridge communication

AlHill — Thu, 30 Oct 2025 06:54:03 GMT

Read the big yellow banner on the forum page, where it says:

FPGA community forums and blogs have moved to the Altera Community. Existing Intel Community members can sign in with their current credentials.

you should probably repost there.

Doc (not an Intel employee or contractor)
[CoPilot is a virus]

topic Operating system kernel-level FPGA bridge communication in Embedded Intel® Core™ Processors

Operating system kernel-level FPGA bridge communication

Re: Operating system kernel-level FPGA bridge communication