<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Need help in QAT/Openssl-Async in Embedded Intel® Core™ Processors</title>
    <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Need-help-in-QAT-Openssl-Async/m-p/199788#M609</link>
    <description>&lt;P&gt;It's nice to hear from you. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'm working with PE3Si2CO3X8,&lt;/P&gt;&lt;P&gt;Silicom Dual HW Accelerator sku3 Crypto Compression PCI E G3 Server Adapter&lt;/P&gt;&lt;P&gt;(Gen 3.0 X8, Based on Intel ColecoCreek SKU3 DH8955CL, Low-Profile, RoHS compliant)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Linux is CentOS6, uname -a is:&lt;/P&gt;&lt;P&gt;Linux r730xd 2.6.32 # 3 SMP Mon Jan 4 13:28:19 KST 2016 x86_64 x86_64 x86_64 GNU/Linux.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Chul-Woong&lt;/P&gt;</description>
    <pubDate>Tue, 12 Jan 2016 16:14:05 GMT</pubDate>
    <dc:creator>CYang50</dc:creator>
    <dc:date>2016-01-12T16:14:05Z</dc:date>
    <item>
      <title>Need help in QAT/Openssl-Async</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Need-help-in-QAT-Openssl-Async/m-p/199786#M607</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm evaluating QAT hardware crypto card (8955 chipset)&lt;/P&gt;&lt;P&gt;I managed in building QAT1.6 driver and running&lt;/P&gt;&lt;P&gt;cpa_sample_code, both user-mode and kernel mode.&lt;/P&gt;&lt;P&gt;Next, I followed README to compile QAT-enabled openssl-async.&lt;/P&gt;&lt;P&gt;Setting environment, git clone, applying patch, making openssl lib, binary,&lt;/P&gt;&lt;P&gt;and qat-engine and engine driver.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;However, openssl does not seem to recognize qat engine.&lt;/P&gt;&lt;P&gt;ENGINE_set_default() is always failed.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I used QAT driver version qatmux.l.2.5.0-80 and openssl patch file libcrypto_shim_0.4.10-011.tgz.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would appreciate any help. Thank you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Chul-Woong&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;#  openssl engine&lt;/P&gt;&lt;P&gt;WARNING: can't open config file: /usr/local/ssl/openssl.cnf&lt;/P&gt;&lt;P&gt;(rsax) RSAX engine support&lt;/P&gt;&lt;P&gt;(rdrand) Intel RDRAND engine&lt;/P&gt;&lt;P&gt;(dynamic) Dynamic engine loading support&lt;/P&gt;&lt;P&gt;(4758cca) IBM 4758 CCA hardware engine support&lt;/P&gt;&lt;P&gt;(aep) Aep hardware engine support&lt;/P&gt;&lt;P&gt;(atalla) Atalla hardware engine support&lt;/P&gt;&lt;P&gt;(cswift) CryptoSwift hardware engine support&lt;/P&gt;&lt;P&gt;(chil) CHIL hardware engine support&lt;/P&gt;&lt;P&gt;(nuron) Nuron hardware engine support&lt;/P&gt;&lt;P&gt;(sureware) SureWare hardware engine support&lt;/P&gt;&lt;P&gt;(ubsec) UBSEC hardware engine support&lt;/P&gt;&lt;P&gt;(qat) Reference implementation of QAT crypto engine&lt;/P&gt;&lt;P&gt;(gost) Reference implementation of GOST engine&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;#  openssl speed -engine qat&lt;/P&gt;&lt;P&gt;WARNING: can't open config file: /usr/local/ssl/openssl.cnf&lt;/P&gt;&lt;P&gt;can't use that engine&lt;/P&gt;&lt;P&gt;140354839393960:error:260B806D:engine routines:ENGINE_TABLE_REGISTER:init failed:eng_table.c:175:&lt;/P&gt;&lt;P&gt;Doing mdc2 for 3s on 16 size blocks: ^C&lt;/P&gt;</description>
      <pubDate>Tue, 12 Jan 2016 13:44:23 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Need-help-in-QAT-Openssl-Async/m-p/199786#M607</guid>
      <dc:creator>CYang50</dc:creator>
      <dc:date>2016-01-12T13:44:23Z</dc:date>
    </item>
    <item>
      <title>Re: Need help in QAT/Openssl-Async</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Need-help-in-QAT-Openssl-Async/m-p/199787#M608</link>
      <description>&lt;P&gt;Hello Chul-Woong,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for contacting the Intel Embedded Community.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In order to better understand this situation, could you please tell us the part numbers of the Intel devices associated to this problem?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance for your collaboration.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Carlos_A.&lt;/P&gt;</description>
      <pubDate>Tue, 12 Jan 2016 15:15:27 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Need-help-in-QAT-Openssl-Async/m-p/199787#M608</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2016-01-12T15:15:27Z</dc:date>
    </item>
    <item>
      <title>Re: Need help in QAT/Openssl-Async</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Need-help-in-QAT-Openssl-Async/m-p/199788#M609</link>
      <description>&lt;P&gt;It's nice to hear from you. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'm working with PE3Si2CO3X8,&lt;/P&gt;&lt;P&gt;Silicom Dual HW Accelerator sku3 Crypto Compression PCI E G3 Server Adapter&lt;/P&gt;&lt;P&gt;(Gen 3.0 X8, Based on Intel ColecoCreek SKU3 DH8955CL, Low-Profile, RoHS compliant)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Linux is CentOS6, uname -a is:&lt;/P&gt;&lt;P&gt;Linux r730xd 2.6.32 # 3 SMP Mon Jan 4 13:28:19 KST 2016 x86_64 x86_64 x86_64 GNU/Linux.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Chul-Woong&lt;/P&gt;</description>
      <pubDate>Tue, 12 Jan 2016 16:14:05 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Need-help-in-QAT-Openssl-Async/m-p/199788#M609</guid>
      <dc:creator>CYang50</dc:creator>
      <dc:date>2016-01-12T16:14:05Z</dc:date>
    </item>
    <item>
      <title>Re: Need help in QAT/Openssl-Async</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Need-help-in-QAT-Openssl-Async/m-p/199789#M610</link>
      <description>&lt;P&gt;Hello Chul-Woong,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your reply.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We have tried to research information about the "PE3Si2CO3X8" that you have listed without results. Could you please give us all information related to this device?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks again for your cooperation.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Carlos_A.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 12 Jan 2016 19:20:15 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Need-help-in-QAT-Openssl-Async/m-p/199789#M610</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2016-01-12T19:20:15Z</dc:date>
    </item>
    <item>
      <title>Re: Need help in QAT/Openssl-Async</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Need-help-in-QAT-Openssl-Async/m-p/199790#M611</link>
      <description>&lt;P&gt;I attach pdf link received from our partner with which I received a physical crypto card:&lt;/P&gt;&lt;P&gt;&lt;A href="http://ns.aratech.co.kr/~cwyang/temp.pdf"&gt;http://ns.aratech.co.kr/~cwyang/temp.pdf&lt;/A&gt; &lt;A href="http://ns.aratech.co.kr/~cwyang/temp.pdf"&gt;http://ns.aratech.co.kr/~cwyang/temp.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;That's the only information I have now. I hope this will be helpful.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Chul-Woong&lt;/P&gt;</description>
      <pubDate>Wed, 13 Jan 2016 03:14:40 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Need-help-in-QAT-Openssl-Async/m-p/199790#M611</guid>
      <dc:creator>CYang50</dc:creator>
      <dc:date>2016-01-13T03:14:40Z</dc:date>
    </item>
    <item>
      <title>Re: Need help in QAT/Openssl-Async</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Need-help-in-QAT-Openssl-Async/m-p/199791#M612</link>
      <description>&lt;P&gt;Hello Chul-Woong,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your update.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We would like to help you, but you need to contact the manufacturer of the mentioned Crypto Compression PCI E G3 Server Adapter to receive the further help because they have all the information related to their products.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In order to help you, as a reference please address your problem by filling the form that you can find at the following web site:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="http://www.silicom-usa.com/contactus.aspx?Item=693&amp;amp;Product=301&amp;amp;ln=en"&gt;http://www.silicom-usa.com/contactus.aspx?Item=693&amp;amp;Product=301&amp;amp;ln=en&lt;/A&gt; Contact Us&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Please let us know if this information is useful to you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt; Carlos_A.&lt;/P&gt;</description>
      <pubDate>Wed, 13 Jan 2016 14:56:04 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Need-help-in-QAT-Openssl-Async/m-p/199791#M612</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2016-01-13T14:56:04Z</dc:date>
    </item>
    <item>
      <title>Re: Need help in QAT/Openssl-Async</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Need-help-in-QAT-Openssl-Async/m-p/199792#M613</link>
      <description>&lt;P&gt;Oh.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I understand.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would be happy if I get an answer from here since core of the card is Intel 8255 chip.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your kind reply.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Chul-Woong&lt;/P&gt;</description>
      <pubDate>Thu, 14 Jan 2016 05:54:48 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Need-help-in-QAT-Openssl-Async/m-p/199792#M613</guid>
      <dc:creator>CYang50</dc:creator>
      <dc:date>2016-01-14T05:54:48Z</dc:date>
    </item>
    <item>
      <title>Re: Need help in QAT/Openssl-Async</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Need-help-in-QAT-Openssl-Async/m-p/199793#M614</link>
      <description>&lt;P&gt;Hello  Chul-Woong,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your update.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We would like to help you as we mentioned, but we ignore the modifications and supported conditions that the manufacturer of the third party projects know based on their tests and validations.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Due to this fact, we are unavailable to give you the suggestions that can further help you with any third party implementation.&lt;/P&gt;&lt;P&gt;  &lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt; Carlos_A.&lt;/P&gt;</description>
      <pubDate>Thu, 14 Jan 2016 16:05:16 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Need-help-in-QAT-Openssl-Async/m-p/199793#M614</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2016-01-14T16:05:16Z</dc:date>
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  </channel>
</rss>

