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    <title>topic Low DPDK performance in Embedded Intel® Core™ Processors</title>
    <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Low-DPDK-performance/m-p/200258#M644</link>
    <description>&lt;P&gt;Hi &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm trying to measure the throughput of DPDK for physical ports (using 64-byte udp packets), but it seems very low. My test setup is shown below:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;+─────────────────────────────+&lt;/P&gt;&lt;P&gt;│ 82599ES 10-Gigabit SFI/SFP+ │&lt;/P&gt;&lt;P&gt;+───+────+──────────+────+────+&lt;/P&gt;&lt;P&gt;    │ p0 │          │ p1 │&lt;/P&gt;&lt;P&gt;    +────+          +────+&lt;/P&gt;&lt;P&gt;      ^               ^&lt;/P&gt;&lt;P&gt;      |               |&lt;/P&gt;&lt;P&gt;      v               v&lt;/P&gt;&lt;P&gt;    +────+          +────+&lt;/P&gt;&lt;P&gt;    │ p0 │          │ p1 │&lt;/P&gt;&lt;P&gt;+───+────+──────────+────+────+&lt;/P&gt;&lt;P&gt;│ NAPATECH Adapter - 2 port   │&lt;/P&gt;&lt;P&gt;+─────────────────────────────+&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I isolated cores (master and logical cores on hyper-threading) from Linux kernel according to the output of dpdk/tools/cpu_layout.p, iommu is set to pt, intel_iommu is off and 1G hugepages allocated for numa nodes as follows;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;$ cat /sys/devices/system/node/node*/meminfo | fgrep Huge&lt;/P&gt;&lt;P&gt;Node 0 AnonHugePages:    137216 kB&lt;/P&gt;&lt;P&gt;Node 0 HugePages_Total:     3&lt;/P&gt;&lt;P&gt;Node 0 HugePages_Free:      2&lt;/P&gt;&lt;P&gt;Node 0 HugePages_Surp:      0&lt;/P&gt;&lt;P&gt;Node 1 AnonHugePages:    227328 kB&lt;/P&gt;&lt;P&gt;Node 1 HugePages_Total:     2&lt;/P&gt;&lt;P&gt;Node 1 HugePages_Free:      1&lt;/P&gt;&lt;P&gt;Node 1 HugePages_Surp:      0&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;$ ./cpu_layout.py&lt;/P&gt;&lt;P&gt;cores =  [0, 1, 2, 8, 9, 10]&lt;/P&gt;&lt;P&gt;sockets =  [0, 1]&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;        Socket 0        Socket 1        &lt;/P&gt;&lt;P&gt;        --------        --------        &lt;/P&gt;&lt;P&gt;Core 0  [0, 12]         [6, 18]         &lt;/P&gt;&lt;P&gt;Core 1  [1, 13]         [7, 19]         &lt;/P&gt;&lt;P&gt;Core 2  [2, 14]         [8, 20]         &lt;/P&gt;&lt;P&gt;Core 8  [3, 15]         [9, 21]         &lt;/P&gt;&lt;P&gt;&amp;lt;span style="color: # 000000; font-family:...&lt;/P&gt;</description>
    <pubDate>Thu, 21 Jan 2016 12:45:47 GMT</pubDate>
    <dc:creator>AATLI</dc:creator>
    <dc:date>2016-01-21T12:45:47Z</dc:date>
    <item>
      <title>Low DPDK performance</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Low-DPDK-performance/m-p/200258#M644</link>
      <description>&lt;P&gt;Hi &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm trying to measure the throughput of DPDK for physical ports (using 64-byte udp packets), but it seems very low. My test setup is shown below:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;+─────────────────────────────+&lt;/P&gt;&lt;P&gt;│ 82599ES 10-Gigabit SFI/SFP+ │&lt;/P&gt;&lt;P&gt;+───+────+──────────+────+────+&lt;/P&gt;&lt;P&gt;    │ p0 │          │ p1 │&lt;/P&gt;&lt;P&gt;    +────+          +────+&lt;/P&gt;&lt;P&gt;      ^               ^&lt;/P&gt;&lt;P&gt;      |               |&lt;/P&gt;&lt;P&gt;      v               v&lt;/P&gt;&lt;P&gt;    +────+          +────+&lt;/P&gt;&lt;P&gt;    │ p0 │          │ p1 │&lt;/P&gt;&lt;P&gt;+───+────+──────────+────+────+&lt;/P&gt;&lt;P&gt;│ NAPATECH Adapter - 2 port   │&lt;/P&gt;&lt;P&gt;+─────────────────────────────+&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I isolated cores (master and logical cores on hyper-threading) from Linux kernel according to the output of dpdk/tools/cpu_layout.p, iommu is set to pt, intel_iommu is off and 1G hugepages allocated for numa nodes as follows;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;$ cat /sys/devices/system/node/node*/meminfo | fgrep Huge&lt;/P&gt;&lt;P&gt;Node 0 AnonHugePages:    137216 kB&lt;/P&gt;&lt;P&gt;Node 0 HugePages_Total:     3&lt;/P&gt;&lt;P&gt;Node 0 HugePages_Free:      2&lt;/P&gt;&lt;P&gt;Node 0 HugePages_Surp:      0&lt;/P&gt;&lt;P&gt;Node 1 AnonHugePages:    227328 kB&lt;/P&gt;&lt;P&gt;Node 1 HugePages_Total:     2&lt;/P&gt;&lt;P&gt;Node 1 HugePages_Free:      1&lt;/P&gt;&lt;P&gt;Node 1 HugePages_Surp:      0&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;$ ./cpu_layout.py&lt;/P&gt;&lt;P&gt;cores =  [0, 1, 2, 8, 9, 10]&lt;/P&gt;&lt;P&gt;sockets =  [0, 1]&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;        Socket 0        Socket 1        &lt;/P&gt;&lt;P&gt;        --------        --------        &lt;/P&gt;&lt;P&gt;Core 0  [0, 12]         [6, 18]         &lt;/P&gt;&lt;P&gt;Core 1  [1, 13]         [7, 19]         &lt;/P&gt;&lt;P&gt;Core 2  [2, 14]         [8, 20]         &lt;/P&gt;&lt;P&gt;Core 8  [3, 15]         [9, 21]         &lt;/P&gt;&lt;P&gt;&amp;lt;span style="color: # 000000; font-family:...&lt;/P&gt;</description>
      <pubDate>Thu, 21 Jan 2016 12:45:47 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Low-DPDK-performance/m-p/200258#M644</guid>
      <dc:creator>AATLI</dc:creator>
      <dc:date>2016-01-21T12:45:47Z</dc:date>
    </item>
    <item>
      <title>Re: Low DPDK performance</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Low-DPDK-performance/m-p/200259#M645</link>
      <description>&lt;P&gt;Hello avatli,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for contacting the Intel Embedded Community.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We suggest you verify that the mentioned test fulfills with the requirements stated at the &lt;A href="http://dpdk.org/doc/dts/gsg/index.html"&gt;http://dpdk.org/doc/dts/gsg/index.html&lt;/A&gt; Getting Started Guide — DPDK Test Suite documentation.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It is important to let you know that your DPDK consultations will be further answered using the email addresses listed at the &lt;A href="http://dpdk.org/ml"&gt;http://dpdk.org/ml&lt;/A&gt; DPDK Mailing Lists. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please let us know if this information is useful to you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Carlos_A. &lt;/P&gt;</description>
      <pubDate>Thu, 21 Jan 2016 15:08:52 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Low-DPDK-performance/m-p/200259#M645</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2016-01-21T15:08:52Z</dc:date>
    </item>
    <item>
      <title>Re: Low DPDK performance</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Low-DPDK-performance/m-p/200260#M646</link>
      <description>&lt;P&gt;Hello&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;No one has answered the question at the DPDK Mailing Lists. We still have the performance problem. I could not reach your benchmark results, especially for small packets.&lt;/P&gt;</description>
      <pubDate>Fri, 05 Feb 2016 10:01:34 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Low-DPDK-performance/m-p/200260#M646</guid>
      <dc:creator>AATLI</dc:creator>
      <dc:date>2016-02-05T10:01:34Z</dc:date>
    </item>
    <item>
      <title>Re: Low DPDK performance</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Low-DPDK-performance/m-p/200261#M647</link>
      <description>&lt;P&gt;Hello avatli,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your update.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We have the following suggestions to solve this inconvenience:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1) Please add --numa knob to ./testpmd command line.&lt;/P&gt;&lt;P&gt;2) Please increase the number of descriptors (try default values (no –rxd –txd flags, and rxd=256, txd=512/1024).&lt;/P&gt;&lt;P&gt;3) Also, it would be helpful to see the output of 'lspci –vt'.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please let us know if this information is useful to you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Carlos_A.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 12 Feb 2016 19:39:22 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Low-DPDK-performance/m-p/200261#M647</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2016-02-12T19:39:22Z</dc:date>
    </item>
    <item>
      <title>Re: Low DPDK performance</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Low-DPDK-performance/m-p/200262#M648</link>
      <description>&lt;P&gt;Hi Carlos &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Unfortunately still the same low performance, here is my output;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;B&gt;argela@argela-HP-Z800-Workstation:~/ovs_dpdk/dpdk/app/test-pmd/build/app$ lspci -vt&lt;/B&gt;&lt;/P&gt;&lt;P&gt;-+-[0000:7f]-+-00.0  Intel Corporation Xeon 5600 Series QuickPath Architecture Generic Non-core Registers&lt;/P&gt;&lt;P&gt; |           +-00.1  Intel Corporation Xeon 5600 Series QuickPath Architecture System Address Decoder&lt;/P&gt;&lt;P&gt; |           +-02.0  Intel Corporation Xeon 5600 Series QPI Link 0&lt;/P&gt;&lt;P&gt; |           +-02.1  Intel Corporation Xeon 5600 Series QPI Physical 0&lt;/P&gt;&lt;P&gt; |           +-02.2  Intel Corporation Xeon 5600 Series Mirror Port Link 0&lt;/P&gt;&lt;P&gt; |           +-02.3  Intel Corporation Xeon 5600 Series Mirror Port Link 1&lt;/P&gt;&lt;P&gt; |           +-02.4  Intel Corporation Xeon 5600 Series QPI Link 1&lt;/P&gt;&lt;P&gt; |           +-02.5  Intel Corporation Xeon 5600 Series QPI Physical 1&lt;/P&gt;&lt;P&gt; |           +-03.0  Intel Corporation Xeon 5600 Series Integrated Memory Controller Registers&lt;/P&gt;&lt;P&gt; |           +-03.1  Intel Corporation Xeon 5600 Series Integrated Memory Controller Target Address Decoder&lt;/P&gt;&lt;P&gt; |           +-03.2  Intel Corporation Xeon 5600 Series Integrated Memory Controller RAS Registers&lt;/P&gt;&lt;P&gt; |           +-03.4  Intel Corporation Xeon 5600 Series Integrated Memory Controller Test Registers&lt;/P&gt;&lt;P&gt; |           +-04.0  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Control&lt;/P&gt;&lt;P&gt; |           +-04.1  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Address&lt;/P&gt;&lt;P&gt; |           +-04.2  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Rank&lt;/P&gt;&lt;P&gt; |           +-04.3  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Thermal Control&lt;/P&gt;&lt;P&gt; |           +-05.0  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Control&lt;/P&gt;&lt;P&gt; |           +-05.1  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Address&lt;/P&gt;&lt;P&gt; |           +-05.2  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Rank&lt;/P&gt;&lt;P&gt; |           +-05.3  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Thermal Control&lt;/P&gt;&lt;P&gt; |           +-06.0  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Control&lt;/P&gt;&lt;P&gt; |           +-06.1  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Address&lt;/P&gt;&lt;P&gt; |           +-06.2  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Rank&lt;/P&gt;&lt;P&gt; |           \-06.3  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Thermal Control&lt;/P&gt;&lt;P&gt; +-[0000:7e]-+-00.0  Intel Corporation Xeon 5600 Series QuickPath Architecture Generic Non-core Registers&lt;/P&gt;&lt;P&gt; |           +-00.1  Intel Corporation Xeon 5600 Series QuickPath Architecture System Address Decoder&lt;/P&gt;&lt;P&gt; |           +-02.0  Intel Corporation Xeon 5600 Series QPI Link 0&lt;/P&gt;&lt;P&gt; |           +-02.1  Intel Corporation Xeon 5600 Series QPI Physical 0&lt;/P&gt;&lt;P&gt; |           +-02.2  Intel Corporation Xeon 5600 Series Mirror Port Link 0&lt;/P&gt;&lt;P&gt; |           +-02.3  Intel Corporation Xeon 5600 Series Mirror Port Link 1&lt;/P&gt;&lt;P&gt; |           +-02.4  Intel Corporation Xeon 5600 Series QPI Link 1&lt;/P&gt;&lt;P&gt; |           +-02.5  Intel Corporation Xeon 5600 Series QPI Physical 1&lt;/P&gt;&lt;P&gt; |           +-03.0  Intel Corporation Xeon 5600 Series Integrated Memory Controller Registers&lt;/P&gt;&lt;P&gt; |           +-03.1  Intel Corporation Xeon 5600 Series Integrated Memory Controller Target Address Decoder&lt;/P&gt;&lt;P&gt; |           +-03.2  Intel Corporation Xeon 5600 Series Integrated Memory Controller RAS Registers&lt;/P&gt;&lt;P&gt; |           +-03.4  Intel Corporation Xeon 5600 Series Integrated Memory Controller Test Registers&lt;/P&gt;&lt;P&gt; |           +-04.0  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Control&lt;/P&gt;&lt;P&gt; |           +-04.1  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Address&lt;/P&gt;&lt;P&gt; |           +-04.2  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Rank&lt;/P&gt;&lt;P&gt; |           +-04.3  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Thermal Control&lt;/P&gt;&lt;P&gt; |           +-05.0  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Control&lt;/P&gt;&lt;P&gt; |           +-05.1  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Address&lt;/P&gt;&lt;P&gt; |           +-05.2  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Rank&lt;/P&gt;&lt;P&gt; |           +-05.3  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Thermal Control&lt;/P&gt;&lt;P&gt; |           +-06.0  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Control&lt;/P&gt;&lt;P&gt; |           +-06.1  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Address&lt;/P&gt;&lt;P&gt; |           +-06.2  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Rank&lt;/P&gt;&lt;P&gt; |           \-06.3  Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Thermal Control&lt;/P&gt;&lt;P&gt; +-[0000:40]-+-03.0-[42]--&lt;/P&gt;&lt;P&gt; |           +-07.0-[60]--+-00.0  Intel Corporation 82599ES 10-Gigabit SFI/SFP+ Network Connection&lt;/P&gt;&lt;P&gt; |           |            \-00.1  Intel Corporation 82599ES 10-Gigabit SFI/SFP+ Network Connection&lt;/P&gt;&lt;P&gt; |           +-09.0-[41]----00.0  LSI Logic / Symbios Logic SAS1068E PCI-Express Fusion-MPT SAS&lt;/P&gt;&lt;P&gt; |           +-10.0  Intel Corporation 7500/5520/5500/X58 Physical and Link Layer Registers Port 0&lt;/P&gt;&lt;P&gt; |           +-10.1  Intel Corporation 7500/5520/5500/X58 Routing and Protocol Layer Registers Port 0&lt;/P&gt;&lt;P&gt; |           +-11.0  Intel Corporation 7500/5520/5500 Physical and Link Layer Registers Port 1&lt;/P&gt;&lt;P&gt; |           +-11.1  Intel Corporation 7500/5520/5500 Routing &amp;amp; Protocol Layer Register Port 1&lt;/P&gt;&lt;P&gt; |           +-14.0  Intel Corporation 7500/5520/5500/X58 I/O Hub System Management Registers&lt;/P&gt;&lt;P&gt; |           +-14.1  Intel Corporation 7500/5520/5500/X58 I/O Hub GPIO and Scratch Pad Registers&lt;/P&gt;&lt;P&gt; |           +-14.2  Intel Corporation 7500/5520/5500/X58 I/O Hub Control Status and RAS Registers&lt;/P&gt;&lt;P&gt; |           \-15.0  Intel Corporation 7500/5520/5500/X58 Trusted Execution Technology Registers&lt;/P&gt;&lt;P&gt; \-[0000:00]-+-00.0  Intel Corporation 5520 I/O Hub to ESI Port&lt;/P&gt;&lt;P&gt;             +-01.0-[03]--&lt;/P&gt;&lt;P&gt;             +-03.0-[0f-12]----00.0-[10-12]--+-00.0-[11]--+-00.0  NVIDIA Corporation GF110 [GeForce GTX 590]&lt;/P&gt;&lt;P&gt;             |                               |            \-00.1  NVIDIA Corporation GF110 High Definition Audio Controller&lt;/P&gt;&lt;P&gt;             |                               \-02.0-[12]--+-00.0  NVIDIA Corporation GF110 [GeForce GTX 590]&lt;/P&gt;&lt;P&gt;             |                                            \-00.1  NVIDIA Corporation GF110 High Definition Audio Controller&lt;/P&gt;&lt;P&gt;             +-07.0-[28]----00.0  Napatech A/S NT4E2-4-PTP Network Adapter 4x1Gb&lt;/P&gt;&lt;P&gt;             +-10.0  Intel Corporation 7500/5520/5500/X58 Physical and Link Layer Registers Port 0&lt;/P&gt;&lt;P&gt;             +-10.1  Intel Corporation 7500/5520/5500/X58 Routing and Protocol Layer Registers Port 0&lt;/P&gt;&lt;P&gt;             +-11.0  Intel Corporation 7500/5520/5500 Physical and Link Layer Registers Port 1&lt;/P&gt;&lt;P&gt;             +-11.1  Intel Corporation 7500/5520/5500 Routing &amp;amp; Protocol Layer Register Port 1&lt;/P&gt;&lt;P&gt;             +-14.0  Intel Corporation 7500/5520/5500/X58 I/O Hub System Management Registers&lt;/P&gt;&lt;P&gt;             +-14.1  Intel Corporation 7500/5520/5500/X58 I/O Hub GPIO and Scratch Pad Registers&lt;/P&gt;&lt;P&gt;             +-14.2  Intel Corporation 7500/5520/5500/X58 I/O Hub Control Status and RAS Registers&lt;/P&gt;&lt;P&gt;             +-15.0  Intel Corporation 7500/5520/5500/X58 Trusted Execution Technology Registers&lt;/P&gt;&lt;P&gt;             +-1a.0  Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller # 4&lt;/P&gt;&lt;P&gt;             +-1a.1  Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller # 5&lt;/P&gt;&lt;P&gt;             +-1a.2  Int...&lt;/P&gt;</description>
      <pubDate>Mon, 15 Feb 2016 09:50:15 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Low-DPDK-performance/m-p/200262#M648</guid>
      <dc:creator>AATLI</dc:creator>
      <dc:date>2016-02-15T09:50:15Z</dc:date>
    </item>
    <item>
      <title>Re: Low DPDK performance</title>
      <link>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Low-DPDK-performance/m-p/200263#M649</link>
      <description>&lt;P&gt;Hello avatli,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your update.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In order to better understand the situation, we would like to address the following questions:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could you please tell us the model of the platform that is being used?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could you please paste the output of lscpu?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;From the lspci output it looks like the NICs are connected to the PCIe ports on socket 1 (out of s0 and s1). If that is the case, it is best to use the cores from socket 1 as well. 2 cores per 10G port should be enough (depending on the platform) could you try the following core mask:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;./testpmd –c 0x3c0 –n 2 -- -i --numa --nb-cores=4&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;And also with more descriptors:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;./testpmd –c 0x3c0 –n 2 -- -i --numa --nb-cores=4 --txd=1024 --rxd=512&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Also, Could you please confirm if you have 2 memory channels populated? Are the socket 1 channels also populated? What is the model / frequency of the DIMMs?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please let us know all the requested information to have the complete perspective of the cited situation.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Carlos_A.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 17 Feb 2016 13:18:43 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Intel-Core-Processors/Low-DPDK-performance/m-p/200263#M649</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2016-02-17T13:18:43Z</dc:date>
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