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    <title>topic I210 programming part 3 in Embedded Connectivity</title>
    <link>https://community.intel.com/t5/Embedded-Connectivity/I210-programming-part-3/m-p/658210#M1569</link>
    <description>&lt;P&gt;Thank you for the websites that show in circuit programmers&amp;nbsp; to program the&amp;nbsp;Non volatile memory part &amp;nbsp;that we will attach to the I210IT part.&amp;nbsp;&amp;nbsp;To use&amp;nbsp;a programmer,&amp;nbsp; I need to make sure the I210 part is not driving the &amp;nbsp; NVM_CS, SI, SO and SK&amp;nbsp;&amp;nbsp;pins&amp;nbsp; when I am trying to program the NMV using these&amp;nbsp; same pins.&amp;nbsp; Otherwise if 2 devices are driving the same pins,&amp;nbsp;&amp;nbsp;&amp;nbsp;there will be contention which&amp;nbsp;&amp;nbsp;would&amp;nbsp;prevent&amp;nbsp;the programmer &amp;nbsp;from working.&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;Is there any way&amp;nbsp;to have the I210 part&amp;nbsp;tristate these NVM programming &amp;nbsp;pins?&amp;nbsp;For instance,&amp;nbsp;&amp;nbsp;if I negate the LAN_PWR_GOOD pin&amp;nbsp;to logic low,&amp;nbsp;does the I210 part tristate the NVM_SO,&amp;nbsp;SI, SK and CS pins?&amp;nbsp;&amp;nbsp; I have looked in the datasheet for the I210 part but not found this information.&amp;nbsp; Could you please answer this question in this forum as:&amp;nbsp;&amp;nbsp;&amp;nbsp; Yes the programming pins on the I210 part &amp;nbsp;(NVM_SO,&amp;nbsp;SI, SK and CS) tristate&amp;nbsp;if &amp;nbsp;the XYZ&amp;nbsp; pin on the I210 part is asserted&amp;nbsp;OR &amp;nbsp;No,&amp;nbsp; there is no way to tristate the programming pins.&amp;nbsp; Thank you &lt;/P&gt;&lt;P&gt;Whitney Ballard &lt;/P&gt;</description>
    <pubDate>Tue, 06 Aug 2019 23:52:53 GMT</pubDate>
    <dc:creator>WBall</dc:creator>
    <dc:date>2019-08-06T23:52:53Z</dc:date>
    <item>
      <title>I210 programming part 3</title>
      <link>https://community.intel.com/t5/Embedded-Connectivity/I210-programming-part-3/m-p/658210#M1569</link>
      <description>&lt;P&gt;Thank you for the websites that show in circuit programmers&amp;nbsp; to program the&amp;nbsp;Non volatile memory part &amp;nbsp;that we will attach to the I210IT part.&amp;nbsp;&amp;nbsp;To use&amp;nbsp;a programmer,&amp;nbsp; I need to make sure the I210 part is not driving the &amp;nbsp; NVM_CS, SI, SO and SK&amp;nbsp;&amp;nbsp;pins&amp;nbsp; when I am trying to program the NMV using these&amp;nbsp; same pins.&amp;nbsp; Otherwise if 2 devices are driving the same pins,&amp;nbsp;&amp;nbsp;&amp;nbsp;there will be contention which&amp;nbsp;&amp;nbsp;would&amp;nbsp;prevent&amp;nbsp;the programmer &amp;nbsp;from working.&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;Is there any way&amp;nbsp;to have the I210 part&amp;nbsp;tristate these NVM programming &amp;nbsp;pins?&amp;nbsp;For instance,&amp;nbsp;&amp;nbsp;if I negate the LAN_PWR_GOOD pin&amp;nbsp;to logic low,&amp;nbsp;does the I210 part tristate the NVM_SO,&amp;nbsp;SI, SK and CS pins?&amp;nbsp;&amp;nbsp; I have looked in the datasheet for the I210 part but not found this information.&amp;nbsp; Could you please answer this question in this forum as:&amp;nbsp;&amp;nbsp;&amp;nbsp; Yes the programming pins on the I210 part &amp;nbsp;(NVM_SO,&amp;nbsp;SI, SK and CS) tristate&amp;nbsp;if &amp;nbsp;the XYZ&amp;nbsp; pin on the I210 part is asserted&amp;nbsp;OR &amp;nbsp;No,&amp;nbsp; there is no way to tristate the programming pins.&amp;nbsp; Thank you &lt;/P&gt;&lt;P&gt;Whitney Ballard &lt;/P&gt;</description>
      <pubDate>Tue, 06 Aug 2019 23:52:53 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Connectivity/I210-programming-part-3/m-p/658210#M1569</guid>
      <dc:creator>WBall</dc:creator>
      <dc:date>2019-08-06T23:52:53Z</dc:date>
    </item>
    <item>
      <title>Re: I210 programming part 3</title>
      <link>https://community.intel.com/t5/Embedded-Connectivity/I210-programming-part-3/m-p/658211#M1570</link>
      <description>&lt;P&gt;Hello, &lt;A href="https://community.intel.com/sfdc-users/WBall"&gt;@WBall&lt;/A&gt;​&amp;nbsp;:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you for contacting Intel Embedded Community.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We have had experience with the third-party device mentioned by us on your previous thread and programming the flash for an i210, and had no issues.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The i210 does not access the flash part once the power on cycle is complete, so there should be no competition.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Also, the flash part itself should not require external power as the mentioned third-party device worked on an un-powered card.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;However, the cited pins can be setting in tri-state mode when they are disabling. You can confirm this information in section  4.4.2, on page 143 of the Intel(R) Ethernet Controller I210 Datasheet document # 333016 that can be found at:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/i210-ethernet-controller-datasheet.pdf" target="_self" alt="https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/i210-ethernet-controller-datasheet.pdf"&gt;&lt;/A&gt;&lt;A href="https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/i210-ethernet-controller-datasheet.pdf"&gt;https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/i210-ethernet-controller-datasheet.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.intel.com/sfdc-users/Mæcenas_INTEL"&gt;@Mæcenas_INTEL&lt;/A&gt;​.&lt;/P&gt;</description>
      <pubDate>Thu, 08 Aug 2019 05:06:28 GMT</pubDate>
      <guid>https://community.intel.com/t5/Embedded-Connectivity/I210-programming-part-3/m-p/658211#M1570</guid>
      <dc:creator>CarlosAM_INTEL</dc:creator>
      <dc:date>2019-08-08T05:06:28Z</dc:date>
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